* gcc.dg/const-elim-1.c: Remove xfail for xtensa-*-*.
[official-gcc.git] / gcc / config / avr / avr.h
blob5b7c73dfac6932ae62a98623e00bca87936b8b65
1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov (denisc@overta.ru)
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* Names to predefine in the preprocessor for this target machine. */
26 #define TARGET_CPU_CPP_BUILTINS() \
27 do \
28 { \
29 builtin_define_std ("AVR"); \
30 if (avr_base_arch_macro) \
31 builtin_define (avr_base_arch_macro); \
32 if (avr_extra_arch_macro) \
33 builtin_define (avr_extra_arch_macro); \
34 if (avr_asm_only_p) \
35 builtin_define ("__AVR_ASM_ONLY__"); \
36 if (avr_enhanced_p) \
37 builtin_define ("__AVR_ENHANCED__"); \
38 if (avr_mega_p) \
39 builtin_define ("__AVR_MEGA__"); \
40 if (TARGET_NO_INTERRUPTS) \
41 builtin_define ("__NO_INTERRUPTS__"); \
42 } \
43 while (0)
45 extern const char *avr_base_arch_macro;
46 extern const char *avr_extra_arch_macro;
47 extern int avr_mega_p;
48 extern int avr_enhanced_p;
49 extern int avr_asm_only_p;
51 #define AVR_MEGA (avr_mega_p && !TARGET_SHORT_CALLS)
52 #define AVR_ENHANCED (avr_enhanced_p)
54 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
56 #define OVERRIDE_OPTIONS avr_override_options ()
58 #define CAN_DEBUG_WITHOUT_FP
60 #define BITS_BIG_ENDIAN 0
61 #define BYTES_BIG_ENDIAN 0
62 #define WORDS_BIG_ENDIAN 0
64 #ifdef IN_LIBGCC2
65 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
66 #define UNITS_PER_WORD 4
67 #else
68 /* Width of a word, in units (bytes). */
69 #define UNITS_PER_WORD 1
70 #endif
72 #define POINTER_SIZE 16
75 /* Maximum sized of reasonable data type
76 DImode or Dfmode ... */
77 #define MAX_FIXED_MODE_SIZE 32
79 #define PARM_BOUNDARY 8
81 #define FUNCTION_BOUNDARY 8
83 #define EMPTY_FIELD_BOUNDARY 8
85 /* No data type wants to be aligned rounder than this. */
86 #define BIGGEST_ALIGNMENT 8
89 #define STRICT_ALIGNMENT 0
91 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
92 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
93 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
94 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
95 #define FLOAT_TYPE_SIZE 32
96 #define DOUBLE_TYPE_SIZE 32
97 #define LONG_DOUBLE_TYPE_SIZE 32
99 #define DEFAULT_SIGNED_CHAR 1
101 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
102 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
104 #define WCHAR_TYPE_SIZE 16
106 #define FIRST_PSEUDO_REGISTER 36
108 #define FIXED_REGISTERS {\
109 1,1,/* r0 r1 */\
110 0,0,/* r2 r3 */\
111 0,0,/* r4 r5 */\
112 0,0,/* r6 r7 */\
113 0,0,/* r8 r9 */\
114 0,0,/* r10 r11 */\
115 0,0,/* r12 r13 */\
116 0,0,/* r14 r15 */\
117 0,0,/* r16 r17 */\
118 0,0,/* r18 r19 */\
119 0,0,/* r20 r21 */\
120 0,0,/* r22 r23 */\
121 0,0,/* r24 r25 */\
122 0,0,/* r26 r27 */\
123 0,0,/* r28 r29 */\
124 0,0,/* r30 r31 */\
125 1,1,/* STACK */\
126 1,1 /* arg pointer */ }
128 #define CALL_USED_REGISTERS { \
129 1,1,/* r0 r1 */ \
130 0,0,/* r2 r3 */ \
131 0,0,/* r4 r5 */ \
132 0,0,/* r6 r7 */ \
133 0,0,/* r8 r9 */ \
134 0,0,/* r10 r11 */ \
135 0,0,/* r12 r13 */ \
136 0,0,/* r14 r15 */ \
137 0,0,/* r16 r17 */ \
138 1,1,/* r18 r19 */ \
139 1,1,/* r20 r21 */ \
140 1,1,/* r22 r23 */ \
141 1,1,/* r24 r25 */ \
142 1,1,/* r26 r27 */ \
143 0,0,/* r28 r29 */ \
144 1,1,/* r30 r31 */ \
145 1,1,/* STACK */ \
146 1,1 /* arg pointer */ }
148 #define REG_ALLOC_ORDER { \
149 24,25, \
150 18,19, \
151 20,21, \
152 22,23, \
153 30,31, \
154 26,27, \
155 28,29, \
156 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
157 0,1, \
158 32,33,34,35 \
161 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
164 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
166 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
168 #define MODES_TIEABLE_P(MODE1, MODE2) 1
170 enum reg_class {
171 NO_REGS,
172 R0_REG, /* r0 */
173 POINTER_X_REGS, /* r26 - r27 */
174 POINTER_Y_REGS, /* r28 - r29 */
175 POINTER_Z_REGS, /* r30 - r31 */
176 STACK_REG, /* STACK */
177 BASE_POINTER_REGS, /* r28 - r31 */
178 POINTER_REGS, /* r26 - r31 */
179 ADDW_REGS, /* r24 - r31 */
180 SIMPLE_LD_REGS, /* r16 - r23 */
181 LD_REGS, /* r16 - r31 */
182 NO_LD_REGS, /* r0 - r15 */
183 GENERAL_REGS, /* r0 - r31 */
184 ALL_REGS, LIM_REG_CLASSES
188 #define N_REG_CLASSES (int)LIM_REG_CLASSES
190 #define REG_CLASS_NAMES { \
191 "NO_REGS", \
192 "R0_REG", /* r0 */ \
193 "POINTER_X_REGS", /* r26 - r27 */ \
194 "POINTER_Y_REGS", /* r28 - r29 */ \
195 "POINTER_Z_REGS", /* r30 - r31 */ \
196 "STACK_REG", /* STACK */ \
197 "BASE_POINTER_REGS", /* r28 - r31 */ \
198 "POINTER_REGS", /* r26 - r31 */ \
199 "ADDW_REGS", /* r24 - r31 */ \
200 "SIMPLE_LD_REGS", /* r16 - r23 */ \
201 "LD_REGS", /* r16 - r31 */ \
202 "NO_LD_REGS", /* r0 - r15 */ \
203 "GENERAL_REGS", /* r0 - r31 */ \
204 "ALL_REGS" }
206 #define REG_X 26
207 #define REG_Y 28
208 #define REG_Z 30
209 #define REG_W 24
211 #define REG_CLASS_CONTENTS { \
212 {0x00000000,0x00000000}, /* NO_REGS */ \
213 {0x00000001,0x00000000}, /* R0_REG */ \
214 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
215 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
216 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
217 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
218 {(3 << REG_Y) | (3 << REG_Z), \
219 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
220 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
221 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
222 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
223 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
224 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
225 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
226 0x00000000}, /* LD_REGS, r16 - r31 */ \
227 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
228 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
229 {0xffffffff,0x00000003} /* ALL_REGS */ \
232 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
234 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
236 #define INDEX_REG_CLASS NO_REGS
238 #define REG_CLASS_FROM_LETTER(C) avr_reg_class_from_letter(C)
240 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \
241 && ((r) == REG_X \
242 || (r) == REG_Y \
243 || (r) == REG_Z \
244 || (r) == ARG_POINTER_REGNUM)) \
245 || (reg_renumber \
246 && (reg_renumber[r] == REG_X \
247 || reg_renumber[r] == REG_Y \
248 || reg_renumber[r] == REG_Z \
249 || (reg_renumber[r] \
250 == ARG_POINTER_REGNUM))))
252 #define REGNO_OK_FOR_INDEX_P(NUM) 0
254 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)
256 #define SMALL_REGISTER_CLASSES 1
258 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)
260 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE)
262 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
263 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 63 : \
264 (C) == 'J' ? (VALUE) <= 0 && (VALUE) >= -63: \
265 (C) == 'K' ? (VALUE) == 2 : \
266 (C) == 'L' ? (VALUE) == 0 : \
267 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 0xff : \
268 (C) == 'N' ? (VALUE) == -1: \
269 (C) == 'O' ? (VALUE) == 8 || (VALUE) == 16 || (VALUE) == 24: \
270 (C) == 'P' ? (VALUE) == 1 : \
273 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
274 ((C) == 'G' ? (VALUE) == CONST0_RTX (SFmode) \
275 : 0)
277 #define EXTRA_CONSTRAINT(x, c) extra_constraint(x, c)
279 #define STACK_PUSH_CODE POST_DEC
281 #define STACK_GROWS_DOWNWARD
283 #define STARTING_FRAME_OFFSET 1
285 #define STACK_POINTER_OFFSET 1
287 #define FIRST_PARM_OFFSET(FUNDECL) 0
289 #define STACK_BOUNDARY 8
291 #define STACK_POINTER_REGNUM 32
293 #define FRAME_POINTER_REGNUM REG_Y
295 #define ARG_POINTER_REGNUM 34
297 #define STATIC_CHAIN_REGNUM 2
299 #define FRAME_POINTER_REQUIRED frame_pointer_required_p()
301 #define ELIMINABLE_REGS { \
302 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
303 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
304 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
306 #define CAN_ELIMINATE(FROM, TO) (((FROM) == ARG_POINTER_REGNUM \
307 && (TO) == FRAME_POINTER_REGNUM) \
308 || (((FROM) == FRAME_POINTER_REGNUM \
309 || (FROM) == FRAME_POINTER_REGNUM+1) \
310 && ! FRAME_POINTER_REQUIRED \
313 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
314 OFFSET = initial_elimination_offset (FROM, TO)
316 #define RETURN_ADDR_RTX(count, x) \
317 gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (tem, 1)))
319 #define PUSH_ROUNDING(NPUSHED) (NPUSHED)
321 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
323 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))
325 typedef struct avr_args {
326 int nregs; /* # registers available for passing */
327 int regno; /* next available register number */
328 } CUMULATIVE_ARGS;
330 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
331 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
333 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
334 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
336 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
338 extern int avr_reg_order[];
340 #define RET_REGISTER avr_ret_register ()
342 #define FUNCTION_VALUE(VALTYPE, FUNC) avr_function_value (VALTYPE, FUNC)
344 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE)
346 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
348 #define DEFAULT_PCC_STRUCT_RETURN 0
350 #define EPILOGUE_USES(REGNO) 0
352 #define HAVE_POST_INCREMENT 1
353 #define HAVE_PRE_DECREMENT 1
355 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
357 #define MAX_REGS_PER_ADDRESS 1
359 #ifdef REG_OK_STRICT
360 # define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
362 if (legitimate_address_p (mode, operand, 1)) \
363 goto ADDR; \
365 # else
366 # define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
368 if (legitimate_address_p (mode, operand, 0)) \
369 goto ADDR; \
371 #endif
373 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
374 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
376 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
378 #ifdef REG_OK_STRICT
379 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
380 #else
381 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
382 #endif
384 #define REG_OK_FOR_INDEX_P(X) 0
386 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
388 (X) = legitimize_address (X, OLDX, MODE); \
389 if (memory_address_p (MODE, X)) \
390 goto WIN; \
393 #define XEXP_(X,Y) (X)
394 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
395 do { \
396 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \
398 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \
399 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \
400 OPNUM, RELOAD_OTHER); \
401 goto WIN; \
403 if (GET_CODE (X) == PLUS \
404 && REG_P (XEXP (X, 0)) \
405 && GET_CODE (XEXP (X, 1)) == CONST_INT \
406 && INTVAL (XEXP (X, 1)) >= 1) \
408 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \
409 if (fit) \
411 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \
413 int regno = REGNO (XEXP (X, 0)); \
414 rtx mem = make_memloc (X, regno); \
415 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \
416 POINTER_REGS, Pmode, VOIDmode, 0, 0, \
417 1, ADDR_TYPE (TYPE)); \
418 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \
419 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
420 OPNUM, TYPE); \
421 goto WIN; \
423 push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \
424 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
425 OPNUM, TYPE); \
426 goto WIN; \
428 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
430 push_reload (X, NULL_RTX, &X, NULL, \
431 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
432 OPNUM, TYPE); \
433 goto WIN; \
436 } while(0)
438 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
439 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
440 goto LABEL
442 #define LEGITIMATE_CONSTANT_P(X) 1
444 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \
445 : (TO) == STACK_REG ? 12 \
446 : 2)
448 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 : \
449 (MODE)==HImode ? 4 : \
450 (MODE)==SImode ? 8 : \
451 (MODE)==SFmode ? 8 : 16)
453 #define BRANCH_COST 0
455 #define SLOW_BYTE_ACCESS 0
457 #define NO_FUNCTION_CSE
459 #define TEXT_SECTION_ASM_OP "\t.text"
461 #define DATA_SECTION_ASM_OP "\t.data"
463 #define BSS_SECTION_ASM_OP "\t.section .bss"
465 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
466 There are no shared libraries on this target, and these sections are
467 placed in the read-only program memory, so they are not writable. */
469 #undef CTORS_SECTION_ASM_OP
470 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
472 #undef DTORS_SECTION_ASM_OP
473 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
475 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
477 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
479 #define EXTRA_SECTIONS in_progmem
481 #define EXTRA_SECTION_FUNCTIONS \
483 void \
484 progmem_section (void) \
486 if (in_section != in_progmem) \
488 fprintf (asm_out_file, \
489 "\t.section .progmem.gcc_sw_table, \"%s\", @progbits\n", \
490 AVR_MEGA ? "a" : "ax"); \
491 /* Should already be aligned, this is just to be safe if it isn't. */ \
492 fprintf (asm_out_file, "\t.p2align 1\n"); \
493 in_section = in_progmem; \
497 #define READONLY_DATA_SECTION data_section
499 #define JUMP_TABLES_IN_TEXT_SECTION 0
501 #define ASM_COMMENT_START " ; "
503 #define ASM_APP_ON "/* #APP */\n"
505 #define ASM_APP_OFF "/* #NOAPP */\n"
507 /* Switch into a generic section. */
508 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
510 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
512 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '\n' \
513 || ((C) == '$'))
515 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
516 do { \
517 fputs ("\t.comm ", (STREAM)); \
518 assemble_name ((STREAM), (NAME)); \
519 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
520 } while (0)
522 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
523 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
525 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
526 do { \
527 fputs ("\t.lcomm ", (STREAM)); \
528 assemble_name ((STREAM), (NAME)); \
529 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
530 } while (0)
532 #undef TYPE_ASM_OP
533 #undef SIZE_ASM_OP
534 #undef WEAK_ASM_OP
535 #define TYPE_ASM_OP "\t.type\t"
536 #define SIZE_ASM_OP "\t.size\t"
537 #define WEAK_ASM_OP "\t.weak\t"
538 /* Define the strings used for the special svr4 .type and .size directives.
539 These strings generally do not vary from one system running svr4 to
540 another, but if a given system (e.g. m88k running svr) needs to use
541 different pseudo-op names for these, they may be overridden in the
542 file which includes this one. */
545 #undef TYPE_OPERAND_FMT
546 #define TYPE_OPERAND_FMT "@%s"
547 /* The following macro defines the format used to output the second
548 operand of the .type assembler directive. Different svr4 assemblers
549 expect various different forms for this operand. The one given here
550 is just a default. You may need to override it in your machine-
551 specific tm.h file (depending upon the particulars of your assembler). */
553 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
554 do { \
555 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
556 ASM_OUTPUT_LABEL (FILE, NAME); \
557 } while (0)
559 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
560 do { \
561 if (!flag_inhibit_size_directive) \
562 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
563 } while (0)
565 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
566 do { \
567 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
568 size_directive_output = 0; \
569 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
571 size_directive_output = 1; \
572 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \
573 int_size_in_bytes (TREE_TYPE (DECL))); \
575 ASM_OUTPUT_LABEL(FILE, NAME); \
576 } while (0)
578 #undef ASM_FINISH_DECLARE_OBJECT
579 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
580 do { \
581 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
582 HOST_WIDE_INT size; \
583 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
584 && ! AT_END && TOP_LEVEL \
585 && DECL_INITIAL (DECL) == error_mark_node \
586 && !size_directive_output) \
588 size_directive_output = 1; \
589 size = int_size_in_bytes (TREE_TYPE (DECL)); \
590 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
592 } while (0)
595 #define ESCAPES \
596 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
597 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
598 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
599 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
600 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
601 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
602 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
603 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
604 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
605 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
606 corresponds to a particular byte value [0..255]. For any
607 given byte value, if the value in the corresponding table
608 position is zero, the given character can be output directly.
609 If the table value is 1, the byte must be output as a \ooo
610 octal escape. If the tables value is anything else, then the
611 byte value should be output as a \ followed by the value
612 in the table. Note that we can use standard UN*X escape
613 sequences for many control characters, but we don't use
614 \a to represent BEL because some svr4 assemblers (e.g. on
615 the i386) don't know about that. Also, we don't use \v
616 since some versions of gas, such as 2.2 did not accept it. */
618 #define STRING_LIMIT ((unsigned) 64)
619 #define STRING_ASM_OP "\t.string\t"
620 /* Some svr4 assemblers have a limit on the number of characters which
621 can appear in the operand of a .string directive. If your assembler
622 has such a limitation, you should define STRING_LIMIT to reflect that
623 limit. Note that at least some svr4 assemblers have a limit on the
624 actual number of bytes in the double-quoted string, and that they
625 count each character in an escape sequence as one byte. Thus, an
626 escape sequence like \377 would count as four bytes.
628 If your target assembler doesn't support the .string directive, you
629 should define this to zero. */
631 /* Globalizing directive for a label. */
632 #define GLOBAL_ASM_OP ".global\t"
634 #define ASM_WEAKEN_LABEL(FILE, NAME) \
635 do \
637 fputs ("\t.weak\t", (FILE)); \
638 assemble_name ((FILE), (NAME)); \
639 fputc ('\n', (FILE)); \
641 while (0)
643 #define SUPPORTS_WEAK 1
645 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
646 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
648 #define HAS_INIT_SECTION 1
650 #define REGISTER_NAMES { \
651 "r0","r1","r2","r3","r4","r5","r6","r7", \
652 "r8","r9","r10","r11","r12","r13","r14","r15", \
653 "r16","r17","r18","r19","r20","r21","r22","r23", \
654 "r24","r25","r26","r27","r28","r29","r30","r31", \
655 "__SPL__","__SPH__","argL","argH"}
657 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
659 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
661 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~')
663 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
665 #define USER_LABEL_PREFIX ""
667 #define ASSEMBLER_DIALECT AVR_ENHANCED
669 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
671 gcc_assert (REGNO < 32); \
672 fprintf (STREAM, "\tpush\tr%d", REGNO); \
675 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
677 gcc_assert (REGNO < 32); \
678 fprintf (STREAM, "\tpop\tr%d", REGNO); \
681 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
682 avr_output_addr_vec_elt(STREAM, VALUE)
684 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
685 progmem_section (), (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM)
687 #define ASM_OUTPUT_SKIP(STREAM, N) \
688 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
690 #define ASM_OUTPUT_ALIGN(STREAM, POWER)
692 #define CASE_VECTOR_MODE HImode
694 extern int avr_case_values_threshold;
696 #define CASE_VALUES_THRESHOLD avr_case_values_threshold
698 #undef WORD_REGISTER_OPERATIONS
700 #define MOVE_MAX 4
702 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
704 #define Pmode HImode
706 #define FUNCTION_MODE HImode
708 #define DOLLARS_IN_IDENTIFIERS 0
710 #define NO_DOLLAR_IN_LABEL 1
712 #define TRAMPOLINE_TEMPLATE(FILE) \
713 internal_error ("trampolines not supported")
715 #define TRAMPOLINE_SIZE 4
717 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
719 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT); \
720 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
722 /* Store in cc_status the expressions
723 that the condition codes will describe
724 after execution of an instruction whose pattern is EXP.
725 Do not alter them if the instruction would not alter the cc's. */
727 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
729 /* The add insns don't set overflow in a usable way. */
730 #define CC_OVERFLOW_UNUSABLE 01000
731 /* The mov,and,or,xor insns don't set carry. That's ok though as the
732 Z bit is all we need when doing unsigned comparisons on the result of
733 these insns (since they're always with 0). However, conditions.h has
734 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
735 understandable. */
736 #define CC_NO_CARRY CC_NO_OVERFLOW
739 /* Output assembler code to FILE to increment profiler label # LABELNO
740 for profiling a function entry. */
742 #define FUNCTION_PROFILER(FILE, LABELNO) \
743 fprintf (FILE, "/* profiler %d */", (LABELNO))
745 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
746 adjust_insn_length (INSN, LENGTH))
748 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
750 #define CC1_SPEC "%{profile:-p}"
752 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
753 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
754 %{!fexceptions:-fno-exceptions}"
755 /* A C string constant that tells the GCC drvier program options to
756 pass to `cc1plus'. */
758 #define ASM_SPEC "%{mmcu=*:-mmcu=%*}"
760 #define LINK_SPEC " %{!mmcu*:-m avr2}\
761 %{mmcu=at90s1200|mmcu=attiny11|mmcu=attiny12|mmcu=attiny15|mmcu=attiny28:-m avr1} \
762 %{mmcu=attiny22|mmcu=attiny26|mmcu=at90s2*|mmcu=at90s4*|mmcu=at90s8*|mmcu=at90c8*|mmcu=at86rf401|mmcu=attiny13|mmcu=attiny2313:-m avr2}\
763 %{mmcu=atmega103|mmcu=atmega603|mmcu=at43*|mmcu=at76*:-m avr3}\
764 %{mmcu=atmega8*|mmcu=atmega48:-m avr4}\
765 %{mmcu=atmega16*|mmcu=atmega32*|mmcu=atmega64*|mmcu=atmega128|mmcu=at90can128|mmcu=at94k:-m avr5}\
766 %{mmcu=atmega325|mmcu=atmega3250|mmcu=atmega48|mmcu=atmega88|mmcu=atmega64|mmcu=atmega645|mmcu=atmega6450|mmcu=atmega128|mmcu=at90can128|mmcu=at90can128|mmcu=atmega162|mmcu=atmega165|mmcu=atmega168|mmcu=atmega169: -Tdata 0x800100} "
768 #define LIB_SPEC \
769 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
771 #define LIBSTDCXX "-lgcc"
772 /* No libstdc++ for now. Empty string doesn't work. */
774 #define LIBGCC_SPEC \
775 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
777 #define STARTFILE_SPEC "%(crt_binutils)"
779 #define ENDFILE_SPEC ""
781 #define CRT_BINUTILS_SPECS "\
782 %{mmcu=at90s1200|mmcu=avr1:crts1200.o%s} \
783 %{mmcu=attiny11:crttn11.o%s} \
784 %{mmcu=attiny12:crttn12.o%s} \
785 %{mmcu=attiny15:crttn15.o%s} \
786 %{mmcu=attiny28:crttn28.o%s} \
787 %{!mmcu*|mmcu=at90s8515|mmcu=avr2:crts8515.o%s} \
788 %{mmcu=at90s2313:crts2313.o%s} \
789 %{mmcu=at90s2323:crts2323.o%s} \
790 %{mmcu=at90s2333:crts2333.o%s} \
791 %{mmcu=at90s2343:crts2343.o%s} \
792 %{mmcu=attiny22:crttn22.o%s} \
793 %{mmcu=attiny26:crttn26.o%s} \
794 %{mmcu=at90s4433:crts4433.o%s} \
795 %{mmcu=at90s4414:crts4414.o%s} \
796 %{mmcu=at90s4434:crts4434.o%s} \
797 %{mmcu=at90c8534:crtc8534.o%s} \
798 %{mmcu=at90s8535:crts8535.o%s} \
799 %{mmcu=at86rf401:crt86401.o%s} \
800 %{mmcu=attiny13:crttn13.o%s} \
801 %{mmcu=attiny2313:crttn2313.o%s} \
802 %{mmcu=atmega103|mmcu=avr3:crtm103.o%s} \
803 %{mmcu=atmega603:crtm603.o%s} \
804 %{mmcu=at43usb320:crt43320.o%s} \
805 %{mmcu=at43usb355:crt43355.o%s} \
806 %{mmcu=at76c711:crt76711.o%s} \
807 %{mmcu=atmega8|mmcu=avr4:crtm8.o%s} \
808 %{mmcu=atmega48:crtm48.o%s} \
809 %{mmcu=atmega88:crtm88.o%s} \
810 %{mmcu=atmega8515:crtm8515.o%s} \
811 %{mmcu=atmega8535:crtm8535.o%s} \
812 %{mmcu=atmega16:crtm16.o%s} \
813 %{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
814 %{mmcu=atmega162:crtm162.o%s} \
815 %{mmcu=atmega163:crtm163.o%s} \
816 %{mmcu=atmega165:crtm165.o%s} \
817 %{mmcu=atmega168:crtm168.o%s} \
818 %{mmcu=atmega169:crtm169.o%s} \
819 %{mmcu=atmega32:crtm32.o%s} \
820 %{mmcu=atmega323:crtm323.o%s} \
821 %{mmcu=atmega325:crtm325.o%s} \
822 %{mmcu=atmega3250:crtm3250.o%s} \
823 %{mmcu=atmega64:crtm64.o%s} \
824 %{mmcu=atmega645:crtm6450.o%s} \
825 %{mmcu=atmega6450:crtm6450.o%s} \
826 %{mmcu=atmega128:crtm128.o%s} \
827 %{mmcu=at90can128:crtcan128.o%s} \
828 %{mmcu=at94k:crtat94k.o%s}"
830 #define EXTRA_SPECS {"crt_binutils", CRT_BINUTILS_SPECS},
832 /* This is the default without any -mmcu=* option (AT90S*). */
833 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
835 /* This is undefined macro for collect2 disabling */
836 #define LINKER_NAME "ld"
838 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
839 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
841 /* Note that the other files fail to use these
842 in some of the places where they should. */
844 #if defined(__STDC__) || defined(ALMOST_STDC)
845 #define AS2(a,b,c) #a " " #b "," #c
846 #define AS2C(b,c) " " #b "," #c
847 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
848 #define AS1(a,b) #a " " #b
849 #else
850 #define AS1(a,b) "a b"
851 #define AS2(a,b,c) "a b,c"
852 #define AS2C(b,c) " b,c"
853 #define AS3(a,b,c,d) "a b,c,d"
854 #endif
855 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
856 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
857 #define CR_TAB "\n\t"
859 /* Temporary register r0 */
860 #define TMP_REGNO 0
862 /* zero register r1 */
863 #define ZERO_REGNO 1
865 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG