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2014-12-19 Andrew MacLeod <amacleod@redhat.com>
[official-gcc.git] / gcc / config / rx / rx.h
blob57a24e6dd209160f0b1de044f8c0c0ab4e842c80
1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008-2014 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 { \
29 builtin_define ("__RX610__"); \
30 builtin_assert ("machine=RX610"); \
31 } \
32 else if (rx_cpu_type == RX100) \
33 { \
34 builtin_define ("__RX100__"); \
35 builtin_assert ("machine=RX100"); \
36 } \
37 else if (rx_cpu_type == RX200) \
38 { \
39 builtin_define ("__RX200__"); \
40 builtin_assert ("machine=RX200"); \
41 } \
42 else if (rx_cpu_type == RX600) \
43 { \
44 builtin_define ("__RX600__"); \
45 builtin_assert ("machine=RX600"); \
46 } \
47 \
48 if (TARGET_BIG_ENDIAN_DATA) \
49 builtin_define ("__RX_BIG_ENDIAN__"); \
50 else \
51 builtin_define ("__RX_LITTLE_ENDIAN__");\
52 \
53 if (TARGET_64BIT_DOUBLES) \
54 builtin_define ("__RX_64BIT_DOUBLES__");\
55 else \
56 builtin_define ("__RX_32BIT_DOUBLES__");\
57 \
58 if (ALLOW_RX_FPU_INSNS) \
59 builtin_define ("__RX_FPU_INSNS__"); \
60 \
61 if (TARGET_AS100_SYNTAX) \
62 builtin_define ("__RX_AS100_SYNTAX__"); \
63 else \
64 builtin_define ("__RX_GAS_SYNTAX__"); \
65 \
66 if (TARGET_GCC_ABI) \
67 builtin_define ("__RX_GCC_ABI__"); \
68 else \
69 builtin_define ("__RX_ABI__"); \
70 } \
71 while (0)
72
73 #undef CC1_SPEC
74 #define CC1_SPEC "\
75 %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
76 %{mcpu=rx100:%{fpu:%erx100 cpu does not have FPU hardware}} \
77 %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
78
79 #undef STARTFILE_SPEC
80 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
81
82 #undef ENDFILE_SPEC
83 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
84
85 #undef CPP_SPEC
86 #define CPP_SPEC "\
87 %{mpid:-D_RX_PID=1} \
88 %{mint-register=*:-D_RX_INT_REGISTERS=%*} \
89 %{msmall-data-limit*:-D_RX_SMALL_DATA} \
90 "
91
92 #undef ASM_SPEC
93 #define ASM_SPEC "\
94 %{mbig-endian-data:-mbig-endian-data} \
95 %{m64bit-doubles:-m64bit-doubles} \
96 %{!m64bit-doubles:-m32bit-doubles} \
97 %{msmall-data-limit*:-msmall-data-limit} \
98 %{mrelax:-relax} \
99 %{mpid} \
100 %{mint-register=*} \
101 %{mgcc-abi:-mgcc-abi} %{!mgcc-abi:-mrx-abi} \
102 %{mcpu=*} \
103 "
104
105 #undef LIB_SPEC
106 #define LIB_SPEC " \
107 --start-group \
108 -lc \
109 %{msim:-lsim}%{!msim:-lnosys} \
110 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
111 --end-group \
112 %{!T*: %{msim:%Trx-sim.ld}%{!msim:%Trx.ld}} \
113 "
114
115 #undef LINK_SPEC
116 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
117 \f
118
119 #define BITS_BIG_ENDIAN 0
120 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
121 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
122
123 #define UNITS_PER_WORD 4
124
125 #define INT_TYPE_SIZE 32
126 #define LONG_TYPE_SIZE 32
127 #define LONG_LONG_TYPE_SIZE 64
128
129 #define FLOAT_TYPE_SIZE 32
130 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
131 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
132
133 #define DEFAULT_SIGNED_CHAR 0
134
135 /* RX load/store instructions can handle unaligned addresses. */
136 #define STRICT_ALIGNMENT 0
137 #define FUNCTION_BOUNDARY ((rx_cpu_type == RX100 || rx_cpu_type == RX200) ? 4 : 8)
138 #define BIGGEST_ALIGNMENT 32
139 #define STACK_BOUNDARY 32
140 #define PARM_BOUNDARY 8
141
142 #define STACK_GROWS_DOWNWARD 1
143 #define FRAME_GROWS_DOWNWARD 0
144 #define FIRST_PARM_OFFSET(FNDECL) 0
145
146 #define MAX_REGS_PER_ADDRESS 2
147
148 #define Pmode SImode
149 #define POINTER_SIZE 32
150 #undef SIZE_TYPE
151 #define SIZE_TYPE "long unsigned int"
152 #undef PTRDIFF_TYPE
153 #define PTRDIFF_TYPE "long int"
154 #undef WCHAR_TYPE
155 #define WCHAR_TYPE "long int"
156 #undef WCHAR_TYPE_SIZE
157 #define WCHAR_TYPE_SIZE BITS_PER_WORD
158 #define POINTERS_EXTEND_UNSIGNED 1
159 #define FUNCTION_MODE QImode
160 #define CASE_VECTOR_MODE Pmode
161 #define WORD_REGISTER_OPERATIONS 1
162 #define HAS_LONG_COND_BRANCH 0
163 #define HAS_LONG_UNCOND_BRANCH 0
164
165 #define MOVE_MAX 4
166 #define STARTING_FRAME_OFFSET 0
167
168 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
169
170 #define HAVE_PRE_DECREMENT 1
171 #define HAVE_POST_INCREMENT 1
172
173 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
174 #define SLOW_BYTE_ACCESS 1
175
176 #define STORE_FLAG_VALUE 1
177 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
178 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
179 \f
180 enum reg_class
181 {
182 NO_REGS, /* No registers in set. */
183 GR_REGS, /* Integer registers. */
184 ALL_REGS, /* All registers. */
185 LIM_REG_CLASSES /* Max value + 1. */
186 };
187
188 #define REG_CLASS_NAMES \
189 { \
190 "NO_REGS", \
191 "GR_REGS", \
192 "ALL_REGS" \
193 }
194
195 #define REG_CLASS_CONTENTS \
196 { \
197 { 0x00000000 }, /* No registers, */ \
198 { 0x0000ffff }, /* Integer registers. */ \
199 { 0x0000ffff } /* All registers. */ \
200 }
201
202 #define N_REG_CLASSES (int) LIM_REG_CLASSES
203 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
204 + UNITS_PER_WORD - 1) \
205 / UNITS_PER_WORD)
206
207 #define GENERAL_REGS GR_REGS
208 #define BASE_REG_CLASS GR_REGS
209 #define INDEX_REG_CLASS GR_REGS
210
211 #define FIRST_PSEUDO_REGISTER 17
212
213 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
214 ? GR_REGS : NO_REGS)
215
216 #define STACK_POINTER_REGNUM 0
217 #define FUNC_RETURN_REGNUM 1
218 #define FRAME_POINTER_REGNUM 6
219 #define ARG_POINTER_REGNUM 7
220 #define STATIC_CHAIN_REGNUM 8
221 #define TRAMPOLINE_TEMP_REGNUM 9
222 #define STRUCT_VAL_REGNUM 15
223 #define CC_REGNUM 16
224
225 /* This is the register which will probably be used to hold the address of
226 the start of the small data area, if -msmall-data-limit is being used,
227 or the address of the constant data area if -mpid is being used. If both
228 features are in use then two consecutive registers will be used.
229
230 Note - these registers must not be call_used because otherwise library
231 functions that are compiled without -msmall-data-limit/-mpid support
232 might clobber them.
233
234 Note that the actual values used depends on other options; use
235 rx_gp_base_regnum() and rx_pid_base_regnum() instead. */
236 #define GP_BASE_REGNUM 13
237
238 #define ELIMINABLE_REGS \
239 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
240 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
241 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
242
243 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
244 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
245
246
247 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
248 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
249 #define DEFAULT_PCC_STRUCT_RETURN 0
250
251 #define FIXED_REGISTERS \
252 { \
253 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \
254 }
255
256 #define CALL_USED_REGISTERS \
257 { \
258 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
259 }
260
261 #define LIBCALL_VALUE(MODE) \
262 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
263 || COMPLEX_MODE_P (MODE) \
264 || GET_MODE_SIZE (MODE) >= 4) \
265 ? (MODE) \
266 : SImode), \
267 FUNC_RETURN_REGNUM)
268
269 /* Order of allocation of registers. */
270
271 #define REG_ALLOC_ORDER \
272 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
273 }
274
275 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
276 (IN_RANGE ((REGNO), (MIN), (MAX)) \
277 || (reg_renumber != NULL \
278 && reg_renumber[(REGNO)] >= (MIN) \
279 && reg_renumber[(REGNO)] <= (MAX)))
280
281 #ifdef REG_OK_STRICT
282 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
283 #else
284 #define REGNO_OK_FOR_BASE_P(regno) 1
285 #endif
286
287 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
288
289 #define RTX_OK_FOR_BASE(X, STRICT) \
290 ((STRICT) ? \
291 ( (REG_P (X) \
292 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
293 || (GET_CODE (X) == SUBREG \
294 && REG_P (SUBREG_REG (X)) \
295 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
296 : \
297 ( (REG_P (X) \
298 || (GET_CODE (X) == SUBREG \
299 && REG_P (SUBREG_REG (X))))))
300 \f
301
302 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
303 ((COUNT) == 0 \
304 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
305 : NULL_RTX)
306
307 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
308
309 #define ACCUMULATE_OUTGOING_ARGS 1
310
311 typedef unsigned int CUMULATIVE_ARGS;
312
313 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
314 (CUM) = 0
315
316 \f
317 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
318 #define TRAMPOLINE_ALIGNMENT 32
319 \f
320 #define NO_PROFILE_COUNTERS 1
321 #define PROFILE_BEFORE_PROLOGUE 1
322
323 #define FUNCTION_PROFILER(FILE, LABELNO) \
324 fprintf (FILE, "\tbsr\t__mcount\n");
325 \f
326
327 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
328
329 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
330 (REGNO_REG_CLASS (REGNO) == GR_REGS)
331
332 #define MODES_TIEABLE_P(MODE1, MODE2) \
333 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
334 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
335 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
336 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
337 \f
338
339 #define REGISTER_NAMES \
340 { \
341 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
342 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \
343 }
344
345 #define ADDITIONAL_REGISTER_NAMES \
346 { \
347 { "sp", STACK_POINTER_REGNUM } \
348 , { "fp", FRAME_POINTER_REGNUM } \
349 , { "arg", ARG_POINTER_REGNUM } \
350 , { "chain", STATIC_CHAIN_REGNUM } \
351 }
352
353 #define DATA_SECTION_ASM_OP \
354 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
355 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
356
357 #define SDATA_SECTION_ASM_OP \
358 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
359 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
360
361 #undef READONLY_DATA_SECTION_ASM_OP
362 #define READONLY_DATA_SECTION_ASM_OP \
363 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
364 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
365
366 #define BSS_SECTION_ASM_OP \
367 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
368 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
369
370 #define SBSS_SECTION_ASM_OP \
371 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
372 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
373
374 /* The following definitions are conditional depending upon whether the
375 compiler is being built or crtstuff.c is being compiled by the built
376 compiler. */
377 #if defined CRT_BEGIN || defined CRT_END
378 # ifdef __RX_AS100_SYNTAX
379 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
380 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
381 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
382 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
383 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
384 # else
385 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
386 # define CTORS_SECTION_ASM_OP \
387 "\t.section\t.init_array,\"awx\",@init_array"
388 # define DTORS_SECTION_ASM_OP \
389 "\t.section\t.fini_array,\"awx\",@fini_array"
390 # define INIT_ARRAY_SECTION_ASM_OP \
391 "\t.section\t.init_array,\"awx\",@init_array"
392 # define FINI_ARRAY_SECTION_ASM_OP \
393 "\t.section\t.fini_array,\"awx\",@fini_array"
394 # endif
395 #else
396 # define TEXT_SECTION_ASM_OP \
397 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
398
399 # define CTORS_SECTION_ASM_OP \
400 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
401 : "\t.section\t.init_array,\"awx\",@init_array")
402
403 # define DTORS_SECTION_ASM_OP \
404 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
405 : "\t.section\t.fini_array,\"awx\",@fini_array")
406
407 # define INIT_ARRAY_SECTION_ASM_OP \
408 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
409 : "\t.section\t.init_array,\"awx\",@init_array")
410
411 # define FINI_ARRAY_SECTION_ASM_OP \
412 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
413 : "\t.section\t.fini_array,\"awx\",@fini_array")
414 #endif
415
416 #define GLOBAL_ASM_OP \
417 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
418 #define ASM_COMMENT_START " ;"
419 #define ASM_APP_ON ""
420 #define ASM_APP_OFF ""
421 #define LOCAL_LABEL_PREFIX "L"
422 #undef USER_LABEL_PREFIX
423 #define USER_LABEL_PREFIX "_"
424
425 /* Compute the alignment needed for label X in various situations.
426 If the user has specified an alignment then honour that, otherwise
427 use rx_align_for_label. */
428 #define JUMP_ALIGN(x) (align_jumps > 1 ? align_jumps_log : rx_align_for_label (x, 0))
429 #define LABEL_ALIGN(x) (align_labels > 1 ? align_labels_log : rx_align_for_label (x, 3))
430 #define LOOP_ALIGN(x) (align_loops > 1 ? align_loops_log : rx_align_for_label (x, 2))
431 #define LABEL_ALIGN_AFTER_BARRIER(x) rx_align_for_label (x, 0)
432
433 #define ASM_OUTPUT_MAX_SKIP_ALIGN(STREAM, LOG, MAX_SKIP) \
434 do \
435 { \
436 if ((LOG) == 0 || (MAX_SKIP) == 0) \
437 break; \
438 if (TARGET_AS100_SYNTAX) \
439 { \
440 if ((LOG) >= 2) \
441 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
442 else \
443 fprintf (STREAM, "\t.ALIGN 2\n"); \
444 } \
445 else \
446 fprintf (STREAM, "\t.balign %d,3,%d\n", 1 << (LOG), (MAX_SKIP)); \
447 } \
448 while (0)
449
450 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
451 do \
452 { \
453 if ((LOG) == 0) \
454 break; \
455 if (TARGET_AS100_SYNTAX) \
456 { \
457 if ((LOG) >= 2) \
458 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
459 else \
460 fprintf (STREAM, "\t.ALIGN 2\n"); \
461 } \
462 else \
463 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
464 } \
465 while (0)
466
467 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
468 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
469 VALUE)
470
471 /* This is how to output an element of a case-vector that is relative.
472 Note: The local label referenced by the "1b" below is emitted by
473 the tablejump insn. */
474
475 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
476 fprintf (FILE, TARGET_AS100_SYNTAX \
477 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
478
479 #define CASE_VECTOR_PC_RELATIVE (TARGET_PID)
480
481 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
482 do \
483 { \
484 HOST_WIDE_INT size_ = (SIZE); \
485 \
486 /* The as100 assembler does not have an equivalent of the SVR4 \
487 .size pseudo-op. */ \
488 if (TARGET_AS100_SYNTAX) \
489 break; \
490 \
491 fputs (SIZE_ASM_OP, STREAM); \
492 assemble_name (STREAM, NAME); \
493 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
494 } \
495 while (0)
496
497 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
498 do \
499 { \
500 /* The as100 assembler does not have an equivalent of the SVR4 \
501 .size pseudo-op. */ \
502 if (TARGET_AS100_SYNTAX) \
503 break; \
504 fputs (SIZE_ASM_OP, STREAM); \
505 assemble_name (STREAM, NAME); \
506 fputs (", .-", STREAM); \
507 assemble_name (STREAM, NAME); \
508 putc ('\n', STREAM); \
509 } \
510 while (0)
511
512 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
513 do \
514 { \
515 /* The as100 assembler does not have an equivalent of the SVR4 \
516 .size pseudo-op. */ \
517 if (TARGET_AS100_SYNTAX) \
518 break; \
519 fputs (TYPE_ASM_OP, STREAM); \
520 assemble_name (STREAM, NAME); \
521 fputs (", ", STREAM); \
522 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
523 putc ('\n', STREAM); \
524 } \
525 while (0)
526
527 #undef ASM_GENERATE_INTERNAL_LABEL
528 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
529 do \
530 { \
531 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
532 PREFIX, (unsigned) (NUM)); \
533 } \
534 while (0)
535
536 #undef ASM_OUTPUT_EXTERNAL
537 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
538 do \
539 { \
540 if (TARGET_AS100_SYNTAX) \
541 targetm.asm_out.globalize_label (FILE, NAME); \
542 default_elf_asm_output_external (FILE, DECL, NAME); \
543 } \
544 while (0)
545
546 #undef ASM_OUTPUT_ALIGNED_COMMON
547 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
548 do \
549 { \
550 if (TARGET_AS100_SYNTAX) \
551 { \
552 fprintf ((FILE), "\t.GLB\t"); \
553 assemble_name ((FILE), (NAME)); \
554 fprintf ((FILE), "\n"); \
555 assemble_name ((FILE), (NAME)); \
556 switch ((ALIGN) / BITS_PER_UNIT) \
557 { \
558 case 4: \
559 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
560 (SIZE) / 4); \
561 break; \
562 case 2: \
563 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
564 (SIZE) / 2); \
565 break; \
566 default: \
567 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
568 (SIZE)); \
569 break; \
570 } \
571 } \
572 else \
573 { \
574 fprintf ((FILE), "%s", COMMON_ASM_OP); \
575 assemble_name ((FILE), (NAME)); \
576 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
577 (SIZE), (ALIGN) / BITS_PER_UNIT); \
578 } \
579 } \
580 while (0)
581
582 #undef SKIP_ASM_OP
583 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
584
585 #undef ASM_OUTPUT_LIMITED_STRING
586 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
587 do \
588 { \
589 const unsigned char *_limited_str = \
590 (const unsigned char *) (STR); \
591 unsigned ch; \
592 \
593 fprintf ((FILE), TARGET_AS100_SYNTAX \
594 ? "\t.BYTE\t\"" : "\t.string\t\""); \
595 \
596 for (; (ch = *_limited_str); _limited_str++) \
597 { \
598 int escape; \
599 \
600 switch (escape = ESCAPES[ch]) \
601 { \
602 case 0: \
603 putc (ch, (FILE)); \
604 break; \
605 case 1: \
606 fprintf ((FILE), "\\%03o", ch); \
607 break; \
608 default: \
609 putc ('\\', (FILE)); \
610 putc (escape, (FILE)); \
611 break; \
612 } \
613 } \
614 \
615 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
616 } \
617 while (0)
618
619 /* For PIC put jump tables into the text section so that the offsets that
620 they contain are always computed between two same-section symbols. */
621 #define JUMP_TABLES_IN_TEXT_SECTION (TARGET_PID || flag_pic)
622 \f
623 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
624 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
625
626 /* Like REG_P except that this macro is true for SET expressions. */
627 #define SET_P(rtl) (GET_CODE (rtl) == SET)
628 \f
629 /* The AS100 assembler does not support .leb128 and .uleb128, but
630 the compiler-build-time configure tests will have enabled their
631 use because GAS supports them. So default to generating STABS
632 debug information instead of DWARF2 when generating AS100
633 compatible output. */
634 #undef PREFERRED_DEBUGGING_TYPE
635 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
636 ? DBX_DEBUG : DWARF2_DEBUG)
637
638 #define INCOMING_FRAME_SP_OFFSET 4
639 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
640 \f
641 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
642
643 /* This macro is used to decide when RX FPU instructions can be used. */
644 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
645
646 #define BRANCH_COST(SPEED,PREDICT) 1
647 #define REGISTER_MOVE_COST(MODE,FROM,TO) 2
648
649 #define SELECT_CC_MODE(OP,X,Y) rx_select_cc_mode(OP, X, Y)
650
651 #define ADJUST_INSN_LENGTH(INSN,LENGTH) \
652 do \
653 { \
654 (LENGTH) = rx_adjust_insn_length ((INSN), (LENGTH)); \
655 } \
656 while (0)
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