PR preprocessor/63831
[official-gcc.git] / gcc / config / aarch64 / aarch64-cost-tables.h
blob5764245b3cfa24dba13f24b2b53823ea08fc252c
1 /* RTX cost tables for AArch64.
3 Copyright (C) 2014 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #ifndef GCC_AARCH64_COST_TABLES_H
22 #define GCC_AARCH64_COST_TABLES_H
24 #include "config/arm/aarch-cost-tables.h"
26 /* ThunderX does not have implement AArch32. */
27 const struct cpu_cost_table thunderx_extra_costs =
29 /* ALU */
31 0, /* Arith. */
32 0, /* Logical. */
33 0, /* Shift. */
34 0, /* Shift_reg. */
35 COSTS_N_INSNS (1), /* Arith_shift. */
36 COSTS_N_INSNS (1), /* Arith_shift_reg. */
37 COSTS_N_INSNS (1), /* UNUSED: Log_shift. */
38 COSTS_N_INSNS (1), /* UNUSED: Log_shift_reg. */
39 0, /* Extend. */
40 COSTS_N_INSNS (1), /* Extend_arith. */
41 0, /* Bfi. */
42 0, /* Bfx. */
43 COSTS_N_INSNS (5), /* Clz. */
44 0, /* rev. */
45 0, /* UNUSED: non_exec. */
46 false /* UNUSED: non_exec_costs_exec. */
49 /* MULT SImode */
51 COSTS_N_INSNS (3), /* Simple. */
52 0, /* Flag_setting. */
53 0, /* Extend. */
54 0, /* Add. */
55 COSTS_N_INSNS (1), /* Extend_add. */
56 COSTS_N_INSNS (21) /* Idiv. */
58 /* MULT DImode */
60 COSTS_N_INSNS (3), /* Simple. */
61 0, /* Flag_setting. */
62 0, /* Extend. */
63 0, /* Add. */
64 COSTS_N_INSNS (1), /* Extend_add. */
65 COSTS_N_INSNS (37) /* Idiv. */
68 /* LD/ST */
70 COSTS_N_INSNS (2), /* Load. */
71 COSTS_N_INSNS (2), /* Load_sign_extend. */
72 COSTS_N_INSNS (2), /* Ldrd. */
73 0, /* N/A: Ldm_1st. */
74 0, /* N/A: Ldm_regs_per_insn_1st. */
75 0, /* N/A: Ldm_regs_per_insn_subsequent. */
76 COSTS_N_INSNS (3), /* Loadf. */
77 COSTS_N_INSNS (3), /* Loadd. */
78 0, /* N/A: Load_unaligned. */
79 0, /* Store. */
80 0, /* Strd. */
81 0, /* N/A: Stm_1st. */
82 0, /* N/A: Stm_regs_per_insn_1st. */
83 0, /* N/A: Stm_regs_per_insn_subsequent. */
84 0, /* Storef. */
85 0, /* Stored. */
86 COSTS_N_INSNS (1) /* Store_unaligned. */
89 /* FP SFmode */
91 COSTS_N_INSNS (11), /* Div. */
92 COSTS_N_INSNS (5), /* Mult. */
93 COSTS_N_INSNS (5), /* Mult_addsub. */
94 COSTS_N_INSNS (5), /* Fma. */
95 COSTS_N_INSNS (3), /* Addsub. */
96 0, /* Fpconst. */
97 COSTS_N_INSNS (1), /* Neg. */
98 0, /* Compare. */
99 COSTS_N_INSNS (5), /* Widen. */
100 COSTS_N_INSNS (5), /* Narrow. */
101 COSTS_N_INSNS (5), /* Toint. */
102 COSTS_N_INSNS (5), /* Fromint. */
103 COSTS_N_INSNS (1) /* Roundint. */
105 /* FP DFmode */
107 COSTS_N_INSNS (21), /* Div. */
108 COSTS_N_INSNS (5), /* Mult. */
109 COSTS_N_INSNS (5), /* Mult_addsub. */
110 COSTS_N_INSNS (5), /* Fma. */
111 COSTS_N_INSNS (3), /* Addsub. */
112 0, /* Fpconst. */
113 COSTS_N_INSNS (1), /* Neg. */
114 0, /* Compare. */
115 COSTS_N_INSNS (5), /* Widen. */
116 COSTS_N_INSNS (5), /* Narrow. */
117 COSTS_N_INSNS (5), /* Toint. */
118 COSTS_N_INSNS (5), /* Fromint. */
119 COSTS_N_INSNS (1) /* Roundint. */
122 /* Vector */
124 COSTS_N_INSNS (1) /* Alu. */
130 #endif