1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
46 #include "hard-reg-set.h"
48 #include "insn-config.h"
51 #include "basic-block.h"
54 #include "langhooks.h"
59 struct target_rtl default_target_rtl
;
61 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
64 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
66 /* Commonly used modes. */
68 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
69 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
70 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
71 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
73 /* Datastructures maintained for currently processed function in RTL form. */
75 struct rtl_data x_rtl
;
77 /* Indexed by pseudo register number, gives the rtx for that pseudo.
78 Allocated in parallel with regno_pointer_align.
79 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
80 with length attribute nested in top level structures. */
84 /* This is *not* reset after each function. It gives each CODE_LABEL
85 in the entire compilation a unique label number. */
87 static GTY(()) int label_num
= 1;
89 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
90 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
91 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
92 is set only for MODE_INT and MODE_VECTOR_INT modes. */
94 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
98 REAL_VALUE_TYPE dconst0
;
99 REAL_VALUE_TYPE dconst1
;
100 REAL_VALUE_TYPE dconst2
;
101 REAL_VALUE_TYPE dconstm1
;
102 REAL_VALUE_TYPE dconsthalf
;
104 /* Record fixed-point constant 0 and 1. */
105 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
106 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
108 /* We make one copy of (const_int C) where C is in
109 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
110 to save space during the compilation and simplify comparisons of
113 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
115 /* Standard pieces of rtx, to be substituted directly into things. */
118 rtx simple_return_rtx
;
121 /* A hash table storing CONST_INTs whose absolute value is greater
122 than MAX_SAVED_CONST_INT. */
124 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
125 htab_t const_int_htab
;
127 /* A hash table storing memory attribute structures. */
128 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
129 htab_t mem_attrs_htab
;
131 /* A hash table storing register attribute structures. */
132 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
133 htab_t reg_attrs_htab
;
135 /* A hash table storing all CONST_DOUBLEs. */
136 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
137 htab_t const_double_htab
;
139 /* A hash table storing all CONST_FIXEDs. */
140 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
141 htab_t const_fixed_htab
;
143 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
144 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
145 #define first_label_num (crtl->emit.x_first_label_num)
147 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
148 static void set_used_decls (tree
);
149 static void mark_label_nuses (rtx
);
150 static hashval_t
const_int_htab_hash (const void *);
151 static int const_int_htab_eq (const void *, const void *);
152 static hashval_t
const_double_htab_hash (const void *);
153 static int const_double_htab_eq (const void *, const void *);
154 static rtx
lookup_const_double (rtx
);
155 static hashval_t
const_fixed_htab_hash (const void *);
156 static int const_fixed_htab_eq (const void *, const void *);
157 static rtx
lookup_const_fixed (rtx
);
158 static hashval_t
mem_attrs_htab_hash (const void *);
159 static int mem_attrs_htab_eq (const void *, const void *);
160 static hashval_t
reg_attrs_htab_hash (const void *);
161 static int reg_attrs_htab_eq (const void *, const void *);
162 static reg_attrs
*get_reg_attrs (tree
, int);
163 static rtx
gen_const_vector (enum machine_mode
, int);
164 static void copy_rtx_if_shared_1 (rtx
*orig
);
166 /* Probability of the conditional branch currently proceeded by try_split.
167 Set to -1 otherwise. */
168 int split_branch_probability
= -1;
170 /* Returns a hash code for X (which is a really a CONST_INT). */
173 const_int_htab_hash (const void *x
)
175 return (hashval_t
) INTVAL ((const_rtx
) x
);
178 /* Returns nonzero if the value represented by X (which is really a
179 CONST_INT) is the same as that given by Y (which is really a
183 const_int_htab_eq (const void *x
, const void *y
)
185 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
188 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
190 const_double_htab_hash (const void *x
)
192 const_rtx
const value
= (const_rtx
) x
;
195 if (GET_MODE (value
) == VOIDmode
)
196 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
199 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
200 /* MODE is used in the comparison, so it should be in the hash. */
201 h
^= GET_MODE (value
);
206 /* Returns nonzero if the value represented by X (really a ...)
207 is the same as that represented by Y (really a ...) */
209 const_double_htab_eq (const void *x
, const void *y
)
211 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
213 if (GET_MODE (a
) != GET_MODE (b
))
215 if (GET_MODE (a
) == VOIDmode
)
216 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
217 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
219 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
220 CONST_DOUBLE_REAL_VALUE (b
));
223 /* Returns a hash code for X (which is really a CONST_FIXED). */
226 const_fixed_htab_hash (const void *x
)
228 const_rtx
const value
= (const_rtx
) x
;
231 h
= fixed_hash (CONST_FIXED_VALUE (value
));
232 /* MODE is used in the comparison, so it should be in the hash. */
233 h
^= GET_MODE (value
);
237 /* Returns nonzero if the value represented by X (really a ...)
238 is the same as that represented by Y (really a ...). */
241 const_fixed_htab_eq (const void *x
, const void *y
)
243 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
245 if (GET_MODE (a
) != GET_MODE (b
))
247 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
250 /* Returns a hash code for X (which is a really a mem_attrs *). */
253 mem_attrs_htab_hash (const void *x
)
255 const mem_attrs
*const p
= (const mem_attrs
*) x
;
257 return (p
->alias
^ (p
->align
* 1000)
258 ^ (p
->addrspace
* 4000)
259 ^ ((p
->offset_known_p
? p
->offset
: 0) * 50000)
260 ^ ((p
->size_known_p
? p
->size
: 0) * 2500000)
261 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
264 /* Return true if the given memory attributes are equal. */
267 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
269 return (p
->alias
== q
->alias
270 && p
->offset_known_p
== q
->offset_known_p
271 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
272 && p
->size_known_p
== q
->size_known_p
273 && (!p
->size_known_p
|| p
->size
== q
->size
)
274 && p
->align
== q
->align
275 && p
->addrspace
== q
->addrspace
276 && (p
->expr
== q
->expr
277 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
278 && operand_equal_p (p
->expr
, q
->expr
, 0))));
281 /* Returns nonzero if the value represented by X (which is really a
282 mem_attrs *) is the same as that given by Y (which is also really a
286 mem_attrs_htab_eq (const void *x
, const void *y
)
288 return mem_attrs_eq_p ((const mem_attrs
*) x
, (const mem_attrs
*) y
);
291 /* Set MEM's memory attributes so that they are the same as ATTRS. */
294 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
298 /* If everything is the default, we can just clear the attributes. */
299 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
305 slot
= htab_find_slot (mem_attrs_htab
, attrs
, INSERT
);
308 *slot
= ggc_alloc_mem_attrs ();
309 memcpy (*slot
, attrs
, sizeof (mem_attrs
));
312 MEM_ATTRS (mem
) = (mem_attrs
*) *slot
;
315 /* Returns a hash code for X (which is a really a reg_attrs *). */
318 reg_attrs_htab_hash (const void *x
)
320 const reg_attrs
*const p
= (const reg_attrs
*) x
;
322 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
325 /* Returns nonzero if the value represented by X (which is really a
326 reg_attrs *) is the same as that given by Y (which is also really a
330 reg_attrs_htab_eq (const void *x
, const void *y
)
332 const reg_attrs
*const p
= (const reg_attrs
*) x
;
333 const reg_attrs
*const q
= (const reg_attrs
*) y
;
335 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
337 /* Allocate a new reg_attrs structure and insert it into the hash table if
338 one identical to it is not already in the table. We are doing this for
342 get_reg_attrs (tree decl
, int offset
)
347 /* If everything is the default, we can just return zero. */
348 if (decl
== 0 && offset
== 0)
352 attrs
.offset
= offset
;
354 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
357 *slot
= ggc_alloc_reg_attrs ();
358 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
361 return (reg_attrs
*) *slot
;
366 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
367 and to block register equivalences to be seen across this insn. */
372 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
373 MEM_VOLATILE_P (x
) = true;
379 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
380 don't attempt to share with the various global pieces of rtl (such as
381 frame_pointer_rtx). */
384 gen_raw_REG (enum machine_mode mode
, int regno
)
386 rtx x
= gen_rtx_raw_REG (mode
, regno
);
387 ORIGINAL_REGNO (x
) = regno
;
391 /* There are some RTL codes that require special attention; the generation
392 functions do the raw handling. If you add to this list, modify
393 special_rtx in gengenrtl.c as well. */
396 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
400 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
401 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
403 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
404 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
405 return const_true_rtx
;
408 /* Look up the CONST_INT in the hash table. */
409 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
410 (hashval_t
) arg
, INSERT
);
412 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
418 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
420 return GEN_INT (trunc_int_for_mode (c
, mode
));
423 /* CONST_DOUBLEs might be created from pairs of integers, or from
424 REAL_VALUE_TYPEs. Also, their length is known only at run time,
425 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
427 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
428 hash table. If so, return its counterpart; otherwise add it
429 to the hash table and return it. */
431 lookup_const_double (rtx real
)
433 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
440 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
441 VALUE in mode MODE. */
443 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
445 rtx real
= rtx_alloc (CONST_DOUBLE
);
446 PUT_MODE (real
, mode
);
450 return lookup_const_double (real
);
453 /* Determine whether FIXED, a CONST_FIXED, already exists in the
454 hash table. If so, return its counterpart; otherwise add it
455 to the hash table and return it. */
458 lookup_const_fixed (rtx fixed
)
460 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
467 /* Return a CONST_FIXED rtx for a fixed-point value specified by
468 VALUE in mode MODE. */
471 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
473 rtx fixed
= rtx_alloc (CONST_FIXED
);
474 PUT_MODE (fixed
, mode
);
478 return lookup_const_fixed (fixed
);
481 /* Constructs double_int from rtx CST. */
484 rtx_to_double_int (const_rtx cst
)
488 if (CONST_INT_P (cst
))
489 r
= double_int::from_shwi (INTVAL (cst
));
490 else if (CONST_DOUBLE_AS_INT_P (cst
))
492 r
.low
= CONST_DOUBLE_LOW (cst
);
493 r
.high
= CONST_DOUBLE_HIGH (cst
);
502 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
506 immed_double_int_const (double_int i
, enum machine_mode mode
)
508 return immed_double_const (i
.low
, i
.high
, mode
);
511 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
512 of ints: I0 is the low-order word and I1 is the high-order word.
513 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
514 implied upper bits are copies of the high bit of i1. The value
515 itself is neither signed nor unsigned. Do not use this routine for
516 non-integer modes; convert to REAL_VALUE_TYPE and use
517 CONST_DOUBLE_FROM_REAL_VALUE. */
520 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
525 /* There are the following cases (note that there are no modes with
526 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
528 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
530 2) If the value of the integer fits into HOST_WIDE_INT anyway
531 (i.e., i1 consists only from copies of the sign bit, and sign
532 of i0 and i1 are the same), then we return a CONST_INT for i0.
533 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
534 if (mode
!= VOIDmode
)
536 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
537 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
538 /* We can get a 0 for an error mark. */
539 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
540 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
542 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
543 return gen_int_mode (i0
, mode
);
546 /* If this integer fits in one word, return a CONST_INT. */
547 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
550 /* We use VOIDmode for integers. */
551 value
= rtx_alloc (CONST_DOUBLE
);
552 PUT_MODE (value
, VOIDmode
);
554 CONST_DOUBLE_LOW (value
) = i0
;
555 CONST_DOUBLE_HIGH (value
) = i1
;
557 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
558 XWINT (value
, i
) = 0;
560 return lookup_const_double (value
);
564 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
566 /* In case the MD file explicitly references the frame pointer, have
567 all such references point to the same frame pointer. This is
568 used during frame pointer elimination to distinguish the explicit
569 references to these registers from pseudos that happened to be
572 If we have eliminated the frame pointer or arg pointer, we will
573 be using it as a normal register, for example as a spill
574 register. In such cases, we might be accessing it in a mode that
575 is not Pmode and therefore cannot use the pre-allocated rtx.
577 Also don't do this when we are making new REGs in reload, since
578 we don't want to get confused with the real pointers. */
580 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
582 if (regno
== FRAME_POINTER_REGNUM
583 && (!reload_completed
|| frame_pointer_needed
))
584 return frame_pointer_rtx
;
585 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
586 if (regno
== HARD_FRAME_POINTER_REGNUM
587 && (!reload_completed
|| frame_pointer_needed
))
588 return hard_frame_pointer_rtx
;
590 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
591 if (regno
== ARG_POINTER_REGNUM
)
592 return arg_pointer_rtx
;
594 #ifdef RETURN_ADDRESS_POINTER_REGNUM
595 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
596 return return_address_pointer_rtx
;
598 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
599 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
600 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
601 return pic_offset_table_rtx
;
602 if (regno
== STACK_POINTER_REGNUM
)
603 return stack_pointer_rtx
;
607 /* If the per-function register table has been set up, try to re-use
608 an existing entry in that table to avoid useless generation of RTL.
610 This code is disabled for now until we can fix the various backends
611 which depend on having non-shared hard registers in some cases. Long
612 term we want to re-enable this code as it can significantly cut down
613 on the amount of useless RTL that gets generated.
615 We'll also need to fix some code that runs after reload that wants to
616 set ORIGINAL_REGNO. */
621 && regno
< FIRST_PSEUDO_REGISTER
622 && reg_raw_mode
[regno
] == mode
)
623 return regno_reg_rtx
[regno
];
626 return gen_raw_REG (mode
, regno
);
630 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
632 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
634 /* This field is not cleared by the mere allocation of the rtx, so
641 /* Generate a memory referring to non-trapping constant memory. */
644 gen_const_mem (enum machine_mode mode
, rtx addr
)
646 rtx mem
= gen_rtx_MEM (mode
, addr
);
647 MEM_READONLY_P (mem
) = 1;
648 MEM_NOTRAP_P (mem
) = 1;
652 /* Generate a MEM referring to fixed portions of the frame, e.g., register
656 gen_frame_mem (enum machine_mode mode
, rtx addr
)
658 rtx mem
= gen_rtx_MEM (mode
, addr
);
659 MEM_NOTRAP_P (mem
) = 1;
660 set_mem_alias_set (mem
, get_frame_alias_set ());
664 /* Generate a MEM referring to a temporary use of the stack, not part
665 of the fixed stack frame. For example, something which is pushed
666 by a target splitter. */
668 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
670 rtx mem
= gen_rtx_MEM (mode
, addr
);
671 MEM_NOTRAP_P (mem
) = 1;
672 if (!cfun
->calls_alloca
)
673 set_mem_alias_set (mem
, get_frame_alias_set ());
677 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
678 this construct would be valid, and false otherwise. */
681 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
682 const_rtx reg
, unsigned int offset
)
684 unsigned int isize
= GET_MODE_SIZE (imode
);
685 unsigned int osize
= GET_MODE_SIZE (omode
);
687 /* All subregs must be aligned. */
688 if (offset
% osize
!= 0)
691 /* The subreg offset cannot be outside the inner object. */
695 /* ??? This should not be here. Temporarily continue to allow word_mode
696 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
697 Generally, backends are doing something sketchy but it'll take time to
699 if (omode
== word_mode
)
701 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
702 is the culprit here, and not the backends. */
703 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
705 /* Allow component subregs of complex and vector. Though given the below
706 extraction rules, it's not always clear what that means. */
707 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
708 && GET_MODE_INNER (imode
) == omode
)
710 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
711 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
712 represent this. It's questionable if this ought to be represented at
713 all -- why can't this all be hidden in post-reload splitters that make
714 arbitrarily mode changes to the registers themselves. */
715 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
717 /* Subregs involving floating point modes are not allowed to
718 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
719 (subreg:SI (reg:DF) 0) isn't. */
720 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
722 if (! (isize
== osize
723 /* LRA can use subreg to store a floating point value in
724 an integer mode. Although the floating point and the
725 integer modes need the same number of hard registers,
726 the size of floating point mode can be less than the
727 integer mode. LRA also uses subregs for a register
728 should be used in different mode in on insn. */
733 /* Paradoxical subregs must have offset zero. */
737 /* This is a normal subreg. Verify that the offset is representable. */
739 /* For hard registers, we already have most of these rules collected in
740 subreg_offset_representable_p. */
741 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
743 unsigned int regno
= REGNO (reg
);
745 #ifdef CANNOT_CHANGE_MODE_CLASS
746 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
747 && GET_MODE_INNER (imode
) == omode
)
749 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
753 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
756 /* For pseudo registers, we want most of the same checks. Namely:
757 If the register no larger than a word, the subreg must be lowpart.
758 If the register is larger than a word, the subreg must be the lowpart
759 of a subword. A subreg does *not* perform arbitrary bit extraction.
760 Given that we've already checked mode/offset alignment, we only have
761 to check subword subregs here. */
762 if (osize
< UNITS_PER_WORD
763 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
765 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
766 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
767 if (offset
% UNITS_PER_WORD
!= low_off
)
774 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
776 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
777 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
780 /* Generate a SUBREG representing the least-significant part of REG if MODE
781 is smaller than mode of REG, otherwise paradoxical SUBREG. */
784 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
786 enum machine_mode inmode
;
788 inmode
= GET_MODE (reg
);
789 if (inmode
== VOIDmode
)
791 return gen_rtx_SUBREG (mode
, reg
,
792 subreg_lowpart_offset (mode
, inmode
));
796 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
799 gen_rtvec (int n
, ...)
807 /* Don't allocate an empty rtvec... */
814 rt_val
= rtvec_alloc (n
);
816 for (i
= 0; i
< n
; i
++)
817 rt_val
->elem
[i
] = va_arg (p
, rtx
);
824 gen_rtvec_v (int n
, rtx
*argp
)
829 /* Don't allocate an empty rtvec... */
833 rt_val
= rtvec_alloc (n
);
835 for (i
= 0; i
< n
; i
++)
836 rt_val
->elem
[i
] = *argp
++;
841 /* Return the number of bytes between the start of an OUTER_MODE
842 in-memory value and the start of an INNER_MODE in-memory value,
843 given that the former is a lowpart of the latter. It may be a
844 paradoxical lowpart, in which case the offset will be negative
845 on big-endian targets. */
848 byte_lowpart_offset (enum machine_mode outer_mode
,
849 enum machine_mode inner_mode
)
851 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
852 return subreg_lowpart_offset (outer_mode
, inner_mode
);
854 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
857 /* Generate a REG rtx for a new pseudo register of mode MODE.
858 This pseudo is assigned the next sequential register number. */
861 gen_reg_rtx (enum machine_mode mode
)
864 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
866 gcc_assert (can_create_pseudo_p ());
868 /* If a virtual register with bigger mode alignment is generated,
869 increase stack alignment estimation because it might be spilled
871 if (SUPPORTS_STACK_ALIGNMENT
872 && crtl
->stack_alignment_estimated
< align
873 && !crtl
->stack_realign_processed
)
875 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
876 if (crtl
->stack_alignment_estimated
< min_align
)
877 crtl
->stack_alignment_estimated
= min_align
;
880 if (generating_concat_p
881 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
882 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
884 /* For complex modes, don't make a single pseudo.
885 Instead, make a CONCAT of two pseudos.
886 This allows noncontiguous allocation of the real and imaginary parts,
887 which makes much better code. Besides, allocating DCmode
888 pseudos overstrains reload on some machines like the 386. */
889 rtx realpart
, imagpart
;
890 enum machine_mode partmode
= GET_MODE_INNER (mode
);
892 realpart
= gen_reg_rtx (partmode
);
893 imagpart
= gen_reg_rtx (partmode
);
894 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
897 /* Make sure regno_pointer_align, and regno_reg_rtx are large
898 enough to have an element for this pseudo reg number. */
900 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
902 int old_size
= crtl
->emit
.regno_pointer_align_length
;
906 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
907 memset (tmp
+ old_size
, 0, old_size
);
908 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
910 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
911 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
912 regno_reg_rtx
= new1
;
914 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
917 val
= gen_raw_REG (mode
, reg_rtx_no
);
918 regno_reg_rtx
[reg_rtx_no
++] = val
;
922 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
925 reg_is_parm_p (rtx reg
)
929 gcc_assert (REG_P (reg
));
930 decl
= REG_EXPR (reg
);
931 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
934 /* Update NEW with the same attributes as REG, but with OFFSET added
935 to the REG_OFFSET. */
938 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
940 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
941 REG_OFFSET (reg
) + offset
);
944 /* Generate a register with same attributes as REG, but with OFFSET
945 added to the REG_OFFSET. */
948 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
951 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
953 update_reg_offset (new_rtx
, reg
, offset
);
957 /* Generate a new pseudo-register with the same attributes as REG, but
958 with OFFSET added to the REG_OFFSET. */
961 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
963 rtx new_rtx
= gen_reg_rtx (mode
);
965 update_reg_offset (new_rtx
, reg
, offset
);
969 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
970 new register is a (possibly paradoxical) lowpart of the old one. */
973 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
975 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
976 PUT_MODE (reg
, mode
);
979 /* Copy REG's attributes from X, if X has any attributes. If REG and X
980 have different modes, REG is a (possibly paradoxical) lowpart of X. */
983 set_reg_attrs_from_value (rtx reg
, rtx x
)
986 bool can_be_reg_pointer
= true;
988 /* Don't call mark_reg_pointer for incompatible pointer sign
990 while (GET_CODE (x
) == SIGN_EXTEND
991 || GET_CODE (x
) == ZERO_EXTEND
992 || GET_CODE (x
) == TRUNCATE
993 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
995 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
996 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
997 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
998 can_be_reg_pointer
= false;
1003 /* Hard registers can be reused for multiple purposes within the same
1004 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1005 on them is wrong. */
1006 if (HARD_REGISTER_P (reg
))
1009 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1012 if (MEM_OFFSET_KNOWN_P (x
))
1013 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1014 MEM_OFFSET (x
) + offset
);
1015 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1016 mark_reg_pointer (reg
, 0);
1021 update_reg_offset (reg
, x
, offset
);
1022 if (can_be_reg_pointer
&& REG_POINTER (x
))
1023 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1027 /* Generate a REG rtx for a new pseudo register, copying the mode
1028 and attributes from X. */
1031 gen_reg_rtx_and_attrs (rtx x
)
1033 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1034 set_reg_attrs_from_value (reg
, x
);
1038 /* Set the register attributes for registers contained in PARM_RTX.
1039 Use needed values from memory attributes of MEM. */
1042 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1044 if (REG_P (parm_rtx
))
1045 set_reg_attrs_from_value (parm_rtx
, mem
);
1046 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1048 /* Check for a NULL entry in the first slot, used to indicate that the
1049 parameter goes both on the stack and in registers. */
1050 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1051 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1053 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1054 if (REG_P (XEXP (x
, 0)))
1055 REG_ATTRS (XEXP (x
, 0))
1056 = get_reg_attrs (MEM_EXPR (mem
),
1057 INTVAL (XEXP (x
, 1)));
1062 /* Set the REG_ATTRS for registers in value X, given that X represents
1066 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1068 if (GET_CODE (x
) == SUBREG
)
1070 gcc_assert (subreg_lowpart_p (x
));
1075 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1077 if (GET_CODE (x
) == CONCAT
)
1079 if (REG_P (XEXP (x
, 0)))
1080 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1081 if (REG_P (XEXP (x
, 1)))
1082 REG_ATTRS (XEXP (x
, 1))
1083 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1085 if (GET_CODE (x
) == PARALLEL
)
1089 /* Check for a NULL entry, used to indicate that the parameter goes
1090 both on the stack and in registers. */
1091 if (XEXP (XVECEXP (x
, 0, 0), 0))
1096 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1098 rtx y
= XVECEXP (x
, 0, i
);
1099 if (REG_P (XEXP (y
, 0)))
1100 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1105 /* Assign the RTX X to declaration T. */
1108 set_decl_rtl (tree t
, rtx x
)
1110 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1112 set_reg_attrs_for_decl_rtl (t
, x
);
1115 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1116 if the ABI requires the parameter to be passed by reference. */
1119 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1121 DECL_INCOMING_RTL (t
) = x
;
1122 if (x
&& !by_reference_p
)
1123 set_reg_attrs_for_decl_rtl (t
, x
);
1126 /* Identify REG (which may be a CONCAT) as a user register. */
1129 mark_user_reg (rtx reg
)
1131 if (GET_CODE (reg
) == CONCAT
)
1133 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1134 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1138 gcc_assert (REG_P (reg
));
1139 REG_USERVAR_P (reg
) = 1;
1143 /* Identify REG as a probable pointer register and show its alignment
1144 as ALIGN, if nonzero. */
1147 mark_reg_pointer (rtx reg
, int align
)
1149 if (! REG_POINTER (reg
))
1151 REG_POINTER (reg
) = 1;
1154 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1156 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1157 /* We can no-longer be sure just how aligned this pointer is. */
1158 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1161 /* Return 1 plus largest pseudo reg number used in the current function. */
1169 /* Return 1 + the largest label number used so far in the current function. */
1172 max_label_num (void)
1177 /* Return first label number used in this function (if any were used). */
1180 get_first_label_num (void)
1182 return first_label_num
;
1185 /* If the rtx for label was created during the expansion of a nested
1186 function, then first_label_num won't include this label number.
1187 Fix this now so that array indices work later. */
1190 maybe_set_first_label_num (rtx x
)
1192 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1193 first_label_num
= CODE_LABEL_NUMBER (x
);
1196 /* Return a value representing some low-order bits of X, where the number
1197 of low-order bits is given by MODE. Note that no conversion is done
1198 between floating-point and fixed-point values, rather, the bit
1199 representation is returned.
1201 This function handles the cases in common between gen_lowpart, below,
1202 and two variants in cse.c and combine.c. These are the cases that can
1203 be safely handled at all points in the compilation.
1205 If this is not a case we can handle, return 0. */
1208 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1210 int msize
= GET_MODE_SIZE (mode
);
1213 enum machine_mode innermode
;
1215 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1216 so we have to make one up. Yuk. */
1217 innermode
= GET_MODE (x
);
1219 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1220 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1221 else if (innermode
== VOIDmode
)
1222 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1224 xsize
= GET_MODE_SIZE (innermode
);
1226 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1228 if (innermode
== mode
)
1231 /* MODE must occupy no more words than the mode of X. */
1232 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1233 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1236 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1237 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1240 offset
= subreg_lowpart_offset (mode
, innermode
);
1242 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1243 && (GET_MODE_CLASS (mode
) == MODE_INT
1244 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1246 /* If we are getting the low-order part of something that has been
1247 sign- or zero-extended, we can either just use the object being
1248 extended or make a narrower extension. If we want an even smaller
1249 piece than the size of the object being extended, call ourselves
1252 This case is used mostly by combine and cse. */
1254 if (GET_MODE (XEXP (x
, 0)) == mode
)
1256 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1257 return gen_lowpart_common (mode
, XEXP (x
, 0));
1258 else if (msize
< xsize
)
1259 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1261 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1262 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1263 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1264 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1266 /* Otherwise, we can't do this. */
1271 gen_highpart (enum machine_mode mode
, rtx x
)
1273 unsigned int msize
= GET_MODE_SIZE (mode
);
1276 /* This case loses if X is a subreg. To catch bugs early,
1277 complain if an invalid MODE is used even in other cases. */
1278 gcc_assert (msize
<= UNITS_PER_WORD
1279 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1281 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1282 subreg_highpart_offset (mode
, GET_MODE (x
)));
1283 gcc_assert (result
);
1285 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1286 the target if we have a MEM. gen_highpart must return a valid operand,
1287 emitting code if necessary to do so. */
1290 result
= validize_mem (result
);
1291 gcc_assert (result
);
1297 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1298 be VOIDmode constant. */
1300 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1302 if (GET_MODE (exp
) != VOIDmode
)
1304 gcc_assert (GET_MODE (exp
) == innermode
);
1305 return gen_highpart (outermode
, exp
);
1307 return simplify_gen_subreg (outermode
, exp
, innermode
,
1308 subreg_highpart_offset (outermode
, innermode
));
1311 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1314 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1316 unsigned int offset
= 0;
1317 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1321 if (WORDS_BIG_ENDIAN
)
1322 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1323 if (BYTES_BIG_ENDIAN
)
1324 offset
+= difference
% UNITS_PER_WORD
;
1330 /* Return offset in bytes to get OUTERMODE high part
1331 of the value in mode INNERMODE stored in memory in target format. */
1333 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1335 unsigned int offset
= 0;
1336 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1338 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1342 if (! WORDS_BIG_ENDIAN
)
1343 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1344 if (! BYTES_BIG_ENDIAN
)
1345 offset
+= difference
% UNITS_PER_WORD
;
1351 /* Return 1 iff X, assumed to be a SUBREG,
1352 refers to the least significant part of its containing reg.
1353 If X is not a SUBREG, always return 1 (it is its own low part!). */
1356 subreg_lowpart_p (const_rtx x
)
1358 if (GET_CODE (x
) != SUBREG
)
1360 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1363 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1364 == SUBREG_BYTE (x
));
1367 /* Return true if X is a paradoxical subreg, false otherwise. */
1369 paradoxical_subreg_p (const_rtx x
)
1371 if (GET_CODE (x
) != SUBREG
)
1373 return (GET_MODE_PRECISION (GET_MODE (x
))
1374 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1377 /* Return subword OFFSET of operand OP.
1378 The word number, OFFSET, is interpreted as the word number starting
1379 at the low-order address. OFFSET 0 is the low-order word if not
1380 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1382 If we cannot extract the required word, we return zero. Otherwise,
1383 an rtx corresponding to the requested word will be returned.
1385 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1386 reload has completed, a valid address will always be returned. After
1387 reload, if a valid address cannot be returned, we return zero.
1389 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1390 it is the responsibility of the caller.
1392 MODE is the mode of OP in case it is a CONST_INT.
1394 ??? This is still rather broken for some cases. The problem for the
1395 moment is that all callers of this thing provide no 'goal mode' to
1396 tell us to work with. This exists because all callers were written
1397 in a word based SUBREG world.
1398 Now use of this function can be deprecated by simplify_subreg in most
1403 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1405 if (mode
== VOIDmode
)
1406 mode
= GET_MODE (op
);
1408 gcc_assert (mode
!= VOIDmode
);
1410 /* If OP is narrower than a word, fail. */
1412 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1415 /* If we want a word outside OP, return zero. */
1417 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1420 /* Form a new MEM at the requested address. */
1423 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1425 if (! validate_address
)
1428 else if (reload_completed
)
1430 if (! strict_memory_address_addr_space_p (word_mode
,
1432 MEM_ADDR_SPACE (op
)))
1436 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1439 /* Rest can be handled by simplify_subreg. */
1440 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1443 /* Similar to `operand_subword', but never return 0. If we can't
1444 extract the required subword, put OP into a register and try again.
1445 The second attempt must succeed. We always validate the address in
1448 MODE is the mode of OP, in case it is CONST_INT. */
1451 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1453 rtx result
= operand_subword (op
, offset
, 1, mode
);
1458 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1460 /* If this is a register which can not be accessed by words, copy it
1461 to a pseudo register. */
1463 op
= copy_to_reg (op
);
1465 op
= force_reg (mode
, op
);
1468 result
= operand_subword (op
, offset
, 1, mode
);
1469 gcc_assert (result
);
1474 /* Returns 1 if both MEM_EXPR can be considered equal
1478 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1483 if (! expr1
|| ! expr2
)
1486 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1489 return operand_equal_p (expr1
, expr2
, 0);
1492 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1493 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1497 get_mem_align_offset (rtx mem
, unsigned int align
)
1500 unsigned HOST_WIDE_INT offset
;
1502 /* This function can't use
1503 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1504 || (MAX (MEM_ALIGN (mem),
1505 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1509 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1511 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1512 for <variable>. get_inner_reference doesn't handle it and
1513 even if it did, the alignment in that case needs to be determined
1514 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1515 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1516 isn't sufficiently aligned, the object it is in might be. */
1517 gcc_assert (MEM_P (mem
));
1518 expr
= MEM_EXPR (mem
);
1519 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1522 offset
= MEM_OFFSET (mem
);
1525 if (DECL_ALIGN (expr
) < align
)
1528 else if (INDIRECT_REF_P (expr
))
1530 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1533 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1537 tree inner
= TREE_OPERAND (expr
, 0);
1538 tree field
= TREE_OPERAND (expr
, 1);
1539 tree byte_offset
= component_ref_field_offset (expr
);
1540 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1543 || !host_integerp (byte_offset
, 1)
1544 || !host_integerp (bit_offset
, 1))
1547 offset
+= tree_low_cst (byte_offset
, 1);
1548 offset
+= tree_low_cst (bit_offset
, 1) / BITS_PER_UNIT
;
1550 if (inner
== NULL_TREE
)
1552 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1553 < (unsigned int) align
)
1557 else if (DECL_P (inner
))
1559 if (DECL_ALIGN (inner
) < align
)
1563 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1571 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1574 /* Given REF (a MEM) and T, either the type of X or the expression
1575 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1576 if we are making a new object of this type. BITPOS is nonzero if
1577 there is an offset outstanding on T that will be applied later. */
1580 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1581 HOST_WIDE_INT bitpos
)
1583 HOST_WIDE_INT apply_bitpos
= 0;
1585 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1588 /* It can happen that type_for_mode was given a mode for which there
1589 is no language-level type. In which case it returns NULL, which
1594 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1595 if (type
== error_mark_node
)
1598 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1599 wrong answer, as it assumes that DECL_RTL already has the right alias
1600 info. Callers should not set DECL_RTL until after the call to
1601 set_mem_attributes. */
1602 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1604 memset (&attrs
, 0, sizeof (attrs
));
1606 /* Get the alias set from the expression or type (perhaps using a
1607 front-end routine) and use it. */
1608 attrs
.alias
= get_alias_set (t
);
1610 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1611 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1613 /* Default values from pre-existing memory attributes if present. */
1614 refattrs
= MEM_ATTRS (ref
);
1617 /* ??? Can this ever happen? Calling this routine on a MEM that
1618 already carries memory attributes should probably be invalid. */
1619 attrs
.expr
= refattrs
->expr
;
1620 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1621 attrs
.offset
= refattrs
->offset
;
1622 attrs
.size_known_p
= refattrs
->size_known_p
;
1623 attrs
.size
= refattrs
->size
;
1624 attrs
.align
= refattrs
->align
;
1627 /* Otherwise, default values from the mode of the MEM reference. */
1630 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1631 gcc_assert (!defattrs
->expr
);
1632 gcc_assert (!defattrs
->offset_known_p
);
1634 /* Respect mode size. */
1635 attrs
.size_known_p
= defattrs
->size_known_p
;
1636 attrs
.size
= defattrs
->size
;
1637 /* ??? Is this really necessary? We probably should always get
1638 the size from the type below. */
1640 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1641 if T is an object, always compute the object alignment below. */
1643 attrs
.align
= defattrs
->align
;
1645 attrs
.align
= BITS_PER_UNIT
;
1646 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1647 e.g. if the type carries an alignment attribute. Should we be
1648 able to simply always use TYPE_ALIGN? */
1651 /* We can set the alignment from the type if we are making an object,
1652 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1653 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1654 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1656 else if (TREE_CODE (t
) == MEM_REF
)
1658 tree op0
= TREE_OPERAND (t
, 0);
1659 if (TREE_CODE (op0
) == ADDR_EXPR
1660 && (DECL_P (TREE_OPERAND (op0
, 0))
1661 || CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0))))
1663 if (DECL_P (TREE_OPERAND (op0
, 0)))
1664 attrs
.align
= DECL_ALIGN (TREE_OPERAND (op0
, 0));
1665 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0)))
1667 attrs
.align
= TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0
, 0)));
1668 #ifdef CONSTANT_ALIGNMENT
1669 attrs
.align
= CONSTANT_ALIGNMENT (TREE_OPERAND (op0
, 0),
1673 if (TREE_INT_CST_LOW (TREE_OPERAND (t
, 1)) != 0)
1675 unsigned HOST_WIDE_INT ioff
1676 = TREE_INT_CST_LOW (TREE_OPERAND (t
, 1));
1677 unsigned HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1678 attrs
.align
= MIN (aoff
, attrs
.align
);
1682 /* ??? This isn't fully correct, we can't set the alignment from the
1683 type in all cases. */
1684 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1687 else if (TREE_CODE (t
) == TARGET_MEM_REF
)
1688 /* ??? This isn't fully correct, we can't set the alignment from the
1689 type in all cases. */
1690 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1692 /* If the size is known, we can set that. */
1693 tree new_size
= TYPE_SIZE_UNIT (type
);
1695 /* If T is not a type, we may be able to deduce some more information about
1700 bool align_computed
= false;
1702 if (TREE_THIS_VOLATILE (t
))
1703 MEM_VOLATILE_P (ref
) = 1;
1705 /* Now remove any conversions: they don't change what the underlying
1706 object is. Likewise for SAVE_EXPR. */
1707 while (CONVERT_EXPR_P (t
)
1708 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1709 || TREE_CODE (t
) == SAVE_EXPR
)
1710 t
= TREE_OPERAND (t
, 0);
1712 /* Note whether this expression can trap. */
1713 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1715 base
= get_base_address (t
);
1719 && TREE_READONLY (base
)
1720 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1721 && !TREE_THIS_VOLATILE (base
))
1722 MEM_READONLY_P (ref
) = 1;
1724 /* Mark static const strings readonly as well. */
1725 if (TREE_CODE (base
) == STRING_CST
1726 && TREE_READONLY (base
)
1727 && TREE_STATIC (base
))
1728 MEM_READONLY_P (ref
) = 1;
1730 if (TREE_CODE (base
) == MEM_REF
1731 || TREE_CODE (base
) == TARGET_MEM_REF
)
1732 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1735 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1738 as
= TYPE_ADDR_SPACE (type
);
1740 /* If this expression uses it's parent's alias set, mark it such
1741 that we won't change it. */
1742 if (component_uses_parent_alias_set (t
))
1743 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1745 /* If this is a decl, set the attributes of the MEM from it. */
1749 attrs
.offset_known_p
= true;
1751 apply_bitpos
= bitpos
;
1752 new_size
= DECL_SIZE_UNIT (t
);
1753 attrs
.align
= DECL_ALIGN (t
);
1754 align_computed
= true;
1757 /* If this is a constant, we know the alignment. */
1758 else if (CONSTANT_CLASS_P (t
))
1760 attrs
.align
= TYPE_ALIGN (type
);
1761 #ifdef CONSTANT_ALIGNMENT
1762 attrs
.align
= CONSTANT_ALIGNMENT (t
, attrs
.align
);
1764 align_computed
= true;
1767 /* If this is a field reference, record it. */
1768 else if (TREE_CODE (t
) == COMPONENT_REF
)
1771 attrs
.offset_known_p
= true;
1773 apply_bitpos
= bitpos
;
1774 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1775 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1778 /* If this is an array reference, look for an outer field reference. */
1779 else if (TREE_CODE (t
) == ARRAY_REF
)
1781 tree off_tree
= size_zero_node
;
1782 /* We can't modify t, because we use it at the end of the
1788 tree index
= TREE_OPERAND (t2
, 1);
1789 tree low_bound
= array_ref_low_bound (t2
);
1790 tree unit_size
= array_ref_element_size (t2
);
1792 /* We assume all arrays have sizes that are a multiple of a byte.
1793 First subtract the lower bound, if any, in the type of the
1794 index, then convert to sizetype and multiply by the size of
1795 the array element. */
1796 if (! integer_zerop (low_bound
))
1797 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1800 off_tree
= size_binop (PLUS_EXPR
,
1801 size_binop (MULT_EXPR
,
1802 fold_convert (sizetype
,
1806 t2
= TREE_OPERAND (t2
, 0);
1808 while (TREE_CODE (t2
) == ARRAY_REF
);
1813 attrs
.offset_known_p
= false;
1814 if (host_integerp (off_tree
, 1))
1816 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1817 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1818 attrs
.align
= DECL_ALIGN (t2
);
1819 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< attrs
.align
)
1821 align_computed
= true;
1822 attrs
.offset_known_p
= true;
1823 attrs
.offset
= ioff
;
1824 apply_bitpos
= bitpos
;
1827 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1830 attrs
.offset_known_p
= false;
1831 if (host_integerp (off_tree
, 1))
1833 attrs
.offset_known_p
= true;
1834 attrs
.offset
= tree_low_cst (off_tree
, 1);
1835 apply_bitpos
= bitpos
;
1837 /* ??? Any reason the field size would be different than
1838 the size we got from the type? */
1842 /* If this is an indirect reference, record it. */
1843 else if (TREE_CODE (t
) == MEM_REF
1844 || TREE_CODE (t
) == TARGET_MEM_REF
)
1847 attrs
.offset_known_p
= true;
1849 apply_bitpos
= bitpos
;
1852 if (!align_computed
)
1854 unsigned int obj_align
;
1855 unsigned HOST_WIDE_INT obj_bitpos
;
1856 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1857 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1858 if (obj_bitpos
!= 0)
1859 obj_align
= (obj_bitpos
& -obj_bitpos
);
1860 attrs
.align
= MAX (attrs
.align
, obj_align
);
1864 as
= TYPE_ADDR_SPACE (type
);
1866 if (host_integerp (new_size
, 1))
1868 attrs
.size_known_p
= true;
1869 attrs
.size
= tree_low_cst (new_size
, 1);
1872 /* If we modified OFFSET based on T, then subtract the outstanding
1873 bit position offset. Similarly, increase the size of the accessed
1874 object to contain the negative offset. */
1877 gcc_assert (attrs
.offset_known_p
);
1878 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1879 if (attrs
.size_known_p
)
1880 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1883 /* Now set the attributes we computed above. */
1884 attrs
.addrspace
= as
;
1885 set_mem_attrs (ref
, &attrs
);
1889 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1891 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1894 /* Set the alias set of MEM to SET. */
1897 set_mem_alias_set (rtx mem
, alias_set_type set
)
1899 struct mem_attrs attrs
;
1901 /* If the new and old alias sets don't conflict, something is wrong. */
1902 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1903 attrs
= *get_mem_attrs (mem
);
1905 set_mem_attrs (mem
, &attrs
);
1908 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1911 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1913 struct mem_attrs attrs
;
1915 attrs
= *get_mem_attrs (mem
);
1916 attrs
.addrspace
= addrspace
;
1917 set_mem_attrs (mem
, &attrs
);
1920 /* Set the alignment of MEM to ALIGN bits. */
1923 set_mem_align (rtx mem
, unsigned int align
)
1925 struct mem_attrs attrs
;
1927 attrs
= *get_mem_attrs (mem
);
1928 attrs
.align
= align
;
1929 set_mem_attrs (mem
, &attrs
);
1932 /* Set the expr for MEM to EXPR. */
1935 set_mem_expr (rtx mem
, tree expr
)
1937 struct mem_attrs attrs
;
1939 attrs
= *get_mem_attrs (mem
);
1941 set_mem_attrs (mem
, &attrs
);
1944 /* Set the offset of MEM to OFFSET. */
1947 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1949 struct mem_attrs attrs
;
1951 attrs
= *get_mem_attrs (mem
);
1952 attrs
.offset_known_p
= true;
1953 attrs
.offset
= offset
;
1954 set_mem_attrs (mem
, &attrs
);
1957 /* Clear the offset of MEM. */
1960 clear_mem_offset (rtx mem
)
1962 struct mem_attrs attrs
;
1964 attrs
= *get_mem_attrs (mem
);
1965 attrs
.offset_known_p
= false;
1966 set_mem_attrs (mem
, &attrs
);
1969 /* Set the size of MEM to SIZE. */
1972 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
1974 struct mem_attrs attrs
;
1976 attrs
= *get_mem_attrs (mem
);
1977 attrs
.size_known_p
= true;
1979 set_mem_attrs (mem
, &attrs
);
1982 /* Clear the size of MEM. */
1985 clear_mem_size (rtx mem
)
1987 struct mem_attrs attrs
;
1989 attrs
= *get_mem_attrs (mem
);
1990 attrs
.size_known_p
= false;
1991 set_mem_attrs (mem
, &attrs
);
1994 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1995 and its address changed to ADDR. (VOIDmode means don't change the mode.
1996 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1997 returned memory location is required to be valid. The memory
1998 attributes are not changed. */
2001 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
2006 gcc_assert (MEM_P (memref
));
2007 as
= MEM_ADDR_SPACE (memref
);
2008 if (mode
== VOIDmode
)
2009 mode
= GET_MODE (memref
);
2011 addr
= XEXP (memref
, 0);
2012 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2013 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2018 if (reload_in_progress
|| reload_completed
)
2019 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2021 addr
= memory_address_addr_space (mode
, addr
, as
);
2024 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2027 new_rtx
= gen_rtx_MEM (mode
, addr
);
2028 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2032 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2033 way we are changing MEMREF, so we only preserve the alias set. */
2036 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2038 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1);
2039 enum machine_mode mmode
= GET_MODE (new_rtx
);
2040 struct mem_attrs attrs
, *defattrs
;
2042 attrs
= *get_mem_attrs (memref
);
2043 defattrs
= mode_mem_attrs
[(int) mmode
];
2044 attrs
.expr
= NULL_TREE
;
2045 attrs
.offset_known_p
= false;
2046 attrs
.size_known_p
= defattrs
->size_known_p
;
2047 attrs
.size
= defattrs
->size
;
2048 attrs
.align
= defattrs
->align
;
2050 /* If there are no changes, just return the original memory reference. */
2051 if (new_rtx
== memref
)
2053 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2056 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2057 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2060 set_mem_attrs (new_rtx
, &attrs
);
2064 /* Return a memory reference like MEMREF, but with its mode changed
2065 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2066 nonzero, the memory address is forced to be valid.
2067 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2068 and the caller is responsible for adjusting MEMREF base register.
2069 If ADJUST_OBJECT is zero, the underlying object associated with the
2070 memory reference is left unchanged and the caller is responsible for
2071 dealing with it. Otherwise, if the new memory reference is outside
2072 the underlying object, even partially, then the object is dropped.
2073 SIZE, if nonzero, is the size of an access in cases where MODE
2074 has no inherent size. */
2077 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2078 int validate
, int adjust_address
, int adjust_object
,
2081 rtx addr
= XEXP (memref
, 0);
2083 enum machine_mode address_mode
;
2085 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2086 unsigned HOST_WIDE_INT max_align
;
2087 #ifdef POINTERS_EXTEND_UNSIGNED
2088 enum machine_mode pointer_mode
2089 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2092 /* VOIDmode means no mode change for change_address_1. */
2093 if (mode
== VOIDmode
)
2094 mode
= GET_MODE (memref
);
2096 /* Take the size of non-BLKmode accesses from the mode. */
2097 defattrs
= mode_mem_attrs
[(int) mode
];
2098 if (defattrs
->size_known_p
)
2099 size
= defattrs
->size
;
2101 /* If there are no changes, just return the original memory reference. */
2102 if (mode
== GET_MODE (memref
) && !offset
2103 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2104 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2108 /* ??? Prefer to create garbage instead of creating shared rtl.
2109 This may happen even if offset is nonzero -- consider
2110 (plus (plus reg reg) const_int) -- so do this always. */
2111 addr
= copy_rtx (addr
);
2113 /* Convert a possibly large offset to a signed value within the
2114 range of the target address space. */
2115 address_mode
= get_address_mode (memref
);
2116 pbits
= GET_MODE_BITSIZE (address_mode
);
2117 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2119 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2120 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2126 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2127 object, we can merge it into the LO_SUM. */
2128 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2130 && (unsigned HOST_WIDE_INT
) offset
2131 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2132 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2133 plus_constant (address_mode
,
2134 XEXP (addr
, 1), offset
));
2135 #ifdef POINTERS_EXTEND_UNSIGNED
2136 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2137 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2138 the fact that pointers are not allowed to overflow. */
2139 else if (POINTERS_EXTEND_UNSIGNED
> 0
2140 && GET_CODE (addr
) == ZERO_EXTEND
2141 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2142 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2143 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2144 plus_constant (pointer_mode
,
2145 XEXP (addr
, 0), offset
));
2148 addr
= plus_constant (address_mode
, addr
, offset
);
2151 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2153 /* If the address is a REG, change_address_1 rightfully returns memref,
2154 but this would destroy memref's MEM_ATTRS. */
2155 if (new_rtx
== memref
&& offset
!= 0)
2156 new_rtx
= copy_rtx (new_rtx
);
2158 /* Conservatively drop the object if we don't know where we start from. */
2159 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2161 attrs
.expr
= NULL_TREE
;
2165 /* Compute the new values of the memory attributes due to this adjustment.
2166 We add the offsets and update the alignment. */
2167 if (attrs
.offset_known_p
)
2169 attrs
.offset
+= offset
;
2171 /* Drop the object if the new left end is not within its bounds. */
2172 if (adjust_object
&& attrs
.offset
< 0)
2174 attrs
.expr
= NULL_TREE
;
2179 /* Compute the new alignment by taking the MIN of the alignment and the
2180 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2184 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2185 attrs
.align
= MIN (attrs
.align
, max_align
);
2190 /* Drop the object if the new right end is not within its bounds. */
2191 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2193 attrs
.expr
= NULL_TREE
;
2196 attrs
.size_known_p
= true;
2199 else if (attrs
.size_known_p
)
2201 gcc_assert (!adjust_object
);
2202 attrs
.size
-= offset
;
2203 /* ??? The store_by_pieces machinery generates negative sizes,
2204 so don't assert for that here. */
2207 set_mem_attrs (new_rtx
, &attrs
);
2212 /* Return a memory reference like MEMREF, but with its mode changed
2213 to MODE and its address changed to ADDR, which is assumed to be
2214 MEMREF offset by OFFSET bytes. If VALIDATE is
2215 nonzero, the memory address is forced to be valid. */
2218 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2219 HOST_WIDE_INT offset
, int validate
)
2221 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2222 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2225 /* Return a memory reference like MEMREF, but whose address is changed by
2226 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2227 known to be in OFFSET (possibly 1). */
2230 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2232 rtx new_rtx
, addr
= XEXP (memref
, 0);
2233 enum machine_mode address_mode
;
2234 struct mem_attrs attrs
, *defattrs
;
2236 attrs
= *get_mem_attrs (memref
);
2237 address_mode
= get_address_mode (memref
);
2238 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2240 /* At this point we don't know _why_ the address is invalid. It
2241 could have secondary memory references, multiplies or anything.
2243 However, if we did go and rearrange things, we can wind up not
2244 being able to recognize the magic around pic_offset_table_rtx.
2245 This stuff is fragile, and is yet another example of why it is
2246 bad to expose PIC machinery too early. */
2247 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2249 && GET_CODE (addr
) == PLUS
2250 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2252 addr
= force_reg (GET_MODE (addr
), addr
);
2253 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2256 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2257 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2259 /* If there are no changes, just return the original memory reference. */
2260 if (new_rtx
== memref
)
2263 /* Update the alignment to reflect the offset. Reset the offset, which
2265 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2266 attrs
.offset_known_p
= false;
2267 attrs
.size_known_p
= defattrs
->size_known_p
;
2268 attrs
.size
= defattrs
->size
;
2269 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2270 set_mem_attrs (new_rtx
, &attrs
);
2274 /* Return a memory reference like MEMREF, but with its address changed to
2275 ADDR. The caller is asserting that the actual piece of memory pointed
2276 to is the same, just the form of the address is being changed, such as
2277 by putting something into a register. */
2280 replace_equiv_address (rtx memref
, rtx addr
)
2282 /* change_address_1 copies the memory attribute structure without change
2283 and that's exactly what we want here. */
2284 update_temp_slot_address (XEXP (memref
, 0), addr
);
2285 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2288 /* Likewise, but the reference is not required to be valid. */
2291 replace_equiv_address_nv (rtx memref
, rtx addr
)
2293 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2296 /* Return a memory reference like MEMREF, but with its mode widened to
2297 MODE and offset by OFFSET. This would be used by targets that e.g.
2298 cannot issue QImode memory operations and have to use SImode memory
2299 operations plus masking logic. */
2302 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2304 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2305 struct mem_attrs attrs
;
2306 unsigned int size
= GET_MODE_SIZE (mode
);
2308 /* If there are no changes, just return the original memory reference. */
2309 if (new_rtx
== memref
)
2312 attrs
= *get_mem_attrs (new_rtx
);
2314 /* If we don't know what offset we were at within the expression, then
2315 we can't know if we've overstepped the bounds. */
2316 if (! attrs
.offset_known_p
)
2317 attrs
.expr
= NULL_TREE
;
2321 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2323 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2324 tree offset
= component_ref_field_offset (attrs
.expr
);
2326 if (! DECL_SIZE_UNIT (field
))
2328 attrs
.expr
= NULL_TREE
;
2332 /* Is the field at least as large as the access? If so, ok,
2333 otherwise strip back to the containing structure. */
2334 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2335 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2336 && attrs
.offset
>= 0)
2339 if (! host_integerp (offset
, 1))
2341 attrs
.expr
= NULL_TREE
;
2345 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2346 attrs
.offset
+= tree_low_cst (offset
, 1);
2347 attrs
.offset
+= (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2350 /* Similarly for the decl. */
2351 else if (DECL_P (attrs
.expr
)
2352 && DECL_SIZE_UNIT (attrs
.expr
)
2353 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2354 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2355 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2359 /* The widened memory access overflows the expression, which means
2360 that it could alias another expression. Zap it. */
2361 attrs
.expr
= NULL_TREE
;
2367 attrs
.offset_known_p
= false;
2369 /* The widened memory may alias other stuff, so zap the alias set. */
2370 /* ??? Maybe use get_alias_set on any remaining expression. */
2372 attrs
.size_known_p
= true;
2374 set_mem_attrs (new_rtx
, &attrs
);
2378 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2379 static GTY(()) tree spill_slot_decl
;
2382 get_spill_slot_decl (bool force_build_p
)
2384 tree d
= spill_slot_decl
;
2386 struct mem_attrs attrs
;
2388 if (d
|| !force_build_p
)
2391 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2392 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2393 DECL_ARTIFICIAL (d
) = 1;
2394 DECL_IGNORED_P (d
) = 1;
2396 spill_slot_decl
= d
;
2398 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2399 MEM_NOTRAP_P (rd
) = 1;
2400 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2401 attrs
.alias
= new_alias_set ();
2403 set_mem_attrs (rd
, &attrs
);
2404 SET_DECL_RTL (d
, rd
);
2409 /* Given MEM, a result from assign_stack_local, fill in the memory
2410 attributes as appropriate for a register allocator spill slot.
2411 These slots are not aliasable by other memory. We arrange for
2412 them all to use a single MEM_EXPR, so that the aliasing code can
2413 work properly in the case of shared spill slots. */
2416 set_mem_attrs_for_spill (rtx mem
)
2418 struct mem_attrs attrs
;
2421 attrs
= *get_mem_attrs (mem
);
2422 attrs
.expr
= get_spill_slot_decl (true);
2423 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2424 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2426 /* We expect the incoming memory to be of the form:
2427 (mem:MODE (plus (reg sfp) (const_int offset)))
2428 with perhaps the plus missing for offset = 0. */
2429 addr
= XEXP (mem
, 0);
2430 attrs
.offset_known_p
= true;
2432 if (GET_CODE (addr
) == PLUS
2433 && CONST_INT_P (XEXP (addr
, 1)))
2434 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2436 set_mem_attrs (mem
, &attrs
);
2437 MEM_NOTRAP_P (mem
) = 1;
2440 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2443 gen_label_rtx (void)
2445 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2446 NULL
, label_num
++, NULL
);
2449 /* For procedure integration. */
2451 /* Install new pointers to the first and last insns in the chain.
2452 Also, set cur_insn_uid to one higher than the last in use.
2453 Used for an inline-procedure after copying the insn chain. */
2456 set_new_first_and_last_insn (rtx first
, rtx last
)
2460 set_first_insn (first
);
2461 set_last_insn (last
);
2464 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2466 int debug_count
= 0;
2468 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2469 cur_debug_insn_uid
= 0;
2471 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2472 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2473 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2476 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2477 if (DEBUG_INSN_P (insn
))
2482 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2484 cur_debug_insn_uid
++;
2487 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2488 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2493 /* Go through all the RTL insn bodies and copy any invalid shared
2494 structure. This routine should only be called once. */
2497 unshare_all_rtl_1 (rtx insn
)
2499 /* Unshare just about everything else. */
2500 unshare_all_rtl_in_chain (insn
);
2502 /* Make sure the addresses of stack slots found outside the insn chain
2503 (such as, in DECL_RTL of a variable) are not shared
2504 with the insn chain.
2506 This special care is necessary when the stack slot MEM does not
2507 actually appear in the insn chain. If it does appear, its address
2508 is unshared from all else at that point. */
2509 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2512 /* Go through all the RTL insn bodies and copy any invalid shared
2513 structure, again. This is a fairly expensive thing to do so it
2514 should be done sparingly. */
2517 unshare_all_rtl_again (rtx insn
)
2522 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2525 reset_used_flags (PATTERN (p
));
2526 reset_used_flags (REG_NOTES (p
));
2528 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2531 /* Make sure that virtual stack slots are not shared. */
2532 set_used_decls (DECL_INITIAL (cfun
->decl
));
2534 /* Make sure that virtual parameters are not shared. */
2535 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2536 set_used_flags (DECL_RTL (decl
));
2538 reset_used_flags (stack_slot_list
);
2540 unshare_all_rtl_1 (insn
);
2544 unshare_all_rtl (void)
2546 unshare_all_rtl_1 (get_insns ());
2551 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2552 Recursively does the same for subexpressions. */
2555 verify_rtx_sharing (rtx orig
, rtx insn
)
2560 const char *format_ptr
;
2565 code
= GET_CODE (x
);
2567 /* These types may be freely shared. */
2583 /* SCRATCH must be shared because they represent distinct values. */
2586 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2587 clobbers or clobbers of hard registers that originated as pseudos.
2588 This is needed to allow safe register renaming. */
2589 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2590 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2595 if (shared_const_p (orig
))
2600 /* A MEM is allowed to be shared if its address is constant. */
2601 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2602 || reload_completed
|| reload_in_progress
)
2611 /* This rtx may not be shared. If it has already been seen,
2612 replace it with a copy of itself. */
2613 #ifdef ENABLE_CHECKING
2614 if (RTX_FLAG (x
, used
))
2616 error ("invalid rtl sharing found in the insn");
2618 error ("shared rtx");
2620 internal_error ("internal consistency failure");
2623 gcc_assert (!RTX_FLAG (x
, used
));
2625 RTX_FLAG (x
, used
) = 1;
2627 /* Now scan the subexpressions recursively. */
2629 format_ptr
= GET_RTX_FORMAT (code
);
2631 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2633 switch (*format_ptr
++)
2636 verify_rtx_sharing (XEXP (x
, i
), insn
);
2640 if (XVEC (x
, i
) != NULL
)
2643 int len
= XVECLEN (x
, i
);
2645 for (j
= 0; j
< len
; j
++)
2647 /* We allow sharing of ASM_OPERANDS inside single
2649 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2650 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2652 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2654 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2663 /* Go through all the RTL insn bodies and clear all the USED bits. */
2666 reset_all_used_flags (void)
2670 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2673 reset_used_flags (PATTERN (p
));
2674 reset_used_flags (REG_NOTES (p
));
2676 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2677 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2680 rtx q
, sequence
= PATTERN (p
);
2682 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2684 q
= XVECEXP (sequence
, 0, i
);
2685 gcc_assert (INSN_P (q
));
2686 reset_used_flags (PATTERN (q
));
2687 reset_used_flags (REG_NOTES (q
));
2689 reset_used_flags (CALL_INSN_FUNCTION_USAGE (q
));
2695 /* Go through all the RTL insn bodies and check that there is no unexpected
2696 sharing in between the subexpressions. */
2699 verify_rtl_sharing (void)
2703 timevar_push (TV_VERIFY_RTL_SHARING
);
2705 reset_all_used_flags ();
2707 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2710 verify_rtx_sharing (PATTERN (p
), p
);
2711 verify_rtx_sharing (REG_NOTES (p
), p
);
2713 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p
), p
);
2716 reset_all_used_flags ();
2718 timevar_pop (TV_VERIFY_RTL_SHARING
);
2721 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2722 Assumes the mark bits are cleared at entry. */
2725 unshare_all_rtl_in_chain (rtx insn
)
2727 for (; insn
; insn
= NEXT_INSN (insn
))
2730 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2731 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2733 CALL_INSN_FUNCTION_USAGE (insn
)
2734 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2738 /* Go through all virtual stack slots of a function and mark them as
2739 shared. We never replace the DECL_RTLs themselves with a copy,
2740 but expressions mentioned into a DECL_RTL cannot be shared with
2741 expressions in the instruction stream.
2743 Note that reload may convert pseudo registers into memories in-place.
2744 Pseudo registers are always shared, but MEMs never are. Thus if we
2745 reset the used flags on MEMs in the instruction stream, we must set
2746 them again on MEMs that appear in DECL_RTLs. */
2749 set_used_decls (tree blk
)
2754 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2755 if (DECL_RTL_SET_P (t
))
2756 set_used_flags (DECL_RTL (t
));
2758 /* Now process sub-blocks. */
2759 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2763 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2764 Recursively does the same for subexpressions. Uses
2765 copy_rtx_if_shared_1 to reduce stack space. */
2768 copy_rtx_if_shared (rtx orig
)
2770 copy_rtx_if_shared_1 (&orig
);
2774 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2775 use. Recursively does the same for subexpressions. */
2778 copy_rtx_if_shared_1 (rtx
*orig1
)
2784 const char *format_ptr
;
2788 /* Repeat is used to turn tail-recursion into iteration. */
2795 code
= GET_CODE (x
);
2797 /* These types may be freely shared. */
2813 /* SCRATCH must be shared because they represent distinct values. */
2816 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2817 clobbers or clobbers of hard registers that originated as pseudos.
2818 This is needed to allow safe register renaming. */
2819 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2820 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2825 if (shared_const_p (x
))
2835 /* The chain of insns is not being copied. */
2842 /* This rtx may not be shared. If it has already been seen,
2843 replace it with a copy of itself. */
2845 if (RTX_FLAG (x
, used
))
2847 x
= shallow_copy_rtx (x
);
2850 RTX_FLAG (x
, used
) = 1;
2852 /* Now scan the subexpressions recursively.
2853 We can store any replaced subexpressions directly into X
2854 since we know X is not shared! Any vectors in X
2855 must be copied if X was copied. */
2857 format_ptr
= GET_RTX_FORMAT (code
);
2858 length
= GET_RTX_LENGTH (code
);
2861 for (i
= 0; i
< length
; i
++)
2863 switch (*format_ptr
++)
2867 copy_rtx_if_shared_1 (last_ptr
);
2868 last_ptr
= &XEXP (x
, i
);
2872 if (XVEC (x
, i
) != NULL
)
2875 int len
= XVECLEN (x
, i
);
2877 /* Copy the vector iff I copied the rtx and the length
2879 if (copied
&& len
> 0)
2880 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2882 /* Call recursively on all inside the vector. */
2883 for (j
= 0; j
< len
; j
++)
2886 copy_rtx_if_shared_1 (last_ptr
);
2887 last_ptr
= &XVECEXP (x
, i
, j
);
2902 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2905 mark_used_flags (rtx x
, int flag
)
2909 const char *format_ptr
;
2912 /* Repeat is used to turn tail-recursion into iteration. */
2917 code
= GET_CODE (x
);
2919 /* These types may be freely shared so we needn't do any resetting
2943 /* The chain of insns is not being copied. */
2950 RTX_FLAG (x
, used
) = flag
;
2952 format_ptr
= GET_RTX_FORMAT (code
);
2953 length
= GET_RTX_LENGTH (code
);
2955 for (i
= 0; i
< length
; i
++)
2957 switch (*format_ptr
++)
2965 mark_used_flags (XEXP (x
, i
), flag
);
2969 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2970 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
2976 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2977 to look for shared sub-parts. */
2980 reset_used_flags (rtx x
)
2982 mark_used_flags (x
, 0);
2985 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2986 to look for shared sub-parts. */
2989 set_used_flags (rtx x
)
2991 mark_used_flags (x
, 1);
2994 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2995 Return X or the rtx for the pseudo reg the value of X was copied into.
2996 OTHER must be valid as a SET_DEST. */
2999 make_safe_from (rtx x
, rtx other
)
3002 switch (GET_CODE (other
))
3005 other
= SUBREG_REG (other
);
3007 case STRICT_LOW_PART
:
3010 other
= XEXP (other
, 0);
3019 && GET_CODE (x
) != SUBREG
)
3021 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3022 || reg_mentioned_p (other
, x
))))
3024 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3025 emit_move_insn (temp
, x
);
3031 /* Emission of insns (adding them to the doubly-linked list). */
3033 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3036 get_last_insn_anywhere (void)
3038 struct sequence_stack
*stack
;
3039 if (get_last_insn ())
3040 return get_last_insn ();
3041 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3042 if (stack
->last
!= 0)
3047 /* Return the first nonnote insn emitted in current sequence or current
3048 function. This routine looks inside SEQUENCEs. */
3051 get_first_nonnote_insn (void)
3053 rtx insn
= get_insns ();
3058 for (insn
= next_insn (insn
);
3059 insn
&& NOTE_P (insn
);
3060 insn
= next_insn (insn
))
3064 if (NONJUMP_INSN_P (insn
)
3065 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3066 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3073 /* Return the last nonnote insn emitted in current sequence or current
3074 function. This routine looks inside SEQUENCEs. */
3077 get_last_nonnote_insn (void)
3079 rtx insn
= get_last_insn ();
3084 for (insn
= previous_insn (insn
);
3085 insn
&& NOTE_P (insn
);
3086 insn
= previous_insn (insn
))
3090 if (NONJUMP_INSN_P (insn
)
3091 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3092 insn
= XVECEXP (PATTERN (insn
), 0,
3093 XVECLEN (PATTERN (insn
), 0) - 1);
3100 /* Return the number of actual (non-debug) insns emitted in this
3104 get_max_insn_count (void)
3106 int n
= cur_insn_uid
;
3108 /* The table size must be stable across -g, to avoid codegen
3109 differences due to debug insns, and not be affected by
3110 -fmin-insn-uid, to avoid excessive table size and to simplify
3111 debugging of -fcompare-debug failures. */
3112 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3113 n
-= cur_debug_insn_uid
;
3115 n
-= MIN_NONDEBUG_INSN_UID
;
3121 /* Return the next insn. If it is a SEQUENCE, return the first insn
3125 next_insn (rtx insn
)
3129 insn
= NEXT_INSN (insn
);
3130 if (insn
&& NONJUMP_INSN_P (insn
)
3131 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3132 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3138 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3142 previous_insn (rtx insn
)
3146 insn
= PREV_INSN (insn
);
3147 if (insn
&& NONJUMP_INSN_P (insn
)
3148 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3149 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3155 /* Return the next insn after INSN that is not a NOTE. This routine does not
3156 look inside SEQUENCEs. */
3159 next_nonnote_insn (rtx insn
)
3163 insn
= NEXT_INSN (insn
);
3164 if (insn
== 0 || !NOTE_P (insn
))
3171 /* Return the next insn after INSN that is not a NOTE, but stop the
3172 search before we enter another basic block. This routine does not
3173 look inside SEQUENCEs. */
3176 next_nonnote_insn_bb (rtx insn
)
3180 insn
= NEXT_INSN (insn
);
3181 if (insn
== 0 || !NOTE_P (insn
))
3183 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3190 /* Return the previous insn before INSN that is not a NOTE. This routine does
3191 not look inside SEQUENCEs. */
3194 prev_nonnote_insn (rtx insn
)
3198 insn
= PREV_INSN (insn
);
3199 if (insn
== 0 || !NOTE_P (insn
))
3206 /* Return the previous insn before INSN that is not a NOTE, but stop
3207 the search before we enter another basic block. This routine does
3208 not look inside SEQUENCEs. */
3211 prev_nonnote_insn_bb (rtx insn
)
3215 insn
= PREV_INSN (insn
);
3216 if (insn
== 0 || !NOTE_P (insn
))
3218 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3225 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3226 routine does not look inside SEQUENCEs. */
3229 next_nondebug_insn (rtx insn
)
3233 insn
= NEXT_INSN (insn
);
3234 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3241 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3242 This routine does not look inside SEQUENCEs. */
3245 prev_nondebug_insn (rtx insn
)
3249 insn
= PREV_INSN (insn
);
3250 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3257 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3258 This routine does not look inside SEQUENCEs. */
3261 next_nonnote_nondebug_insn (rtx insn
)
3265 insn
= NEXT_INSN (insn
);
3266 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3273 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3274 This routine does not look inside SEQUENCEs. */
3277 prev_nonnote_nondebug_insn (rtx insn
)
3281 insn
= PREV_INSN (insn
);
3282 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3289 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3290 or 0, if there is none. This routine does not look inside
3294 next_real_insn (rtx insn
)
3298 insn
= NEXT_INSN (insn
);
3299 if (insn
== 0 || INSN_P (insn
))
3306 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3307 or 0, if there is none. This routine does not look inside
3311 prev_real_insn (rtx insn
)
3315 insn
= PREV_INSN (insn
);
3316 if (insn
== 0 || INSN_P (insn
))
3323 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3324 This routine does not look inside SEQUENCEs. */
3327 last_call_insn (void)
3331 for (insn
= get_last_insn ();
3332 insn
&& !CALL_P (insn
);
3333 insn
= PREV_INSN (insn
))
3339 /* Find the next insn after INSN that really does something. This routine
3340 does not look inside SEQUENCEs. After reload this also skips over
3341 standalone USE and CLOBBER insn. */
3344 active_insn_p (const_rtx insn
)
3346 return (CALL_P (insn
) || JUMP_P (insn
)
3347 || (NONJUMP_INSN_P (insn
)
3348 && (! reload_completed
3349 || (GET_CODE (PATTERN (insn
)) != USE
3350 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3354 next_active_insn (rtx insn
)
3358 insn
= NEXT_INSN (insn
);
3359 if (insn
== 0 || active_insn_p (insn
))
3366 /* Find the last insn before INSN that really does something. This routine
3367 does not look inside SEQUENCEs. After reload this also skips over
3368 standalone USE and CLOBBER insn. */
3371 prev_active_insn (rtx insn
)
3375 insn
= PREV_INSN (insn
);
3376 if (insn
== 0 || active_insn_p (insn
))
3383 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3386 next_label (rtx insn
)
3390 insn
= NEXT_INSN (insn
);
3391 if (insn
== 0 || LABEL_P (insn
))
3398 /* Return the last label to mark the same position as LABEL. Return LABEL
3399 itself if it is null or any return rtx. */
3402 skip_consecutive_labels (rtx label
)
3406 if (label
&& ANY_RETURN_P (label
))
3409 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3417 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3418 and REG_CC_USER notes so we can find it. */
3421 link_cc0_insns (rtx insn
)
3423 rtx user
= next_nonnote_insn (insn
);
3425 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3426 user
= XVECEXP (PATTERN (user
), 0, 0);
3428 add_reg_note (user
, REG_CC_SETTER
, insn
);
3429 add_reg_note (insn
, REG_CC_USER
, user
);
3432 /* Return the next insn that uses CC0 after INSN, which is assumed to
3433 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3434 applied to the result of this function should yield INSN).
3436 Normally, this is simply the next insn. However, if a REG_CC_USER note
3437 is present, it contains the insn that uses CC0.
3439 Return 0 if we can't find the insn. */
3442 next_cc0_user (rtx insn
)
3444 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3447 return XEXP (note
, 0);
3449 insn
= next_nonnote_insn (insn
);
3450 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3451 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3453 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3459 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3460 note, it is the previous insn. */
3463 prev_cc0_setter (rtx insn
)
3465 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3468 return XEXP (note
, 0);
3470 insn
= prev_nonnote_insn (insn
);
3471 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3478 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3481 find_auto_inc (rtx
*xp
, void *data
)
3484 rtx reg
= (rtx
) data
;
3486 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3489 switch (GET_CODE (x
))
3497 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3508 /* Increment the label uses for all labels present in rtx. */
3511 mark_label_nuses (rtx x
)
3517 code
= GET_CODE (x
);
3518 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3519 LABEL_NUSES (XEXP (x
, 0))++;
3521 fmt
= GET_RTX_FORMAT (code
);
3522 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3525 mark_label_nuses (XEXP (x
, i
));
3526 else if (fmt
[i
] == 'E')
3527 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3528 mark_label_nuses (XVECEXP (x
, i
, j
));
3533 /* Try splitting insns that can be split for better scheduling.
3534 PAT is the pattern which might split.
3535 TRIAL is the insn providing PAT.
3536 LAST is nonzero if we should return the last insn of the sequence produced.
3538 If this routine succeeds in splitting, it returns the first or last
3539 replacement insn depending on the value of LAST. Otherwise, it
3540 returns TRIAL. If the insn to be returned can be split, it will be. */
3543 try_split (rtx pat
, rtx trial
, int last
)
3545 rtx before
= PREV_INSN (trial
);
3546 rtx after
= NEXT_INSN (trial
);
3547 int has_barrier
= 0;
3550 rtx insn_last
, insn
;
3553 /* We're not good at redistributing frame information. */
3554 if (RTX_FRAME_RELATED_P (trial
))
3557 if (any_condjump_p (trial
)
3558 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3559 split_branch_probability
= INTVAL (XEXP (note
, 0));
3560 probability
= split_branch_probability
;
3562 seq
= split_insns (pat
, trial
);
3564 split_branch_probability
= -1;
3566 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3567 We may need to handle this specially. */
3568 if (after
&& BARRIER_P (after
))
3571 after
= NEXT_INSN (after
);
3577 /* Avoid infinite loop if any insn of the result matches
3578 the original pattern. */
3582 if (INSN_P (insn_last
)
3583 && rtx_equal_p (PATTERN (insn_last
), pat
))
3585 if (!NEXT_INSN (insn_last
))
3587 insn_last
= NEXT_INSN (insn_last
);
3590 /* We will be adding the new sequence to the function. The splitters
3591 may have introduced invalid RTL sharing, so unshare the sequence now. */
3592 unshare_all_rtl_in_chain (seq
);
3595 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3599 mark_jump_label (PATTERN (insn
), insn
, 0);
3601 if (probability
!= -1
3602 && any_condjump_p (insn
)
3603 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3605 /* We can preserve the REG_BR_PROB notes only if exactly
3606 one jump is created, otherwise the machine description
3607 is responsible for this step using
3608 split_branch_probability variable. */
3609 gcc_assert (njumps
== 1);
3610 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (probability
));
3615 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3616 in SEQ and copy any additional information across. */
3619 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3624 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3625 target may have explicitly specified. */
3626 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3629 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3631 /* If the old call was a sibling call, the new one must
3633 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3635 /* If the new call is the last instruction in the sequence,
3636 it will effectively replace the old call in-situ. Otherwise
3637 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3638 so that it comes immediately after the new call. */
3639 if (NEXT_INSN (insn
))
3640 for (next
= NEXT_INSN (trial
);
3641 next
&& NOTE_P (next
);
3642 next
= NEXT_INSN (next
))
3643 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3646 add_insn_after (next
, insn
, NULL
);
3652 /* Copy notes, particularly those related to the CFG. */
3653 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3655 switch (REG_NOTE_KIND (note
))
3658 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3664 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3667 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3671 case REG_NON_LOCAL_GOTO
:
3672 case REG_CROSSING_JUMP
:
3673 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3676 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3682 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3684 rtx reg
= XEXP (note
, 0);
3685 if (!FIND_REG_INC_NOTE (insn
, reg
)
3686 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3687 add_reg_note (insn
, REG_INC
, reg
);
3693 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3701 /* If there are LABELS inside the split insns increment the
3702 usage count so we don't delete the label. */
3706 while (insn
!= NULL_RTX
)
3708 /* JUMP_P insns have already been "marked" above. */
3709 if (NONJUMP_INSN_P (insn
))
3710 mark_label_nuses (PATTERN (insn
));
3712 insn
= PREV_INSN (insn
);
3716 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3718 delete_insn (trial
);
3720 emit_barrier_after (tem
);
3722 /* Recursively call try_split for each new insn created; by the
3723 time control returns here that insn will be fully split, so
3724 set LAST and continue from the insn after the one returned.
3725 We can't use next_active_insn here since AFTER may be a note.
3726 Ignore deleted insns, which can be occur if not optimizing. */
3727 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3728 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3729 tem
= try_split (PATTERN (tem
), tem
, 1);
3731 /* Return either the first or the last insn, depending on which was
3734 ? (after
? PREV_INSN (after
) : get_last_insn ())
3735 : NEXT_INSN (before
);
3738 /* Make and return an INSN rtx, initializing all its slots.
3739 Store PATTERN in the pattern slots. */
3742 make_insn_raw (rtx pattern
)
3746 insn
= rtx_alloc (INSN
);
3748 INSN_UID (insn
) = cur_insn_uid
++;
3749 PATTERN (insn
) = pattern
;
3750 INSN_CODE (insn
) = -1;
3751 REG_NOTES (insn
) = NULL
;
3752 INSN_LOCATION (insn
) = curr_insn_location ();
3753 BLOCK_FOR_INSN (insn
) = NULL
;
3755 #ifdef ENABLE_RTL_CHECKING
3758 && (returnjump_p (insn
)
3759 || (GET_CODE (insn
) == SET
3760 && SET_DEST (insn
) == pc_rtx
)))
3762 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3770 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3773 make_debug_insn_raw (rtx pattern
)
3777 insn
= rtx_alloc (DEBUG_INSN
);
3778 INSN_UID (insn
) = cur_debug_insn_uid
++;
3779 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3780 INSN_UID (insn
) = cur_insn_uid
++;
3782 PATTERN (insn
) = pattern
;
3783 INSN_CODE (insn
) = -1;
3784 REG_NOTES (insn
) = NULL
;
3785 INSN_LOCATION (insn
) = curr_insn_location ();
3786 BLOCK_FOR_INSN (insn
) = NULL
;
3791 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3794 make_jump_insn_raw (rtx pattern
)
3798 insn
= rtx_alloc (JUMP_INSN
);
3799 INSN_UID (insn
) = cur_insn_uid
++;
3801 PATTERN (insn
) = pattern
;
3802 INSN_CODE (insn
) = -1;
3803 REG_NOTES (insn
) = NULL
;
3804 JUMP_LABEL (insn
) = NULL
;
3805 INSN_LOCATION (insn
) = curr_insn_location ();
3806 BLOCK_FOR_INSN (insn
) = NULL
;
3811 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3814 make_call_insn_raw (rtx pattern
)
3818 insn
= rtx_alloc (CALL_INSN
);
3819 INSN_UID (insn
) = cur_insn_uid
++;
3821 PATTERN (insn
) = pattern
;
3822 INSN_CODE (insn
) = -1;
3823 REG_NOTES (insn
) = NULL
;
3824 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3825 INSN_LOCATION (insn
) = curr_insn_location ();
3826 BLOCK_FOR_INSN (insn
) = NULL
;
3831 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3834 make_note_raw (enum insn_note subtype
)
3836 /* Some notes are never created this way at all. These notes are
3837 only created by patching out insns. */
3838 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3839 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3841 rtx note
= rtx_alloc (NOTE
);
3842 INSN_UID (note
) = cur_insn_uid
++;
3843 NOTE_KIND (note
) = subtype
;
3844 BLOCK_FOR_INSN (note
) = NULL
;
3845 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3849 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3850 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3851 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3854 link_insn_into_chain (rtx insn
, rtx prev
, rtx next
)
3856 PREV_INSN (insn
) = prev
;
3857 NEXT_INSN (insn
) = next
;
3860 NEXT_INSN (prev
) = insn
;
3861 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3863 rtx sequence
= PATTERN (prev
);
3864 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3869 PREV_INSN (next
) = insn
;
3870 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3871 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3875 /* Add INSN to the end of the doubly-linked list.
3876 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3881 rtx prev
= get_last_insn ();
3882 link_insn_into_chain (insn
, prev
, NULL
);
3883 if (NULL
== get_insns ())
3884 set_first_insn (insn
);
3885 set_last_insn (insn
);
3888 /* Add INSN into the doubly-linked list after insn AFTER. */
3891 add_insn_after_nobb (rtx insn
, rtx after
)
3893 rtx next
= NEXT_INSN (after
);
3895 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3897 link_insn_into_chain (insn
, after
, next
);
3901 if (get_last_insn () == after
)
3902 set_last_insn (insn
);
3905 struct sequence_stack
*stack
= seq_stack
;
3906 /* Scan all pending sequences too. */
3907 for (; stack
; stack
= stack
->next
)
3908 if (after
== stack
->last
)
3917 /* Add INSN into the doubly-linked list before insn BEFORE. */
3920 add_insn_before_nobb (rtx insn
, rtx before
)
3922 rtx prev
= PREV_INSN (before
);
3924 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3926 link_insn_into_chain (insn
, prev
, before
);
3930 if (get_insns () == before
)
3931 set_first_insn (insn
);
3934 struct sequence_stack
*stack
= seq_stack
;
3935 /* Scan all pending sequences too. */
3936 for (; stack
; stack
= stack
->next
)
3937 if (before
== stack
->first
)
3939 stack
->first
= insn
;
3948 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
3949 If BB is NULL, an attempt is made to infer the bb from before.
3951 This and the next function should be the only functions called
3952 to insert an insn once delay slots have been filled since only
3953 they know how to update a SEQUENCE. */
3956 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3958 add_insn_after_nobb (insn
, after
);
3959 if (!BARRIER_P (after
)
3960 && !BARRIER_P (insn
)
3961 && (bb
= BLOCK_FOR_INSN (after
)))
3963 set_block_for_insn (insn
, bb
);
3965 df_insn_rescan (insn
);
3966 /* Should not happen as first in the BB is always
3967 either NOTE or LABEL. */
3968 if (BB_END (bb
) == after
3969 /* Avoid clobbering of structure when creating new BB. */
3970 && !BARRIER_P (insn
)
3971 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3976 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
3977 If BB is NULL, an attempt is made to infer the bb from before.
3979 This and the previous function should be the only functions called
3980 to insert an insn once delay slots have been filled since only
3981 they know how to update a SEQUENCE. */
3984 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3986 add_insn_before_nobb (insn
, before
);
3989 && !BARRIER_P (before
)
3990 && !BARRIER_P (insn
))
3991 bb
= BLOCK_FOR_INSN (before
);
3995 set_block_for_insn (insn
, bb
);
3997 df_insn_rescan (insn
);
3998 /* Should not happen as first in the BB is always either NOTE or
4000 gcc_assert (BB_HEAD (bb
) != insn
4001 /* Avoid clobbering of structure when creating new BB. */
4003 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4007 /* Replace insn with an deleted instruction note. */
4010 set_insn_deleted (rtx insn
)
4012 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
4013 PUT_CODE (insn
, NOTE
);
4014 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4018 /* Remove an insn from its doubly-linked list. This function knows how
4019 to handle sequences. */
4021 remove_insn (rtx insn
)
4023 rtx next
= NEXT_INSN (insn
);
4024 rtx prev
= PREV_INSN (insn
);
4027 /* Later in the code, the block will be marked dirty. */
4028 df_insn_delete (NULL
, INSN_UID (insn
));
4032 NEXT_INSN (prev
) = next
;
4033 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4035 rtx sequence
= PATTERN (prev
);
4036 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
4039 else if (get_insns () == insn
)
4042 PREV_INSN (next
) = NULL
;
4043 set_first_insn (next
);
4047 struct sequence_stack
*stack
= seq_stack
;
4048 /* Scan all pending sequences too. */
4049 for (; stack
; stack
= stack
->next
)
4050 if (insn
== stack
->first
)
4052 stack
->first
= next
;
4061 PREV_INSN (next
) = prev
;
4062 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4063 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
4065 else if (get_last_insn () == insn
)
4066 set_last_insn (prev
);
4069 struct sequence_stack
*stack
= seq_stack
;
4070 /* Scan all pending sequences too. */
4071 for (; stack
; stack
= stack
->next
)
4072 if (insn
== stack
->last
)
4080 if (!BARRIER_P (insn
)
4081 && (bb
= BLOCK_FOR_INSN (insn
)))
4083 if (NONDEBUG_INSN_P (insn
))
4084 df_set_bb_dirty (bb
);
4085 if (BB_HEAD (bb
) == insn
)
4087 /* Never ever delete the basic block note without deleting whole
4089 gcc_assert (!NOTE_P (insn
));
4090 BB_HEAD (bb
) = next
;
4092 if (BB_END (bb
) == insn
)
4097 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4100 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4102 gcc_assert (call_insn
&& CALL_P (call_insn
));
4104 /* Put the register usage information on the CALL. If there is already
4105 some usage information, put ours at the end. */
4106 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4110 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4111 link
= XEXP (link
, 1))
4114 XEXP (link
, 1) = call_fusage
;
4117 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4120 /* Delete all insns made since FROM.
4121 FROM becomes the new last instruction. */
4124 delete_insns_since (rtx from
)
4129 NEXT_INSN (from
) = 0;
4130 set_last_insn (from
);
4133 /* This function is deprecated, please use sequences instead.
4135 Move a consecutive bunch of insns to a different place in the chain.
4136 The insns to be moved are those between FROM and TO.
4137 They are moved to a new position after the insn AFTER.
4138 AFTER must not be FROM or TO or any insn in between.
4140 This function does not know about SEQUENCEs and hence should not be
4141 called after delay-slot filling has been done. */
4144 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4146 #ifdef ENABLE_CHECKING
4148 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4149 gcc_assert (after
!= x
);
4150 gcc_assert (after
!= to
);
4153 /* Splice this bunch out of where it is now. */
4154 if (PREV_INSN (from
))
4155 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4157 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4158 if (get_last_insn () == to
)
4159 set_last_insn (PREV_INSN (from
));
4160 if (get_insns () == from
)
4161 set_first_insn (NEXT_INSN (to
));
4163 /* Make the new neighbors point to it and it to them. */
4164 if (NEXT_INSN (after
))
4165 PREV_INSN (NEXT_INSN (after
)) = to
;
4167 NEXT_INSN (to
) = NEXT_INSN (after
);
4168 PREV_INSN (from
) = after
;
4169 NEXT_INSN (after
) = from
;
4170 if (after
== get_last_insn())
4174 /* Same as function above, but take care to update BB boundaries. */
4176 reorder_insns (rtx from
, rtx to
, rtx after
)
4178 rtx prev
= PREV_INSN (from
);
4179 basic_block bb
, bb2
;
4181 reorder_insns_nobb (from
, to
, after
);
4183 if (!BARRIER_P (after
)
4184 && (bb
= BLOCK_FOR_INSN (after
)))
4187 df_set_bb_dirty (bb
);
4189 if (!BARRIER_P (from
)
4190 && (bb2
= BLOCK_FOR_INSN (from
)))
4192 if (BB_END (bb2
) == to
)
4193 BB_END (bb2
) = prev
;
4194 df_set_bb_dirty (bb2
);
4197 if (BB_END (bb
) == after
)
4200 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4202 df_insn_change_bb (x
, bb
);
4207 /* Emit insn(s) of given code and pattern
4208 at a specified place within the doubly-linked list.
4210 All of the emit_foo global entry points accept an object
4211 X which is either an insn list or a PATTERN of a single
4214 There are thus a few canonical ways to generate code and
4215 emit it at a specific place in the instruction stream. For
4216 example, consider the instruction named SPOT and the fact that
4217 we would like to emit some instructions before SPOT. We might
4221 ... emit the new instructions ...
4222 insns_head = get_insns ();
4225 emit_insn_before (insns_head, SPOT);
4227 It used to be common to generate SEQUENCE rtl instead, but that
4228 is a relic of the past which no longer occurs. The reason is that
4229 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4230 generated would almost certainly die right after it was created. */
4233 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4234 rtx (*make_raw
) (rtx
))
4238 gcc_assert (before
);
4243 switch (GET_CODE (x
))
4255 rtx next
= NEXT_INSN (insn
);
4256 add_insn_before (insn
, before
, bb
);
4262 #ifdef ENABLE_RTL_CHECKING
4269 last
= (*make_raw
) (x
);
4270 add_insn_before (last
, before
, bb
);
4277 /* Make X be output before the instruction BEFORE. */
4280 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4282 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4285 /* Make an instruction with body X and code JUMP_INSN
4286 and output it before the instruction BEFORE. */
4289 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4291 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4292 make_jump_insn_raw
);
4295 /* Make an instruction with body X and code CALL_INSN
4296 and output it before the instruction BEFORE. */
4299 emit_call_insn_before_noloc (rtx x
, rtx before
)
4301 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4302 make_call_insn_raw
);
4305 /* Make an instruction with body X and code DEBUG_INSN
4306 and output it before the instruction BEFORE. */
4309 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4311 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4312 make_debug_insn_raw
);
4315 /* Make an insn of code BARRIER
4316 and output it before the insn BEFORE. */
4319 emit_barrier_before (rtx before
)
4321 rtx insn
= rtx_alloc (BARRIER
);
4323 INSN_UID (insn
) = cur_insn_uid
++;
4325 add_insn_before (insn
, before
, NULL
);
4329 /* Emit the label LABEL before the insn BEFORE. */
4332 emit_label_before (rtx label
, rtx before
)
4334 gcc_checking_assert (INSN_UID (label
) == 0);
4335 INSN_UID (label
) = cur_insn_uid
++;
4336 add_insn_before (label
, before
, NULL
);
4340 /* Helper for emit_insn_after, handles lists of instructions
4344 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4348 if (!bb
&& !BARRIER_P (after
))
4349 bb
= BLOCK_FOR_INSN (after
);
4353 df_set_bb_dirty (bb
);
4354 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4355 if (!BARRIER_P (last
))
4357 set_block_for_insn (last
, bb
);
4358 df_insn_rescan (last
);
4360 if (!BARRIER_P (last
))
4362 set_block_for_insn (last
, bb
);
4363 df_insn_rescan (last
);
4365 if (BB_END (bb
) == after
)
4369 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4372 after_after
= NEXT_INSN (after
);
4374 NEXT_INSN (after
) = first
;
4375 PREV_INSN (first
) = after
;
4376 NEXT_INSN (last
) = after_after
;
4378 PREV_INSN (after_after
) = last
;
4380 if (after
== get_last_insn())
4381 set_last_insn (last
);
4387 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4388 rtx (*make_raw
)(rtx
))
4397 switch (GET_CODE (x
))
4406 last
= emit_insn_after_1 (x
, after
, bb
);
4409 #ifdef ENABLE_RTL_CHECKING
4416 last
= (*make_raw
) (x
);
4417 add_insn_after (last
, after
, bb
);
4424 /* Make X be output after the insn AFTER and set the BB of insn. If
4425 BB is NULL, an attempt is made to infer the BB from AFTER. */
4428 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4430 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4434 /* Make an insn of code JUMP_INSN with body X
4435 and output it after the insn AFTER. */
4438 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4440 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4443 /* Make an instruction with body X and code CALL_INSN
4444 and output it after the instruction AFTER. */
4447 emit_call_insn_after_noloc (rtx x
, rtx after
)
4449 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4452 /* Make an instruction with body X and code CALL_INSN
4453 and output it after the instruction AFTER. */
4456 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4458 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4461 /* Make an insn of code BARRIER
4462 and output it after the insn AFTER. */
4465 emit_barrier_after (rtx after
)
4467 rtx insn
= rtx_alloc (BARRIER
);
4469 INSN_UID (insn
) = cur_insn_uid
++;
4471 add_insn_after (insn
, after
, NULL
);
4475 /* Emit the label LABEL after the insn AFTER. */
4478 emit_label_after (rtx label
, rtx after
)
4480 gcc_checking_assert (INSN_UID (label
) == 0);
4481 INSN_UID (label
) = cur_insn_uid
++;
4482 add_insn_after (label
, after
, NULL
);
4486 /* Notes require a bit of special handling: Some notes need to have their
4487 BLOCK_FOR_INSN set, others should never have it set, and some should
4488 have it set or clear depending on the context. */
4490 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4491 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4492 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4495 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4499 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4500 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4503 /* Notes for var tracking and EH region markers can appear between or
4504 inside basic blocks. If the caller is emitting on the basic block
4505 boundary, do not set BLOCK_FOR_INSN on the new note. */
4506 case NOTE_INSN_VAR_LOCATION
:
4507 case NOTE_INSN_CALL_ARG_LOCATION
:
4508 case NOTE_INSN_EH_REGION_BEG
:
4509 case NOTE_INSN_EH_REGION_END
:
4510 return on_bb_boundary_p
;
4512 /* Otherwise, BLOCK_FOR_INSN must be set. */
4518 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4521 emit_note_after (enum insn_note subtype
, rtx after
)
4523 rtx note
= make_note_raw (subtype
);
4524 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4525 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4527 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4528 add_insn_after_nobb (note
, after
);
4530 add_insn_after (note
, after
, bb
);
4534 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4537 emit_note_before (enum insn_note subtype
, rtx before
)
4539 rtx note
= make_note_raw (subtype
);
4540 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4541 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4543 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4544 add_insn_before_nobb (note
, before
);
4546 add_insn_before (note
, before
, bb
);
4550 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4551 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4554 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4555 rtx (*make_raw
) (rtx
))
4557 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4559 if (pattern
== NULL_RTX
|| !loc
)
4562 after
= NEXT_INSN (after
);
4565 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4566 INSN_LOCATION (after
) = loc
;
4569 after
= NEXT_INSN (after
);
4574 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4575 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4579 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4580 rtx (*make_raw
) (rtx
))
4584 if (skip_debug_insns
)
4585 while (DEBUG_INSN_P (prev
))
4586 prev
= PREV_INSN (prev
);
4589 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4592 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4595 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4597 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4599 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4602 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4604 emit_insn_after (rtx pattern
, rtx after
)
4606 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4609 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4611 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4613 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4616 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4618 emit_jump_insn_after (rtx pattern
, rtx after
)
4620 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4623 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4625 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4627 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4630 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4632 emit_call_insn_after (rtx pattern
, rtx after
)
4634 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4637 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4639 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4641 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4644 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4646 emit_debug_insn_after (rtx pattern
, rtx after
)
4648 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4651 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4652 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4653 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4657 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4658 rtx (*make_raw
) (rtx
))
4660 rtx first
= PREV_INSN (before
);
4661 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4662 insnp
? before
: NULL_RTX
,
4665 if (pattern
== NULL_RTX
|| !loc
)
4669 first
= get_insns ();
4671 first
= NEXT_INSN (first
);
4674 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4675 INSN_LOCATION (first
) = loc
;
4678 first
= NEXT_INSN (first
);
4683 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4684 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4685 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4686 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4689 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4690 bool insnp
, rtx (*make_raw
) (rtx
))
4694 if (skip_debug_insns
)
4695 while (DEBUG_INSN_P (next
))
4696 next
= PREV_INSN (next
);
4699 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4702 return emit_pattern_before_noloc (pattern
, before
,
4703 insnp
? before
: NULL_RTX
,
4707 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4709 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4711 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4715 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4717 emit_insn_before (rtx pattern
, rtx before
)
4719 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4722 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4724 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4726 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4727 make_jump_insn_raw
);
4730 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4732 emit_jump_insn_before (rtx pattern
, rtx before
)
4734 return emit_pattern_before (pattern
, before
, true, false,
4735 make_jump_insn_raw
);
4738 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4740 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4742 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4743 make_call_insn_raw
);
4746 /* Like emit_call_insn_before_noloc,
4747 but set insn_location according to BEFORE. */
4749 emit_call_insn_before (rtx pattern
, rtx before
)
4751 return emit_pattern_before (pattern
, before
, true, false,
4752 make_call_insn_raw
);
4755 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4757 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4759 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4760 make_debug_insn_raw
);
4763 /* Like emit_debug_insn_before_noloc,
4764 but set insn_location according to BEFORE. */
4766 emit_debug_insn_before (rtx pattern
, rtx before
)
4768 return emit_pattern_before (pattern
, before
, false, false,
4769 make_debug_insn_raw
);
4772 /* Take X and emit it at the end of the doubly-linked
4775 Returns the last insn emitted. */
4780 rtx last
= get_last_insn();
4786 switch (GET_CODE (x
))
4798 rtx next
= NEXT_INSN (insn
);
4805 #ifdef ENABLE_RTL_CHECKING
4812 last
= make_insn_raw (x
);
4820 /* Make an insn of code DEBUG_INSN with pattern X
4821 and add it to the end of the doubly-linked list. */
4824 emit_debug_insn (rtx x
)
4826 rtx last
= get_last_insn();
4832 switch (GET_CODE (x
))
4844 rtx next
= NEXT_INSN (insn
);
4851 #ifdef ENABLE_RTL_CHECKING
4858 last
= make_debug_insn_raw (x
);
4866 /* Make an insn of code JUMP_INSN with pattern X
4867 and add it to the end of the doubly-linked list. */
4870 emit_jump_insn (rtx x
)
4872 rtx last
= NULL_RTX
, insn
;
4874 switch (GET_CODE (x
))
4886 rtx next
= NEXT_INSN (insn
);
4893 #ifdef ENABLE_RTL_CHECKING
4900 last
= make_jump_insn_raw (x
);
4908 /* Make an insn of code CALL_INSN with pattern X
4909 and add it to the end of the doubly-linked list. */
4912 emit_call_insn (rtx x
)
4916 switch (GET_CODE (x
))
4925 insn
= emit_insn (x
);
4928 #ifdef ENABLE_RTL_CHECKING
4935 insn
= make_call_insn_raw (x
);
4943 /* Add the label LABEL to the end of the doubly-linked list. */
4946 emit_label (rtx label
)
4948 gcc_checking_assert (INSN_UID (label
) == 0);
4949 INSN_UID (label
) = cur_insn_uid
++;
4954 /* Make an insn of code BARRIER
4955 and add it to the end of the doubly-linked list. */
4960 rtx barrier
= rtx_alloc (BARRIER
);
4961 INSN_UID (barrier
) = cur_insn_uid
++;
4966 /* Emit a copy of note ORIG. */
4969 emit_note_copy (rtx orig
)
4971 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
4972 rtx note
= make_note_raw (kind
);
4973 NOTE_DATA (note
) = NOTE_DATA (orig
);
4978 /* Make an insn of code NOTE or type NOTE_NO
4979 and add it to the end of the doubly-linked list. */
4982 emit_note (enum insn_note kind
)
4984 rtx note
= make_note_raw (kind
);
4989 /* Emit a clobber of lvalue X. */
4992 emit_clobber (rtx x
)
4994 /* CONCATs should not appear in the insn stream. */
4995 if (GET_CODE (x
) == CONCAT
)
4997 emit_clobber (XEXP (x
, 0));
4998 return emit_clobber (XEXP (x
, 1));
5000 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5003 /* Return a sequence of insns to clobber lvalue X. */
5017 /* Emit a use of rvalue X. */
5022 /* CONCATs should not appear in the insn stream. */
5023 if (GET_CODE (x
) == CONCAT
)
5025 emit_use (XEXP (x
, 0));
5026 return emit_use (XEXP (x
, 1));
5028 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5031 /* Return a sequence of insns to use rvalue X. */
5045 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5046 note of this type already exists, remove it first. */
5049 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5051 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5057 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5058 has multiple sets (some callers assume single_set
5059 means the insn only has one set, when in fact it
5060 means the insn only has one * useful * set). */
5061 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
5067 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5068 It serves no useful purpose and breaks eliminate_regs. */
5069 if (GET_CODE (datum
) == ASM_OPERANDS
)
5074 XEXP (note
, 0) = datum
;
5075 df_notes_rescan (insn
);
5083 XEXP (note
, 0) = datum
;
5089 add_reg_note (insn
, kind
, datum
);
5095 df_notes_rescan (insn
);
5101 return REG_NOTES (insn
);
5104 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5106 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5108 rtx set
= single_set (insn
);
5110 if (set
&& SET_DEST (set
) == dst
)
5111 return set_unique_reg_note (insn
, kind
, datum
);
5115 /* Return an indication of which type of insn should have X as a body.
5116 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5118 static enum rtx_code
5119 classify_insn (rtx x
)
5123 if (GET_CODE (x
) == CALL
)
5125 if (ANY_RETURN_P (x
))
5127 if (GET_CODE (x
) == SET
)
5129 if (SET_DEST (x
) == pc_rtx
)
5131 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5136 if (GET_CODE (x
) == PARALLEL
)
5139 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5140 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5142 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5143 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5145 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5146 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5152 /* Emit the rtl pattern X as an appropriate kind of insn.
5153 If X is a label, it is simply added into the insn chain. */
5158 enum rtx_code code
= classify_insn (x
);
5163 return emit_label (x
);
5165 return emit_insn (x
);
5168 rtx insn
= emit_jump_insn (x
);
5169 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5170 return emit_barrier ();
5174 return emit_call_insn (x
);
5176 return emit_debug_insn (x
);
5182 /* Space for free sequence stack entries. */
5183 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5185 /* Begin emitting insns to a sequence. If this sequence will contain
5186 something that might cause the compiler to pop arguments to function
5187 calls (because those pops have previously been deferred; see
5188 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5189 before calling this function. That will ensure that the deferred
5190 pops are not accidentally emitted in the middle of this sequence. */
5193 start_sequence (void)
5195 struct sequence_stack
*tem
;
5197 if (free_sequence_stack
!= NULL
)
5199 tem
= free_sequence_stack
;
5200 free_sequence_stack
= tem
->next
;
5203 tem
= ggc_alloc_sequence_stack ();
5205 tem
->next
= seq_stack
;
5206 tem
->first
= get_insns ();
5207 tem
->last
= get_last_insn ();
5215 /* Set up the insn chain starting with FIRST as the current sequence,
5216 saving the previously current one. See the documentation for
5217 start_sequence for more information about how to use this function. */
5220 push_to_sequence (rtx first
)
5226 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5229 set_first_insn (first
);
5230 set_last_insn (last
);
5233 /* Like push_to_sequence, but take the last insn as an argument to avoid
5234 looping through the list. */
5237 push_to_sequence2 (rtx first
, rtx last
)
5241 set_first_insn (first
);
5242 set_last_insn (last
);
5245 /* Set up the outer-level insn chain
5246 as the current sequence, saving the previously current one. */
5249 push_topmost_sequence (void)
5251 struct sequence_stack
*stack
, *top
= NULL
;
5255 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5258 set_first_insn (top
->first
);
5259 set_last_insn (top
->last
);
5262 /* After emitting to the outer-level insn chain, update the outer-level
5263 insn chain, and restore the previous saved state. */
5266 pop_topmost_sequence (void)
5268 struct sequence_stack
*stack
, *top
= NULL
;
5270 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5273 top
->first
= get_insns ();
5274 top
->last
= get_last_insn ();
5279 /* After emitting to a sequence, restore previous saved state.
5281 To get the contents of the sequence just made, you must call
5282 `get_insns' *before* calling here.
5284 If the compiler might have deferred popping arguments while
5285 generating this sequence, and this sequence will not be immediately
5286 inserted into the instruction stream, use do_pending_stack_adjust
5287 before calling get_insns. That will ensure that the deferred
5288 pops are inserted into this sequence, and not into some random
5289 location in the instruction stream. See INHIBIT_DEFER_POP for more
5290 information about deferred popping of arguments. */
5295 struct sequence_stack
*tem
= seq_stack
;
5297 set_first_insn (tem
->first
);
5298 set_last_insn (tem
->last
);
5299 seq_stack
= tem
->next
;
5301 memset (tem
, 0, sizeof (*tem
));
5302 tem
->next
= free_sequence_stack
;
5303 free_sequence_stack
= tem
;
5306 /* Return 1 if currently emitting into a sequence. */
5309 in_sequence_p (void)
5311 return seq_stack
!= 0;
5314 /* Put the various virtual registers into REGNO_REG_RTX. */
5317 init_virtual_regs (void)
5319 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5320 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5321 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5322 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5323 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5324 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5325 = virtual_preferred_stack_boundary_rtx
;
5329 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5330 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5331 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5332 static int copy_insn_n_scratches
;
5334 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5335 copied an ASM_OPERANDS.
5336 In that case, it is the original input-operand vector. */
5337 static rtvec orig_asm_operands_vector
;
5339 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5340 copied an ASM_OPERANDS.
5341 In that case, it is the copied input-operand vector. */
5342 static rtvec copy_asm_operands_vector
;
5344 /* Likewise for the constraints vector. */
5345 static rtvec orig_asm_constraints_vector
;
5346 static rtvec copy_asm_constraints_vector
;
5348 /* Recursively create a new copy of an rtx for copy_insn.
5349 This function differs from copy_rtx in that it handles SCRATCHes and
5350 ASM_OPERANDs properly.
5351 Normally, this function is not used directly; use copy_insn as front end.
5352 However, you could first copy an insn pattern with copy_insn and then use
5353 this function afterwards to properly copy any REG_NOTEs containing
5357 copy_insn_1 (rtx orig
)
5362 const char *format_ptr
;
5367 code
= GET_CODE (orig
);
5382 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5383 clobbers or clobbers of hard registers that originated as pseudos.
5384 This is needed to allow safe register renaming. */
5385 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5386 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5391 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5392 if (copy_insn_scratch_in
[i
] == orig
)
5393 return copy_insn_scratch_out
[i
];
5397 if (shared_const_p (orig
))
5401 /* A MEM with a constant address is not sharable. The problem is that
5402 the constant address may need to be reloaded. If the mem is shared,
5403 then reloading one copy of this mem will cause all copies to appear
5404 to have been reloaded. */
5410 /* Copy the various flags, fields, and other information. We assume
5411 that all fields need copying, and then clear the fields that should
5412 not be copied. That is the sensible default behavior, and forces
5413 us to explicitly document why we are *not* copying a flag. */
5414 copy
= shallow_copy_rtx (orig
);
5416 /* We do not copy the USED flag, which is used as a mark bit during
5417 walks over the RTL. */
5418 RTX_FLAG (copy
, used
) = 0;
5420 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5423 RTX_FLAG (copy
, jump
) = 0;
5424 RTX_FLAG (copy
, call
) = 0;
5425 RTX_FLAG (copy
, frame_related
) = 0;
5428 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5430 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5431 switch (*format_ptr
++)
5434 if (XEXP (orig
, i
) != NULL
)
5435 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5440 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5441 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5442 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5443 XVEC (copy
, i
) = copy_asm_operands_vector
;
5444 else if (XVEC (orig
, i
) != NULL
)
5446 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5447 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5448 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5459 /* These are left unchanged. */
5466 if (code
== SCRATCH
)
5468 i
= copy_insn_n_scratches
++;
5469 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5470 copy_insn_scratch_in
[i
] = orig
;
5471 copy_insn_scratch_out
[i
] = copy
;
5473 else if (code
== ASM_OPERANDS
)
5475 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5476 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5477 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5478 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5484 /* Create a new copy of an rtx.
5485 This function differs from copy_rtx in that it handles SCRATCHes and
5486 ASM_OPERANDs properly.
5487 INSN doesn't really have to be a full INSN; it could be just the
5490 copy_insn (rtx insn
)
5492 copy_insn_n_scratches
= 0;
5493 orig_asm_operands_vector
= 0;
5494 orig_asm_constraints_vector
= 0;
5495 copy_asm_operands_vector
= 0;
5496 copy_asm_constraints_vector
= 0;
5497 return copy_insn_1 (insn
);
5500 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5501 on that assumption that INSN itself remains in its original place. */
5504 copy_delay_slot_insn (rtx insn
)
5506 /* Copy INSN with its rtx_code, all its notes, location etc. */
5507 insn
= copy_rtx (insn
);
5508 INSN_UID (insn
) = cur_insn_uid
++;
5512 /* Initialize data structures and variables in this file
5513 before generating rtl for each function. */
5518 set_first_insn (NULL
);
5519 set_last_insn (NULL
);
5520 if (MIN_NONDEBUG_INSN_UID
)
5521 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5524 cur_debug_insn_uid
= 1;
5525 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5526 first_label_num
= label_num
;
5529 /* Init the tables that describe all the pseudo regs. */
5531 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5533 crtl
->emit
.regno_pointer_align
5534 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5536 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5538 /* Put copies of all the hard registers into regno_reg_rtx. */
5539 memcpy (regno_reg_rtx
,
5540 initial_regno_reg_rtx
,
5541 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5543 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5544 init_virtual_regs ();
5546 /* Indicate that the virtual registers and stack locations are
5548 REG_POINTER (stack_pointer_rtx
) = 1;
5549 REG_POINTER (frame_pointer_rtx
) = 1;
5550 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5551 REG_POINTER (arg_pointer_rtx
) = 1;
5553 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5554 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5555 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5556 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5557 REG_POINTER (virtual_cfa_rtx
) = 1;
5559 #ifdef STACK_BOUNDARY
5560 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5561 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5562 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5563 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5565 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5566 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5567 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5568 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5569 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5572 #ifdef INIT_EXPANDERS
5577 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5580 gen_const_vector (enum machine_mode mode
, int constant
)
5585 enum machine_mode inner
;
5587 units
= GET_MODE_NUNITS (mode
);
5588 inner
= GET_MODE_INNER (mode
);
5590 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5592 v
= rtvec_alloc (units
);
5594 /* We need to call this function after we set the scalar const_tiny_rtx
5596 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5598 for (i
= 0; i
< units
; ++i
)
5599 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5601 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5605 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5606 all elements are zero, and the one vector when all elements are one. */
5608 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5610 enum machine_mode inner
= GET_MODE_INNER (mode
);
5611 int nunits
= GET_MODE_NUNITS (mode
);
5615 /* Check to see if all of the elements have the same value. */
5616 x
= RTVEC_ELT (v
, nunits
- 1);
5617 for (i
= nunits
- 2; i
>= 0; i
--)
5618 if (RTVEC_ELT (v
, i
) != x
)
5621 /* If the values are all the same, check to see if we can use one of the
5622 standard constant vectors. */
5625 if (x
== CONST0_RTX (inner
))
5626 return CONST0_RTX (mode
);
5627 else if (x
== CONST1_RTX (inner
))
5628 return CONST1_RTX (mode
);
5629 else if (x
== CONSTM1_RTX (inner
))
5630 return CONSTM1_RTX (mode
);
5633 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5636 /* Initialise global register information required by all functions. */
5639 init_emit_regs (void)
5642 enum machine_mode mode
;
5645 /* Reset register attributes */
5646 htab_empty (reg_attrs_htab
);
5648 /* We need reg_raw_mode, so initialize the modes now. */
5649 init_reg_modes_target ();
5651 /* Assign register numbers to the globally defined register rtx. */
5652 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5653 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5654 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5655 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5656 virtual_incoming_args_rtx
=
5657 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5658 virtual_stack_vars_rtx
=
5659 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5660 virtual_stack_dynamic_rtx
=
5661 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5662 virtual_outgoing_args_rtx
=
5663 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5664 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5665 virtual_preferred_stack_boundary_rtx
=
5666 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5668 /* Initialize RTL for commonly used hard registers. These are
5669 copied into regno_reg_rtx as we begin to compile each function. */
5670 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5671 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5673 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5674 return_address_pointer_rtx
5675 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5678 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5679 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5681 pic_offset_table_rtx
= NULL_RTX
;
5683 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5685 mode
= (enum machine_mode
) i
;
5686 attrs
= ggc_alloc_cleared_mem_attrs ();
5687 attrs
->align
= BITS_PER_UNIT
;
5688 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5689 if (mode
!= BLKmode
)
5691 attrs
->size_known_p
= true;
5692 attrs
->size
= GET_MODE_SIZE (mode
);
5693 if (STRICT_ALIGNMENT
)
5694 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5696 mode_mem_attrs
[i
] = attrs
;
5700 /* Create some permanent unique rtl objects shared between all functions. */
5703 init_emit_once (void)
5706 enum machine_mode mode
;
5707 enum machine_mode double_mode
;
5709 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5711 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5712 const_int_htab_eq
, NULL
);
5714 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5715 const_double_htab_eq
, NULL
);
5717 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5718 const_fixed_htab_eq
, NULL
);
5720 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5721 mem_attrs_htab_eq
, NULL
);
5722 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5723 reg_attrs_htab_eq
, NULL
);
5725 /* Compute the word and byte modes. */
5727 byte_mode
= VOIDmode
;
5728 word_mode
= VOIDmode
;
5729 double_mode
= VOIDmode
;
5731 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5733 mode
= GET_MODE_WIDER_MODE (mode
))
5735 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5736 && byte_mode
== VOIDmode
)
5739 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5740 && word_mode
== VOIDmode
)
5744 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5746 mode
= GET_MODE_WIDER_MODE (mode
))
5748 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5749 && double_mode
== VOIDmode
)
5753 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5755 #ifdef INIT_EXPANDERS
5756 /* This is to initialize {init|mark|free}_machine_status before the first
5757 call to push_function_context_to. This is needed by the Chill front
5758 end which calls push_function_context_to before the first call to
5759 init_function_start. */
5763 /* Create the unique rtx's for certain rtx codes and operand values. */
5765 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5766 tries to use these variables. */
5767 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5768 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5769 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5771 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5772 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5773 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5775 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5777 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5778 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5779 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5784 dconsthalf
= dconst1
;
5785 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5787 for (i
= 0; i
< 3; i
++)
5789 const REAL_VALUE_TYPE
*const r
=
5790 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5792 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5794 mode
= GET_MODE_WIDER_MODE (mode
))
5795 const_tiny_rtx
[i
][(int) mode
] =
5796 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5798 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5800 mode
= GET_MODE_WIDER_MODE (mode
))
5801 const_tiny_rtx
[i
][(int) mode
] =
5802 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5804 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5806 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5808 mode
= GET_MODE_WIDER_MODE (mode
))
5809 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5811 for (mode
= MIN_MODE_PARTIAL_INT
;
5812 mode
<= MAX_MODE_PARTIAL_INT
;
5813 mode
= (enum machine_mode
)((int)(mode
) + 1))
5814 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5817 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5819 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5821 mode
= GET_MODE_WIDER_MODE (mode
))
5822 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5824 for (mode
= MIN_MODE_PARTIAL_INT
;
5825 mode
<= MAX_MODE_PARTIAL_INT
;
5826 mode
= (enum machine_mode
)((int)(mode
) + 1))
5827 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5829 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5831 mode
= GET_MODE_WIDER_MODE (mode
))
5833 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5834 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5837 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5839 mode
= GET_MODE_WIDER_MODE (mode
))
5841 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5842 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5845 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5847 mode
= GET_MODE_WIDER_MODE (mode
))
5849 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5850 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5851 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5854 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5856 mode
= GET_MODE_WIDER_MODE (mode
))
5858 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5859 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5862 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5864 mode
= GET_MODE_WIDER_MODE (mode
))
5866 FCONST0(mode
).data
.high
= 0;
5867 FCONST0(mode
).data
.low
= 0;
5868 FCONST0(mode
).mode
= mode
;
5869 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5870 FCONST0 (mode
), mode
);
5873 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5875 mode
= GET_MODE_WIDER_MODE (mode
))
5877 FCONST0(mode
).data
.high
= 0;
5878 FCONST0(mode
).data
.low
= 0;
5879 FCONST0(mode
).mode
= mode
;
5880 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5881 FCONST0 (mode
), mode
);
5884 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5886 mode
= GET_MODE_WIDER_MODE (mode
))
5888 FCONST0(mode
).data
.high
= 0;
5889 FCONST0(mode
).data
.low
= 0;
5890 FCONST0(mode
).mode
= mode
;
5891 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5892 FCONST0 (mode
), mode
);
5894 /* We store the value 1. */
5895 FCONST1(mode
).data
.high
= 0;
5896 FCONST1(mode
).data
.low
= 0;
5897 FCONST1(mode
).mode
= mode
;
5899 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5900 HOST_BITS_PER_DOUBLE_INT
,
5901 SIGNED_FIXED_POINT_MODE_P (mode
));
5902 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5903 FCONST1 (mode
), mode
);
5906 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5908 mode
= GET_MODE_WIDER_MODE (mode
))
5910 FCONST0(mode
).data
.high
= 0;
5911 FCONST0(mode
).data
.low
= 0;
5912 FCONST0(mode
).mode
= mode
;
5913 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5914 FCONST0 (mode
), mode
);
5916 /* We store the value 1. */
5917 FCONST1(mode
).data
.high
= 0;
5918 FCONST1(mode
).data
.low
= 0;
5919 FCONST1(mode
).mode
= mode
;
5921 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5922 HOST_BITS_PER_DOUBLE_INT
,
5923 SIGNED_FIXED_POINT_MODE_P (mode
));
5924 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5925 FCONST1 (mode
), mode
);
5928 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5930 mode
= GET_MODE_WIDER_MODE (mode
))
5932 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5935 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5937 mode
= GET_MODE_WIDER_MODE (mode
))
5939 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5942 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5944 mode
= GET_MODE_WIDER_MODE (mode
))
5946 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5947 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5950 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5952 mode
= GET_MODE_WIDER_MODE (mode
))
5954 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5955 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5958 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5959 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5960 const_tiny_rtx
[0][i
] = const0_rtx
;
5962 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5963 if (STORE_FLAG_VALUE
== 1)
5964 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5966 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
5967 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
5968 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
5969 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
5972 /* Produce exact duplicate of insn INSN after AFTER.
5973 Care updating of libcall regions if present. */
5976 emit_copy_of_insn_after (rtx insn
, rtx after
)
5980 switch (GET_CODE (insn
))
5983 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5987 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5991 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
5995 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5996 if (CALL_INSN_FUNCTION_USAGE (insn
))
5997 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5998 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5999 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6000 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6001 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6002 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6003 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6010 /* Update LABEL_NUSES. */
6011 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6013 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6015 /* If the old insn is frame related, then so is the new one. This is
6016 primarily needed for IA-64 unwind info which marks epilogue insns,
6017 which may be duplicated by the basic block reordering code. */
6018 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6020 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6021 will make them. REG_LABEL_TARGETs are created there too, but are
6022 supposed to be sticky, so we copy them. */
6023 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6024 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6026 if (GET_CODE (link
) == EXPR_LIST
)
6027 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6028 copy_insn_1 (XEXP (link
, 0)));
6030 add_reg_note (new_rtx
, REG_NOTE_KIND (link
), XEXP (link
, 0));
6033 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6037 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6039 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
6041 if (hard_reg_clobbers
[mode
][regno
])
6042 return hard_reg_clobbers
[mode
][regno
];
6044 return (hard_reg_clobbers
[mode
][regno
] =
6045 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6048 location_t prologue_location
;
6049 location_t epilogue_location
;
6051 /* Hold current location information and last location information, so the
6052 datastructures are built lazily only when some instructions in given
6053 place are needed. */
6054 static location_t curr_location
;
6056 /* Allocate insn location datastructure. */
6058 insn_locations_init (void)
6060 prologue_location
= epilogue_location
= 0;
6061 curr_location
= UNKNOWN_LOCATION
;
6064 /* At the end of emit stage, clear current location. */
6066 insn_locations_finalize (void)
6068 epilogue_location
= curr_location
;
6069 curr_location
= UNKNOWN_LOCATION
;
6072 /* Set current location. */
6074 set_curr_insn_location (location_t location
)
6076 curr_location
= location
;
6079 /* Get current location. */
6081 curr_insn_location (void)
6083 return curr_location
;
6086 /* Return lexical scope block insn belongs to. */
6088 insn_scope (const_rtx insn
)
6090 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6093 /* Return line number of the statement that produced this insn. */
6095 insn_line (const_rtx insn
)
6097 return LOCATION_LINE (INSN_LOCATION (insn
));
6100 /* Return source file of the statement that produced this insn. */
6102 insn_file (const_rtx insn
)
6104 return LOCATION_FILE (INSN_LOCATION (insn
));
6107 /* Return true if memory model MODEL requires a pre-operation (release-style)
6108 barrier or a post-operation (acquire-style) barrier. While not universal,
6109 this function matches behavior of several targets. */
6112 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6114 switch (model
& MEMMODEL_MASK
)
6116 case MEMMODEL_RELAXED
:
6117 case MEMMODEL_CONSUME
:
6119 case MEMMODEL_RELEASE
:
6121 case MEMMODEL_ACQUIRE
:
6123 case MEMMODEL_ACQ_REL
:
6124 case MEMMODEL_SEQ_CST
:
6131 #include "gt-emit-rtl.h"