fixed bug in suite grammar
[official-gcc.git] / gcc / caller-save.c
blob6e42a27c771e21216670e5a99f28f94c05f841db
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "rtl.h"
27 #include "regs.h"
28 #include "insn-config.h"
29 #include "flags.h"
30 #include "hard-reg-set.h"
31 #include "recog.h"
32 #include "basic-block.h"
33 #include "df.h"
34 #include "reload.h"
35 #include "function.h"
36 #include "expr.h"
37 #include "diagnostic-core.h"
38 #include "tm_p.h"
39 #include "addresses.h"
40 #include "output.h"
41 #include "ggc.h"
43 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
45 #define regno_save_mode \
46 (this_target_reload->x_regno_save_mode)
47 #define cached_reg_save_code \
48 (this_target_reload->x_cached_reg_save_code)
49 #define cached_reg_restore_code \
50 (this_target_reload->x_cached_reg_restore_code)
52 /* For each hard register, a place on the stack where it can be saved,
53 if needed. */
55 static rtx
56 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
58 /* The number of elements in the subsequent array. */
59 static int save_slots_num;
61 /* Allocated slots so far. */
62 static rtx save_slots[FIRST_PSEUDO_REGISTER];
64 /* Set of hard regs currently residing in save area (during insn scan). */
66 static HARD_REG_SET hard_regs_saved;
68 /* Number of registers currently in hard_regs_saved. */
70 static int n_regs_saved;
72 /* Computed by mark_referenced_regs, all regs referenced in a given
73 insn. */
74 static HARD_REG_SET referenced_regs;
77 typedef void refmarker_fn (rtx *loc, enum machine_mode mode, int hardregno,
78 void *mark_arg);
80 static int reg_save_code (int, enum machine_mode);
81 static int reg_restore_code (int, enum machine_mode);
83 struct saved_hard_reg;
84 static void initiate_saved_hard_regs (void);
85 static struct saved_hard_reg *new_saved_hard_reg (int, int);
86 static void finish_saved_hard_regs (void);
87 static int saved_hard_reg_compare_func (const void *, const void *);
89 static void mark_set_regs (rtx, const_rtx, void *);
90 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg);
91 static refmarker_fn mark_reg_as_referenced;
92 static refmarker_fn replace_reg_with_saved_mem;
93 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
94 enum machine_mode *);
95 static int insert_restore (struct insn_chain *, int, int, int,
96 enum machine_mode *);
97 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
98 rtx);
99 static void add_stored_regs (rtx, const_rtx, void *);
103 static GTY(()) rtx savepat;
104 static GTY(()) rtx restpat;
105 static GTY(()) rtx test_reg;
106 static GTY(()) rtx test_mem;
107 static GTY(()) rtx saveinsn;
108 static GTY(()) rtx restinsn;
110 /* Return the INSN_CODE used to save register REG in mode MODE. */
111 static int
112 reg_save_code (int reg, enum machine_mode mode)
114 bool ok;
115 if (cached_reg_save_code[reg][mode])
116 return cached_reg_save_code[reg][mode];
117 if (!HARD_REGNO_MODE_OK (reg, mode))
119 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation
120 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert
121 below silences a warning. */
122 gcc_assert (reg < FIRST_PSEUDO_REGISTER);
123 cached_reg_save_code[reg][mode] = -1;
124 cached_reg_restore_code[reg][mode] = -1;
125 return -1;
128 /* Update the register number and modes of the register
129 and memory operand. */
130 SET_REGNO_RAW (test_reg, reg);
131 PUT_MODE (test_reg, mode);
132 PUT_MODE (test_mem, mode);
134 /* Force re-recognition of the modified insns. */
135 INSN_CODE (saveinsn) = -1;
136 INSN_CODE (restinsn) = -1;
138 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
139 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
141 /* Now extract both insns and see if we can meet their
142 constraints. */
143 ok = (cached_reg_save_code[reg][mode] != -1
144 && cached_reg_restore_code[reg][mode] != -1);
145 if (ok)
147 extract_insn (saveinsn);
148 ok = constrain_operands (1);
149 extract_insn (restinsn);
150 ok &= constrain_operands (1);
153 if (! ok)
155 cached_reg_save_code[reg][mode] = -1;
156 cached_reg_restore_code[reg][mode] = -1;
158 gcc_assert (cached_reg_save_code[reg][mode]);
159 return cached_reg_save_code[reg][mode];
162 /* Return the INSN_CODE used to restore register REG in mode MODE. */
163 static int
164 reg_restore_code (int reg, enum machine_mode mode)
166 if (cached_reg_restore_code[reg][mode])
167 return cached_reg_restore_code[reg][mode];
168 /* Populate our cache. */
169 reg_save_code (reg, mode);
170 return cached_reg_restore_code[reg][mode];
173 /* Initialize for caller-save.
175 Look at all the hard registers that are used by a call and for which
176 reginfo.c has not already excluded from being used across a call.
178 Ensure that we can find a mode to save the register and that there is a
179 simple insn to save and restore the register. This latter check avoids
180 problems that would occur if we tried to save the MQ register of some
181 machines directly into memory. */
183 void
184 init_caller_save (void)
186 rtx addr_reg;
187 int offset;
188 rtx address;
189 int i, j;
191 if (caller_save_initialized_p)
192 return;
194 caller_save_initialized_p = true;
196 CLEAR_HARD_REG_SET (no_caller_save_reg_set);
197 /* First find all the registers that we need to deal with and all
198 the modes that they can have. If we can't find a mode to use,
199 we can't have the register live over calls. */
201 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
203 if (call_used_regs[i]
204 && !TEST_HARD_REG_BIT (call_fixed_reg_set, i))
206 for (j = 1; j <= MOVE_MAX_WORDS; j++)
208 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
209 VOIDmode);
210 if (regno_save_mode[i][j] == VOIDmode && j == 1)
212 SET_HARD_REG_BIT (call_fixed_reg_set, i);
216 else
217 regno_save_mode[i][1] = VOIDmode;
220 /* The following code tries to approximate the conditions under which
221 we can easily save and restore a register without scratch registers or
222 other complexities. It will usually work, except under conditions where
223 the validity of an insn operand is dependent on the address offset.
224 No such cases are currently known.
226 We first find a typical offset from some BASE_REG_CLASS register.
227 This address is chosen by finding the first register in the class
228 and by finding the smallest power of two that is a valid offset from
229 that register in every mode we will use to save registers. */
231 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
232 if (TEST_HARD_REG_BIT
233 (reg_class_contents
234 [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i))
235 break;
237 gcc_assert (i < FIRST_PSEUDO_REGISTER);
239 addr_reg = gen_rtx_REG (Pmode, i);
241 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
243 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
245 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
246 if (regno_save_mode[i][1] != VOIDmode
247 && ! strict_memory_address_p (regno_save_mode[i][1], address))
248 break;
250 if (i == FIRST_PSEUDO_REGISTER)
251 break;
254 /* If we didn't find a valid address, we must use register indirect. */
255 if (offset == 0)
256 address = addr_reg;
258 /* Next we try to form an insn to save and restore the register. We
259 see if such an insn is recognized and meets its constraints.
261 To avoid lots of unnecessary RTL allocation, we construct all the RTL
262 once, then modify the memory and register operands in-place. */
264 test_reg = gen_rtx_REG (VOIDmode, 0);
265 test_mem = gen_rtx_MEM (VOIDmode, address);
266 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
267 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
269 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, savepat, 0, -1, 0);
270 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, restpat, 0, -1, 0);
272 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
273 for (j = 1; j <= MOVE_MAX_WORDS; j++)
274 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
276 regno_save_mode[i][j] = VOIDmode;
277 if (j == 1)
279 SET_HARD_REG_BIT (call_fixed_reg_set, i);
280 if (call_used_regs[i])
281 SET_HARD_REG_BIT (no_caller_save_reg_set, i);
288 /* Initialize save areas by showing that we haven't allocated any yet. */
290 void
291 init_save_areas (void)
293 int i, j;
295 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
296 for (j = 1; j <= MOVE_MAX_WORDS; j++)
297 regno_save_mem[i][j] = 0;
298 save_slots_num = 0;
302 /* The structure represents a hard register which should be saved
303 through the call. It is used when the integrated register
304 allocator (IRA) is used and sharing save slots is on. */
305 struct saved_hard_reg
307 /* Order number starting with 0. */
308 int num;
309 /* The hard regno. */
310 int hard_regno;
311 /* Execution frequency of all calls through which given hard
312 register should be saved. */
313 int call_freq;
314 /* Stack slot reserved to save the hard register through calls. */
315 rtx slot;
316 /* True if it is first hard register in the chain of hard registers
317 sharing the same stack slot. */
318 int first_p;
319 /* Order number of the next hard register structure with the same
320 slot in the chain. -1 represents end of the chain. */
321 int next;
324 /* Map: hard register number to the corresponding structure. */
325 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];
327 /* The number of all structures representing hard registers should be
328 saved, in order words, the number of used elements in the following
329 array. */
330 static int saved_regs_num;
332 /* Pointers to all the structures. Index is the order number of the
333 corresponding structure. */
334 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];
336 /* First called function for work with saved hard registers. */
337 static void
338 initiate_saved_hard_regs (void)
340 int i;
342 saved_regs_num = 0;
343 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
344 hard_reg_map[i] = NULL;
347 /* Allocate and return new saved hard register with given REGNO and
348 CALL_FREQ. */
349 static struct saved_hard_reg *
350 new_saved_hard_reg (int regno, int call_freq)
352 struct saved_hard_reg *saved_reg;
354 saved_reg
355 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));
356 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;
357 saved_reg->num = saved_regs_num++;
358 saved_reg->hard_regno = regno;
359 saved_reg->call_freq = call_freq;
360 saved_reg->first_p = FALSE;
361 saved_reg->next = -1;
362 return saved_reg;
365 /* Free memory allocated for the saved hard registers. */
366 static void
367 finish_saved_hard_regs (void)
369 int i;
371 for (i = 0; i < saved_regs_num; i++)
372 free (all_saved_regs[i]);
375 /* The function is used to sort the saved hard register structures
376 according their frequency. */
377 static int
378 saved_hard_reg_compare_func (const void *v1p, const void *v2p)
380 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;
381 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;
383 if (flag_omit_frame_pointer)
385 if (p1->call_freq - p2->call_freq != 0)
386 return p1->call_freq - p2->call_freq;
388 else if (p2->call_freq - p1->call_freq != 0)
389 return p2->call_freq - p1->call_freq;
391 return p1->num - p2->num;
394 /* Allocate save areas for any hard registers that might need saving.
395 We take a conservative approach here and look for call-clobbered hard
396 registers that are assigned to pseudos that cross calls. This may
397 overestimate slightly (especially if some of these registers are later
398 used as spill registers), but it should not be significant.
400 For IRA we use priority coloring to decrease stack slots needed for
401 saving hard registers through calls. We build conflicts for them
402 to do coloring.
404 Future work:
406 In the fallback case we should iterate backwards across all possible
407 modes for the save, choosing the largest available one instead of
408 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
410 We do not try to use "move multiple" instructions that exist
411 on some machines (such as the 68k moveml). It could be a win to try
412 and use them when possible. The hard part is doing it in a way that is
413 machine independent since they might be saving non-consecutive
414 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
416 void
417 setup_save_areas (void)
419 int i, j, k;
420 unsigned int r;
421 HARD_REG_SET hard_regs_used;
423 /* Allocate space in the save area for the largest multi-register
424 pseudos first, then work backwards to single register
425 pseudos. */
427 /* Find and record all call-used hard-registers in this function. */
428 CLEAR_HARD_REG_SET (hard_regs_used);
429 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
430 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
432 unsigned int regno = reg_renumber[i];
433 unsigned int endregno
434 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);
435 for (r = regno; r < endregno; r++)
436 if (call_used_regs[r])
437 SET_HARD_REG_BIT (hard_regs_used, r);
440 if (optimize && flag_ira_share_save_slots)
442 rtx insn, slot;
443 struct insn_chain *chain, *next;
444 char *saved_reg_conflicts;
445 unsigned int regno;
446 int next_k, freq;
447 struct saved_hard_reg *saved_reg, *saved_reg2, *saved_reg3;
448 int call_saved_regs_num;
449 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];
450 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
451 reg_set_iterator rsi;
452 int best_slot_num;
453 int prev_save_slots_num;
454 rtx prev_save_slots[FIRST_PSEUDO_REGISTER];
456 initiate_saved_hard_regs ();
457 /* Create hard reg saved regs. */
458 for (chain = reload_insn_chain; chain != 0; chain = next)
460 insn = chain->insn;
461 next = chain->next;
462 if (!CALL_P (insn)
463 || find_reg_note (insn, REG_NORETURN, NULL))
464 continue;
465 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
466 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
467 &chain->live_throughout);
468 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
470 /* Record all registers set in this call insn. These don't
471 need to be saved. N.B. the call insn might set a subreg
472 of a multi-hard-reg pseudo; then the pseudo is considered
473 live during the call, but the subreg that is set
474 isn't. */
475 CLEAR_HARD_REG_SET (this_insn_sets);
476 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
477 /* Sibcalls are considered to set the return value. */
478 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
479 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
481 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
482 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
483 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
484 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
485 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
487 if (hard_reg_map[regno] != NULL)
488 hard_reg_map[regno]->call_freq += freq;
489 else
490 saved_reg = new_saved_hard_reg (regno, freq);
492 /* Look through all live pseudos, mark their hard registers. */
493 EXECUTE_IF_SET_IN_REG_SET
494 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
496 int r = reg_renumber[regno];
497 int bound;
499 if (r < 0)
500 continue;
502 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
503 for (; r < bound; r++)
504 if (TEST_HARD_REG_BIT (used_regs, r))
506 if (hard_reg_map[r] != NULL)
507 hard_reg_map[r]->call_freq += freq;
508 else
509 saved_reg = new_saved_hard_reg (r, freq);
510 SET_HARD_REG_BIT (hard_regs_to_save, r);
514 /* Find saved hard register conflicts. */
515 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);
516 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);
517 for (chain = reload_insn_chain; chain != 0; chain = next)
519 call_saved_regs_num = 0;
520 insn = chain->insn;
521 next = chain->next;
522 if (!CALL_P (insn)
523 || find_reg_note (insn, REG_NORETURN, NULL))
524 continue;
525 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
526 &chain->live_throughout);
527 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
529 /* Record all registers set in this call insn. These don't
530 need to be saved. N.B. the call insn might set a subreg
531 of a multi-hard-reg pseudo; then the pseudo is considered
532 live during the call, but the subreg that is set
533 isn't. */
534 CLEAR_HARD_REG_SET (this_insn_sets);
535 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
536 /* Sibcalls are considered to set the return value,
537 compare df-scan.c:df_get_call_refs. */
538 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
539 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
541 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
542 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
543 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
544 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
545 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
547 gcc_assert (hard_reg_map[regno] != NULL);
548 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];
550 /* Look through all live pseudos, mark their hard registers. */
551 EXECUTE_IF_SET_IN_REG_SET
552 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
554 int r = reg_renumber[regno];
555 int bound;
557 if (r < 0)
558 continue;
560 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
561 for (; r < bound; r++)
562 if (TEST_HARD_REG_BIT (used_regs, r))
563 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];
565 for (i = 0; i < call_saved_regs_num; i++)
567 saved_reg = call_saved_regs[i];
568 for (j = 0; j < call_saved_regs_num; j++)
569 if (i != j)
571 saved_reg2 = call_saved_regs[j];
572 saved_reg_conflicts[saved_reg->num * saved_regs_num
573 + saved_reg2->num]
574 = saved_reg_conflicts[saved_reg2->num * saved_regs_num
575 + saved_reg->num]
576 = TRUE;
580 /* Sort saved hard regs. */
581 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),
582 saved_hard_reg_compare_func);
583 /* Initiate slots available from the previous reload
584 iteration. */
585 prev_save_slots_num = save_slots_num;
586 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));
587 save_slots_num = 0;
588 /* Allocate stack slots for the saved hard registers. */
589 for (i = 0; i < saved_regs_num; i++)
591 saved_reg = all_saved_regs[i];
592 regno = saved_reg->hard_regno;
593 for (j = 0; j < i; j++)
595 saved_reg2 = all_saved_regs[j];
596 if (! saved_reg2->first_p)
597 continue;
598 slot = saved_reg2->slot;
599 for (k = j; k >= 0; k = next_k)
601 saved_reg3 = all_saved_regs[k];
602 next_k = saved_reg3->next;
603 if (saved_reg_conflicts[saved_reg->num * saved_regs_num
604 + saved_reg3->num])
605 break;
607 if (k < 0
608 && (GET_MODE_SIZE (regno_save_mode[regno][1])
609 <= GET_MODE_SIZE (regno_save_mode
610 [saved_reg2->hard_regno][1])))
612 saved_reg->slot
613 = adjust_address_nv
614 (slot, regno_save_mode[saved_reg->hard_regno][1], 0);
615 regno_save_mem[regno][1] = saved_reg->slot;
616 saved_reg->next = saved_reg2->next;
617 saved_reg2->next = i;
618 if (dump_file != NULL)
619 fprintf (dump_file, "%d uses slot of %d\n",
620 regno, saved_reg2->hard_regno);
621 break;
624 if (j == i)
626 saved_reg->first_p = TRUE;
627 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)
629 slot = prev_save_slots[j];
630 if (slot == NULL_RTX)
631 continue;
632 if (GET_MODE_SIZE (regno_save_mode[regno][1])
633 <= GET_MODE_SIZE (GET_MODE (slot))
634 && best_slot_num < 0)
635 best_slot_num = j;
636 if (GET_MODE (slot) == regno_save_mode[regno][1])
637 break;
639 if (best_slot_num >= 0)
641 saved_reg->slot = prev_save_slots[best_slot_num];
642 saved_reg->slot
643 = adjust_address_nv
644 (saved_reg->slot,
645 regno_save_mode[saved_reg->hard_regno][1], 0);
646 if (dump_file != NULL)
647 fprintf (dump_file,
648 "%d uses a slot from prev iteration\n", regno);
649 prev_save_slots[best_slot_num] = NULL_RTX;
650 if (best_slot_num + 1 == prev_save_slots_num)
651 prev_save_slots_num--;
653 else
655 saved_reg->slot
656 = assign_stack_local_1
657 (regno_save_mode[regno][1],
658 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, true);
659 if (dump_file != NULL)
660 fprintf (dump_file, "%d uses a new slot\n", regno);
662 regno_save_mem[regno][1] = saved_reg->slot;
663 save_slots[save_slots_num++] = saved_reg->slot;
666 free (saved_reg_conflicts);
667 finish_saved_hard_regs ();
669 else
671 /* Now run through all the call-used hard-registers and allocate
672 space for them in the caller-save area. Try to allocate space
673 in a manner which allows multi-register saves/restores to be done. */
675 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
676 for (j = MOVE_MAX_WORDS; j > 0; j--)
678 int do_save = 1;
680 /* If no mode exists for this size, try another. Also break out
681 if we have already saved this hard register. */
682 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
683 continue;
685 /* See if any register in this group has been saved. */
686 for (k = 0; k < j; k++)
687 if (regno_save_mem[i + k][1])
689 do_save = 0;
690 break;
692 if (! do_save)
693 continue;
695 for (k = 0; k < j; k++)
696 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
698 do_save = 0;
699 break;
701 if (! do_save)
702 continue;
704 /* We have found an acceptable mode to store in. Since
705 hard register is always saved in the widest mode
706 available, the mode may be wider than necessary, it is
707 OK to reduce the alignment of spill space. We will
708 verify that it is equal to or greater than required
709 when we restore and save the hard register in
710 insert_restore and insert_save. */
711 regno_save_mem[i][j]
712 = assign_stack_local_1 (regno_save_mode[i][j],
713 GET_MODE_SIZE (regno_save_mode[i][j]),
714 0, true);
716 /* Setup single word save area just in case... */
717 for (k = 0; k < j; k++)
718 /* This should not depend on WORDS_BIG_ENDIAN.
719 The order of words in regs is the same as in memory. */
720 regno_save_mem[i + k][1]
721 = adjust_address_nv (regno_save_mem[i][j],
722 regno_save_mode[i + k][1],
723 k * UNITS_PER_WORD);
727 /* Now loop again and set the alias set of any save areas we made to
728 the alias set used to represent frame objects. */
729 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
730 for (j = MOVE_MAX_WORDS; j > 0; j--)
731 if (regno_save_mem[i][j] != 0)
732 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
737 /* Find the places where hard regs are live across calls and save them. */
739 void
740 save_call_clobbered_regs (void)
742 struct insn_chain *chain, *next, *last = NULL;
743 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
745 /* Computed in mark_set_regs, holds all registers set by the current
746 instruction. */
747 HARD_REG_SET this_insn_sets;
749 CLEAR_HARD_REG_SET (hard_regs_saved);
750 n_regs_saved = 0;
752 for (chain = reload_insn_chain; chain != 0; chain = next)
754 rtx insn = chain->insn;
755 enum rtx_code code = GET_CODE (insn);
757 next = chain->next;
759 gcc_assert (!chain->is_caller_save_insn);
761 if (NONDEBUG_INSN_P (insn))
763 /* If some registers have been saved, see if INSN references
764 any of them. We must restore them before the insn if so. */
766 if (n_regs_saved)
768 int regno;
769 HARD_REG_SET this_insn_sets;
771 if (code == JUMP_INSN)
772 /* Restore all registers if this is a JUMP_INSN. */
773 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
774 else
776 CLEAR_HARD_REG_SET (referenced_regs);
777 mark_referenced_regs (&PATTERN (insn),
778 mark_reg_as_referenced, NULL);
779 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
782 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
783 if (TEST_HARD_REG_BIT (referenced_regs, regno))
784 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS,
785 save_mode);
786 /* If a saved register is set after the call, this means we no
787 longer should restore it. This can happen when parts of a
788 multi-word pseudo do not conflict with other pseudos, so
789 IRA may allocate the same hard register for both. One may
790 be live across the call, while the other is set
791 afterwards. */
792 CLEAR_HARD_REG_SET (this_insn_sets);
793 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
794 AND_COMPL_HARD_REG_SET (hard_regs_saved, this_insn_sets);
797 if (code == CALL_INSN
798 && ! SIBLING_CALL_P (insn)
799 && ! find_reg_note (insn, REG_NORETURN, NULL))
801 unsigned regno;
802 HARD_REG_SET hard_regs_to_save;
803 reg_set_iterator rsi;
805 /* Use the register life information in CHAIN to compute which
806 regs are live during the call. */
807 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
808 &chain->live_throughout);
809 /* Save hard registers always in the widest mode available. */
810 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
811 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
812 save_mode [regno] = regno_save_mode [regno][1];
813 else
814 save_mode [regno] = VOIDmode;
816 /* Look through all live pseudos, mark their hard registers
817 and choose proper mode for saving. */
818 EXECUTE_IF_SET_IN_REG_SET
819 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
821 int r = reg_renumber[regno];
822 int nregs;
823 enum machine_mode mode;
825 if (r < 0)
826 continue;
827 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
828 mode = HARD_REGNO_CALLER_SAVE_MODE
829 (r, nregs, PSEUDO_REGNO_MODE (regno));
830 if (GET_MODE_BITSIZE (mode)
831 > GET_MODE_BITSIZE (save_mode[r]))
832 save_mode[r] = mode;
833 while (nregs-- > 0)
834 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
837 /* Record all registers set in this call insn. These don't need
838 to be saved. N.B. the call insn might set a subreg of a
839 multi-hard-reg pseudo; then the pseudo is considered live
840 during the call, but the subreg that is set isn't. */
841 CLEAR_HARD_REG_SET (this_insn_sets);
842 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
844 /* Compute which hard regs must be saved before this call. */
845 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
846 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
847 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
848 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
850 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
851 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
852 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
854 /* Must recompute n_regs_saved. */
855 n_regs_saved = 0;
856 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
857 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
858 n_regs_saved++;
860 last = chain;
862 else if (DEBUG_INSN_P (insn) && n_regs_saved)
863 mark_referenced_regs (&PATTERN (insn),
864 replace_reg_with_saved_mem,
865 save_mode);
867 if (chain->next == 0 || chain->next->block != chain->block)
869 int regno;
870 /* At the end of the basic block, we must restore any registers that
871 remain saved. If the last insn in the block is a JUMP_INSN, put
872 the restore before the insn, otherwise, put it after the insn. */
874 if (n_regs_saved
875 && DEBUG_INSN_P (insn)
876 && last
877 && last->block == chain->block)
879 rtx ins, prev;
880 basic_block bb = BLOCK_FOR_INSN (insn);
882 /* When adding hard reg restores after a DEBUG_INSN, move
883 all notes between last real insn and this DEBUG_INSN after
884 the DEBUG_INSN, otherwise we could get code
885 -g/-g0 differences. */
886 for (ins = PREV_INSN (insn); ins != last->insn; ins = prev)
888 prev = PREV_INSN (ins);
889 if (NOTE_P (ins))
891 NEXT_INSN (prev) = NEXT_INSN (ins);
892 PREV_INSN (NEXT_INSN (ins)) = prev;
893 PREV_INSN (ins) = insn;
894 NEXT_INSN (ins) = NEXT_INSN (insn);
895 NEXT_INSN (insn) = ins;
896 if (NEXT_INSN (ins))
897 PREV_INSN (NEXT_INSN (ins)) = ins;
898 if (BB_END (bb) == insn)
899 BB_END (bb) = ins;
901 else
902 gcc_assert (DEBUG_INSN_P (ins));
905 last = NULL;
907 if (n_regs_saved)
908 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
909 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
910 regno += insert_restore (chain, JUMP_P (insn),
911 regno, MOVE_MAX_WORDS, save_mode);
916 /* Here from note_stores, or directly from save_call_clobbered_regs, when
917 an insn stores a value in a register.
918 Set the proper bit or bits in this_insn_sets. All pseudos that have
919 been assigned hard regs have had their register number changed already,
920 so we can ignore pseudos. */
921 static void
922 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
924 int regno, endregno, i;
925 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data;
927 if (GET_CODE (reg) == SUBREG)
929 rtx inner = SUBREG_REG (reg);
930 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
931 return;
932 regno = subreg_regno (reg);
933 endregno = regno + subreg_nregs (reg);
935 else if (REG_P (reg)
936 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
938 regno = REGNO (reg);
939 endregno = END_HARD_REGNO (reg);
941 else
942 return;
944 for (i = regno; i < endregno; i++)
945 SET_HARD_REG_BIT (*this_insn_sets, i);
948 /* Here from note_stores when an insn stores a value in a register.
949 Set the proper bit or bits in the passed regset. All pseudos that have
950 been assigned hard regs have had their register number changed already,
951 so we can ignore pseudos. */
952 static void
953 add_stored_regs (rtx reg, const_rtx setter, void *data)
955 int regno, endregno, i;
956 enum machine_mode mode = GET_MODE (reg);
957 int offset = 0;
959 if (GET_CODE (setter) == CLOBBER)
960 return;
962 if (GET_CODE (reg) == SUBREG
963 && REG_P (SUBREG_REG (reg))
964 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
966 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
967 GET_MODE (SUBREG_REG (reg)),
968 SUBREG_BYTE (reg),
969 GET_MODE (reg));
970 regno = REGNO (SUBREG_REG (reg)) + offset;
971 endregno = regno + subreg_nregs (reg);
973 else
975 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
976 return;
978 regno = REGNO (reg) + offset;
979 endregno = end_hard_regno (mode, regno);
982 for (i = regno; i < endregno; i++)
983 SET_REGNO_REG_SET ((regset) data, i);
986 /* Walk X and record all referenced registers in REFERENCED_REGS. */
987 static void
988 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg)
990 enum rtx_code code = GET_CODE (*loc);
991 const char *fmt;
992 int i, j;
994 if (code == SET)
995 mark_referenced_regs (&SET_SRC (*loc), mark, arg);
996 if (code == SET || code == CLOBBER)
998 loc = &SET_DEST (*loc);
999 code = GET_CODE (*loc);
1000 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER)
1001 || code == PC || code == CC0
1002 || (code == SUBREG && REG_P (SUBREG_REG (*loc))
1003 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER
1004 /* If we're setting only part of a multi-word register,
1005 we shall mark it as referenced, because the words
1006 that are not being set should be restored. */
1007 && ((GET_MODE_SIZE (GET_MODE (*loc))
1008 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc))))
1009 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc)))
1010 <= UNITS_PER_WORD))))
1011 return;
1013 if (code == MEM || code == SUBREG)
1015 loc = &XEXP (*loc, 0);
1016 code = GET_CODE (*loc);
1019 if (code == REG)
1021 int regno = REGNO (*loc);
1022 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
1023 : reg_renumber[regno]);
1025 if (hardregno >= 0)
1026 mark (loc, GET_MODE (*loc), hardregno, arg);
1027 else if (arg)
1028 /* ??? Will we ever end up with an equiv expression in a debug
1029 insn, that would have required restoring a reg, or will
1030 reload take care of it for us? */
1031 return;
1032 /* If this is a pseudo that did not get a hard register, scan its
1033 memory location, since it might involve the use of another
1034 register, which might be saved. */
1035 else if (reg_equiv_mem[regno] != 0)
1036 mark_referenced_regs (&XEXP (reg_equiv_mem[regno], 0), mark, arg);
1037 else if (reg_equiv_address[regno] != 0)
1038 mark_referenced_regs (&reg_equiv_address[regno], mark, arg);
1039 return;
1042 fmt = GET_RTX_FORMAT (code);
1043 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1045 if (fmt[i] == 'e')
1046 mark_referenced_regs (&XEXP (*loc, i), mark, arg);
1047 else if (fmt[i] == 'E')
1048 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
1049 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg);
1053 /* Parameter function for mark_referenced_regs() that adds registers
1054 present in the insn and in equivalent mems and addresses to
1055 referenced_regs. */
1057 static void
1058 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED,
1059 enum machine_mode mode,
1060 int hardregno,
1061 void *arg ATTRIBUTE_UNUSED)
1063 add_to_hard_reg_set (&referenced_regs, mode, hardregno);
1066 /* Parameter function for mark_referenced_regs() that replaces
1067 registers referenced in a debug_insn that would have been restored,
1068 should it be a non-debug_insn, with their save locations. */
1070 static void
1071 replace_reg_with_saved_mem (rtx *loc,
1072 enum machine_mode mode,
1073 int regno,
1074 void *arg)
1076 unsigned int i, nregs = hard_regno_nregs [regno][mode];
1077 rtx mem;
1078 enum machine_mode *save_mode = (enum machine_mode *)arg;
1080 for (i = 0; i < nregs; i++)
1081 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1082 break;
1084 /* If none of the registers in the range would need restoring, we're
1085 all set. */
1086 if (i == nregs)
1087 return;
1089 while (++i < nregs)
1090 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1091 break;
1093 if (i == nregs
1094 && regno_save_mem[regno][nregs])
1096 mem = copy_rtx (regno_save_mem[regno][nregs]);
1098 if (nregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]])
1099 mem = adjust_address_nv (mem, save_mode[regno], 0);
1101 if (GET_MODE (mem) != mode)
1103 /* This is gen_lowpart_if_possible(), but without validating
1104 the newly-formed address. */
1105 int offset = 0;
1107 if (WORDS_BIG_ENDIAN)
1108 offset = (MAX (GET_MODE_SIZE (GET_MODE (mem)), UNITS_PER_WORD)
1109 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1110 if (BYTES_BIG_ENDIAN)
1111 /* Adjust the address so that the address-after-the-data is
1112 unchanged. */
1113 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1114 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (mem))));
1116 mem = adjust_address_nv (mem, mode, offset);
1119 else
1121 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs));
1122 for (i = 0; i < nregs; i++)
1123 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1125 gcc_assert (regno_save_mem[regno + i][1]);
1126 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]);
1128 else
1130 gcc_assert (save_mode[regno] != VOIDmode);
1131 XVECEXP (mem, 0, i) = gen_rtx_REG (save_mode [regno],
1132 regno + i);
1136 gcc_assert (GET_MODE (mem) == mode);
1137 *loc = mem;
1141 /* Insert a sequence of insns to restore. Place these insns in front of
1142 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1143 the maximum number of registers which should be restored during this call.
1144 It should never be less than 1 since we only work with entire registers.
1146 Note that we have verified in init_caller_save that we can do this
1147 with a simple SET, so use it. Set INSN_CODE to what we save there
1148 since the address might not be valid so the insn might not be recognized.
1149 These insns will be reloaded and have register elimination done by
1150 find_reload, so we need not worry about that here.
1152 Return the extra number of registers saved. */
1154 static int
1155 insert_restore (struct insn_chain *chain, int before_p, int regno,
1156 int maxrestore, enum machine_mode *save_mode)
1158 int i, k;
1159 rtx pat = NULL_RTX;
1160 int code;
1161 unsigned int numregs = 0;
1162 struct insn_chain *new_chain;
1163 rtx mem;
1165 /* A common failure mode if register status is not correct in the
1166 RTL is for this routine to be called with a REGNO we didn't
1167 expect to save. That will cause us to write an insn with a (nil)
1168 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1169 later, check for this common case here instead. This will remove
1170 one step in debugging such problems. */
1171 gcc_assert (regno_save_mem[regno][1]);
1173 /* Get the pattern to emit and update our status.
1175 See if we can restore `maxrestore' registers at once. Work
1176 backwards to the single register case. */
1177 for (i = maxrestore; i > 0; i--)
1179 int j;
1180 int ok = 1;
1182 if (regno_save_mem[regno][i] == 0)
1183 continue;
1185 for (j = 0; j < i; j++)
1186 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
1188 ok = 0;
1189 break;
1191 /* Must do this one restore at a time. */
1192 if (! ok)
1193 continue;
1195 numregs = i;
1196 break;
1199 mem = regno_save_mem [regno][numregs];
1200 if (save_mode [regno] != VOIDmode
1201 && save_mode [regno] != GET_MODE (mem)
1202 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1203 /* Check that insn to restore REGNO in save_mode[regno] is
1204 correct. */
1205 && reg_save_code (regno, save_mode[regno]) >= 0)
1206 mem = adjust_address_nv (mem, save_mode[regno], 0);
1207 else
1208 mem = copy_rtx (mem);
1210 /* Verify that the alignment of spill space is equal to or greater
1211 than required. */
1212 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1213 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1215 pat = gen_rtx_SET (VOIDmode,
1216 gen_rtx_REG (GET_MODE (mem),
1217 regno), mem);
1218 code = reg_restore_code (regno, GET_MODE (mem));
1219 new_chain = insert_one_insn (chain, before_p, code, pat);
1221 /* Clear status for all registers we restored. */
1222 for (k = 0; k < i; k++)
1224 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
1225 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1226 n_regs_saved--;
1229 /* Tell our callers how many extra registers we saved/restored. */
1230 return numregs - 1;
1233 /* Like insert_restore above, but save registers instead. */
1235 static int
1236 insert_save (struct insn_chain *chain, int before_p, int regno,
1237 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
1239 int i;
1240 unsigned int k;
1241 rtx pat = NULL_RTX;
1242 int code;
1243 unsigned int numregs = 0;
1244 struct insn_chain *new_chain;
1245 rtx mem;
1247 /* A common failure mode if register status is not correct in the
1248 RTL is for this routine to be called with a REGNO we didn't
1249 expect to save. That will cause us to write an insn with a (nil)
1250 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1251 later, check for this common case here. This will remove one
1252 step in debugging such problems. */
1253 gcc_assert (regno_save_mem[regno][1]);
1255 /* Get the pattern to emit and update our status.
1257 See if we can save several registers with a single instruction.
1258 Work backwards to the single register case. */
1259 for (i = MOVE_MAX_WORDS; i > 0; i--)
1261 int j;
1262 int ok = 1;
1263 if (regno_save_mem[regno][i] == 0)
1264 continue;
1266 for (j = 0; j < i; j++)
1267 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
1269 ok = 0;
1270 break;
1272 /* Must do this one save at a time. */
1273 if (! ok)
1274 continue;
1276 numregs = i;
1277 break;
1280 mem = regno_save_mem [regno][numregs];
1281 if (save_mode [regno] != VOIDmode
1282 && save_mode [regno] != GET_MODE (mem)
1283 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1284 /* Check that insn to save REGNO in save_mode[regno] is
1285 correct. */
1286 && reg_save_code (regno, save_mode[regno]) >= 0)
1287 mem = adjust_address_nv (mem, save_mode[regno], 0);
1288 else
1289 mem = copy_rtx (mem);
1291 /* Verify that the alignment of spill space is equal to or greater
1292 than required. */
1293 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1294 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1296 pat = gen_rtx_SET (VOIDmode, mem,
1297 gen_rtx_REG (GET_MODE (mem),
1298 regno));
1299 code = reg_save_code (regno, GET_MODE (mem));
1300 new_chain = insert_one_insn (chain, before_p, code, pat);
1302 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1303 for (k = 0; k < numregs; k++)
1305 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
1306 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1307 n_regs_saved++;
1310 /* Tell our callers how many extra registers we saved/restored. */
1311 return numregs - 1;
1314 /* A for_each_rtx callback used by add_used_regs. Add the hard-register
1315 equivalent of each REG to regset DATA. */
1317 static int
1318 add_used_regs_1 (rtx *loc, void *data)
1320 int regno, i;
1321 regset live;
1322 rtx x;
1324 x = *loc;
1325 live = (regset) data;
1326 if (REG_P (x))
1328 regno = REGNO (x);
1329 if (!HARD_REGISTER_NUM_P (regno))
1330 regno = reg_renumber[regno];
1331 if (regno >= 0)
1332 for (i = hard_regno_nregs[regno][GET_MODE (x)] - 1; i >= 0; i--)
1333 SET_REGNO_REG_SET (live, regno + i);
1335 return 0;
1338 /* A note_uses callback used by insert_one_insn. Add the hard-register
1339 equivalent of each REG to regset DATA. */
1341 static void
1342 add_used_regs (rtx *loc, void *data)
1344 for_each_rtx (loc, add_used_regs_1, data);
1347 /* Emit a new caller-save insn and set the code. */
1348 static struct insn_chain *
1349 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
1351 rtx insn = chain->insn;
1352 struct insn_chain *new_chain;
1354 #ifdef HAVE_cc0
1355 /* If INSN references CC0, put our insns in front of the insn that sets
1356 CC0. This is always safe, since the only way we could be passed an
1357 insn that references CC0 is for a restore, and doing a restore earlier
1358 isn't a problem. We do, however, assume here that CALL_INSNs don't
1359 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1361 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
1362 && before_p
1363 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
1364 chain = chain->prev, insn = chain->insn;
1365 #endif
1367 new_chain = new_insn_chain ();
1368 if (before_p)
1370 rtx link;
1372 new_chain->prev = chain->prev;
1373 if (new_chain->prev != 0)
1374 new_chain->prev->next = new_chain;
1375 else
1376 reload_insn_chain = new_chain;
1378 chain->prev = new_chain;
1379 new_chain->next = chain;
1380 new_chain->insn = emit_insn_before (pat, insn);
1381 /* ??? It would be nice if we could exclude the already / still saved
1382 registers from the live sets. */
1383 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1384 note_uses (&PATTERN (chain->insn), add_used_regs,
1385 &new_chain->live_throughout);
1386 /* If CHAIN->INSN is a call, then the registers which contain
1387 the arguments to the function are live in the new insn. */
1388 if (CALL_P (chain->insn))
1389 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
1390 link != NULL_RTX;
1391 link = XEXP (link, 1))
1392 note_uses (&XEXP (link, 0), add_used_regs,
1393 &new_chain->live_throughout);
1395 CLEAR_REG_SET (&new_chain->dead_or_set);
1396 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
1397 BB_HEAD (BASIC_BLOCK (chain->block)) = new_chain->insn;
1399 else
1401 new_chain->next = chain->next;
1402 if (new_chain->next != 0)
1403 new_chain->next->prev = new_chain;
1404 chain->next = new_chain;
1405 new_chain->prev = chain;
1406 new_chain->insn = emit_insn_after (pat, insn);
1407 /* ??? It would be nice if we could exclude the already / still saved
1408 registers from the live sets, and observe REG_UNUSED notes. */
1409 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1410 /* Registers that are set in CHAIN->INSN live in the new insn.
1411 (Unless there is a REG_UNUSED note for them, but we don't
1412 look for them here.) */
1413 note_stores (PATTERN (chain->insn), add_stored_regs,
1414 &new_chain->live_throughout);
1415 CLEAR_REG_SET (&new_chain->dead_or_set);
1416 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
1417 BB_END (BASIC_BLOCK (chain->block)) = new_chain->insn;
1419 new_chain->block = chain->block;
1420 new_chain->is_caller_save_insn = 1;
1422 INSN_CODE (new_chain->insn) = code;
1423 return new_chain;
1425 #include "gt-caller-save.h"