1 2023-12-21 Andrew Pinski <quic_apinski@quicinc.com>
4 * doc/md.texi (cond_copysign): Document.
5 (cond_len_copysign): Likewise.
6 * optabs.def: Reorder cond_copysign to be before
7 cond_fmin. Likewise for cond_len_copysign.
9 2023-12-21 Andre Vieira (lists) <andre.simoesdiasvieira@arm.com>
12 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Add multiple
13 vector arguments where simdlen is larger than veclen.
15 2023-12-21 Uros Bizjak <ubizjak@gmail.com>
18 * config/i386/i386.md (*ashlqi_ext<mode>_1): Move from the
19 high register of the input operand.
20 (*<insn>qi_ext<mode>_1): Ditto.
22 2023-12-21 Vladimir N. Makarov <vmakarov@redhat.com>
25 2023-12-18 Vladimir N. Makarov <vmakarov@redhat.com>
27 PR rtl-optimization/112918
28 * lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p.
29 (in_class_p): Restrict condition for narrowing class in case of
30 allow_all_reload_class_changes_p.
31 (process_alt_operands): Pass true for
32 allow_all_reload_class_changes_p in calls of in_class_p.
33 (curr_insn_transform): Ditto for reg operand win.
35 2023-12-21 Julian Brown <julian@codesourcery.com>
37 * gimplify.cc (omp_segregate_mapping_groups): Handle "present" groups.
38 (gimplify_scan_omp_clauses): Use mapping group functionality to
39 iterate through mapping nodes. Remove most gimplification of
40 OMP_CLAUSE_MAP nodes from here, but still populate ctx->variables
42 (gimplify_adjust_omp_clauses): Move most gimplification of
43 OMP_CLAUSE_MAP nodes here.
45 2023-12-21 Alex Coplan <alex.coplan@arm.com>
48 * config/aarch64/aarch64-ldp-fusion.cc (latest_hazard_before):
49 If the insn is throwing, record the previous insn as a hazard to
50 prevent moving it from the end of the BB.
52 2023-12-21 Jakub Jelinek <jakub@redhat.com>
54 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd):
55 Use unsigned char buffers for lhs1 and lhs2 instead of allocating
57 * collect2.cc (maybe_run_lto_and_relink): Swap xcalloc arguments.
59 2023-12-21 Richard Sandiford <richard.sandiford@arm.com>
62 * config/aarch64/aarch64-early-ra.cc (apply_allocation): Stub
63 out instructions that are going to be deleted before iterating
66 2023-12-21 Richard Sandiford <richard.sandiford@arm.com>
69 * config/aarch64/aarch64-early-ra.cc (find_strided_accesses): Fix
72 2023-12-21 Jakub Jelinek <jakub@redhat.com>
74 PR tree-optimization/112941
75 * gimple-lower-bitint.cc (gimple_lower_bitint): Disallow merging
76 a cast with multiplication, division or conversion to floating point
77 if rhs1 of the cast is result of another single use cast in the same
80 2023-12-21 chenxiaolong <chenxiaolong@loongson.cn>
82 * doc/extend.texi:According to the documents submitted earlier,
83 Two problems with function return types and using the actual types
84 of parameters instead of variable names were found and fixed.
86 2023-12-21 Jiajie Chen <c@jia.je>
88 * doc/extend.texi(__lsx_vabsd_di): remove extra `i' in name.
89 (__lsx_vfrintrm_d, __lsx_vfrintrm_s, __lsx_vfrintrne_d,
90 __lsx_vfrintrne_s, __lsx_vfrintrp_d, __lsx_vfrintrp_s, __lsx_vfrintrz_d,
91 __lsx_vfrintrz_s): fix return types.
92 (__lsx_vld, __lsx_vldi, __lsx_vldrepl_b, __lsx_vldrepl_d,
93 __lsx_vldrepl_h, __lsx_vldrepl_w, __lsx_vmaxi_b, __lsx_vmaxi_d,
94 __lsx_vmaxi_h, __lsx_vmaxi_w, __lsx_vmini_b, __lsx_vmini_d,
95 __lsx_vmini_h, __lsx_vmini_w, __lsx_vsrani_d_q, __lsx_vsrarni_d_q,
96 __lsx_vsrlni_d_q, __lsx_vsrlrni_d_q, __lsx_vssrani_d_q,
97 __lsx_vssrarni_d_q, __lsx_vssrarni_du_q, __lsx_vssrlni_d_q,
98 __lsx_vssrlrni_du_q, __lsx_vst, __lsx_vstx, __lsx_vssrani_du_q,
99 __lsx_vssrlni_du_q, __lsx_vssrlrni_d_q): add missing semicolon.
100 (__lsx_vpickve2gr_bu, __lsx_vpickve2gr_hu): fix typo in return
102 (__lsx_vstelm_b, __lsx_vstelm_d, __lsx_vstelm_h,
103 __lsx_vstelm_w): use imm type for the last argument.
104 (__lsx_vsigncov_b, __lsx_vsigncov_h, __lsx_vsigncov_w,
105 __lsx_vsigncov_d): remove duplicate definitions.
107 2023-12-21 Jiahao Xu <xujiahao@loongson.cn>
109 * config/loongarch/lasx.md: Use zero expansion instruction.
110 * config/loongarch/lsx.md: Ditto.
112 2023-12-21 Alexandre Oliva <oliva@adacore.com>
115 * builtins.cc (try_store_by_multiple_pieces): Drop obsolete
118 2023-12-21 Kewen Lin <linkw@linux.ibm.com>
120 PR rtl-optimization/112995
121 * sel-sched.cc (try_replace_dest_reg): Check the validity of the
122 replaced insn before actually replacing dest in expr.
124 2023-12-21 Kewen Lin <linkw@linux.ibm.com>
126 * dbgcnt.def (sched_block): Remove.
127 * sched-rgn.cc (schedule_region): Remove the support of debug count
130 2023-12-21 Jason Merrill <jason@redhat.com>
133 * doc/extend.texi: Document that computed goto does not
136 2023-12-21 Jason Merrill <jason@redhat.com>
139 * opts-common.cc (control_warning_option): Call
140 handle_generated_option for all cl_var_types.
142 2023-12-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
145 * config/riscv/riscv-v.cc (expand_select_vl): Optimize SELECT_VL.
147 2023-12-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
150 * config/riscv/riscv-vsetvl.cc: Disallow fusion when VL modification pollutes non AVL use.
152 2023-12-20 Rimvydas Jasinskas <rimvydas.jas@gmail.com>
154 * doc/invoke.texi: Document the new file extensions
156 2023-12-20 Richard Sandiford <richard.sandiford@arm.com>
158 PR rtl-optimization/111702
159 * cse.cc (set::mode): Move earlier.
160 (set::src_in_memory, set::src_volatile): Convert to bitfields.
161 (set::is_fake_set): New member variable.
162 (add_to_set): Add an is_fake_set parameter.
163 (find_sets_in_insn): Update calls accordingly.
164 (cse_insn): Do not apply REG_EQUAL notes to fake sets. Do not
165 try to optimize them either, or validate changes to them.
167 2023-12-20 Kuan-Lin Chen <rufus@andestech.com>
169 * config/riscv/predicates.md (move_operand): Reject symbolic operands
170 with a type SYMBOL_FORCE_TO_MEM.
171 (call_insn_operand): Support for CM_Large.
172 (pcrel_symbol_operand): New.
173 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Add builtin_define
174 "__riscv_cmodel_large".
175 * config/riscv/riscv-opts.h (riscv_code_model): Add CM_LARGE.
176 * config/riscv/riscv-protos.h (riscv_symbol_type): Add
178 * config/riscv/riscv.cc (riscv_classify_symbol) Support CM_LARGE model.
179 (riscv_symbol_insns) Add SYMBOL_FORCE_TO_MEM.
180 (riscv_cannot_force_const_mem): Ditto.
181 (riscv_split_symbol): Ditto.
182 (riscv_force_address): Check pseudo reg available before force_reg.
183 (riscv_size_ok_for_small_data_p): Disable in CM_LARGE model.
184 (riscv_can_use_per_function_literal_pools_p): New.
185 (riscv_elf_select_rtx_section): Handle per-function literal pools.
186 (riscv_output_mi_thunk): Add riscv_in_thunk_func.
187 (riscv_option_override): Support CM_LARGE model.
188 (riscv_function_ok_for_sibcall): Disable sibcalls in CM_LARGE model.
189 (riscv_in_thunk_func): New static.
190 * config/riscv/riscv.md (unspec): Define UNSPEC_FORCE_FOR_MEM.
191 (*large_load_address): New.
192 * config/riscv/riscv.opt (code_model): New.
194 2023-12-20 Wang Pengcheng <wangpengcheng.pp@bytedance.com>
196 * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix condition.
198 2023-12-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
201 * tree-vect-generic.cc (type_for_widest_vector_mode): Change function to
202 use original vector type and check widest vector mode has at most the
203 same number of elements.
204 (get_compute_type): Pass original vector type rather than the element
205 type to type_for_widest_vector_mode and remove now obsolete check for
206 the number of elements.
208 2023-12-20 Siddhesh Poyarekar <siddhesh@gotplt.org>
210 * tree-object-size.cc (object_size_info): Remove UNKNOWNS.
211 Drop all references to it.
212 (object_sizes_set): Move unknowns propagation code to...
213 (gimplify_size_expressions): ... here. Also free reexamine
215 (propagate_unknowns): New parameter UNKNOWNS. Update callers.
217 2023-12-20 Thomas Schwinge <thomas@codesourcery.com>
219 * config/gcn/gcn.h (LIBSTDCXX): Define to "gcc".
221 2023-12-20 Richard Biener <rguenther@suse.de>
223 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Also handle
224 CTOR and VIEW_CONVERT up to the load when performing chain DCE.
226 2023-12-20 Xi Ruoyao <xry111@xry111.site>
228 * config/loongarch/loongarch.cc
229 (loongarch_expand_vector_init_same): Remove "temp2" and reuse
231 (loongarch_expand_vector_init): Use gcc_unreachable () instead
232 of gcc_assert (0), and fix the comment for it.
234 2023-12-20 Xi Ruoyao <xry111@xry111.site>
237 * config/loongarch/loongarch.cc
238 (loongarch_expand_vector_init_same): Replace gen_reg_rtx +
239 emit_move_insn with force_reg.
240 (loongarch_expand_vector_init): Likewise.
242 2023-12-20 Xi Ruoyao <xry111@xry111.site>
245 * config/loongarch/lasx.md (UNSPEC_LASX_XVFCMP_*): Remove.
246 (lasx_xvfcmp_caf_<flasxfmt>): Remove.
247 (lasx_xvfcmp_cune_<FLASX:flasxfmt>): Remove.
248 (FSC256_UNS): Remove.
250 (lasx_xvfcmp_<vfcond:fcc>_<FLASX:flasxfmt>): Remove.
251 (lasx_xvfcmp_<fsc256>_<FLASX:flasxfmt>): Remove.
252 * config/loongarch/lsx.md (UNSPEC_LSX_XVFCMP_*): Remove.
253 (lsx_vfcmp_caf_<flsxfmt>): Remove.
254 (lsx_vfcmp_cune_<FLSX:flsxfmt>): Remove.
259 (lsx_vfcmp_<vfcond:fcc>_<FLSX:flsxfmt>): Remove.
260 (lsx_vfcmp_<fsc>_<FLSX:flsxfmt>): Remove.
261 * config/loongarch/simd.md
262 (fcond_simd): New define_code_iterator.
263 (<simd_isa>_<x>vfcmp_<fcond:fcond_simd>_<simdfmt>):
265 (fcond_simd_rev): New define_code_iterator.
266 (fcond_rev_asm): New define_code_attr.
267 (<simd_isa>_<x>vfcmp_<fcond:fcond_simd_rev>_<simdfmt>):
269 (fcond_inv): New define_code_iterator.
270 (fcond_inv_rev): New define_code_iterator.
271 (fcond_inv_rev_asm): New define_code_attr.
272 (<simd_isa>_<x>vfcmp_<fcond_inv>_<simdfmt>): New define_insn.
273 (<simd_isa>_<x>vfcmp_<fcond_inv:fcond_inv_rev>_<simdfmt>):
275 (UNSPEC_SIMD_FCMP_CAF, UNSPEC_SIMD_FCMP_SAF,
276 UNSPEC_SIMD_FCMP_SEQ, UNSPEC_SIMD_FCMP_SUN,
277 UNSPEC_SIMD_FCMP_SUEQ, UNSPEC_SIMD_FCMP_CNE,
278 UNSPEC_SIMD_FCMP_SOR, UNSPEC_SIMD_FCMP_SUNE): New unspecs.
279 (SIMD_FCMP): New define_int_iterator.
280 (fcond_unspec): New define_int_attr.
281 (<simd_isa>_<x>vfcmp_<fcond_unspec>_<simdfmt>): New define_insn.
282 * config/loongarch/loongarch.cc (loongarch_expand_lsx_cmp):
283 Remove unneeded special cases.
285 2023-12-20 demin.han <demin.han@starfivetech.com>
287 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix
289 (preferred_new_lmul_p): Ditto
291 2023-12-20 Jakub Jelinek <jakub@redhat.com>
294 * config/i386/i386-builtins.cc (ix86_builtins): Increase by one
296 (def_builtin): If not -fnon-call-exceptions, set TREE_NOTHROW on
297 the builtin FUNCTION_DECL. Add leaf attribute to DECL_ATTRIBUTES.
298 (ix86_add_new_builtins): Likewise.
300 2023-12-20 Jakub Jelinek <jakub@redhat.com>
302 PR tree-optimization/112941
303 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): If
304 save_cast_conditional, instead of adding assignment of t4 to
305 m_data[save_data_cnt + 1] before m_gsi, add phi nodes such that
306 t4 propagates to m_bb loop. For constant idx, use
307 m_data[save_data_cnt] rather than m_data[save_data_cnt + 1] if inside
309 (bitint_large_huge::lower_mergeable_stmt): Clear m_bb when no longer
310 expanding inside of that loop.
311 (bitint_large_huge::lower_comparison_stmt): Likewise.
312 (bitint_large_huge::lower_addsub_overflow): Likewise.
313 (bitint_large_huge::lower_mul_overflow): Likewise.
314 (bitint_large_huge::lower_bit_query): Likewise.
316 2023-12-20 Jakub Jelinek <jakub@redhat.com>
318 * doc/invoke.texi (-Walloc-size): Add to the list of
319 warning options, remove unnecessary line-break.
320 (-Wcalloc-transposed-args): Document new warning.
322 2023-12-20 Alex Coplan <alex.coplan@arm.com>
325 * config/aarch64/aarch64-ldp-fusion.cc
326 (ldp_bb_info::track_access): Punt on accesses with invalid
327 register operands, move definition of mem_size closer to its
330 2023-12-20 Pan Li <pan2.li@intel.com>
332 * config/riscv/riscv-v.cc (rvv_builder::npatterns_vid_diff_repeated_p):
333 New function to predicate the diff to vid is repeated or not.
334 (expand_const_vector): Add restriction
335 for the vid-diff code gen and implement general one.
337 2023-12-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
339 * config/riscv/riscv.cc (riscv_legitimize_move): Fix ICE.
341 2023-12-20 Alexandre Oliva <oliva@adacore.com>
344 * builtins.cc (expand_bultin_stack_address): Add
345 STACK_POINTER_OFFSET.
346 * doc/extend.texi (__builtin_stack_address): Adjust.
348 2023-12-20 Alexandre Oliva <oliva@adacore.com>
350 PR rtl-optimization/113002
351 * cfgrtl.cc (commit_one_edge_insertion): Tolerate jumps in the
352 inserted sequence during expand.
354 2023-12-20 Alexandre Oliva <oliva@adacore.com>
356 * builtins.cc (delta_type): New template class.
357 (set_apply_args_size, get_apply_args_size): Replace with...
358 (saved_apply_args_size): ... this.
359 (set_apply_result_size, get_apply_result_size): Replace with...
360 (saved_apply_result_size): ... this.
361 (apply_args_size, apply_result_size): Adjust.
363 2023-12-20 Jeff Law <jlaw@ventanamicro.com>
365 * config/mcore/mcore.h (CC1_SPEC): Do not set -funsigned-bitfields.
367 2023-12-20 Haochen Jiang <haochen.jiang@intel.com>
369 * config/i386/avx512bwintrin.h: Allow 64 bit mask intrin usage
371 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA2_EVEX512
372 for 64 bit mask builtins.
373 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Allow 64 bit
374 mask register for -mno-evex512.
375 * config/i386/i386.md (SWI1248_AVX512BWDQ_64): Remove
377 (*zero_extendsidi2): Change isa attribute to avx512bw.
380 (*andn<mode>_1): Remove TARGET_EVEX512.
381 (*one_cmplsi2_1_zext): Change isa attribute to avx512bw.
382 (*ashl<mode>3_1): Ditto.
383 (*lshr<mode>3_1): Ditto.
384 * config/i386/sse.md (SWI1248_AVX512BWDQ): Remove TARGET_EVEX512.
385 (SWI1248_AVX512BW): Ditto.
386 (SWI1248_AVX512BWDQ2): Ditto.
387 (*knotsi_1_zext): Ditto.
389 (SWI24_MASK): Removed.
390 (vec_pack_trunc_<mode>): Change iterator from SWI24_MASK to SWI24.
391 (vec_unpacks_lo_di): Remove TARGET_EVEX512.
392 (SWI48x_MASK): Removed.
393 (vec_unpacks_hi_<mode>): Change iterator from SWI48x_MASK to SWI48x.
395 2023-12-20 Siddhesh Poyarekar <siddhesh@gotplt.org>
397 PR tree-optimization/113012
398 * tree-object-size.cc (compute_builtin_object_size): Expand
399 comment for dynamic object sizes.
400 (collect_object_sizes_for): Always set COMPUTED bitmap for
401 dynamic object sizes.
403 2023-12-20 Alexandre Oliva <oliva@adacore.com>
405 * ipa-strub.cc (gsi_insert_finally_seq_after_call): Likewise.
406 (pass_ipa_strub::adjust_at_calls_call): Likewise.
408 2023-12-20 Alexandre Oliva <oliva@adacore.com>
410 * gcc.cc (process_command): Use LD_PIE_SPEC only if defined.
412 2023-12-19 Marek Polacek <polacek@redhat.com>
414 PR tree-optimization/113069
415 * gimple-ssa-sccopy.cc (scc_discovery): Remove unused member.
417 2023-12-19 Sandra Loosemore <sandra@codesourcery.com>
419 * omp-general.cc (vendor_properties): Add "hpe".
420 (atomic_default_mem_order_properties): Add "acquire" and "release".
421 (omp_context_selector_matches): Handle "acquire" and "release".
423 2023-12-19 Sandra Loosemore <sandra@codesourcery.com>
425 * omp-selectors.h: New file.
426 * omp-general.h: Include omp-selectors.h.
427 (OMP_TSS_CODE, OMP_TSS_NAME): New.
428 (OMP_TS_CODE, OMP_TS_NAME): New.
429 (make_trait_set_selector, make_trait_selector): Adjust declarations.
430 (omp_construct_traits_to_codes): Likewise.
431 (omp_context_selector_set_compare): Likewise.
432 (omp_get_context_selector): Likewise.
433 (omp_get_context_selector_list): New.
434 * omp-general.cc (omp_construct_traits_to_codes): Pass length in
435 as argument instead of returning it. Make it table-driven.
437 (kind_properties, vendor_properties, extension_properties): New.
438 (atomic_default_mem_order_properties): New.
440 (omp_check_context_selector): Simplify lookup and dispatch logic.
441 (omp_mark_declare_variant): Ignore variants with unknown construct
442 selectors. Adjust for new representation.
443 (make_trait_set_selector, make_trait_selector): Adjust for new
445 (omp_context_selector_matches): Simplify dispatch logic. Avoid
446 fixed-sized buffers and adjust call to omp_construct_traits_to_codes.
447 (omp_context_selector_props_compare): Adjust for new representations
448 and simplify dispatch logic.
449 (omp_context_selector_set_compare): Likewise.
450 (omp_context_selector_compare): Likewise.
451 (omp_get_context_selector): Adjust for new representations, and split
453 (omp_get_context_selector_list): New function.
454 (omp_lookup_tss_code): New.
455 (omp_lookup_ts_code): New.
456 (omp_context_compute_score): Adjust for new representations. Avoid
457 fixed-sized buffers and magic numbers. Adjust call to
458 omp_construct_traits_to_codes.
459 * gimplify.cc (omp_construct_selector_matches): Avoid use of
460 fixed-size buffer. Adjust call to omp_construct_traits_to_codes.
462 2023-12-19 Sandra Loosemore <sandra@codesourcery.com>
464 * omp-general.h (OMP_TP_NAMELIST_NODE): New.
465 * omp-general.cc (omp_context_name_list_prop): Move earlier
466 in the file, and adjust for new representation.
467 (omp_check_context_selector): Adjust this too.
468 (omp_context_selector_props_compare): Likewise.
470 2023-12-19 Sandra Loosemore <sandra@codesourcery.com>
472 * omp-general.h (OMP_TS_SCORE_NODE): New.
473 (OMP_TSS_ID, OMP_TSS_TRAIT_SELECTORS): New.
474 (OMP_TS_ID, OMP_TS_SCORE, OMP_TS_PROPERTIES): New.
475 (OMP_TP_NAME, OMP_TP_VALUE): New.
476 (make_trait_set_selector): Declare.
477 (make_trait_selector): Declare.
478 (make_trait_property): Declare.
479 (omp_constructor_traits_to_codes): Rename to
480 omp_construct_traits_to_codes.
481 * omp-general.cc (omp_constructor_traits_to_codes): Rename
482 to omp_construct_traits_to_codes. Use new accessors.
483 (omp_check_context_selector): Use new accessors.
484 (make_trait_set_selector): New.
485 (make_trait_selector): New.
486 (make_trait_property): New.
487 (omp_context_name_list_prop): Use new accessors.
488 (omp_context_selector_matches): Use new accessors.
489 (omp_context_selector_props_compare): Use new accessors.
490 (omp_context_selector_set_compare): Use new accessors.
491 (omp_get_context_selector): Use new accessors.
492 (omp_context_compute_score): Use new accessors.
493 * gimplify.cc (omp_construct_selector_matches): Adjust for renaming
494 of omp_constructor_traits_to_codes.
496 2023-12-19 David Faust <david.faust@oracle.com>
499 * btfout.cc (btf_fwd_to_enum_p): New.
500 (btf_asm_type_ref): Special case references to enum forwards.
501 (btf_asm_type): Special case enum forwards. Rename btf_size_type to
502 btf_size, and change chained ifs switching on btf_kind into else ifs.
504 2023-12-19 Richard Biener <rguenther@suse.de>
506 PR tree-optimization/113080
507 * tree-scalar-evolution.cc (expression_expensive_p): Allow
508 a tiny bit of growth due to expansion of shared trees.
509 (final_value_replacement_loop): Add comment.
511 2023-12-19 Richard Biener <rguenther@suse.de>
513 PR tree-optimization/113073
514 * tree-vect-stmts.cc (vectorizable_load): Properly ensure
515 to exempt only vector-size aligned overreads.
517 2023-12-19 Roger Sayle <roger@nextmovesoftware.com>
519 * config/i386/i386-expand.cc
520 (ix86_convert_const_wide_int_to_broadcast): Remove static.
521 (ix86_expand_move): Don't attempt to convert wide constants
522 to SSE using ix86_convert_const_wide_int_to_broadcast here.
523 (ix86_split_long_move): Always un-cprop multi-word constants.
524 * config/i386/i386-expand.h
525 (ix86_convert_const_wide_int_to_broadcast): Prototype here.
526 * config/i386/i386-features.cc: Include i386-expand.h.
527 (timode_scalar_chain::convert_insn): When converting TImode to
528 V1TImode, try ix86_convert_const_wide_int_to_broadcast.
530 2023-12-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
532 * config/riscv/riscv-v.cc (expand_const_vector): Use builder.inner_mode ().
534 2023-12-19 Jakub Jelinek <jakub@redhat.com>
537 * config/i386/mmx.md (signbitv2sf2, signbit<mode>2): Force operands[1]
540 2023-12-19 Alex Coplan <alex.coplan@arm.com>
543 * config/aarch64/predicates.md (aarch64_stp_reg_operand): Fix
544 parentheses to match intent.
546 2023-12-19 Jiufu Guo <guojiufu@linux.ibm.com>
548 PR rtl-optimization/112525
550 * dse.cc (get_group_info): Add arg_pointer_rtx as frame_related.
551 (check_mem_read_rtx): Add parameter to indicate if it is checking mem
553 (scan_insn): Add mem checking on call usage.
555 2023-12-19 Feng Wang <wangfeng@eswincomputing.com>
557 * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
558 Add new macro for match function.
559 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION):
560 Add one more parameter for macro expanding.
561 (handle_pragma_vector): Add match function calls.
562 * config/riscv/riscv-vector-builtins.h (enum required_ext):
563 Add enum defination for required extension.
564 (struct function_group_info): Add one more parameter for checking required-ext.
566 2023-12-18 Vladimir N. Makarov <vmakarov@redhat.com>
568 PR rtl-optimization/112918
569 * lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p.
570 (in_class_p): Restrict condition for narrowing class in case of
571 allow_all_reload_class_changes_p.
572 (process_alt_operands): Pass true for
573 allow_all_reload_class_changes_p in calls of in_class_p.
574 (curr_insn_transform): Ditto for reg operand win.
576 2023-12-18 Uros Bizjak <ubizjak@gmail.com>
578 * config/i386/i386.md (redundant compare peephole2):
579 New peephole2 pattern.
581 2023-12-18 Andreas Krebbel <krebbel@linux.ibm.com>
583 * config/s390/s390.cc (s390_encode_section_info): Replace
584 SYMBOL_REF_LOCAL_P with decl_binds_to_current_def_p.
586 2023-12-18 Andrew Pinski <quic_apinski@quicinc.com>
588 PR tree-optimization/113054
589 * gimple-ssa-sccopy.cc: Wrap the local types
590 with an anonymous namespace.
592 2023-12-18 Richard Biener <rguenther@suse.de>
595 * tree-pretty-print.cc (dump_generic_node): Dump
596 sizetype as __SIZETYPE__ with TDF_GIMPLE.
597 Dump unnamed vector types as T [[gnu::vector_size(n)]] with
599 * tree-ssa-address.cc (create_mem_ref_raw): Never generate
600 a NULL STEP when INDEX is specified.
602 2023-12-18 Gerald Pfeifer <gerald@pfeifer.com>
605 * doc/install.texi (Specific) <hppa*-hp-hpux10>: Remove section.
606 (Specific) <hppa*-hp-hpux11>: Remove references to GCC 2.95 and
607 3.0. Also libffi has been ported now.
609 2023-12-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
612 * config/riscv/riscv.md (none,W21,W42,W84,W43,W86,W87): Add W0.
613 (none,W21,W42,W84,W43,W86,W87,W0): Ditto.
614 * config/riscv/vector.md: Ditto.
616 2023-12-18 Richard Biener <rguenther@suse.de>
619 * tree-pretty-print.cc (dump_mem_ref): Use TDF_GIMPLE path
620 also for TARGET_MEM_REF and amend it.
622 2023-12-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
624 * config/riscv/riscv.cc (riscv_regmode_natural_size): Fix ICE for
625 FIXED-VLMAX of -march=rv32gc_zve32f.
627 2023-12-18 Jakub Jelinek <jakub@redhat.com>
629 PR tree-optimization/113013
630 * tree-object-size.cc (alloc_object_size): Return size_unknown if
631 corresponding argument(s) don't have integral type or have integral
632 type with higher precision than sizetype. Don't check arg1 >= 0
633 uselessly. Compare argument indexes against gimple_call_num_args
634 in unsigned type rather than int. Formatting fixes.
636 2023-12-18 Pan Li <pan2.li@intel.com>
638 * config/riscv/riscv-v.cc (expand_const_vector): Take step2
639 instead of step1 for second series.
641 2023-12-18 liushuyu <liushuyu011@gmail.com>
643 * config.gcc: Add loongarch-d.o to d_target_objs for LoongArch
645 * config/loongarch/t-loongarch: Add object target for loongarch-d.cc.
646 * config/loongarch/loongarch-d.cc
647 (loongarch_d_target_versions): add interface function to define builtin
648 D versions for LoongArch architecture.
649 (loongarch_d_handle_target_float_abi): add interface function to define
650 builtin D traits for LoongArch architecture.
651 (loongarch_d_register_target_info): add interface function to register
652 loongarch_d_handle_target_float_abi function.
653 * config/loongarch/loongarch-d.h
654 (loongarch_d_target_versions): add function prototype.
655 (loongarch_d_register_target_info): Likewise.
657 2023-12-18 xuli <xuli1@eswincomputing.com>
659 * config/riscv/vector.md: Add viota avl_type attribute.
661 2023-12-18 Pan Li <pan2.li@intel.com>
663 * config/riscv/riscv.cc (riscv_expand_mult_with_const_int):
664 Change int into HOST_WIDE_INT.
665 (riscv_legitimize_poly_move): Ditto.
667 2023-12-17 Xi Ruoyao <xry111@xry111.site>
669 * config/loongarch/loongarch.md (alslsi3_extend): New
672 2023-12-17 Xi Ruoyao <xry111@xry111.site>
675 * config/loongarch/loongarch-def.cc
676 (loongarch_rtx_cost_data::loongarch_rtx_cost_data): Update
677 instruction costs per micro-benchmark results.
678 (loongarch_rtx_cost_optimize_size): Set all instruction costs
679 to (COSTS_N_INSNS (1) + 1).
680 * config/loongarch/loongarch.cc (loongarch_rtx_costs): Remove
681 special case for multiplication when optimizing for size.
682 Adjust division cost when TARGET_64BIT && !TARGET_DIV32.
683 Account the extra cost when TARGET_CHECK_ZERO_DIV and
684 optimizing for speed.
686 2023-12-17 Xi Ruoyao <xry111@xry111.site>
688 * config/loongarch/loongarch-def.cc (rtl.h): Include.
689 (COSTS_N_INSNS): Remove the macro definition.
691 2023-12-17 Gerald Pfeifer <gerald@pfeifer.com>
694 * doc/install.texi (Specific) <hppa*-hp-hpux*>: Remove a note on
696 Remove details on how the HP assembler, which we document as not
698 <hppa*-hp-hpux11>: Note that only the HP linker is supported.
700 2023-12-17 Gerald Pfeifer <gerald@pfeifer.com>
703 * doc/install.texi (Installing GCC): Remove reference to
706 (Final install): Remove section on submitting information for
707 buildstat.html. Adjust the request for feedback.
709 2023-12-16 David Malcolm <dmalcolm@redhat.com>
711 * json.cc (print_escaped_json_string): New, taken from
713 (object::print): Use it for printing keys.
714 (string::print): Move implementation to
715 print_escaped_json_string.
716 (selftest::test_writing_objects): Add a key containing
717 quote, backslash, and control characters.
719 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com>
721 * config/aarch64/aarch64-feature-deps.h (fmv_deps_<FEAT_NAME>):
722 Define aarch64_feature_flags mask foreach FMV feature.
723 * config/aarch64/aarch64-option-extensions.def: Use new macros
724 to define FMV feature extensions.
725 * config/aarch64/aarch64.cc (aarch64_option_valid_attribute_p):
726 Check for target_version attribute after processing target
728 (aarch64_fmv_feature_data): New.
729 (aarch64_parse_fmv_features): New.
730 (aarch64_process_target_version_attr): New.
731 (aarch64_option_valid_version_attribute_p): New.
732 (get_feature_mask_for_version): New.
733 (compare_feature_masks): New.
734 (aarch64_compare_version_priority): New.
735 (build_ifunc_arg_type): New.
736 (make_resolver_func): New.
737 (add_condition_to_bb): New.
738 (dispatch_function_versions): New.
739 (aarch64_generate_version_dispatcher_body): New.
740 (aarch64_get_function_versions_dispatcher): New.
741 (aarch64_common_function_versions): New.
742 (aarch64_mangle_decl_assembler_name): New.
743 (TARGET_OPTION_VALID_VERSION_ATTRIBUTE_P): New implementation.
744 (TARGET_OPTION_EXPANDED_CLONES_ATTRIBUTE): New implementation.
745 (TARGET_OPTION_FUNCTION_VERSIONS): New implementation.
746 (TARGET_COMPARE_VERSION_PRIORITY): New implementation.
747 (TARGET_GENERATE_VERSION_DISPATCHER_BODY): New implementation.
748 (TARGET_GET_FUNCTION_VERSIONS_DISPATCHER): New implementation.
749 (TARGET_MANGLE_DECL_ASSEMBLER_NAME): New implementation.
750 * config/aarch64/aarch64.h (TARGET_HAS_FMV_TARGET_ATTRIBUTE):
752 * config/arm/aarch-common.h (enum aarch_parse_opt_result): Add
753 new value to report duplicate FMV feature.
754 * common/config/aarch64/cpuinfo.h: New file.
756 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com>
758 * attribs.cc (decl_attributes): Pass attribute name to target.
759 (is_function_default_version): Update comment to specify
760 incompatibility with target_version attributes.
761 * cgraphclones.cc (cgraph_node::create_version_clone_with_body):
762 Call valid_version_attribute_p for target_version attributes.
763 * defaults.h (TARGET_HAS_FMV_TARGET_ATTRIBUTE): New macro.
764 * target.def (valid_version_attribute_p): New hook.
765 * doc/tm.texi.in: Add new hook.
766 * doc/tm.texi: Regenerate.
767 * multiple_target.cc (create_dispatcher_calls): Remove redundant
768 is_function_default_version check.
769 (expand_target_clones): Use target macro to pick attribute name.
770 * targhooks.cc (default_target_option_valid_version_attribute_p):
772 * targhooks.h (default_target_option_valid_version_attribute_p):
774 * tree.h (DECL_FUNCTION_VERSIONED): Update comment to include
775 target_version attributes.
777 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com>
779 * common/config/aarch64/aarch64-common.cc
780 (struct aarch64_option_extension): Remove unused field.
781 (all_extensions): Ditto.
782 (aarch64_get_extension_string_for_isa_flags): Remove filtering
783 of features without native detection.
784 * config/aarch64/driver-aarch64.cc (host_detect_local_cpu):
785 Explicitly add expected features that lack cpuinfo detection.
787 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com>
789 * common/config/aarch64/aarch64-common.cc
790 (aarch64_get_extension_string_for_isa_flags): Fix generation of
791 the "+nocrypto" extension.
792 * config/aarch64/aarch64.h (AARCH64_ISA_CRYPTO): Remove.
793 (TARGET_CRYPTO): Remove.
794 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
795 Don't use TARGET_CRYPTO.
797 2023-12-15 Mary Bennett <mary.bennett@embecosm.com>
799 * config/riscv/constraints.md: CVP2 -> CV_alu_pow2.
800 * config/riscv/corev.md: Likewise.
802 2023-12-15 Mary Bennett <mary.bennett@embecosm.com>
804 * common/config/riscv/riscv-common.cc: Add XCVelw.
805 * config/riscv/corev.def: Likewise.
806 * config/riscv/corev.md: Likewise.
807 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
808 * config/riscv/riscv-ftypes.def: Likewise.
809 * config/riscv/riscv.opt: Likewise.
810 * doc/extend.texi: Add XCVelw builtin documentation.
811 * doc/sourcebuild.texi: Likewise.
813 2023-12-15 Jeff Law <jlaw@ventanamicro.com>
816 * config/riscv/constraints.md (D03, DsA): Remove unused constraints.
817 * config/riscv/predicates.md (const_0_3_operand): New predicate.
818 (const_0_10_operand): Likewise.
819 * config/riscv/crypto.md (riscv_aes32dsi): Use new predicate. Drop
820 unnecessary constraint.
821 (riscv_aes32dsmi, riscv_aes64im, riscv_aes32esi): Likewise.
822 (riscv_aes32esmi, *riscv_<sm4_op>_si): Likewise.
823 (riscv_<sm4_op>_di_extend, riscv_<sm4_op>_si): Likewise.
825 2023-12-15 Alex Coplan <alex.coplan@arm.com>
827 * config.gcc: Add aarch64-ldp-fusion.o to extra_objs for aarch64.
828 * config/aarch64/aarch64-passes.def: Add copies of pass_ldp_fusion
830 * config/aarch64/aarch64-protos.h (make_pass_ldp_fusion): Declare.
831 * config/aarch64/aarch64.opt (-mearly-ldp-fusion): New.
832 (-mlate-ldp-fusion): New.
833 (--param=aarch64-ldp-alias-check-limit): New.
834 (--param=aarch64-ldp-writeback): New.
835 * config/aarch64/t-aarch64: Add rule for aarch64-ldp-fusion.o.
836 * config/aarch64/aarch64-ldp-fusion.cc: New file.
837 * doc/invoke.texi (AArch64 Options): Document new
838 -m{early,late}-ldp-fusion options.
840 2023-12-15 Alex Coplan <alex.coplan@arm.com>
842 * config/aarch64/aarch64-ldpstp.md: Abstract ldp/stp
843 representation from peepholes, allowing use of new form.
844 * config/aarch64/aarch64-modes.def (V2x4QImode): Define.
845 * config/aarch64/aarch64-protos.h
846 (aarch64_finish_ldpstp_peephole): Declare.
847 (aarch64_swap_ldrstr_operands): Delete declaration.
848 (aarch64_gen_load_pair): Adjust parameters.
849 (aarch64_gen_store_pair): Likewise.
850 * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>):
852 (vec_store_pair<DREG:mode><DREG2:mode>): Delete.
853 (load_pair<VQ:mode><VQ2:mode>): Delete.
854 (vec_store_pair<VQ:mode><VQ2:mode>): Delete.
855 * config/aarch64/aarch64.cc (aarch64_pair_mode_for_mode): New.
856 (aarch64_gen_store_pair): Adjust to use new unspec form of stp.
857 Drop second mem from parameters.
858 (aarch64_gen_load_pair): Likewise.
859 (aarch64_pair_mem_from_base): New.
860 (aarch64_save_callee_saves): Emit REG_CFA_OFFSET notes for
861 frame-related saves. Adjust call to aarch64_gen_store_pair
862 (aarch64_restore_callee_saves): Adjust calls to
863 aarch64_gen_load_pair to account for change in interface.
864 (aarch64_process_components): Likewise.
865 (aarch64_classify_address): Handle 32-byte pair mems in
867 (aarch64_print_operand): Likewise.
868 (aarch64_copy_one_block_and_progress_pointers): Adjust calls to
869 account for change in aarch64_gen_{load,store}_pair interface.
870 (aarch64_set_one_block_and_progress_pointer): Likewise.
871 (aarch64_finish_ldpstp_peephole): New.
872 (aarch64_gen_adjusted_ldpstp): Adjust to use generation helper.
873 * config/aarch64/aarch64.md (ldpstp): New attribute.
874 (load_pair_sw_<SX:mode><SX2:mode>): Delete.
875 (load_pair_dw_<DX:mode><DX2:mode>): Delete.
876 (load_pair_dw_<TX:mode><TX2:mode>): Delete.
877 (*load_pair_<ldst_sz>): New.
878 (*load_pair_16): New.
879 (store_pair_sw_<SX:mode><SX2:mode>): Delete.
880 (store_pair_dw_<DX:mode><DX2:mode>): Delete.
881 (store_pair_dw_<TX:mode><TX2:mode>): Delete.
882 (*store_pair_<ldst_sz>): New.
883 (*store_pair_16): New.
884 (*load_pair_extendsidi2_aarch64): Adjust to use new form.
885 (*zero_extendsidi2_aarch64): Likewise.
886 * config/aarch64/iterators.md (VPAIR): New.
887 * config/aarch64/predicates.md (aarch64_mem_pair_operand): Change to
888 a special predicate derived from aarch64_mem_pair_operator.
890 2023-12-15 Alex Coplan <alex.coplan@arm.com>
892 * config/aarch64/aarch64-protos.h (aarch64_ldpstp_operand_mode_p): Declare.
893 * config/aarch64/aarch64.cc (aarch64_gen_storewb_pair): Build RTL
894 directly instead of invoking named pattern.
895 (aarch64_gen_loadwb_pair): Likewise.
896 (aarch64_ldpstp_operand_mode_p): New.
897 * config/aarch64/aarch64.md (loadwb_pair<GPI:mode>_<P:mode>): Replace with
899 (*loadwb_post_pair_<ldst_sz>): ... this. Generalize as described
901 (loadwb_pair<GPF:mode>_<P:mode>): Delete (superseded by the
903 (*loadwb_post_pair_16): New.
904 (*loadwb_pre_pair_<ldst_sz>): New.
905 (loadwb_pair<TX:mode>_<P:mode>): Delete.
906 (*loadwb_pre_pair_16): New.
907 (storewb_pair<GPI:mode>_<P:mode>): Replace with ...
908 (*storewb_pre_pair_<ldst_sz>): ... this. Generalize as
909 described in cover letter.
910 (*storewb_pre_pair_16): New.
911 (storewb_pair<GPF:mode>_<P:mode>): Delete.
912 (*storewb_post_pair_<ldst_sz>): New.
913 (storewb_pair<TX:mode>_<P:mode>): Delete.
914 (*storewb_post_pair_16): New.
915 * config/aarch64/predicates.md (aarch64_mem_pair_operator): New.
916 (pmode_plus_operator): New.
917 (aarch64_ldp_reg_operand): New.
918 (aarch64_stp_reg_operand): New.
920 2023-12-15 Alex Coplan <alex.coplan@arm.com>
922 * config/aarch64/aarch64.cc (aarch64_print_address_internal): Handle SVE
923 modes when printing ldp/stp addresses.
925 2023-12-15 Alex Coplan <alex.coplan@arm.com>
927 * config/aarch64/aarch64-protos.h (aarch64_const_zero_rtx_p): New.
928 * config/aarch64/aarch64.cc (aarch64_const_zero_rtx_p): New.
930 (aarch64_print_operand): ... here. Recognize CONST0_RTXes in
931 modes other than VOIDmode.
933 2023-12-15 Xiao Zeng <zengxiao@eswincomputing.com>
935 * common/config/riscv/riscv-common.cc:
936 (riscv_implied_info): Add zvfbfmin item.
937 (riscv_ext_version_table): Ditto.
938 (riscv_ext_flag_table): Ditto.
939 * config/riscv/riscv.opt:
940 (MASK_ZVFBFMIN): New macro.
941 (MASK_VECTOR_ELEN_BF_16): Ditto.
942 (TARGET_ZVFBFMIN): Ditto.
944 2023-12-15 Wilco Dijkstra <wilco.dijkstra@arm.com>
946 * config/aarch64/aarch64.opt (aarch64_mops_memmove_size_threshold):
948 * config/aarch64/aarch64.md (cpymemdi): Add a parameter.
949 (movmemdi): Call aarch64_expand_cpymem.
950 * config/aarch64/aarch64.cc (aarch64_copy_one_block): Rename function,
951 simplify, support storing generated loads/stores.
952 (aarch64_expand_cpymem): Support expansion of memmove.
953 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem): Add bool arg.
955 2023-12-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
957 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Fix bug.
959 2023-12-15 Jakub Jelinek <jakub@redhat.com>
961 * target.h (struct bitint_info): Add abi_limb_mode member, adjust
963 * target.def (bitint_type_info): Mention abi_limb_mode instead of
965 * varasm.cc (output_constant): Use abi_limb_mode rather than
967 * stor-layout.cc (finish_bitfield_representative): Likewise. Assert
968 that if precision is smaller or equal to abi_limb_mode precision or
969 if info.big_endian is different from WORDS_BIG_ENDIAN, info.limb_mode
970 must be the same as info.abi_limb_mode.
971 (layout_type): Use abi_limb_mode rather than limb_mode.
972 * gimple-fold.cc (clear_padding_bitint_needs_padding_p): Likewise.
973 (clear_padding_type): Likewise.
974 * config/i386/i386.cc (ix86_bitint_type_info): Also set
976 * doc/tm.texi: Regenerated.
978 2023-12-15 Julian Brown <julian@codesourcery.com>
980 * gimplify.cc (extract_base_bit_offset): Add VARIABLE_OFFSET parameter.
981 (omp_get_attachment, omp_group_last, omp_group_base,
982 omp_directive_maps_explicitly): Add GOMP_MAP_STRUCT_UNORD support.
983 (omp_accumulate_sibling_list): Update calls to extract_base_bit_offset.
984 Support GOMP_MAP_STRUCT_UNORD.
985 (omp_build_struct_sibling_lists, gimplify_scan_omp_clauses,
986 gimplify_adjust_omp_clauses, gimplify_omp_target_update): Add
987 GOMP_MAP_STRUCT_UNORD support.
988 * omp-low.cc (lower_omp_target): Add GOMP_MAP_STRUCT_UNORD support.
989 * tree-pretty-print.cc (dump_omp_clause): Likewise.
991 2023-12-15 Alex Coplan <alex.coplan@arm.com>
994 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
995 Use force_reload_address to reload addresses that aren't suitable for
996 ld1rq in the pre-RA splitter.
998 2023-12-15 Alex Coplan <alex.coplan@arm.com>
1001 * emit-rtl.cc (address_reload_context::emit_autoinc): New.
1002 (force_reload_address): New.
1003 * emit-rtl.h (struct address_reload_context): Declare.
1004 (force_reload_address): Declare.
1005 * lra-constraints.cc (class lra_autoinc_reload_context): New.
1006 (emit_inc): Drop IN parameter, invoke
1007 code moved to emit-rtl.cc:address_reload_context::emit_autoinc.
1008 (curr_insn_transform): Drop redundant IN parameter in call to
1010 * recog.h (class recog_data_saver): New.
1012 2023-12-15 Jakub Jelinek <jakub@redhat.com>
1014 PR tree-optimization/113024
1015 * match.pd (two conversions in a row): Simplify scalar integer
1016 sign-extension followed by truncation.
1018 2023-12-15 Jakub Jelinek <jakub@redhat.com>
1020 PR tree-optimization/113003
1021 * gimple-lower-bitint.cc (arith_overflow_arg_kind): New function.
1022 (gimple_lower_bitint): Use it to catch .{ADD,SUB,MUL}_OVERFLOW
1023 calls with large/huge INTEGER_CST arguments.
1025 2023-12-15 Gerald Pfeifer <gerald@pfeifer.com>
1027 * doc/install.texi (Specific) <nvptx-*-none>: Update nvptx-tools
1030 2023-12-15 Hongyu Wang <hongyu.wang@intel.com>
1033 * config/i386/i386-options.cc (ix86_option_override_internal):
1034 Sync ix86_move_max/ix86_store_max with prefer_vector_width when
1035 it is explicitly set.
1037 2023-12-15 Haochen Jiang <haochen.jiang@intel.com>
1039 * config/i386/driver-i386.cc (host_detect_local_cpu): Do not
1040 set Grand Ridge depending on RAO-INT.
1041 * config/i386/i386.h: Remove PTA_RAOINT from PTA_GRANDRIDGE.
1042 * doc/invoke.texi: Adjust documentation.
1044 2023-12-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1047 * config/riscv/riscv.cc: Adapt generic cost model same ARM SVE.
1049 2023-12-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1052 * tree-vect-loop.cc (vect_estimate_min_profitable_iters):
1053 Remove address cost for select_vl/decrement IV.
1055 2023-12-14 Andrew Pinski <quic_apinski@quicinc.com>
1057 PR middle-end/111260
1058 * optabs.cc (emit_conditional_move): Change the modes to be
1059 equal before forcing the constant to a register.
1061 2023-12-14 Di Zhao <dizhao@os.amperecomputing.com>
1063 PR tree-optimization/110279
1064 * doc/invoke.texi: New parameter fully-pipelined-fma.
1065 * params.opt: New parameter fully-pipelined-fma.
1066 * tree-ssa-reassoc.cc (get_mult_latency_consider_fma): Return
1067 the latency of MULT_EXPRs that can't be hidden by the FMAs.
1068 (get_reassociation_width): Search for a smaller width
1069 considering the benefit of fully pipelined FMA.
1070 (rank_ops_for_fma): Return the number of MULT_EXPRs.
1071 (reassociate_bb): Pass the number of MULT_EXPRs to
1072 get_reassociation_width; avoid calling
1073 get_reassociation_width twice.
1075 2023-12-14 Robin Dapp <rdapp@ventanamicro.com>
1078 * expmed.cc (extract_bit_field_1): Ensure better mode
1079 has fitting unit_precision.
1081 2023-12-14 Robin Dapp <rdapp@ventanamicro.com>
1084 * config/riscv/autovec.md (vec_extract<mode>bi): New expander
1085 calling vec_extract<mode>qi.
1086 * config/riscv/riscv-protos.h (riscv_legitimize_poly_move):
1088 (emit_vec_extract): Change argument from poly_int64 to rtx.
1089 * config/riscv/riscv-v.cc (shuffle_extract_and_slide1up_patterns):
1091 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Export.
1092 (riscv_legitimize_move): Use rtx instead of poly_int64.
1093 * expmed.cc (store_bit_field_1): Change BITSIZE to PRECISION.
1094 (extract_bit_field_1): Change BITSIZE to PRECISION and use
1095 return mode from insn_data as target mode.
1097 2023-12-14 Alex Coplan <alex.coplan@arm.com>
1099 * doc/extend.texi: Document AArch64 Operand Modifiers.
1101 2023-12-14 Richard Biener <rguenther@suse.de>
1103 PR tree-optimization/113018
1104 * tree-vect-slp.cc (vect_slp_check_for_roots): Only start
1105 SLP discovery from stmts with a LHS.
1107 2023-12-14 Richard Biener <rguenther@suse.de>
1109 PR tree-optimization/112793
1110 * tree-vect-slp.cc (vect_schedule_slp_node): Already
1111 code-generated constant/external nodes are OK.
1113 2023-12-14 Richard Sandiford <richard.sandiford@arm.com>
1115 * config/aarch64/aarch64-early-ra.cc (allocno_info::is_equiv): New
1117 (allocno_info::equiv_allocno): Replace with...
1118 (allocno_info::related_allocno): ...this member variable.
1119 (allocno_info::chain_prev): Put into an enum with...
1120 (allocno_info::last_use_point): ...this new member variable.
1121 (color_info::num_fpr_preferences): New member variable.
1122 (early_ra::m_shared_allocnos): Likewise.
1123 (allocno_info::is_shared): New member function.
1124 (allocno_info::is_equiv_to): Likewise.
1125 (early_ra::dump_allocnos): Dump sharing information. Tweak column
1127 (early_ra::fpr_preference): Check ALLOWS_NONFPR before returning -2.
1128 (early_ra::start_new_region): Handle m_shared_allocnos.
1129 (early_ra::create_allocno_group): Set related_allocno rather than
1131 (early_ra::record_allocno_use): Likewise. Detect multiple calls
1132 for the same program point. Update last_use_point and is_equiv.
1133 Clear is_strong_copy_src rather than is_strong_copy_dest.
1134 (early_ra::record_allocno_def): Use related_allocno rather than
1135 equiv_allocno. Update last_use_point.
1136 (early_ra::valid_equivalence_p): Replace with...
1137 (early_ra::find_related_start): ...this new function.
1138 (early_ra::record_copy): Look for cases where a destination copy chain
1139 can be shared with the source allocno.
1140 (early_ra::find_strided_accesses): Update for equiv_allocno->
1141 related_allocno change. Only call consider_strong_copy_src_chain
1142 at the head of a copy chain.
1143 (early_ra::is_chain_candidate): Skip shared allocnos. Update for
1144 new representation of equivalent allocnos.
1145 (early_ra::chain_allocnos): Update for new representation of
1146 equivalent allocnos.
1147 (early_ra::try_to_chain_allocnos): Likewise.
1148 (early_ra::merge_fpr_info): New function, split out from...
1149 (early_ra::set_single_color_rep): ...here.
1150 (early_ra::form_chains): Handle shared allocnos.
1151 (early_ra::process_copies): Count the number of FPR preferences.
1152 (early_ra::cmp_decreasing_size): Rename to...
1153 (early_ra::cmp_allocation_order): ...this. Sort equal-sized groups
1154 by the number of FPR preferences.
1155 (early_ra::finalize_allocation): Handle shared allocnos.
1156 (early_ra::process_region): Reset chain_prev as well as chain_next.
1158 2023-12-14 Alexandre Oliva <oliva@adacore.com>
1160 PR middle-end/112938
1161 * ipa-strub.cc (pass_ipa_strub::execute): Pass volatile args
1162 by reference to internal strub wrapped bodies.
1164 2023-12-14 Alexandre Oliva <oliva@adacore.com>
1166 PR middle-end/112938
1167 * ipa-strub.cc (pass_ipa_strub::execute): Handle promoted
1168 volatile args in internal strub. Simplify.
1170 2023-12-14 Thomas Schwinge <thomas@codesourcery.com>
1172 * gimple-ssa-sccopy.cc: '#define INCLUDE_ALGORITHM' instead of
1173 '#include <algorithm>'.
1175 2023-12-14 Feng Wang <wangfeng@eswincomputing.com>
1178 2023-12-12 Feng Wang <wangfeng@eswincomputing.com>
1180 * config/riscv/riscv-vector-builtins-functions.def (DEF_RVV_FUNCTION):
1182 (read_vl): Using AVAIL argument default value.
1288 (vfrsub_frm): Ditto.
1291 (vfwadd_frm): Ditto.
1292 (vfwsub_frm): Ditto.
1298 (vfrdiv_frm): Ditto.
1300 (vfwmul_frm): Ditto.
1309 (vfmacc_frm): Ditto.
1310 (vfnmacc_frm): Ditto.
1311 (vfmsac_frm): Ditto.
1312 (vfnmsac_frm): Ditto.
1313 (vfmadd_frm): Ditto.
1314 (vfnmadd_frm): Ditto.
1315 (vfmsub_frm): Ditto.
1316 (vfnmsub_frm): Ditto.
1321 (vfwmacc_frm): Ditto.
1322 (vfwnmacc_frm): Ditto.
1323 (vfwmsac_frm): Ditto.
1324 (vfwnmsac_frm): Ditto.
1326 (vfsqrt_frm): Ditto.
1329 (vfrec7_frm): Ditto.
1348 (vfcvt_rtz_x): Ditto.
1349 (vfcvt_rtz_xu): Ditto.
1351 (vfcvt_x_frm): Ditto.
1352 (vfcvt_xu_frm): Ditto.
1353 (vfcvt_f_frm): Ditto.
1356 (vfwcvt_rtz_x): Ditto.
1357 (vfwcvt_rtz_xu) Ditto.:
1359 (vfwcvt_x_frm): Ditto.
1360 (vfwcvt_xu_frm) Ditto.:
1363 (vfncvt_rtz_x): Ditto.
1364 (vfncvt_rtz_xu): Ditto.
1366 (vfncvt_rod_f): Ditto.
1367 (vfncvt_x_frm): Ditto.
1368 (vfncvt_xu_frm): Ditto.
1369 (vfncvt_f_frm): Ditto.
1384 (vfredusum_frm): Ditto.
1385 (vfredosum_frm): Ditto.
1386 (vfwredosum): Ditto.
1387 (vfwredusum): Ditto.
1388 (vfwredosum_frm): Ditto.
1389 (vfwredusum_frm): Ditto.
1414 (vslidedown): Ditto.
1416 (vslide1down): Ditto.
1417 (vfslide1up): Ditto.
1418 (vfslide1down): Ditto.
1420 (vrgatherei16): Ditto.
1422 (vundefined): Ditto.
1423 (vreinterpret): Ditto.
1425 (vlmul_trunc): Ditto.
1438 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION): Using variadic macro.
1439 * config/riscv/riscv-vector-builtins.h (struct function_group_info):
1440 Add avail function interface into struct.
1441 * config/riscv/t-riscv: Add dependency
1442 * config/riscv/riscv-vector-builtins-avail.h: New file.The definition of AVAIL marco.
1444 2023-12-14 Jakub Jelinek <jakub@redhat.com>
1446 PR tree-optimization/112994
1447 * match.pd ((t * u) / (t * v) -> (u / v)): New simplification.
1449 2023-12-14 Jakub Jelinek <jakub@redhat.com>
1451 PR tree-optimization/112994
1452 * match.pd ((t * 2) / 2 -> t): Adjust comment to use u instead of 2.
1453 Punt without range checks if TYPE_OVERFLOW_SANITIZED.
1454 ((t * u) / v -> t * (u / v)): New simplification.
1456 2023-12-14 Filip Kastl <fkastl@suse.cz>
1458 * Makefile.in: Added sccopy pass.
1459 * passes.def: Added sccopy pass before LTO streaming and before
1461 * tree-pass.h (make_pass_sccopy): Added sccopy pass.
1462 * gimple-ssa-sccopy.cc: New file.
1464 2023-12-14 Martin Jambor <mjambor@suse.cz>
1466 PR tree-optimization/111807
1467 * tree-sra.cc (build_ref_for_model): Allow offset smaller than
1468 model->offset when gsi is non-NULL. Adjust function comment.
1470 2023-12-14 liuhongt <hongtao.liu@intel.com>
1473 * config/i386/i386-expand.cc
1474 (ix86_convert_const_wide_int_to_broadcast): Don't convert to
1475 broadcast for vec_dup{v4di,v8si} when TARGET_AVX2 is not
1477 (ix86_broadcast_from_constant): Allow broadcast for V4DI/V8SI
1478 when !TARGET_AVX2 since it will be forced to memory later.
1479 (ix86_expand_vector_move): Force constant to mem for
1480 vec_dup{vssi,v4di} when TARGET_AVX2 is not available.
1482 2023-12-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1485 * config/riscv/riscv-protos.h (struct common_vector_cost): New struct.
1486 (struct scalable_vector_cost): Ditto.
1487 (struct cpu_vector_cost): Ditto.
1488 * config/riscv/riscv-vector-costs.cc (costs::add_stmt_cost): Add RVV
1489 builtin vectorization cost
1490 * config/riscv/riscv.cc (struct riscv_tune_param): Ditto.
1491 (get_common_costs): New function.
1492 (riscv_builtin_vectorization_cost): Ditto.
1493 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): New targethook.
1495 2023-12-13 Richard Ball <richard.ball@arm.com>
1497 * config.gcc: Adds new header to config.
1498 * config/aarch64/aarch64-builtins.cc (enum aarch64_type_qualifiers):
1499 Moved to header file.
1501 (enum aarch64_simd_type): Likewise.
1502 (struct aarch64_simd_type_info): Remove static.
1504 * config/aarch64/aarch64-c.cc (aarch64_pragma_aarch64):
1505 Defines pragma for arm_neon_sve_bridge.h.
1506 * config/aarch64/aarch64-protos.h:
1507 Add handle_arm_neon_sve_bridge_h
1508 * config/aarch64/aarch64-sve-builtins-base.h: New intrinsics.
1509 * config/aarch64/aarch64-sve-builtins-base.cc
1510 (class svget_neonq_impl): New intrinsic implementation.
1511 (class svset_neonq_impl): Likewise.
1512 (class svdup_neonq_impl): Likewise.
1513 (NEON_SVE_BRIDGE_FUNCTION): New intrinsics.
1514 * config/aarch64/aarch64-sve-builtins-functions.h
1515 (NEON_SVE_BRIDGE_FUNCTION): Defines macro for NEON_SVE_BRIDGE
1517 * config/aarch64/aarch64-sve-builtins-shapes.h: New shapes.
1518 * config/aarch64/aarch64-sve-builtins-shapes.cc
1519 (parse_element_type): Add NEON element types.
1520 (parse_type): Likewise.
1521 (struct get_neonq_def): Defines function shape for get_neonq.
1522 (struct set_neonq_def): Defines function shape for set_neonq.
1523 (struct dup_neonq_def): Defines function shape for dup_neonq.
1524 * config/aarch64/aarch64-sve-builtins.cc
1525 (DEF_SVE_TYPE_SUFFIX): Changed to be called through
1527 (DEF_SVE_NEON_TYPE_SUFFIX): Defines
1528 macro for NEON_SVE_BRIDGE type suffixes.
1529 (DEF_NEON_SVE_FUNCTION): Defines
1530 macro for NEON_SVE_BRIDGE functions.
1531 (function_resolver::infer_neon128_vector_type): Infers type suffix
1532 for overloaded functions.
1533 (handle_arm_neon_sve_bridge_h): Handles #pragma arm_neon_sve_bridge.h.
1534 * config/aarch64/aarch64-sve-builtins.def
1535 (DEF_SVE_NEON_TYPE_SUFFIX): Macro for handling neon_sve type suffixes.
1536 (bf16): Replace entry with neon-sve entry.
1548 * config/aarch64/aarch64-sve-builtins.h
1549 (GCC_AARCH64_SVE_BUILTINS_H): Include aarch64-builtins.h.
1550 (ENTRY): Add aarch64_simd_type definiton.
1551 (enum aarch64_simd_type): Add neon information to type_suffix_info.
1552 (struct type_suffix_info): New function.
1553 * config/aarch64/aarch64-sve.md
1554 (@aarch64_sve_get_neonq_<mode>): New intrinsic insn for big endian.
1555 (@aarch64_sve_set_neonq_<mode>): Likewise.
1556 * config/aarch64/iterators.md: Add UNSPEC_SET_NEONQ.
1557 * config/aarch64/aarch64-builtins.h: New file.
1558 * config/aarch64/aarch64-neon-sve-bridge-builtins.def: New file.
1559 * config/aarch64/arm_neon_sve_bridge.h: New file.
1561 2023-12-13 Patrick Palka <ppalka@redhat.com>
1563 * doc/invoke.texi (C++ Dialect Options): Document
1564 -fdiagnostics-all-candidates.
1566 2023-12-13 Julian Brown <julian@codesourcery.com>
1568 * gimplify.cc (omp_map_clause_descriptor_p): New function.
1569 (build_omp_struct_comp_nodes, omp_get_attachment, omp_group_base): Use
1571 (omp_tsort_mapping_groups): Process nodes that have
1572 OMP_CLAUSE_MAP_RUNTIME_IMPLICIT_P set after those that don't. Add
1573 enter_exit_data parameter.
1574 (omp_resolve_clause_dependencies): Remove GOMP_MAP_TO_PSET mappings if
1575 we're mapping the whole containing derived-type variable.
1576 (omp_accumulate_sibling_list): Adjust GOMP_MAP_TO_PSET handling.
1577 Remove GOMP_MAP_ALWAYS_POINTER handling.
1578 (gimplify_scan_omp_clauses): Pass enter_exit argument to
1579 omp_tsort_mapping_groups. Don't adjust/remove GOMP_MAP_TO_PSET
1580 mappings for derived-type components here.
1581 * tree.h (OMP_CLAUSE_RELEASE_DESCRIPTOR): New macro.
1582 * tree-pretty-print.cc (dump_omp_clause): Show
1583 OMP_CLAUSE_RELEASE_DESCRIPTOR in dump output (with
1584 GOMP_MAP_TO_PSET-like syntax).
1586 2023-12-13 Julian Brown <julian@codesourcery.com>
1588 * gimplify.cc (build_struct_comp_nodes): Don't process
1589 GOMP_MAP_ATTACH_DETACH "middle" nodes here.
1590 (omp_mapping_group): Add REPROCESS_STRUCT and FRAGILE booleans for
1591 nested struct handling.
1592 (omp_strip_components_and_deref, omp_strip_indirections): Remove
1594 (omp_get_attachment): Handle GOMP_MAP_DETACH here.
1595 (omp_group_last): Handle GOMP_MAP_*, GOMP_MAP_DETACH,
1596 GOMP_MAP_ATTACH_DETACH groups for "exit data" of reference-to-pointer
1597 component array sections.
1598 (omp_gather_mapping_groups_1): Initialise reprocess_struct and fragile
1600 (omp_group_base): Handle GOMP_MAP_ATTACH_DETACH after GOMP_MAP_STRUCT.
1601 (omp_index_mapping_groups_1): Skip reprocess_struct groups.
1602 (omp_get_nonfirstprivate_group, omp_directive_maps_explicitly,
1603 omp_resolve_clause_dependencies, omp_first_chained_access_token): New
1605 (omp_check_mapping_compatibility): Adjust accepted node combinations
1606 for "from" clauses using release instead of alloc.
1607 (omp_accumulate_sibling_list): Add GROUP_MAP, ADDR_TOKENS, FRAGILE_P,
1608 REPROCESSING_STRUCT, ADDED_TAIL parameters. Use OMP address tokenizer
1609 to analyze addresses. Reimplement nested struct handling, and
1610 implement "fragile groups".
1611 (omp_build_struct_sibling_lists): Adjust for changes to
1612 omp_accumulate_sibling_list. Recalculate bias for ATTACH_DETACH nodes
1613 after GOMP_MAP_STRUCT nodes.
1614 (gimplify_scan_omp_clauses): Call omp_resolve_clause_dependencies. Use
1615 OMP address tokenizer.
1616 (gimplify_adjust_omp_clauses_1): Use build_fold_indirect_ref_loc
1617 instead of build_simple_mem_ref_loc.
1618 * omp-general.cc (omp-general.h, tree-pretty-print.h): Include.
1619 (omp_addr_tokenizer): New namespace.
1620 (omp_addr_tokenizer::omp_addr_token): New.
1621 (omp_addr_tokenizer::omp_parse_component_selector,
1622 omp_addr_tokenizer::omp_parse_ref,
1623 omp_addr_tokenizer::omp_parse_pointer,
1624 omp_addr_tokenizer::omp_parse_access_method,
1625 omp_addr_tokenizer::omp_parse_access_methods,
1626 omp_addr_tokenizer::omp_parse_structure_base,
1627 omp_addr_tokenizer::omp_parse_structured_expr,
1628 omp_addr_tokenizer::omp_parse_array_expr,
1629 omp_addr_tokenizer::omp_access_chain_p,
1630 omp_addr_tokenizer::omp_accessed_addr): New functions.
1631 (omp_parse_expr, debug_omp_tokenized_addr): New functions.
1632 * omp-general.h (omp_addr_tokenizer::access_method_kinds,
1633 omp_addr_tokenizer::structure_base_kinds,
1634 omp_addr_tokenizer::token_type,
1635 omp_addr_tokenizer::omp_addr_token,
1636 omp_addr_tokenizer::omp_access_chain_p,
1637 omp_addr_tokenizer::omp_accessed_addr): New.
1638 (omp_addr_token, omp_parse_expr): New.
1639 * omp-low.cc (scan_sharing_clauses): Skip error check for references
1641 * tree.h (OMP_CLAUSE_ATTACHMENT_MAPPING_ERASED): New macro.
1643 2023-12-13 Andrew Stubbs <ams@codesourcery.com>
1645 * config/gcn/gcn-hsa.h (NO_XNACK): Change the defaults.
1646 * config/gcn/gcn-opts.h (enum hsaco_attr_type): Add HSACO_ATTR_DEFAULT.
1647 * config/gcn/gcn.cc (gcn_option_override): Set the default flag_xnack.
1648 * config/gcn/gcn.opt: Add -mxnack=default.
1649 * doc/invoke.texi: Document the -mxnack default.
1651 2023-12-13 Andrew Stubbs <ams@codesourcery.com>
1653 * config/gcn/gcn-hsa.h (NO_XNACK): Ignore missing -march.
1654 (XNACKOPT): Match on/off; ignore any.
1655 * config/gcn/gcn-valu.md (gather<mode>_insn_1offset<exec>):
1656 Add xnack compatible alternatives.
1657 (gather<mode>_insn_2offsets<exec>): Likewise.
1658 * config/gcn/gcn.cc (gcn_option_override): Permit -mxnack for devices
1659 other than Fiji and gfx1030.
1660 (gcn_expand_epilogue): Remove early-clobber problems.
1661 (gcn_hsa_declare_function_name): Obey -mxnack setting.
1662 * config/gcn/gcn.md (xnack): New attribute.
1663 (enabled): Rework to include "xnack" attribute.
1664 (*movbi): Add xnack compatible alternatives.
1665 (*mov<mode>_insn): Likewise.
1666 (*mov<mode>_insn): Likewise.
1667 (*mov<mode>_insn): Likewise.
1668 (*movti_insn): Likewise.
1669 * config/gcn/gcn.opt (-mxnack): Change the default to "any".
1670 * doc/invoke.texi: Remove placeholder notice for -mxnack.
1672 2023-12-13 Andrew Carlotti <andrew.carlotti@arm.com>
1674 * config/aarch64/x-aarch64: Add missing dependencies.
1676 2023-12-13 Roger Sayle <roger@nextmovesoftware.com>
1677 Jeff Law <jlaw@ventanamicro.com>
1679 * config/arc/arc.md (*extvsi_n_0): New define_insn_and_split to
1680 implement SImode sign extract using a AND, XOR and MINUS sequence.
1682 2023-12-13 Feng Wang <wangfeng@eswincomputing.com>
1684 * common/config/riscv/riscv-common.cc: Modify implied ISA info.
1685 * config/riscv/arch-canonicalize: Add crypto vector implied info.
1687 2023-12-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1691 * config/riscv/riscv-vsetvl.cc
1692 (pre_vsetvl::compute_lcm_local_properties): Remove full available.
1693 (pre_vsetvl::pre_global_vsetvl_info): Add full available optimization.
1695 2023-12-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1698 * tree-vect-loop.cc (vect_estimate_min_profitable_iters): Adjust for COST for decrement IV.
1700 2023-12-13 Jakub Jelinek <jakub@redhat.com>
1702 PR tree-optimization/112940
1703 * gimple-lower-bitint.cc (struct bitint_large_huge): Add another
1704 argument to prepare_data_in_out method defaulted to NULL_TREE.
1705 (bitint_large_huge::handle_operand): Pass another argument to
1706 prepare_data_in_out instead of emitting an assignment to set it.
1707 (bitint_large_huge::prepare_data_in_out): Add VAL_OUT argument.
1708 If non-NULL, use it as PHI argument instead of creating a new
1710 (bitint_large_huge::handle_cast): Pass rext as another argument
1711 to 2 prepare_data_in_out calls instead of emitting assignments
1714 2023-12-13 Jakub Jelinek <jakub@redhat.com>
1716 PR middle-end/112953
1717 * attribs.cc (free_attr_data): Use delete x rather than delete[] x.
1719 2023-12-13 Jakub Jelinek <jakub@redhat.com>
1722 * config/i386/i386.cc (ix86_gimple_fold_builtin): For shifts
1723 and abs without lhs replace with nop.
1725 2023-12-13 Richard Biener <rguenther@suse.de>
1727 * emit-rtl.cc (set_mem_attributes_minus_bitpos): Preserve
1728 the offset when rewriting an exising MEM_REF base for
1731 2023-12-13 Richard Biener <rguenther@suse.de>
1733 PR tree-optimization/112991
1734 PR tree-optimization/112961
1735 * tree-ssa-sccvn.h (do_rpo_vn): Add skip_entry_phis argument.
1736 * tree-ssa-sccvn.cc (do_rpo_vn): Likewise.
1737 (do_rpo_vn_1): Likewise, merge with auto-processing.
1738 (run_rpo_vn): Adjust.
1739 (pass_fre::execute): Likewise.
1740 * tree-if-conv.cc (tree_if_conversion): Revert last change.
1741 Value-number latch block but disable value-numbering of
1743 * tree-ssa-uninit.cc (execute_early_warn_uninitialized): Adjust.
1745 2023-12-13 Richard Biener <rguenther@suse.de>
1747 PR tree-optimization/112990
1748 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..):
1749 Restrict to vector modes after lowering.
1751 2023-12-13 Richard Biener <rguenther@suse.de>
1753 PR middle-end/111591
1754 * cfgexpand.cc (update_alias_info_with_stack_vars): Document
1755 why not adjusting TBAA info on accesses is OK.
1757 2023-12-13 Alexandre Oliva <oliva@adacore.com>
1759 * doc/invoke.texi (multiflags): Drop extraneous period, use
1762 2023-12-13 Victor Do Nascimento <victor.donascimento@arm.com>
1764 * config/aarch64/aarch64-builtins.cc:
1765 (AARCH64_PLD): New enum aarch64_builtins entry.
1766 (AARCH64_PLDX): Likewise.
1767 (AARCH64_PLI): Likewise.
1768 (AARCH64_PLIX): Likewise.
1769 (aarch64_init_prefetch_builtin): New.
1770 (aarch64_general_init_builtins): Call prefetch init function.
1771 (aarch64_expand_prefetch_builtin): New.
1772 (aarch64_general_expand_builtin): Add prefetch expansion.
1773 (require_const_argument): New.
1774 * config/aarch64/aarch64.md (UNSPEC_PLDX): New.
1775 (aarch64_pldx): Likewise.
1776 * config/aarch64/arm_acle.h (__pld): Likewise.
1781 2023-12-13 Kewen Lin <linkw@linux.ibm.com>
1783 PR tree-optimization/112788
1784 * value-range.h (range_compatible_p): Workaround same type mode but
1785 different type precision issue for rs6000 scalar float types
1786 _Float128 and long double.
1788 2023-12-13 Jiufu Guo <guojiufu@linux.ibm.com>
1790 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Add code to use
1791 pli for 34bit constant.
1793 2023-12-13 Jiufu Guo <guojiufu@linux.ibm.com>
1795 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Add new
1796 parameter to record number of instructions to build the constant.
1797 (num_insns_constant_gpr): Call rs6000_emit_set_long_const to compute
1800 2023-12-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1802 * config/riscv/riscv-vector-costs.cc (costs::analyze_loop_vinfo): New function.
1803 (costs::record_potential_vls_unrolling): Ditto.
1804 (costs::prefer_unrolled_loop): Ditto.
1805 (costs::better_main_loop_than_p): Ditto.
1806 (costs::add_stmt_cost): Ditto.
1807 * config/riscv/riscv-vector-costs.h (enum cost_type_enum): New enum.
1808 * config/riscv/t-riscv: Add new include files.
1810 2023-12-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1812 * config/riscv/riscv-vector-costs.cc (get_current_lmul): Remove it.
1813 (compute_estimated_lmul): New function.
1814 (costs::costs): Refactor.
1815 (costs::preferred_new_lmul_p): Ditto.
1816 (preferred_new_lmul_p): Ditto.
1817 (costs::better_main_loop_than_p): Ditto.
1818 * config/riscv/riscv-vector-costs.h (struct autovec_info): Remove it.
1820 2023-12-12 Martin Jambor <mjambor@suse.cz>
1822 PR tree-optimization/112822
1823 * tree-sra.cc (load_assign_lhs_subreplacements): Invoke
1824 force_gimple_operand_gsi also when LHS has partial stores and RHS is a
1827 2023-12-12 Jason Merrill <jason@redhat.com>
1828 Nathaniel Shead <nathanieloshead@gmail.com>
1830 * tree-core.h (enum clobber_kind): Rename CLOBBER_EOL to
1831 CLOBBER_STORAGE_END. Add CLOBBER_STORAGE_BEGIN,
1832 CLOBBER_OBJECT_BEGIN, CLOBBER_OBJECT_END.
1833 * gimple-lower-bitint.cc
1834 * gimple-ssa-warn-access.cc
1837 * tree-ssa-ccp.cc: Adjust for rename.
1838 * tree-pretty-print.cc: And handle new values.
1840 2023-12-12 Szabolcs Nagy <szabolcs.nagy@arm.com>
1842 * config/aarch64/aarch64.cc (aarch64_override_options): Update.
1843 (aarch64_handle_attr_branch_protection): Update.
1844 * config/arm/aarch-common-protos.h (aarch_parse_branch_protection):
1846 (aarch_validate_mbranch_protection): Add new argument.
1847 * config/arm/aarch-common.cc (aarch_handle_no_branch_protection):
1849 (aarch_handle_standard_branch_protection): Update.
1850 (aarch_handle_pac_ret_protection): Update.
1851 (aarch_handle_pac_ret_leaf): Update.
1852 (aarch_handle_pac_ret_b_key): Update.
1853 (aarch_handle_bti_protection): Update.
1854 (aarch_parse_branch_protection): Remove.
1856 (aarch_validate_mbranch_protection): Rewrite.
1857 * config/arm/aarch-common.h (struct aarch_branch_protect_type):
1859 * config/arm/arm.cc (arm_configure_build_target): Update.
1861 2023-12-12 Szabolcs Nagy <szabolcs.nagy@arm.com>
1863 * config/aarch64/aarch64.cc (aarch64_override_options_after_change_1):
1864 Do not override branch_protection options.
1865 (aarch64_override_options): Remove accepted_branch_protection_string.
1866 * config/arm/aarch-common.cc (BRANCH_PROTECT_STR_MAX): Remove.
1867 (aarch_parse_branch_protection): Remove
1868 accepted_branch_protection_string.
1869 * config/arm/arm.cc: Likewise.
1871 2023-12-12 Richard Biener <rguenther@suse.de>
1873 PR tree-optimization/112736
1874 * tree-vect-stmts.cc (vectorizable_load): Extend optimization
1875 to avoid peeling for gaps to handle single-element non-groups
1876 we now allow with SLP.
1878 2023-12-12 Richard Biener <rguenther@suse.de>
1881 * ipa-icf.cc (sem_item_optimizer::merge_classes): Check
1882 both source and alias for the no_icf attribute.
1883 * doc/extend.texi (no_icf): Document variable attribute.
1885 2023-12-12 Richard Biener <rguenther@suse.de>
1887 PR tree-optimization/112961
1888 * tree-if-conv.cc (tree_if_conversion): Instead of excluding
1889 the latch block from VN, add a fake entry edge.
1891 2023-12-12 Xi Ruoyao <xry111@xry111.site>
1893 PR middle-end/107723
1894 * convert.cc (convert_to_integer_1) [case BUILT_IN_TRUNC]: Break
1895 early if !flag_fp_int_builtin_inexact and flag_trapping_math.
1897 2023-12-12 Pan Li <pan2.li@intel.com>
1899 * config/riscv/riscv-avlprop.cc (avl_can_be_propagated_p):
1900 Disable the avl propogation for the vcompress.
1902 2023-12-12 Xi Ruoyao <xry111@xry111.site>
1904 * config/loongarch/loongarch-opts.h (la_target): Move into #if
1905 for loongarch-def.h.
1906 (loongarch_init_target): Likewise.
1907 (loongarch_config_target): Likewise.
1908 (loongarch_update_gcc_opt_status): Likewise.
1910 2023-12-12 Xi Ruoyao <xry111@xry111.site>
1912 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
1913 Return true for SYMBOL_PCREL64. Return true for SYMBOL_GOT_DISP
1914 if TARGET_CMODEL_EXTREME.
1915 (loongarch_split_symbol): Check for la_opt_explicit_relocs !=
1916 EXPLICIT_RELOCS_NONE instead of TARGET_EXPLICIT_RELOCS.
1917 (loongarch_print_operand_reloc): Likewise.
1918 (loongarch_option_override_internal): Likewise.
1919 (loongarch_handle_model_attribute): Likewise.
1920 * doc/invoke.texi (-mcmodel=extreme): Update the compatibility
1921 between it and -mexplicit-relocs=.
1923 2023-12-12 Richard Biener <rguenther@suse.de>
1925 PR tree-optimization/112939
1926 * tree-ssa-sccvn.cc (visit_phi): When all args are undefined
1927 make sure we end up with a value that was visited, otherwise
1928 fall back to .VN_TOP.
1930 2023-12-12 liuhongt <hongtao.liu@intel.com>
1933 * config/i386/i386.cc (ix86_avx_u128_mode_after): Return
1934 AVX_U128_ANY if callee_abi doesn't clobber all_sse_regs to
1935 align with ix86_avx_u128_mode_needed.
1936 (ix86_avx_u128_mode_needed): Return AVX_U128_ClEAN for
1939 2023-12-12 Alexandre Oliva <oliva@adacore.com>
1942 * builtins.h (target_builtins): Add fields for apply_args_size
1943 and apply_result_size.
1944 * builtins.cc (apply_args_size, apply_result_size): Cache
1945 results in fields rather than in static variables.
1946 (get_apply_args_size, set_apply_args_size): New.
1947 (get_apply_result_size, set_apply_result_size): New.
1949 2023-12-12 Hongyu Wang <hongyu.wang@intel.com>
1952 * config/i386/i386.md (ashl<mode>3): Add TARGET_APX_NDD to
1953 ix86_expand_binary_operator call.
1954 (<insn><mode>3): Likewise for rshift.
1955 (<insn>di3): Likewise for DImode rotate.
1956 (<insn><mode>3): Likewise for SWI124 rotate.
1958 2023-12-12 Feng Wang <wangfeng@eswincomputing.com>
1960 * config/riscv/riscv-vector-builtins-functions.def (DEF_RVV_FUNCTION):
1962 (read_vl): Using AVAIL argument default value.
2068 (vfrsub_frm): Ditto.
2071 (vfwadd_frm): Ditto.
2072 (vfwsub_frm): Ditto.
2078 (vfrdiv_frm): Ditto.
2080 (vfwmul_frm): Ditto.
2089 (vfmacc_frm): Ditto.
2090 (vfnmacc_frm): Ditto.
2091 (vfmsac_frm): Ditto.
2092 (vfnmsac_frm): Ditto.
2093 (vfmadd_frm): Ditto.
2094 (vfnmadd_frm): Ditto.
2095 (vfmsub_frm): Ditto.
2096 (vfnmsub_frm): Ditto.
2101 (vfwmacc_frm): Ditto.
2102 (vfwnmacc_frm): Ditto.
2103 (vfwmsac_frm): Ditto.
2104 (vfwnmsac_frm): Ditto.
2106 (vfsqrt_frm): Ditto.
2109 (vfrec7_frm): Ditto.
2128 (vfcvt_rtz_x): Ditto.
2129 (vfcvt_rtz_xu): Ditto.
2131 (vfcvt_x_frm): Ditto.
2132 (vfcvt_xu_frm): Ditto.
2133 (vfcvt_f_frm): Ditto.
2136 (vfwcvt_rtz_x): Ditto.
2137 (vfwcvt_rtz_xu) Ditto.:
2139 (vfwcvt_x_frm): Ditto.
2140 (vfwcvt_xu_frm) Ditto.:
2143 (vfncvt_rtz_x): Ditto.
2144 (vfncvt_rtz_xu): Ditto.
2146 (vfncvt_rod_f): Ditto.
2147 (vfncvt_x_frm): Ditto.
2148 (vfncvt_xu_frm): Ditto.
2149 (vfncvt_f_frm): Ditto.
2164 (vfredusum_frm): Ditto.
2165 (vfredosum_frm): Ditto.
2166 (vfwredosum): Ditto.
2167 (vfwredusum): Ditto.
2168 (vfwredosum_frm): Ditto.
2169 (vfwredusum_frm): Ditto.
2194 (vslidedown): Ditto.
2196 (vslide1down): Ditto.
2197 (vfslide1up): Ditto.
2198 (vfslide1down): Ditto.
2200 (vrgatherei16): Ditto.
2202 (vundefined): Ditto.
2203 (vreinterpret): Ditto.
2205 (vlmul_trunc): Ditto.
2218 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION): Using variadic macro.
2219 * config/riscv/riscv-vector-builtins.h (struct function_group_info):
2220 Add avail function interface into struct.
2221 * config/riscv/t-riscv: Add dependency
2222 * config/riscv/riscv-vector-builtins-avail.h: New file.The definition of AVAIL marco.
2224 2023-12-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2226 * config/riscv/riscv-protos.h (estimated_poly_value): New function.
2227 * config/riscv/riscv-v.cc (estimated_poly_value): Ditto.
2228 * config/riscv/riscv.cc (riscv_estimated_poly_value): Move RVV POLY
2229 VALUE estimation to riscv-v.cc
2231 2023-12-12 Yang Yujie <yangyujie@loongson.cn>
2233 * config/loongarch/loongarch.cc: Do not restore the saved eh_return
2234 data registers ($r4-$r7) for a normal return of a function that calls
2235 __builtin_eh_return elsewhere.
2236 * config/loongarch/loongarch-protos.h: Same.
2237 * config/loongarch/loongarch.md: Same.
2239 2023-12-11 Richard Sandiford <richard.sandiford@arm.com>
2241 * recog.cc (constrain_operands): Pass VOIDmode to
2242 strict_memory_address_p for 'p' constraints in asms.
2243 * rtl-ssa/changes.cc (recog_level2): Skip redundant constrain_operands
2246 2023-12-11 Jason Merrill <jason@redhat.com>
2248 * common.opt: Add comment.
2250 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2252 PR middle-end/112784
2253 * expr.cc (emit_block_move_via_loop): Call int_mode_for_size
2254 for maybe-too-wide sizes.
2255 (emit_block_cmp_via_loop): Likewise.
2257 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2260 * builtins.cc (can_store_by_multiple_pieces): New.
2261 (try_store_by_multiple_pieces): Call it.
2263 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2266 * builtins.cc (try_store_by_multiple_pieces): Use ptr's mode
2269 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2271 * doc/invoke.texi (multiflags): Add period after @xref to
2274 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2276 * config/rl78/rl78.cc (TARGET_HAVE_STRUB_SUPPORT_FOR): Disable.
2278 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2280 * ipa-strub.cc (pass_ipa_strub::execute): Check that we don't
2281 add indirection to pointer parameters, and document attribute
2282 access non-interactions.
2284 2023-12-11 Roger Sayle <roger@nextmovesoftware.com>
2286 PR rtl-optimization/112380
2287 * combine.cc (expand_field_assignment): Check if gen_lowpart
2288 returned a CLOBBER, and avoid calling gen_simplify_binary with
2291 2023-12-11 Andrew Pinski <quic_apinski@quicinc.com>
2294 * config/aarch64/aarch64.cc (aarch64_float_const_representable_p): For BFmode,
2297 2023-12-11 Andrew Pinski <quic_apinski@quicinc.com>
2299 PR tree-optimization/111972
2300 PR tree-optimization/110637
2301 * match.pd (`(convert)(zeroone !=/== CST)`): Match
2302 and simplify to ((convert)zeroone){,^1}.
2303 * fold-const.cc (fold_binary_loc): Remove
2304 transformation of `(~a) & 1` and `(a ^ 1) & 1`
2305 into `(convert)(a == 0)`.
2307 2023-12-11 Andrew Pinski <quic_apinski@quicinc.com>
2309 PR middle-end/112935
2310 * expr.cc (expand_expr_real_2): Use
2311 gimple_zero_one_valued_p instead of tree_nonzero_bits
2312 to find boolean defined expressions.
2314 2023-12-11 Mikael Pettersson <mikpelinux@gmail.com>
2317 * config/m68k/linux.h (ASM_RETURN_CASE_JUMP): For
2318 TARGET_LONG_JUMP_TABLE_OFFSETS, reference the jump table
2320 * config/m68k/m68kelf.h (ASM_RETURN_CASE_JUMP): Likewise.
2321 * config/m68k/netbsd-elf.h (ASM_RETURN_CASE_JUMP): Likewise.
2323 2023-12-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
2325 * config/aarch64/aarch64.cc (lane_size): New function.
2326 (aarch64_simd_clone_compute_vecsize_and_simdlen): Determine simdlen according to NDS rule
2327 and reject combination of simdlen and types that lead to vectors larger than 128bits.
2329 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2331 * rtl-ssa/insns.cc (function_info::record_use): Add !ordered_p case.
2333 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2335 * config/riscv/riscv-v.cc (get_gather_index_mode): New function.
2336 (shuffle_series_patterns): Robostify shuffle index.
2337 (shuffle_generic_patterns): Ditto.
2339 2023-12-11 Victor Do Nascimento <victor.donascimento@arm.com>
2341 * config/aarch64/arm_neon.h (vldap1_lane_u64): Add
2342 `const' to `__builtin_aarch64_simd_di *' cast.
2343 (vldap1q_lane_u64): Likewise.
2344 (vldap1_lane_s64): Cast __src to `const __builtin_aarch64_simd_di *'.
2345 (vldap1q_lane_s64): Likewise.
2346 (vldap1_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'.
2347 (vldap1q_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'.
2348 (vldap1_lane_p64): Add `const' to `__builtin_aarch64_simd_di *' cast.
2349 (vldap1q_lane_p64): Add `const' to `__builtin_aarch64_simd_di *' cast.
2350 (vstl1_lane_u64): remove stray `const'.
2351 (vstl1_lane_s64): Cast __src to `__builtin_aarch64_simd_di *'.
2352 (vstl1q_lane_s64): Likewise.
2353 (vstl1_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'.
2354 (vstl1q_lane_f64): Likewise.
2356 2023-12-11 Robin Dapp <rdapp@ventanamicro.com>
2359 * config/riscv/riscv-v.cc (expand_const_vector): Fix step
2361 (modulo_sel_indices): Also perform modulo for variable-length
2363 (shuffle_series): Recognize series permutations.
2364 (expand_vec_perm_const_1): Add shuffle_series.
2366 2023-12-11 liuhongt <hongtao.liu@intel.com>
2368 * match.pd (VCE (a cmp b ? -1 : 0) < 0) ? c : d ---> (VCE ((a
2369 cmp b) ? (VCE:c) : (VCE:d))): New gimple simplication.
2371 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2374 * config/riscv/vector.md: Support highest overlap for wv instructions.
2376 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2378 * config/riscv/riscv-vsetvl.cc (extract_single_source): Fix ICE.
2380 2023-12-11 Jakub Jelinek <jakub@redhat.com>
2382 * doc/extend.texi (__sync_fetch_and_add, __sync_fetch_and_sub,
2383 __sync_fetch_and_or, __sync_fetch_and_and, __sync_fetch_and_xor,
2384 __sync_fetch_and_nand, __sync_add_and_fetch, __sync_sub_and_fetch,
2385 __sync_or_and_fetch, __sync_and_and_fetch, __sync_xor_and_fetch,
2386 __sync_nand_and_fetch, __sync_bool_compare_and_swap,
2387 __sync_val_compare_and_swap, __sync_lock_test_and_set,
2388 __sync_lock_release, __atomic_load_n, __atomic_load, __atomic_store_n,
2389 __atomic_store, __atomic_exchange_n, __atomic_exchange,
2390 __atomic_compare_exchange_n, __atomic_compare_exchange,
2391 __atomic_add_fetch, __atomic_sub_fetch, __atomic_and_fetch,
2392 __atomic_xor_fetch, __atomic_or_fetch, __atomic_nand_fetch,
2393 __atomic_fetch_add, __atomic_fetch_sub, __atomic_fetch_and,
2394 __atomic_fetch_xor, __atomic_fetch_or, __atomic_fetch_nand,
2395 __atomic_test_and_set, __atomic_clear, __atomic_thread_fence,
2396 __atomic_signal_fence, __atomic_always_lock_free,
2397 __atomic_is_lock_free, __builtin_add_overflow,
2398 __builtin_sadd_overflow, __builtin_saddl_overflow,
2399 __builtin_saddll_overflow, __builtin_uadd_overflow,
2400 __builtin_uaddl_overflow, __builtin_uaddll_overflow,
2401 __builtin_sub_overflow, __builtin_ssub_overflow,
2402 __builtin_ssubl_overflow, __builtin_ssubll_overflow,
2403 __builtin_usub_overflow, __builtin_usubl_overflow,
2404 __builtin_usubll_overflow, __builtin_mul_overflow,
2405 __builtin_smul_overflow, __builtin_smull_overflow,
2406 __builtin_smulll_overflow, __builtin_umul_overflow,
2407 __builtin_umull_overflow, __builtin_umulll_overflow,
2408 __builtin_add_overflow_p, __builtin_sub_overflow_p,
2409 __builtin_mul_overflow_p, __builtin_addc, __builtin_addcl,
2410 __builtin_addcll, __builtin_subc, __builtin_subcl, __builtin_subcll,
2411 __builtin_alloca, __builtin_alloca_with_align,
2412 __builtin_alloca_with_align_and_max, __builtin_speculation_safe_value,
2413 __builtin_nan, __builtin_nand32, __builtin_nand64, __builtin_nand128,
2414 __builtin_nanf, __builtin_nanl, __builtin_nanf@var{n},
2415 __builtin_nanf@var{n}x, __builtin_nans, __builtin_nansd32,
2416 __builtin_nansd64, __builtin_nansd128, __builtin_nansf,
2417 __builtin_nansl, __builtin_nansf@var{n}, __builtin_nansf@var{n}x,
2418 __builtin_ffs, __builtin_clz, __builtin_ctz, __builtin_clrsb,
2419 __builtin_popcount, __builtin_parity, __builtin_bswap16,
2420 __builtin_bswap32, __builtin_bswap64, __builtin_bswap128,
2421 __builtin_extend_pointer, __builtin_goacc_parlevel_id,
2422 __builtin_goacc_parlevel_size, vec_clrl, vec_clrr, vec_mulh, vec_mul,
2423 vec_div, vec_dive, vec_mod, __builtin_rx_mvtc): Use @var{...} around
2425 (vec_rl, vec_sl, vec_sr, vec_sra): Likewise. Use @var{...} also
2426 around A, B and R in description.
2428 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2430 * config/riscv/riscv-selftests.cc (riscv_run_selftests):
2431 Remove poly self test when FIXED-VLMAX.
2433 2023-12-11 Fei Gao <gaofei@eswincomputing.com>
2434 Xiao Zeng <zengxiao@eswincomputing.com>
2436 * ifcvt.cc (noce_cond_zero_binary_op_supported): Add support for AND.
2437 (noce_bbs_ok_for_cond_zero_arith): Likewise.
2438 (noce_try_cond_zero_arith): Likewise.
2440 2023-12-11 liuhongt <hongtao.liu@intel.com>
2443 * config/i386/mmx.md (*xop_pcmov_<mode>): New define_insn.
2445 2023-12-11 Haochen Gui <guihaoc@gcc.gnu.org>
2448 * config/rs6000/rs6000.h (TARGET_FCTID): Define.
2449 * config/rs6000/rs6000.md (lrint<mode>di2): Add guard TARGET_FCTID.
2450 * (lround<mode>di2): Replace TARGET_FPRND with TARGET_FCTID.
2452 2023-12-11 Haochen Gui <guihaoc@gcc.gnu.org>
2455 * config/rs6000/rs6000.md (expand lrint<mode>si2): New.
2456 (insn lrint<mode>si2): Rename to...
2457 (*lrint<mode>si): ...this.
2458 (lrint<mode>si_di): New.
2460 2023-12-10 Fei Gao <gaofei@eswincomputing.com>
2461 Xiao Zeng <zengxiao@eswincomputing.com>
2463 * ifcvt.cc (noce_cond_zero_binary_op_supported): Add support for shift
2466 2023-12-10 Richard Sandiford <richard.sandiford@arm.com>
2470 * config/aarch64/aarch64-protos.h (aarch64_sve_reinterpret): Declare.
2471 * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): New function.
2472 * config/aarch64/aarch64-sve-builtins-sme.cc (svread_za_impl::expand)
2473 (svwrite_za_impl::expand): Use it to cast the SVE register to the
2476 2023-12-10 Richard Sandiford <richard.sandiford@arm.com>
2479 * config/aarch64/aarch64.cc (aarch64_sme_mode_switch_regs::add_reg):
2480 Force specific SVE modes for single registers as well as structures.
2482 2023-12-10 Jason Merrill <jason@redhat.com>
2484 * doc/invoke.texi (-fpermissive): Mention ObjC++ for -Wnarrowing.
2486 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
2488 * config/h8300/addsub.md (uaddv<mode>4, usubv<mode>4): New expanders.
2489 (uaddv): New define_insn_and_split plus post-reload pattern.
2491 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
2493 * config/h8300/h8300-protos.h (use_extvsi): Prototype.
2494 * config/h8300/combiner.md: Two new define_insn_and_split patterns
2495 to implement signed bitfield extractions.
2496 * config/h8300/h8300.cc (use_extvsi): New function.
2498 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
2500 * config/h8300/combiner.md (single bit signed bitfield extraction): Fix
2501 length computation when the bit we want is in the low half word.
2503 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
2505 * config/h8300/h8300.cc (compute_a_shift_length): Fix computation
2506 of logical shifts on the H8/SX.
2508 2023-12-09 Jakub Jelinek <jakub@redhat.com>
2510 PR tree-optimization/112887
2511 * tree-ssa-phiopt.cc (hoist_adjacent_loads): Change type of
2512 param_align, param_align_bits, offset1, offset2, size2 and align1
2513 variables from int or unsigned int to unsigned HOST_WIDE_INT.
2515 2023-12-09 Costas Argyris <costas.argyris@gmail.com>
2516 Jakub Jelinek <jakub@redhat.com>
2519 * gcc.cc (driver::finalize): Call XDELETEVEC on mdswitches before
2522 2023-12-09 Jakub Jelinek <jakub@redhat.com>
2524 * attribs.h (any_nonignored_attribute_p): Declare.
2525 * attribs.cc (any_nonignored_attribute_p): New function.
2527 2023-12-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2530 * config/riscv/vector.md (movmisalign<mode>): Fix VLSmode bugs.
2532 2023-12-09 Alexandre Oliva <oliva@adacore.com>
2534 * tree-emutls.cc: Include diagnostic-core.h.
2535 (pass_ipa_lower_emutls::gate): Skip if errors were seen.
2537 2023-12-08 Vladimir N. Makarov <vmakarov@redhat.com>
2539 PR rtl-optimization/112875
2540 * lra-eliminations.cc (lra_eliminate_regs_1): Change an assert.
2541 Add ASM_OPERANDS case.
2543 2023-12-08 Robin Dapp <rdapp@ventanamicro.com>
2546 * config/riscv/riscv-protos.h (expand_strcmp): Declare.
2547 * config/riscv/riscv-string.cc (riscv_expand_strcmp): Add
2548 strategy handling and delegation to scalar and vector expanders.
2549 (expand_strcmp): Vectorized implementation.
2550 * config/riscv/riscv.md: Add TARGET_VECTOR to strcmp and strncmp
2553 2023-12-08 Robin Dapp <rdapp@ventanamicro.com>
2556 * config/riscv/riscv-protos.h (expand_rawmemchr): Add strlen
2558 * config/riscv/riscv-string.cc (riscv_expand_strlen): Call
2560 (expand_rawmemchr): Add strlen handling.
2561 * config/riscv/riscv.md: Add TARGET_VECTOR to strlen expander.
2563 2023-12-08 Richard Sandiford <richard.sandiford@arm.com>
2565 * config/aarch64/aarch64-early-ra.cc (allocno_info::chain_next):
2566 Put into an enum with...
2567 (allocno_info::last_def_point): ...new member variable.
2568 (allocno_info::m_current_bb_point): New member variable.
2569 (likely_operand_match_p): Switch based on get_constraint_type,
2570 rather than based on rtx code. Handle relaxed and special memory
2572 (early_ra::record_copy): Allow the source of an equivalence to be
2573 assigned to more than once.
2574 (early_ra::record_allocno_use): Invalidate any previous equivalence.
2575 Initialize last_def_point.
2576 (early_ra::record_allocno_def): Set last_def_point.
2577 (early_ra::valid_equivalence_p): New function, split out from...
2578 (early_ra::record_copy): ...here. Use last_def_point to handle
2579 source registers that have a later definition.
2580 (make_pass_aarch64_early_ra): Fix comment.
2582 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2585 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2587 * config/arm/arm_neon.h
2588 (vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New.
2589 (vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New.
2590 (vld1q_f16_x2, vld1q_f32_x2): New.
2591 (vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New.
2592 (vld1q_bf16_x2): New.
2593 * config/arm/arm_neon_builtins.def (vld1_x2): New entries.
2594 * config/arm/neon.md (vld1_x2<mode>): New.
2596 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2599 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2601 * config/arm/arm_neon.h
2602 (vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New.
2603 (vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New.
2604 (vld1q_f16_x3, vld1q_f32_x3): New.
2605 (vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New.
2606 (vld1q_bf16_x3): New.
2607 * config/arm/arm_neon_builtins.def (vld1_x3): New entries.
2608 * config/arm/neon.md (vld1_x3<mode>): New.
2610 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2613 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2615 * config/arm/arm_neon.h
2616 (vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New.
2617 (vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New.
2618 (vld1q_f16_x4, vld1q_f32_x4): New.
2619 (vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New.
2620 (vld1q_bf16_x4): New.
2621 * config/arm/arm_neon_builtins.def (vld1_x4): New entries.
2622 * config/arm/neon.md (vld1_x4<mode>): New.
2624 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2627 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2629 * config/arm/arm_neon.h
2630 (vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New.
2631 (vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New.
2632 (vst1_f16_x2, vst1_f32_x2): New.
2633 (vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New.
2634 (vst1_bf16_x2): New.
2635 * config/arm/arm_neon_builtins.def (vst1_x2): New entries.
2636 * config/arm/neon.md (vst1_x2<mode>): New.
2638 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2641 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2643 * config/arm/arm_neon.h
2644 (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New.
2645 (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New.
2646 (vst1_f16_x3, vst1_f32_x3): New.
2647 (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New.
2648 (vst1_bf16_x3): New.
2649 * config/arm/arm_neon_builtins.def (vst1_x3): New entries.
2650 * config/arm/neon.md (vst1_x3<mode>): New.
2652 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2655 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2657 * config/arm/arm_neon.h
2658 (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New.
2659 (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New.
2660 (vst1_f16_x4, vst1_f32_x4): New.
2661 (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New.
2662 (vst1_bf16_x4): New.
2663 * config/arm/arm_neon_builtins.def (vst1_x4): New entries.
2664 * config/arm/neon.md (vst1_x4<mode>): New.
2666 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2669 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2671 * config/arm/arm_neon.h
2672 (vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New.
2673 (vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New.
2674 (vst1q_f16_x2, vst1q_f32_x2): New.
2675 (vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New.
2676 (vst1q_bf16_x2): New.
2677 * config/arm/arm_neon_builtins.def (vst1q_x2): New entries.
2678 * config/arm/neon.md
2679 (neon_vst1<VMEMX2_q>_x2<VDQX:mode>): Updated from
2681 * config/arm/iterators.md (VMEMX2): New mode iterator.
2682 (VMEMX2_q): New mode attribute.
2684 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2687 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2689 * config/arm/arm_neon.h
2690 (vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New.
2691 (vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New.
2692 (vst1q_f16_x3, vst1q_f32_x3): New.
2693 (vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New.
2694 (vst1q_bf16_x3): New.
2695 * config/arm/arm_neon_builtins.def (vst1q_x3): New entries.
2696 * config/arm/neon.md (neon_vst1q_x3<mode>): New.
2698 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2701 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2703 * config/arm/arm_neon.h
2704 (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New.
2705 (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New.
2706 (vst1q_f16_x4, vst1q_f32_x4): New.
2707 (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New.
2708 (vst1q_bf16_x4): New.
2709 * config/arm/arm_neon_builtins.def (vst1q_x4): New entries.
2710 * config/arm/neon.md (neon_vst1q_x4<mode>): New.
2712 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2715 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2717 * config/arm/arm_neon.h
2718 (vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New
2719 (vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New.
2720 (vld1_f16_x2, vld1_f32_x2): New.
2721 (vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New.
2722 (vld1_bf16_x2): New.
2723 (vld1q_types_x2): Updated to use vld1q_x2 from
2724 arm_neon_builtins.def
2725 * config/arm/arm_neon_builtins.def
2726 (vld1_x2): Updated entries.
2727 (vld1q_x2): New entries, but comes from the old vld1_x2
2728 * config/arm/neon.md
2729 (neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated
2730 from neon_vld1_x2<mode>.
2732 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2735 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2737 * config/arm/arm_neon.h
2738 (vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New
2739 (vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New.
2740 (vld1_f16_x3, vld1_f32_x3): New.
2741 (vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New.
2742 (vld1_bf16_x3): New.
2743 (vld1q_types_x3): Updated to use vld1q_x3 from
2744 arm_neon_builtins.def
2745 * config/arm/arm_neon_builtins.def
2746 (vld1_x3): Updated entries.
2747 (vld1q_x3): New entries, but comes from the old vld1_x2
2748 * config/arm/neon.md (neon_vld1q_x3<mode>): Updated from
2751 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2754 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2756 * config/arm/arm_neon.h
2757 (vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New
2758 (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New.
2759 (vld1_f16_x4, vld1_f32_x4): New.
2760 (vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New.
2761 (vld1_bf16_x4): New.
2762 (vld1q_types_x4): Updated to use vld1q_x4
2763 from arm_neon_builtins.def
2764 * config/arm/arm_neon_builtins.def
2765 (vld1_x4): Updated entries.
2766 (vld1q_x4): New entries, but comes from the old vld1_x2
2767 * config/arm/neon.md (neon_vld1q_x4<mode>):
2768 Updated from neon_vld1_x4<mode>.
2770 2023-12-08 Tobias Burnus <tobias@codesourcery.com>
2772 * builtin-types.def (BT_FN_PTR_PTR_SIZE_PTRMODE_PTRMODE): New.
2773 * omp-builtins.def (BUILT_IN_GOMP_REALLOC): New.
2774 * builtins.cc (builtin_fnspec): Handle it.
2775 * gimple-ssa-warn-access.cc (fndecl_alloc_p,
2776 matching_alloc_calls_p): Likewise.
2777 * gimple.cc (nonfreeing_call_p): Likewise.
2778 * predict.cc (expr_expected_value_1): Likewise.
2779 * tree-ssa-ccp.cc (evaluate_stmt): Likewise.
2780 * tree.cc (fndecl_dealloc_argno): Likewise.
2782 2023-12-08 Richard Biener <rguenther@suse.de>
2784 PR tree-optimization/112909
2785 * tree-ssa-uninit.cc (find_uninit_use): Look through a
2786 single level of SSA name copies with single use.
2788 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
2790 * config/loongarch/loongarch.cc (loongarch_try_expand_lsx_vshuf_const): Use
2791 simplify_gen_subreg instead of gen_rtx_SUBREG.
2792 (loongarch_expand_vec_perm_const_2): Ditto.
2793 (loongarch_expand_vec_cond_expr): Ditto.
2795 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
2797 * config/loongarch/loongarch.cc (loongarch_vector_costs::determine_suggested_unroll_factor):
2798 If m_has_recip is true, uf return 1.
2799 (loongarch_vector_costs::add_stmt_cost): Detect the use of approximate instruction sequence.
2801 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
2803 * config/loongarch/genopts/loongarch.opt.in (recip_mask): New variable.
2804 (-mrecip, -mrecip): New options.
2805 * config/loongarch/lasx.md (div<mode>3): New expander.
2806 (*div<mode>3): Rename.
2807 (sqrt<mode>2): New expander.
2808 (*sqrt<mode>2): Rename.
2809 (rsqrt<mode>2): New expander.
2810 * config/loongarch/loongarch-protos.h (loongarch_emit_swrsqrtsf): New prototype.
2811 (loongarch_emit_swdivsf): Ditto.
2812 * config/loongarch/loongarch.cc (loongarch_option_override_internal): Set
2813 recip_mask for -mrecip and -mrecip= options.
2814 (loongarch_emit_swrsqrtsf): New function.
2815 (loongarch_emit_swdivsf): Ditto.
2816 * config/loongarch/loongarch.h (RECIP_MASK_NONE, RECIP_MASK_DIV, RECIP_MASK_SQRT
2817 RECIP_MASK_RSQRT, RECIP_MASK_VEC_DIV, RECIP_MASK_VEC_SQRT, RECIP_MASK_VEC_RSQRT
2818 RECIP_MASK_ALL): New bitmasks.
2819 (TARGET_RECIP_DIV, TARGET_RECIP_SQRT, TARGET_RECIP_RSQRT, TARGET_RECIP_VEC_DIV
2820 TARGET_RECIP_VEC_SQRT, TARGET_RECIP_VEC_RSQRT): New tests.
2821 * config/loongarch/loongarch.md (sqrt<mode>2): New expander.
2822 (*sqrt<mode>2): Rename.
2823 (rsqrt<mode>2): New expander.
2824 * config/loongarch/loongarch.opt (recip_mask): New variable.
2825 (-mrecip, -mrecip): New options.
2826 * config/loongarch/lsx.md (div<mode>3): New expander.
2827 (*div<mode>3): Rename.
2828 (sqrt<mode>2): New expander.
2829 (*sqrt<mode>2): Rename.
2830 (rsqrt<mode>2): New expander.
2831 * config/loongarch/predicates.md (reg_or_vecotr_1_operand): New predicate.
2832 * doc/invoke.texi (LoongArch Options): Document new options.
2834 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
2836 * config/loongarch/lasx.md (lasx_xvfrecip_<flasxfmt>): Renamed to ..
2837 (recip<mode>3): .. this.
2838 * config/loongarch/loongarch-builtins.cc (CODE_FOR_lsx_vfrecip_d): Redefine
2839 to new pattern name.
2840 (CODE_FOR_lsx_vfrecip_s): Ditto.
2841 (CODE_FOR_lasx_xvfrecip_d): Ditto.
2842 (CODE_FOR_lasx_xvfrecip_s): Ditto.
2843 (loongarch_expand_builtin_direct): For the vector recip instructions, construct a
2844 temporary parameter const1_vector.
2845 * config/loongarch/lsx.md (lsx_vfrecip_<flsxfmt>): Renamed to ..
2846 (recip<mode>3): .. this.
2847 * config/loongarch/predicates.md (const_vector_1_operand): New predicate.
2849 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
2851 * config/loongarch/lasx.md (lasx_xvfrsqrt_<flasxfmt>): Renamed to ..
2852 (rsqrt<mode>2): .. this.
2853 * config/loongarch/loongarch-builtins.cc
2854 (CODE_FOR_lsx_vfrsqrt_d): Redefine to standard pattern name.
2855 (CODE_FOR_lsx_vfrsqrt_s): Ditto.
2856 (CODE_FOR_lasx_xvfrsqrt_d): Ditto.
2857 (CODE_FOR_lasx_xvfrsqrt_s): Ditto.
2858 * config/loongarch/loongarch.cc (use_rsqrt_p): New function.
2859 (loongarch_optab_supported_p): Ditto.
2860 (TARGET_OPTAB_SUPPORTED_P): New hook.
2861 * config/loongarch/loongarch.md (*rsqrt<mode>a): Remove.
2862 (*rsqrt<mode>2): New insn pattern.
2863 (*rsqrt<mode>b): Remove.
2864 * config/loongarch/lsx.md (lsx_vfrsqrt_<flsxfmt>): Renamed to ..
2865 (rsqrt<mode>2): .. this.
2867 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
2869 * config/loongarch/genopts/isa-evolution.in (fecipe): Add.
2870 * config/loongarch/larchintrin.h (__frecipe_s): New intrinsic.
2871 (__frecipe_d): Ditto.
2872 (__frsqrte_s): Ditto.
2873 (__frsqrte_d): Ditto.
2874 * config/loongarch/lasx.md (lasx_xvfrecipe_<flasxfmt>): New insn pattern.
2875 (lasx_xvfrsqrte_<flasxfmt>): Ditto.
2876 * config/loongarch/lasxintrin.h (__lasx_xvfrecipe_s): New intrinsic.
2877 (__lasx_xvfrecipe_d): Ditto.
2878 (__lasx_xvfrsqrte_s): Ditto.
2879 (__lasx_xvfrsqrte_d): Ditto.
2880 * config/loongarch/loongarch-builtins.cc (AVAIL_ALL): Add predicates.
2881 (LSX_EXT_BUILTIN): New macro.
2882 (LASX_EXT_BUILTIN): Ditto.
2883 * config/loongarch/loongarch-cpucfg-map.h: Regenerate.
2884 * config/loongarch/loongarch-c.cc: Add builtin macro "__loongarch_frecipe".
2885 * config/loongarch/loongarch-def.cc: Regenerate.
2886 * config/loongarch/loongarch-str.h (OPTSTR_FRECIPE): Regenerate.
2887 * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump status for TARGET_FRECIPE.
2888 * config/loongarch/loongarch.md (loongarch_frecipe_<fmt>): New insn pattern.
2889 (loongarch_frsqrte_<fmt>): Ditto.
2890 * config/loongarch/loongarch.opt: Regenerate.
2891 * config/loongarch/lsx.md (lsx_vfrecipe_<flsxfmt>): New insn pattern.
2892 (lsx_vfrsqrte_<flsxfmt>): Ditto.
2893 * config/loongarch/lsxintrin.h (__lsx_vfrecipe_s): New intrinsic.
2894 (__lsx_vfrecipe_d): Ditto.
2895 (__lsx_vfrsqrte_s): Ditto.
2896 (__lsx_vfrsqrte_d): Ditto.
2897 * doc/extend.texi: Add documentation for LoongArch new builtins and intrinsics.
2899 2023-12-08 Richard Biener <rguenther@suse.de>
2901 * tree-outof-ssa.cc (rewrite_out_of_ssa): Dump GIMPLE once only,
2902 after final IL adjustments.
2904 2023-12-08 Pan Li <pan2.li@intel.com>
2906 * config/riscv/vector-iterators.md: Replace RVVM2SI to RVVM2SF
2907 for mode attr V_F2DI_CONVERT_BRIDGE.
2909 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
2911 * config/loongarch/lasx.md (xorsign<mode>3): New expander.
2912 * config/loongarch/loongarch.cc (loongarch_can_change_mode_class): Allow
2913 conversion between LSX vector mode and scalar fp mode.
2914 * config/loongarch/loongarch.md (@xorsign<mode>3): New expander.
2915 * config/loongarch/lsx.md (@xorsign<mode>3): Ditto.
2917 2023-12-08 Jakub Jelinek <jakub@redhat.com>
2919 PR tree-optimization/112902
2920 * gimple-lower-bitint.cc (gimple_lower_bitint): For a narrowing
2921 or same precision cast don't set SSA_NAME_VERSION in m_names only
2922 if use_stmt is mergeable_op or fall through into the check that
2923 use is a store or rhs1 is not mergeable or other reasons prevent
2926 2023-12-08 Jakub Jelinek <jakub@redhat.com>
2928 PR tree-optimization/112901
2930 (simplify_using_ranges::simplify_float_conversion_using_ranges):
2931 Return false if rhs1 has BITINT_TYPE type with BLKmode TYPE_MODE.
2933 2023-12-08 Jakub Jelinek <jakub@redhat.com>
2935 PR middle-end/112411
2936 * haifa-sched.cc (extend_h_i_d): Use 3U instead of 3 in
2937 3 * get_max_uid () / 2 calculation.
2939 2023-12-08 Lulu Cheng <chenglulu@loongson.cn>
2941 * config/loongarch/genopts/loongarch-strings: Delete STR_ISA_BASE_LA64V110.
2942 * config/loongarch/genopts/loongarch.opt.in: Likewise.
2943 * config/loongarch/loongarch-cpu.cc (ISA_BASE_LA64V110_FEATURES): Delete macro.
2944 (fill_native_cpu_config): Define a new variable hw_isa_evolution record the
2945 extended instruction set support read from cpucfg.
2946 * config/loongarch/loongarch-def.cc: Set evolution at initialization.
2947 * config/loongarch/loongarch-def.h (ISA_BASE_LA64V100): Delete.
2948 (ISA_BASE_LA64V110): Likewise.
2949 (N_ISA_BASE_TYPES): Likewise.
2950 (defined): Likewise.
2951 * config/loongarch/loongarch-opts.cc: Likewise.
2952 * config/loongarch/loongarch-opts.h (TARGET_64BIT): Likewise.
2953 (ISA_BASE_IS_LA64V110): Likewise.
2954 * config/loongarch/loongarch-str.h (STR_ISA_BASE_LA64V110): Likewise.
2955 * config/loongarch/loongarch.opt: Regenerate.
2957 2023-12-08 Xi Ruoyao <xry111@xry111.site>
2959 * config/loongarch/loongarch-def.h: Remove extern "C".
2960 (loongarch_isa_base_strings): Declare as loongarch_def_array
2961 instead of plain array.
2962 (loongarch_isa_ext_strings): Likewise.
2963 (loongarch_abi_base_strings): Likewise.
2964 (loongarch_abi_ext_strings): Likewise.
2965 (loongarch_cmodel_strings): Likewise.
2966 (loongarch_cpu_strings): Likewise.
2967 (loongarch_cpu_default_isa): Likewise.
2968 (loongarch_cpu_issue_rate): Likewise.
2969 (loongarch_cpu_multipass_dfa_lookahead): Likewise.
2970 (loongarch_cpu_cache): Likewise.
2971 (loongarch_cpu_align): Likewise.
2972 (loongarch_cpu_rtx_cost_data): Likewise.
2973 (loongarch_isa): Add a constructor and field setter functions.
2974 * config/loongarch/loongarch-opts.h (loongarch-defs.h): Do not
2975 include for target libraries.
2976 * config/loongarch/loongarch-opts.cc: Comment code that doesn't
2977 run and causes compilation errors.
2978 * config/loongarch/loongarch-tune.h (LOONGARCH_TUNE_H): Likewise.
2979 (struct loongarch_rtx_cost_data): Likewise.
2980 (struct loongarch_cache): Likewise.
2981 (struct loongarch_align): Likewise.
2982 * config/loongarch/t-loongarch: Compile loongarch-def.cc with the
2984 * config/loongarch/loongarch-def-array.h: New file for a
2985 std:array like data structure with position setter function.
2986 * config/loongarch/loongarch-def.c: Rename to ...
2987 * config/loongarch/loongarch-def.cc: ... here.
2988 (loongarch_cpu_strings): Define as loongarch_def_array instead
2990 (loongarch_cpu_default_isa): Likewise.
2991 (loongarch_cpu_cache): Likewise.
2992 (loongarch_cpu_align): Likewise.
2993 (loongarch_cpu_rtx_cost_data): Likewise.
2994 (loongarch_cpu_issue_rate): Likewise.
2995 (loongarch_cpu_multipass_dfa_lookahead): Likewise.
2996 (loongarch_isa_base_strings): Likewise.
2997 (loongarch_isa_ext_strings): Likewise.
2998 (loongarch_abi_base_strings): Likewise.
2999 (loongarch_abi_ext_strings): Likewise.
3000 (loongarch_cmodel_strings): Likewise.
3001 (abi_minimal_isa): Likewise.
3002 (loongarch_rtx_cost_optimize_size): Use field setter functions
3003 instead of designated initializers.
3004 (loongarch_rtx_cost_data): Implement default constructor.
3006 2023-12-08 Jakub Jelinek <jakub@redhat.com>
3008 PR middle-end/112411
3009 * params.opt (-param=min-nondebug-insn-uid=): Add
3010 IntegerRange(0, 1073741824).
3011 * lra.cc (check_and_expand_insn_recog_data): Use 3U rather than 3
3012 in * 3 / 2 computation and if the result is smaller or equal to
3013 index, use index + 1.
3015 2023-12-08 Haochen Jiang <haochen.jiang@intel.com>
3017 * config/i386/driver-i386.cc (host_detect_local_cpu):
3018 Do not append "-mno-" for Xeon Phi ISAs.
3019 * config/i386/i386-options.cc (ix86_option_override_internal):
3020 Emit a warning for KNL/KNM targets.
3021 * config/i386/i386.opt: Emit a warning for Xeon Phi ISAs.
3023 2023-12-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3025 * config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p):
3026 Remove redundant check.
3028 2023-12-08 Hao Liu <hliu@os.amperecomputing.com>
3030 PR tree-optimization/112774
3031 * tree-pretty-print.cc: if nonwrapping flag is set, chrec will be
3032 printed with additional <nw> info.
3033 * tree-scalar-evolution.cc: add record_nonwrapping_chrec and
3034 nonwrapping_chrec_p to set and check the new flag respectively.
3035 * tree-scalar-evolution.h: Likewise.
3036 * tree-ssa-loop-niter.cc (idx_infer_loop_bounds,
3037 infer_loop_bounds_from_pointer_arith, infer_loop_bounds_from_signedness,
3038 scev_probably_wraps_p): call record_nonwrapping_chrec before
3039 record_nonwrapping_iv, call nonwrapping_chrec_p to check the flag is
3040 set and return false from scev_probably_wraps_p.
3041 * tree-vect-loop.cc (vect_analyze_loop): call
3042 free_numbers_of_iterations_estimates explicitly.
3043 * tree-core.h: document the nothrow_flag usage in CHREC_NOWRAP
3044 * tree.h: add CHREC_NOWRAP(NODE), base.nothrow_flag is used to
3045 represent the nonwrapping info.
3047 2023-12-08 Fei Gao <gaofei@eswincomputing.com>
3049 * ifcvt.cc (noce_try_cond_zero_arith): New function.
3050 (noce_emit_czero, get_base_reg): Likewise.
3051 (noce_cond_zero_binary_op_supported): Likewise.
3052 (noce_bbs_ok_for_cond_zero_arith): Likewise.
3053 (noce_process_if_block): Use noce_try_cond_zero_arith.
3054 Co-authored-by: Xiao Zeng<zengxiao@eswincomputing.com>
3056 2023-12-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3058 * config/riscv/riscv-protos.h (expand_vec_series): Adapt function.
3059 * config/riscv/riscv-v.cc (rvv_builder::double_steps_npatterns_p): New function.
3060 (expand_vec_series): Adapt function.
3061 (expand_const_vector): Support new interleave vector with different step.
3063 2023-12-07 Richard Sandiford <richard.sandiford@arm.com>
3065 PR rtl-optimization/106694
3066 PR rtl-optimization/109078
3067 PR rtl-optimization/109391
3068 * config.gcc: Add aarch64-early-ra.o for AArch64 targets.
3069 * config/aarch64/t-aarch64 (aarch64-early-ra.o): New rule.
3070 * config/aarch64/aarch64-opts.h (aarch64_early_ra_scope): New enum.
3071 * config/aarch64/aarch64.opt (mearly_ra): New option.
3072 * doc/invoke.texi: Document it.
3073 * common/config/aarch64/aarch64-common.cc
3074 (aarch_option_optimization_table): Use -mearly-ra=strided by
3075 default for -O2 and above.
3076 * config/aarch64/aarch64-passes.def (pass_aarch64_early_ra): New pass.
3077 * config/aarch64/aarch64-protos.h (aarch64_strided_registers_p)
3078 (make_pass_aarch64_early_ra): Declare.
3079 * config/aarch64/aarch64-sme.md (@aarch64_sme_lut<LUTI_BITS><mode>):
3080 Add a stride_type attribute.
3081 (@aarch64_sme_lut<LUTI_BITS><mode>_strided2): New pattern.
3082 (@aarch64_sme_lut<LUTI_BITS><mode>_strided4): Likewise.
3083 * config/aarch64/aarch64-sve-builtins-base.cc (svld1_impl::expand)
3084 (svldnt1_impl::expand, svst1_impl::expand, svstn1_impl::expand): Handle
3085 new way of defining multi-register loads and stores.
3086 * config/aarch64/aarch64-sve.md (@aarch64_ld1<SVE_FULLx24:mode>)
3087 (@aarch64_ldnt1<SVE_FULLx24:mode>, @aarch64_st1<SVE_FULLx24:mode>)
3088 (@aarch64_stnt1<SVE_FULLx24:mode>): Delete.
3089 * config/aarch64/aarch64-sve2.md (@aarch64_<LD1_COUNT:optab><mode>)
3090 (@aarch64_<LD1_COUNT:optab><mode>_strided2): New patterns.
3091 (@aarch64_<LD1_COUNT:optab><mode>_strided4): Likewise.
3092 (@aarch64_<ST1_COUNT:optab><mode>): Likewise.
3093 (@aarch64_<ST1_COUNT:optab><mode>_strided2): Likewise.
3094 (@aarch64_<ST1_COUNT:optab><mode>_strided4): Likewise.
3095 * config/aarch64/aarch64.cc (aarch64_strided_registers_p): New
3097 * config/aarch64/aarch64.md (UNSPEC_LD1_SVE_COUNT): Delete.
3098 (UNSPEC_ST1_SVE_COUNT, UNSPEC_LDNT1_SVE_COUNT): Likewise.
3099 (UNSPEC_STNT1_SVE_COUNT): Likewise.
3100 (stride_type): New attribute.
3101 * config/aarch64/constraints.md (Uwd, Uwt): New constraints.
3102 * config/aarch64/iterators.md (UNSPEC_LD1_COUNT, UNSPEC_LDNT1_COUNT)
3103 (UNSPEC_ST1_COUNT, UNSPEC_STNT1_COUNT): New unspecs.
3104 (optab): Handle them.
3105 (LD1_COUNT, ST1_COUNT): New iterators.
3106 * config/aarch64/aarch64-early-ra.cc: New file.
3108 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3110 * config/arm/arm_neon.h
3111 (vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New
3112 (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New.
3113 (vld1_f16_x4, vld1_f32_x4): New.
3114 (vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New.
3115 (vld1_bf16_x4): New.
3116 (vld1q_types_x4): Updated to use vld1q_x4
3117 from arm_neon_builtins.def
3118 * config/arm/arm_neon_builtins.def
3119 (vld1_x4): Updated entries.
3120 (vld1q_x4): New entries, but comes from the old vld1_x2
3121 * config/arm/neon.md (neon_vld1q_x4<mode>):
3122 Updated from neon_vld1_x4<mode>.
3124 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3126 * config/arm/arm_neon.h
3127 (vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New
3128 (vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New.
3129 (vld1_f16_x3, vld1_f32_x3): New.
3130 (vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New.
3131 (vld1_bf16_x3): New.
3132 (vld1q_types_x3): Updated to use vld1q_x3 from
3133 arm_neon_builtins.def
3134 * config/arm/arm_neon_builtins.def
3135 (vld1_x3): Updated entries.
3136 (vld1q_x3): New entries, but comes from the old vld1_x2
3137 * config/arm/neon.md (neon_vld1q_x3<mode>): Updated from
3140 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3142 * config/arm/arm_neon.h
3143 (vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New
3144 (vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New.
3145 (vld1_f16_x2, vld1_f32_x2): New.
3146 (vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New.
3147 (vld1_bf16_x2): New.
3148 (vld1q_types_x2): Updated to use vld1q_x2 from
3149 arm_neon_builtins.def
3150 * config/arm/arm_neon_builtins.def
3151 (vld1_x2): Updated entries.
3152 (vld1q_x2): New entries, but comes from the old vld1_x2
3153 * config/arm/neon.md
3154 (neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated
3155 from neon_vld1_x2<mode>.
3157 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3159 * config/arm/arm_neon.h
3160 (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New.
3161 (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New.
3162 (vst1q_f16_x4, vst1q_f32_x4): New.
3163 (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New.
3164 (vst1q_bf16_x4): New.
3165 * config/arm/arm_neon_builtins.def (vst1q_x4): New entries.
3166 * config/arm/neon.md (neon_vst1q_x4<mode>): New.
3168 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3170 * config/arm/arm_neon.h
3171 (vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New.
3172 (vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New.
3173 (vst1q_f16_x3, vst1q_f32_x3): New.
3174 (vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New.
3175 (vst1q_bf16_x3): New.
3176 * config/arm/arm_neon_builtins.def (vst1q_x3): New entries.
3177 * config/arm/neon.md (neon_vst1q_x3<mode>): New.
3179 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3181 * config/arm/arm_neon.h
3182 (vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New.
3183 (vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New.
3184 (vst1q_f16_x2, vst1q_f32_x2): New.
3185 (vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New.
3186 (vst1q_bf16_x2): New.
3187 * config/arm/arm_neon_builtins.def (vst1q_x2): New entries.
3188 * config/arm/neon.md
3189 (neon_vst1<VMEMX2_q>_x2<VDQX:mode>): Updated from
3191 * config/arm/iterators.md (VMEMX2): New mode iterator.
3192 (VMEMX2_q): New mode attribute.
3194 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3196 * config/arm/arm_neon.h
3197 (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New.
3198 (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New.
3199 (vst1_f16_x4, vst1_f32_x4): New.
3200 (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New.
3201 (vst1_bf16_x4): New.
3202 * config/arm/arm_neon_builtins.def (vst1_x4): New entries.
3203 * config/arm/neon.md (vst1_x4<mode>): New.
3205 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3207 * config/arm/arm_neon.h
3208 (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New.
3209 (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New.
3210 (vst1_f16_x3, vst1_f32_x3): New.
3211 (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New.
3212 (vst1_bf16_x3): New.
3213 * config/arm/arm_neon_builtins.def (vst1_x3): New entries.
3214 * config/arm/neon.md (vst1_x3<mode>): New.
3216 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3218 * config/arm/arm_neon.h
3219 (vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New.
3220 (vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New.
3221 (vst1_f16_x2, vst1_f32_x2): New.
3222 (vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New.
3223 (vst1_bf16_x2): New.
3224 * config/arm/arm_neon_builtins.def (vst1_x2): New entries.
3225 * config/arm/neon.md (vst1_x2<mode>): New.
3227 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3229 * config/arm/arm_neon.h
3230 (vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New.
3231 (vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New.
3232 (vld1q_f16_x4, vld1q_f32_x4): New.
3233 (vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New.
3234 (vld1q_bf16_x4): New.
3235 * config/arm/arm_neon_builtins.def (vld1_x4): New entries.
3236 * config/arm/neon.md (vld1_x4<mode>): New.
3238 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3240 * config/arm/arm_neon.h
3241 (vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New.
3242 (vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New.
3243 (vld1q_f16_x3, vld1q_f32_x3): New.
3244 (vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New.
3245 (vld1q_bf16_x3): New.
3246 * config/arm/arm_neon_builtins.def (vld1_x3): New entries.
3247 * config/arm/neon.md (vld1_x3<mode>): New.
3249 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3251 * config/arm/arm_neon.h
3252 (vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New.
3253 (vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New.
3254 (vld1q_f16_x2, vld1q_f32_x2): New.
3255 (vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New.
3256 (vld1q_bf16_x2): New.
3257 * config/arm/arm_neon_builtins.def (vld1_x2): New entries.
3258 * config/arm/neon.md (vld1_x2<mode>): New.
3260 2023-12-07 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3262 * config/s390/vecintrin.h (vec_step): Expand vec_step to
3263 __builtin_s390_vec_step.
3265 2023-12-07 Alexandre Oliva <oliva@adacore.com>
3267 * target.def (have_strub_support_for): New hook.
3268 * doc/tm.texi.in: Document it.
3269 * doc/tm.texi: Rebuild.
3270 * ipa-strub.cc: Include target.h.
3271 (strub_target_support_p): New.
3272 (can_strub_p): Call it. Test for no flag_split_stack.
3273 (pass_ipa_strub::adjust_at_calls_call): Check for target
3275 * config/nvptx/nvptx.cc (TARGET_HAVE_STRUB_SUPPORT_FOR):
3277 * doc/sourcebuild.texi (strub): Document new effective
3280 2023-12-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3282 * config/riscv/riscv-avlprop.cc (simplify_replace_avl): New function.
3283 (simplify_replace_vlmax_avl): Fix bug.
3284 * config/riscv/t-riscv: Add a new include file.
3286 2023-12-07 Christoph Müllner <christoph.muellner@vrull.eu>
3288 * config/riscv/thead.cc (th_memidx_classify_address_index):
3289 Require TARGET_XTHEADMEMIDX for FP modes.
3290 * config/riscv/thead.md: Require TARGET_XTHEADMEMIDX for all
3291 XTheadFMemIdx pattern.
3293 2023-12-07 Jakub Jelinek <jakub@redhat.com>
3295 PR middle-end/112881
3296 * expr.cc (count_type_elements): Handle BITINT_TYPE like INTEGER_TYPE.
3298 2023-12-07 Jakub Jelinek <jakub@redhat.com>
3300 PR tree-optimization/112880
3301 * tree-ssa-dce.cc (maybe_optimize_arith_overflow): Use
3302 unsigned_type_for instead of conditionally calling
3303 build_nonstandard_integer_type.
3305 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
3307 * config/aarch64/arm_neon.h (vldap1_lane_u64): New.
3308 (vldap1q_lane_u64): Likewise.
3309 (vldap1_lane_s64): Likewise.
3310 (vldap1q_lane_s64): Likewise.
3311 (vldap1_lane_f64): Likewise.
3312 (vldap1q_lane_f64): Likewise.
3313 (vldap1_lane_p64): Likewise.
3314 (vldap1q_lane_p64): Likewise.
3315 (vstl1_lane_u64): Likewise.
3316 (vstl1q_lane_u64): Likewise.
3317 (vstl1_lane_s64): Likewise.
3318 (vstl1q_lane_s64): Likewise.
3319 (vstl1_lane_f64): Likewise.
3320 (vstl1q_lane_f64): Likewise.
3321 (vstl1_lane_p64): Likewise.
3322 (vstl1q_lane_p64): Likewise.
3324 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
3326 * config/aarch64/aarch64-simd-builtins.def
3327 (vec_ldap1_lane): New.
3328 (vec_stl1_lane): Likewise.
3329 * config/aarch64/aarch64-simd.md
3330 (aarch64_vec_stl1_lanes<mode>_lane<Vel>): New.
3331 (aarch64_vec_stl1_lane<mode>): Likewise.
3332 (aarch64_vec_ldap1_lanes<mode>_lane<Vel>): Likewise.
3333 (aarch64_vec_ldap1_lane<mode>): Likewise.
3334 * config/aarch64/aarch64.md (UNSPEC_LDAP1_LANE): New.
3335 (UNSPEC_STL1_LANE): Likewise.
3337 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
3339 * config/aarch64/iterators.md (V12DIF): New.
3341 (VEL): Add support for all V12DIF-associated modes.
3342 (Vetype): Add support for V1DI and V1DF.
3345 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
3347 * config/aarch64/aarch64-option-extensions.def (rcpc3): New.
3348 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC3): Likewise.
3349 (TARGET_RCPC3): Likewise.
3350 * doc/invoke.texi (rcpc3): Document feature in AArch64 Options.
3352 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3354 * config/i386/i386-expand.cc (ix86_split_ashl_ndd): New
3355 function to split NDD form lshift.
3356 (ix86_split_rshift_ndd): Likewise for l/ashiftrt.
3357 * config/i386/i386-protos.h (ix86_split_ashl_ndd): New
3359 (ix86_split_rshift_ndd): Likewise.
3360 * config/i386/i386.md (ashl<mode>3_doubleword): Add NDD
3361 alternative, call ndd split function when operands[0]
3362 not equal to operands[1].
3363 (define_split for doubleword lshift): Likewise.
3364 (define_peephole for doubleword lshift): Likewise.
3365 (<insn><mode>3_doubleword): Likewise for l/ashiftrt.
3366 (define_split for doubleword l/ashiftrt): Likewise.
3367 (define_peephole for doubleword l/ashiftrt): Likewise.
3369 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3371 * config/i386/i386.md (*mov<mode>cc_noc): Extend with new constraints
3373 (*movsicc_noc_zext): Likewise.
3374 (*movsicc_noc_zext_1): Likewise.
3375 (*movqicc_noc): Likewise.
3377 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3379 * config/i386/i386.md (x86_64_shld_ndd): New define_insn.
3380 (x86_64_shld_ndd_1): Likewise.
3381 (*x86_64_shld_ndd_2): Likewise.
3382 (x86_shld_ndd): Likewise.
3383 (x86_shld_ndd_1): Likewise.
3384 (*x86_shld_ndd_2): Likewise.
3385 (x86_64_shrd_ndd): Likewise.
3386 (x86_64_shrd_ndd_1): Likewise.
3387 (*x86_64_shrd_ndd_2): Likewise.
3388 (x86_shrd_ndd): Likewise.
3389 (x86_shrd_ndd_1): Likewise.
3390 (*x86_shrd_ndd_2): Likewise.
3391 (*x86_64_shld_shrd_1_nozext): Adjust codegen under TARGET_APX_NDD.
3392 (*x86_shld_shrd_1_nozext): Likewise.
3393 (*x86_64_shrd_shld_1_nozext): Likewise.
3394 (*x86_shrd_shld_1_nozext): Likewise.
3396 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3398 * config/i386/i386.md (*<insn><mode>3_1): Extend with a new
3399 alternative to support NDD for SI/DI rotate, and adjust output
3401 (*<insn>si3_1_zext): Likewise.
3402 (*<insn><mode>3_1): Likewise for QI/HI modes.
3403 (rcrsi2): Likewise, and use nonimmediate_operand for operands[1]
3404 to accept memory input for NDD alternative.
3407 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3409 * config/i386/i386.md (ashr<mode>3_cvt): Extend with new
3410 alternatives to support NDD, and adjust output templates.
3411 (*ashr<mode>3_1): Likewise for SI/DI mode.
3412 (*lshr<mode>3_1): Likewise.
3413 (*<insn>si3_1_zext): Likewise.
3414 (*ashr<mode>3_1): Likewise for QI/HI mode.
3415 (*lshrqi3_1): Likewise.
3416 (*lshrhi3_1): Likewise.
3417 (<insn><mode>3_cmp): Likewise.
3418 (*<insn><mode>3_cconly): Likewise.
3419 (*ashrsi3_cvt_zext): Likewise, and use nonimmediate_operand for
3420 operands[1] to accept memory input for NDD alternative.
3421 (*highpartdisi2): Likewise.
3422 (*<insn>si3_cmp_zext): Likewise.
3423 (<insn><mode>3_carry): Likewise.
3425 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3427 * config/i386/i386.md (*ashl<mode>3_1): Extend with new
3428 alternatives to support NDD, limit the new alternative to
3429 generate sal only, and adjust output template for NDD.
3430 (*ashlsi3_1_zext): Likewise.
3431 (*ashlhi3_1): Likewise.
3432 (*ashlqi3_1): Likewise.
3433 (*ashl<mode>3_cmp): Likewise.
3434 (*ashlsi3_cmp_zext): Likewise, and use nonimmediate_operand for
3435 operands[1] to accept memory input for NDD alternative.
3436 (*ashl<mode>3_cconly): Likewise.
3437 (*ashl<dwi>3_doubleword_highpart): Adjust codegen for NDD.
3439 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3441 * config/i386/i386.md (<code><mode>3): Add new alternative for NDD
3442 and adjust output templates.
3443 (*<code><mode>_1): Likewise.
3444 (*<code>qi_1): Likewise.
3445 (*notxor<mode>_1): Likewise.
3446 (*<code>si_1_zext): Likewise.
3447 (*notxorqi_1): Likewise.
3448 (*<code><mode>_2): Likewise.
3449 (*<code>si_2_zext): Likewise.
3450 (*<code>si_2_zext_imm): Likewise.
3451 (*<code>si_1_zext_imm): Likewise, and use nonimmediate_operand for
3452 operands[1] to accept memory input for NDD alternative.
3453 (*one_cmplsi2_2_zext): Likewise.
3454 (define_split for *one_cmplsi2_2_zext): Use nonimmediate_operand for
3456 (*<code><dwi>3_doubleword): Add NDD constraints, adopt '&' to NDD dest
3457 and emit move for optimized case if operands[0] != operands[1] or
3458 operands[4] != operands[5].
3459 (define_split for QI highpart OR/XOR): Prohibit splitter to split NDD
3460 form OR/XOR insn to <any_logic:code>qi_ext<mode>_3.
3461 (define_split for QI strict_lowpart optimization): Prohibit splitter to
3462 split NDD form AND insn to *<code><mode>3_1_slp.
3464 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3466 * config/i386/i386.md (and<mode>3): Add NDD alternatives and adjust
3468 (*anddi_1): Likewise.
3469 (*and<mode>_1): Likewise.
3470 (*andqi_1): Likewise.
3471 (*andsi_1_zext): Likewise.
3472 (*anddi_2): Likewise.
3473 (*andsi_2_zext): Likewise.
3474 (*andqi_2_maybe_si): Likewise.
3475 (*and<mode>_2): Likewise.
3476 (*and<dwi>3_doubleword): Add NDD alternative, adopt '&' to NDD dest and
3477 emit move for optimized case if operands[0] not equal to operands[1].
3478 (define_split for QI highpart AND): Prohibit splitter to split NDD
3479 form AND insn to <any_logic:code>qi_ext<mode>_3.
3480 (define_split for QI strict_lowpart optimization): Prohibit splitter to
3481 split NDD form AND insn to *<code><mode>3_1_slp.
3482 (define_split for zero_extend and optimization): Prohibit splitter to
3483 split NDD form AND insn to zero_extend insn.
3485 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3487 * config/i386/i386.md (one_cmpl<mode>2): Add new constraints for NDD
3488 and adjust output template.
3489 (*one_cmpl<mode>2_1): Likewise.
3490 (*one_cmplqi2_1): Likewise.
3491 (*one_cmpl<dwi>2_doubleword): Likewise, and adopt '&' to NDD dest.
3492 (*one_cmpl<mode>2_2): Likewise.
3493 (*one_cmplsi2_1_zext): Likewise, and use nonimmediate_operand for
3494 operands[1] to accept memory input for NDD alternative.
3496 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3498 * config/i386/i386-expand.cc (ix86_expand_unary_operator): Add use_ndd
3499 parameter and adjust for NDD.
3500 * config/i386/i386-protos.h: Add use_ndd parameter for
3501 ix86_unary_operator_ok and ix86_expand_unary_operator.
3502 * config/i386/i386.cc (ix86_unary_operator_ok): Add use_ndd parameter
3504 * config/i386/i386.md (neg<mode>2): Add new constraint for NDD and
3505 adjust output template.
3506 (*neg<mode>_1): Likewise.
3507 (*neg<dwi>2_doubleword): Likewise and adopt '&' to NDD dest.
3508 (*neg<mode>_2): Likewise.
3509 (*neg<mode>_ccc_1): Likewise.
3510 (*neg<mode>_ccc_2): Likewise.
3511 (*negsi_1_zext): Likewise, and use nonimmediate_operand for operands[1]
3512 to accept memory input for NDD alternatives.
3513 (*negsi_2_zext): Likewise.
3515 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3517 * config/i386/i386.md (*sub<dwi>3_doubleword): Add new alternative for
3518 NDD, adopt '&' modifier to NDD dest and emit move when operands[0] not
3519 equal to operands[1].
3520 (*sub<dwi>3_doubleword_zext): Likewise.
3521 (*subv<dwi>4_doubleword): Likewise.
3522 (*subv<dwi>4_doubleword_1): Likewise.
3523 (*subv<mode>4_overflow_1): Add NDD alternatives and adjust output
3525 (*subv<mode>4_overflow_2): Likewise.
3526 (@sub<mode>3_carry): Likewise.
3527 (*addsi3_carry_zext_0r): Likewise, and use nonimmediate_operand for
3528 operands[1] to accept memory input for NDD alternative.
3529 (*subsi3_carry_zext): Likewise.
3530 (subborrow<mode>): Parse TARGET_APX_NDD to ix86_binary_operator_ok.
3531 (subborrow<mode>_0): Likewise.
3532 (*sub<mode>3_eq): Likewise.
3533 (*sub<mode>3_ne): Likewise.
3534 (*sub<mode>3_eq_1): Likewise.
3536 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3538 * config/i386/i386-expand.cc (ix86_fixup_binary_operands_no_copy):
3539 Add use_ndd parameter and parse it.
3540 * config/i386/i386-protos.h (ix86_fixup_binary_operands_no_copy):
3542 * config/i386/i386.md (sub<mode>3): Add new alternatives for NDD
3543 and adjust output templates.
3544 (*sub<mode>_1): Likewise.
3545 (*sub<mode>_2): Likewise.
3546 (subv<mode>4): Likewise.
3547 (*subv<mode>4): Likewise.
3548 (subv<mode>4_1): Likewise.
3549 (usubv<mode>4): Likewise.
3550 (*sub<mode>_3): Likewise.
3551 (*subsi_1_zext): Likewise, and use nonimmediate_operand for operands[1]
3552 to accept memory input for NDD alternatives.
3553 (*subsi_2_zext): Likewise.
3554 (*subsi_3_zext): Likewise.
3556 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3558 * config/i386/i386.md (*add<dwi>3_doubleword): Add ndd alternatives,
3559 adopt '&' to ndd dest and move operands[1] to operands[0] when they are
3561 (*add<dwi>3_doubleword_cc_overflow_1): Likewise.
3562 (*addv<dwi>4_doubleword): Likewise.
3563 (*addv<dwi>4_doubleword_1): Likewise.
3564 (*add<dwi>3_doubleword_zext): Likewise.
3565 (addv<mode>4_overflow_1): Add ndd alternatives.
3566 (*addv<mode>4_overflow_2): Likewise.
3567 (@add<mode>3_carry): Likewise.
3568 (*add<mode>3_carry_0): Likewise.
3569 (*addsi3_carry_zext): Likewise.
3570 (addcarry<mode>): Likewise.
3571 (addcarry<mode>_0): Likewise.
3572 (*addcarry<mode>_1): Likewise.
3573 (*add<mode>3_eq): Likewise.
3574 (*add<mode>3_ne): Likewise.
3575 (*addsi3_carry_zext_0): Likewise, and use nonimmediate_operand for
3576 operands[1] to accept memory input for NDD alternative.
3578 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3580 * config/i386/constraints.md (je): New constraint.
3581 * config/i386/i386-protos.h (x86_poff_operand_p): New function to
3582 check any *POFF constant in operand.
3583 * config/i386/i386.cc (x86_poff_operand_p): New prototype.
3584 * config/i386/i386.md (*add<mode>_1): Split out je alternative for add.
3586 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3588 * config/i386/i386.md: (addsi_1_zext): Add new alternatives for
3589 NDD and adjust output templates.
3590 (*add<mode>_2): Likewise.
3591 (*addsi_2_zext): Likewise.
3592 (*add<mode>_3): Likewise.
3593 (*addsi_3_zext): Likewise.
3594 (*adddi_4): Likewise.
3595 (*add<mode>_4): Likewise.
3596 (*add<mode>_5): Likewise.
3597 (*addv<mode>4): Likewise.
3598 (*addv<mode>4_1): Likewise.
3599 (*add<mode>3_cconly_overflow_1): Likewise.
3600 (*add<mode>3_cc_overflow_1): Likewise.
3601 (*addsi3_zext_cc_overflow_1): Likewise.
3602 (*add<mode>3_cconly_overflow_2): Likewise.
3603 (*add<mode>3_cc_overflow_2): Likewise.
3604 (*addsi3_zext_cc_overflow_2): Likewise.
3606 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3608 * config/i386/i386-expand.cc (ix86_fixup_binary_operands): Add
3609 new use_ndd flag to check whether ndd can be used for this binop
3610 and adjust operand emit.
3611 (ix86_binary_operator_ok): Likewise.
3612 (ix86_expand_binary_operator): Likewise, and void postreload
3613 expand generate lea pattern when use_ndd is explicit parsed.
3614 * config/i386/i386-options.cc (ix86_option_override_internal):
3615 Prohibit apx subfeatures when not in 64bit mode.
3616 * config/i386/i386-protos.h (ix86_binary_operator_ok):
3618 (ix86_fixup_binary_operand): Likewise.
3619 (ix86_expand_binary_operand): Likewise.
3620 * config/i386/i386.md (*add<mode>_1): Extend with new alternatives
3621 to support NDD, and adjust output template.
3622 (*addhi_1): Likewise.
3623 (*addqi_1): Likewise.
3625 2023-12-07 David Malcolm <dmalcolm@redhat.com>
3629 * doc/invoke.texi: Add -Wanalyzer-symbol-too-complex.
3631 2023-12-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3633 * config/riscv/riscv-vsetvl.cc (extract_single_source): new function.
3634 (pre_vsetvl::compute_lcm_local_properties): Fix ICE.
3636 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3638 * config/aarch64/aarch64-builtins.cc (AARCH64_RSR128): New
3639 `enum aarch64_builtins' value.
3640 (AARCH64_WSR128): Likewise.
3641 (aarch64_init_rwsr_builtins): Init `__builtin_aarch64_rsr128'
3642 and `__builtin_aarch64_wsr128' builtins.
3643 (aarch64_expand_rwsr_builtin): Extend function to handle
3644 `__builtin_aarch64_{rsr|wsr}128'.
3645 * config/aarch64/aarch64-protos.h (aarch64_retrieve_sysreg):
3646 Update function signature.
3647 * config/aarch64/aarch64.cc (F_REG_128): New.
3648 (aarch64_retrieve_sysreg): Add 128-bit register mode check.
3649 * config/aarch64/aarch64.md (UNSPEC_SYSREG_RTI): New.
3650 (UNSPEC_SYSREG_WTI): Likewise.
3651 (aarch64_read_sysregti): Likewise.
3652 (aarch64_write_sysregti): Likewise.
3653 * config/aarch64/arm_acle.h (__arm_rsr128): New.
3654 (__arm_wsr128): Likewise.
3656 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3658 * config/aarch64/aarch64-sys-regs.def: Copy from Binutils.
3660 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3662 * config/aarch64/aarch64-option-extensions.def (gcs): New.
3663 * config/aarch64/aarch64.h (AARCH64_ISA_GCS): New.
3664 (TARGET_THE): Likewise.
3665 * doc/invoke.texi (AArch64 Options): Describe GCS.
3667 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3669 * config/aarch64/aarch64-c.cc (__ARM_FEATURE_SYSREG128): New.
3670 * config/aarch64/aarch64-arches.def (armv8.9-a): New.
3671 (armv9.4-a): Likewise.
3672 * config/aarch64/aarch64-option-extensions.def (d128): Likewise.
3674 * config/aarch64/aarch64.h (AARCH64_ISA_V9_4A): Likewise.
3675 (AARCH64_ISA_V8_9A): Likewise.
3676 (TARGET_ARMV9_4): Likewise.
3677 (AARCH64_ISA_D128): Likewise.
3678 (AARCH64_ISA_THE): Likewise.
3679 (TARGET_D128): Likewise.
3680 * doc/invoke.texi (AArch64 Options): Document new -march flags
3683 2023-12-06 Eric Gallager <egallager@gcc.gnu.org>
3685 * Makefile.in: Remove qmtest-related targets.
3687 2023-12-06 David Malcolm <dmalcolm@redhat.com>
3689 * common.opt (fdiagnostics-json-formatting): New.
3690 * diagnostic-format-json.cc: Add "formatted" boolean
3691 to json_output_format and subclasses, and to the
3692 diagnostic_output_format_init_json_* functions. Use it when
3694 * diagnostic-format-sarif.cc: Likewise for sarif_builder,
3695 sarif_output_format, and the various
3696 diagnostic_output_format_init_sarif_* functions.
3697 * diagnostic.cc (diagnostic_output_format_init): Add
3698 "json_formatting" boolean and pass on to the various cases.
3699 * diagnostic.h (diagnostic_output_format_init): Add
3700 "json_formatted" param.
3701 (diagnostic_output_format_init_json_stderr): Add "formatted" param
3702 (diagnostic_output_format_init_json_file): Likewise.
3703 (diagnostic_output_format_init_sarif_stderr): Likewise.
3704 (diagnostic_output_format_init_sarif_file): Likewise.
3705 (diagnostic_output_format_init_sarif_stream): Likewise.
3706 * doc/invoke.texi (-fdiagnostics-format=json): Remove discussion
3707 about JSON output needing formatting.
3708 (-fno-diagnostics-json-formatting): Add.
3709 * gcc.cc (driver_handle_option): Use
3710 opts->x_flag_diagnostics_json_formatting.
3711 * gcov.cc (generate_results): Pass "false" for new formatting
3712 option when printing json.
3713 * json.cc (value::dump): Add new "formatted" param.
3714 (object::print): Likewise, using it to add whitespace to format
3716 (array::print): Likewise.
3717 (float_number::print): Add new "formatted" param.
3718 (integer_number::print): Likewise.
3719 (string::print): Likewise.
3720 (literal::print): Likewise.
3721 (selftest::assert_print_eq): Add "formatted" param.
3722 (ASSERT_PRINT_EQ): Add "FORMATTED" param.
3723 (selftest::test_writing_objects): Test both formatted and
3724 unformatted printing.
3725 (selftest::test_writing_arrays): Likewise.
3726 (selftest::test_writing_float_numbers): Update for new param of
3728 (selftest::test_writing_integer_numbers): Likewise.
3729 (selftest::test_writing_strings): Likewise.
3730 (selftest::test_writing_literals): Likewise.
3731 (selftest::test_formatting): New.
3732 (selftest::json_cc_tests): Call it.
3733 * json.h (value::print): Add "formatted" param.
3734 (value::dump): Likewise.
3735 (object::print): Likewise.
3736 (array::print): Likewise.
3737 (float_number::print): Likewise.
3738 (integer_number::print): Likewise.
3739 (string::print): Likewise.
3740 (literal::print): Likewise.
3741 * optinfo-emit-json.cc (optrecord_json_writer::write): Pass
3742 "false" for new formatting option when printing json.
3743 (selftest::test_building_json_from_dump_calls): Likewise.
3744 * opts.cc (common_handle_option): Use
3745 opts->x_flag_diagnostics_json_formatting.
3747 2023-12-06 David Malcolm <dmalcolm@redhat.com>
3749 * diagnostic-format-json.cc (on_begin_diagnostic): Convert param
3751 (on_end_diagnostic): Likewise.
3752 (json_output_format::on_end_diagnostic): Likewise.
3753 * diagnostic-format-sarif.cc
3754 (sarif_invocation::add_notification_for_ice): Likewise.
3755 (sarif_result::on_nested_diagnostic): Likewise.
3756 (sarif_ice_notification::sarif_ice_notification): Likewise.
3757 (sarif_builder::end_diagnostic): Likewise.
3758 (sarif_builder::make_result_object): Likewise.
3759 (make_reporting_descriptor_object_for_warning): Likewise.
3760 (sarif_builder::make_locations_arr): Likewise.
3761 (sarif_output_format::on_begin_diagnostic): Likewise.
3762 (sarif_output_format::on_end_diagnostic): Likewise.
3763 * diagnostic.cc (default_diagnostic_starter): Make diagnostic_info
3765 (default_diagnostic_finalizer): Likewise.
3766 (diagnostic_context::report_diagnostic): Pass diagnostic by
3767 reference to on_{begin,end}_diagnostic.
3768 (diagnostic_text_output_format::on_begin_diagnostic): Convert
3769 param to const reference.
3770 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
3771 * diagnostic.h (diagnostic_starter_fn): Make diagnostic_info param
3773 (diagnostic_finalizer_fn): Likeewise.
3774 (diagnostic_output_format::on_begin_diagnostic): Convert param to
3776 (diagnostic_output_format::on_end_diagnostic): Likewise.
3777 (diagnostic_text_output_format::on_begin_diagnostic): Likewise.
3778 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
3779 (default_diagnostic_starter): Make diagnostic_info param const.
3780 (default_diagnostic_finalizer): Likewise.
3781 * langhooks-def.h (lhd_print_error_function): Make diagnostic_info
3783 * langhooks.cc (lhd_print_error_function): Likewise.
3784 * langhooks.h (lang_hooks::print_error_function): Likewise.
3785 * tree-diagnostic.cc (diagnostic_report_current_function):
3787 (default_tree_diagnostic_starter): Likewise.
3788 (virt_loc_aware_diagnostic_finalizer): Likewise.
3789 * tree-diagnostic.h (diagnostic_report_current_function):
3791 (virt_loc_aware_diagnostic_finalizer): Likewise.
3793 2023-12-06 Andrew Stubbs <ams@codesourcery.com>
3795 * config/gcn/gcn-builtins.def (DISPATCH_PTR): New built-in.
3796 * config/gcn/gcn.cc (gcn_init_machine_status): Disable global
3798 (gcn_expand_builtin_1): Implement GCN_BUILTIN_DISPATCH_PTR.
3800 2023-12-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3803 * config/riscv/riscv-vsetvl.cc
3804 (pre_vsetvl::compute_lcm_local_properties): Fix transparant LCM data.
3805 (pre_vsetvl::earliest_fuse_vsetvl_info): Disable earliest fusion for unrelated edge.
3807 2023-12-06 Marek Polacek <polacek@redhat.com>
3810 * config/linux.h: Redefine TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL for
3813 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3815 * config/aarch64/aarch64.cc
3816 (aarch64_test_sysreg_encoding_clashes): New.
3817 (aarch64_run_selftests): add call to
3818 aarch64_test_sysreg_encoding_clashes selftest.
3820 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3822 * config/aarch64/aarch64-builtins.cc (aarch64_general_check_builtin_call):
3824 * config/aarch64/aarch64-c.cc (aarch64_check_builtin_call):
3825 Add `aarch64_general_check_builtin_call' call.
3826 * config/aarch64/aarch64-protos.h (aarch64_general_check_builtin_call):
3829 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3831 * config/aarch64/aarch64-builtins.cc (enum aarch64_builtins):
3832 Add enums for new builtins.
3833 (aarch64_init_rwsr_builtins): New.
3834 (aarch64_general_init_builtins): Call aarch64_init_rwsr_builtins.
3835 (aarch64_expand_rwsr_builtin): New.
3836 (aarch64_general_expand_builtin): Call aarch64_general_expand_builtin.
3837 * config/aarch64/aarch64.md (read_sysregdi): New insn_and_split.
3838 (write_sysregdi): Likewise.
3839 * config/aarch64/arm_acle.h (__arm_rsr): New.
3840 (__arm_rsrp): Likewise.
3841 (__arm_rsr64): Likewise.
3842 (__arm_rsrf): Likewise.
3843 (__arm_rsrf64): Likewise.
3844 (__arm_wsr): Likewise.
3845 (__arm_wsrp): Likewise.
3846 (__arm_wsr64): Likewise.
3847 (__arm_wsrf): Likewise.
3848 (__arm_wsrf64): Likewise.
3850 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3852 * config/aarch64/aarch64-protos.h (aarch64_valid_sysreg_name_p): New.
3853 (aarch64_retrieve_sysreg): Likewise.
3854 * config/aarch64/aarch64.cc (is_implem_def_reg): Likewise.
3855 (aarch64_valid_sysreg_name_p): Likewise.
3856 (aarch64_retrieve_sysreg): Likewise.
3857 (aarch64_register_sysreg): Likewise.
3858 (aarch64_init_sysregs): Likewise.
3859 (aarch64_lookup_sysreg_map): Likewise.
3860 * config/aarch64/predicates.md (aarch64_sysreg_string): New.
3862 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3864 * config/aarch64/aarch64.cc (sysreg_t): New.
3865 (aarch64_sysregs): Likewise.
3866 (AARCH64_FEATURE): Likewise.
3867 (AARCH64_FEATURES): Likewise.
3868 (AARCH64_NO_FEATURES): Likewise.
3869 * config/aarch64/aarch64.h (AARCH64_ISA_V8A): Add missing
3871 (AARCH64_ISA_V8_1A): Likewise.
3872 (AARCH64_ISA_V8_7A): Likewise.
3873 (AARCH64_ISA_V8_8A): Likewise.
3874 (AARCH64_NO_FEATURES): Likewise.
3875 (AARCH64_FL_RAS): New ISA flag alias.
3876 (AARCH64_FL_LOR): Likewise.
3877 (AARCH64_FL_PAN): Likewise.
3878 (AARCH64_FL_AMU): Likewise.
3879 (AARCH64_FL_SCXTNUM): Likewise.
3880 (AARCH64_FL_ID_PFR2): Likewise.
3881 (F_DEPRECATED): New.
3882 (F_REG_READ): Likewise.
3883 (F_REG_WRITE): Likewise.
3884 (F_ARCHEXT): Likewise.
3885 (F_REG_ALIAS): Likewise.
3887 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3889 * config/aarch64/aarch64-sys-regs.def: New.
3891 2023-12-06 Robin Dapp <rdapp@ventanamicro.com>
3895 * config/riscv/autovec.md (vec_init<mode>qi): New expander.
3897 2023-12-06 Jakub Jelinek <jakub@redhat.com>
3899 PR rtl-optimization/112760
3900 * config/i386/i386-passes.def (pass_insert_vzeroupper): Insert
3901 after pass_postreload_cse rather than pass_reload.
3902 * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper):
3903 Adjust comment for it.
3905 2023-12-06 Jakub Jelinek <jakub@redhat.com>
3907 PR tree-optimization/112809
3908 * gimple-lower-bitint.cc (bitint_large_huge::lower_mergeable_stmt): For
3909 separate_ext in kind == bitint_prec_huge mode if rem == 0, create for
3910 i == cnt - 1 the loop rather than using size_int (end).
3912 2023-12-06 Jakub Jelinek <jakub@redhat.com>
3914 * gcc.cc (driver_handle_option): Add /* FALLTHROUGH */ comment
3915 between OPT_pie and OPT_r cases.
3917 2023-12-06 Tobias Burnus <tobias@codesourcery.com>
3919 * tsystem.h (calloc, realloc): Declare when inhibit_libc.
3921 2023-12-06 Richard Biener <rguenther@suse.de>
3923 PR tree-optimization/112843
3924 * tree-ssa-operands.cc (update_stmt_operands): Do not call
3925 update_stmt from ranger.
3926 * value-query.h (range_query::update_stmt): Remove.
3927 * gimple-range.h (gimple_ranger::update_stmt): Likewise.
3928 * gimple-range.cc (gimple_ranger::update_stmt): Likewise.
3930 2023-12-06 xuli <xuli1@eswincomputing.com>
3932 * config/riscv/riscv.md: Remove.
3934 2023-12-06 Alexandre Oliva <oliva@adacore.com>
3936 * Makefile.in (OBJS): Add ipa-strub.o.
3937 (GTFILES): Add ipa-strub.cc.
3938 * builtins.def (BUILT_IN_STACK_ADDRESS): New.
3939 (BUILT_IN___STRUB_ENTER): New.
3940 (BUILT_IN___STRUB_UPDATE): New.
3941 (BUILT_IN___STRUB_LEAVE): New.
3942 * builtins.cc: Include ipa-strub.h.
3943 (STACK_STOPS, STACK_UNSIGNED): Define.
3944 (expand_builtin_stack_address): New.
3945 (expand_builtin_strub_enter): New.
3946 (expand_builtin_strub_update): New.
3947 (expand_builtin_strub_leave): New.
3948 (expand_builtin): Call them.
3949 * common.opt (fstrub=*): New options.
3950 * doc/extend.texi (strub): New type attribute.
3951 (__builtin_stack_address): New function.
3952 (Stack Scrubbing): New section.
3953 * doc/invoke.texi (-fstrub=*): New options.
3954 (-fdump-ipa-*): New passes.
3955 * gengtype-lex.l: Ignore multi-line pp-directives.
3956 * ipa-inline.cc: Include ipa-strub.h.
3957 (can_inline_edge_p): Test strub_inlinable_to_p.
3958 * ipa-split.cc: Include ipa-strub.h.
3959 (execute_split_functions): Test strub_splittable_p.
3960 * ipa-strub.cc, ipa-strub.h: New.
3961 * passes.def: Add strub_mode and strub passes.
3962 * tree-cfg.cc (gimple_verify_flow_info): Note on debug stmts.
3963 * tree-pass.h (make_pass_ipa_strub_mode): Declare.
3964 (make_pass_ipa_strub): Declare.
3965 (make_pass_ipa_function_and_variable_visibility): Fix
3967 * tree-ssa-ccp.cc (optimize_stack_restore): Keep restores
3969 * attribs.cc: Include ipa-strub.h.
3970 (decl_attributes): Support applying attributes to function
3971 type, rather than pointer type, at handler's request.
3972 (comp_type_attributes): Combine strub_comptypes and target
3974 * doc/tm.texi.in (TARGET_STRUB_USE_DYNAMIC_ARRAY): New.
3975 (TARGET_STRUB_MAY_USE_MEMSET): New.
3976 * doc/tm.texi: Rebuilt.
3977 * cgraph.h (symtab_node::reset): Add preserve_comdat_group
3978 param, with a default.
3979 * cgraphunit.cc (symtab_node::reset): Use it.
3981 2023-12-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3985 * config/riscv/riscv-v.cc (vls_mode_valid_p): Block VLSmodes according
3986 TARGET_MAX_LMUL and BITS_PER_RISCV_VECTOR.
3988 2023-12-05 David Faust <david.faust@oracle.com>
3991 * btfout.cc (btf_collect_datasec): Avoid incorrectly creating an
3992 entry in a BTF_KIND_DATASEC record for extern variable decls without
3995 2023-12-05 Jakub Jelinek <jakub@redhat.com>
3998 * config/rs6000/rs6000.md (copysign<mode>3): Change predicate
3999 of the last argument from gpc_reg_operand to any_operand. If
4000 operands[2] is CONST_DOUBLE, emit abs or neg abs depending on
4001 its sign, otherwise if it doesn't satisfy gpc_reg_operand,
4002 force it to REG using copy_to_mode_reg.
4004 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4006 * attribs.cc (handle_ignored_attributes_option): Add extra
4007 braces to work around PR 16333 in older compilers.
4008 * config/aarch64/aarch64.cc (aarch64_gnu_attribute_table): Likewise.
4009 (aarch64_arm_attribute_table): Likewise.
4010 * config/arm/arm.cc (arm_gnu_attribute_table): Likewise.
4011 * config/i386/i386-options.cc (ix86_gnu_attribute_table): Likewise.
4012 * config/ia64/ia64.cc (ia64_gnu_attribute_table): Likewise.
4013 * config/rs6000/rs6000.cc (rs6000_gnu_attribute_table): Likewise.
4014 * target-def.h (TARGET_GNU_ATTRIBUTES): Likewise.
4015 * genhooks.cc (emit_init_macros): Likewise, when emitting the
4016 instantiation of TARGET_ATTRIBUTE_TABLE.
4017 * langhooks-def.h (LANG_HOOKS_INITIALIZER): Likewise, when
4018 instantiating LANG_HOOKS_ATTRIBUTE_TABLE.
4019 (LANG_HOOKS_ATTRIBUTE_TABLE): Define to be empty by default.
4020 * target.def (attribute_table): Likewise.
4022 2023-12-05 Richard Biener <rguenther@suse.de>
4024 PR middle-end/112860
4025 * passes.cc (should_skip_pass_p): Do not skip ISEL.
4027 2023-12-05 Richard Biener <rguenther@suse.de>
4030 * asan.cc (asan_protect_global): Do not protect globals
4031 in non-generic address-space.
4033 2023-12-05 Richard Biener <rguenther@suse.de>
4036 * ipa-icf.cc (sem_variable::equals_wpa): Compare address-spaces.
4038 2023-12-05 Richard Biener <rguenther@suse.de>
4040 PR middle-end/112830
4041 * gimplify.cc (gimplify_modify_expr): Avoid turning aggregate
4042 copy of non-generic address-spaces to memcpy.
4043 (gimplify_modify_expr_to_memcpy): Assert we are dealing with
4044 a copy inside the generic address-space.
4045 (gimplify_modify_expr_to_memset): Likewise.
4046 * tree-cfg.cc (verify_gimple_assign_single): Allow
4047 WITH_SIZE_EXPR as part of the RHS of an assignment.
4048 * builtins.cc (get_memory_address): Assert we are dealing
4049 with the generic address-space.
4050 * tree-ssa-dce.cc (ref_may_be_aliased): Handle WITH_SIZE_EXPR.
4052 2023-12-05 Richard Biener <rguenther@suse.de>
4054 PR tree-optimization/109689
4055 PR tree-optimization/112856
4056 * cfgloopmanip.h (unloop_loops): Adjust API.
4057 * tree-ssa-loop-ivcanon.cc (unloop_loops): Take edges_to_remove
4059 (canonicalize_induction_variables): Adjust.
4060 (tree_unroll_loops_completely): Likewise.
4061 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Rewrite into
4062 LC SSA if we unlooped some loops and we are in LC SSA.
4064 2023-12-05 Jakub Jelinek <jakub@redhat.com>
4067 * config/i386/i386.md (movabsq $(i32 << shift), r64 peephole2): FAIL
4068 if the new immediate is ix86_endbr_immediate_operand.
4070 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4072 * config/aarch64/aarch64.h (TARGET_STREAMING_SME2): New macro.
4073 (P_ALIASES): Likewise.
4074 (REGISTER_NAMES): Add pn aliases of the predicate registers.
4075 (W8_W11_REGNUM_P): New macro.
4076 (W8_W11_REGS): New register class.
4077 (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Update accordingly.
4078 * config/aarch64/aarch64.cc (aarch64_print_operand): Add support
4079 for %K, which prints a predicate as a counter. Handle tuples of
4081 (aarch64_regno_regclass): Handle W8_W11_REGS.
4082 (aarch64_class_max_nregs): Likewise.
4083 * config/aarch64/constraints.md (Uci, Uw2, Uw4): New constraints.
4084 (x, y): Move further up file.
4085 (Uph): Redefine as the high predicate registers, renaming the old
4088 * config/aarch64/predicates.md (const_0_to_7_operand): New predicate.
4089 (const_0_to_4_step_4_operand, const_0_to_6_step_2_operand): Likewise.
4090 (const_0_to_12_step_4_operand, const_0_to_14_step_2_operand): Likewise.
4091 (aarch64_simd_shift_imm_qi): Use const_0_to_7_operand.
4092 * config/aarch64/iterators.md (VNx16SI_ONLY, VNx8SI_ONLY)
4093 (VNx8DI_ONLY, SVE_FULL_BHSIx2, SVE_FULL_HF, SVE_FULL_SIx2_SDIx4)
4094 (SVE_FULL_BHS, SVE_FULLx24, SVE_DIx24, SVE_BHSx24, SVE_Ix24)
4095 (SVE_Fx24, SVE_SFx24, SME_ZA_BIx24, SME_ZA_BHIx124, SME_ZA_BHIx24)
4096 (SME_ZA_HFx124, SME_ZA_HFx24, SME_ZA_HIx124, SME_ZA_HIx24)
4097 (SME_ZA_SDIx24, SME_ZA_SDFx24): New mode iterators.
4098 (UNSPEC_REVD, UNSPEC_CNTP_C, UNSPEC_PEXT, UNSPEC_PEXTx2): New unspecs.
4099 (UNSPEC_PSEL, UNSPEC_PTRUE_C, UNSPEC_SQRSHR, UNSPEC_SQRSHRN)
4100 (UNSPEC_SQRSHRU, UNSPEC_SQRSHRUN, UNSPEC_UQRSHR, UNSPEC_UQRSHRN)
4101 (UNSPEC_UZP, UNSPEC_UZPQ, UNSPEC_ZIP, UNSPEC_ZIPQ, UNSPEC_BFMLSLB)
4102 (UNSPEC_BFMLSLT, UNSPEC_FCVTN, UNSPEC_FDOT, UNSPEC_SQCVT): Likewise.
4103 (UNSPEC_SQCVTN, UNSPEC_SQCVTU, UNSPEC_SQCVTUN, UNSPEC_UQCVT): Likewise.
4104 (UNSPEC_SME_ADD, UNSPEC_SME_ADD_WRITE, UNSPEC_SME_BMOPA): Likewise.
4105 (UNSPEC_SME_BMOPS, UNSPEC_SME_FADD, UNSPEC_SME_FDOT, UNSPEC_SME_FVDOT)
4106 (UNSPEC_SME_FMLA, UNSPEC_SME_FMLS, UNSPEC_SME_FSUB, UNSPEC_SME_READ)
4107 (UNSPEC_SME_SDOT, UNSPEC_SME_SVDOT, UNSPEC_SME_SMLA, UNSPEC_SME_SMLS)
4108 (UNSPEC_SME_SUB, UNSPEC_SME_SUB_WRITE, UNSPEC_SME_SUDOT): Likewise.
4109 (UNSPEC_SME_SUVDOT, UNSPEC_SME_UDOT, UNSPEC_SME_UVDOT): Likewise.
4110 (UNSPEC_SME_UMLA, UNSPEC_SME_UMLS, UNSPEC_SME_USDOT): Likewise.
4111 (UNSPEC_SME_USVDOT, UNSPEC_SME_WRITE): Likewise.
4112 (Vetype, VNARROW, V2XWIDE, Ventype, V_INT_EQUIV, v_int_equiv)
4113 (VSINGLE, vsingle, b): Add tuple modes.
4114 (v2xwide, za32_offset_range, za64_offset_range, za32_long)
4115 (za32_last_offset, vg_modifier, z_suffix, aligned_operand)
4116 (aligned_fpr): New mode attributes.
4117 (SVE_INT_BINARY_MULTI, SVE_INT_BINARY_SINGLE, SVE_INT_BINARY_MULTI)
4118 (SVE_FP_BINARY_MULTI): New int iterators.
4119 (SVE_BFLOAT_TERNARY_LONG): Add UNSPEC_BFMLSLB and UNSPEC_BFMLSLT.
4120 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
4121 (SVE_WHILE_ORDER, SVE2_INT_SHIFT_IMM_NARROWxN, SVE_QCVTxN)
4122 (SVE2_SFx24_UNARY, SVE2_x24_PERMUTE, SVE2_x24_PERMUTEQ)
4123 (UNSPEC_REVD_ONLY, SME2_INT_MOP, SME2_BMOP, SME_BINARY_SLICE_SDI)
4124 (SME_BINARY_SLICE_SDF, SME_BINARY_WRITE_SLICE_SDI, SME_INT_DOTPROD)
4125 (SME_INT_DOTPROD_LANE, SME_FP_DOTPROD, SME_FP_DOTPROD_LANE)
4126 (SME_INT_TERNARY_SLICE, SME_FP_TERNARY_SLICE, BHSD_BITS)
4127 (LUTI_BITS): New int iterators.
4128 (optab, sve_int_op): Handle the new unspecs.
4129 (sme_int_op, has_16bit_form): New int attributes.
4130 (bits_etype): Handle 64.
4131 * config/aarch64/aarch64.md (UNSPEC_LD1_SVE_COUNT): New unspec.
4132 (UNSPEC_ST1_SVE_COUNT, UNSPEC_LDNT1_SVE_COUNT): Likewise.
4133 (UNSPEC_STNT1_SVE_COUNT): Likewise.
4134 * config/aarch64/atomics.md (cas_short_expected_imm): Use Uhi
4135 rather than Uph for HImode immediates.
4136 * config/aarch64/aarch64-sve.md (@aarch64_ld1<SVE_FULLx24:mode>)
4137 (@aarch64_ldnt1<SVE_FULLx24:mode>, @aarch64_st1<SVE_FULLx24:mode>)
4138 (@aarch64_stnt1<SVE_FULLx24:mode>): New patterns.
4139 (@aarch64_<sur>dot_prod_lane<vsi2qi>): Extend to...
4140 (@aarch64_<sur>dot_prod_lane<SVE_FULL_SDI:mode><SVE_FULL_BHI:mode>)
4141 (@aarch64_<sur>dot_prod_lane<VNx4SI_ONLY:mode><VNx16QI_ONLY:mode>):
4142 ...these new patterns.
4143 (SVE_WHILE_B, SVE_WHILE_B_X2, SVE_WHILE_C): New constants. Add
4144 SVE_WHILE_B to existing while patterns.
4145 * config/aarch64/aarch64-sve2.md (@aarch64_sve_ptrue_c<BHSD_BITS>)
4146 (@aarch64_sve_pext<BHSD_BITS>, @aarch64_sve_pext<BHSD_BITS>x2)
4147 (@aarch64_sve_psel<BHSD_BITS>, *aarch64_sve_psel<BHSD_BITS>_plus)
4148 (@aarch64_sve_cntp_c<BHSD_BITS>, <frint_pattern><mode>2)
4149 (<optab><mode>3, *<optab><mode>3, @aarch64_sve_single_<optab><mode>)
4150 (@aarch64_sve_<sve_int_op><mode>): New patterns.
4151 (@aarch64_sve_single_<sve_int_op><mode>, @aarch64_sve_<su>clamp<mode>)
4152 (*aarch64_sve_<su>clamp<mode>_x, @aarch64_sve_<su>clamp_single<mode>)
4153 (@aarch64_sve_fclamp<mode>, *aarch64_sve_fclamp<mode>_x)
4154 (@aarch64_sve_fclamp_single<mode>, <optab><mode><v2xwide>2)
4155 (@aarch64_sve_<sur>dotvnx4sivnx8hi): New patterns.
4156 (@aarch64_sve_<maxmin_uns_op><mode>): Likewise.
4157 (*aarch64_sve_<maxmin_uns_op><mode>): Likewise.
4158 (@aarch64_sve_single_<maxmin_uns_op><mode>): Likewise.
4159 (aarch64_sve_fdotvnx4sfvnx8hf): Likewise.
4160 (aarch64_fdot_prod_lanevnx4sfvnx8hf): Likewise.
4161 (@aarch64_sve_<optab><VNx16QI_ONLY:mode><VNx16SI_ONLY:mode>): Likewise.
4162 (@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8SI_ONLY:mode>): Likewise.
4163 (@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8DI_ONLY:mode>): Likewise.
4164 (truncvnx8sf<mode>2, @aarch64_sve_cvtn<mode>): Likewise.
4165 (<optab><v_int_equiv><mode>2, <optab><mode><v_int_equiv>2): Likewise.
4166 (@aarch64_sve_sel<mode>): Likewise.
4167 (@aarch64_sve_while<while_optab_cmp>_b<BHSD_BITS>_x2): Likewise.
4168 (@aarch64_sve_while<while_optab_cmp>_c<BHSD_BITS>): Likewise.
4169 (@aarch64_pred_<optab><mode>, @cond_<optab><mode>): Likewise.
4170 (@aarch64_sve_<optab><mode>): Likewise.
4171 * config/aarch64/aarch64-sme.md (@aarch64_sme_<optab><mode><mode>)
4172 (*aarch64_sme_<optab><mode><mode>_plus, @aarch64_sme_read<mode>)
4173 (*aarch64_sme_read<mode>_plus, @aarch64_sme_write<mode>): New patterns.
4174 (*aarch64_sme_write<mode>_plus aarch64_sme_zero_zt0): Likewise.
4175 (@aarch64_sme_<optab><mode>, *aarch64_sme_<optab><mode>_plus)
4176 (@aarch64_sme_single_<optab><mode>): Likewise.
4177 (*aarch64_sme_single_<optab><mode>_plus): Likewise.
4178 (@aarch64_sme_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>)
4179 (*aarch64_sme_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus)
4180 (@aarch64_sme_single_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>)
4181 (*aarch64_sme_single_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus)
4182 (@aarch64_sme_single_sudot<VNx4SI_ONLY:mode><SME_ZA_BIx24:mode>)
4183 (*aarch64_sme_single_sudot<VNx4SI_ONLY:mode><SME_ZA_BIx24:mode>_plus)
4184 (@aarch64_sme_lane_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>)
4185 (*aarch64_sme_lane_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus)
4186 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_BHI:mode>)
4187 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_BHI:mode>_plus)
4188 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>)
4189 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>_plus)
4190 (@aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>)
4191 (*aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>_plus)
4192 (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx124:mode>)
4193 (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx124:mode>)
4194 (@aarch64_sme_<optab><VNx2DI_ONLY:mode><VNx8HI_ONLY:mode>)
4195 (*aarch64_sme_<optab><VNx2DI_ONLY:mode><VNx8HI_ONLY:mode>_plus)
4196 (@aarch64_sme_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>)
4197 (*aarch64_sme_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>_plus)
4198 (@aarch64_sme_single_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>)
4199 (*aarch64_sme_single_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>_plus)
4200 (@aarch64_sme_lane_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx124:mode>)
4201 (*aarch64_sme_lane_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx124:mode>)
4202 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><VNx8HI_ONLY:mode>)
4203 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><VNx4SI_ONLY:mode>)
4204 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>)
4205 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus)
4206 (@aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>)
4207 (*aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus)
4208 (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>)
4209 (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus)
4210 (@aarch64_sme_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
4211 (*aarch64_sme_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>_plus)
4212 (@aarch64_sme_single_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
4213 (*aarch64_sme_single_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>_plus)
4214 (@aarch64_sme_lane_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
4215 (*aarch64_sme_lane_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
4216 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_HF:mode>)
4217 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_HF:mode>_plus)
4218 (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx124:mode>)
4219 (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx124:mode>)
4220 (@aarch64_sme_lut<LUTI_BITS><mode>): Likewise.
4221 (UNSPEC_SME_LUTI): New unspec.
4222 * config/aarch64/aarch64-sve-builtins.def (single): New mode suffix.
4223 (c8, c16, c32, c64): New type suffixes.
4224 (vg1x2, vg1x4, vg2, vg2x1, vg2x2, vg2x4, vg4, vg4x1, vg4x2)
4225 (vg4x4): New group suffixes.
4226 * config/aarch64/aarch64-sve-builtins.h (CP_READ_ZT0)
4227 (CP_WRITE_ZT0): New constants.
4228 (get_svbool_t): Delete.
4229 (function_resolver::report_mismatched_num_vectors): New member
4231 (function_resolver::resolve_conversion): Likewise.
4232 (function_resolver::infer_predicate_type): Likewise.
4233 (function_resolver::infer_64bit_scalar_integer_pair): Likewise.
4234 (function_resolver::require_matching_predicate_type): Likewise.
4235 (function_resolver::require_nonscalar_type): Likewise.
4236 (function_resolver::finish_opt_single_resolution): Likewise.
4237 (function_resolver::require_derived_vector_type): Add an
4238 expected_num_vectors parameter.
4239 (function_expander::map_to_rtx_codes): Add an extra parameter
4240 for unconditional FP unspecs.
4241 (function_instance::gp_type_index): New member function.
4242 (function_instance::gp_type): Likewise.
4243 (function_instance::gp_mode): Handle multi-vector operations.
4244 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_count)
4245 (TYPES_all_pred_count, TYPES_c, TYPES_bhs_data, TYPES_bhs_widen)
4246 (TYPES_hs_data, TYPES_cvt_h_s_float, TYPES_cvt_s_s, TYPES_qcvt_x2)
4247 (TYPES_qcvt_x4, TYPES_qrshr_x2, TYPES_qrshru_x2, TYPES_qrshr_x4)
4248 (TYPES_qrshru_x4, TYPES_while_x, TYPES_while_x_c, TYPES_s_narrow_fsu)
4249 (TYPES_za_s_b_signed, TYPES_za_s_b_unsigned, TYPES_za_s_b_integer)
4250 (TYPES_za_s_h_integer, TYPES_za_s_h_data, TYPES_za_s_unsigned)
4251 (TYPES_za_s_float, TYPES_za_s_data, TYPES_za_d_h_integer): New type
4253 (groups_x2, groups_x12, groups_x4, groups_x24, groups_x124)
4254 (groups_vg1x2, groups_vg1x4, groups_vg1x24, groups_vg2, groups_vg4)
4255 (groups_vg24): New group arrays.
4256 (function_instance::reads_global_state_p): Handle CP_READ_ZT0.
4257 (function_instance::modifies_global_state_p): Handle CP_WRITE_ZT0.
4258 (add_shared_state_attribute): Handle zt0 state.
4259 (function_builder::add_overloaded_functions): Skip MODE_single
4260 for non-tuple groups.
4261 (function_resolver::report_mismatched_num_vectors): New function.
4262 (function_resolver::resolve_to): Add a fallback error message for
4263 the general two-type case.
4264 (function_resolver::resolve_conversion): New function.
4265 (function_resolver::infer_predicate_type): Likewise.
4266 (function_resolver::infer_64bit_scalar_integer_pair): Likewise.
4267 (function_resolver::require_matching_predicate_type): Likewise.
4268 (function_resolver::require_matching_vector_type): Specifically
4269 diagnose mismatched vector counts.
4270 (function_resolver::require_derived_vector_type): Add an
4271 expected_num_vectors parameter. Extend to handle cases where
4272 tuples are expected.
4273 (function_resolver::require_nonscalar_type): New function.
4274 (function_resolver::check_gp_argument): Use gp_type_index rather
4275 than hard-coding VECTOR_TYPE_svbool_t.
4276 (function_resolver::finish_opt_single_resolution): New function.
4277 (function_checker::require_immediate_either_or): Remove hard-coded
4279 (function_expander::direct_optab_handler): New function.
4280 (function_expander::use_pred_x_insn): Only add a strictness flag
4281 is the insn has an operand for it.
4282 (function_expander::map_to_rtx_codes): Take an unconditional
4283 FP unspec as an extra parameter. Handle tuples and MODE_single.
4284 (function_expander::map_to_unspecs): Handle tuples and MODE_single.
4285 * config/aarch64/aarch64-sve-builtins-functions.h (read_zt0)
4286 (write_zt0): New typedefs.
4287 (full_width_access::memory_vector): Use the function's
4289 (rtx_code_function_base): Add an optional unconditional FP unspec.
4290 (rtx_code_function::expand): Update accordingly.
4291 (rtx_code_function_rotated::expand): Likewise.
4292 (unspec_based_function_exact_insn::expand): Use tuple_mode instead
4294 (unspec_based_uncond_function): New typedef.
4295 (cond_or_uncond_unspec_function): New class.
4296 (sme_1mode_function::expand): Handle single forms.
4297 (sme_2mode_function_t): Likewise, adding a template parameter for them.
4298 (sme_2mode_function): Update accordingly.
4299 (sme_2mode_lane_function): New typedef.
4300 (multireg_permute): New class.
4301 (class integer_conversion): Likewise.
4302 (while_comparison::expand): Handle svcount_t and svboolx2_t results.
4303 * config/aarch64/aarch64-sve-builtins-shapes.h
4304 (binary_int_opt_single_n, binary_opt_single_n, binary_single)
4305 (binary_za_slice_lane, binary_za_slice_int_opt_single)
4306 (binary_za_slice_opt_single, binary_za_slice_uint_opt_single)
4307 (binaryx, clamp, compare_scalar_count, count_pred_c)
4308 (dot_za_slice_int_lane, dot_za_slice_lane, dot_za_slice_uint_lane)
4309 (extract_pred, inherent_zt, ldr_zt, read_za, read_za_slice)
4310 (select_pred, shift_right_imm_narrowxn, storexn, str_zt)
4311 (unary_convertxn, unary_za_slice, unaryxn, write_za)
4312 (write_za_slice): Declare.
4313 * config/aarch64/aarch64-sve-builtins-shapes.cc
4314 (za_group_is_pure_overload): New function.
4315 (apply_predication): Use the function's gp_type for the predicate,
4316 instead of hard-coding the use of svbool_t.
4317 (parse_element_type): Add support for "c" (svcount_t).
4318 (parse_type): Add support for "c0" and "c1" (conversion destination
4320 (binary_za_slice_lane_base): New class.
4321 (binary_za_slice_opt_single_base): Likewise.
4322 (load_contiguous_base::resolve): Pass the group suffix to r.resolve.
4323 (luti_lane_zt_base): New class.
4324 (binary_int_opt_single_n, binary_opt_single_n, binary_single)
4325 (binary_za_slice_lane, binary_za_slice_int_opt_single)
4326 (binary_za_slice_opt_single, binary_za_slice_uint_opt_single)
4327 (binaryx, clamp): New shapes.
4328 (compare_scalar_def::build): Allow the return type to be a tuple.
4329 (compare_scalar_def::expand): Pass the group suffix to r.resolve.
4330 (compare_scalar_count, count_pred_c, dot_za_slice_int_lane)
4331 (dot_za_slice_lane, dot_za_slice_uint_lane, extract_pred, inherent_zt)
4332 (ldr_zt, read_za, read_za_slice, select_pred, shift_right_imm_narrowxn)
4333 (storexn, str_zt): New shapes.
4334 (ternary_qq_lane_def, ternary_qq_opt_n_def): Replace with...
4335 (ternary_qq_or_011_lane_def, ternary_qq_opt_n_or_011_def): ...these
4336 new classes. Allow a second suffix that specifies the type of the
4337 second vector argument, and that is used to derive the third.
4338 (unary_def::build): Extend to handle tuple types.
4339 (unary_convert_def::build): Use the new c0 and c1 format specifiers.
4340 (unary_convertxn, unary_za_slice, unaryxn, write_za): New shapes.
4341 (write_za_slice): Likewise.
4342 * config/aarch64/aarch64-sve-builtins-base.cc (svbic_impl::expand)
4343 (svext_bhw_impl::expand): Update call to map_to_rtx_costs.
4344 (svcntp_impl::expand): Handle svcount_t variants.
4345 (svcvt_impl::expand): Handle unpredicated conversions separately,
4346 dealing with tuples.
4347 (svdot_impl::expand): Handle 2-way dot products.
4348 (svdotprod_lane_impl::expand): Likewise.
4349 (svld1_impl::fold): Punt on tuple loads.
4350 (svld1_impl::expand): Handle tuple loads.
4351 (svldnt1_impl::expand): Likewise.
4352 (svpfalse_impl::fold): Punt on svcount_t forms.
4353 (svptrue_impl::fold): Likewise.
4354 (svptrue_impl::expand): Handle svcount_t forms.
4355 (svrint_impl): New class.
4356 (svsel_impl::fold): Punt on tuple forms.
4357 (svsel_impl::expand): Handle tuple forms.
4358 (svst1_impl::fold): Punt on tuple loads.
4359 (svst1_impl::expand): Handle tuple loads.
4360 (svstnt1_impl::expand): Likewise.
4361 (svwhilelx_impl::fold): Punt on tuple forms.
4362 (svdot_lane): Use UNSPEC_FDOT.
4363 (svmax, svmaxnm, svmin, svminmm): Add unconditional FP unspecs.
4364 (rinta, rinti, rintm, rintn, rintp, rintx, rintz): Use svrint_impl.
4365 * config/aarch64/aarch64-sve-builtins-base.def (svcreate2, svget2)
4366 (svset2, svundef2): Add _b variants.
4367 (svcvt): Use unary_convertxn.
4368 (svdot): Use ternary_qq_opt_n_or_011.
4369 (svdot_lane): Use ternary_qq_or_011_lane.
4370 (svmax, svmaxnm, svmin, svminnm): Use binary_opt_single_n.
4371 (svpfalse): Add a form that returns svcount_t results.
4372 (svrinta, svrintm, svrintn, svrintp): Use unaryxn.
4373 (svsel): Use binaryxn.
4374 (svst1, svstnt1): Use storexn.
4375 * config/aarch64/aarch64-sve-builtins-sme.h
4376 (svadd_za, svadd_write_za, svbmopa_za, svbmops_za, svdot_za)
4377 (svdot_lane_za, svldr_zt, svluti2_lane_zt, svluti4_lane_zt)
4378 (svmla_za, svmla_lane_za, svmls_za, svmls_lane_za, svread_za)
4379 (svstr_zt, svsub_za, svsub_write_za, svsudot_za, svsudot_lane_za)
4380 (svsuvdot_lane_za, svusdot_za, svusdot_lane_za, svusvdot_lane_za)
4381 (svvdot_lane_za, svwrite_za, svzero_zt): Declare.
4382 * config/aarch64/aarch64-sve-builtins-sme.cc (load_store_za_base):
4384 (load_store_za_zt0_base): ...this and extend to tuples.
4385 (load_za_base, store_za_base): Update accordingly.
4386 (expand_ldr_str_zt0): New function.
4387 (svldr_zt_impl, svluti_lane_zt_impl, svread_za_impl, svstr_zt_impl)
4388 (svsudot_za_impl, svwrite_za_impl, svzero_zt_impl): New classes.
4389 (svadd_za, svadd_write_za, svbmopa_za, svbmops_za, svdot_za)
4390 (svdot_lane_za, svldr_zt, svluti2_lane_zt, svluti4_lane_zt)
4391 (svmla_za, svmla_lane_za, svmls_za, svmls_lane_za, svread_za)
4392 (svstr_zt, svsub_za, svsub_write_za, svsudot_za, svsudot_lane_za)
4393 (svsuvdot_lane_za, svusdot_za, svusdot_lane_za, svusvdot_lane_za)
4394 (svvdot_lane_za, svwrite_za, svzero_zt): New functions.
4395 * config/aarch64/aarch64-sve-builtins-sme.def: Add SME2 intrinsics.
4396 * config/aarch64/aarch64-sve-builtins-sve2.h
4397 (svbfmlslb, svbfmlslb_lane, svbfmlslt, svbfmlslt_lane, svclamp)
4398 (svcvtn, svpext, svpsel, svqcvt, svqcvtn, svqrshr, svqrshrn)
4399 (svqrshru, svqrshrun, svrevd, svunpk, svuzp, svuzpq, svzip)
4401 * config/aarch64/aarch64-sve-builtins-sve2.cc (svclamp_impl)
4402 (svcvtn_impl, svpext_impl, svpsel_impl): New classes.
4403 (svqrshl_impl::fold): Update for change to svrshl shape.
4404 (svrshl_impl::fold): Punt on tuple forms.
4405 (svsqadd_impl::expand): Update call to map_to_rtx_codes.
4406 (svunpk_impl): New class.
4407 (svbfmlslb, svbfmlslb_lane, svbfmlslt, svbfmlslt_lane, svclamp)
4408 (svcvtn, svpext, svpsel, svqcvt, svqcvtn, svqrshr, svqrshrn)
4409 (svqrshru, svqrshrun, svrevd, svunpk, svuzp, svuzpq, svzip)
4410 (svzipq): New functions.
4411 * config/aarch64/aarch64-sve-builtins-sve2.def: Add SME2 intrinsics.
4412 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define
4413 or undefine __ARM_FEATURE_SME2.
4415 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4417 * config/aarch64/aarch64.md (ZT0_REGNUM): New constant.
4418 (LAST_FAKE_REGNUM): Bump to include it.
4419 * config/aarch64/aarch64.h (FIXED_REGISTERS): Add an entry for ZT0.
4420 (CALL_REALLY_USED_REGISTERS, REGISTER_NAMES): Likewise.
4421 (REG_CLASS_CONTENTS): Likewise.
4422 (machine_function): Add zt0_save_buffer.
4423 (CUMULATIVE_ARGS): Add shared_zt0_flags;
4424 * config/aarch64/aarch64.cc (aarch64_check_state_string): Handle zt0.
4425 (aarch64_fntype_pstate_za, aarch64_fndecl_pstate_za): Likewise.
4426 (aarch64_function_arg): Add the shared ZT0 flags as an extra
4427 limb of the parallel.
4428 (aarch64_init_cumulative_args): Initialize shared_zt0_flags.
4429 (aarch64_extra_live_on_entry): Handle ZT0_REGNUM.
4430 (aarch64_epilogue_uses): Likewise.
4431 (aarch64_get_zt0_save_buffer, aarch64_save_zt0): New functions.
4432 (aarch64_restore_zt0): Likewise.
4433 (aarch64_start_call_args): Reject calls to functions that share
4434 ZT0 from functions that have no ZT0 state. Save ZT0 around shared-ZA
4435 calls that do not share ZT0.
4436 (aarch64_expand_call): Handle ZT0. Reject calls to functions that
4437 share ZT0 but not ZA from functions with ZA state.
4438 (aarch64_end_call_args): Restore ZT0 after calls to shared-ZA functions
4439 that do not share ZT0.
4440 (aarch64_set_current_function): Require +sme2 for functions that
4442 (aarch64_function_attribute_inlinable_p): Don't allow functions to
4443 be inlined if they have local zt0 state.
4444 (AARCH64_IPA_CLOBBERS_ZT0): New constant.
4445 (aarch64_update_ipa_fn_target_info): Record asms that clobber ZT0.
4446 (aarch64_can_inline_p): Don't inline callees that clobber ZT0
4447 into functions that have ZT0 state.
4448 (aarch64_comp_type_attributes): Check for compatible ZT0 sharing.
4449 (aarch64_optimize_mode_switching): Use mode switching if the
4450 function has ZT0 state.
4451 (aarch64_mode_emit_local_sme_state): Save and restore ZT0 around
4452 calls to private-ZA functions.
4453 (aarch64_mode_needed_local_sme_state): Require ZA to be active
4454 for instructions that access ZT0.
4455 (aarch64_mode_entry): Mark ZA as dead on entry if the function
4456 only shares state other than "za" itself.
4457 (aarch64_mode_exit): Likewise mark ZA as dead on return.
4458 (aarch64_md_asm_adjust): Extend handling of ZA clobbers to ZT0.
4459 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
4460 Define __ARM_STATE_ZT0.
4461 * config/aarch64/aarch64-sme.md (UNSPECV_ASM_UPDATE_ZT0): New unspecv.
4462 (aarch64_asm_update_zt0): New insn.
4463 (UNSPEC_RESTORE_ZT0): New unspec.
4464 (aarch64_sme_ldr_zt0, aarch64_restore_zt0): New insns.
4465 (aarch64_sme_str_zt0): Likewise.
4467 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4469 * config/aarch64/aarch64-modes.def (VNx32BI): New mode.
4470 * config/aarch64/aarch64-protos.h (aarch64_split_double_move): Declare.
4471 * config/aarch64/aarch64-sve-builtins.cc
4472 (register_tuple_type): Handle tuples of predicates.
4473 (handle_arm_sve_h): Define svboolx2_t as a pair of two svbool_ts.
4474 * config/aarch64/aarch64-sve.md (movvnx32bi): New insn.
4475 * config/aarch64/aarch64.cc
4476 (pure_scalable_type_info::piece::get_rtx): Use VNx32BI for pairs
4478 (pure_scalable_type_info::add_piece): Don't try to form pairs of
4480 (VEC_STRUCT): Generalize comment.
4481 (aarch64_classify_vector_mode): Handle VNx32BI.
4482 (aarch64_array_mode): Likewise. Return BLKmode for arrays of
4483 predicates that have no associated mode, rather than allowing
4484 an integer mode to be chosen.
4485 (aarch64_hard_regno_nregs): Handle VNx32BI.
4486 (aarch64_hard_regno_mode_ok): Likewise.
4487 (aarch64_split_double_move): New function, split out from...
4488 (aarch64_split_128bit_move): ...here.
4489 (aarch64_ptrue_reg): Tighten assert to aarch64_sve_pred_mode_p.
4490 (aarch64_pfalse_reg): Likewise.
4491 (aarch64_sve_same_pred_for_ptest_p): Likewise.
4492 (aarch64_sme_mode_switch_regs::add_reg): Handle VNx32BI.
4493 (aarch64_expand_mov_immediate): Restrict handling of boolean vector
4494 constants to single-predicate modes.
4495 (aarch64_classify_address): Handle VNx32BI, ensuring that both halves
4497 (aarch64_class_max_nregs): Handle VNx32BI.
4498 (aarch64_member_type_forces_blk): Don't for BLKmode for svboolx2_t.
4499 (aarch64_simd_valid_immediate): Allow all-zeros and all-ones for
4501 (aarch64_mov_operand_p): Restrict predicate constant canonicalization
4502 to single-predicate modes.
4503 (aarch64_evpc_ext): Generalize exclusion to all predicate modes.
4504 (aarch64_evpc_rev_local, aarch64_evpc_dup): Likewise.
4505 * config/aarch64/constraints.md (PR_REGS): New predicate.
4507 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4509 * config/aarch64/aarch64-sve-builtins-base.cc
4510 (svreinterpret_impl::fold): Handle reinterprets between svbool_t
4512 (svreinterpret_impl::expand): Likewise.
4513 * config/aarch64/aarch64-sve-builtins-base.def (svreinterpret): Add
4515 * config/aarch64/aarch64-sve-builtins.cc (TYPES_reinterpret_b): New
4517 (wrap_type_in_struct, register_type_decl): New functions, split out
4519 (register_tuple_type): ...here.
4520 (register_builtin_types): Handle svcount_t.
4521 (handle_arm_sve_h): Don't create tuples of svcount_t.
4522 * config/aarch64/aarch64-sve-builtins.def (svcount_t): New type.
4523 (c): New type suffix.
4524 * config/aarch64/aarch64-sve-builtins.h (TYPE_count): New type class.
4526 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4528 * doc/invoke.texi: Document +sme2.
4529 * doc/sourcebuild.texi: Document aarch64_sme2.
4530 * config/aarch64/aarch64-option-extensions.def (AARCH64_OPT_EXTENSION):
4532 * config/aarch64/aarch64.h (AARCH64_ISA_SME2, TARGET_SME2): New macros.
4534 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4536 * config/aarch64/aarch64.cc (aarch64_function_ok_for_sibcall):
4537 Enforce PSTATE.SM and PSTATE.ZA restrictions.
4538 (aarch64_expand_epilogue): Save and restore the arguments
4539 to a sibcall around any change to PSTATE.SM.
4541 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4543 * config/aarch64/aarch64.cc: Include symbol-summary.h, ipa-prop.h,
4545 (aarch64_function_attribute_inlinable_p): New function.
4546 (AARCH64_IPA_SM_FIXED, AARCH64_IPA_CLOBBERS_ZA): New constants.
4547 (aarch64_need_ipa_fn_target_info): New function.
4548 (aarch64_update_ipa_fn_target_info): Likewise.
4549 (aarch64_can_inline_p): Restrict the previous ISA flag checks
4550 to non-modal features. Prevent callees that require a particular
4551 PSTATE.SM state from being inlined into callers that can't guarantee
4552 that state. Also prevent callees that have ZA state from being
4553 inlined into callers that don't. Finally, prevent callees that
4554 clobber ZA from being inlined into callers that have ZA state.
4555 (TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P): Define.
4556 (TARGET_NEED_IPA_FN_TARGET_INFO): Likewise.
4557 (TARGET_UPDATE_IPA_FN_TARGET_INFO): Likewise.
4559 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4561 * config/aarch64/aarch64.cc: Include except.h
4562 (aarch64_sme_mode_switch_regs::add_call_preserved_reg): New function.
4563 (aarch64_sme_mode_switch_regs::add_call_preserved_regs): Likewise.
4564 (aarch64_need_old_pstate_sm): Return true if the function has
4565 a nonlocal-goto or exception receiver.
4566 (aarch64_switch_pstate_sm_for_landing_pad): New function.
4567 (aarch64_switch_pstate_sm_for_jump): Likewise.
4568 (pass_switch_pstate_sm::gate): Enable the pass for all
4569 streaming and streaming-compatible functions.
4570 (pass_switch_pstate_sm::execute): Handle non-local gotos and their
4571 receivers. Handle exception handler entry points.
4573 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4575 * config/aarch64/aarch64.cc (aarch64_arm_attribute_table): Add
4576 arm::locally_streaming.
4577 (aarch64_fndecl_is_locally_streaming): New function.
4578 (aarch64_fndecl_sm_state): Handle locally-streaming functions.
4579 (aarch64_cfun_enables_pstate_sm): New function.
4580 (aarch64_add_offset): Add an argument that specifies whether
4581 the streaming vector length should be used instead of the
4583 (aarch64_split_add_offset, aarch64_add_sp, aarch64_sub_sp): Likewise.
4584 (aarch64_allocate_and_probe_stack_space): Likewise.
4585 (aarch64_expand_mov_immediate): Update calls accordingly.
4586 (aarch64_need_old_pstate_sm): Return true for locally-streaming
4587 streaming-compatible functions.
4588 (aarch64_layout_frame): Force all call-preserved Z and P registers
4589 to be saved and restored if the function switches PSTATE.SM in the
4591 (aarch64_get_separate_components): Disable shrink-wrapping of
4592 such Z and P saves and restores.
4593 (aarch64_use_late_prologue_epilogue): New function.
4594 (aarch64_expand_prologue): Measure SVE lengths in the streaming
4595 vector length for locally-streaming functions, then emit code
4596 to enable streaming mode.
4597 (aarch64_expand_epilogue): Likewise in reverse.
4598 (TARGET_USE_LATE_PROLOGUE_EPILOGUE): Define.
4599 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
4600 Define __arm_locally_streaming.
4602 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4604 * doc/invoke.texi: Document +sme-i16i64 and +sme-f64f64.
4605 * config.gcc (aarch64*-*-*): Add arm_sme.h to the list of headers
4606 to install and aarch64-sve-builtins-sme.o to the list of objects
4608 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define
4609 or undefine TARGET_SME, TARGET_SME_I16I64 and TARGET_SME_F64F64.
4610 (aarch64_pragma_aarch64): Handle arm_sme.h.
4611 * config/aarch64/aarch64-option-extensions.def (sme-i16i64)
4612 (sme-f64f64): New extensions.
4613 * config/aarch64/aarch64-protos.h (aarch64_sme_vq_immediate)
4614 (aarch64_addsvl_addspl_immediate_p, aarch64_output_addsvl_addspl)
4615 (aarch64_output_sme_zero_za): Declare.
4616 (aarch64_output_move_struct): Delete.
4617 (aarch64_sme_ldr_vnum_offset): Declare.
4618 (aarch64_sve::handle_arm_sme_h): Likewise.
4619 * config/aarch64/aarch64.h (AARCH64_ISA_SM_ON): New macro.
4620 (AARCH64_ISA_SME_I16I64, AARCH64_ISA_SME_F64F64): Likewise.
4621 (TARGET_STREAMING, TARGET_STREAMING_SME): Likewise.
4622 (TARGET_SME_I16I64, TARGET_SME_F64F64): Likewise.
4623 * config/aarch64/aarch64.cc (aarch64_sve_rdvl_factor_p): Rename to...
4624 (aarch64_sve_rdvl_addvl_factor_p): ...this.
4625 (aarch64_sve_rdvl_immediate_p): Update accordingly.
4626 (aarch64_rdsvl_immediate_p, aarch64_add_offset): Likewise.
4627 (aarch64_sme_vq_immediate): Likewise. Make public.
4628 (aarch64_sve_addpl_factor_p): New function.
4629 (aarch64_sve_addvl_addpl_immediate_p): Use
4630 aarch64_sve_rdvl_addvl_factor_p and aarch64_sve_addpl_factor_p.
4631 (aarch64_addsvl_addspl_immediate_p): New function.
4632 (aarch64_output_addsvl_addspl): Likewise.
4633 (aarch64_cannot_force_const_mem): Return true for RDSVL immediates.
4634 (aarch64_classify_index): Handle .Q scaling for VNx1TImode.
4635 (aarch64_classify_address): Likewise for vnum offsets.
4636 (aarch64_output_sme_zero_za): New function.
4637 (aarch64_sme_ldr_vnum_offset_p): Likewise.
4638 * config/aarch64/predicates.md (aarch64_addsvl_addspl_immediate):
4640 (aarch64_pluslong_operand): Include it for SME.
4641 * config/aarch64/constraints.md (Ucj, Uav): New constraints.
4642 * config/aarch64/iterators.md (VNx1TI_ONLY): New mode iterator.
4643 (SME_ZA_I, SME_ZA_SDI, SME_ZA_SDF_I, SME_MOP_BHI): Likewise.
4644 (SME_MOP_HSDF): Likewise.
4645 (UNSPEC_SME_ADDHA, UNSPEC_SME_ADDVA, UNSPEC_SME_FMOPA)
4646 (UNSPEC_SME_FMOPS, UNSPEC_SME_LD1_HOR, UNSPEC_SME_LD1_VER)
4647 (UNSPEC_SME_READ_HOR, UNSPEC_SME_READ_VER, UNSPEC_SME_SMOPA)
4648 (UNSPEC_SME_SMOPS, UNSPEC_SME_ST1_HOR, UNSPEC_SME_ST1_VER)
4649 (UNSPEC_SME_SUMOPA, UNSPEC_SME_SUMOPS, UNSPEC_SME_UMOPA)
4650 (UNSPEC_SME_UMOPS, UNSPEC_SME_USMOPA, UNSPEC_SME_USMOPS)
4651 (UNSPEC_SME_WRITE_HOR, UNSPEC_SME_WRITE_VER): New unspecs.
4652 (elem_bits): Handle x2 and x4 structure modes, plus VNx1TI.
4653 (Vetype, Vesize, VPRED): Handle VNx1TI.
4654 (b): New mode attribute.
4655 (SME_LD1, SME_READ, SME_ST1, SME_WRITE, SME_BINARY_SDI, SME_INT_MOP)
4656 (SME_FP_MOP): New int iterators.
4657 (optab): Handle SME unspecs.
4658 (hv): New int attribute.
4659 * config/aarch64/aarch64.md (*add<mode>3_aarch64): Handle ADDSVL
4661 * config/aarch64/aarch64-sme.md (UNSPEC_SME_LDR): New unspec.
4662 (@aarch64_sme_<optab><mode>, @aarch64_sme_<optab><mode>_plus)
4663 (aarch64_sme_ldr0, @aarch64_sme_ldrn<mode>): New patterns.
4664 (UNSPEC_SME_STR): New unspec.
4665 (@aarch64_sme_<optab><mode>, @aarch64_sme_<optab><mode>_plus)
4666 (aarch64_sme_str0, @aarch64_sme_strn<mode>): New patterns.
4667 (@aarch64_sme_<optab><v_int_container><mode>): Likewise.
4668 (*aarch64_sme_<optab><v_int_container><mode>_plus): Likewise.
4669 (@aarch64_sme_<optab><VNx1TI_ONLY:mode><SVE_FULL:mode>): Likewise.
4670 (@aarch64_sme_<optab><v_int_container><mode>): Likewise.
4671 (*aarch64_sme_<optab><v_int_container><mode>_plus): Likewise.
4672 (@aarch64_sme_<optab><VNx1TI_ONLY:mode><SVE_FULL:mode>): Likewise.
4673 (UNSPEC_SME_ZERO): New unspec.
4674 (aarch64_sme_zero): New pattern.
4675 (@aarch64_sme_<SME_BINARY_SDI:optab><mode>): Likewise.
4676 (@aarch64_sme_<SME_INT_MOP:optab><mode>): Likewise.
4677 (@aarch64_sme_<SME_FP_MOP:optab><mode>): Likewise.
4678 * config/aarch64/aarch64-sve-builtins.def: Add ZA type suffixes.
4679 Include aarch64-sve-builtins-sme.def.
4680 (DEF_SME_ZA_FUNCTION): New macro.
4681 * config/aarch64/aarch64-sve-builtins.h (CP_READ_ZA): New call
4683 (CP_WRITE_ZA): Likewise.
4684 (PRED_za_m): New predication type.
4685 (type_suffix_index): Handle DEF_SME_ZA_SUFFIX.
4686 (type_suffix_info): Add vector_p and za_p fields.
4687 (function_instance::num_za_tiles): New member function.
4688 (function_builder::get_attributes): Add an aarch64_feature_flags
4690 (function_expander::get_contiguous_base): Take a base argument
4691 number, a vnum argument number, and an argument that indicates
4692 whether the vnum parameter is a factor of the SME vector length
4693 or the prevailing vector length.
4694 (function_expander::add_integer_operand): Take a poly_int64.
4695 (sve_switcher::sve_switcher): Take a base set of flags.
4696 (sme_switcher): New class.
4697 (scalar_types): Add a null entry for NUM_VECTOR_TYPES.
4698 * config/aarch64/aarch64-sve-builtins.cc: Include
4699 aarch64-sve-builtins-sme.h.
4700 (pred_suffixes): Add an entry for PRED_za_m.
4701 (type_suffixes): Initialize vector_p and za_p. Handle ZA suffixes.
4702 (TYPES_all_za, TYPES_d_za, TYPES_za_bhsd_data, TYPES_za_all_data)
4703 (TYPES_za_s_integer, TYPES_za_d_integer, TYPES_mop_base)
4704 (TYPES_mop_base_signed, TYPES_mop_base_unsigned, TYPES_mop_i16i64)
4705 (TYPES_mop_i16i64_signed, TYPES_mop_i16i64_unsigned, TYPES_za): New
4707 (preds_m, preds_za_m): New predication lists.
4708 (function_groups): Handle DEF_SME_ZA_FUNCTION.
4709 (scalar_types): Add an entry for NUM_VECTOR_TYPES.
4710 (find_type_suffix_for_scalar_type): Check positively for vectors
4711 rather than negatively for predicates.
4712 (check_required_extensions): Handle PSTATE.SM and PSTATE.ZA
4714 (report_out_of_range): Handle the case where the minimum and
4715 maximum are the same.
4716 (function_instance::reads_global_state_p): Return true for functions
4718 (function_instance::modifies_global_state_p): Return true for functions
4720 (sve_switcher::sve_switcher): Add a base flags argument.
4721 (function_builder::get_name): Handle "__arm_" prefixes.
4722 (add_attribute): Add an overload that takes a namespaces.
4723 (add_shared_state_attribute): New function.
4724 (function_builder::get_attributes): Take the required feature flags
4725 as argument. Add streaming and ZA attributes where appropriate.
4726 (function_builder::add_unique_function): Update calls accordingly.
4727 (function_resolver::check_gp_argument): Assert that the predication
4728 isn't ZA _m predication.
4729 (function_checker::function_checker): Don't bias the argument
4730 number for ZA _m predication.
4731 (function_expander::get_contiguous_base): Add arguments that
4732 specify the base argument number, the vnum argument number,
4733 and an argument that indicates whether the vnum parameter is
4734 a factor of the SME vector length or the prevailing vector length.
4735 Handle the SME case.
4736 (function_expander::add_input_operand): Handle pmode_register_operand.
4737 (function_expander::add_integer_operand): Take a poly_int64.
4738 (init_builtins): Call handle_arm_sme_h for LTO.
4739 (handle_arm_sve_h): Skip SME intrinsics.
4740 (handle_arm_sme_h): New function.
4741 * config/aarch64/aarch64-sve-builtins-functions.h
4742 (read_write_za, write_za): New classes.
4743 (unspec_based_sme_function, za_arith_function): New using aliases.
4744 (quiet_za_arith_function): Likewise.
4745 * config/aarch64/aarch64-sve-builtins-shapes.h
4746 (binary_za_int_m, binary_za_m, binary_za_uint_m, bool_inherent)
4747 (inherent_za, inherent_mask_za, ldr_za, load_za, read_za_m, store_za)
4748 (str_za, unary_za_m, write_za_m): Declare.
4749 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
4750 Expect za_m functions to have an existing governing predicate.
4751 (binary_za_m_base, binary_za_int_m_def, binary_za_m_def): New classes.
4752 (binary_za_uint_m_def, bool_inherent_def, inherent_za_def): Likewise.
4753 (inherent_mask_za_def, ldr_za_def, load_za_def, read_za_m_def)
4754 (store_za_def, str_za_def, unary_za_m_def, write_za_m_def): Likewise.
4755 * config/aarch64/arm_sme.h: New file.
4756 * config/aarch64/aarch64-sve-builtins-sme.h: Likewise.
4757 * config/aarch64/aarch64-sve-builtins-sme.cc: Likewise.
4758 * config/aarch64/aarch64-sve-builtins-sme.def: Likewise.
4759 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
4760 aarch64-sve-builtins-sme.def and aarch64-sve-builtins-sme.h.
4761 (aarch64-sve-builtins-sme.o): New rule.
4763 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4765 * config/aarch64/aarch64-sve-builtins.h
4766 (function_shape::has_merge_argument_p): New member function.
4767 * config/aarch64/aarch64-sve-builtins.cc:
4768 (function_resolver::check_gp_argument): Use it.
4769 (function_expander::get_fallback_value): Likewise.
4770 * config/aarch64/aarch64-sve-builtins-shapes.cc
4771 (apply_predication): Likewise.
4772 (unary_convert_narrowt_def::has_merge_argument_p): New function.
4774 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4776 * config/aarch64/aarch64-sve-builtins-functions.h
4777 (unspec_based_function_base): Allow type suffix 1 to determine
4778 the mode of the operation.
4779 (unspec_based_function): Update accordingly.
4780 (unspec_based_fused_function): Likewise.
4781 (unspec_based_fused_lane_function): Likewise.
4783 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4785 * config/aarch64/aarch64-modes.def: Add VNx1TI.
4787 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4789 * config/aarch64/aarch64.h (W12_W15_REGNUM_P): New macro.
4790 (W12_W15_REGS): New register class.
4791 (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Add entries for it.
4792 * config/aarch64/aarch64.cc (aarch64_regno_regclass)
4793 (aarch64_class_max_nregs, aarch64_register_move_cost): Handle
4796 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4798 * config/aarch64/aarch64-isa-modes.def (ZA_ON): New ISA mode.
4799 * config/aarch64/aarch64-protos.h (aarch64_rdsvl_immediate_p)
4800 (aarch64_output_rdsvl, aarch64_optimize_mode_switching)
4801 (aarch64_restore_za): Declare.
4802 * config/aarch64/constraints.md (UsR): New constraint.
4803 * config/aarch64/aarch64.md (LOWERING_REGNUM, TPIDR_BLOCK_REGNUM)
4804 (SME_STATE_REGNUM, TPIDR2_SETUP_REGNUM, ZA_FREE_REGNUM)
4805 (ZA_SAVED_REGNUM, ZA_REGNUM, FIRST_FAKE_REGNUM): New constants.
4806 (LAST_FAKE_REGNUM): Likewise.
4807 (UNSPEC_SAVE_NZCV, UNSPEC_RESTORE_NZCV, UNSPEC_SME_VQ): New unspecs.
4809 (arch_enabled): Handle it.
4810 (*cb<optab><mode>1): Rename to...
4811 (aarch64_cb<optab><mode>1): ...this.
4812 (*movsi_aarch64): Add an alternative for RDSVL.
4813 (*movdi_aarch64): Likewise.
4814 (aarch64_save_nzcv, aarch64_restore_nzcv): New insns.
4815 * config/aarch64/aarch64-sme.md (UNSPEC_SMSTOP_ZA)
4816 (UNSPEC_INITIAL_ZERO_ZA, UNSPEC_TPIDR2_SAVE, UNSPEC_TPIDR2_RESTORE)
4817 (UNSPEC_READ_TPIDR2, UNSPEC_WRITE_TPIDR2, UNSPEC_SETUP_LOCAL_TPIDR2)
4818 (UNSPEC_RESTORE_ZA, UNSPEC_START_PRIVATE_ZA_CALL): New unspecs.
4819 (UNSPEC_END_PRIVATE_ZA_CALL, UNSPEC_COMMIT_LAZY_SAVE): Likewise.
4820 (UNSPECV_ASM_UPDATE_ZA): New unspecv.
4821 (aarch64_tpidr2_save, aarch64_smstart_za, aarch64_smstop_za)
4822 (aarch64_initial_zero_za, aarch64_setup_local_tpidr2)
4823 (aarch64_clear_tpidr2, aarch64_write_tpidr2, aarch64_read_tpidr2)
4824 (aarch64_tpidr2_restore, aarch64_restore_za, aarch64_asm_update_za)
4825 (aarch64_start_private_za_call, aarch64_end_private_za_call)
4826 (aarch64_commit_lazy_save): New patterns.
4827 * config/aarch64/aarch64.h (AARCH64_ISA_ZA_ON, TARGET_ZA): New macros.
4828 (FIXED_REGISTERS, REGISTER_NAMES): Add the new fake ZA registers.
4829 (CALL_USED_REGISTERS): Replace with...
4830 (CALL_REALLY_USED_REGISTERS): ...this and add the fake ZA registers.
4831 (FIRST_PSEUDO_REGISTER): Bump to include the fake ZA registers.
4832 (FAKE_REGS): New register class.
4833 (REG_CLASS_NAMES): Update accordingly.
4834 (REG_CLASS_CONTENTS): Likewise.
4835 (machine_function::tpidr2_block): New member variable.
4836 (machine_function::tpidr2_block_ptr): Likewise.
4837 (machine_function::za_save_buffer): Likewise.
4838 (machine_function::next_asm_update_za_id): Likewise.
4839 (CUMULATIVE_ARGS::shared_za_flags): Likewise.
4840 (aarch64_mode_entity, aarch64_local_sme_state): New enums.
4841 (aarch64_tristate_mode): Likewise.
4842 (OPTIMIZE_MODE_SWITCHING, NUM_MODES_FOR_MODE_SWITCHING): Define.
4843 * config/aarch64/aarch64.cc (AARCH64_STATE_SHARED, AARCH64_STATE_IN)
4844 (AARCH64_STATE_OUT): New constants.
4845 (aarch64_attribute_shared_state_flags): New function.
4846 (aarch64_lookup_shared_state_flags, aarch64_fndecl_has_new_state)
4847 (aarch64_check_state_string, cmp_string_csts): Likewise.
4848 (aarch64_merge_string_arguments, aarch64_check_arm_new_against_type)
4849 (handle_arm_new, handle_arm_shared): Likewise.
4850 (handle_arm_new_za_attribute): New
4851 (aarch64_arm_attribute_table): Add new, preserves, in, out, and inout.
4852 (aarch64_hard_regno_nregs): Handle FAKE_REGS.
4853 (aarch64_hard_regno_mode_ok): Likewise.
4854 (aarch64_fntype_shared_flags, aarch64_fntype_pstate_za): New functions.
4855 (aarch64_fntype_isa_mode): Include aarch64_fntype_pstate_za.
4856 (aarch64_fndecl_has_state, aarch64_fndecl_pstate_za): New functions.
4857 (aarch64_fndecl_isa_mode): Include aarch64_fndecl_pstate_za.
4858 (aarch64_cfun_incoming_pstate_za, aarch64_cfun_shared_flags)
4859 (aarch64_cfun_has_new_state, aarch64_cfun_has_state): New functions.
4860 (aarch64_sme_vq_immediate, aarch64_sme_vq_unspec_p): Likewise.
4861 (aarch64_rdsvl_immediate_p, aarch64_output_rdsvl): Likewise.
4862 (aarch64_expand_mov_immediate): Handle RDSVL immediates.
4863 (aarch64_function_arg): Add the ZA sharing flags as a third limb
4865 (aarch64_init_cumulative_args): Record the ZA sharing flags.
4866 (aarch64_extra_live_on_entry): New function. Handle the new
4867 ZA-related fake registers.
4868 (aarch64_epilogue_uses): Handle the new ZA-related fake registers.
4869 (aarch64_cannot_force_const_mem): Handle UNSPEC_SME_VQ constants.
4870 (aarch64_get_tpidr2_block, aarch64_get_tpidr2_ptr): New functions.
4871 (aarch64_init_tpidr2_block, aarch64_restore_za): Likewise.
4872 (aarch64_layout_frame): Check whether the current function creates
4873 new ZA state. Record that it clobbers LR if so.
4874 (aarch64_expand_prologue): Handle functions that create new ZA state.
4875 (aarch64_expand_epilogue): Likewise.
4876 (aarch64_create_tpidr2_block): New function.
4877 (aarch64_restore_za): Likewise.
4878 (aarch64_start_call_args): Disallow calls to shared-ZA functions
4879 from functions that have no ZA state. Emit a marker instruction
4880 before calls to private-ZA functions from functions that have
4882 (aarch64_expand_call): Add return registers for state that is
4883 managed via attributes. Record the use and clobber information
4884 for the ZA registers.
4885 (aarch64_end_call_args): New function.
4886 (aarch64_regno_regclass): Handle FAKE_REGS.
4887 (aarch64_class_max_nregs): Likewise.
4888 (aarch64_override_options_internal): Require TARGET_SME for
4889 functions that have ZA state.
4890 (aarch64_conditional_register_usage): Handle FAKE_REGS.
4891 (aarch64_mov_operand_p): Handle RDSVL immediates.
4892 (aarch64_comp_type_attributes): Check that the ZA sharing flags
4894 (aarch64_merge_decl_attributes): New function.
4895 (aarch64_optimize_mode_switching, aarch64_mode_emit_za_save_buffer)
4896 (aarch64_mode_emit_local_sme_state, aarch64_mode_emit): Likewise.
4897 (aarch64_insn_references_sme_state_p): Likewise.
4898 (aarch64_mode_needed_local_sme_state): Likewise.
4899 (aarch64_mode_needed_za_save_buffer, aarch64_mode_needed): Likewise.
4900 (aarch64_mode_after_local_sme_state, aarch64_mode_after): Likewise.
4901 (aarch64_local_sme_confluence, aarch64_mode_confluence): Likewise.
4902 (aarch64_one_shot_backprop, aarch64_local_sme_backprop): Likewise.
4903 (aarch64_mode_backprop, aarch64_mode_entry): Likewise.
4904 (aarch64_mode_exit, aarch64_mode_eh_handler): Likewise.
4905 (aarch64_mode_priority, aarch64_md_asm_adjust): Likewise.
4906 (TARGET_END_CALL_ARGS, TARGET_MERGE_DECL_ATTRIBUTES): Define.
4907 (TARGET_MODE_EMIT, TARGET_MODE_NEEDED, TARGET_MODE_AFTER): Likewise.
4908 (TARGET_MODE_CONFLUENCE, TARGET_MODE_BACKPROP): Likewise.
4909 (TARGET_MODE_ENTRY, TARGET_MODE_EXIT): Likewise.
4910 (TARGET_MODE_EH_HANDLER, TARGET_MODE_PRIORITY): Likewise.
4911 (TARGET_EXTRA_LIVE_ON_ENTRY): Likewise.
4912 (TARGET_MD_ASM_ADJUST): Use aarch64_md_asm_adjust.
4913 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
4914 Define __arm_new, __arm_preserves,__arm_in, __arm_out, and __arm_inout.
4916 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4918 * config/aarch64/aarch64-passes.def
4919 (pass_late_thread_prologue_and_epilogue): New pass.
4920 * config/aarch64/aarch64-sme.md: New file.
4921 * config/aarch64/aarch64.md: Include it.
4922 (*tb<optab><mode>1): Rename to...
4923 (@aarch64_tb<optab><mode>): ...this.
4924 (call, call_value, sibcall, sibcall_value): Don't require operand 2
4926 * config/aarch64/aarch64-protos.h (aarch64_emit_call_insn): Return
4928 (make_pass_switch_sm_state): Declare.
4929 * config/aarch64/aarch64.h (TARGET_STREAMING_COMPATIBLE): New macro.
4930 (CALL_USED_REGISTER): Mark VG as call-preserved.
4931 (aarch64_frame::old_svcr_offset): New member variable.
4932 (machine_function::call_switches_sm_state): Likewise.
4933 (CUMULATIVE_ARGS::num_sme_mode_switch_args): Likewise.
4934 (CUMULATIVE_ARGS::sme_mode_switch_args): Likewise.
4935 * config/aarch64/aarch64.cc: Include tree-pass.h and cfgbuild.h.
4936 (aarch64_cfun_incoming_pstate_sm): New function.
4937 (aarch64_call_switches_pstate_sm): Likewise.
4938 (aarch64_reg_save_mode): Return DImode for VG_REGNUM.
4939 (aarch64_callee_isa_mode): New function.
4940 (aarch64_insn_callee_isa_mode): Likewise.
4941 (aarch64_guard_switch_pstate_sm): Likewise.
4942 (aarch64_switch_pstate_sm): Likewise.
4943 (aarch64_sme_mode_switch_regs): New class.
4944 (aarch64_record_sme_mode_switch_args): New function.
4945 (aarch64_finish_sme_mode_switch_args): Likewise.
4946 (aarch64_function_arg): Handle the end marker by returning a
4947 PARALLEL that contains the ABI cookie that we used previously
4948 alongside the result of aarch64_finish_sme_mode_switch_args.
4949 (aarch64_init_cumulative_args): Initialize num_sme_mode_switch_args.
4950 (aarch64_function_arg_advance): If a call would switch SM state,
4951 record all argument registers that would need to be saved around
4953 (aarch64_need_old_pstate_sm): New function.
4954 (aarch64_layout_frame): Decide whether the frame needs to store the
4955 incoming value of PSTATE.SM and allocate a save slot for it if so.
4956 If a function switches SME state, arrange to save the old value
4957 of the DWARF VG register. Handle the case where this is the only
4958 register save slot above the FP.
4959 (aarch64_save_callee_saves): Handles saves of the DWARF VG register.
4960 (aarch64_get_separate_components): Prevent such saves from being
4962 (aarch64_old_svcr_mem): New function.
4963 (aarch64_read_old_svcr): Likewise.
4964 (aarch64_guard_switch_pstate_sm): Likewise.
4965 (aarch64_expand_prologue): Handle saves of the DWARF VG register.
4966 Initialize any SVCR save slot.
4967 (aarch64_expand_call): Allow the cookie to be PARALLEL that contains
4968 both the UNSPEC_CALLEE_ABI value and a list of registers that need
4969 to be preserved across a change to PSTATE.SM. If the call does
4970 involve such a change to PSTATE.SM, record the registers that
4971 would be clobbered by this process. Also emit an instruction
4972 to mark the temporary change in VG. Update call_switches_pstate_sm.
4973 (aarch64_emit_call_insn): Return the emitted instruction.
4974 (aarch64_frame_pointer_required): New function.
4975 (aarch64_conditional_register_usage): Prevent VG_REGNUM from being
4976 treated as a register operand.
4977 (aarch64_switch_pstate_sm_for_call): New function.
4978 (pass_data_switch_pstate_sm): New pass variable.
4979 (pass_switch_pstate_sm): New pass class.
4980 (make_pass_switch_pstate_sm): New function.
4981 (TARGET_FRAME_POINTER_REQUIRED): Define.
4982 * config/aarch64/t-aarch64 (s-check-sve-md): Add aarch64-sme.md.
4984 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4986 * config/aarch64/aarch64.h (TARGET_NON_STREAMING): New macro.
4987 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Use it.
4988 (TARGET_SVE2_SHA3, TARGET_SVE2_SM4): Likewise.
4989 * config/aarch64/aarch64-sve-builtins-base.def: Separate out
4990 the functions that require PSTATE.SM to be 0 and guard them
4991 with AARCH64_FL_SM_OFF.
4992 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
4993 * config/aarch64/aarch64-sve-builtins.cc (check_required_extensions):
4994 Enforce AARCH64_FL_SM_OFF requirements.
4995 * config/aarch64/aarch64-sve.md (aarch64_wrffr): Require
4996 TARGET_NON_STREAMING
4997 (aarch64_rdffr, aarch64_rdffr_z, *aarch64_rdffr_z_ptest): Likewise.
4998 (*aarch64_rdffr_ptest, *aarch64_rdffr_z_cc, *aarch64_rdffr_cc)
4999 (@aarch64_ld<fn>f1<mode>): Likewise.
5000 (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>)
5001 (gather_load<mode><v_int_container>): Likewise
5002 (mask_gather_load<mode><v_int_container>): Likewise.
5003 (mask_gather_load<mode><v_int_container>): Likewise.
5004 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
5005 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
5006 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
5007 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>)
5008 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
5009 <SVE_2BHSI:mode>): Likewise.
5010 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
5011 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked)
5012 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
5013 <SVE_2BHSI:mode>_sxtw): Likewise.
5014 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
5015 <SVE_2BHSI:mode>_uxtw): Likewise.
5016 (@aarch64_ldff1_gather<mode>, @aarch64_ldff1_gather<mode>): Likewise.
5017 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
5018 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
5019 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
5020 <VNx4_NARROW:mode>): Likewise.
5021 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
5022 <VNx2_NARROW:mode>): Likewise.
5023 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
5024 <VNx2_NARROW:mode>_sxtw): Likewise.
5025 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
5026 <VNx2_NARROW:mode>_uxtw): Likewise.
5027 (@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx4SI_ONLY:mode>)
5028 (@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>)
5029 (*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_sxtw)
5030 (*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_uxtw)
5031 (scatter_store<mode><v_int_container>): Likewise.
5032 (mask_scatter_store<mode><v_int_container>): Likewise.
5033 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
5034 (*mask_scatter_store<mode><v_int_container>_sxtw): Likewise.
5035 (*mask_scatter_store<mode><v_int_container>_uxtw): Likewise.
5036 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
5037 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
5038 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
5039 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
5040 (@aarch64_sve_ld1ro<mode>, @aarch64_adr<mode>): Likewise.
5041 (*aarch64_adr_sxtw, *aarch64_adr_uxtw_unspec): Likewise.
5042 (*aarch64_adr_uxtw_and, @aarch64_adr<mode>_shift): Likewise.
5043 (*aarch64_adr<mode>_shift, *aarch64_adr_shift_sxtw): Likewise.
5044 (*aarch64_adr_shift_uxtw, @aarch64_sve_add_<optab><vsi2qi>): Likewise.
5045 (@aarch64_sve_<sve_fp_op><mode>, fold_left_plus_<mode>): Likewise.
5046 (mask_fold_left_plus_<mode>, @aarch64_sve_compact<mode>): Likewise.
5047 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>)
5048 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
5049 <SVE_PARTIAL_I:mode>): Likewise.
5050 (@aarch64_sve2_histcnt<mode>, @aarch64_sve2_histseg<mode>): Likewise.
5051 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
5052 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
5053 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
5054 * config/aarch64/iterators.md (SVE_FP_UNARY_INT): Make FEXPA
5055 depend on TARGET_NON_STREAMING.
5056 (SVE_BFLOAT_TERNARY_LONG): Likewise BFMMLA.
5058 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5060 * config/aarch64/aarch64.h (TARGET_BASE_SIMD): New macro.
5061 (TARGET_SIMD): Require PSTATE.SM to be 0.
5062 (AARCH64_ISA_SM_OFF): New macro.
5063 * config/aarch64/aarch64.cc (aarch64_array_mode_supported_p):
5064 Allow Advanced SIMD structure modes for TARGET_BASE_SIMD.
5065 (aarch64_print_operand): Support '%Z'.
5066 (aarch64_secondary_reload): Expect SVE moves to be used for
5067 Advanced SIMD modes if SVE is enabled and non-streaming
5068 Advanced SIMD isn't.
5069 (aarch64_register_move_cost): Likewise.
5070 (aarch64_simd_container_mode): Extend Advanced SIMD mode
5071 handling to TARGET_BASE_SIMD.
5072 (aarch64_expand_cpymem): Expand commentary.
5073 * config/aarch64/aarch64.md (arches): Add base_simd and nobase_simd.
5074 (arch_enabled): Handle it.
5075 (*mov<mode>_aarch64): Extend UMOV alternative to TARGET_BASE_SIMD.
5076 (*movti_aarch64): Use an SVE move instruction if non-streaming
5077 SIMD isn't available.
5078 (*mov<TFD:mode>_aarch64): Likewise.
5079 (load_pair_dw_tftf): Extend to TARGET_BASE_SIMD.
5080 (store_pair_dw_tftf): Likewise.
5081 (loadwb_pair<TX:mode>_<P:mode>): Likewise.
5082 (storewb_pair<TX:mode>_<P:mode>): Likewise.
5083 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
5084 Allow UMOV in streaming mode.
5085 (*aarch64_simd_mov<VQMOV:mode>): Use an SVE move instruction
5086 if non-streaming SIMD isn't available.
5087 (aarch64_store_lane0<mode>): Depend on TARGET_FLOAT rather than
5089 (aarch64_simd_mov_from_<mode>low): Likewise. Use fmov if
5090 Advanced SIMD is completely disabled.
5091 (aarch64_simd_mov_from_<mode>high): Use SVE EXT instructions if
5092 non-streaming SIMD isn't available.
5094 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5096 * doc/invoke.texi: Document SME.
5097 * doc/sourcebuild.texi: Document aarch64_sve.
5098 * config/aarch64/aarch64-option-extensions.def (sme): Define.
5099 * config/aarch64/aarch64.h (AARCH64_ISA_SME): New macro.
5100 (TARGET_SME): Likewise.
5101 * config/aarch64/aarch64.cc (aarch64_override_options_internal):
5102 Ensure that SME is present when compiling streaming code.
5104 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5106 * config/aarch64/aarch64-isa-modes.def: New file.
5107 * config/aarch64/aarch64.h: Include it in the feature enumerations.
5108 (AARCH64_FL_SM_STATE, AARCH64_FL_ISA_MODES): New constants.
5109 (AARCH64_FL_DEFAULT_ISA_MODE): Likewise.
5110 (AARCH64_ISA_MODE): New macro.
5111 (CUMULATIVE_ARGS): Add an isa_mode field.
5112 * config/aarch64/aarch64-protos.h (aarch64_gen_callee_cookie): Declare.
5113 (aarch64_tlsdesc_abi_id): Return an arm_pcs.
5114 * config/aarch64/aarch64.cc (attr_streaming_exclusions)
5115 (aarch64_gnu_attributes, aarch64_gnu_attribute_table)
5116 (aarch64_arm_attributes, aarch64_arm_attribute_table): New tables.
5117 (aarch64_attribute_table): Redefine to include the gnu and arm
5119 (aarch64_fntype_pstate_sm, aarch64_fntype_isa_mode): New functions.
5120 (aarch64_fndecl_pstate_sm, aarch64_fndecl_isa_mode): Likewise.
5121 (aarch64_gen_callee_cookie, aarch64_callee_abi): Likewise.
5122 (aarch64_insn_callee_cookie, aarch64_insn_callee_abi): Use them.
5123 (aarch64_function_arg, aarch64_output_mi_thunk): Likewise.
5124 (aarch64_init_cumulative_args): Initialize the isa_mode field.
5125 (aarch64_output_mi_thunk): Use aarch64_gen_callee_cookie to get
5127 (aarch64_override_options): Add the ISA mode to the feature set.
5128 (aarch64_temporary_target::copy_from_fndecl): Likewise.
5129 (aarch64_fndecl_options, aarch64_handle_attr_arch): Likewise.
5130 (aarch64_set_current_function): Maintain the correct ISA mode.
5131 (aarch64_tlsdesc_abi_id): Return an arm_pcs.
5132 (aarch64_comp_type_attributes): Handle arm::streaming and
5133 arm::streaming_compatible.
5134 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
5135 Define __arm_streaming and __arm_streaming_compatible.
5136 * config/aarch64/aarch64.md (tlsdesc_small_<mode>): Use
5137 aarch64_gen_callee_cookie to get the ABI cookie.
5138 * config/aarch64/t-aarch64 (TM_H): Add all feature-related .def files.
5140 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5142 * config/aarch64/aarch64-sve-builtins-base.cc
5143 (svreinterpret_impl::fold): Punt on tuple forms.
5144 (svreinterpret_impl::expand): Use tuple_mode instead of vector_mode.
5145 * config/aarch64/aarch64-sve-builtins-base.def (svreinterpret):
5146 Extend to x1234 groups.
5147 * config/aarch64/aarch64-sve-builtins-functions.h
5148 (multi_vector_function::vectors_per_tuple): If the function has
5149 a group suffix, get the number of vectors from there.
5150 * config/aarch64/aarch64-sve-builtins-shapes.h (reinterpret): Declare.
5151 * config/aarch64/aarch64-sve-builtins-shapes.cc (reinterpret_def)
5152 (reinterpret): New function shape.
5153 * config/aarch64/aarch64-sve-builtins.cc (function_groups): Handle
5154 DEF_SVE_FUNCTION_GS.
5155 * config/aarch64/aarch64-sve-builtins.def (DEF_SVE_FUNCTION_GS): New
5157 (DEF_SVE_FUNCTION): Forward to DEF_SVE_FUNCTION_GS by default.
5158 * config/aarch64/aarch64-sve-builtins.h
5159 (function_instance::tuple_mode): New member function.
5160 (function_base::vectors_per_tuple): Take the function instance
5161 as argument and get the number from the group suffix.
5162 (function_instance::vectors_per_tuple): Update accordingly.
5163 * config/aarch64/iterators.md (SVE_FULLx2, SVE_FULLx3, SVE_FULLx4)
5164 (SVE_ALL_STRUCT): New mode iterators.
5165 (SVE_STRUCT): Redefine in terms of SVE_FULL*.
5166 * config/aarch64/aarch64-sve.md (@aarch64_sve_reinterpret<mode>)
5167 (*aarch64_sve_reinterpret<mode>): Extend to SVE structure modes.
5169 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5171 * config/aarch64/aarch64-sve-builtins.cc
5172 (function_resolver::require_derived_vector_type): Add a specific
5173 error message for the case in which the caller wants a single
5174 vector whose element type matches a previous tuyple argument.
5176 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5178 * config/aarch64/aarch64-sve-builtins.h
5179 (function_resolver::lookup_form): Add an overload that takes
5180 an sve_type rather than type and group suffixes.
5181 (function_resolver::resolve_to): Likewise.
5182 (function_resolver::infer_vector_or_tuple_type): Return an sve_type.
5183 (function_resolver::infer_tuple_type): Likewise.
5184 (function_resolver::require_matching_vector_type): Take an sve_type
5185 rather than a type_suffix_index.
5186 (function_resolver::require_derived_vector_type): Likewise.
5187 * config/aarch64/aarch64-sve-builtins.cc (num_vectors_to_group):
5189 (function_resolver::lookup_form): Add an overload that takes
5190 an sve_type rather than type and group suffixes.
5191 (function_resolver::resolve_to): Likewise.
5192 (function_resolver::infer_vector_or_tuple_type): Return an sve_type.
5193 (function_resolver::infer_tuple_type): Likewise.
5194 (function_resolver::infer_vector_type): Update accordingly.
5195 (function_resolver::require_matching_vector_type): Take an sve_type
5196 rather than a type_suffix_index.
5197 (function_resolver::require_derived_vector_type): Likewise.
5198 * config/aarch64/aarch64-sve-builtins-shapes.cc (get_def::resolve)
5199 (set_def::resolve, store_def::resolve, tbl_tuple_def::resolve): Update
5202 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5204 * config/aarch64/aarch64-sve-builtins.h
5205 (function_resolver::require_matching_vector_type): Add a parameter
5206 that specifies the number of the earlier argument that is being
5208 * config/aarch64/aarch64-sve-builtins.cc
5209 (function_resolver::require_matching_vector_type): Likewise.
5210 (require_derived_vector_type): Update calls accordingly.
5211 (function_resolver::resolve_unary): Likewise.
5212 (function_resolver::resolve_uniform): Likewise.
5213 (function_resolver::resolve_uniform_opt_n): Likewise.
5214 * config/aarch64/aarch64-sve-builtins-shapes.cc
5215 (binary_long_lane_def::resolve): Likewise.
5216 (clast_def::resolve, ternary_uint_def::resolve): Likewise.
5218 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5220 * config/aarch64/aarch64-sve-builtins.h
5221 (function_resolver::infer_sve_type): New member function.
5222 (function_resolver::report_incorrect_num_vectors): Likewise.
5223 * config/aarch64/aarch64-sve-builtins.cc
5224 (function_resolver::infer_sve_type): New function,.
5225 (function_resolver::report_incorrect_num_vectors): New function,
5227 (function_resolver::infer_vector_or_tuple_type): ...here. Use
5230 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5232 * config/aarch64/aarch64-sve-builtins.h (sve_type): New struct.
5233 (sve_type::operator==): New function.
5234 (function_resolver::get_vector_type): Delete.
5235 (function_resolver::report_no_such_form): Take an sve_type rather
5236 than a type_suffix_index.
5237 * config/aarch64/aarch64-sve-builtins.cc (get_vector_type): New
5239 (function_resolver::get_vector_type): Delete.
5240 (function_resolver::report_no_such_form): Take an sve_type rather
5241 than a type_suffix_index.
5242 (find_sve_type): New function, split out from...
5243 (function_resolver::infer_vector_or_tuple_type): ...here.
5245 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5247 * config/aarch64/aarch64-sve-builtins-shapes.cc (build_one): Take
5248 a group suffix index parameter.
5249 (build_32_64, build_all): Update accordingly. Iterate over all
5251 * config/aarch64/aarch64-sve-builtins-sve2.cc (svqrshl_impl::fold)
5252 (svqshl_impl::fold, svrshl_impl::fold): Update function_instance
5254 * config/aarch64/aarch64-sve-builtins.cc (group_suffixes): New array.
5255 (groups_none): New constant.
5256 (function_groups): Initialize the groups field.
5257 (function_instance::hash): Hash the group index.
5258 (function_builder::get_name): Add the group suffix.
5259 (function_builder::add_overloaded_functions): Iterate over all
5261 (function_resolver::lookup_form): Take a group suffix parameter.
5262 (function_resolver::resolve_to): Likewise.
5263 * config/aarch64/aarch64-sve-builtins.def (DEF_SVE_GROUP_SUFFIX): New
5265 (x2, x3, x4): New group suffixes.
5266 * config/aarch64/aarch64-sve-builtins.h (group_suffix_index): New enum.
5267 (group_suffix_info): New structure.
5268 (function_group_info::groups): New member variable.
5269 (function_instance::group_suffix_id): Likewise.
5270 (group_suffixes): New array.
5271 (function_instance::operator==): Compare the group suffixes.
5272 (function_instance::group_suffix): New function.
5274 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5276 * config/aarch64/aarch64-sve-builtins.cc (function_groups): Remove
5277 implied requirement on SVE.
5278 * config/aarch64/aarch64-sve-builtins-base.def: Explicitly require SVE.
5279 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
5281 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5283 * config/aarch64/aarch64-protos.h (aarch64_sve_rdvl_immediate_p)
5284 (aarch64_output_sve_rdvl): Declare.
5285 * config/aarch64/aarch64.cc (aarch64_sve_cnt_factor_p): New
5286 function, split out from...
5287 (aarch64_sve_cnt_immediate_p): ...here.
5288 (aarch64_sve_rdvl_factor_p): New function.
5289 (aarch64_sve_rdvl_immediate_p): Likewise.
5290 (aarch64_output_sve_rdvl): Likewise.
5291 (aarch64_offset_temporaries): Rewrite the SVE handling to use RDVL
5293 (aarch64_expand_mov_immediate): Handle RDVL immediates.
5294 (aarch64_mov_operand_p): Likewise.
5295 * config/aarch64/constraints.md (Usr): New constraint.
5296 * config/aarch64/aarch64.md (*mov<SHORT:mode>_aarch64): Add an RDVL
5298 (*movsi_aarch64, *movdi_aarch64): Likewise.
5300 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5302 * config/aarch64/aarch64-sve-builtins.h:
5303 (function_checker::require_immediate_lane_index): Add an argument
5304 for the index of the indexed vector argument.
5305 * config/aarch64/aarch64-sve-builtins.cc
5306 (function_checker::require_immediate_lane_index): Likewise.
5307 * config/aarch64/aarch64-sve-builtins-shapes.cc
5308 (ternary_bfloat_lane_base::check): Update accordingly.
5309 (ternary_qq_lane_base::check): Likewise.
5310 (binary_lane_def::check): Likewise.
5311 (binary_long_lane_def::check): Likewise.
5312 (ternary_lane_def::check): Likewise.
5313 (ternary_lane_rotate_def::check): Likewise.
5314 (ternary_long_lane_def::check): Likewise.
5315 (ternary_qq_lane_rotate_def::check): Likewise.
5317 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5319 * target.def (md_asm_adjust): Add a uses parameter.
5320 * doc/tm.texi: Regenerate.
5321 * cfgexpand.cc (expand_asm_loc): Update call to md_asm_adjust.
5322 Handle any USEs created by the target.
5323 (expand_asm_stmt): Likewise.
5324 * recog.cc (asm_noperands): Handle asms with USEs.
5325 (decode_asm_operands): Likewise.
5326 * config/arm/aarch-common-protos.h (arm_md_asm_adjust): Add uses
5328 * config/arm/aarch-common.cc (arm_md_asm_adjust): Likewise.
5329 * config/arm/arm.cc (thumb1_md_asm_adjust): Likewise.
5330 * config/avr/avr.cc (avr_md_asm_adjust): Likewise.
5331 * config/cris/cris.cc (cris_md_asm_adjust): Likewise.
5332 * config/i386/i386.cc (ix86_md_asm_adjust): Likewise.
5333 * config/mn10300/mn10300.cc (mn10300_md_asm_adjust): Likewise.
5334 * config/nds32/nds32.cc (nds32_md_asm_adjust): Likewise.
5335 * config/pdp11/pdp11.cc (pdp11_md_asm_adjust): Likewise.
5336 * config/rs6000/rs6000.cc (rs6000_md_asm_adjust): Likewise.
5337 * config/s390/s390.cc (s390_md_asm_adjust): Likewise.
5338 * config/vax/vax.cc (vax_md_asm_adjust): Likewise.
5339 * config/visium/visium.cc (visium_md_asm_adjust): Likewise.
5341 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5343 * doc/tm.texi.in: Add TARGET_START_CALL_ARGS.
5344 * doc/tm.texi: Regenerate.
5345 * target.def (start_call_args): New hook.
5346 (call_args, end_call_args): Add a parameter for the cumulative
5347 argument information.
5348 * hooks.h (hook_void_rtx_tree): Delete.
5349 * hooks.cc (hook_void_rtx_tree): Likewise.
5350 * targhooks.h (hook_void_CUMULATIVE_ARGS): Declare.
5351 (hook_void_CUMULATIVE_ARGS_rtx_tree): Likewise.
5352 * targhooks.cc (hook_void_CUMULATIVE_ARGS): New function.
5353 (hook_void_CUMULATIVE_ARGS_rtx_tree): Likewise.
5354 * calls.cc (expand_call): Call start_call_args before computing
5355 and storing stack parameters. Pass the cumulative argument
5356 information to call_args and end_call_args.
5357 (emit_library_call_value_1): Likewise.
5358 * config/nvptx/nvptx.cc (nvptx_call_args): Add a cumulative
5360 (nvptx_end_call_args): Likewise.
5362 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5364 * doc/tm.texi.in: Add TARGET_EMIT_EPILOGUE_FOR_SIBCALL.
5365 * doc/tm.texi: Regenerate.
5366 * target.def (emit_epilogue_for_sibcall): New hook.
5367 * calls.cc (can_implement_as_sibling_call_p): Use it.
5368 * function.cc (thread_prologue_and_epilogue_insns): Likewise.
5369 (reposition_prologue_and_epilogue_notes): Likewise.
5370 * config/aarch64/aarch64-protos.h (aarch64_expand_epilogue): Take
5371 an rtx_call_insn * rather than a bool.
5372 * config/aarch64/aarch64.cc (aarch64_expand_epilogue): Likewise.
5373 (TARGET_EMIT_EPILOGUE_FOR_SIBCALL): Define.
5374 * config/aarch64/aarch64.md (epilogue): Update call.
5375 (sibcall_epilogue): Delete.
5377 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5379 * target.def (use_late_prologue_epilogue): New hook.
5380 * doc/tm.texi.in: Add TARGET_USE_LATE_PROLOGUE_EPILOGUE.
5381 * doc/tm.texi: Regenerate.
5382 * passes.def (pass_late_thread_prologue_and_epilogue): New pass.
5383 * tree-pass.h (make_pass_late_thread_prologue_and_epilogue): Declare.
5384 * function.cc (pass_thread_prologue_and_epilogue::gate): New function.
5385 (pass_data_late_thread_prologue_and_epilogue): New pass variable.
5386 (pass_late_thread_prologue_and_epilogue): New pass class.
5387 (make_pass_late_thread_prologue_and_epilogue): New function.
5389 2023-12-05 Kito Cheng <kito.cheng@sifive.com>
5391 * common/config/riscv/riscv-common.cc
5392 (riscv_subset_list::check_conflict_ext): Check zcd conflicts
5395 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5397 PR rtl-optimization/112278
5398 * lra-int.h (lra_update_biggest_mode): New function.
5399 * lra-coalesce.cc (merge_pseudos): Use it.
5400 * lra-lives.cc (process_bb_lives): Likewise.
5401 * lra.cc (new_insn_reg): Likewise.
5403 2023-12-05 Jakub Jelinek <jakub@redhat.com>
5405 PR tree-optimization/112843
5406 * gimple-lower-bitint.cc (gimple_lower_bitint): Change lhs of stmt
5407 to lhs2 before building and inserting lhs = (cast) lhs2; assignment.
5408 Adjust stmt operands before adjusting lhs.
5410 2023-12-05 xuli <xuli1@eswincomputing.com>
5412 * config/riscv/riscv-v.cc (sew64_scalar_helper): Bugfix.
5414 2023-12-05 Jakub Jelinek <jakub@redhat.com>
5417 * config/i386/sse.md ((eq (eq (lshiftrt x elt_bits-1) 0) 0)): New
5418 splitter to turn psrld $31; pcmpeq; pcmpeq into psrad $31.
5420 2023-12-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5422 * config/riscv/autovec.md: Add blocker.
5423 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_p): New function.
5424 * config/riscv/riscv-v.cc (gather_scatter_valid_offset_p): Ditto.
5426 2023-12-05 Richard Biener <rguenther@suse.de>
5428 PR tree-optimization/112827
5429 PR tree-optimization/112848
5430 * tree-scalar-evolution.cc (final_value_replacement_loop):
5431 Compute the insert location for each insert.
5433 2023-12-05 liuhongt <hongtao.liu@intel.com>
5435 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
5436 Count sse_reg/gpr_regs for components not loaded from memory.
5437 (ix86_vector_costs:ix86_vector_costs): New constructor.
5438 (ix86_vector_costs::m_num_gpr_needed[3]): New private memeber.
5439 (ix86_vector_costs::m_num_sse_needed[3]): Ditto.
5440 (ix86_vector_costs::finish_cost): Estimate overall register
5442 (ix86_vector_costs::ix86_vect_estimate_reg_pressure): New
5445 2023-12-05 liuhongt <hongtao.liu@intel.com>
5447 * config/i386/sse.md (udot_prodv64qi): New expander.
5448 (udot_prod<mode>): Emulates with VEC_UNPACKU_EXPR +
5449 DOT_PROD (short, int).
5451 2023-12-05 Marek Polacek <polacek@redhat.com>
5455 * doc/invoke.texi: Document -fno-immediate-escalation.
5457 2023-12-04 Andrew Pinski <quic_apinski@quicinc.com>
5459 * match.pd (zero_one_valued_p): For convert
5460 make sure type is not a signed 1-bit integer.
5462 2023-12-04 Jeff Law <jlaw@ventanamicro.com>
5464 * config/microblaze/microblaze.md (movhi): Use %i for half-word
5465 loads to properly select between lhu/lhui.
5467 2023-12-04 Robin Dapp <rdapp@ventanamicro.com>
5469 * config/riscv/riscv-string.cc (expand_rawmemchr): Increment
5470 source address by vl * element_size.
5472 2023-12-04 Robin Dapp <rdapp@ventanamicro.com>
5474 * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum):
5476 (enum stringop_strategy_enum): ... to this.
5477 * config/riscv/riscv-string.cc (riscv_expand_block_move): New
5478 wrapper expander handling the strategies and delegation.
5479 (riscv_expand_block_move_scalar): Rename function and make
5481 (expand_block_move): Remove strategy handling.
5482 * config/riscv/riscv.md: Call expander wrapper.
5483 * config/riscv/riscv.opt: Rename.
5485 2023-12-04 Richard Biener <rguenther@suse.de>
5487 PR middle-end/112785
5488 * function.h (get_new_clique): New inline function handling
5489 last_clique overflow.
5490 * cfgrtl.cc (duplicate_insn_chain): Use it.
5491 * tree-cfg.cc (gimple_duplicate_bb): Likewise.
5492 * tree-inline.cc (remap_dependence_clique): Likewise.
5494 2023-12-04 Christoph Müllner <christoph.muellner@vrull.eu>
5497 * doc/invoke.texi: Document riscv-strcmp-inline-limit.
5499 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5502 * config/riscv/vector.md: Fix incorrect overlap in v0.
5504 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5507 * config/riscv/vector.md: Add highest-number overlap support.
5509 2023-12-04 Richard Biener <rguenther@suse.de>
5511 PR tree-optimization/112818
5512 * tree-vect-stmts.cc (vectorizable_bswap): Check input and
5513 output vector types have the same size.
5515 2023-12-04 Richard Biener <rguenther@suse.de>
5517 PR tree-optimization/112827
5518 * tree-scalar-evolution.cc (final_value_replacement_loop):
5519 Do not release SSA name but keep a dead initialization around.
5521 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5524 * config/riscv/vector.md: Remove earlyclobber from widen reduction.
5526 2023-12-04 Indu Bhagat <indu.bhagat@oracle.com>
5529 * btfout.cc (btf_asm_type): Fixup ctti_name for all
5530 BTF types of kind BTF_KIND_FUNC_PROTO.
5532 2023-12-04 Indu Bhagat <indu.bhagat@oracle.com>
5535 * btfout.cc (get_btf_type_name): New definition.
5536 (btf_collect_datasec): Update dtd_name to the original type name
5538 (btf_asm_type_ref): Use the new get_btf_type_name function
5540 (btf_asm_type): Likewise.
5541 (btf_asm_func_type): Likewise.
5543 2023-12-04 Jakub Jelinek <jakub@redhat.com>
5546 * config/i386/i386.cc (ix86_elim_entry_set_got): Before checking
5547 for UNSPEC_SET_GOT check that SET_SRC is UNSPEC. Use SET_SRC and
5548 SET_DEST macros instead of XEXP, rename vec variable to set.
5550 2023-12-04 Jakub Jelinek <jakub@redhat.com>
5553 * config/i386/sse.md (signbit<mode>2): Force operands[1] into a REG.
5555 2023-12-04 Feng Wang <wangfeng@eswincomputing.com>
5557 * common/config/riscv/riscv-common.cc: Add zvkb ISA info.
5558 * config/riscv/riscv.opt: Add Mask(ZVKB)
5560 2023-12-04 Fei Gao <gaofei@eswincomputing.com>
5561 Xiao Zeng <zengxiao@eswincomputing.com>
5563 * config/riscv/riscv.md (*mov<GPR:mode><X:mode>cc):move to sfb.md
5564 * config/riscv/sfb.md: New file.
5566 2023-12-04 Kito Cheng <kito.cheng@sifive.com>
5568 * config/riscv/riscv-cores.def: Add sifive-x280.
5569 * doc/invoke.texi (RISC-V Options): Add sifive-x280
5571 2023-12-04 Kito Cheng <kito.cheng@sifive.com>
5573 * common/config/riscv/riscv-common.cc (riscv_implied_predicator_t): New.
5574 (riscv_implied_info_t::riscv_implied_info_t): New.
5575 (riscv_implied_info_t::match): New.
5576 (riscv_implied_info): New entry for zcf.
5577 (riscv_subset_list::handle_implied_ext): Use
5578 riscv_implied_info_t::match.
5579 (riscv_subset_list::check_implied_ext): Ditto.
5580 (riscv_subset_list::handle_combine_ext): Ditto.
5581 (riscv_subset_list::parse): Move zcf implication handling to
5582 riscv_implied_infos.
5584 2023-12-04 Kito Cheng <kito.cheng@sifive.com>
5586 * common/config/riscv/riscv-common.cc
5587 (riscv_subset_list::check_conflict_ext): New.
5588 (riscv_subset_list::parse): Move checking conflict ext. to
5590 * config/riscv/riscv-subset.h:
5591 Add riscv_subset_list::check_conflict_ext.
5593 2023-12-04 Hu, Lin1 <lin1.hu@intel.com>
5595 * common/config/i386/cpuinfo.h (get_available_features): Move USER_MSR
5596 to the correct location.
5598 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5600 * config/riscv/riscv.md: Rostify the constraints.
5602 2023-12-04 chenxiaolong <chenxiaolong@loongson.cn>
5604 * doc/extend.texi: Add information about the intrinsic function of the vector
5607 2023-12-03 Jakub Jelinek <jakub@redhat.com>
5609 PR middle-end/112807
5610 * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
5611 When choosing type0 and type1 types, if prec3 has small/middle bitint
5612 kind, use maximum of type0 and type1's precision instead of prec3.
5614 2023-12-03 Jeff Law <jlaw@ventanamicro.com>
5616 * config/frv/frv.h (TRANSFER_FROM_TRAMPOLINE): Add prototype for exit.
5618 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
5620 * attribs.cc (comp_type_attributes): Pass the full TREE_PURPOSE
5621 to lookup_attribute_spec, rather than just the name.
5622 (remove_attributes_matching): Likewise.
5624 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
5626 * attribs.cc (find_same_attribute): New function.
5627 (decl_attributes, comp_type_attributes): Use it when looking
5628 up one list's attributes in another list.
5630 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
5632 * Makefile.in (GTFILES): Add attribs.cc.
5633 * attribs.cc (gnu_namespace_cache): New variable.
5634 (get_gnu_namespace): New function.
5635 (lookup_attribute_spec): Use it instead of get_identifier ("gnu").
5636 (get_attribute_namespace, attribs_cc_tests): Likewise.
5638 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
5640 * attribs.h (scoped_attribute_specs): New structure.
5641 (register_scoped_attributes): Take a reference to a
5642 scoped_attribute_specs instead of separate namespace and array
5644 * plugin.h (register_scoped_attributes): Likewise.
5645 * attribs.cc (register_scoped_attributes): Likewise.
5646 (attribute_tables): Change into an array of scoped_attribute_specs
5647 pointers. Reduce to 1 element for frontends and 1 element for targets.
5648 (empty_attribute_table): Delete.
5649 (check_attribute_tables): Update for changes to attribute_tables.
5650 Use a hash_set to identify duplicates.
5651 (handle_ignored_attributes_option): Update for above changes.
5652 (init_attributes): Likewise.
5653 (excl_pair): Delete.
5654 (test_attribute_exclusions): Update for above changes. Don't
5655 enforce symmetry for standard attributes in the top-level namespace.
5656 * langhooks-def.h (LANG_HOOKS_COMMON_ATTRIBUTE_TABLE): Delete.
5657 (LANG_HOOKS_FORMAT_ATTRIBUTE_TABLE): Likewise.
5658 (LANG_HOOKS_INITIALIZER): Update accordingly.
5659 (LANG_HOOKS_ATTRIBUTE_TABLE): Define to an empty constructor.
5660 * langhooks.h (lang_hooks::common_attribute_table): Delete.
5661 (lang_hooks::format_attribute_table): Likewise.
5662 (lang_hooks::attribute_table): Redefine to an array of
5663 scoped_attribute_specs pointers.
5664 * target-def.h (TARGET_GNU_ATTRIBUTES): New macro.
5665 * target.def (attribute_spec): Redefine to return an array of
5666 scoped_attribute_specs pointers.
5667 * tree-inline.cc (function_attribute_inlinable_p): Update accordingly.
5668 * doc/tm.texi: Regenerate.
5669 * config/aarch64/aarch64.cc (aarch64_attribute_table): Define using
5670 TARGET_GNU_ATTRIBUTES.
5671 * config/alpha/alpha.cc (vms_attribute_table): Likewise.
5672 * config/avr/avr.cc (avr_attribute_table): Likewise.
5673 * config/bfin/bfin.cc (bfin_attribute_table): Likewise.
5674 * config/bpf/bpf.cc (bpf_attribute_table): Likewise.
5675 * config/csky/csky.cc (csky_attribute_table): Likewise.
5676 * config/epiphany/epiphany.cc (epiphany_attribute_table): Likewise.
5677 * config/gcn/gcn.cc (gcn_attribute_table): Likewise.
5678 * config/h8300/h8300.cc (h8300_attribute_table): Likewise.
5679 * config/loongarch/loongarch.cc (loongarch_attribute_table): Likewise.
5680 * config/m32c/m32c.cc (m32c_attribute_table): Likewise.
5681 * config/m32r/m32r.cc (m32r_attribute_table): Likewise.
5682 * config/m68k/m68k.cc (m68k_attribute_table): Likewise.
5683 * config/mcore/mcore.cc (mcore_attribute_table): Likewise.
5684 * config/microblaze/microblaze.cc (microblaze_attribute_table):
5686 * config/mips/mips.cc (mips_attribute_table): Likewise.
5687 * config/msp430/msp430.cc (msp430_attribute_table): Likewise.
5688 * config/nds32/nds32.cc (nds32_attribute_table): Likewise.
5689 * config/nvptx/nvptx.cc (nvptx_attribute_table): Likewise.
5690 * config/riscv/riscv.cc (riscv_attribute_table): Likewise.
5691 * config/rl78/rl78.cc (rl78_attribute_table): Likewise.
5692 * config/rx/rx.cc (rx_attribute_table): Likewise.
5693 * config/s390/s390.cc (s390_attribute_table): Likewise.
5694 * config/sh/sh.cc (sh_attribute_table): Likewise.
5695 * config/sparc/sparc.cc (sparc_attribute_table): Likewise.
5696 * config/stormy16/stormy16.cc (xstormy16_attribute_table): Likewise.
5697 * config/v850/v850.cc (v850_attribute_table): Likewise.
5698 * config/visium/visium.cc (visium_attribute_table): Likewise.
5699 * config/arc/arc.cc (arc_attribute_table): Likewise. Move further
5701 * config/arm/arm.cc (arm_attribute_table): Update for above changes,
5703 (arm_gnu_attributes, arm_gnu_attribute_table): ...these new globals.
5704 * config/i386/i386-options.h (ix86_attribute_table): Delete.
5705 (ix86_gnu_attribute_table): Declare.
5706 * config/i386/i386-options.cc (ix86_attribute_table): Replace with...
5707 (ix86_gnu_attributes, ix86_gnu_attribute_table): ...these two globals.
5708 * config/i386/i386.cc (ix86_attribute_table): Define as an array of
5709 scoped_attribute_specs pointers.
5710 * config/ia64/ia64.cc (ia64_attribute_table): Update for above changes,
5712 (ia64_gnu_attributes, ia64_gnu_attribute_table): ...these new globals.
5713 * config/rs6000/rs6000.cc (rs6000_attribute_table): Update for above
5715 (rs6000_gnu_attributes, rs6000_gnu_attribute_table): ...these new
5718 2023-12-02 Roger Sayle <roger@nextmovesoftware.com>
5720 * config/riscv/riscv-vsetvl.cc (csetvl_info::parse_insn): Rename
5721 local variable from demand_flags to dflags, to avoid conflicting
5722 with (enumeration) type of the same name.
5724 2023-12-02 Li Wei <liwei@loongson.cn>
5726 * config/loongarch/loongarch.cc (loongarch_is_odd_extraction):
5727 Supplementary function prototype.
5728 (loongarch_is_even_extraction): Adjust.
5729 (loongarch_try_expand_lsx_vshuf_const): Adjust.
5730 (loongarch_is_extraction_permutation): Adjust.
5731 (loongarch_expand_vec_perm_const_2): Adjust.
5733 2023-12-02 Li Wei <liwei@loongson.cn>
5735 * config/loongarch/loongarch.md (v2di): Used to simplify the
5736 following templates.
5737 (popcount<mode>2): New.
5739 2023-12-02 Li Wei <liwei@loongson.cn>
5741 * config/loongarch/loongarch.h (CTZ_DEFINED_VALUE_AT_ZERO): Add
5743 (CLZ_DEFINED_VALUE_AT_ZERO): Remove duplicate definition.
5745 2023-12-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5748 * config/riscv/vector.md: Add !TARGET_64BIT.
5750 2023-12-02 Pan Li <pan2.li@intel.com>
5753 * config/riscv/riscv.cc (riscv_legitimize_move): Take the
5754 exist (U *mode) and handle DFmode like DImode when EEW is
5757 2023-12-01 Andrew MacLeod <amacleod@redhat.com>
5759 * gimple-range-fold.h (range_compatible_p): Relocate.
5760 * value-range.h (range_compatible_p): Here.
5761 * range-op-mixed.h (operand_equal::operand_check_p): Call
5762 range_compatible_p rather than comparing precision.
5763 (operand_not_equal::operand_check_p): Ditto.
5764 (operand_not_lt::operand_check_p): Ditto.
5765 (operand_not_le::operand_check_p): Ditto.
5766 (operand_not_gt::operand_check_p): Ditto.
5767 (operand_not_ge::operand_check_p): Ditto.
5768 (operand_plus::operand_check_p): Ditto.
5769 (operand_abs::operand_check_p): Ditto.
5770 (operand_minus::operand_check_p): Ditto.
5771 (operand_negate::operand_check_p): Ditto.
5772 (operand_mult::operand_check_p): Ditto.
5773 (operand_bitwise_not::operand_check_p): Ditto.
5774 (operand_bitwise_xor::operand_check_p): Ditto.
5775 (operand_bitwise_and::operand_check_p): Ditto.
5776 (operand_bitwise_or::operand_check_p): Ditto.
5777 (operand_min::operand_check_p): Ditto.
5778 (operand_max::operand_check_p): Ditto.
5779 * range-op.cc (operand_lshift::operand_check_p): Ditto.
5780 (operand_rshift::operand_check_p): Ditto.
5781 (operand_logical_and::operand_check_p): Ditto.
5782 (operand_logical_or::operand_check_p): Ditto.
5783 (operand_logical_not::operand_check_p): Ditto.
5785 2023-12-01 Vladimir N. Makarov <vmakarov@redhat.com>
5788 * lra.h (lra): Add one more arg.
5789 * lra-int.h (lra_verbose, lra_dump_insns): New externals.
5790 (lra_dump_insns_if_possible): Ditto.
5791 * lra.cc (lra_dump_insns): Dump all insns.
5792 (lra_dump_insns_if_possible): Dump all insns for lra_verbose >= 7.
5793 (lra_verbose): New global.
5794 (lra): Add new arg. Setup lra_verbose from its value.
5795 * lra-assigns.cc (lra_split_hard_reg_for): Dump insns if rtl
5797 * lra-remat.cc (lra_remat): Dump insns if rtl was changed.
5798 * lra-constraints.cc (lra_inheritance): Dump insns.
5799 (lra_constraints, lra_undo_inheritance): Dump insns if rtl
5801 (remove_inheritance_pseudos): Use restore reg if it is set up.
5802 * ira.cc: (lra): Pass internal_flag_ira_verbose.
5804 2023-12-01 Jakub Jelinek <jakub@redhat.com>
5806 * doc/extend.texi (__builtin_addc, __builtin_addcl, __builtin_addcll,
5807 __builtin_subc, __builtin_subcl, __builtin_subcll,
5808 __builtin_stdc_bit_width, __builtin_stdc_count_ones,
5809 __builtin_stdc_count_zeros, __builtin_stdc_first_leading_one,
5810 __builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one,
5811 __builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit,
5812 __builtin_stdc_leading_ones, __builtin_stdc_leading_zeros,
5813 __builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros,
5814 __builtin_nvptx_brev, __builtin_nvptx_brevll, __builtin_darn,
5815 __builtin_darn_raw, __builtin_ia32_vec_ext_v2di,
5816 __builtin_ia32_crc32qi, __builtin_ia32_crc32hi,
5817 __builtin_ia32_crc32si, __builtin_ia32_crc32di): Put {}s around
5818 return type with spaces in it.
5819 (__builtin_rx_mvfachi, __builtin_rx_mvfacmi): Remove superfluous
5822 2023-12-01 David Malcolm <dmalcolm@redhat.com>
5824 * diagnostic-core.h (emit_diagnostic_valist): New overload decl.
5825 * diagnostic-format-sarif.cc (sarif_builder::make_result_object):
5826 When we have metadata, call its maybe_add_sarif_properties vfunc.
5827 * diagnostic-metadata.h (class sarif_object): Forward decl.
5828 (diagnostic_metadata::~diagnostic_metadata): New.
5829 (diagnostic_metadata::maybe_add_sarif_properties): New vfunc.
5830 * diagnostic.cc (emit_diagnostic_valist): New overload.
5832 2023-12-01 David Malcolm <dmalcolm@redhat.com>
5835 * doc/extend.texi: Remove stray reference to
5836 -fanalyzer-checker=taint.
5838 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5841 * config/riscv/vector.md: Support highpart overlap for vx/vf.
5843 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5846 * config/riscv/vector.md: Support highpart overlap for indexed load.
5848 2023-12-01 Richard Biener <rguenther@suse.de>
5850 * tree-vectorizer.h (vect_get_vec_defs): Re-order arguments.
5851 * tree-vect-stmts.cc (vect_get_vec_defs): Likewise.
5852 (vectorizable_condition): Update caller.
5853 (vectorizable_comparison_1): Likewise.
5854 (vectorizable_conversion): Specify the vector type to be
5855 used for invariant/external defs.
5856 * tree-vect-loop.cc (vect_transform_reduction): Update caller.
5858 2023-12-01 Jakub Jelinek <jakub@redhat.com>
5860 PR middle-end/112770
5861 * gimple-lower-bitint.cc (gimple_lower_bitint): When adjusting
5862 lhs of middle _BitInt setter which ends bb, insert cast on
5863 the fallthru edge rather than after stmt.
5865 2023-12-01 Jakub Jelinek <jakub@redhat.com>
5867 PR middle-end/112771
5868 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr):
5869 Use mp = 1 if it is zero.
5871 2023-12-01 Jose E. Marchesi <jose.marchesi@oracle.com>
5873 * config/bpf/bpf.cc (bpf_asm_named_section): New function.
5874 (TARGET_ASM_NAMED_SECTION): Set to bpf_asm_named_section.
5876 2023-12-01 Di Zhao <dizhao@os.amperecomputing.com>
5878 * config/aarch64/aarch64-tuning-flags.def
5879 (AARCH64_EXTRA_TUNING_OPTION): New tuning option to avoid
5881 * config/aarch64/aarch64.cc
5882 (aarch64_override_options_internal): Set
5883 param_avoid_fma_max_bits according to tuning option.
5884 * config/aarch64/tuning_models/ampere1.h (ampere1_tunings):
5885 Modify tunings related with FMA.
5886 * config/aarch64/tuning_models/ampere1a.h (ampere1a_tunings):
5888 * config/aarch64/tuning_models/ampere1b.h (ampere1b_tunings):
5891 2023-12-01 Richard Sandiford <richard.sandiford@arm.com>
5893 * config/aarch64/aarch64-sve-builtins.h
5894 (function_expander::result_mode): New member function.
5895 * config/aarch64/aarch64-sve-builtins-base.cc
5896 (svld234_impl::expand): Use it.
5897 * config/aarch64/aarch64-sve-builtins.cc
5898 (function_expander::get_reg_target): Likewise.
5900 2023-12-01 Jakub Jelinek <jakub@redhat.com>
5902 * gimple-lower-bitint.cc (range_to_prec): Don't return -1 for
5904 (bitint_large_huge::lower_addsub_overflow): Fix up computation of
5906 (bitint_large_huge::lower_mul_overflow): Likewise.
5908 2023-12-01 Jakub Jelinek <jakub@redhat.com>
5910 * gimple-lower-bitint.cc (bitint_large_huge::finish_arith_overflow):
5911 When replacing use_stmt which is gsi_stmt (m_gsi), update m_gsi to
5914 2023-12-01 Jakub Jelinek <jakub@redhat.com>
5916 PR middle-end/112750
5917 * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
5918 Use NE_EXPR rather than EQ_EXPR for g2 if !single_comparison and
5919 adjust probabilities.
5921 2023-12-01 Xi Ruoyao <xry111@xry111.site>
5923 * doc/install.texi: Deem srcdir == objdir broken, but objdir
5924 as a subdirectory of srcdir fine.
5926 2023-12-01 Juergen Christ <jchrist@linux.ibm.com>
5929 * config/s390/s390.cc (s390_md_asm_adjust): Return after dealing
5930 with the outputs, if no further processing of long doubles is
5933 2023-12-01 Jakub Jelinek <jakub@redhat.com>
5936 * config/s390/s390.cc (s390_invalid_arg_for_unprototyped_fn): Return
5937 NULL for __builtin_classify_type calls with vector arguments.
5939 2023-12-01 Florian Weimer <fweimer@redhat.com>
5941 * doc/invoke.texi (Warning Options): Document
5942 -Wdeclaration-missing-parameter-type.
5944 2023-12-01 Florian Weimer <fweimer@redhat.com>
5946 * doc/invoke.texi (Warning Options): Document changes.
5948 2023-12-01 Florian Weimer <fweimer@redhat.com>
5950 * doc/invoke.texi (Warning Options): Document that
5951 -Wreturn-mismatch is a permerror in C99 and later.
5953 2023-12-01 Florian Weimer <fweimer@redhat.com>
5957 * doc/invoke.texi (Warning Options): Document changes.
5959 2023-12-01 Florian Weimer <fweimer@redhat.com>
5961 * doc/invoke.texi (Warning Options): Document changes.
5963 2023-12-01 Florian Weimer <fweimer@redhat.com>
5965 * doc/invoke.texi (Warning Options): Document changes.
5967 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5970 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::pre_global_vsetvl_info): Fix ratio.
5972 2023-11-30 Wilco Dijkstra <wilco.dijkstra@arm.com>
5975 * config/aarch64/aarch64.cc (aarch64_split_compare_and_swap):
5976 For 128-bit store the loaded value and loop if needed.
5978 2023-11-30 Wilco Dijkstra <wilco.dijkstra@arm.com>
5981 * config/aarch64/aarch64.md (cpymemdi): Remove pattern condition.
5982 (setmemdi): Likewise.
5983 * config/aarch64/aarch64.cc (aarch64_expand_cpymem): Support
5984 strict-align. Cleanup condition for using MOPS.
5985 (aarch64_expand_setmem): Likewise.
5987 2023-11-30 Richard Biener <rguenther@suse.de>
5989 PR tree-optimization/112767
5990 * tree-scalar-evolution.cc (final_value_replacement_loop):
5991 Propagate constants to immediate uses immediately.
5993 2023-11-30 Richard Biener <rguenther@suse.de>
5995 PR tree-optimization/112766
5996 * gimple-predicate-analysis.cc (find_var_cmp_const):
5997 Support continuing the iteration and report every candidate.
5998 (uninit_analysis::overlap): Iterate over all flag var
6001 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6004 * config/riscv/vector.md: Add widening overlap of vf2/vf4.
6006 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6009 * config/riscv/vector.md: Remove earlyclobber for wx/wf instructions.
6011 2023-11-30 Jakub Jelinek <jakub@redhat.com>
6013 PR middle-end/112733
6014 * wide-int.cc (wi::mul_internal): Don't allocate twice as much
6015 space for u, v and r as needed.
6016 (divmod_internal_2): Change return type from void to int, for n == 1
6017 return 1, otherwise before writing b_dividend into b_remainder set
6018 n to MIN (n, m) and at the end return it.
6019 (wi::divmod_internal): Don't allocate 4 times as much space for
6020 b_quotient, b_remainder, b_dividend and b_divisor. Set n to
6021 result of divmod_internal_2.
6022 (wide_int_cc_tests): Add test for unsigned widest_int
6023 wi::multiple_of_p of 1 and -128.
6025 2023-11-30 liuhongt <hongtao.liu@intel.com>
6027 * config/i386/sse.md (sdot_prodv64qi): New expander.
6028 (sseunpackmodelower): New mode attr.
6029 (sdot_prod<mode>): Emulate sdot_prodv*qi with sodt_prov*hi
6030 when TARGET_VNNIINT8 is not available.
6032 2023-11-30 liuhongt <hongtao.liu@intel.com>
6034 * config/i386/sse.md: (reduc_plus_scal_<mode>): Use
6035 vec_extract_lo instead of subreg.
6036 (reduc_<code>_scal_<mode>): Ditto.
6037 (reduc_<code>_scal_<mode>): Ditto.
6038 (reduc_<code>_scal_<mode>): Ditto.
6039 (reduc_<code>_scal_<mode>): Ditto.
6041 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6044 * config/riscv/vector.md: Add widenning overlap.
6046 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6048 * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): Fix constraint.
6049 * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Rename vconstraint into group_overlap.
6051 (none,W21,W42,W84,W43,W86,W87): Ditto.
6052 * config/riscv/vector.md: Ditto.
6054 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6056 * config/riscv/vector.md: Support highpart overlap for vext.vf2
6058 2023-11-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
6060 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add ampere-1b
6061 * config/aarch64/aarch64-cost-tables.h: Add ampere1b_extra_costs
6062 * config/aarch64/aarch64-tune.md: Regenerate
6063 * config/aarch64/aarch64.cc: Include ampere1b tuning model
6064 * doc/invoke.texi: Document -mcpu=ampere1b
6065 * config/aarch64/tuning_models/ampere1b.h: New file.
6067 2023-11-29 David Faust <david.faust@oracle.com>
6069 * config/bpf/bpf.h (ASM_COMMENT_START): Change from ';' to '#'.
6071 2023-11-29 Jakub Jelinek <jakub@redhat.com>
6074 * config/rs6000/rs6000.cc (invalid_arg_for_unprototyped_fn): Return
6075 NULL for __builtin_classify_type calls with vector arguments.
6077 2023-11-29 Andrew MacLeod <amacleod@redhat.com>
6079 PR tree-optimization/111922
6080 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Check the
6081 operands are valid before calling fold_range.
6083 2023-11-29 Andrew MacLeod <amacleod@redhat.com>
6085 * range-op-mixed.h (operator_equal::operand_check_p): New.
6086 (operator_not_equal::operand_check_p): New.
6087 (operator_lt::operand_check_p): New.
6088 (operator_le::operand_check_p): New.
6089 (operator_gt::operand_check_p): New.
6090 (operator_ge::operand_check_p): New.
6091 (operator_plus::operand_check_p): New.
6092 (operator_abs::operand_check_p): New.
6093 (operator_minus::operand_check_p): New.
6094 (operator_negate::operand_check_p): New.
6095 (operator_mult::operand_check_p): New.
6096 (operator_bitwise_not::operand_check_p): New.
6097 (operator_bitwise_xor::operand_check_p): New.
6098 (operator_bitwise_and::operand_check_p): New.
6099 (operator_bitwise_or::operand_check_p): New.
6100 (operator_min::operand_check_p): New.
6101 (operator_max::operand_check_p): New.
6102 * range-op.cc (range_op_handler::fold_range): Check operand
6104 (range_op_handler::op1_range): Ditto.
6105 (range_op_handler::op2_range): Ditto.
6106 (range_op_handler::operand_check_p): New.
6107 (range_operator::operand_check_p): New.
6108 (operator_lshift::operand_check_p): New.
6109 (operator_rshift::operand_check_p): New.
6110 (operator_logical_and::operand_check_p): New.
6111 (operator_logical_or::operand_check_p): New.
6112 (operator_logical_not::operand_check_p): New.
6113 * range-op.h (range_operator::operand_check_p): New.
6114 (range_op_handler::operand_check_p): New.
6116 2023-11-29 Martin Jambor <mjambor@suse.cz>
6118 PR tree-optimization/112711
6119 PR tree-optimization/112721
6120 * tree-sra.cc (build_access_from_call_arg): New parameter
6121 CAN_BE_RETURNED, disqualify any candidate passed by reference if it is
6122 true. Adjust leading comment.
6123 (scan_function): Pass appropriate value to CAN_BE_RETURNED of
6124 build_access_from_call_arg.
6126 2023-11-29 Thomas Schwinge <thomas@codesourcery.com>
6128 * doc/sourcebuild.texi (Final Actions): Document
6129 'only_for_offload_target' wrapper.
6131 2023-11-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
6134 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
6135 attributes): Document cfi.
6137 2023-11-29 Richard Biener <rguenther@suse.de>
6139 PR middle-end/110237
6140 * internal-fn.cc (expand_partial_load_optab_fn): Clear
6141 MEM_EXPR and MEM_OFFSET.
6142 (expand_partial_store_optab_fn): Likewise.
6144 2023-11-29 Jakub Jelinek <jakub@redhat.com>
6146 PR middle-end/112733
6147 * fold-const.cc (multiple_of_p): Pass SIGNED rather than
6148 UNSIGNED for wi::multiple_of_p on widest_int arguments.
6150 2023-11-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6151 kito-cheng <kito.cheng@sifive.com>
6152 kito-cheng <kito.cheng@gmail.com>
6155 * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): New register filters.
6156 * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Ditto.
6158 * config/riscv/vector.md: Support highpart register overlap for vwcvt.
6160 2023-11-29 xuli <xuli1@eswincomputing.com>
6162 * config/riscv/riscv.cc (riscv_option_override): Eliminate warning.
6164 2023-11-29 Jakub Jelinek <jakub@redhat.com>
6167 * fold-mem-offsets.cc (get_uses): Ignore DEBUG_INSN uses. Otherwise,
6168 punt if use is in a different basic block from INSN or appears before
6169 INSN in the same basic block. Formatting fixes.
6170 (get_single_def_in_bb): Formatting fixes.
6171 (fold_offsets_1, pass_fold_mem_offsets::execute): Comment formatting
6174 2023-11-29 Xi Ruoyao <xry111@xry111.site>
6176 * config/loongarch/simd.md (LSX_SCALAR_FRINT): New int iterator.
6177 (VLSX_FOR_FMODE): New mode attribute.
6178 (<simd_for_scalar_frint_pattern><mode>2): New expander,
6179 expanding to vreplvei.{w/d} + frint{rp/rz/rm/rne}.{s.d}.
6181 2023-11-29 Xi Ruoyao <xry111@xry111.site>
6183 * config/loongarch/loongarch.md (lrint_allow_inexact): Remove.
6184 (<lrint_pattern><ANYF:mode><ANYFI:mode>2): Check if <LRINT>
6185 == UNSPEC_FTINT instead of <lrint_allow_inexact>.
6187 2023-11-29 Xi Ruoyao <xry111@xry111.site>
6189 * config/loongarch/lsx.md (bitimm): Move to ...
6190 (UNSPEC_LSX_VROTR): Remove.
6191 (lsx_vrotr_<lsxfmt>): Remove.
6192 (lsx_vrotri_<lsxfmt>): Remove.
6193 * config/loongarch/lasx.md (UNSPEC_LASX_XVROTR): Remove.
6194 (lsx_vrotr_<lsxfmt>): Remove.
6195 (lsx_vrotri_<lsxfmt>): Remove.
6196 * config/loongarch/simd.md (bitimm): ... here. Expand it to
6198 (vrotr<mode>3): New define_insn.
6199 (vrotri<mode>3): New define_insn.
6200 * config/loongarch/loongarch-builtins.cc:
6201 (CODE_FOR_lsx_vrotr_b): Use standard pattern name.
6202 (CODE_FOR_lsx_vrotr_h): Likewise.
6203 (CODE_FOR_lsx_vrotr_w): Likewise.
6204 (CODE_FOR_lsx_vrotr_d): Likewise.
6205 (CODE_FOR_lasx_xvrotr_b): Likewise.
6206 (CODE_FOR_lasx_xvrotr_h): Likewise.
6207 (CODE_FOR_lasx_xvrotr_w): Likewise.
6208 (CODE_FOR_lasx_xvrotr_d): Likewise.
6209 (CODE_FOR_lsx_vrotri_b): Define to standard pattern name.
6210 (CODE_FOR_lsx_vrotri_h): Likewise.
6211 (CODE_FOR_lsx_vrotri_w): Likewise.
6212 (CODE_FOR_lsx_vrotri_d): Likewise.
6213 (CODE_FOR_lasx_xvrotri_b): Likewise.
6214 (CODE_FOR_lasx_xvrotri_h): Likewise.
6215 (CODE_FOR_lasx_xvrotri_w): Likewise.
6216 (CODE_FOR_lasx_xvrotri_d): Likewise.
6218 2023-11-29 Xi Ruoyao <xry111@xry111.site>
6220 * config/loongarch/simd.md (muh): New code attribute mapping
6221 any_extend to smul_highpart or umul_highpart.
6222 (<su>mul<mode>3_highpart): New define_insn.
6223 * config/loongarch/lsx.md (UNSPEC_LSX_VMUH_S): Remove.
6224 (UNSPEC_LSX_VMUH_U): Remove.
6225 (lsx_vmuh_s_<lsxfmt>): Remove.
6226 (lsx_vmuh_u_<lsxfmt>): Remove.
6227 * config/loongarch/lasx.md (UNSPEC_LASX_XVMUH_S): Remove.
6228 (UNSPEC_LASX_XVMUH_U): Remove.
6229 (lasx_xvmuh_s_<lasxfmt>): Remove.
6230 (lasx_xvmuh_u_<lasxfmt>): Remove.
6231 * config/loongarch/loongarch-builtins.cc (CODE_FOR_lsx_vmuh_b):
6232 Redefine to standard pattern name.
6233 (CODE_FOR_lsx_vmuh_h): Likewise.
6234 (CODE_FOR_lsx_vmuh_w): Likewise.
6235 (CODE_FOR_lsx_vmuh_d): Likewise.
6236 (CODE_FOR_lsx_vmuh_bu): Likewise.
6237 (CODE_FOR_lsx_vmuh_hu): Likewise.
6238 (CODE_FOR_lsx_vmuh_wu): Likewise.
6239 (CODE_FOR_lsx_vmuh_du): Likewise.
6240 (CODE_FOR_lasx_xvmuh_b): Likewise.
6241 (CODE_FOR_lasx_xvmuh_h): Likewise.
6242 (CODE_FOR_lasx_xvmuh_w): Likewise.
6243 (CODE_FOR_lasx_xvmuh_d): Likewise.
6244 (CODE_FOR_lasx_xvmuh_bu): Likewise.
6245 (CODE_FOR_lasx_xvmuh_hu): Likewise.
6246 (CODE_FOR_lasx_xvmuh_wu): Likewise.
6247 (CODE_FOR_lasx_xvmuh_du): Likewise.
6249 2023-11-29 Xi Ruoyao <xry111@xry111.site>
6252 * config/loongarch/lsx.md (UNSPEC_LSX_VFTINT_S,
6253 UNSPEC_LSX_VFTINTRNE, UNSPEC_LSX_VFTINTRP,
6254 UNSPEC_LSX_VFTINTRM, UNSPEC_LSX_VFRINTRNE_S,
6255 UNSPEC_LSX_VFRINTRNE_D, UNSPEC_LSX_VFRINTRZ_S,
6256 UNSPEC_LSX_VFRINTRZ_D, UNSPEC_LSX_VFRINTRP_S,
6257 UNSPEC_LSX_VFRINTRP_D, UNSPEC_LSX_VFRINTRM_S,
6258 UNSPEC_LSX_VFRINTRM_D): Remove.
6259 (ILSX, FLSX): Move into ...
6260 (VIMODE): Move into ...
6261 (FRINT_S, FRINT_D): Remove.
6262 (frint_pattern_s, frint_pattern_d, frint_suffix): Remove.
6263 (lsx_vfrint_<flsxfmt>, lsx_vftint_s_<ilsxfmt>_<flsxfmt>,
6264 lsx_vftintrne_w_s, lsx_vftintrne_l_d, lsx_vftintrp_w_s,
6265 lsx_vftintrp_l_d, lsx_vftintrm_w_s, lsx_vftintrm_l_d,
6266 lsx_vfrintrne_s, lsx_vfrintrne_d, lsx_vfrintrz_s,
6267 lsx_vfrintrz_d, lsx_vfrintrp_s, lsx_vfrintrp_d,
6268 lsx_vfrintrm_s, lsx_vfrintrm_d,
6269 <FRINT_S:frint_pattern_s>v4sf2,
6270 <FRINT_D:frint_pattern_d>v2df2, round<mode>2,
6271 fix_trunc<mode>2): Remove.
6272 * config/loongarch/lasx.md: Likewise.
6273 * config/loongarch/simd.md: New file.
6274 (ILSX, ILASX, FLSX, FLASX, VIMODE): ... here.
6275 (IVEC, FVEC): New mode iterators.
6276 (VIMODE): ... here. Extend it to work for all LSX/LASX vector
6278 (x, wu, simd_isa, WVEC, vimode, simdfmt, simdifmt_for_f,
6279 elebits): New mode attributes.
6280 (UNSPEC_SIMD_FRINTRP, UNSPEC_SIMD_FRINTRZ, UNSPEC_SIMD_FRINT,
6281 UNSPEC_SIMD_FRINTRM, UNSPEC_SIMD_FRINTRNE): New unspecs.
6282 (SIMD_FRINT): New int iterator.
6283 (simd_frint_rounding, simd_frint_pattern): New int attributes.
6284 (<simd_isa>_<x>vfrint<simd_frint_rounding>_<simdfmt>): New
6285 define_insn template for frint instructions.
6286 (<simd_isa>_<x>vftint<simd_frint_rounding>_<simdifmt_for_f>_<simdfmt>):
6287 Likewise, but for ftint instructions.
6288 (<simd_frint_pattern><mode>2): New define_expand with
6289 flag_fp_int_builtin_inexact checked.
6290 (l<simd_frint_pattern><mode><vimode>2): Likewise.
6291 (ftrunc<mode>2): New define_expand. It does not require
6292 flag_fp_int_builtin_inexact.
6293 (fix_trunc<mode><vimode>2): New define_insn_and_split. It does
6294 not require flag_fp_int_builtin_inexact.
6295 (include): Add lsx.md and lasx.md.
6296 * config/loongarch/loongarch.md (include): Include simd.md,
6297 instead of including lsx.md and lasx.md directly.
6298 * config/loongarch/loongarch-builtins.cc
6299 (CODE_FOR_lsx_vftint_w_s, CODE_FOR_lsx_vftint_l_d,
6300 CODE_FOR_lasx_xvftint_w_s, CODE_FOR_lasx_xvftint_l_d):
6303 2023-11-29 Alexandre Oliva <oliva@adacore.com>
6305 * doc/extend.texi (hardbool): New type attribute.
6306 * doc/invoke.texi (-ftrivial-auto-var-init): Document
6307 representation vs values.
6309 2023-11-29 Alexandre Oliva <oliva@adacore.com>
6311 * expr.cc (emit_block_move_hints): Take ctz of len. Obey
6312 -finline-stringops. Use oriented or sized loop.
6313 (emit_block_move): Take ctz of len, and pass it on.
6314 (emit_block_move_via_sized_loop): New.
6315 (emit_block_move_via_oriented_loop): New.
6316 (emit_block_move_via_loop): Take incr. Move an incr-sized
6317 block per iteration.
6318 (emit_block_cmp_via_cmpmem): Take ctz of len. Obey
6320 (emit_block_cmp_via_loop): New.
6321 * expr.h (emit_block_move): Add ctz of len defaulting to zero.
6322 (emit_block_move_hints): Likewise.
6323 (emit_block_cmp_hints): Likewise.
6324 * builtins.cc (expand_builtin_memory_copy_args): Pass ctz of
6325 len to emit_block_move_hints.
6326 (try_store_by_multiple_pieces): Support starting with a loop.
6327 (expand_builtin_memcmp): Pass ctz of len to
6328 emit_block_cmp_hints.
6329 (expand_builtin): Allow inline expansion of memset, memcpy,
6330 memmove and memcmp if requested.
6331 * common.opt (finline-stringops): New.
6332 (ilsop_fn): New enum.
6333 * flag-types.h (enum ilsop_fn): New.
6334 * doc/invoke.texi (-finline-stringops): Add.
6336 2023-11-29 Pan Li <pan2.li@intel.com>
6339 * config/riscv/riscv-string.cc (expand_block_move): Add
6340 precondition check for exact_div.
6342 2023-11-28 Roger Sayle <roger@nextmovesoftware.com>
6344 * config/arc/arc.md: Make output template whitespace consistent.
6346 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com>
6348 * varasm.cc (assemble_external_libcall): Refer in assert only ifdef
6349 ASM_OUTPUT_EXTERNAL.
6351 2023-11-28 Andrew Pinski <quic_apinski@quicinc.com>
6353 PR tree-optimization/112738
6354 * match.pd (`(nop_convert)-(convert)a`): Reject
6355 when the outer type is boolean.
6357 2023-11-28 Richard Biener <rguenther@suse.de>
6359 PR middle-end/112732
6360 * tree.cc (build_opaque_vector_type): Reset TYPE_ALIAS_SET
6361 of the newly built type.
6363 2023-11-28 Uros Bizjak <ubizjak@gmail.com>
6366 * config/i386/i386.md (cmpstrnqi_1): Set FLAGS_REG to its previous
6367 value when operand 2 equals zero.
6368 (*cmpstrnqi_1): Ditto.
6369 (*cmpstrnqi_1 peephole2): Ditto.
6371 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6374 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6376 * config/bpf/bpf.cc (bpf_output_call): Report error in case the
6377 function call is for a builtin.
6378 (bpf_external_libcall): Added target hook to detect and report
6379 error when other external calls that are not builtins.
6381 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com>
6384 * varasm.cc (pending_libcall_symbols): New variable.
6385 (process_pending_assemble_externals): Process
6386 pending_libcall_symbols.
6387 (assemble_external_libcall): Defer emitting external libcall
6388 symbols to process_pending_assemble_externals.
6390 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6392 * btfout.cc (btf_calc_num_vbytes): Fixed logic for enum64.
6393 (btf_asm_enum_const): Corrected logic for enum64 and smaller
6394 than 4 bytes values.
6396 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6398 * config/bpf/bpf.cc (bpf_output_call): Report error in case the
6399 function call is for a builtin.
6400 (bpf_external_libcall): Added target hook to detect and report
6401 error when other external calls that are not builtins.
6403 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6405 * config/bpf/bpf.cc (bpf_use_by_pieces_infrastructure_p): Added
6406 function to bypass default behaviour.
6407 * config/bpf/bpf.h (COMPARE_MAX_PIECES): Defined to 1024 bytes.
6409 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6411 * config/bpf/core-builtins.cc (core_mark_as_access_index):
6414 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6416 * config/bpf/core-builtins.cc
6417 (bpf_resolve_overloaded_core_builtin): Removed call.
6418 (execute_lower_bpf_core): Added all to remove_parser_plugin.
6420 2023-11-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6423 * config/riscv/riscv-v.cc (expand_vec_perm_const): Disallow poly size (1, 1) VLA SLP.
6425 2023-11-28 Jakub Jelinek <jakub@redhat.com>
6427 PR tree-optimization/112719
6428 * match.pd (parity(X)^parity(Y) -> parity(X^Y)): Handle case of
6430 * gimple-match-exports.cc (build_call_internal): Add special-case for
6431 bit query ifns on large/huge BITINT_TYPE before bitint lowering.
6433 2023-11-28 Jakub Jelinek <jakub@redhat.com>
6435 PR tree-optimization/112719
6436 * match.pd (popcount (X) + popcount (Y) -> POPCOUNT (X | Y)): Deal
6437 with argument types with different precisions.
6439 2023-11-28 David Malcolm <dmalcolm@redhat.com>
6442 * Makefile.in (PLUGIN_HEADERS): Add analyzer headers.
6443 (install-plugin): Keep the directory structure for files in
6446 2023-11-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6449 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix regression.
6451 2023-11-28 David Malcolm <dmalcolm@redhat.com>
6453 * diagnostic-show-locus.cc (layout::maybe_add_location_range):
6454 Don't print annotation lines for ranges when there's no column
6456 (selftest::test_one_liner_no_column): New.
6457 (selftest::test_diagnostic_show_locus_one_liner): Call it.
6459 2023-11-28 David Malcolm <dmalcolm@redhat.com>
6461 * diagnostic.cc (diagnostic_get_location_text): Convert to...
6462 (diagnostic_context::get_location_text): ...this, and convert
6463 return type from char * to label_text.
6464 (diagnostic_build_prefix): Update for above change.
6465 (default_diagnostic_start_span_fn): Likewise.
6466 (selftest::assert_location_text): Likewise.
6467 * diagnostic.h (diagnostic_context::get_location_text): New decl.
6469 2023-11-27 Andrew Pinski <quic_apinski@quicinc.com>
6471 * config/aarch64/aarch64.cc (aarch64_if_then_else_costs):
6472 Handle csinv/csinc case of 1/-1.
6474 2023-11-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
6475 Richard Sandiford <richard.sandiford@arm.com>
6477 PR middle-end/111754
6478 * fold-const.cc (fold_vec_perm_cst): Set result's encoding to sel's
6479 encoding, and set res_nelts_per_pattern to 2 if sel contains stepped
6480 sequence but input vectors do not.
6481 (test_nunits_min_2): New test Case 8.
6482 (test_nunits_min_4): New tests Case 8 and Case 9.
6484 2023-11-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
6486 * config/aarch64/aarch64.cc (aarch64_needs_frame_chain): Do not
6487 force frame chain for eh_return.
6489 2023-11-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
6491 * config/aarch64/aarch64-protos.h (aarch64_eh_return_handler_rtx):
6493 * config/aarch64/aarch64.cc (aarch64_return_address_signing_enabled):
6494 Sign return address even in functions with eh_return.
6495 (aarch64_expand_epilogue): Conditionally return with br or ret.
6496 (aarch64_eh_return_handler_rtx): Remove.
6497 * config/aarch64/aarch64.h (EH_RETURN_TAKEN_RTX): Define.
6498 (EH_RETURN_STACKADJ_RTX): Change to R5.
6499 (EH_RETURN_HANDLER_RTX): Change to R6.
6500 * df-scan.cc: Handle EH_RETURN_TAKEN_RTX.
6501 * doc/tm.texi: Regenerate.
6502 * doc/tm.texi.in: Document EH_RETURN_TAKEN_RTX.
6503 * except.cc (expand_eh_return): Handle EH_RETURN_TAKEN_RTX.
6505 2023-11-27 Thomas Schwinge <thomas@codesourcery.com>
6507 * config.gcc <amdgcn-*-amdhsa> (extra_gcc_objs): Don't set.
6508 * config/gcn/driver-gcn.cc: Remove.
6509 * config/gcn/gcn-hsa.h (ASM_SPEC, EXTRA_SPEC_FUNCTIONS): Remove
6510 'last_arg' spec function.
6511 * config/gcn/t-gcn-hsa (driver-gcn.o): Remove.
6513 2023-11-27 Thomas Schwinge <thomas@codesourcery.com>
6516 * config/gcn/gcn.opt (march=, mtune=): Tag as 'Negative' of
6519 2023-11-27 Samuel Thibault <samuel.thibault@gnu.org>
6521 * config/i386/gnu.h: Use PIE_SPEC, add static-pie case.
6522 * config/i386/gnu64.h: Use PIE_SPEC, add static-pie case.
6524 2023-11-27 Samuel Thibault <samuel.thibault@gnu.org>
6526 * config/i386/t-gnu64: New file.
6527 * config.gcc [x86_64-*-gnu*]: Add i386/t-gnu64 to
6530 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
6533 * config/aarch64/aarch64-sve-builtins.h (is_ptrue): Declare.
6534 * config/aarch64/aarch64-sve-builtins.cc (is_ptrue): New function.
6535 (gimple_folder::redirect_pred_x): Likewise.
6536 (gimple_folder::fold): Use it.
6538 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
6540 * config/aarch64/aarch64-sve-builtins.h (vector_cst_all_same): Declare.
6541 * config/aarch64/aarch64-sve-builtins.cc (vector_cst_all_same): New
6542 function, a generalized replacement of...
6543 * config/aarch64/aarch64-sve-builtins-base.cc
6544 (svlast_impl::vect_all_same): ...this.
6545 (svlast_impl::fold): Update accordingly.
6547 2023-11-27 Richard Biener <rguenther@suse.de>
6549 PR tree-optimization/112653
6550 * gimple-ssa.h (gimple_df): Add escaped_return solution.
6551 * tree-ssa.cc (init_tree_ssa): Reset it.
6552 (delete_tree_ssa): Likewise.
6553 * tree-ssa-structalias.cc (escaped_return_id): New.
6554 (find_func_aliases): Handle non-IPA return stmts by
6555 adding to ESCAPED_RETURN.
6556 (set_uids_in_ptset): Adjust HEAP escaping to also cover
6557 escapes through return.
6558 (init_base_vars): Initialize ESCAPED_RETURN.
6559 (compute_points_to_sets): Replace ESCAPED post-processing
6560 with recording the ESCAPED_RETURN solution.
6561 * tree-ssa-alias.cc (ref_may_alias_global_p_1): Check
6562 the ESCAPED_RETUNR solution.
6563 (dump_alias_info): Dump it.
6564 * cfgexpand.cc (update_alias_info_with_stack_vars): Update it.
6565 * ipa-icf.cc (sem_item_optimizer::fixup_points_to_sets):
6567 * tree-inline.cc (expand_call_inline): Reset it.
6568 * tree-parloops.cc (parallelize_loops): Likewise.
6569 * tree-sra.cc (maybe_add_sra_candidate): Check it.
6571 2023-11-27 Richard Biener <rguenther@suse.de>
6572 Richard Sandiford <richard.sandiford@arm.com>
6574 PR tree-optimization/112661
6575 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Defer duplicate-and-
6576 interleave test to...
6577 (vect_build_slp_tree_2): ...here, once we have all the operands.
6578 Skip the test for uniform vectors.
6579 (vect_create_constant_vectors): Detect uniform vectors. Avoid
6580 redundant conversions in that case. Use gimple_build_vector_from_val
6581 to build the vector.
6583 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
6585 * attribs.cc (excl_hash_traits): Delete.
6586 (test_attribute_exclusions): Use pair_hash and nofree_string_hash
6589 2023-11-27 Andrew Stubbs <ams@codesourcery.com>
6591 * config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Disallow TImode.
6593 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6595 * config/s390/s390-builtin-types.def (BT_FN_UV8HI_UV8HI_UINT):
6596 Add missing builtin type.
6598 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6600 * config/s390/s390-builtin-types.def: Remove types.
6601 * config/s390/s390-builtins.def (O_U64): Remove 64-bit literal support.
6602 Don't restrict s390_vec_rli and s390_verll[bhfg] to immediates.
6603 * config/s390/s390.cc (s390_const_operand_ok): Remove 64-bit
6606 2023-11-27 Alex Coplan <alex.coplan@arm.com>
6607 Iain Sandoe <iain@sandoe.co.uk>
6610 * doc/cpp.texi: Document __has_{feature,extension}.
6612 2023-11-27 Richard Biener <rguenther@suse.de>
6614 PR tree-optimization/112706
6615 * match.pd (ptr + o ==/!=/- ptr + o'): New patterns.
6617 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6619 * config/s390/s390-builtin-types.def: Add/remove types.
6620 * config/s390/s390-builtins.def
6621 (s390_vclfnhs,s390_vclfnls,s390_vcrnfs,s390_vcfn,s390_vcnf):
6622 Replace type V8HI with UV8HI.
6624 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6626 * config/s390/s390-builtins.def
6627 (s390_vcefb,s390_vcdgb,s390_vcelfb,s390_vcdlgb,s390_vcfeb,s390_vcgdb,
6628 s390_vclfeb,s390_vclgdb): Remove flags for non-existing operands
6631 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6633 * config/s390/s390.md (*cmphi_ccu): For immediate operand 1 make
6634 use of constraint n instead of D and chop of high bits in the
6637 2023-11-27 Jakub Jelinek <jakub@redhat.com>
6640 * config.gcc (mips*-sde-elf*): Append to tm_defines rather than
6643 2023-11-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6645 * config/riscv/autovec.md
6646 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>):
6647 Remove gather_scatter_valid_offset_mode_p.
6648 (mask_len_gather_load<mode><mode>): Ditto.
6649 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
6650 (mask_len_scatter_store<mode><mode>): Ditto.
6651 * config/riscv/predicates.md (const_1_or_8_operand): New predicate.
6652 (vector_gs_scale_operand_64): Remove.
6653 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): Remove.
6654 * config/riscv/riscv-v.cc (expand_gather_scatter): Refine code.
6655 (gather_scatter_valid_offset_mode_p): Remove.
6656 * config/riscv/vector-iterators.md: Fix iterator bugs.
6658 2023-11-27 Tsukasa OI <research_trasio@irq.a4lg.com>
6660 * common/config/riscv/riscv-common.cc
6661 (riscv_ext_version_table): Set version to ratified 2.0.
6662 (riscv_subset_list::parse_std_ext): Allow RV64E.
6663 * config.gcc: Parse base ISA 'rv64e' and ABI 'lp64e'.
6664 * config/riscv/arch-canonicalize: Parse base ISA 'rv64e'.
6665 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
6666 Define different macro per XLEN. Add handling for ABI_LP64E.
6667 * config/riscv/riscv-d.cc (riscv_d_handle_target_float_abi):
6668 Add handling for ABI_LP64E.
6669 * config/riscv/riscv-opts.h (enum riscv_abi_type): Add ABI_LP64E.
6670 * config/riscv/riscv.cc (riscv_option_override): Enhance error
6671 handling to support RV64E and LP64E.
6672 (riscv_conditional_register_usage): Change "RV32E" in a comment
6674 * config/riscv/riscv.h
6675 (UNITS_PER_FP_ARG): Add handling for ABI_LP64E.
6676 (STACK_BOUNDARY): Ditto.
6677 (ABI_STACK_BOUNDARY): Ditto.
6678 (MAX_ARGS_IN_REGISTERS): Ditto.
6679 (ABI_SPEC): Add support for "lp64e".
6680 * config/riscv/riscv.opt: Parse -mabi=lp64e as ABI_LP64E.
6681 * doc/invoke.texi: Add documentation of the LP64E ABI.
6683 2023-11-27 Jose E. Marchesi <jose.marchesi@oracle.com>
6685 * config/bpf/bpf-helpers.h: Remove.
6686 * config.gcc: Adapt accordingly.
6688 2023-11-27 Guo Jie <guojie@loongson.cn>
6690 * config/loongarch/loongarch.cc (loongarch_split_plus_constant):
6691 avoid left shift of negative value -0x8000.
6693 2023-11-27 Guo Jie <guojie@loongson.cn>
6695 * config/loongarch/loongarch.cc
6696 (enum loongarch_load_imm_method): Add new method.
6697 (loongarch_build_integer): Add relevant implementations for
6699 (loongarch_move_integer): Ditto.
6701 2023-11-26 Alexander Monakov <amonakov@ispras.ru>
6703 * sort.cc: Use 'sorting networks' in comments.
6705 2023-11-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6708 * config/riscv/riscv-avlprop.cc (avl_can_be_propagated_p): Add slidedown.
6709 (vlmax_ta_p): Ditto.
6710 (pass_avlprop::get_vlmax_ta_preferred_avl): Ditto.
6712 2023-11-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6714 * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): Fix typo.
6715 (avl_can_be_propagated_p): Ditto.
6716 (vlmax_ta_p): Ditto.
6718 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
6721 * doc/install.texi (Downloading the source): Sort the list of
6722 front ends and add D, Go, and Modula-2.
6724 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
6727 * doc/install.texi (Specific) <*-*-freebsd*>: Remove older
6728 contents referencing GCC 4.x.
6730 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
6732 * doc/standards.texi (Standards): Update ISO C++ reference.
6734 2023-11-25 Jakub Jelinek <jakub@redhat.com>
6737 * config/i386/i386.md (*jcc_bt<mode>_mask,
6738 *jcc_bt<SWI48:mode>_mask_1): Add (const_int 0) as expected
6739 second operand of bt_comparison_operator.
6741 2023-11-25 Andrew Pinski <pinskia@gmail.com>
6742 Jakub Jelinek <jakub@redhat.com>
6745 * config/aarch64/aarch64-simd.md (aarch64_simd_stp<mode>): Use <vwcore>
6746 rather than %<vw> for alternative with r constraint on input operand.
6748 2023-11-24 Tobias Burnus <tobias@codesourcery.com>
6750 * doc/install.texi (amdgcn-*-amdhsa): Fix URL to ROCm;
6751 change 'in the future' to 'in LLVM 18'.
6753 2023-11-24 John David Anglin <danglin@gcc.gnu.org>
6755 * config/pa/pa.cc (pa_emit_move_sequence): Use INT14_OK_STRICT
6756 in a couple of places.
6758 2023-11-24 Martin Jambor <mjambor@suse.cz>
6760 PR middle-end/109849
6761 * tree-sra.cc (passed_by_ref_in_call): New.
6762 (sra_initialize): Allocate passed_by_ref_in_call.
6763 (sra_deinitialize): Free passed_by_ref_in_call.
6764 (create_access): Add decl pool candidates only if they are not
6766 (build_access_from_expr_1): Bail out on ADDR_EXPRs.
6767 (build_access_from_call_arg): New function.
6768 (asm_visit_addr): Rename to scan_visit_addr, change the
6769 disqualification dump message.
6770 (scan_function): Check taken addresses for all non-call statements,
6771 including phi nodes. Process all call arguments, including the static
6772 chain, build_access_from_call_arg.
6773 (maybe_add_sra_candidate): Relax need_to_live_in_memory check to allow
6774 non-escaped local variables.
6775 (sort_and_splice_var_accesses): Disallow smaller-than-precision
6776 replacements for aggregates passed by reference to functions.
6777 (sra_modify_expr): Use a separate stmt iterator for adding satements
6778 before the processed statement and after it.
6779 (enum out_edge_check): New type.
6780 (abnormal_edge_after_stmt_p): New function.
6781 (sra_modify_call_arg): New function.
6782 (sra_modify_assign): Adjust calls to sra_modify_expr.
6783 (sra_modify_function_body): Likewise, use sra_modify_call_arg to
6784 process call arguments, including the static chain.
6786 2023-11-24 Uros Bizjak <ubizjak@gmail.com>
6789 * config/i386/i386.cc (ix86_expand_split_stack_prologue): Load
6790 function address to a register for ix86_cmodel == CM_LARGE.
6792 2023-11-24 Tobias Burnus <tobias@codesourcery.com>
6794 * doc/invoke.texi (-Wopenmp): Add.
6795 * gimplify.cc (gimplify_omp_for): Add OPT_Wopenmp to warning_at.
6796 * omp-expand.cc (expand_omp_ordered_sink): Likewise.
6797 * omp-general.cc (omp_check_context_selector): Likewise.
6798 * omp-low.cc (scan_omp_for, check_omp_nesting_restrictions,
6799 lower_omp_ordered_clauses): Likewise.
6800 * omp-simd-clone.cc (simd_clone_clauses_extract): Likewise.
6802 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6805 * config/riscv/riscv-v.cc (preferred_simd_mode): Allow poly_int (1,1) vectors.
6807 2023-11-24 Alexander Monakov <amonakov@ispras.ru>
6809 * config.in: Regenerate.
6810 * configure: Regenerate.
6811 * configure.ac: Delete manual checks for old Valgrind headers.
6812 * system.h (VALGRIND_MAKE_MEM_NOACCESS): Delete.
6813 (VALGRIND_MAKE_MEM_DEFINED): Delete.
6814 (VALGRIND_MAKE_MEM_UNDEFINED): Delete.
6815 (VALGRIND_MALLOCLIKE_BLOCK): Delete.
6816 (VALGRIND_FREELIKE_BLOCK): Delete.
6818 2023-11-24 Jakub Jelinek <jakub@redhat.com>
6821 * config/i386/i386-expand.cc (ix86_expand_branch): Use
6822 ix86_expand_vector_logical_operator to expand vector XOR rather than
6823 gen_rtx_SET on gen_rtx_XOR.
6825 2023-11-24 Alex Coplan <alex.coplan@arm.com>
6827 * rtl-ssa/access-utils.h (filter_accesses): New.
6828 (remove_regno_access): New.
6829 (check_remove_regno_access): New.
6830 * rtl-ssa/accesses.cc (rtl_ssa::remove_note_accesses_base): Use
6831 new filter_accesses helper.
6833 2023-11-24 Alex Coplan <alex.coplan@arm.com>
6835 * rtl-ssa/accesses.cc (function_info::create_set): New.
6836 * rtl-ssa/accesses.h (access_info::is_temporary): New.
6837 * rtl-ssa/changes.cc (move_insn): Handle new (temporary) insns.
6838 (function_info::finalize_new_accesses): Handle new/temporary
6839 user-created accesses.
6840 (function_info::apply_changes_to_insn): Ensure m_is_temp flag
6841 on new insns gets cleared.
6842 (function_info::change_insns): Handle new/temporary insns.
6843 (function_info::create_insn): New.
6844 * rtl-ssa/changes.h (class insn_change): Make function_info a
6846 * rtl-ssa/functions.h (function_info): Declare new entry points:
6847 create_set, create_insn. Declare new change_alloc helper.
6848 * rtl-ssa/insns.cc (insn_info::print_full): Identify temporary insns in
6850 * rtl-ssa/insns.h (insn_info): Add new m_is_temp flag and accompanying
6851 is_temporary accessor.
6852 * rtl-ssa/internals.inl (insn_info::insn_info): Initialize m_is_temp to
6854 * rtl-ssa/member-fns.inl (function_info::change_alloc): New.
6855 * rtl-ssa/movement.h (restrict_movement_for_defs_ignoring): Add
6856 handling for temporary defs.
6858 2023-11-24 Jakub Jelinek <jakub@redhat.com>
6860 PR tree-optimization/112673
6861 * match.pd (bit_field_ref (vce @0) -> bit_field_ref @0): Only simplify
6862 if either @0 doesn't have scalar integral type or if it has mode
6865 2023-11-24 Jakub Jelinek <jakub@redhat.com>
6867 PR middle-end/112679
6868 * gimple-lower-bitint.cc (gimple_lower_bitint): Also stop first loop on
6869 floating point SSA_NAME set in FLOAT_EXPR assignment from BITINT_TYPE
6870 INTEGER_CST. Set has_large_huge for those if that BITINT_TYPE is large
6871 or huge. Set kind to such FLOAT_EXPR assignment rhs1 BITINT_TYPE's kind.
6873 2023-11-24 Richard Biener <rguenther@suse.de>
6875 PR tree-optimization/112677
6876 * tree-vect-loop.cc (vectorizable_reduction): Use alloca
6877 to allocate vectype_op.
6879 2023-11-24 Haochen Gui <guihaoc@gcc.gnu.org>
6881 * expr.cc (by_pieces_ninsns): Include by pieces compare when
6882 do the adjustment for overlap operations. Replace mov_optab
6883 checks with gcc assertion.
6885 2023-11-24 Jakub Jelinek <jakub@redhat.com>
6887 PR middle-end/112668
6888 * gimple-iterator.h (gsi_end, gsi_end_bb): New inline functions.
6889 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): After
6890 temporarily adding statements after m_init_gsi, update m_init_gsi
6891 such that later additions after it will be after the added statements.
6892 (bitint_large_huge::handle_load): Likewise. When splitting
6893 gsi_bb (m_init_gsi) basic block, update m_preheader_bb if needed
6894 and update saved m_gsi as well if needed.
6895 (bitint_large_huge::lower_mergeable_stmt,
6896 bitint_large_huge::lower_comparison_stmt,
6897 bitint_large_huge::lower_mul_overflow,
6898 bitint_large_huge::lower_bit_query): Use gsi_end_bb.
6900 2023-11-24 Jakub Jelinek <jakub@redhat.com>
6903 * tree.cc (try_catch_may_fallthru): If second operand of
6904 TRY_CATCH_EXPR is not a STATEMENT_LIST, handle it as if it was a
6905 STATEMENT_LIST containing a single statement.
6907 2023-11-24 Richard Biener <rguenther@suse.de>
6909 PR tree-optimization/112344
6910 * tree-chrec.cc (chrec_apply): Only use an unsigned add
6911 when the overall increment doesn't fit the signed type.
6913 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6916 * config/riscv/riscv-v.cc (shuffle_extract_and_slide1up_patterns): New function.
6917 (expand_vec_perm_const_1): Add new optimization.
6919 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6921 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): Disable for NUNIT < 4.
6923 2023-11-24 Haochen Jiang <haochen.jiang@intel.com>
6926 * config/i386/driver-i386.cc (check_avx10_avx512_features):
6928 (check_avx512_features): this and remove avx10 check.
6929 (host_detect_local_cpu): Never append -mno-avx10.1-{256,512} to
6930 avoid emitting warnings when building GCC with native arch.
6931 * config/i386/i386-builtin.def (BDESC): Add missing AVX512VL for
6932 128/256 bit builtin for AVX512VP2INTERSECT.
6933 * config/i386/i386-options.cc (ix86_option_override_internal):
6934 Also check whether the AVX512 flags is set when trying to reset.
6935 * config/i386/i386.h
6936 (PTA_SKYLAKE_AVX512): Add missing PTA_EVEX512.
6937 (PTA_ZNVER4): Ditto.
6939 2023-11-23 Georg-Johann Lay <avr@gjlay.de>
6942 * config/avr/avr.cc (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define
6943 to speculation_safe_value_not_needed.
6945 2023-11-23 Marek Polacek <polacek@redhat.com>
6947 * common.opt (Whardened, fhardened): New options.
6948 * config.in: Regenerate.
6949 * config/bpf/bpf.cc: Include "opts.h".
6950 (bpf_option_override): If flag_stack_protector_set_by_fhardened_p, do
6951 not inform that -fstack-protector does not work.
6952 * config/i386/i386-options.cc (ix86_option_override_internal): When
6953 -fhardened, maybe enable -fcf-protection=full.
6954 * config/linux-protos.h (linux_fortify_source_default_level): Declare.
6955 * config/linux.cc (linux_fortify_source_default_level): New.
6956 * config/linux.h (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Redefine.
6957 * configure: Regenerate.
6958 * configure.ac: Check if the linker supports '-z now' and '-z relro'.
6959 Check if -fhardened is supported on $target_os.
6960 * doc/invoke.texi: Document -fhardened and -Whardened.
6961 * doc/tm.texi: Regenerate.
6962 * doc/tm.texi.in (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Add.
6963 * gcc.cc (driver_handle_option): Remember if any link options or -static
6964 were specified on the command line.
6965 (process_command): When -fhardened, maybe enable -pie and
6966 -Wl,-z,relro,-z,now.
6967 * opts.cc (flag_stack_protector_set_by_fhardened_p): New global.
6968 (finish_options): When -fhardened, enable
6969 -ftrivial-auto-var-init=zero and -fstack-protector-strong.
6970 (print_help_hardened): New.
6971 (print_help): Call it.
6972 * opts.h (flag_stack_protector_set_by_fhardened_p): Declare.
6973 * target.def (fortify_source_default_level): New target hook.
6974 * targhooks.cc (default_fortify_source_default_level): New.
6975 * targhooks.h (default_fortify_source_default_level): Declare.
6976 * toplev.cc (process_options): When -fhardened, enable
6977 -fstack-clash-protection. If flag_stack_protector_set_by_fhardened_p,
6978 do not warn that -fstack-protector not supported for this target.
6979 Don't enable -fhardened when !HAVE_FHARDENED_SUPPORT.
6981 2023-11-23 Christophe Lyon <christophe.lyon@linaro.org>
6983 * config/arm/arm-mve-builtins-functions.h
6984 (full_width_access::memory_vector_mode): Add default clause.
6986 2023-11-23 Uros Bizjak <ubizjak@gmail.com>
6989 * config/i386/i386.md (parityhi2):
6990 Use temporary register in the call to gen_parityhi2_cmp.
6992 2023-11-23 Uros Bizjak <ubizjak@gmail.com>
6995 * config/i386/i386.cc (ix86_expand_split_stack_prologue): Obtain
6996 scratch regno when flag_force_indirect_call is set. On 64-bit
6997 targets, call __morestack_large_model when flag_force_indirect_call
6998 is set and on 32-bit targets with -fpic, manually expand PIC sequence
6999 to call __morestack. Move the function address to an indirect
7000 call scratch register.
7002 2023-11-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
7004 PR tree-optimization/112678
7005 * tree-profile.cc (tree_profiling): Do not use atomic operations
7006 for -fprofile-update=single.
7008 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
7010 * config/s390/s390-c.cc (s390_cpu_cpp_builtins): Define
7011 __GCC_ASM_FLAG_OUTPUTS__.
7012 * config/s390/s390.cc (s390_canonicalize_comparison): More
7013 UNSPEC_CC_TO_INT cases.
7014 (s390_md_asm_adjust): Implement flags output.
7015 * config/s390/s390.md (ccstore4): Allow mask operands.
7016 * doc/extend.texi: Document flags output.
7018 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
7020 * config/s390/s390.md: Split TImode loads.
7022 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
7024 * config/s390/vector.md: (*vec_extract) Fix.
7026 2023-11-23 Di Zhao <dizhao@os.amperecomputing.com>
7028 * tree-ssa-reassoc.cc (get_reassociation_width): check
7029 for loop dependent FMAs.
7030 (reassociate_bb): For 3 ops, refine the condition to call
7031 swap_ops_for_binary_stmt.
7033 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7035 * config/riscv/riscv-protos.h (emit_vec_extract): New function.
7036 * config/riscv/riscv-v.cc (emit_vec_extract): Ditto.
7037 * config/riscv/riscv.cc (riscv_legitimize_move): Refine codes.
7039 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7043 * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): New function.
7044 (vlmax_ta_p): Disable vrgather AVL propagation.
7046 2023-11-23 Jakub Jelinek <jakub@redhat.com>
7048 PR middle-end/112336
7049 * expr.cc (EXTEND_BITINT): Don't call reduce_to_bit_field_precision
7050 if modifier is EXPAND_INITIALIZER.
7052 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7054 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Refine codes.
7055 (emit_vlmax_masked_gather_mu_insn): Ditto.
7056 (modulo_sel_indices): Ditto.
7057 (expand_vec_perm): Ditto.
7058 (shuffle_generic_patterns): Ditto.
7060 2023-11-23 Jakub Jelinek <jakub@redhat.com>
7062 * doc/extend.texi (__builtin_stdc_bit_ceil, __builtin_stdc_bit_floor,
7063 __builtin_stdc_bit_width, __builtin_stdc_count_ones,
7064 __builtin_stdc_count_zeros, __builtin_stdc_first_leading_one,
7065 __builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one,
7066 __builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit,
7067 __builtin_stdc_leading_ones, __builtin_stdc_leading_zeros,
7068 __builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros): Document.
7070 2023-11-23 Richard Biener <rguenther@suse.de>
7073 * doc/md.texi (cpymem): Document that exact overlap of source
7074 and destination needs to work.
7075 * doc/standards.texi (ffreestanding): Mention memcpy is required
7076 to handle the exact overlap case.
7078 2023-11-23 Jakub Jelinek <jakub@redhat.com>
7081 * doc/invoke.texi (-Wno-c++26-extensions): Document.
7083 2023-11-23 Manolis Tsamis <manolis.tsamis@vrull.eu>
7085 * ifcvt.cc (noce_convert_multiple_sets_1): Remove old code.
7087 2023-11-23 Pan Li <pan2.li@intel.com>
7090 * dse.cc (get_stored_val): Allow vector mode if read size is
7091 less than or equal to stored size.
7093 2023-11-23 Costas Argyris <costas.argyris@gmail.com>
7095 * configure.ac: Handle new --enable-win32-utf8-manifest
7097 * config.host: allow win32 utf8 manifest to be disabled
7099 * configure: Regenerate.
7101 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
7104 * config/pa/pa.h (MAX_FIXED_MODE_SIZE): Define.
7106 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
7109 * config/pa/predicates.md (integer_store_memory_operand): Return
7110 true for REG+D addresses when reload_in_progress is true.
7112 2023-11-22 Richard Biener <rguenther@suse.de>
7114 PR tree-optimization/112344
7115 * tree-chrec.cc (chrec_apply): Perform the overall increment
7116 calculation and increment in an unsigned type.
7118 2023-11-22 Andrew Stubbs <ams@codesourcery.com>
7120 * config/gcn/gcn-valu.md (*mov<mode>_4reg): Disparage AVGPR use when a
7123 2023-11-22 Vladimir N. Makarov <vmakarov@redhat.com>
7125 PR rtl-optimization/112610
7126 * ira-costs.cc: (find_costs_and_classes): Remove arg.
7127 Use ira_dump_file for printing.
7128 (print_allocno_costs, print_pseudo_costs): Ditto.
7129 (ira_costs): Adjust call of find_costs_and_classes.
7130 (ira_set_pseudo_classes): Set up and restore ira_dump_file.
7132 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7135 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix vcompress bug.
7137 2023-11-22 Tamar Christina <tamar.christina@arm.com>
7139 * config/aarch64/aarch64-simd.md
7140 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip,
7141 aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): Split into...
7142 (aarch64_uaddw<mode>_lo_zip, aarch64_uaddw<mode>_hi_zip,
7143 "aarch64_usubw<mode>_lo_zip, "aarch64_usubw<mode>_hi_zip): ... This.
7144 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): Remove.
7145 (perm_hilo): Remove UNSPEC_ZIP1, UNSPEC_ZIP2.
7147 2023-11-22 Christophe Lyon <christophe.lyon@linaro.org>
7149 * config/arm/arm-mve-builtins.cc
7150 (function_resolver::infer_pointer_type): Remove spurious line.
7152 2023-11-22 Xi Ruoyao <xry111@xry111.site>
7154 * config/loongarch/lsx.md (vec_perm<mode:LSX>): Make the
7156 * config/loongarch/loongarch.cc (loongarch_expand_vec_perm):
7157 Use the mode of the selector (instead of the shuffled vector)
7158 for truncating it. Operate on subregs in the selector mode if
7159 the shuffled vector has a different mode (i. e. it's a
7160 floating-point vector).
7162 2023-11-22 Hongyu Wang <hongyu.wang@intel.com>
7164 * config/i386/i386.md (push2_di): Adjust operand order for AT&T
7166 (pop2_di): Likewise.
7167 (push2p_di): Likewise.
7168 (pop2p_di): Likewise.
7170 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7173 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Adapt the priority.
7174 (shuffle_generic_patterns): Fix permutation indice bug.
7175 * config/riscv/vector-iterators.md: Fix VEI16 bug.
7177 2023-11-22 liuhongt <hongtao.liu@intel.com>
7179 * config/i386/sse.md (cbranch<mode>4): Extend to Vector
7182 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7185 * config/vax/vax.cc (index_term_p): Only accept the index scaler
7186 as the RHS operand to ASHIFT.
7188 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7190 * config/riscv/predicates.md (order_operator): Remove predicate.
7191 * config/riscv/riscv.cc (riscv_rtx_costs): Update accordingly.
7192 * config/riscv/riscv.md (*branch<mode>, *mov<GPR:mode><X:mode>cc)
7193 (cstore<mode>4): Likewise.
7195 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7197 * config/riscv/riscv-protos.h (riscv_expand_float_scc): Add
7198 `invert_ptr' parameter.
7199 * config/riscv/riscv.cc (riscv_emit_float_compare): Add NE
7201 (riscv_expand_float_scc): Pass `invert_ptr' through to
7202 `riscv_emit_float_compare'.
7203 (riscv_expand_conditional_move): Pass `&invert' to
7204 `riscv_expand_float_scc'.
7205 * config/riscv/riscv.md (add<mode>cc): Likewise.
7207 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7209 * config/riscv/riscv.cc (riscv_emit_float_compare) <NE>: Handle
7211 <EQ, LE, LT, GE, GT>: Return operands supplied as is.
7212 (riscv_emit_binary): Call `riscv_emit_binary' directly rather
7213 than going through a temporary register for word-mode targets.
7214 (riscv_expand_conditional_branch): Canonicalize the comparison
7215 if not against constant zero.
7217 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7219 * config/riscv/predicates.md (ne_operator): New predicate.
7220 * config/riscv/riscv.cc (riscv_insn_cost): Handle branches on a
7221 floating-point condition.
7222 * config/riscv/riscv.md (@cbranch<mode>4): Rename expander to...
7223 (@cbranch<ANYF:mode>4): ... this. Only expand the RTX via
7224 `riscv_expand_conditional_branch' for `!signed_order_operator'
7225 operators, otherwise let it through.
7226 (*cbranch<ANYF:mode>4, *cbranch<ANYF:mode>4): New insns and
7229 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7231 * config/riscv/riscv.cc (riscv_expand_conditional_move): Don't
7232 bail out in floating-point conditions.
7234 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7236 * config/riscv/riscv.cc (riscv_expand_float_scc): Suppress the
7237 use of SUBREG if the conditional-set target is word-mode.
7239 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7241 * config/riscv/riscv.md (add<mode>cc): New expander.
7243 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7245 * config/riscv/predicates.md (movcc_operand): New predicate.
7246 * config/riscv/riscv.cc (riscv_expand_conditional_move): Handle
7248 * config/riscv/riscv.md (mov<mode>cc): Likewise.
7249 * config/riscv/riscv.opt (mmovcc): New option.
7250 * doc/invoke.texi (Option Summary): Document it.
7252 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7254 * config/riscv/riscv-protos.h (riscv_emit_unary): New prototype.
7255 * config/riscv/riscv.cc (riscv_emit_unary): New function.
7257 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7259 * config/riscv/riscv.cc (riscv_expand_conditional_move): Unify
7260 conditional-move handling across all the relevant targets.
7262 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7264 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
7265 accept constants for T-Head data input operands.
7267 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7269 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
7270 accept constants for T-Head comparison operands.
7272 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7274 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
7275 the check for operand 1 being constant 0 in the Ventana/Zicond
7276 case for equality comparisons.
7278 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7280 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
7281 invert the condition for GEU and LEU.
7283 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7285 * config/riscv/riscv.cc (riscv_insn_cost): New function.
7286 (riscv_max_noce_ifcvt_seq_cost): Likewise.
7287 (riscv_noce_conversion_profitable_p): Likewise.
7288 (TARGET_INSN_COST): New macro.
7289 (TARGET_MAX_NOCE_IFCVT_SEQ_COST): New macro.
7290 (TARGET_NOCE_CONVERSION_PROFITABLE_P): New macro.
7292 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7294 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
7295 extraneous variable for EQ vs NE operation selection.
7297 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7299 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
7300 `nullptr' rather than 0 to initialize a pointer.
7302 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7304 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
7305 `mode0' and `mode1' for `GET_MODE (op0)' and `GET_MODE (op1)'.
7307 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7309 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
7310 `mode' for `GET_MODE (dest)' throughout.
7312 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7314 * config/riscv/riscv.cc (riscv_emit_int_compare): Bail out if
7315 NEED_EQ_NE_P but the comparison is neither EQ nor NE.
7317 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7319 * config/riscv/riscv.md (mov<mode>cc): Move comment on SFB
7321 (*mov<GPR:mode><X:mode>cc): ... here.
7323 2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
7325 PR middle-end/112406
7326 * tree-vect-loop.cc (vectorize_fold_left_reduction): Allow
7327 reduction index != 1.
7328 (vect_transform_reduction): Handle reduction index != 1.
7330 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
7332 * common.md (aligned_register_operand): New predicate.
7334 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
7336 * ira-int.h (ira_allocno): Add a register_filters field.
7337 (ALLOCNO_REGISTER_FILTERS): New macro.
7338 (ALLOCNO_SET_REGISTER_FILTERS): Likewise.
7339 * ira-build.cc (ira_create_allocno): Initialize register_filters.
7340 (create_cap_allocno): Propagate register_filters.
7341 (propagate_allocno_info): Likewise.
7342 (propagate_some_info_from_allocno): Likewise.
7343 * ira-lives.cc (process_register_constraint_filters): New function.
7344 (process_bb_node_lives): Use it to record register filter
7346 * ira-color.cc (assign_hard_reg): Check register filters.
7347 (improve_allocation, fast_allocation): Likewise.
7349 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
7351 * lra-constraints.cc (process_alt_operands): Check register filters.
7353 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
7355 * recog.h (operand_alternative): Add a register_filters field.
7356 (alternative_register_filters): New function.
7357 * recog.cc (preprocess_constraints): Calculate the filters field.
7358 (constrain_operands): Check register filters.
7360 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
7362 * rtl.def (DEFINE_REGISTER_CONSTRAINT): Add an optional filter
7364 * doc/md.texi (define_register_constraint): Document it.
7365 * doc/tm.texi.in: Reference it in discussion about aligned registers.
7366 * doc/tm.texi: Regenerate.
7367 * gensupport.h (register_filters, get_register_filter_id): Declare.
7368 * gensupport.cc (register_filter_map, register_filters): New variables.
7369 (get_register_filter_id): New function.
7370 (process_define_register_constraint): Likewise.
7371 (process_rtx): Pass define_register_constraints to
7372 process_define_register_constraint.
7373 * genconfig.cc (main): Emit a definition of NUM_REGISTER_FILTERS.
7374 * genpreds.cc (constraint_data): Add a filter field.
7375 (add_constraint): Update accordingly.
7376 (process_define_register_constraint): Pass the filter operand.
7377 (write_init_reg_class_start_regs): New function.
7378 (write_get_register_filter): Likewise.
7379 (write_get_register_filter_id): Likewise.
7380 (write_tm_preds_h): Write a definition of target_constraints,
7381 plus helpers to test its contents. Write the get_register_filter*
7383 (write_insn_preds_c): Write init_reg_class_start_regs.
7384 * reginfo.cc (init_reg_class_start_regs): Declare.
7385 (init_reg_sets): Call it.
7386 * target-globals.h (this_target_constraints): Declare.
7387 (target_globals): Add a constraints field.
7388 (restore_target_globals): Update accordingly.
7389 * target-globals.cc: Include tm_p.h.
7390 (default_target_globals): Initialize the constraints field.
7391 (save_target_globals): Handle the constraints field.
7392 (target_globals::~target_globals): Likewise.
7394 2023-11-21 Richard Biener <rguenther@suse.de>
7396 PR tree-optimization/112623
7397 * tree-ssa-forwprop.cc (simplify_vector_constructor):
7398 Check the source mode of the insn for vector pack/unpacks.
7400 2023-11-21 Richard Biener <rguenther@suse.de>
7402 * tree-vect-loop.cc (vect_analyze_loop_2): Move check
7403 of VF against max_vf until VF is final.
7405 2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7408 * config/riscv/riscv.cc (riscv_const_insns): Disallow DI CONST_VECTOR on RV32.
7410 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7412 * config/aarch64/aarch64.cc (aarch64_override_options): Rework warnings.
7414 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7417 * config/aarch64/aarch64-arches.def (armv9-a, armv9.1-a, armv9.2-a,
7418 armv9.3-a): Update to generic-armv9-a.
7419 * config/aarch64/aarch64-cores.def (generic-armv9-a): New.
7420 * config/aarch64/aarch64-tune.md: Regenerate.
7421 * config/aarch64/aarch64.cc: Include generic_armv9_a.h.
7422 * config/aarch64/tuning_models/generic_armv9_a.h: New file.
7424 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7427 * config/aarch64/aarch64-arches.def (armv8-9, armv8-a, armv8.1-a,
7428 armv8.2-a, armv8.3-a, armv8.4-a, armv8.5-a, armv8.6-a, armv8.7-a,
7429 armv8.8-a): Update to generic_armv8_a.
7430 * config/aarch64/aarch64-cores.def (generic-armv8-a): New.
7431 * config/aarch64/aarch64-tune.md: Regenerate.
7432 * config/aarch64/aarch64.cc: Include generic_armv8_a.h
7433 * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Change to
7434 TARGET_CPU_generic_armv8_a.
7435 * config/aarch64/tuning_models/generic_armv8_a.h: New file.
7437 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7440 * config/aarch64/aarch64-cores.def: Add generic.
7441 * config/aarch64/aarch64-opts.h (enum aarch64_proc): Remove generic.
7442 * config/aarch64/aarch64-tune.md: Regenerate
7443 * config/aarch64/aarch64.cc (all_cores): Remove generic
7444 * config/aarch64/aarch64.h (enum target_cpus): Remove
7447 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7450 * config/aarch64/aarch64.cc (generic_addrcost_table,
7451 exynosm1_addrcost_table,
7452 xgene1_addrcost_table,
7453 thunderx2t99_addrcost_table,
7454 thunderx3t110_addrcost_table,
7455 tsv110_addrcost_table,
7456 qdf24xx_addrcost_table,
7457 a64fx_addrcost_table,
7458 neoversev1_addrcost_table,
7459 neoversen2_addrcost_table,
7460 neoversev2_addrcost_table,
7461 generic_regmove_cost,
7462 cortexa57_regmove_cost,
7463 cortexa53_regmove_cost,
7464 exynosm1_regmove_cost,
7465 thunderx_regmove_cost,
7466 xgene1_regmove_cost,
7467 qdf24xx_regmove_cost,
7468 thunderx2t99_regmove_cost,
7469 thunderx3t110_regmove_cost,
7470 tsv110_regmove_cost,
7472 neoversen2_regmove_cost,
7473 neoversev1_regmove_cost,
7474 neoversev2_regmove_cost,
7475 generic_vector_cost,
7477 qdf24xx_vector_cost,
7478 thunderx_vector_cost,
7480 cortexa57_vector_cost,
7481 exynosm1_vector_cost,
7483 thunderx2t99_vector_cost,
7484 thunderx3t110_vector_cost,
7485 ampere1_vector_cost,
7486 generic_branch_cost,
7494 thunderxt88_tunings,
7501 thunderx2t99_tunings,
7502 thunderx3t110_tunings,
7506 neoversev1_vector_cost,
7508 neoverse512tvb_vector_cost,
7509 neoverse512tvb_tunings,
7510 neoversen2_vector_cost,
7512 neoversev2_vector_cost,
7514 a64fx_tunings): Split into own files.
7515 * config/aarch64/tuning_models/a64fx.h: New file.
7516 * config/aarch64/tuning_models/ampere1.h: New file.
7517 * config/aarch64/tuning_models/ampere1a.h: New file.
7518 * config/aarch64/tuning_models/cortexa35.h: New file.
7519 * config/aarch64/tuning_models/cortexa53.h: New file.
7520 * config/aarch64/tuning_models/cortexa57.h: New file.
7521 * config/aarch64/tuning_models/cortexa72.h: New file.
7522 * config/aarch64/tuning_models/cortexa73.h: New file.
7523 * config/aarch64/tuning_models/emag.h: New file.
7524 * config/aarch64/tuning_models/exynosm1.h: New file.
7525 * config/aarch64/tuning_models/generic.h: New file.
7526 * config/aarch64/tuning_models/neoverse512tvb.h: New file.
7527 * config/aarch64/tuning_models/neoversen1.h: New file.
7528 * config/aarch64/tuning_models/neoversen2.h: New file.
7529 * config/aarch64/tuning_models/neoversev1.h: New file.
7530 * config/aarch64/tuning_models/neoversev2.h: New file.
7531 * config/aarch64/tuning_models/qdf24xx.h: New file.
7532 * config/aarch64/tuning_models/saphira.h: New file.
7533 * config/aarch64/tuning_models/thunderx.h: New file.
7534 * config/aarch64/tuning_models/thunderx2t99.h: New file.
7535 * config/aarch64/tuning_models/thunderx3t110.h: New file.
7536 * config/aarch64/tuning_models/thunderxt88.h: New file.
7537 * config/aarch64/tuning_models/tsv110.h: New file.
7538 * config/aarch64/tuning_models/xgene1.h: New file.
7540 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7542 * config/aarch64/aarch64-simd.md (vec_unpack<su>_lo_<mode,
7543 vec_unpack<su>_lo_<mode): Split into...
7544 (vec_unpacku_lo_<mode, vec_unpacks_lo_<mode,
7545 vec_unpacku_lo_<mode, vec_unpacks_lo_<mode): ...These.
7546 (aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
7547 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
7548 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): New.
7549 (perm_hilo): Add UNSPEC_ZIP1, UNSPEC_ZIP2.
7551 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7553 * config/aarch64/aarch64.cc (aarch64_adjust_stmt_cost): Guard mla.
7554 (aarch64_vector_costs::count_ops): Likewise.
7556 2023-11-21 Sebastian Huber <sebastian.huber@embedded-brains.de>
7558 PR middle-end/112634
7559 * tree-profile.cc (gen_assign_counter_update): Cast the unsigned result type of
7560 __atomic_add_fetch() to the signed counter type.
7561 (gen_counter_update): Fix formatting.
7563 2023-11-21 Jakub Jelinek <jakub@redhat.com>
7565 * tree-profile.cc (gen_counter_update, tree_profiling): Formatting
7568 2023-11-21 Jakub Jelinek <jakub@redhat.com>
7570 PR middle-end/112639
7571 * builtins.cc (fold_builtin_bit_query): If arg0 has side-effects, arg1
7572 is specified but cleared, call save_expr on arg0.
7574 2023-11-21 Hongyu Wang <hongyu.wang@intel.com>
7576 * config/i386/i386-expand.h (gen_push): Add default bool
7578 (gen_pop): Likewise.
7579 * config/i386/i386-opts.h (enum apx_features): Add apx_ppx, add
7581 * config/i386/i386.cc (ix86_emit_restore_reg_using_pop): Add
7582 ppx_p parameter for function declaration.
7583 (gen_push2): Add ppx_p parameter, emit push2p if ppx_p is true.
7584 (gen_push): Likewise.
7585 (ix86_emit_restore_reg_using_pop2): Likewise for pop2p.
7586 (ix86_emit_save_regs): Emit pushp/push2p under TARGET_APX_PPX.
7587 (ix86_emit_restore_reg_using_pop): Add ppx_p, emit popp insn
7588 and adjust cfi when ppx_p is ture.
7589 (ix86_emit_restore_reg_using_pop2): Add ppx_p and parse to its
7591 (ix86_emit_restore_regs_using_pop2): Likewise.
7592 (ix86_expand_epilogue): Parse TARGET_APX_PPX to
7593 ix86_emit_restore_reg_using_pop.
7594 * config/i386/i386.h (TARGET_APX_PPX): New.
7595 * config/i386/i386.md (UNSPEC_APX_PPX): New unspec.
7596 (pushp_di): New define_insn.
7597 (popp_di): Likewise.
7598 (push2p_di): Likewise.
7599 (pop2p_di): Likewise.
7600 * config/i386/i386.opt: Add apx_ppx enum.
7602 2023-11-21 Richard Biener <rguenther@suse.de>
7604 PR tree-optimization/111970
7605 * tree-vect-stmts.cc (vectorizable_load): Fix offset calculation
7606 for SLP gather load.
7607 (vectorizable_store): Likewise for SLP scatter store.
7609 2023-11-21 Xi Ruoyao <xry111@xry111.site>
7611 * config/loongarch/loongarch-def.h (stdint.h): Guard with #if to
7612 exclude it for target libraries.
7613 (loongarch_isa_base_features): Likewise.
7614 (loongarch_isa): Likewise.
7615 (loongarch_abi): Likewise.
7616 (loongarch_target): Likewise.
7617 (loongarch_cpu_default_isa): Likewise.
7619 2023-11-21 liuhongt <hongtao.liu@intel.com>
7622 * config/i386/i386-expand.cc (emit_reduc_half): Hanlde
7624 * config/i386/mmx.md (reduc_<code>_scal_<mode>): New expander.
7625 (reduc_<code>_scal_v4qi): Ditto.
7627 2023-11-20 Marc Poulhiès <dkm@kataplop.net>
7629 * config/nvptx/nvptx.h (struct machine_function): Fix typo in variadic.
7630 * config/nvptx/nvptx.cc (nvptx_function_arg_advance): Adjust to use fixed name.
7631 (nvptx_declare_function_name): Likewise.
7632 (nvptx_call_args): Likewise.
7633 (nvptx_expand_call): Likewise.
7635 2023-11-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
7637 * tree-profile.cc (gen_counter_update): Use unshare_expr() for the
7638 counter expression in the second gimple_build_assign().
7640 2023-11-20 Jan Hubicka <jh@suse.cz>
7642 * cgraph.cc (add_detected_attribute_1): New function.
7643 (cgraph_node::add_detected_attribute): Likewise.
7644 * cgraph.h (cgraph_node::add_detected_attribute): Declare.
7645 * common.opt: Add -Wsuggest-attribute=returns_nonnull.
7646 * doc/invoke.texi: Document new flag.
7647 * gimple-range-fold.cc (fold_using_range::range_of_call):
7648 Use known reutrn value ranges.
7649 * ipa-prop.cc (struct ipa_return_value_summary): New type.
7650 (class ipa_return_value_sum_t): New type.
7651 (ipa_return_value_sum): New summary.
7652 (ipa_record_return_value_range): New function.
7653 (ipa_return_value_range): New function.
7654 * ipa-prop.h (ipa_return_value_range): Declare.
7655 (ipa_record_return_value_range): Declare.
7656 * ipa-pure-const.cc (warn_function_returns_nonnull): New funcion.
7657 * ipa-utils.h (warn_function_returns_nonnull): Declare.
7658 * symbol-summary.h: Fix comment.
7659 * tree-vrp.cc (execute_ranger_vrp): Record return values.
7661 2023-11-20 Richard Biener <rguenther@suse.de>
7663 PR tree-optimization/112618
7664 * tree-vect-loop.cc (vect_transform_loop_stmt): For not
7665 relevant and unused .MASK_CALL make sure we remove the
7668 2023-11-20 Richard Biener <rguenther@suse.de>
7670 PR tree-optimization/112281
7671 * tree-loop-distribution.cc
7672 (loop_distribution::pg_add_dependence_edges): For = in the
7673 innermost common loop record a partition conflict.
7675 2023-11-20 Richard Biener <rguenther@suse.de>
7677 PR middle-end/112622
7678 * convert.cc (convert_to_real_1): Use element_precision
7679 where a vector type might appear. Provide specific
7680 diagnostic for unexpected vector argument.
7682 2023-11-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7685 * config/riscv/vector-iterators.md: Remove VDEMOTE and VMDEMOTE.
7686 * config/riscv/vector.md: Fix slide1 intermediate mode bug.
7688 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
7690 * config/riscv/riscv-v.cc (gather_scatter_valid_offset_mode_p):
7691 Add check for XLEN == 32.
7692 * config/riscv/vector-iterators.md: Change VLS part of the
7693 demote iterator to 2x elements modes
7694 * config/riscv/vector.md: Adjust iterators and insn conditions.
7696 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
7698 * config/arm/arm-mve-builtins-base.cc (vld1_impl, vld1q)
7699 (vst1_impl, vst1q): New.
7700 * config/arm/arm-mve-builtins-base.def (vld1q, vst1q): New.
7701 * config/arm/arm-mve-builtins-base.h (vld1q, vst1q): New.
7702 * config/arm/arm_mve.h
7706 (vld1q_s32): Delete.
7707 (vld1q_s16): Delete.
7709 (vld1q_u32): Delete.
7710 (vld1q_u16): Delete.
7711 (vld1q_f32): Delete.
7712 (vld1q_f16): Delete.
7713 (vst1q_f32): Delete.
7714 (vst1q_f16): Delete.
7716 (vst1q_s32): Delete.
7717 (vst1q_s16): Delete.
7719 (vst1q_u32): Delete.
7720 (vst1q_u16): Delete.
7721 (__arm_vld1q_s8): Delete.
7722 (__arm_vld1q_s32): Delete.
7723 (__arm_vld1q_s16): Delete.
7724 (__arm_vld1q_u8): Delete.
7725 (__arm_vld1q_u32): Delete.
7726 (__arm_vld1q_u16): Delete.
7727 (__arm_vst1q_s8): Delete.
7728 (__arm_vst1q_s32): Delete.
7729 (__arm_vst1q_s16): Delete.
7730 (__arm_vst1q_u8): Delete.
7731 (__arm_vst1q_u32): Delete.
7732 (__arm_vst1q_u16): Delete.
7733 (__arm_vld1q_f32): Delete.
7734 (__arm_vld1q_f16): Delete.
7735 (__arm_vst1q_f32): Delete.
7736 (__arm_vst1q_f16): Delete.
7737 (__arm_vld1q): Delete.
7738 (__arm_vst1q): Delete.
7739 * config/arm/mve.md (mve_vld1q_f<mode>): Rename into ...
7740 (@mve_vld1q_f<mode>): ... this.
7741 (mve_vld1q_<supf><mode>): Rename into ...
7742 (@mve_vld1q_<supf><mode>) ... this.
7743 (mve_vst1q_f<mode>): Rename into ...
7744 (@mve_vst1q_f<mode>): ... this.
7745 (mve_vst1q_<supf><mode>): Rename into ...
7746 (@mve_vst1q_<supf><mode>) ... this.
7748 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
7750 * config/arm/arm-mve-builtins-shapes.cc (load, store): New.
7751 * config/arm/arm-mve-builtins-shapes.h (load, store): New.
7753 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
7755 * config/arm/arm-mve-builtins-functions.h (multi_vector_function)
7756 (full_width_access): New classes.
7757 * config/arm/arm-mve-builtins.cc
7758 (find_type_suffix_for_scalar_type, infer_pointer_type)
7759 (require_pointer_type, get_contiguous_base, add_mem_operand)
7760 (add_fixed_operand, use_contiguous_load_insn)
7761 (use_contiguous_store_insn): New.
7762 * config/arm/arm-mve-builtins.h (memory_vector_mode)
7763 (infer_pointer_type, require_pointer_type, get_contiguous_base)
7765 (add_fixed_operand, use_contiguous_load_insn)
7766 (use_contiguous_store_insn): New.
7768 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
7770 * config/arm/arm-mve-builtins-shapes.cc (build_const_pointer):
7772 (parse_type): Add support for '_', 'al' and 'as'.
7773 * config/arm/arm-mve-builtins.h (function_instance): Add
7775 (function_base): Likewise.
7777 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
7779 * config/arm/arm-builtins.cc (arm_init_simd_builtin_types): Fix
7780 initialization of arm_simd_types[].eltype.
7781 * config/arm/arm-mve-builtins.def (DEF_MVE_TYPE): Fix scalar
7784 2023-11-20 Jakub Jelinek <jakub@redhat.com>
7786 * typeclass.h (enum type_class): Add vector_type_class.
7787 * builtins.cc (type_to_class): Return vector_type_class for
7789 * doc/extend.texi (__builtin_classify_type): Mention bit-precise
7790 integer types and vector types.
7792 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
7794 PR middle-end/112406
7795 * tree-vect-patterns.cc (vect_recog_mask_conversion_pattern):
7796 Convert masks for conditional operations as well.
7798 2023-11-20 Jakub Jelinek <jakub@redhat.com>
7800 PR tree-optimization/90693
7801 * tree-ssa-math-opts.cc (match_single_bit_test): Mark POPCOUNT with
7802 result only used in equality comparison against 1 with direct optab
7803 support as .POPCOUNT call with 2 arguments.
7804 * internal-fn.h (expand_POPCOUNT): Declare.
7805 * internal-fn.def (DEF_INTERNAL_INT_EXT_FN): New macro, document it,
7806 undefine at the end.
7807 (POPCOUNT): Use it instead of DEF_INTERNAL_INT_FN.
7808 * internal-fn.cc (DEF_INTERNAL_INT_EXT_FN): Define to nothing before
7809 inclusion to define expanders.
7810 (expand_POPCOUNT): New function.
7812 2023-11-20 Jakub Jelinek <jakub@redhat.com>
7814 PR tree-optimization/90693
7815 * tree-ssa-math-opts.cc (match_single_bit_test): New function.
7816 (math_opts_dom_walker::after_dom_children): Call it for EQ_EXPR
7817 and NE_EXPR assignments and GIMPLE_CONDs.
7819 2023-11-20 Jakub Jelinek <jakub@redhat.com>
7821 * internal-fn.def: Document missing DEF_INTERNAL* macros and make sure
7822 they are all undefined at the end.
7823 * internal-fn.cc (lookup_hilo_internal_fn, lookup_evenodd_internal_fn,
7824 widening_fn_p, get_len_internal_fn): Don't undef DEF_INTERNAL_*FN
7825 macros after inclusion of internal-fn.def.
7827 2023-11-20 Haochen Jiang <haochen.jiang@intel.com>
7829 * common/config/i386/cpuinfo.h (get_available_features):
7830 Add avx10_set and version and detect avx10.1.
7831 (cpu_indicator_init): Handle avx10.1-512.
7832 * common/config/i386/i386-common.cc
7833 (OPTION_MASK_ISA2_AVX10_1_256_SET): New.
7834 (OPTION_MASK_ISA2_AVX10_1_256_SET): Ditto.
7835 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
7836 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
7837 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10.1.
7838 (ix86_handle_option): Handle -mavx10.1-256 and -mavx10.1-512.
7839 Add indicator for explicit no-avx512 and no-avx10.1 options.
7840 * common/config/i386/i386-cpuinfo.h (enum processor_features):
7841 Add FEATURE_AVX10_1_256 and FEATURE_AVX10_1_512.
7842 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7843 AVX10_1_256 and AVX10_1_512.
7844 * config/i386/cpuid.h (bit_AVX10): New.
7845 (bit_AVX10_256): Ditto.
7846 (bit_AVX10_512): Ditto.
7847 * config/i386/driver-i386.cc (check_avx10_avx512_features): New.
7848 (host_detect_local_cpu): Do not append "-mno-" options under
7849 specific scenarios to avoid emitting a warning.
7850 * config/i386/i386-isa.def
7851 (EVEX512): Add DEF_PTA(EVEX512).
7852 (AVX10_1_256): Add DEF_PTA(AVX10_1_256).
7853 (AVX10_1_512): Add DEF_PTA(AVX10_1_512).
7854 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1-256 and
7856 (ix86_function_specific_save): Save explicit no indicator.
7857 (ix86_function_specific_restore): Restore explicit no indicator.
7858 (ix86_valid_target_attribute_inner_p): Handle avx10.1, avx10.1-256 and
7860 (ix86_valid_target_attribute_tree): Handle avx512 function
7861 attributes with avx10.1 command line option.
7862 (ix86_option_override_internal): Handle AVX10.1 options.
7863 * config/i386/i386.h: Add PTA_EVEX512 for AVX512 target
7865 * config/i386/i386.opt: Add variable ix86_no_avx512_explicit and
7866 ix86_no_avx10_1_explicit, option -mavx10.1, -mavx10.1-256 and
7868 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
7869 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
7870 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
7873 2023-11-20 liuhongt <hongtao.liu@intel.com>
7876 * config/i386/sse.md (reduc_<code>_scal_<mode>): New expander.
7877 (REDUC_ANY_LOGIC_MODE): New iterator.
7878 (REDUC_PLUS_MODE): Extend to VxHI/SI/DImode.
7879 (REDUC_SSE_PLUS_MODE): Ditto.
7881 2023-11-20 xuli <xuli1@eswincomputing.com>
7884 * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum): Strategy enum.
7885 * config/riscv/riscv-string.cc (riscv_expand_block_move): Disabled based on options.
7886 (expand_block_move): Ditto.
7887 * config/riscv/riscv.opt: Add -mmemcpy-strategy=.
7889 2023-11-20 Lulu Cheng <chenglulu@loongson.cn>
7891 * config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix.
7893 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7895 * config/riscv/riscv-v.cc (emit_vlmax_insn_lra): Optimize constant AVL.
7897 2023-11-19 Philipp Tomsich <philipp.tomsich@vrull.eu>
7899 * config/riscv/riscv-protos.h (extract_base_offset_in_addr): Prototype.
7900 * config/riscv/riscv.cc (riscv_fusion_pairs): New enum.
7901 (riscv_tune_param): Add fusible_ops field.
7902 (riscv_tune_param_rocket_tune_info): Initialize new field.
7903 (riscv_tune_param_sifive_7_tune_info): Likewise.
7904 (thead_c906_tune_info): Likewise.
7905 (generic_oo_tune_info): Likewise.
7906 (optimize_size_tune_info): Likewise.
7907 (riscv_macro_fusion_p): New function.
7908 (riscv_fusion_enabled_p): Likewise.
7909 (riscv_macro_fusion_pair_p): Likewise.
7910 (TARGET_SCHED_MACRO_FUSION_P): Define.
7911 (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
7912 (extract_base_offset_in_addr): Moved into riscv.cc from...
7913 * config/riscv/thead.cc: Here.
7914 Co-authored-by: Raphael Zinsly <rzinsly@ventanamicro.com>
7915 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7917 2023-11-19 Jeff Law <jlaw@ventanamicro.com>
7919 * config/c6x/c6x.md (mvilc): Add mode to UNSPEC source.
7920 * config/mips/mips.md (rdhwr_synci_step_<mode>): Likewise.
7921 * config/riscv/riscv.md (riscv_frcsr, riscv_frflags): Likewise.
7922 * config/s390/s390.md (@split_stack_call<mode>): Likewise.
7923 (@split_stack_cond_call<mode>): Likewise.
7924 * config/sh/sh.md (sp_switch_1): Likewise.
7926 2023-11-19 David Malcolm <dmalcolm@redhat.com>
7928 * diagnostic.h: Include "rich-location.h".
7929 * edit-context.h (class fixit_hint): New forward decl.
7930 * gcc-rich-location.h: Include "rich-location.h".
7931 * genmatch.cc: Likewise.
7932 * pretty-print.h: Likewise.
7934 2023-11-19 David Malcolm <dmalcolm@redhat.com>
7936 * Makefile.in (CPPLIB_H): Add libcpp/include/rich-location.h.
7937 * coretypes.h (class rich_location): New forward decl.
7939 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7941 * config/riscv/riscv-v.cc (expand_tuple_move): Fix bug.
7943 2023-11-19 David Malcolm <dmalcolm@redhat.com>
7946 * doc/invoke.texi: Add -Wanalyzer-undefined-behavior-strtok.
7948 2023-11-18 Xi Ruoyao <xry111@xry111.site>
7950 * config/loongarch/predicates.md (const_call_insn_operand):
7951 Remove buggy "HAVE_AS_SUPPORT_CALL36" conditions. Change "1" to
7952 "true" to make the coding style consistent.
7954 2023-11-18 Xi Ruoyao <xry111@xry111.site>
7956 * config/loongarch/genopts/isa-evolution.in: (lam-bh, lamcas):
7958 * config/loongarch/loongarch-str.h: Regenerate.
7959 * config/loongarch/loongarch.opt: Regenerate.
7960 * config/loongarch/loongarch-cpucfg-map.h: Regenerate.
7961 * config/loongarch/loongarch-cpu.cc
7962 (ISA_BASE_LA64V110_FEATURES): Include OPTION_MASK_ISA_LAM_BH
7963 and OPTION_MASK_ISA_LAMCAS.
7964 * config/loongarch/sync.md (atomic_add<mode:SHORT>): Use
7965 TARGET_LAM_BH instead of ISA_BASE_IS_LA64V110. Remove empty
7966 lines from assembly output.
7967 (atomic_exchange<mode>_short): Likewise.
7968 (atomic_exchange<mode:SHORT>): Likewise.
7969 (atomic_fetch_add<mode>_short): Likewise.
7970 (atomic_fetch_add<mode:SHORT>): Likewise.
7971 (atomic_cas_value_strong<mode>_amcas): Use TARGET_LAMCAS instead
7972 of ISA_BASE_IS_LA64V110.
7973 (atomic_compare_and_swap<mode>): Likewise.
7974 (atomic_compare_and_swap<mode:GPR>): Likewise.
7975 (atomic_compare_and_swap<mode:SHORT>): Likewise.
7976 * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump
7977 status if -mlam-bh and -mlamcas if -fverbose-asm.
7979 2023-11-18 Xi Ruoyao <xry111@xry111.site>
7981 * config/loongarch/loongarch.cc (loongarch_print_operand): Don't
7982 print dbar 0x700 if TARGET_LD_SEQ_SA.
7983 * config/loongarch/sync.md (atomic_load<mode>): Likewise.
7985 2023-11-18 Xi Ruoyao <xry111@xry111.site>
7987 * config/loongarch/loongarch.md (DIV): New mode iterator.
7988 (<optab:ANY_DIV><mode:GPR>3): Don't expand if TARGET_DIV32.
7989 (<optab:ANY_DIV>di3_fake): Disable if TARGET_DIV32.
7990 (*<optab:ANY_DIV><mode:GPR>3): Allow SImode if TARGET_DIV32.
7991 (<optab:ANY_DIV>si3_extended): New insn if TARGET_DIV32.
7993 2023-11-18 Xi Ruoyao <xry111@xry111.site>
7995 * config/loongarch/loongarch-def.h:
7996 (loongarch_isa_base_features): Declare. Define it in ...
7997 * config/loongarch/loongarch-cpu.cc
7998 (loongarch_isa_base_features): ... here.
7999 (fill_native_cpu_config): If we know the base ISA of the CPU
8000 model from PRID, use it instead of la64 (v1.0). Check if all
8001 expected features of this base ISA is available, emit a warning
8003 * config/loongarch/loongarch-opts.cc (config_target_isa): Enable
8004 the features implied by the base ISA if not -march=native.
8006 2023-11-18 Xi Ruoyao <xry111@xry111.site>
8008 * config/loongarch/genopts/isa-evolution.in: New data file.
8009 * config/loongarch/genopts/genstr.sh: Translate info in
8010 isa-evolution.in when generating loongarch-str.h, loongarch.opt,
8011 and loongarch-cpucfg-map.h.
8012 * config/loongarch/genopts/loongarch.opt.in (isa_evolution):
8014 * config/loongarch/t-loongarch: (loongarch-cpucfg-map.h): New
8016 (loongarch-str.h): Depend on isa-evolution.in.
8017 (loongarch.opt): Depend on isa-evolution.in.
8018 (loongarch-cpu.o): Depend on loongarch-cpucfg-map.h.
8019 * config/loongarch/loongarch-str.h: Regenerate.
8020 * config/loongarch/loongarch-def.h (loongarch_isa): Add field
8021 for evolution features. Add helper function to enable features
8023 Probe native CPU capability and save the corresponding options
8025 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config):
8026 Probe native CPU capability and save the corresponding options
8028 (cache_cpucfg): Simplify with C++11-style for loop.
8029 (cpucfg_useful_idx, N_CPUCFG_WORDS): Move to ...
8030 * config/loongarch/loongarch.cc
8031 (loongarch_option_override_internal): Enable the ISA evolution
8032 feature options implied by -march and not explicitly disabled.
8033 (loongarch_asm_code_end): New function, print ISA information as
8034 comments in the assembly if -fverbose-asm. It makes easier to
8035 debug things like -march=native.
8036 (TARGET_ASM_CODE_END): Define.
8037 * config/loongarch/loongarch.opt: Regenerate.
8038 * config/loongarch/loongarch-cpucfg-map.h: Generate.
8039 (cpucfg_useful_idx, N_CPUCFG_WORDS) ... here.
8041 2023-11-18 Xi Ruoyao <xry111@xry111.site>
8043 * config/loongarch/genopts/loongarch-strings:
8044 (STR_ISA_BASE_LA64V110): Add.
8045 * config/loongarch/genopts/loongarch.opt.in:
8046 (ISA_BASE_LA64V110): Add.
8047 * config/loongarch/loongarch-def.c
8048 (loongarch_isa_base_strings): Initialize [ISA_BASE_LA64V110]
8049 to STR_ISA_BASE_LA64V110.
8050 * config/loongarch/loongarch.opt: Regenerate.
8051 * config/loongarch/loongarch-str.h: Regenerate.
8053 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
8055 * doc/invoke.texi (-fprofile-update): Clarify default method. Document
8056 the atomic method behaviour.
8057 * tree-profile.cc (enum counter_update_method): New.
8058 (counter_update): Likewise.
8059 (gen_counter_update): Use counter_update_method. Split the
8060 atomic counter update in two 32-bit atomic operations if
8062 (tree_profiling): Select counter_update_method.
8064 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
8066 * tree-profile.cc (gen_assign_counter_update): New.
8067 (gen_counter_update): Likewise.
8068 (gimple_gen_edge_profiler): Use gen_counter_update().
8069 (gimple_gen_time_profiler): Likewise.
8071 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
8073 * config/rtems.h (TARGET_HAVE_LIBATOMIC): Define.
8074 * doc/tm.texi: Regenerate.
8075 * doc/tm.texi.in (TARGET_HAVE_LIBATOMIC): Add.
8076 * target.def (have_libatomic): New.
8078 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
8081 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
8083 * config/sparc/rtemself.h (SPARC_GCOV_TYPE_SIZE): Define.
8084 * config/sparc/sparc.c (sparc_gcov_type_size): New.
8085 (TARGET_GCOV_TYPE_SIZE): Redefine if SPARC_GCOV_TYPE_SIZE is defined.
8086 * coverage.c (get_gcov_type): Use targetm.gcov_type_size().
8087 * doc/tm.texi (TARGET_GCOV_TYPE_SIZE): Add hook under "Misc".
8088 * doc/tm.texi.in: Regenerate.
8089 * target.def (gcov_type_size): New target hook.
8090 * targhooks.c (default_gcov_type_size): New.
8091 * targhooks.h (default_gcov_type_size): Declare.
8092 * tree-profile.c (gimple_gen_edge_profiler): Use precision of
8094 (gimple_gen_time_profiler): Likewise.
8096 2023-11-18 Kito Cheng <kito.cheng@sifive.com>
8098 * config/riscv/riscv-target-attr.cc
8099 (riscv_target_attr_parser::parse_arch): Use char[] for
8100 std::unique_ptr to prevent mismatched new delete issue.
8101 (riscv_process_one_target_attr): Ditto.
8102 (riscv_process_target_attr): Ditto.
8104 2023-11-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8106 * config/riscv/vector-iterators.md: Refactor iterators.
8108 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
8110 * config/loongarch/sync.md (atomic_load<mode>): New template.
8112 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
8114 * config/loongarch/loongarch-def.h: Add comments.
8115 * config/loongarch/loongarch-opts.h (ISA_BASE_IS_LA64V110): Define macro.
8116 * config/loongarch/loongarch.cc (loongarch_memmodel_needs_rel_acq_fence):
8117 Remove redundant code implementations.
8118 * config/loongarch/sync.md (d): Added QI, HI support.
8119 (atomic_add<mode>): New template.
8120 (atomic_exchange<mode>_short): Likewise.
8121 (atomic_cas_value_strong<mode>_amcas): Likewise..
8122 (atomic_fetch_add<mode>_short): Likewise.
8124 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
8126 * config.gcc: Support LA664.
8127 * config/loongarch/genopts/loongarch-strings: Likewise.
8128 * config/loongarch/genopts/loongarch.opt.in: Likewise.
8129 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config): Likewise.
8130 * config/loongarch/loongarch-def.c: Likewise.
8131 * config/loongarch/loongarch-def.h (N_ISA_BASE_TYPES): Likewise.
8132 (ISA_BASE_LA64V110): Define macro.
8133 (N_ARCH_TYPES): Update value.
8134 (N_TUNE_TYPES): Update value.
8135 (CPU_LA664): New macro.
8136 * config/loongarch/loongarch-opts.cc (isa_default_abi): Likewise.
8137 (isa_base_compat_p): Likewise.
8138 * config/loongarch/loongarch-opts.h (TARGET_64BIT): This parameter is enabled
8139 when la_target.isa.base is equal to ISA_BASE_LA64V100 or ISA_BASE_LA64V110.
8140 (TARGET_uARCH_LA664): Define macro.
8141 * config/loongarch/loongarch-str.h (STR_CPU_LA664): Likewise.
8142 * config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width):
8144 * config/loongarch/loongarch.opt: Regenerate.
8146 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
8147 Xi Ruoyao <xry111@xry111.site>
8149 * config.in: Regenerate.
8150 * config/loongarch/loongarch-opts.h (HAVE_AS_SUPPORT_CALL36): Define macro.
8151 * config/loongarch/loongarch.cc (loongarch_legitimize_call_address):
8152 If binutils supports call36, the function call is not split over expand.
8153 * config/loongarch/loongarch.md: Add call36 generation code.
8154 * config/loongarch/predicates.md: Likewise.
8155 * configure: Regenerate.
8156 * configure.ac: Check whether binutils supports call36.
8158 2023-11-18 David Malcolm <dmalcolm@redhat.com>
8161 * Makefile.in (ANALYZER_OBJS): Add analyzer/infinite-loop.o.
8162 * doc/invoke.texi: Add -fdump-analyzer-infinite-loop and
8163 -Wanalyzer-infinite-loop. Add missing CWE link for
8164 -Wanalyzer-infinite-recursion.
8165 * timevar.def (TV_ANALYZER_INFINITE_LOOPS): New.
8167 2023-11-17 Robin Dapp <rdapp@ventanamicro.com>
8169 PR middle-end/112406
8170 PR middle-end/112552
8171 * tree-vect-loop.cc (vect_transform_reduction): Pass truth
8172 vectype for mask operand.
8174 2023-11-17 Jakub Jelinek <jakub@redhat.com>
8177 * gimplify.cc (expand_FALLTHROUGH_r): Use wi->removed_stmt after
8178 gsi_remove, change the way of passing fallthrough stmt at the end
8179 of sequence to expand_FALLTHROUGH. Diagnose IFN_FALLTHROUGH
8180 with GF_CALL_NOTHROW flag.
8181 (expand_FALLTHROUGH): Change loc into array of 2 location_t elts,
8182 don't test wi.callback_result, instead check whether first
8183 elt is not UNKNOWN_LOCATION and in that case pedwarn with the
8185 * gimple-walk.cc (walk_gimple_seq_mod): Clear wi->removed_stmt
8186 after the flag has been used.
8187 * internal-fn.def (FALLTHROUGH): Mention in comment the special
8188 meaning of the TREE_NOTHROW/GF_CALL_NOTHROW flag on the calls.
8190 2023-11-17 Jakub Jelinek <jakub@redhat.com>
8192 PR tree-optimization/112566
8193 PR tree-optimization/83171
8194 * match.pd (ctz(ext(X)) -> ctz(X), popcount(zext(X)) -> popcount(X),
8195 parity(ext(X)) -> parity(X), ffs(ext(X)) -> ffs(X)): New
8197 ( __builtin_ffs (X) == 0 -> X == 0): Use FFS rather than
8198 BUILT_IN_FFS BUILT_IN_FFSL BUILT_IN_FFSLL BUILT_IN_FFSIMAX.
8200 2023-11-17 Jakub Jelinek <jakub@redhat.com>
8202 PR tree-optimization/112374
8203 * tree-vect-loop.cc (check_reduction_path): Perform the cond_fn_p
8204 special case only if op_use_stmt == use_stmt, use as_a rather than
8205 dyn_cast in that case.
8207 2023-11-17 Richard Biener <rguenther@suse.de>
8210 2023-11-14 Richard Biener <rguenther@suse.de>
8212 PR tree-optimization/112281
8213 * tree-loop-distribution.cc (pg_add_dependence_edges):
8214 Preserve stmt order when the innermost loop has exact
8217 2023-11-17 Georg-Johann Lay <avr@gjlay.de>
8220 * config/avr/avr.cc (avr_asm_named_section) [AVR_SECTION_PROGMEM]:
8221 Only return some .progmem*.data section if the user did not
8222 specify a section attribute.
8223 (avr_section_type_flags) [avr_progmem_p]: Unset SECTION_NOTYPE
8224 in returned section flags.
8226 2023-11-17 Xi Ruoyao <xry111@xry111.site>
8228 * config/loongarch/lsx.md (copysign<mode>3): Allow operand[2] to
8229 be an reg_or_vector_same_val_operand. If it's a const vector
8230 with same negative elements, expand the copysign with a bitset
8231 instruction. Otherwise, force it into an register.
8232 * config/loongarch/lasx.md (copysign<mode>3): Likewise.
8234 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
8237 * config/rs6000/vsx.md (*vsx_le_mem_to_mem_mov_ti): New.
8239 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
8242 * config/rs6000/altivec.md (cbranchv16qi4): New expand pattern.
8243 * config/rs6000/rs6000.cc (rs6000_generate_compare): Generate
8244 insn sequence for V16QImode equality compare.
8245 * config/rs6000/rs6000.h (MOVE_MAX_PIECES): Define.
8246 (STORE_MAX_PIECES): Define.
8248 2023-11-17 Li Wei <liwei@loongson.cn>
8250 * config/loongarch/loongarch.h (CLZ_DEFINED_VALUE_AT_ZERO):
8252 (CTZ_DEFINED_VALUE_AT_ZERO): Same.
8254 2023-11-17 Richard Biener <rguenther@suse.de>
8256 * dwarf2out.cc (add_AT_die_ref): Assert we do not add
8257 a self-ref DW_AT_abstract_origin or DW_AT_specification.
8259 2023-11-17 Jiahao Xu <xujiahao@loongson.cn>
8261 * config/loongarch/loongarch.cc
8262 (loongarch_builtin_vectorization_cost): Adjust.
8264 2023-11-16 Andrew Pinski <pinskia@gmail.com>
8266 PR rtl-optimization/112483
8267 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
8268 Call simplify_unary_operation for NEG instead of
8271 2023-11-16 Edwin Lu <ewlu@rivosinc.com>
8274 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): update macro name
8276 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
8279 * config/i386/i386.md (*addqi_ext2<mode>_0):
8280 New define_insn_and_split pattern.
8281 (*subqi_ext2<mode>_0): Ditto.
8282 (*<code>qi_ext2<mode>_0): Ditto.
8284 2023-11-16 John David Anglin <danglin@gcc.gnu.org>
8286 PR rtl-optimization/112415
8287 * config/pa/pa.cc (pa_legitimate_address_p): Allow 14-bit
8288 displacements before reload. Simplify logic flow. Revise
8290 * config/pa/pa.h (TARGET_ELF64): New define.
8291 (INT14_OK_STRICT): Update define and comment.
8292 * config/pa/pa64-linux.h (TARGET_ELF64): Define.
8293 * config/pa/predicates.md (base14_operand): Don't check
8294 alignment of short displacements.
8295 (integer_store_memory_operand): Don't return true when
8296 reload_in_progress is true. Remove INT_5_BITS check.
8297 (floating_point_store_memory_operand): Don't return true when
8298 reload_in_progress is true. Use INT14_OK_STRICT to check
8299 whether long displacements are always okay.
8301 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
8304 * config/i386/i386.md (*<any_logic:code>qi_ext<mode>_1_slp):
8305 Fix generation of invalid RTX in split pattern.
8307 2023-11-16 David Malcolm <dmalcolm@redhat.com>
8309 * diagnostic.cc (diagnostic_context::set_option_hooks): Add
8311 * diagnostic.h (diagnostic_context::option_enabled_p): Update for
8312 move of m_lang_mask.
8313 (diagnostic_context::set_option_hooks): Add "lang_mask" param.
8314 (diagnostic_context::get_lang_mask): New.
8315 (diagnostic_context::m_lang_mask): Move into m_option_callbacks,
8316 thus making private.
8317 * lto-wrapper.cc (main): Update for new lang_mask param of
8319 * toplev.cc (init_asm_output): Use get_lang_mask.
8320 (general_init): Move initialization of global_dc's lang_mask to
8321 new lang_mask param of set_option_hooks.
8323 2023-11-16 Tamar Christina <tamar.christina@arm.com>
8325 PR tree-optimization/111878
8326 * tree-vect-loop-manip.cc (find_loop_location): Skip edges check if
8329 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
8331 * config.gcc (riscv): Add riscv-target-attr.o.
8332 * config/riscv/riscv-protos.h (riscv_declare_function_size) New.
8333 (riscv_option_valid_attribute_p): New.
8334 (riscv_override_options_internal): New.
8335 (struct riscv_tune_info): New.
8336 (riscv_parse_tune): New.
8337 * config/riscv/riscv-target-attr.cc
8338 (class riscv_target_attr_parser): New.
8339 (struct riscv_attribute_info): New.
8340 (riscv_attributes): New.
8341 (riscv_target_attr_parser::parse_arch): New.
8342 (riscv_target_attr_parser::handle_arch): New.
8343 (riscv_target_attr_parser::handle_cpu): New.
8344 (riscv_target_attr_parser::handle_tune): New.
8345 (riscv_target_attr_parser::update_settings): New.
8346 (riscv_process_one_target_attr): New.
8347 (num_occurences_in_str): New.
8348 (riscv_process_target_attr): New.
8349 (riscv_option_valid_attribute_p): New.
8350 * config/riscv/riscv.cc: Include target-globals.h and
8352 (struct riscv_tune_info): Move to riscv-protos.h.
8353 (get_tune_str): New.
8354 (riscv_parse_tune): New parameter null_p.
8355 (riscv_declare_function_size): New.
8356 (riscv_option_override): Build target_option_default_node and
8357 target_option_current_node.
8358 (riscv_save_restore_target_globals): New.
8359 (riscv_option_restore): New.
8360 (riscv_previous_fndecl): New.
8361 (riscv_set_current_function): Apply the target attribute.
8362 (TARGET_OPTION_RESTORE): Define.
8363 (TARGET_OPTION_VALID_ATTRIBUTE_P): Ditto.
8364 * config/riscv/riscv.h (SWITCHABLE_TARGET): Define to 1.
8365 (ASM_DECLARE_FUNCTION_SIZE) Define.
8366 * config/riscv/riscv.opt (mtune=): Add Save attribute.
8369 * config/riscv/t-riscv: Add build rule for riscv-target-attr.o
8370 * doc/extend.texi: Add doc for target attribute.
8372 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
8375 * config/riscv/riscv.cc (riscv_save_return_addr_reg_p): Check ra
8378 2023-11-16 liuhongt <hongtao.liu@intel.com>
8381 * config/i386/mmx.md (*vec_dup<mode>): Extend for V4HI and
8384 2023-11-16 Jakub Jelinek <jakub@redhat.com>
8387 * config/i386/i386.md
8388 (mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi):
8389 Verify in define_peephole2 that operands[2] dies or is overwritten
8390 at the end of multiplication.
8392 2023-11-16 Jakub Jelinek <jakub@redhat.com>
8394 PR tree-optimization/112536
8395 * tree-vect-slp.cc (arg0_map): New variable.
8396 (vect_get_operand_map): For IFN_CLZ or IFN_CTZ, return arg0_map.
8398 2023-11-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8400 PR middle-end/112554
8401 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
8402 Clear SELECT_VL_P for non-partial vectorization.
8404 2023-11-16 Hongyu Wang <hongyu.wang@intel.com>
8406 * config/i386/sse.md (vec_extract_hi_<mode>): Add noavx512vl
8407 alternative with attr addr gpr16 and "jm" constraint.
8408 (vec_extract_hi_<mode>): Likewise for SF vector modes.
8409 (@vec_extract_hi_<mode>): Likewise.
8410 (*vec_extractv2ti): Likewise.
8411 (vec_set_hi_<mode><mask_name>): Likewise.
8412 * config/i386/mmx.md (@sse4_1_insertps_<mode>): Correct gpr16 attr for
8415 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
8418 * config/i386/i386.md (*movstrictqi_ext<mode>_1): New insn pattern.
8419 (*addqi_ext<mode>_2_slp): New define_insn_and_split pattern.
8420 (*subqi_ext<mode>_2_slp): Ditto.
8421 (*<any_logic:code>qi_ext<mode>_2_slp): Ditto.
8423 2023-11-15 Patrick O'Neill <patrick@rivosinc.com>
8425 * common/config/riscv/riscv-common.cc
8426 (riscv_subset_list::parse_std_ext): Emit an error and skip to
8427 the next extension when a non-canonical ordering is detected.
8429 2023-11-15 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
8431 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text):
8432 Revert using the macro CAN_HAVE_LOCATION_P.
8434 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8437 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Insert
8438 local vsetvl info before LCM suggested one.
8439 Tested-by: Patrick O'Neill <patrick@rivosinc.com> # pre-commit-CI #679
8440 Co-developed-by: Vineet Gupta <vineetg@rivosinc.com>
8442 2023-11-15 Vineet Gupta <vineetg@rivosinc.com>
8444 * config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New.
8445 * (riscv_extend_comparands): Call New function on operands.
8447 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
8449 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
8450 Add "&& " before "reload_completed" in split condition.
8451 (*subqi_ext<mode>_1_slp): Ditto.
8452 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
8454 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
8457 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
8458 Correct operand numbers in split pattern. Replace !Q constraint
8459 of operand 1 with !qm. Add insn constrain.
8460 (*subqi_ext<mode>_1_slp): Ditto.
8461 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
8463 2023-11-15 Thomas Schwinge <thomas@codesourcery.com>
8465 * doc/extend.texi (Nvidia PTX Built-in Functions): Fix
8466 copy'n'paste-o in '__builtin_nvptx_brev' description.
8468 2023-11-15 Roger Sayle <roger@nextmovesoftware.com>
8469 Thomas Schwinge <thomas@codesourcery.com>
8471 * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete.
8472 (bitrev<mode>2): Represent using bitreverse.
8474 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
8475 Andrew Jenner <andrew@codesourcery.com>
8477 * config/gcn/constraints.md: Add "a" AVGPR constraint.
8478 * config/gcn/gcn-valu.md (*mov<mode>): Add AVGPR alternatives.
8479 (*mov<mode>_4reg): Likewise.
8480 (@mov<mode>_sgprbase): Likewise.
8481 (gather<mode>_insn_1offset<exec>): Likewise.
8482 (gather<mode>_insn_1offset_ds<exec>): Likewise.
8483 (gather<mode>_insn_2offsets<exec>): Likewise.
8484 (scatter<mode>_expr<exec_scatter>): Likewise.
8485 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
8486 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
8487 * config/gcn/gcn.cc (MAX_NORMAL_AVGPR_COUNT): Define.
8488 (gcn_class_max_nregs): Handle AVGPR_REGS and ALL_VGPR_REGS.
8489 (gcn_hard_regno_mode_ok): Likewise.
8490 (gcn_regno_reg_class): Likewise.
8491 (gcn_spill_class): Allow spilling to AVGPRs on TARGET_CDNA1_PLUS.
8492 (gcn_sgpr_move_p): Handle AVGPRs.
8493 (gcn_secondary_reload): Reload AVGPRs via VGPRs.
8494 (gcn_conditional_register_usage): Handle AVGPRs.
8495 (gcn_vgpr_equivalent_register_operand): New function.
8496 (gcn_valid_move_p): Check for validity of AVGPR moves.
8497 (gcn_compute_frame_offsets): Handle AVGPRs.
8498 (gcn_memory_move_cost): Likewise.
8499 (gcn_register_move_cost): Likewise.
8500 (gcn_vmem_insn_p): Handle TYPE_VOP3P_MAI.
8501 (gcn_md_reorg): Handle AVGPRs.
8502 (gcn_hsa_declare_function_name): Likewise.
8503 (print_reg): Likewise.
8504 (gcn_dwarf_register_number): Likewise.
8505 * config/gcn/gcn.h (FIRST_AVGPR_REG): Define.
8506 (AVGPR_REGNO): Define.
8507 (LAST_AVGPR_REG): Define.
8508 (SOFT_ARG_REG): Update.
8509 (FRAME_POINTER_REGNUM): Update.
8510 (DWARF_LINK_REGISTER): Update.
8511 (FIRST_PSEUDO_REGISTER): Update.
8512 (AVGPR_REGNO_P): Define.
8513 (enum reg_class): Add AVGPR_REGS and ALL_VGPR_REGS.
8514 (REG_CLASS_CONTENTS): Add new register classes and add entries for
8515 AVGPRs to all classes.
8516 (REGISTER_NAMES): Add AVGPRs.
8517 * config/gcn/gcn.md (FIRST_AVGPR_REG, LAST_AVGPR_REG): Define.
8518 (AP_REGNUM, FP_REGNUM): Update.
8519 (define_attr "type"): Add vop3p_mai.
8520 (define_attr "unit"): Handle vop3p_mai.
8521 (define_attr "gcn_version"): Add "cdna2".
8522 (define_attr "enabled"): Handle cdna2.
8523 (*mov<mode>_insn): Add AVGPR alternatives.
8524 (*movti_insn): Likewise.
8525 * config/gcn/mkoffload.cc (isa_has_combined_avgprs): New.
8526 (process_asm): Process avgpr_count.
8527 * config/gcn/predicates.md (gcn_avgpr_register_operand): New.
8528 (gcn_avgpr_hard_register_operand): New.
8529 * doc/md.texi: Document the "a" constraint.
8531 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
8533 * config/gcn/gcn-valu.md (mov<mode>_sgprbase): Add @ modifier.
8534 (reload_in<mode>): Delete.
8535 (reload_out<mode>): Delete.
8536 * config/gcn/gcn.cc (CODE_FOR): Delete.
8537 (get_code_for_##PREFIX##vN##SUFFIX): Delete.
8538 (CODE_FOR_OP): Delete.
8539 (get_code_for_##PREFIX): Delete.
8540 (gcn_secondary_reload): Replace "get_code_for" with "code_for".
8542 2023-11-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8544 * config/s390/t-s390: Generate s390-gen-builtins.h without
8547 2023-11-15 Richard Biener <rguenther@suse.de>
8549 PR tree-optimization/112282
8550 * tree-if-conv.cc (ifcvt_hoist_invariants): Only hoist from
8553 2023-11-15 Richard Biener <rguenther@suse.de>
8555 * tree-vect-slp.cc (vect_slp_region): Also clear visited flag when
8556 we skipped an instance due to -fdbg-cnt.
8558 2023-11-15 Xi Ruoyao <xry111@xry111.site>
8560 * config/loongarch/loongarch.cc
8561 (loongarch_memmodel_needs_release_fence): Remove.
8562 (loongarch_cas_failure_memorder_needs_acquire): New static
8564 (loongarch_print_operand): Redefine 'G' for the barrier on CAS
8566 * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
8567 Remove the redundant barrier before the LL instruction, and
8568 emit an acquire barrier on failure if needed by
8570 (atomic_cas_value_cmp_and_7_<mode>): Likewise.
8571 (atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier
8572 before the LL instruction.
8573 (atomic_cas_value_sub_7_<mode>): Likewise.
8574 (atomic_cas_value_and_7_<mode>): Likewise.
8575 (atomic_cas_value_xor_7_<mode>): Likewise.
8576 (atomic_cas_value_or_7_<mode>): Likewise.
8577 (atomic_cas_value_nand_7_<mode>): Likewise.
8578 (atomic_cas_value_exchange_7_<mode>): Likewise.
8580 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8582 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): New function.
8583 (expand_vec_init): Add trailing optimization.
8585 2023-11-15 Pan Li <pan2.li@intel.com>
8587 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
8588 Add inner_mode mask arg for mask int mode.
8589 (get_repeating_sequence_dup_machine_mode): Add mask_bit_mode arg
8590 to get the good enough vector int mode on precision.
8591 (expand_vector_init_merge_repeating_sequence): Pass required args
8594 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8597 * config/riscv/riscv.cc (riscv_legitimate_address_p): Disallow RVV modes base address.
8599 2023-11-15 David Malcolm <dmalcolm@redhat.com>
8601 * json.cc (selftest::assert_print_eq): Add "loc" param and use
8603 (ASSERT_PRINT_EQ): New macro.
8604 (selftest::test_writing_objects): Use ASSERT_PRINT_EQ to capture
8605 source location of assertion.
8606 (selftest::test_writing_arrays): Likewise.
8607 (selftest::test_writing_float_numbers): Likewise.
8608 (selftest::test_writing_integer_numbers): Likewise.
8609 (selftest::test_writing_strings): Likewise.
8610 (selftest::test_writing_literals): Likewise.
8612 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8615 * doc/invoke.texi (Static Analyzer Options): Add the six
8616 -Wanalyzer-tainted-* warnings. Update documentation of each
8617 warning to reflect removed requirement to use
8618 -fanalyzer-checker=taint. Remove discussion of
8619 -fanalyzer-checker=taint.
8621 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8623 * diagnostic-format-json.cc
8624 (json_output_format::on_end_diagnostic): Update calls to m_context
8625 callbacks to use member functions; tighten up scopes.
8626 * diagnostic-format-sarif.cc (sarif_builder::make_result_object):
8628 (sarif_builder::make_reporting_descriptor_object_for_warning):
8630 * diagnostic.cc (diagnostic_context::initialize): Update for
8631 callbacks being moved into m_option_callbacks and being renamed.
8632 (diagnostic_context::set_option_hooks): New.
8633 (diagnostic_option_classifier::classify_diagnostic): Update call
8634 to global_dc->m_option_enabled to use option_enabled_p.
8635 (diagnostic_context::print_option_information): Update calls to
8636 m_context callbacks to use member functions; tighten up scopes.
8637 (diagnostic_context::diagnostic_enabled): Likewise.
8638 * diagnostic.h (diagnostic_option_enabled_cb): New typedef.
8639 (diagnostic_make_option_name_cb): New typedef.
8640 (diagnostic_make_option_url_cb): New typedef.
8641 (diagnostic_context::option_enabled_p): New.
8642 (diagnostic_context::make_option_name): New.
8643 (diagnostic_context::make_option_url): New.
8644 (diagnostic_context::set_option_hooks): New decl.
8645 (diagnostic_context::m_option_enabled): Rename to
8646 m_option_enabled_cb and move within m_option_callbacks, using
8648 (diagnostic_context::m_option_state): Move within
8650 (diagnostic_context::m_option_name): Rename to
8651 m_make_option_name_cb and move within m_option_callbacks, using
8653 (diagnostic_context::m_get_option_url): Likewise, renaming to
8654 m_make_option_url_cb.
8655 * lto-wrapper.cc (print_lto_docs_link): Update call to m_context
8656 callback to use member function.
8657 (main): Use diagnostic_context::set_option_hooks.
8658 * opts-diagnostic.h (option_name): Make context param const.
8659 (get_option_url): Likewise.
8660 * opts.cc (option_name): Likewise.
8661 (get_option_url): Likewise.
8662 * toplev.cc (general_init): Use
8663 diagnostic_context::set_option_hooks.
8665 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8667 * selftest-diagnostic.cc
8668 (test_diagnostic_context::test_diagnostic_context): Use
8669 diagnostic_start_span.
8670 * tree-diagnostic-path.cc (struct event_range): Likewise.
8672 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8674 * diagnostic-show-locus.cc (diagnostic_context::show_locus):
8675 Update for renaming of text callbacks fields.
8676 * diagnostic.cc (diagnostic_context::initialize): Likewise.
8677 * diagnostic.h (class diagnostic_context): Add "friend" for
8678 accessors to m_text_callbacks.
8679 (diagnostic_context::m_text_callbacks): Make private, and add an
8680 "m_" prefix to field names.
8681 (diagnostic_starter): Convert from macro to inline function.
8682 (diagnostic_start_span): New.
8683 (diagnostic_finalizer): Convert from macro to inline function.
8685 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8687 * diagnostic.h (diagnostic_ready_p): Convert from macro to inline
8690 2023-11-14 Uros Bizjak <ubizjak@gmail.com>
8693 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
8694 New define_insn_and_split pattern.
8695 (*subqi_ext<mode>_1_slp): Ditto.
8696 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
8698 2023-11-14 Andrew Stubbs <ams@codesourcery.com>
8701 * expr.cc (store_constructor): Use OPTAB_WIDEN for mask adjustment.
8703 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8705 * diagnostic-format-sarif.cc (sarif_builder::get_sarif_column):
8706 Use m_context's file_cache.
8707 (sarif_builder::maybe_make_artifact_content_object): Likewise.
8708 (sarif_builder::get_source_lines): Likewise.
8709 * diagnostic-show-locus.cc
8710 (exploc_with_display_col::exploc_with_display_col): Add file_cache
8712 (layout::m_file_cache): New field.
8713 (make_range): Add file_cache param.
8714 (selftest::test_layout_range_for_single_point): Create and use a
8715 temporary file_cache.
8716 (selftest::test_layout_range_for_single_line): Likewise.
8717 (selftest::test_layout_range_for_multiple_lines): Likewise.
8718 (layout::layout): Initialize m_file_cache from the context and use it.
8719 (layout::maybe_add_location_range): Use m_file_cache.
8720 (layout::calculate_x_offset_display): Likewise.
8721 (get_affected_range): Add file_cache param.
8722 (get_printed_columns): Likewise.
8723 (line_corrections::line_corrections): Likewwise.
8724 (line_corrections::m_file_cache): New field.
8725 (source_line::source_line): Add file_cache param.
8726 (line_corrections::add_hint): Use m_file_cache.
8727 (layout::print_trailing_fixits): Likewise.
8728 (layout::print_line): Likewise.
8729 (selftest::test_layout_x_offset_display_utf8): Create and use a
8730 temporary file_cache.
8731 (selftest::test_layout_x_offset_display_tab): Likewise.
8732 (selftest::test_diagnostic_show_locus_one_liner_utf8): Likewise.
8733 (selftest::test_add_location_if_nearby): Pass global_dc's
8734 file_cache to temp_source_file ctor.
8735 (selftest::test_overlapped_fixit_printing): Create and use a
8736 temporary file_cache.
8737 (selftest::test_overlapped_fixit_printing_utf8): Likewise.
8738 (selftest::test_overlapped_fixit_printing_2): Use dc's file_cache.
8739 * diagnostic.cc (diagnostic_context::initialize): Always create a
8741 (diagnostic_context::initialize_input_context): Assume
8742 m_file_cache has already been created.
8743 (diagnostic_context::create_edit_context): Pass m_file_cache to
8745 (convert_column_unit): Add file_cache param.
8746 (diagnostic_context::converted_column): Use context's file_cache.
8747 (print_parseable_fixits): Add file_cache param.
8748 (diagnostic_context::report_diagnostic): Use context's file_cache.
8749 (selftest::test_print_parseable_fixits_none): Create and use a
8750 temporary file_cache.
8751 (selftest::test_print_parseable_fixits_insert): Likewise.
8752 (selftest::test_print_parseable_fixits_remove): Likewise.
8753 (selftest::test_print_parseable_fixits_replace): Likewise.
8754 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
8756 * diagnostic.h (diagnostic_context::file_cache_init): Delete.
8757 (diagnostic_context::get_file_cache): Convert return type from
8758 pointer to reference.
8759 * edit-context.cc (edited_file::get_file_cache): New.
8760 (edited_file::m_edit_context): New.
8761 (edit_context::edit_context): Add file_cache param.
8762 (edit_context::get_or_insert_file): Pass this to edited_file's
8764 (edited_file::edited_file): Add edit_context param.
8765 (edited_file::print_content): Use get_file_cache.
8766 (edited_file::print_diff_hunk): Likewise.
8767 (edited_file::print_run_of_changed_lines): Likewise.
8768 (edited_file::get_or_insert_line): Likewise.
8769 (edited_file::get_num_lines): Likewise.
8770 (edited_line::edited_line): Pass in file_cache and use it.
8771 (selftest::test_get_content): Create and use a
8772 temporary file_cache.
8773 (selftest::test_applying_fixits_insert_before): Likewise.
8774 (selftest::test_applying_fixits_insert_after): Likewise.
8775 (selftest::test_applying_fixits_insert_after_at_line_end):
8777 (selftest::test_applying_fixits_insert_after_failure): Likewise.
8778 (selftest::test_applying_fixits_insert_containing_newline):
8780 (selftest::test_applying_fixits_growing_replace): Likewise.
8781 (selftest::test_applying_fixits_shrinking_replace): Likewise.
8782 (selftest::test_applying_fixits_replace_containing_newline):
8784 (selftest::test_applying_fixits_remove): Likewise.
8785 (selftest::test_applying_fixits_multiple): Likewise.
8786 (selftest::test_applying_fixits_multiple_lines): Likewise.
8787 (selftest::test_applying_fixits_modernize_named_init): Likewise.
8788 (selftest::test_applying_fixits_modernize_named_init): Likewise.
8789 (selftest::test_applying_fixits_unreadable_file): Likewise.
8790 (selftest::test_applying_fixits_line_out_of_range): Likewise.
8791 (selftest::test_applying_fixits_column_validation): Likewise.
8792 (selftest::test_applying_fixits_column_validation): Likewise.
8793 (selftest::test_applying_fixits_column_validation): Likewise.
8794 (selftest::test_applying_fixits_column_validation): Likewise.
8795 * edit-context.h (edit_context::edit_context): Add file_cache
8797 (edit_context::get_file_cache): New.
8798 (edit_context::m_file_cache): New.
8799 * final.cc: Include "diagnostic.h".
8800 (asm_show_source): Use global_dc's file_cache.
8801 * gcc-rich-location.cc (blank_line_before_p): Add file_cache
8803 (use_new_line): Likewise.
8804 (gcc_rich_location::add_fixit_insert_formatted): Use global dc's
8806 * input.cc (diagnostic_file_cache_init): Delete.
8807 (diagnostic_context::file_cache_init): Delete.
8808 (diagnostics_file_cache_forcibly_evict_file): Delete.
8809 (file_cache::missing_trailing_newline_p): New.
8810 (file_cache::evicted_cache_tab_entry): Don't call
8811 diagnostic_file_cache_init.
8812 (location_get_source_line): Delete.
8813 (get_source_text_between): Add file_cache param.
8814 (get_source_file_content): Delete.
8815 (location_missing_trailing_newline): Delete.
8816 (location_compute_display_column): Add file_cache param.
8817 (dump_location_info): Create and use temporary file_cache.
8818 (get_substring_ranges_for_loc): Add file_cache param.
8819 (get_location_within_string): Likewise.
8820 (get_source_range_for_char): Likewise.
8821 (get_num_source_ranges_for_substring): Likewise.
8822 (selftest::test_reading_source_line): Create and use temporary
8824 (selftest::lexer_test::m_file_cache): New field.
8825 (selftest::assert_char_at_range): Use test.m_file_cache.
8826 (selftest::assert_num_substring_ranges): Likewise.
8827 (selftest::assert_has_no_substring_ranges): Likewise.
8828 (selftest::test_lexer_string_locations_concatenation_2): Likewise.
8829 * input.h (class file_cache): New forward decl.
8830 (location_compute_display_column): Add file_cache param.
8831 (location_get_source_line): Delete.
8832 (get_source_text_between): Add file_cache param.
8833 (get_source_file_content): Delete.
8834 (location_missing_trailing_newline): Delete.
8835 (file_cache::missing_trailing_newline_p): New decl.
8836 (diagnostics_file_cache_forcibly_evict_file): Delete.
8837 * selftest.cc (named_temp_file::named_temp_file): Add file_cache
8839 (named_temp_file::~named_temp_file): Optionally evict the file
8840 from the given file_cache.
8841 (temp_source_file::temp_source_file): Add file_cache param.
8842 * selftest.h (class file_cache): New forward decl.
8843 (named_temp_file::named_temp_file): Add file_cache param.
8844 (named_temp_file::m_file_cache): New field.
8845 (temp_source_file::temp_source_file): Add file_cache param.
8846 * substring-locations.h (get_location_within_string): Add
8849 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8851 * diagnostic-format-json.cc: Use type-specific "set_*" functions
8852 of json::object to avoid naked new of json value subclasses.
8853 * diagnostic-format-sarif.cc: Likewise.
8854 * gcov.cc: Likewise.
8855 * json.cc (object::set_string): New.
8856 (object::set_integer): New.
8857 (object::set_float): New.
8858 (object::set_bool): New.
8859 (selftest::test_writing_objects): Use object::set_string.
8860 * json.h (object::set_string): New decl.
8861 (object::set_integer): New decl.
8862 (object::set_float): New decl.
8863 (object::set_bool): New decl.
8864 * optinfo-emit-json.cc: Use type-specific "set_*" functions of
8865 json::object to avoid naked new of json value subclasses.
8866 * timevar.cc: Likewise.
8867 * tree-diagnostic-path.cc: Likewise.
8869 2023-11-14 Andrew MacLeod <amacleod@redhat.com>
8871 PR tree-optimization/112509
8872 * tree-vrp.cc (find_case_label_range): Create range from case labels.
8874 2023-11-14 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8876 * config/s390/s390-builtin-types.def: Add/remove types.
8877 * config/s390/s390-builtins.def (s390_vec_scatter_element_flt):
8878 The type for the offset should be UV4SI instead of V4SF.
8880 2023-11-14 Saurabh Jha <saurabh.jha@arm.com>
8883 * config/arm/arm.cc (mve_vector_mem_operand): Add a REG_P check for INC
8886 2023-11-14 Richard Biener <rguenther@suse.de>
8888 PR tree-optimization/111233
8889 PR tree-optimization/111652
8890 PR tree-optimization/111727
8891 PR tree-optimization/111838
8892 PR tree-optimization/112113
8893 * tree-ssa-loop-split.cc (patch_loop_exit): Get the new
8894 guard code instead of the old guard stmt.
8895 (split_loop): Adjust.
8897 2023-11-14 Richard Biener <rguenther@suse.de>
8899 * tree-loop-distribution.cc (loop_distribution::data_dep_in_cycle_p):
8900 Consider all loops in the nest when looking for
8901 lambda_vector_zerop.
8903 2023-11-14 Richard Biener <rguenther@suse.de>
8905 PR tree-optimization/112281
8906 * tree-loop-distribution.cc (pg_add_dependence_edges):
8907 Preserve stmt order when the innermost loop has exact
8910 2023-11-14 Jakub Jelinek <jakub@redhat.com>
8914 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): Move
8915 operands[1] aka low part of input rather than operands[3] aka high
8916 part of input to output if not the same register.
8918 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
8920 * config.gcc: Add s390-gen-builtins.h to target_gtfiles.
8921 * config/s390/s390-builtins.h (s390_builtin_types)
8922 (s390_builtin_fn_types, s390_builtin_decls): Add GTY marker.
8923 * config/s390/t-s390 (EXTRA_GTYPE_DEPS): Add s390-gen-builtins.h.
8924 Add build rule for s390-gen-builtins.h.
8926 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
8928 * config/s390/s390-c.cc (s390_fn_types_compatible): Add a check
8929 for error_mark_node.
8931 2023-11-14 Jakub Jelinek <jakub@redhat.com>
8934 * builtins.def (BUILT_IN_CLZG, BUILT_IN_CTZG, BUILT_IN_CLRSBG,
8935 BUILT_IN_FFSG, BUILT_IN_PARITYG, BUILT_IN_POPCOUNTG): New
8937 * builtins.cc (fold_builtin_bit_query): New function.
8938 (fold_builtin_1): Use it for
8939 BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
8940 (fold_builtin_2): Use it for BUILT_IN_{CLZ,CTZ}G.
8941 * fold-const-call.cc: Fix comment typo on tm.h inclusion.
8942 (fold_const_call_ss): Handle
8943 CFN_BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
8944 (fold_const_call_sss): New function.
8945 (fold_const_call_1): Call it for 2 argument functions returning
8946 scalar when passed 2 INTEGER_CSTs.
8947 * genmatch.cc (cmp_operand): For function calls also compare
8948 number of arguments.
8949 (fns_cmp): New function.
8950 (dt_node::gen_kids): Sort fns and generic_fns.
8951 (dt_node::gen_kids_1): Handle fns with the same id but different
8952 number of arguments.
8953 * match.pd (CLZ simplifications): Drop checks for defined behavior
8954 at zero. Add variant of simplifications for IFN_CLZ with 2 arguments.
8955 (CTZ simplifications): Drop checks for defined behavior at zero,
8956 don't optimize precisions above MAX_FIXED_MODE_SIZE. Add variant of
8957 simplifications for IFN_CTZ with 2 arguments.
8958 (a != 0 ? CLZ(a) : CST -> .CLZ(a)): Use TREE_TYPE (@3) instead of
8959 type, add BITINT_TYPE handling, create 2 argument IFN_CLZ rather than
8960 one argument. Add variant for matching CLZ with 2 arguments.
8961 (a != 0 ? CTZ(a) : CST -> .CTZ(a)): Similarly.
8962 * gimple-lower-bitint.cc (bitint_large_huge::lower_bit_query): New
8964 (bitint_large_huge::lower_call): Use it for IFN_{CLZ,CTZ,CLRSB,FFS}
8965 and IFN_{PARITY,POPCOUNT} calls.
8966 * gimple-range-op.cc (cfn_clz::fold_range): Don't check
8967 CLZ_DEFINED_VALUE_AT_ZERO for m_gimple_call_internal_p, instead
8968 assume defined value at zero if the call has 2 arguments and use
8969 second argument value for that case.
8970 (cfn_ctz::fold_range): Similarly.
8971 (gimple_range_op_handler::maybe_builtin_call): Use op_cfn_clz_internal
8972 or op_cfn_ctz_internal only if internal fn call has 2 arguments and
8973 set m_op2 in that case.
8974 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern,
8975 vect_recog_popcount_clz_ctz_ffs_pattern): For value defined at zero
8976 use second argument of calls if present, otherwise assume UB at zero,
8977 create 2 argument .CLZ/.CTZ calls if needed.
8978 * tree-vect-stmts.cc (vectorizable_call): Handle 2 argument .CLZ/.CTZ
8980 * tree-ssa-loop-niter.cc (build_cltz_expr): Create 2 argument
8981 .CLZ/.CTZ calls if needed.
8982 * tree-ssa-forwprop.cc (simplify_count_trailing_zeroes): Create 2
8983 argument .CTZ calls if needed.
8984 * tree-ssa-phiopt.cc (cond_removal_in_builtin_zero_pattern): Handle
8985 2 argument .CLZ/.CTZ calls, handle BITINT_TYPE, create 2 argument
8987 * doc/extend.texi (__builtin_clzg, __builtin_ctzg, __builtin_clrsbg,
8988 __builtin_ffsg, __builtin_parityg, __builtin_popcountg): Document.
8990 2023-11-14 Xi Ruoyao <xry111@xry111.site>
8993 * config/loongarch/genopts/loongarch.opt.in: Add
8994 -m[no]-pass-relax-to-as. Change the default of -m[no]-relax to
8995 account conditional branch relaxation support status.
8996 * config/loongarch/loongarch.opt: Regenerate.
8997 * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
8998 the assembler supports conditional branch relaxation.
8999 * configure: Regenerate.
9000 * config.in: Regenerate. Note that there are some unrelated
9001 changes introduced by r14-5424 (which does not contain a
9002 config.in regeneration).
9003 * config/loongarch/loongarch-opts.h
9004 (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
9005 * config/loongarch/loongarch-driver.h (ASM_MRELAX_DEFAULT):
9007 (ASM_MRELAX_SPEC): Define.
9008 (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
9009 * config/loongarch/loongarch.cc: Take the setting of
9010 -m[no-]relax into account when determining the default of
9012 * doc/invoke.texi: Document -m[no-]relax and
9013 -m[no-]pass-mrelax-to-as for LoongArch. Update the default
9014 value of -mexplicit-relocs=.
9016 2023-11-14 liuhongt <hongtao.liu@intel.com>
9018 PR tree-optimization/112496
9019 * tree-vect-loop.cc (vectorizable_nonlinear_induction): Return
9020 false when !tree_nop_conversion_p (TREE_TYPE (vectype),
9021 TREE_TYPE (init_expr)).
9023 2023-11-14 Xi Ruoyao <xry111@xry111.site>
9025 * config/loongarch/sync.md (mem_thread_fence): Remove redundant
9027 (mem_thread_fence_1): Emit finer-grained DBAR hints for
9028 different memory models, instead of 0.
9030 2023-11-14 Jakub Jelinek <jakub@redhat.com>
9032 PR middle-end/112511
9033 * tree.cc (type_contains_placeholder_1): Handle BITINT_TYPE like
9036 2023-11-14 Jakub Jelinek <jakub@redhat.com>
9037 Hu, Lin1 <lin1.hu@intel.com>
9040 * config/i386/sse.md (avx512vl_shuf_<shuffletype>32x4_1<mask_name>,
9041 <mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>): Add
9042 alternative with just x instead of v constraints and xjm instead of
9043 vm and use vblendps as optimization only with that alternative.
9045 2023-11-14 liuhongt <hongtao.liu@intel.com>
9047 PR tree-optimization/105735
9048 PR tree-optimization/111972
9049 * tree-scalar-evolution.cc
9050 (analyze_and_compute_bitop_with_inv_effect): Handle bitop with
9053 2023-11-13 Arsen Arsenović <arsen@aarsen.me>
9055 * configure: Regenerate.
9056 * aclocal.m4: Regenerate.
9057 * Makefile.in (LIBDEPS): Remove (potential) ./ prefix from
9059 * doc/install.texi: Document new (notable) flags added by the
9060 optional gettext tree and by AM_GNU_GETTEXT. Document libintl/libc
9061 with gettext dependency.
9063 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
9065 * config/i386/i386-expand.h (gen_pushfl): New prototype.
9067 * config/i386/i386-expand.cc (ix86_expand_builtin)
9068 [case IX86_BUILTIN_READ_FLAGS]: Use gen_pushfl.
9069 [case IX86_BUILTIN_WRITE_FLAGS]: Use gen_popfl.
9070 * config/i386/i386.cc (gen_pushfl): New function.
9072 * config/i386/i386.md (unspec): Add UNSPEC_PUSHFL and UNSPEC_POPFL.
9073 (@pushfl<mode>2): Rename from *pushfl<mode>2.
9074 Rewrite as unspec using UNSPEC_PUSHFL.
9075 (@popfl<mode>1): Rename from *popfl<mode>1.
9076 Rewrite as unspec using UNSPEC_POPFL.
9078 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
9081 * config/i386/i386.cc (ix86_cc_mode) [default]: Return CCmode.
9083 2023-11-13 Robin Dapp <rdapp@ventanamicro.com>
9085 * config/riscv/riscv-vsetvl.cc (source_equal_p): Use pointer
9086 equality for REG_EQUAL.
9088 2023-11-13 Richard Biener <rguenther@suse.de>
9090 PR tree-optimization/112495
9091 * tree-data-ref.cc (runtime_alias_check_p): Reject checks
9092 between different address spaces.
9094 2023-11-13 Richard Biener <rguenther@suse.de>
9096 PR middle-end/112487
9097 * tree-inline.cc (setup_one_parameter): When the parameter
9098 is unused only insert a debug bind when there's not a gross
9099 mismatch in value and declared parameter type. Do not assert
9100 there effectively isn't.
9102 2023-11-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9104 * config/riscv/riscv-v.cc
9105 (rvv_builder::combine_sequence_use_merge_profitable_p): New function.
9106 (expand_vector_init_merge_combine_sequence): Ditto.
9107 (expand_vec_init): Adapt for new optimization.
9109 2023-11-13 liuhongt <hongtao.liu@intel.com>
9111 * config/i386/i386-expand.cc
9112 (ix86_expand_vector_init_duplicate): Handle V4HF/V4BF and
9114 (ix86_expand_vector_init_one_nonzero): Ditto.
9115 (ix86_expand_vector_init_one_var): Ditto.
9116 (ix86_expand_vector_init_general): Ditto.
9117 (ix86_expand_vector_set_var): Ditto.
9118 (ix86_expand_vector_set): Ditto.
9119 (ix86_expand_vector_extract): Ditto.
9120 * config/i386/mmx.md
9121 (mmxdoublevecmode): Extend to V4HF/V4BF/V2HF/V2BF.
9122 (*mmx_pinsrw): Extend to V4FI_64, add a new alternative (&x,
9123 x, x), add a new define_split after the pattern.
9124 (*mmx_pextrw<mode>): New define_insn.
9125 (mmx_pshufw_1): Rename to ..
9126 (mmx_pshufw<mode>_1): .. this, extend to V4FI_64.
9127 (*mmx_pblendw64): Extend to V4FI_64.
9128 (*vec_dup<mode>): New define_insn.
9129 (vec_setv4hi): Rename to ..
9130 (vec_set<mode>): .. this, and extend to V4FI_64
9131 (vec_extractv4hihi): Rename to ..
9132 (vec_extract<mode><mmxscalarmodelower>): .. this, and extend
9134 (vec_init<mode><mmxscalarmodelower>): New define_insn.
9135 (*pinsrw): Extend to V2FI_32, add a new alternative (&x,
9136 x, x), and add a new define_split after it.
9137 (*pextrw<mode>): New define_insn.
9138 (vec_setv2hi): Rename to ..
9139 (vec_set<mode>): .. this, extend to V2FI_32.
9140 (vec_extractv2hihi): Rename to ..
9141 (vec_extract<mode><mmxscalarmodelower>): .. this, extend to
9143 (*punpckwd): Extend to V2FI_32.
9144 (*pshufw_1): Rename to ..
9145 (*pshufw<mode>_1): .. this, extend to V2FI_32.
9146 (vec_initv2hihi): Rename to ..
9147 (vec_init<mode><mmxscalarmodelower>): .. this, and extend to
9149 (*vec_dup<mode>): New define_insn.
9150 * config/i386/sse.md (*vec_extract<mode>): Refine constraint
9153 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
9155 * config/arc/arc.md (UNSPEC_ARC_CC_NEZ): New UNSPEC that
9156 represents the carry flag being set if the operand is non-zero.
9157 (adc_f): New define_insn representing adc with updated flags.
9158 (ashrdi3): New define_expand that only handles shifts by 1.
9159 (ashrdi3_cnt1): New pre-reload define_insn_and_split.
9160 (lshrdi3): New define_expand that only handles shifts by 1.
9161 (lshrdi3_cnt1): New pre-reload define_insn_and_split.
9162 (rrcsi2): New define_insn for rrc (SImode rotate right through carry).
9163 (rrcsi2_carry): Likewise for rrc.f, as above but updating flags.
9164 (rotldi3): New define_expand that only handles rotates by 1.
9165 (rotldi3_cnt1): New pre-reload define_insn_and_split.
9166 (rotrdi3): New define_expand that only handles rotates by 1.
9167 (rotrdi3_cnt1): New pre-reload define_insn_and_split.
9168 (lshrsi3_cnt1_carry): New define_insn for lsr.f.
9169 (ashrsi3_cnt1_carry): New define_insn for asr.f.
9170 (btst_0_carry): New define_insn for asr.f without result.
9172 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
9174 * config/arc/arc.cc (TARGET_FOLD_BUILTIN): Define to
9176 (arc_fold_builtin): New function. Convert ARC_BUILTIN_SWAP
9177 into a rotate. Evaluate ARC_BUILTIN_NORM and
9178 ARC_BUILTIN_NORMW of constant arguments.
9179 * config/arc/arc.md (UNSPEC_ARC_SWAP): Delete.
9180 (normw): Make output template/assembler whitespace consistent.
9181 (swap): Remove define_insn, only use of SWAP UNSPEC.
9182 * config/arc/builtins.def: Tweak indentation.
9183 (SWAP): Expand using rotlsi2_cnt16 instead of using swap.
9185 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
9187 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): New
9188 define_insn_and_split to optimize register usage of doubleword
9189 right shifts followed by truncation.
9191 2023-11-13 Jakub Jelinek <jakub@redhat.com>
9193 * config/i386/constraints.md: Remove j constraint letter from list of
9196 2023-11-13 Xi Ruoyao <xry111@xry111.site>
9198 PR rtl-optimization/112483
9199 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
9200 Fix the simplification of (fcopysign x, NEGATIVE_CONST).
9202 2023-11-13 Jakub Jelinek <jakub@redhat.com>
9204 PR tree-optimization/111967
9205 * gimple-range-cache.cc (block_range_cache::set_bb_range): Grow
9206 m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1.
9207 (block_range_cache::dump): Iterate from 1 rather than 0. Don't use
9208 ssa_name (x) unless m_ssa_ranges[x] is non-NULL. Iterate to
9209 m_ssa_ranges.length () rather than num_ssa_names.
9211 2023-11-13 Xi Ruoyao <xry111@xry111.site>
9213 * config/loongarch/loongarch.md (LD_AT_LEAST_32_BIT): New mode
9215 (ST_ANY): New mode iterator.
9216 (define_peephole2): Use LD_AT_LEAST_32_BIT instead of GPR and
9217 ST_ANY instead of QHWD for applicable patterns.
9219 2023-11-13 Xi Ruoyao <xry111@xry111.site>
9222 * config/loongarch/loongarch.cc
9223 (loongarch_expand_vec_cond_mask_expr): Call simplify_gen_subreg
9224 instead of gen_rtx_SUBREG.
9226 2023-11-13 Pan Li <pan2.li@intel.com>
9228 * config/riscv/autovec.md: Add bridge mode to lrint and lround
9230 * config/riscv/riscv-protos.h (expand_vec_lrint): Add new arg
9231 bridge machine mode.
9232 (expand_vec_lround): Ditto.
9233 * config/riscv/riscv-v.cc (emit_vec_widden_cvt_f_f): New helper
9234 func impl to emit vfwcvt.f.f.
9235 (emit_vec_rounding_to_integer): Handle the HF to DI rounding
9236 with the bridge mode.
9237 (expand_vec_lrint): Reorder the args.
9238 (expand_vec_lround): Ditto.
9239 (expand_vec_lceil): Ditto.
9240 (expand_vec_lfloor): Ditto.
9241 * config/riscv/vector-iterators.md: Add vector HFmode and bridge
9242 mode for converting to DI.
9244 2023-11-12 Jeff Law <jlaw@ventanamicro.com>
9247 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
9249 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
9250 (prune_ready_list): USE or CLOBBER should delay execution
9251 if it starts a new live range.
9253 2023-11-12 Uros Bizjak <ubizjak@gmail.com>
9255 * config/i386/i386.md (*stack_protect_set_4s_<mode>_di):
9256 Remove alternative 0.
9258 2023-11-11 Eric Botcazou <ebotcazou@adacore.com>
9260 * ipa-cp.cc (print_ipcp_constant_value): Move to...
9261 (values_equal_for_ipcp_p): Deal with VAR_DECLs from the
9263 * ipa-prop.cc (ipa_print_constant_value): ...here. Likewise.
9264 (ipa_print_node_jump_functions_for_edge): Call the function
9265 ipa_print_constant_value to print IPA_JF_CONST elements.
9267 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
9269 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
9270 (prune_ready_list): USE or CLOBBER should delay execution
9271 if it starts a new live range.
9273 2023-11-11 Jakub Jelinek <jakub@redhat.com>
9275 PR middle-end/112430
9276 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remove temp_stmts in the
9277 order they were pushed rather than in reverse order. Call
9278 release_defs after gsi_remove.
9280 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9282 * target.def (mode_switching.backprop): New hook.
9283 * doc/tm.texi.in (TARGET_MODE_BACKPROP): New @hook.
9284 * doc/tm.texi: Regenerate.
9285 * mode-switching.cc (struct bb_info): Add single_succ.
9286 (confluence_info): Add transp field.
9287 (single_succ_confluence_n, single_succ_transfer): New functions.
9288 (backprop_confluence_n, backprop_transfer): Likewise.
9289 (optimize_mode_switching): Use them. Push mode transitions onto
9290 a block's incoming edges, if the backprop hook requires it.
9292 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9294 * target.def (mode_switching.confluence): New hook.
9295 * doc/tm.texi (TARGET_MODE_CONFLUENCE): New @hook.
9296 * doc/tm.texi.in: Regenerate.
9297 * mode-switching.cc (confluence_info): New variable.
9298 (mode_confluence, forward_confluence_n, forward_transfer): New
9300 (optimize_mode_switching): Use them to calculate mode_in when
9301 TARGET_MODE_CONFLUENCE is defined.
9303 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9305 * mode-switching.cc (commit_mode_sets): Use 1-based edge aux values.
9307 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9309 * target.def (mode_switching.after): Add a regs_live parameter.
9310 * doc/tm.texi: Regenerate.
9311 * config/epiphany/epiphany-protos.h (epiphany_mode_after): Update
9313 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
9314 (epiphany_mode_after): Likewise.
9315 * config/i386/i386.cc (ix86_mode_after): Likewise.
9316 * config/riscv/riscv.cc (riscv_mode_after): Likewise.
9317 * config/sh/sh.cc (sh_mode_after): Likewise.
9318 * mode-switching.cc (optimize_mode_switching): Likewise.
9320 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9322 * target.def (mode_switching.needed): Add a regs_live parameter.
9323 * doc/tm.texi: Regenerate.
9324 * config/epiphany/epiphany-protos.h (epiphany_mode_needed): Update
9326 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
9327 * config/epiphany/mode-switch-use.cc (insert_uses): Likewise.
9328 * config/i386/i386.cc (ix86_mode_needed): Likewise.
9329 * config/riscv/riscv.cc (riscv_mode_needed): Likewise.
9330 * config/sh/sh.cc (sh_mode_needed): Likewise.
9331 * mode-switching.cc (optimize_mode_switching): Likewise.
9332 (create_pre_exit): Likewise, using the DF simulate functions
9333 to calculate the required information.
9335 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9337 * target.def (mode_switching.eh_handler): New hook.
9338 * doc/tm.texi.in (TARGET_MODE_EH_HANDLER): New @hook.
9339 * doc/tm.texi: Regenerate.
9340 * mode-switching.cc (optimize_mode_switching): Use eh_handler
9341 to get the mode on entry to an exception handler.
9343 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9345 * mode-switching.cc (optimize_mode_switching): Mark the exit
9346 block as nontransparent if it requires a specific mode.
9347 Handle the entry and exit mode as sibling rather than nested
9348 concepts. Remove outdated comment.
9350 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9352 * mode-switching.cc (optimize_mode_switching): Initially
9353 compute transparency in a bit-per-block bitmap.
9355 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9357 * mode-switching.cc (seginfo): Add a prev_mode field.
9358 (new_seginfo): Take and initialize the prev_mode.
9359 (optimize_mode_switching): Update calls accordingly.
9360 Use the recorded modes during the emit phase, rather than
9361 computing one on the fly.
9363 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9365 * mode-switching.cc (add_seginfo): Replace head pointer with
9366 a pointer to the tail pointer.
9367 (optimize_mode_switching): Update calls accordingly.
9369 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9371 * mode-switching.cc (optimize_mode_switching): Call
9372 df_note_add_problem.
9374 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9376 * target.def: Tweak documentation of mode-switching hooks.
9377 * doc/tm.texi.in (OPTIMIZE_MODE_SWITCHING): Tweak documentation.
9378 (NUM_MODES_FOR_MODE_SWITCHING): Likewise.
9379 * doc/tm.texi: Regenerate.
9381 2023-11-11 Martin Uecker <uecker@tugraz.at>
9385 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
9386 remove warning for parameters declared with `static`.
9388 2023-11-11 Joern Rennecke <joern.rennecke@embecosm.com>
9390 * doc/sourcebuild.texi (Scan the assembly output): Document change.
9392 2023-11-10 Mao <sray@live.com>
9394 PR middle-end/110983
9395 * doc/invoke.texi (Option Summary): Add -fpatchable-function-entry.
9397 2023-11-10 Maciej W. Rozycki <macro@embecosm.com>
9399 * config/riscv/riscv.md (length): Fix indentation for branch and
9400 jump length calculation expressions.
9402 2023-11-10 Eric Botcazou <ebotcazou@adacore.com>
9404 * fold-const.cc (operand_compare::operand_equal_p) <CONSTRUCTOR>:
9405 Deal with nonempty constant CONSTRUCTORs.
9406 (operand_compare::hash_operand) <CONSTRUCTOR>: Hash DECL_FIELD_OFFSET
9407 and DECL_FIELD_BIT_OFFSET for FIELD_DECLs.
9409 2023-11-10 Vladimir N. Makarov <vmakarov@redhat.com>
9412 * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function.
9413 (equiv_can_be_consumed_p): Use it.
9415 2023-11-10 Richard Sandiford <richard.sandiford@arm.com>
9417 * read-rtl.cc (md_reader::read_mapping): Allow iterators to
9418 include other iterators.
9419 * doc/md.texi: Document the change.
9420 * config/aarch64/iterators.md (DREG2, VQ2, TX2, DX2, SX2): Include
9421 the iterator that is being duplicated, rather than reproducing it.
9422 (VSTRUCT_D): Redefine using VSTRUCT_[234]D.
9423 (VSTRUCT_Q): Likewise VSTRUCT_[234]Q.
9424 (VSTRUCT_2QD, VSTRUCT_3QD, VSTRUCT_4QD, VSTRUCT_QD): Redefine using
9425 the individual D and Q iterators.
9427 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
9429 * config/i386/i386.md (stack_protect_set_1 peephole2):
9430 Explicitly check operand 2 for word_mode.
9431 (stack_protect_set_1 peephole2 #2): Ditto.
9432 (stack_protect_set_2 peephole2): Ditto.
9433 (stack_protect_set_3 peephole2): Ditto.
9434 (*stack_protect_set_4z_<mode>_di): New insn patter.
9435 (*stack_protect_set_4s_<mode>_di): Ditto.
9436 (stack_protect_set_4 peephole2): New peephole2 pattern to
9437 substitute stack protector scratch register clear with unrelated
9438 register initialization involving zero/sign-extend instruction.
9440 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
9442 * config/i386/i386.md (shift): Use SAL insted of SLL
9443 for ashift insn mnemonic.
9445 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9447 PR tree-optimization/112438
9448 * tree-vect-loop.cc (vectorizable_induction): Bugfix when
9449 LOOP_VINFO_USING_SELECT_VL_P.
9451 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9453 * config/riscv/riscv-protos.h (enum insn_type): New enum.
9454 * config/riscv/riscv-v.cc
9455 (rvv_builder::combine_sequence_use_slideup_profitable_p): New function.
9456 (expand_vector_init_slideup_combine_sequence): Ditto.
9457 (expand_vec_init): Add slideup combine optimization.
9459 2023-11-10 Robin Dapp <rdapp@ventanamicro.com>
9461 PR tree-optimization/112464
9462 * tree-vect-loop.cc (vectorize_fold_left_reduction): Use
9463 vect_orig_stmt on scalar_dest_def_info.
9465 2023-11-10 Jin Ma <jinma@linux.alibaba.com>
9467 * config/riscv/riscv.cc (riscv_for_each_saved_reg): Place the interrupt
9468 operation before the XTheadMemPair.
9470 2023-11-10 Richard Biener <rguenther@suse.de>
9472 PR tree-optimization/110221
9473 * tree-vect-slp.cc (vect_schedule_slp_node): When loop
9474 masking / len is applied make sure to not schedule
9475 intenal defs outside of the loop.
9477 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
9479 * expr.cc (store_constructor): Add "and" operation to uniform mask
9482 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
9485 * config/gcn/gcn-valu.md (add<mode>3<exec_clobber>): Fix B constraint
9486 and switch to the new format.
9487 (add<mode>3_dup<exec_clobber>): Likewise.
9488 (add<mode>3_vcc<exec_vcc>): Likewise.
9489 (add<mode>3_vcc_dup<exec_vcc>): Likewise.
9490 (add<mode>3_vcc_zext_dup): Likewise.
9491 (add<mode>3_vcc_zext_dup_exec): Likewise.
9492 (add<mode>3_vcc_zext_dup2): Likewise.
9493 (add<mode>3_vcc_zext_dup2_exec): Likewise.
9495 2023-11-10 Richard Biener <rguenther@suse.de>
9497 PR middle-end/112469
9498 * match.pd (cond ? op a : b -> .COND_op (cond, a, b)): Add
9499 missing view_converts.
9501 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
9503 * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode
9504 min/max instructions.
9506 2023-11-10 Chenghui Pan <panchenghui@loongson.cn>
9508 * config/loongarch/lsx.md: Fix instruction name typo in
9509 lsx_vreplgr2vr_<lsxfmt_f> template.
9511 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9513 * config/riscv/autovec.md (vec_init<mode><vel>): Split patterns.
9515 2023-11-10 Pan Li <pan2.li@intel.com>
9518 2023-11-10 Pan Li <pan2.li@intel.com>
9519 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
9520 New fun impl to expand the insn when trailing same elements.
9521 (expand_vec_init): Try trailing same elements when vec_init.
9523 2023-11-10 Pan Li <pan2.li@intel.com>
9525 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
9526 New fun impl to expand the insn when trailing same elements.
9527 (expand_vec_init): Try trailing same elements when vec_init.
9529 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9531 * config/riscv/autovec-opt.md (*cond_copysign<mode>): Remove.
9532 * config/riscv/autovec.md (cond_copysign<mode>): New pattern.
9534 2023-11-10 Pan Li <pan2.li@intel.com>
9537 * internal-fn.def (LRINT): Add FLOATN support.
9542 2023-11-10 Jeff Law <jlaw@ventanamicro.com>
9544 * config/h8300/combiner.md (single bit sign_extract): Avoid recently
9545 added patterns for H8/SX.
9546 (single bit zero_extract): New patterns.
9548 2023-11-10 liuhongt <hongtao.liu@intel.com>
9551 * config/i386/sse.md (*avx2_pcmp<mode>3_4): Fix swap condition
9552 from LT to GT since there's not in the pattern.
9553 (*avx2_pcmp<mode>3_5): Ditto.
9555 2023-11-10 Jose E. Marchesi <jose.marchesi@oracle.com>
9557 * config/bpf/bpf.cc (bpf_print_register): Accept modifier code 'W'
9558 to force emitting register names using the wN form.
9559 * config/bpf/bpf.md (*mulsidi3_zeroextend): Force operands to
9560 always use wN written form in pseudo-C assembly syntax.
9562 2023-11-09 David Malcolm <dmalcolm@redhat.com>
9564 * diagnostic-show-locus.cc (layout::m_line_table): New field.
9565 (compatible_locations_p): Convert to...
9566 (layout::compatible_locations_p): ...this, replacing uses of
9567 line_table global with m_line_table.
9568 (layout::layout): Convert "richloc" param from a pointer to a
9569 const reference. Initialize m_line_table member.
9570 (layout::maybe_add_location_range): Replace uses of line_table
9571 global with m_line_table. Pass the latter to
9572 linemap_client_expand_location_to_spelling_point.
9573 (layout::print_leading_fixits): Pass m_line_table to
9575 (layout::print_trailing_fixits): Likewise.
9576 (gcc_rich_location::add_location_if_nearby): Update for change
9577 to layout ctor params.
9578 (diagnostic_show_locus): Convert to...
9579 (diagnostic_context::maybe_show_locus): ...this, converting
9580 richloc param from a pointer to a const reference. Make "loc"
9581 const. Split out printing part of function to...
9582 (diagnostic_context::show_locus): ...this.
9583 (selftest::test_offset_impl): Update for change to layout ctor
9585 (selftest::test_layout_x_offset_display_utf8): Likewise.
9586 (selftest::test_layout_x_offset_display_tab): Likewise.
9587 (selftest::test_tab_expansion): Likewise.
9588 * diagnostic.h (diagnostic_context::maybe_show_locus): New decl.
9589 (diagnostic_context::show_locus): New decl.
9590 (diagnostic_show_locus): Convert from a decl to an inline function.
9591 * gdbinit.in (break-on-diagnostic): Update from a breakpoint
9592 on diagnostic_show_locus to one on
9593 diagnostic_context::maybe_show_locus.
9594 * genmatch.cc (linemap_client_expand_location_to_spelling_point):
9595 Add "set" param and use it in place of line_table global.
9596 * input.cc (expand_location_1): Likewise.
9597 (expand_location): Update for new param of expand_location_1.
9598 (expand_location_to_spelling_point): Likewise.
9599 (linemap_client_expand_location_to_spelling_point): Add "set"
9600 param and use it in place of line_table global.
9601 * tree-diagnostic-path.cc (event_range::print): Pass line_table
9602 for new param of linemap_client_expand_location_to_spelling_point.
9604 2023-11-09 Uros Bizjak <ubizjak@gmail.com>
9606 * config/i386/i386.md (@stack_protect_set_1_<PTR:mode>_<W:mode>):
9607 Use W mode iterator instead of SWI48. Output MOV instead of XOR
9608 for TARGET_USE_MOV0.
9609 (stack_protect_set_1 peephole2): Use integer modes with
9610 mode size <= word mode size for operand 3.
9611 (stack_protect_set_1 peephole2 #2): New peephole2 pattern to
9612 substitute stack protector scratch register clear with unrelated
9613 register initialization, originally in front of stack
9615 (*stack_protect_set_3_<PTR:mode>_<SWI48:mode>): New insn pattern.
9616 (stack_protect_set_1 peephole2): New peephole2 pattern to
9617 substitute stack protector scratch register clear with unrelated
9618 register initialization involving LEA instruction.
9620 2023-11-09 Vladimir N. Makarov <vmakarov@redhat.com>
9622 PR rtl-optimization/110215
9623 * ira-lives.cc: (add_conflict_from_region_landing_pads): New
9625 (process_bb_node_lives): Use it.
9627 2023-11-09 Alexandre Oliva <oliva@adacore.com>
9629 * config/i386/i386.cc (symbolic_base_address_p,
9630 base_address_p): New, factored out from...
9631 (extract_base_offset_in_addr): ... here and extended to
9632 recognize REG+GOTOFF, as in gcc.target/i386/sse2-load-multi.c
9633 and sse2-store-multi.c with PIE enabled by default.
9635 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9637 PR tree-optimization/109154
9638 * config/aarch64/aarch64-sve.md (cond_copysign<mode>): New.
9640 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9642 PR tree-optimization/109154
9643 * config/aarch64/aarch64.md (copysign<GPF:mode>3): Handle
9645 * config/aarch64/aarch64-simd.md (copysign<mode>3): Likewise.
9646 * config/aarch64/aarch64-sve.md (copysign<mode>3): Likewise.
9648 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9650 PR tree-optimization/109154
9651 * config/aarch64/aarch64.md (<optab><mode>3): Add SVE split case.
9652 * config/aarch64/aarch64-simd.md (ior<mode>3<vczle><vczbe>): Likewise.
9653 * config/aarch64/predicates.md(aarch64_orr_imm_sve_advsimd): New.
9655 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9657 PR tree-optimization/109154
9658 * config/aarch64/aarch64.md (*mov<mode>_aarch64, *movsi_aarch64,
9659 *movdi_aarch64): Add new w -> Z case.
9660 * config/aarch64/iterators.md (Vbtype): Add QI and HI.
9662 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9664 PR tree-optimization/109154
9665 * config/aarch64/aarch64-protos.h (aarch64_simd_special_constant_p,
9666 aarch64_maybe_generate_simd_constant): New.
9667 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VQMOV:mode>,
9668 *aarch64_simd_mov<VDMOV:mode>): Add new coden for special constants.
9669 * config/aarch64/aarch64.cc (aarch64_extract_vec_duplicate_wide_int):
9671 (aarch64_simd_special_constant_p,
9672 aarch64_maybe_generate_simd_constant): New.
9673 * config/aarch64/aarch64.md (*movdi_aarch64): Add new codegen for
9675 * config/aarch64/constraints.md (Dx): new.
9677 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9679 PR tree-optimization/109154
9680 * internal-fn.def (COPYSIGN): New.
9681 * match.pd (UNCOND_BINARY, COND_BINARY): Map IFN_COPYSIGN to
9683 * optabs.def (cond_copysign_optab, cond_len_copysign_optab): New.
9685 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9687 PR tree-optimization/109154
9688 * match.pd: Add new neg+abs rule, remove inverse copysign rule.
9690 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9692 PR tree-optimization/109154
9693 * match.pd: expand existing copysign optimizations.
9695 2023-11-09 Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
9698 * collect2.cc (main): Do not prepend target triple to
9701 2023-11-09 Richard Biener <rguenther@suse.de>
9703 PR tree-optimization/111133
9704 * tree-vect-stmts.cc (vect_build_scatter_store_calls):
9705 Remove and refactor to ...
9706 (vect_build_one_scatter_store_call): ... this new function.
9707 (vectorizable_store): Use vect_check_scalar_mask to record
9708 the SLP node for the mask operand. Code generate scatters
9709 with builtin decls from the main scatter vectorization
9710 path and prepare that for SLP.
9711 * tree-vect-slp.cc (vect_get_operand_map): Do not look
9712 at the VDEF to decide between scatter or gather since that
9713 doesn't work for patterns. Use the LHS being an SSA_NAME
9716 2023-11-09 Pan Li <pan2.li@intel.com>
9718 * config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Only
9719 perform once emit when at least one succ edge is abnormal.
9721 2023-11-09 Richard Biener <rguenther@suse.de>
9723 * tree-vect-loop.cc (vect_verify_full_masking_avx512):
9724 Check we have integer mode masks as required by
9727 2023-11-09 Richard Biener <rguenther@suse.de>
9729 PR tree-optimization/112444
9730 * tree-ssa-sccvn.cc (visit_phi): Avoid using not visited
9731 defs as undefined vals.
9733 2023-11-09 YunQiang Su <yunqiang.su@cipunited.com>
9735 * config/mips/mips.cc(mips_option_override): Set mips_abs to
9736 2008, if mips_abs is default and mips_nan is 2008.
9738 2023-11-09 Florian Weimer <fweimer@redhat.com>
9740 * doc/invoke.texi (Warning Options): Document
9741 -Wreturn-mismatch. Update -Wreturn-type documentation.
9743 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9745 * config/s390/s390.md: Remove UNSPEC_VEC_ELTSWAP.
9746 * config/s390/vector.md (eltswapv16qi): New expander.
9747 (*eltswapv16qi): New insn and splitter.
9748 (eltswapv8hi): New insn and splitter.
9749 (eltswap<mode>): New insn and splitter for modes V_HW_4 as well
9751 * config/s390/vx-builtins.md (eltswap<mode>): Remove.
9752 (*eltswapv16qi): Remove.
9753 (*eltswap<mode>): Remove.
9754 (*eltswap<mode>_emu): Remove.
9756 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9758 * config/s390/s390.cc (expand_perm_with_rot): Remove.
9759 (expand_perm_reverse_elements): New.
9760 (expand_perm_with_vster): Remove.
9761 (expand_perm_with_vstbrq): Remove.
9762 (vectorize_vec_perm_const_1): Replace removed functions with new
9765 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9767 * config/s390/s390.cc (expand_perm_with_merge): Deal with cases
9768 where vmr{l,h} are still applicable if the operands are swapped.
9769 (expand_perm_with_vpdi): Likewise for vpdi.
9771 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9773 * config/s390/s390.md (VX_CONV_INT): Remove iterator.
9774 (gf): Add float mappings.
9775 (TOINT, toint): New attribute.
9776 (*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13):
9778 (*fixuns_trunc<mode><toint>2_z13): Add.
9779 (*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13):
9781 (*fix_trunc<mode><toint>2_bfp_z13): Add.
9782 (*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13): Remove.
9783 (*floatuns<toint><mode>2_z13): Add.
9784 * config/s390/vector.md (VX_VEC_CONV_INT): Remove iterator.
9785 (float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
9786 (float<tointvec><mode>2): Add.
9787 (floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
9788 (floatuns<tointvec><mode>2): Add.
9789 (fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
9791 (fix_trunc<mode><tointvec>2): Add.
9792 (fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
9794 (fixuns_trunc<VX_VEC_CONV_BFP:mode><tointvec>2): Add.
9796 2023-11-09 Jakub Jelinek <jakub@redhat.com>
9799 * attribs.cc (attribute_ignored_p): Only return true for
9800 attr_namespace_ignored_p if as is NULL.
9801 (decl_attributes): Never add ignored attributes.
9803 2023-11-09 Jin Ma <jinma@linux.alibaba.com>
9805 * config/riscv/bitmanip.md: Avoid the conflict between
9806 zbb and xtheadmemidx in patterns.
9808 2023-11-09 Richard Biener <rguenther@suse.de>
9810 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Record
9811 to the correct simd_clone_info.
9813 2023-11-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9815 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Fix ICE.
9817 2023-11-09 Alexandre Oliva <oliva@adacore.com>
9819 * tree-cfg.cc (assign_discriminators): Handle debug stmts.
9821 2023-11-08 Uros Bizjak <ubizjak@gmail.com>
9824 * config/i386/i386.md (*add<mode>_1_slp):
9825 Split insn only for unmatched operand 0.
9826 (*sub<mode>_1_slp): Ditto.
9827 (*<any_logic:code><mode>_1_slp): Merge pattern from "*and<mode>_1_slp"
9828 and "*<any_logic:code><mode>_1_slp" using any_logic code iterator.
9829 Split insn only for unmatched operand 0.
9830 (*neg<mode>1_slp): Split insn only for unmatched operand 0.
9831 (*one_cmpl<mode>_1_slp): Ditto.
9832 (*ashl<mode>3_1_slp): Ditto.
9833 (*<any_shiftrt:insn><mode>_1_slp): Ditto.
9834 (*<any_rotate:insn><mode>_1_slp): Ditto.
9835 (*addqi_ext<mode>_1): Redefine as define_insn_and_split. Add
9836 alternative 1 and split insn after reload for unmatched operand 0.
9837 (*<plusminus:insn>qi_ext<mode>_2): Merge pattern from
9838 "*addqi_ext<mode>_2" and "*subqi_ext<mode>_2" using plusminus code
9839 iterator. Redefine as define_insn_and_split. Add alternative 1
9840 and split insn after reload for unmatched operand 0.
9841 (*subqi_ext<mode>_1): Redefine as define_insn_and_split. Add
9842 alternative 1 and split insn after reload for unmatched operand 0.
9843 (*<any_logic:code>qi_ext<mode>_0): Merge pattern from
9844 "*andqi_ext<mode>_0" and and "*<any_logic:code>qi_ext<mode>_0" using
9845 any_logic code iterator.
9846 (*<any_logic:code>qi_ext<mode>_1): Merge pattern from
9847 "*andqi_ext<mode>_1" and "*<any_logic:code>qi_ext<mode>_1" using
9848 any_logic code iterator. Redefine as define_insn_and_split. Add
9849 alternative 1 and split insn after reload for unmatched operand 0.
9850 (*<any_logic:code>qi_ext<mode>_1_cc): Merge pattern from
9851 "*andqi_ext<mode>_1_cc" and "*xorqi_ext<mode>_1_cc" using any_logic
9852 code iterator. Redefine as define_insn_and_split. Add alternative 1
9853 and split insn after reload for unmatched operand 0.
9854 (*<any_logic:code>qi_ext<mode>_2): Merge pattern from
9855 "*andqi_ext<mode>_2" and "*<any_or:code>qi_ext<mode>_2" using
9856 any_logic code iterator. Redefine as define_insn_and_split. Add
9857 alternative 1 and split insn after reload for unmatched operand 0.
9858 (*<any_logic:code>qi_ext<mode>_3): Redefine as define_insn_and_split.
9859 Add alternative 1 and split insn after reload for unmatched operand 0.
9860 (*negqi_ext<mode>_1): Rename from "*negqi_ext<mode>_2". Add
9861 alternative 1 and split insn after reload for unmatched operand 0.
9862 (*one_cmplqi_ext<mode>_1): Ditto.
9863 (*ashlqi_ext<mode>_1): Ditto.
9864 (*<any_shiftrt:insn>qi_ext<mode>_1): Ditto.
9866 2023-11-08 Richard Biener <rguenther@suse.de>
9868 * tree-vect-stmts.cc (vectorizable_load): Adjust offset
9869 vector gathering for SLP of emulated gathers.
9871 2023-11-08 Richard Biener <rguenther@suse.de>
9873 * tree-vectorizer.h (vect_slp_child_index_for_operand):
9874 Add gatherscatter_p argument.
9875 * tree-vect-slp.cc (vect_slp_child_index_for_operand): Likewise.
9877 * tree-vect-stmts.cc (vect_check_store_rhs): Turn the rhs
9878 argument into an output, also output the SLP node associated
9880 (vectorizable_simd_clone_call): Adjust.
9881 (vectorizable_store): Likewise.
9882 (vectorizable_load): Likewise.
9884 2023-11-08 Richard Biener <rguenther@suse.de>
9886 * tree-vect-stmts.cc (vectorizable_load): Use the correct
9887 vectorized mask operand.
9889 2023-11-08 Lehua Ding <lehua.ding@rivai.ai>
9891 * config/riscv/vector.md (*vsetvldi_no_side_effects_si_extend):
9892 New combine pattern.
9894 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9896 * config/riscv/riscv-vsetvl.cc: Fix ICE.
9898 2023-11-08 xuli <xuli1@eswincomputing.com>
9900 * config/riscv/riscv-c.cc (riscv_check_builtin_call): Eliminate warning.
9902 2023-11-08 Hongyu Wang <hongyu.wang@intel.com>
9905 * config/i386/constraints.md (jc): New constraint that prohibits
9907 * config/i386/i386.md (*movdi_internal): Change r constraint
9909 (*movti_internal): Likewise.
9911 2023-11-08 Florian Weimer <fweimer@redhat.com>
9913 * doc/invoke.texi (Warning Options): Mention C diagnostics
9916 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9919 * config/riscv/riscv-vector-builtins-bases.cc: Normalize the vsetvls.
9921 2023-11-08 Haochen Jiang <haochen.jiang@intel.com>
9924 * config/i386/i386.md (avx_noavx512vl): New definition for isa
9926 * config/i386/sse.md (*andnot<mode>3): Change isa attribute from
9927 avx_noavx512f to avx_noavx512vl.
9929 2023-11-07 Pan Li <pan2.li@intel.com>
9931 * config/riscv/autovec.md: Remove the size check of lfloor.
9932 * config/riscv/riscv-v.cc (expand_vec_lfloor): Leverage
9933 emit_vec_rounding_to_integer for floor.
9935 2023-11-07 Robin Dapp <rdapp@ventanamicro.com>
9937 PR tree-optimization/112361
9939 PR middle-end/112406
9940 * tree-if-conv.cc (convert_scalar_cond_reduction): Remember if
9941 loop was versioned and only then create COND_OPs.
9942 (predicate_scalar_phi): Do not create COND_OP when not
9944 * tree-vect-loop.cc (vect_expand_fold_left): Re-create
9946 (vectorize_fold_left_reduction): Pass mask to
9947 vect_expand_fold_left.
9949 2023-11-07 Uros Bizjak <ubizjak@gmail.com>
9951 * config/i386/predicates.md ("flags_reg_operand"):
9952 Make predicate special to avoid automatic mode checks.
9954 2023-11-07 Martin Jambor <mjambor@suse.cz>
9956 * configure: Regenerate.
9958 2023-11-07 Kwok Cheung Yeung <kcy@codesourcery.com>
9960 * lto-cgraph.cc (enum LTO_symtab_tags): Add tag for indirect
9962 (output_offload_tables): Write indirect functions.
9963 (input_offload_tables): read indirect functions.
9964 * lto-section-names.h (OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): New.
9965 * omp-builtins.def (BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR): New.
9966 * omp-offload.cc (offload_ind_funcs): New.
9967 (omp_discover_implicit_declare_target): Add functions marked with
9968 'omp declare target indirect' to indirect functions list.
9969 (omp_finish_file): Add indirect functions to section for offload
9971 (execute_omp_device_lower): Redirect indirect calls on target by
9972 passing function pointer to BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR.
9973 (pass_omp_device_lower::gate): Run pass_omp_device_lower if
9974 indirect functions are present on an accelerator device.
9975 * omp-offload.h (offload_ind_funcs): New.
9976 * tree-core.h (omp_clause_code): Add OMP_CLAUSE_INDIRECT.
9977 * tree.cc (omp_clause_num_ops): Add entry for OMP_CLAUSE_INDIRECT.
9978 (omp_clause_code_name): Likewise.
9979 * tree.h (OMP_CLAUSE_INDIRECT_EXPR): New.
9980 * config/gcn/mkoffload.cc (process_asm): Process offload_ind_funcs
9981 section. Count number of indirect functions.
9982 (process_obj): Emit number of indirect functions.
9983 * config/nvptx/mkoffload.cc (ind_func_ids, ind_funcs_tail): New.
9984 (process): Emit offload_ind_func_table in PTX code. Emit indirect
9985 function names and count in image.
9986 * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Mark
9987 indirect functions in PTX code with IND_FUNC_MAP.
9989 2023-11-07 Tobias Burnus <tobias@codesourcery.com>
9991 * doc/invoke.texi (-fopenmp, -fopenmp-simd): Adjust wording for
9992 attribute syntax supported also in C.
9994 2023-11-07 Richard Sandiford <richard.sandiford@arm.com>
9996 * config/aarch64/aarch64.cc (aarch64_print_operand): Add a %Z
9997 modifier for SVE registers.
9999 2023-11-07 Joseph Myers <joseph@codesourcery.com>
10001 * builtins.def (DEF_C2X_BUILTIN): Rename to DEF_C23_BUILTIN and
10002 use flag_isoc23 and function_c23_misc.
10003 * config/rl78/rl78.cc (rl78_option_override): Compare
10004 lang_hooks.name with "GNU C23" not "GNU C2X".
10005 * coretypes.h (function_c2x_misc): Rename to function_c23_misc.
10006 * doc/cpp.texi (@code{__has_attribute}): Refer to C23 instead of
10008 * doc/extend.texi: Likewise.
10009 * doc/invoke.texi: Likewise.
10010 * dwarf2out.cc (highest_c_language, gen_compile_unit_die): Compare
10011 against and return "GNU C23" language string instead of "GNU C2X".
10012 * ginclude/float.h: Refer to C23 instead of C2X in comments.
10013 * ginclude/stdint-gcc.h: Likewise.
10014 * glimits.h: Likewise.
10015 * tree.h: Likewise.
10017 2023-11-07 Alexandre Oliva <oliva@adacore.com>
10019 * doc/sourcebuild.texi (opt_mstrict_align): New target.
10021 2023-11-07 Lehua Ding <lehua.ding@rivai.ai>
10023 * config/riscv/autovec-opt.md (*cond_len_<optab><v_double_trunc><mode>):
10024 New combine pattern.
10025 (*cond_len_<optab><v_quad_trunc><mode>): Ditto.
10026 (*cond_len_<optab><v_oct_trunc><mode>): Ditto.
10027 (*cond_len_extend<v_double_trunc><mode>): Ditto.
10028 (*cond_len_widen_reduc_plus_scal_<mode>): Ditto.
10030 2023-11-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10033 * config/riscv/riscv-avlprop.cc
10034 (pass_avlprop::get_vlmax_ta_preferred_avl): Enhance AVL propagation.
10035 * config/riscv/t-riscv: Add new include.
10037 2023-11-07 Pan Li <pan2.li@intel.com>
10039 * config/riscv/autovec.md: Remove the size check of lceil.l
10040 * config/riscv/riscv-v.cc (expand_vec_lceil): Leverage
10041 emit_vec_rounding_to_integer for ceil.
10043 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
10045 * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
10047 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
10049 * config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Define to 1.
10051 2023-11-06 David Malcolm <dmalcolm@redhat.com>
10053 * diagnostic-show-locus.cc (class colorizer): Take just a
10054 pretty_printer rather than a diagnostic_context.
10055 (layout::layout): Make context param a const reference,
10056 and pretty_printer param non-optional.
10057 (layout::m_context): Drop field.
10058 (layout::m_options): New field.
10059 (layout::m_colorize_source_p): Drop field.
10060 (layout::m_show_labels_p): Drop field.
10061 (layout::m_show_line_numbers_p): Drop field.
10062 (layout::print_gap_in_line_numbering): Use m_options.
10063 (layout::calculate_line_spans): Likewise.
10064 (layout::calculate_linenum_width): Likewise.
10065 (layout::calculate_x_offset_display): Likewise.
10066 (layout::print_source_line): Likewise.
10067 (layout::start_annotation_line): Likewise.
10068 (layout::print_annotation_line): Likewise.
10069 (layout::print_line): Likewise.
10070 (gcc_rich_location::add_location_if_nearby): Update for changes to
10072 (diagnostic_show_locus): Likewise.
10073 (selftest::test_offset_impl): Likewise.
10074 (selftest::test_layout_x_offset_display_utf8): Likewise.
10075 (selftest::test_layout_x_offset_display_tab): Likewise.
10076 (selftest::test_tab_expansion): Likewise.
10077 * diagnostic.h (diagnostic_context::m_source_printing): Move
10078 declaration of struct outside diagnostic_context as...
10079 (struct diagnostic_source_printing_options)... this.
10081 2023-11-06 David Malcolm <dmalcolm@redhat.com>
10083 * diagnostic.cc (diagnostic_context::push_diagnostics): Convert
10085 (diagnostic_option_classifier::push): ...this.
10086 (diagnostic_context::pop_diagnostics): Convert to...
10087 (diagnostic_option_classifier::pop): ...this.
10088 (diagnostic_context::initialize): Move code to...
10089 (diagnostic_option_classifier::init): ...this new function.
10090 (diagnostic_context::finish): Move code to...
10091 (diagnostic_option_classifier::fini): ...this new function.
10092 (diagnostic_context::classify_diagnostic): Convert to...
10093 (diagnostic_option_classifier::classify_diagnostic): ...this.
10094 (diagnostic_context::update_effective_level_from_pragmas): Convert
10096 (diagnostic_option_classifier::update_effective_level_from_pragmas):
10098 (diagnostic_context::diagnostic_enabled): Update for refactoring.
10099 * diagnostic.h (struct diagnostic_classification_change_t): Move into...
10100 (class diagnostic_option_classifier): ...this new class.
10101 (diagnostic_context::option_unspecified_p): Update for move of
10102 fields into m_option_classifier.
10103 (diagnostic_context::classify_diagnostic): Likewise.
10104 (diagnostic_context::push_diagnostics): Likewise.
10105 (diagnostic_context::pop_diagnostics): Likewise.
10106 (diagnostic_context::update_effective_level_from_pragmas): Delete.
10107 (diagnostic_context::m_classify_diagnostic): Move into class
10108 diagnostic_option_classifier.
10109 (diagnostic_context::m_option_classifier): Likewise.
10110 (diagnostic_context::m_classification_history): Likewise.
10111 (diagnostic_context::m_n_classification_history): Likewise.
10112 (diagnostic_context::m_push_list): Likewise.
10113 (diagnostic_context::m_n_push): Likewise.
10114 (diagnostic_context::m_option_classifier): New.
10116 2023-11-06 David Malcolm <dmalcolm@redhat.com>
10118 * diagnostic.cc (diagnostic_context::set_urlifier): New.
10119 * diagnostic.h (diagnostic_context::set_urlifier): New decl.
10120 (diagnostic_context::m_urlifier): Make private.
10121 * gcc.cc (driver::global_initializations): Use set_urlifier rather
10122 than directly setting field.
10123 * toplev.cc (general_init): Likewise.
10125 2023-11-06 David Malcolm <dmalcolm@redhat.com>
10127 * diagnostic.cc (diagnostic_context::check_max_errors): Replace
10128 uses of diagnostic_kind_count with simple field acesss.
10129 (diagnostic_context::report_diagnostic): Likewise.
10130 (diagnostic_text_output_format::~diagnostic_text_output_format):
10131 Replace use of diagnostic_kind_count with
10132 diagnostic_context::diagnostic_count.
10133 * diagnostic.h (diagnostic_kind_count): Delete.
10134 (errorcount): Replace use of diagnostic_kind_count with
10135 diagnostic_context::diagnostic_count.
10136 (warningcount): Likewise.
10137 (werrorcount): Likewise.
10138 (sorrycount): Likewise.
10140 2023-11-06 Christophe Lyon <christophe.lyon@linaro.org>
10142 * doc/sourcebuild.texi (Other attributes): Document thread_fence
10145 2023-11-06 Uros Bizjak <ubizjak@gmail.com>
10147 * config/i386/constraints.md (Bc): Remove constraint.
10148 (Bn): Rewrite to use x86_extended_reg_mentioned_p predicate.
10149 * config/i386/i386.cc (ix86_memory_address_reg_class):
10150 Do not limit processing to TARGET_APX_EGPR. Exit early for
10151 NULL insn. Do not check recog_data.insn before calling
10152 extract_insn_cached.
10153 (ix86_insn_base_reg_class): Handle ADDR_GPR8.
10154 (ix86_regno_ok_for_insn_base_p): Ditto.
10155 (ix86_insn_index_reg_class): Ditto.
10156 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64):
10157 Remove insn pattern and corresponding peephole2 pattern.
10158 (*cmpi_ext<mode>_1): Remove (m,Q) alternative.
10159 Change (QBc,Q) alternative to (QBn,Q). Add "addr" attribute.
10160 (*cmpqi_ext<mode>_3_mem_rex64): Remove insn pattern
10161 and corresponding peephole2 pattern.
10162 (*cmpi_ext<mode>_3): Remove (Q,m) alternative.
10163 Change (Q,QnBc) alternative to (Q,QnBn). Add "addr" attribute.
10164 (*extzvqi_mem_rex64): Remove insn pattern and
10165 corresponding peephole2 pattern.
10166 (*extzvqi): Remove (Q,m) alternative. Change (Q,QnBc)
10167 alternative to (Q,QnBn). Add "addr" attribute.
10168 (*insvqi_1_mem_rex64): Remove insn pattern and
10169 corresponding peephole2 pattern.
10170 (*insvqi_1): Remove (Q,m) alternative. Change (Q,QnBc)
10171 alternative to (Q,QnBn). Add "addr" attribute.
10172 (@insv<mode>_1): Ditto.
10173 (*addqi_ext<mode>_0): Remove (m,0,Q) alternative. Change (QBc,0,Q)
10174 alternative to (QBn,0,Q). Add "addr" attribute.
10175 (*subqi_ext<mode>_0): Ditto.
10176 (*andqi_ext<mode>_0): Ditto.
10177 (*<any_or:code>qi_ext<mode>_0): Ditto.
10178 (*addqi_ext<mode>_1): Remove (Q,0,m) alternative. Change (Q,0,QnBc)
10179 alternative to (Q,0,QnBn). Add "addr" attribute.
10180 (*andqi_ext<mode>_1): Ditto.
10181 (*andqi_ext<mode>_1_cc): Ditto.
10182 (*<any_or:code>qi_ext<mode>_1): Ditto.
10183 (*xorqi_ext<mode>_1_cc): Ditto.
10184 * config/i386/predicates.md (nonimm_x64constmem_operand):
10186 (general_x64constmem_operand): Ditto.
10187 (norex_memory_operand): Ditto.
10189 2023-11-06 Joseph Myers <joseph@codesourcery.com>
10192 * doc/cpp.texi (__STDC_VERSION__): Refer to -std=c23 and
10193 -std=gnu23 instead of -std=c2x and -std=gnu2x.
10194 * doc/extend.texi (Attribute Syntax): Refer to C23 and -std=c23
10195 instead of C2x and -std=c2x.
10196 * doc/invoke.texi (-Wc11-c23-compat, -std=c23, -std=gnu23)
10197 (-std=iso9899:2024): Document, with -Wc11-c2x-compat, -std=c2x and
10198 -std=gnu2x as deprecated aliases. Update descriptions of C23.
10199 * doc/standards.texi (Standards): Describe C23 with C2X as an old
10202 2023-11-06 Thomas Schwinge <thomas@codesourcery.com>
10204 * config/nvptx/nvptx.h (MAKE_DECL_ONE_ONLY): Define.
10206 2023-11-06 Richard Biener <rguenther@suse.de>
10208 PR tree-optimization/112405
10209 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
10210 Properly handle invariant and/or loop mask passing.
10212 2023-11-06 Pan Li <pan2.li@intel.com>
10214 * config/riscv/autovec.md: Remove the size check of lround.
10215 * config/riscv/riscv-v.cc (expand_vec_lround): Leverage
10216 emit_vec_rounding_to_integer for round.
10218 2023-11-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10220 * config/riscv/predicates.md: Adapt predicate.
10221 * config/riscv/riscv-protos.h (can_be_broadcasted_p): New function.
10222 * config/riscv/riscv-v.cc (can_be_broadcasted_p): Ditto.
10223 * config/riscv/vector.md (vec_duplicate<mode>): New pattern.
10224 (*vec_duplicate<mode>): Adapt vec_duplicate insn pattern.
10226 2023-11-06 Richard Biener <rguenther@suse.de>
10228 PR tree-optimization/111950
10229 * tree-vect-loop-manip.cc (slpeel_duplicate_current_defs_from_edges):
10231 (find_guard_arg): Likewise.
10232 (slpeel_update_phi_nodes_for_guard2): Likewise.
10233 (slpeel_tree_duplicate_loop_to_edge_cfg): Remove calls to
10234 slpeel_duplicate_current_defs_from_edges, do not elide
10235 LC-PHIs for invariant values.
10236 (vect_do_peeling): Materialize PHI arguments for the edge
10237 around the epilog from the PHI defs of the main loop exit.
10239 2023-11-06 Richard Biener <rguenther@suse.de>
10241 PR tree-optimization/112404
10242 * tree-vectorizer.h (get_mask_type_for_scalar_type): Declare
10243 overload with SLP node argument.
10244 * tree-vect-stmts.cc (get_mask_type_for_scalar_type): Implement it.
10245 (vect_check_scalar_mask): Use it.
10246 * tree-vect-slp.cc (vect_gather_slp_loads): Properly identify
10247 loads also for nodes with children, like .MASK_LOAD.
10248 * tree-vect-loop.cc (vect_analyze_loop_2): Look at the
10249 representative for load nodes and check whether it is a grouped
10250 access before looking for load-lanes support.
10252 2023-11-06 Robin Dapp <rdapp@ventanamicro.com>
10254 PR tree-optimization/111760
10255 * config/riscv/autovec.md (vcond_mask_len_<mode><vm>): Add
10257 * config/riscv/riscv-protos.h (enum insn_type): Add.
10258 * config/riscv/riscv-v.cc (needs_fp_rounding): Add !pred_mov.
10259 * doc/md.texi: Add vcond_mask_len.
10260 * gimple-match-exports.cc (maybe_resimplify_conditional_op):
10261 Create VCOND_MASK_LEN when length masking.
10262 * gimple-match.h (gimple_match_op::gimple_match_op): Always
10263 initialize len and bias.
10264 * internal-fn.cc (vec_cond_mask_len_direct): Add.
10265 (direct_vec_cond_mask_len_optab_supported_p): Add.
10266 (internal_fn_len_index): Add VCOND_MASK_LEN.
10267 (internal_fn_mask_index): Ditto.
10268 * internal-fn.def (VCOND_MASK_LEN): New internal function.
10269 * match.pd: Combine unconditional unary, binary and ternary
10270 operations into the respective COND_LEN operations.
10271 * optabs.def (OPTAB_D): Add vcond_mask_len optab.
10273 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
10275 * explow.cc (align_dynamic_address): Do nothing if the required
10276 alignment is a byte.
10278 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
10280 * function.h (get_stack_dynamic_offset): Declare.
10281 * function.cc (get_stack_dynamic_offset): New function,
10283 (get_stack_dynamic_offset): ...here.
10284 * explow.cc (allocate_dynamic_stack_space): Handle calls made
10285 after virtual registers have been instantiated.
10287 2023-11-06 liuhongt <hongtao.liu@intel.com>
10290 * config/i386/i386-expand.cc (ix86_expand_vec_perm_vpermt2):
10291 Avoid generating RTL code when d->testing_p.
10293 2023-11-06 Richard Biener <rguenther@suse.de>
10295 PR tree-optimization/112369
10296 * tree.cc (strip_float_extensions): Use element_precision.
10298 2023-11-06 Richard Biener <rguenther@suse.de>
10300 PR middle-end/112296
10301 * doc/extend.texi (__builtin_constant_p): Clarify that
10302 side-effects are discarded.
10304 2023-11-06 Kewen Lin <linkw@linux.ibm.com>
10307 * config.in: Regenerate.
10308 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
10309 inline asm handling under !HAVE_AS_POWER10_HTM.
10310 * configure: Regenerate.
10311 * configure.ac: Detect assembler support for HTM insns at power10.
10313 2023-11-06 xuli <xuli1@eswincomputing.com>
10314 Pan Li <pan2.li@intel.com>
10316 * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): New function for the hook.
10317 (riscv_register_pragmas): Register the hook.
10318 * config/riscv/riscv-protos.h (resolve_overloaded_builtin): New decl.
10319 * config/riscv/riscv-vector-builtins-bases.cc: New function impl.
10320 * config/riscv/riscv-vector-builtins-shapes.cc (build_one): Register overloaded function.
10321 * config/riscv/riscv-vector-builtins.cc (struct non_overloaded_registered_function_hasher):
10323 (function_builder::add_function): Add overloaded arg.
10324 (function_builder::add_unique_function): Map overloaded function to non-overloaded function.
10325 (function_builder::add_overloaded_function): New API impl.
10326 (registered_function::overloaded_hash): Calculate hash value.
10327 (has_vxrm_or_frm_p): New function impl.
10328 (non_overloaded_registered_function_hasher::hash): Ditto.
10329 (non_overloaded_registered_function_hasher::equal): Ditto.
10330 (handle_pragma_vector): Allocate space for hash table.
10331 (resolve_overloaded_builtin): New function impl.
10332 * config/riscv/riscv-vector-builtins.h (function_base::may_require_frm_p): Ditto.
10333 (function_base::may_require_vxrm_p): Ditto.
10335 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
10338 * config/i386/avx512bf16intrin.h: Push no-evex512 target.
10339 * config/i386/avx512bf16vlintrin.h: Ditto.
10340 * config/i386/avx512bitalgvlintrin.h: Ditto.
10341 * config/i386/avx512bwintrin.h: Ditto.
10342 * config/i386/avx512dqintrin.h: Ditto.
10343 * config/i386/avx512fintrin.h: Ditto.
10344 * config/i386/avx512fp16intrin.h: Ditto.
10345 * config/i386/avx512fp16vlintrin.h: Ditto.
10346 * config/i386/avx512ifmavlintrin.h: Ditto.
10347 * config/i386/avx512vbmi2vlintrin.h: Ditto.
10348 * config/i386/avx512vbmivlintrin.h: Ditto.
10349 * config/i386/avx512vlbwintrin.h: Ditto.
10350 * config/i386/avx512vldqintrin.h: Ditto.
10351 * config/i386/avx512vlintrin.h: Ditto.
10352 * config/i386/avx512vnnivlintrin.h: Ditto.
10353 * config/i386/avx512vp2intersectvlintrin.h: Ditto.
10354 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
10356 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
10358 * config/i386/avx512bf16vlintrin.h
10359 (_mm_avx512_castsi128_ps): New.
10360 (_mm256_avx512_castsi256_ps): Ditto.
10361 (_mm_avx512_slli_epi32): Ditto.
10362 (_mm256_avx512_slli_epi32): Ditto.
10363 (_mm_avx512_cvtepi16_epi32): Ditto.
10364 (_mm256_avx512_cvtepi16_epi32): Ditto.
10365 (__attribute__): Change intrin call.
10366 * config/i386/avx512bwintrin.h
10367 (_mm_avx512_set_epi32): New.
10368 (_mm_avx512_set_epi16): Ditto.
10369 (_mm_avx512_set_epi8): Ditto.
10370 (__attribute__): Change intrin call.
10371 * config/i386/avx512fp16intrin.h: Ditto.
10372 * config/i386/avx512fp16vlintrin.h
10373 (_mm_avx512_set1_ps): New.
10374 (_mm256_avx512_set1_ps): Ditto.
10375 (_mm_avx512_and_si128): Ditto.
10376 (_mm256_avx512_and_si256): Ditto.
10377 (__attribute__): Change intrin call.
10378 * config/i386/avx512vlbwintrin.h
10379 (_mm_avx512_set1_epi32): New.
10380 (_mm_avx512_set1_epi16): Ditto.
10381 (_mm_avx512_set1_epi8): Ditto.
10382 (_mm256_avx512_set_epi16): Ditto.
10383 (_mm256_avx512_set_epi8): Ditto.
10384 (_mm256_avx512_set1_epi16): Ditto.
10385 (_mm256_avx512_set1_epi32): Ditto.
10386 (_mm256_avx512_set1_epi8): Ditto.
10387 (_mm_avx512_max_epi16): Ditto.
10388 (_mm_avx512_min_epi16): Ditto.
10389 (_mm_avx512_max_epu16): Ditto.
10390 (_mm_avx512_min_epu16): Ditto.
10391 (_mm_avx512_max_epi8): Ditto.
10392 (_mm_avx512_min_epi8): Ditto.
10393 (_mm_avx512_max_epu8): Ditto.
10394 (_mm_avx512_min_epu8): Ditto.
10395 (_mm256_avx512_max_epi16): Ditto.
10396 (_mm256_avx512_min_epi16): Ditto.
10397 (_mm256_avx512_max_epu16): Ditto.
10398 (_mm256_avx512_min_epu16): Ditto.
10399 (_mm256_avx512_insertf128_ps): Ditto.
10400 (_mm256_avx512_extractf128_pd): Ditto.
10401 (_mm256_avx512_extracti128_si256): Ditto.
10402 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
10403 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
10404 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
10405 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
10406 (__attribute__): Change intrin call.
10408 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
10410 * config/i386/avx512bf16vlintrin.h: Change intrin call.
10411 * config/i386/avx512fintrin.h
10412 (_mm_avx512_undefined_ps): New.
10413 (_mm_avx512_undefined_pd): Ditto.
10414 (__attribute__): Change intrin call.
10415 * config/i386/avx512vbmivlintrin.h: Ditto.
10416 * config/i386/avx512vlbwintrin.h: Ditto.
10417 * config/i386/avx512vldqintrin.h: Ditto.
10418 * config/i386/avx512vlintrin.h
10419 (_mm_avx512_undefined_si128): New.
10420 (_mm256_avx512_undefined_ps): Ditto.
10421 (_mm256_avx512_undefined_pd): Ditto.
10422 (_mm256_avx512_undefined_si256): Ditto.
10423 (__attribute__): Change intrin call.
10425 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
10427 * config/i386/avx512bitalgvlintrin.h: Change intrin call.
10428 * config/i386/avx512dqintrin.h: Ditto.
10429 * config/i386/avx512fintrin.h:
10430 (_mm_avx512_setzero_ps): New.
10431 (_mm_avx512_setzero_pd): Ditto.
10432 (__attribute__): Change intrin call.
10433 * config/i386/avx512fp16intrin.h: Ditto.
10434 * config/i386/avx512fp16vlintrin.h: Ditto.
10435 * config/i386/avx512vbmi2vlintrin.h: Ditto.
10436 * config/i386/avx512vbmivlintrin.h: Ditto.
10437 * config/i386/avx512vlbwintrin.h: Ditto.
10438 * config/i386/avx512vldqintrin.h: Ditto.
10439 * config/i386/avx512vlintrin.h
10440 (_mm_avx512_setzero_si128): New.
10441 (_mm256_avx512_setzero_pd): Ditto.
10442 (_mm256_avx512_setzero_ps): Ditto.
10443 (_mm256_avx512_setzero_si256): Ditto.
10444 (__attribute__): Change intrin call.
10445 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
10446 * config/i386/gfniintrin.h: Ditto.
10448 2023-11-05 Uros Bizjak <ubizjak@gmail.com>
10450 * config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
10451 Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
10452 (REG_CLASS_NAMES): Ditto.
10453 (REG_CLASS_CONTENTS): Ditto.
10454 * config/i386/constraints.md ("R"): Update for rename.
10456 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
10458 * mode-switching.cc: Remove unused forward references.
10459 (seginfo): Remove bbnum.
10460 (new_seginfo): Remove associated argument.
10461 (optimize_mode_switching): Update calls accordingly.
10463 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
10465 * read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for
10466 invalid [...] operands.
10468 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
10471 * config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New
10472 function, with the core logic extracted from...
10473 (aarch64_can_change_mode_class): ...here. Extend the previous rules
10474 to allow changes between partial SVE modes and other modes if
10475 the other mode is no bigger than an element, and if no other rule
10476 prevents it. Use the aarch64_modes_tieable_p handling of
10477 partial Advanced SIMD structure modes.
10478 (aarch64_modes_tieable_p): Use aarch64_modes_compatible_p.
10479 Allow all vector mode ties that it allows.
10481 2023-11-05 Pan Li <pan2.li@intel.com>
10483 * config/riscv/autovec.md: Remove the size check of lrint.
10484 * config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help
10486 (emit_vec_widden_cvt_x_f): New help emit func impl.
10487 (emit_vec_rounding_to_integer): New func impl to emit the
10488 rounding from FP to integer.
10489 (expand_vec_lrint): Leverage emit_vec_rounding_to_integer.
10490 * config/riscv/vector.md: Take V_VLSF for vfncvt.
10492 2023-11-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10494 * config/riscv/vector.md: Fix bug.
10496 2023-11-04 Sergei Trofimovich <siarheit@google.com>
10498 PR bootstrap/112379
10499 * gcc-urlifier.cc (get_url_suffix_for_quoted_text): Mark as
10502 2023-11-04 Pan Li <pan2.li@intel.com>
10504 * config/riscv/vector-iterators.md: Remove HF modes.
10506 2023-11-04 David Malcolm <dmalcolm@redhat.com>
10508 * diagnostic.cc: Include "pretty-print-urlifier.h".
10509 (diagnostic_context::initialize): Initialize m_urlifier.
10510 (diagnostic_context::finish): Clean up m_urlifier
10511 (diagnostic_report::diagnostic): m_urlifier to pp_format.
10512 * diagnostic.h (diagnostic_context::m_urlifier): New field.
10513 * gcc-urlifier.cc: New file.
10514 * gcc-urlifier.def: New file.
10515 * gcc-urlifier.h: New file.
10516 * gcc.cc: Include "gcc-urlifier.h".
10517 (driver::global_initializations): Initialize global_dc->m_urlifier.
10518 * pretty-print-urlifier.h: New file.
10519 * pretty-print.cc: Include "pretty-print-urlifier.h".
10520 (obstack_append_string): New.
10521 (urlify_quoted_string): New.
10522 (pp_format): Add "urlifier" param and use it to implement optional
10523 urlification of quoted text strings.
10524 (pp_output_formatted_text): Make buffer a const pointer.
10525 (selftest::pp_printf_with_urlifier): New.
10526 (selftest::test_urlification): New.
10527 (selftest::pretty_print_cc_tests): Call it.
10528 * pretty-print.h (class urlifier): New forward declaration.
10529 (pp_format): Add optional urlifier param.
10530 * selftest-run-tests.cc (selftest::run_tests): Call
10531 selftest::gcc_urlifier_cc_tests .
10532 * selftest.h (selftest::gcc_urlifier_cc_tests): New decl.
10533 * toplev.cc: Include "gcc-urlifier.h".
10534 (general_init): Initialize global_dc->m_urlifier.
10536 2023-11-04 David Malcolm <dmalcolm@redhat.com>
10538 * Makefile.in (GCC_OBJS): Add gcc-urlifier.o.
10541 2023-11-04 David Malcolm <dmalcolm@redhat.com>
10543 * common.opt (fdiagnostics-text-art-charset=): Remove refererence
10544 to diagnostic-text-art.h.
10545 * coretypes.h (struct diagnostic_context): Replace forward decl
10547 (class diagnostic_context): ...this.
10548 * diagnostic-format-json.cc: Update for changes to
10549 diagnostic_context.
10550 * diagnostic-format-sarif.cc: Likewise.
10551 * diagnostic-show-locus.cc: Likewise.
10552 * diagnostic-text-art.h: Deleted file, moving content...
10553 (enum diagnostic_text_art_charset): ...to diagnostic.h,
10554 (DIAGNOSTICS_TEXT_ART_CHARSET_DEFAULT): ...deleting,
10555 (diagnostics_text_art_charset_init): ...deleting in favor of
10556 diagnostic_context::set_text_art_charset.
10557 * diagnostic.cc: Remove include of "diagnostic-text-art.h".
10558 (pedantic_warning_kind): Update for field renaming.
10559 (permissive_error_kind): Likewise.
10560 (permissive_error_option): Likewise.
10561 (diagnostic_initialize): Convert to...
10562 (diagnostic_context::initialize): ...this, updating for field
10564 (diagnostic_color_init): Convert to...
10565 (diagnostic_context::color_init): ...this.
10566 (diagnostic_urls_init): Convert to...
10567 (diagnostic_context::urls_init): ...this.
10568 (diagnostic_initialize_input_context): Convert to...
10569 (diagnostic_context::initialize_input_context): ...this.
10570 (diagnostic_finish): Convert to...
10571 (diagnostic_context::finish): ...this, updating for field
10573 (diagnostic_context::set_output_format): New.
10574 (diagnostic_context::set_client_data_hooks): New.
10575 (diagnostic_context::create_edit_context): New.
10576 (diagnostic_converted_column): Convert to...
10577 (diagnostic_context::converted_column): ...this.
10578 (diagnostic_get_location_text): Update for field renaming.
10579 (diagnostic_check_max_errors): Convert to...
10580 (diagnostic_context::check_max_errors): ...this, updating for
10582 (diagnostic_action_after_output): Convert to...
10583 (diagnostic_context::action_after_output): ...this, updating for
10585 (last_module_changed_p): Delete.
10586 (set_last_module): Delete.
10587 (includes_seen): Convert to...
10588 (diagnostic_context::includes_seen_p): ...this, updating for field
10590 (diagnostic_report_current_module): Convert to...
10591 (diagnostic_context::report_current_module): ...this, updating for
10592 field renamings, and replacing uses of last_module_changed_p and
10593 set_last_module to simple field accesses.
10594 (diagnostic_show_any_path): Convert to...
10595 (diagnostic_context::show_any_path): ...this.
10596 (diagnostic_classify_diagnostic): Convert to...
10597 (diagnostic_context::classify_diagnostic): ...this, updating for
10599 (diagnostic_push_diagnostics): Convert to...
10600 (diagnostic_context::push_diagnostics): ...this, updating for field
10602 (diagnostic_pop_diagnostics): Convert to...
10603 (diagnostic_context::pop_diagnostics): ...this, updating for field
10605 (get_any_inlining_info): Convert to...
10606 (diagnostic_context::get_any_inlining_info): ...this, updating for
10608 (update_effective_level_from_pragmas): Convert to...
10609 (diagnostic_context::update_effective_level_from_pragmas):
10610 ...this, updating for field renamings.
10611 (print_any_cwe): Convert to...
10612 (diagnostic_context::print_any_cwe): ...this.
10613 (print_any_rules): Convert to...
10614 (diagnostic_context::print_any_rules): ...this.
10615 (print_option_information): Convert to...
10616 (diagnostic_context::print_option_information): ...this, updating
10617 for field renamings.
10618 (diagnostic_enabled): Convert to...
10619 (diagnostic_context::diagnostic_enabled): ...this, updating for
10621 (warning_enabled_at): Convert to...
10622 (diagnostic_context::warning_enabled_at): ...this.
10623 (diagnostic_report_diagnostic): Convert to...
10624 (diagnostic_context::report_diagnostic): ...this, updating for
10625 field renamings and conversions to member functions.
10626 (diagnostic_append_note): Update for field renaming.
10627 (diagnostic_impl): Use diagnostic_context::report_diagnostic
10629 (diagnostic_n_impl): Likewise.
10630 (diagnostic_emit_diagram): Convert to...
10631 (diagnostic_context::emit_diagram): ...this, updating for field
10633 (error_recursion): Convert to...
10634 (diagnostic_context::error_recursion): ...this.
10635 (diagnostic_text_output_format::~diagnostic_text_output_format):
10637 (diagnostics_text_art_charset_init): Convert to...
10638 (diagnostic_context::set_text_art_charset): ...this.
10639 (assert_location_text): Update for field renamings.
10640 * diagnostic.h (enum diagnostic_text_art_charset): Move here from
10641 diagnostic-text-art.h.
10642 (struct diagnostic_context): Convert to...
10643 (class diagnostic_context): ...this.
10644 (diagnostic_context::ice_handler_callback_t): New typedef.
10645 (diagnostic_context::set_locations_callback_t): New typedef.
10646 (diagnostic_context::initialize): New decl.
10647 (diagnostic_context::color_init): New decl.
10648 (diagnostic_context::urls_init): New decl.
10649 (diagnostic_context::file_cache_init): New decl.
10650 (diagnostic_context::finish): New decl.
10651 (diagnostic_context::set_set_locations_callback): New.
10652 (diagnostic_context::initialize_input_context): New decl.
10653 (diagnostic_context::warning_enabled_at): New decl.
10654 (diagnostic_context::option_unspecified_p): New.
10655 (diagnostic_context::report_diagnostic): New decl.
10656 (diagnostic_context::report_current_module): New decl.
10657 (diagnostic_context::check_max_errors): New decl.
10658 (diagnostic_context::action_after_output): New decl.
10659 (diagnostic_context::classify_diagnostic): New decl.
10660 (diagnostic_context::push_diagnostics): New decl.
10661 (diagnostic_context::pop_diagnostics): New decl.
10662 (diagnostic_context::emit_diagram): New decl.
10663 (diagnostic_context::set_output_format): New decl.
10664 (diagnostic_context::set_text_art_charset): New decl.
10665 (diagnostic_context::set_client_data_hooks): New decl.
10666 (diagnostic_context::create_edit_context): New decl.
10667 (diagnostic_context::set_warning_as_error_requested): New.
10668 (diagnostic_context::set_report_bug): New.
10669 (diagnostic_context::set_extra_output_kind): New.
10670 (diagnostic_context::set_show_cwe): New.
10671 (diagnostic_context::set_show_rules): New.
10672 (diagnostic_context::set_path_format): New.
10673 (diagnostic_context::set_show_path_depths): New.
10674 (diagnostic_context::set_show_option_requested): New.
10675 (diagnostic_context::set_max_errors): New.
10676 (diagnostic_context::set_escape_format): New.
10677 (diagnostic_context::set_ice_handler_callback): New.
10678 (diagnostic_context::warning_as_error_requested_p): New.
10679 (diagnostic_context::show_path_depths_p): New.
10680 (diagnostic_context::get_path_format): New.
10681 (diagnostic_context::get_escape_format): New.
10682 (diagnostic_context::get_file_cache): New.
10683 (diagnostic_context::get_edit_context): New.
10684 (diagnostic_context::get_client_data_hooks): New.
10685 (diagnostic_context::get_diagram_theme): New.
10686 (diagnostic_context::converted_column): New decl.
10687 (diagnostic_context::diagnostic_count): New.
10688 (diagnostic_context::includes_seen_p): New decl.
10689 (diagnostic_context::print_any_cwe): New decl.
10690 (diagnostic_context::print_any_rules): New decl.
10691 (diagnostic_context::print_option_information): New decl.
10692 (diagnostic_context::show_any_path): New decl.
10693 (diagnostic_context::error_recursion): New decl.
10694 (diagnostic_context::diagnostic_enabled): New decl.
10695 (diagnostic_context::get_any_inlining_info): New decl.
10696 (diagnostic_context::update_effective_level_from_pragmas): New
10698 (diagnostic_context::m_file_cache): Make private.
10699 (diagnostic_context::diagnostic_count): Rename to...
10700 (diagnostic_context::m_diagnostic_count): ...this and make
10702 (diagnostic_context::warning_as_error_requested): Rename to...
10703 (diagnostic_context::m_warning_as_error_requested): ...this and
10705 (diagnostic_context::n_opts): Rename to...
10706 (diagnostic_context::m_n_opts): ...this and make private.
10707 (diagnostic_context::classify_diagnostic): Rename to...
10708 (diagnostic_context::m_classify_diagnostic): ...this and make
10710 (diagnostic_context::classification_history): Rename to...
10711 (diagnostic_context::m_classification_history): ...this and make
10713 (diagnostic_context::n_classification_history): Rename to...
10714 (diagnostic_context::m_n_classification_history): ...this and make
10716 (diagnostic_context::push_list): Rename to...
10717 (diagnostic_context::m_push_list): ...this and make private.
10718 (diagnostic_context::n_push): Rename to...
10719 (diagnostic_context::m_n_push): ...this and make private.
10720 (diagnostic_context::show_cwe): Rename to...
10721 (diagnostic_context::m_show_cwe): ...this and make private.
10722 (diagnostic_context::show_rules): Rename to...
10723 (diagnostic_context::m_show_rules): ...this and make private.
10724 (diagnostic_context::path_format): Rename to...
10725 (diagnostic_context::m_path_format): ...this and make private.
10726 (diagnostic_context::show_path_depths): Rename to...
10727 (diagnostic_context::m_show_path_depths): ...this and make
10729 (diagnostic_context::show_option_requested): Rename to...
10730 (diagnostic_context::m_show_option_requested): ...this and make
10732 (diagnostic_context::abort_on_error): Rename to...
10733 (diagnostic_context::m_abort_on_error): ...this.
10734 (diagnostic_context::show_column): Rename to...
10735 (diagnostic_context::m_show_column): ...this.
10736 (diagnostic_context::pedantic_errors): Rename to...
10737 (diagnostic_context::m_pedantic_errors): ...this.
10738 (diagnostic_context::permissive): Rename to...
10739 (diagnostic_context::m_permissive): ...this.
10740 (diagnostic_context::opt_permissive): Rename to...
10741 (diagnostic_context::m_opt_permissive): ...this.
10742 (diagnostic_context::fatal_errors): Rename to...
10743 (diagnostic_context::m_fatal_errors): ...this.
10744 (diagnostic_context::dc_inhibit_warnings): Rename to...
10745 (diagnostic_context::m_inhibit_warnings): ...this.
10746 (diagnostic_context::dc_warn_system_headers): Rename to...
10747 (diagnostic_context::m_warn_system_headers): ...this.
10748 (diagnostic_context::max_errors): Rename to...
10749 (diagnostic_context::m_max_errors): ...this and make private.
10750 (diagnostic_context::internal_error): Rename to...
10751 (diagnostic_context::m_internal_error): ...this.
10752 (diagnostic_context::option_enabled): Rename to...
10753 (diagnostic_context::m_option_enabled): ...this.
10754 (diagnostic_context::option_state): Rename to...
10755 (diagnostic_context::m_option_state): ...this.
10756 (diagnostic_context::option_name): Rename to...
10757 (diagnostic_context::m_option_name): ...this.
10758 (diagnostic_context::get_option_url): Rename to...
10759 (diagnostic_context::m_get_option_url): ...this.
10760 (diagnostic_context::print_path): Rename to...
10761 (diagnostic_context::m_print_path): ...this.
10762 (diagnostic_context::make_json_for_path): Rename to...
10763 (diagnostic_context::m_make_json_for_path): ...this.
10764 (diagnostic_context::x_data): Rename to...
10765 (diagnostic_context::m_client_aux_data): ...this.
10766 (diagnostic_context::last_location): Rename to...
10767 (diagnostic_context::m_last_location): ...this.
10768 (diagnostic_context::last_module): Rename to...
10769 (diagnostic_context::m_last_module): ...this and make private.
10770 (diagnostic_context::lock): Rename to...
10771 (diagnostic_context::m_lock): ...this and make private.
10772 (diagnostic_context::lang_mask): Rename to...
10773 (diagnostic_context::m_lang_mask): ...this.
10774 (diagnostic_context::inhibit_notes_p): Rename to...
10775 (diagnostic_context::m_inhibit_notes_p): ...this.
10776 (diagnostic_context::report_bug): Rename to...
10777 (diagnostic_context::m_report_bug): ...this and make private.
10778 (diagnostic_context::extra_output_kind): Rename to...
10779 (diagnostic_context::m_extra_output_kind): ...this and make
10781 (diagnostic_context::column_unit): Rename to...
10782 (diagnostic_context::m_column_unit): ...this and make private.
10783 (diagnostic_context::column_origin): Rename to...
10784 (diagnostic_context::m_column_origin): ...this and make private.
10785 (diagnostic_context::tabstop): Rename to...
10786 (diagnostic_context::m_tabstop): ...this and make private.
10787 (diagnostic_context::escape_format): Rename to...
10788 (diagnostic_context::m_escape_format): ...this and make private.
10789 (diagnostic_context::edit_context_ptr): Rename to...
10790 (diagnostic_context::m_edit_context_ptr): ...this and make
10792 (diagnostic_context::set_locations_cb): Rename to...
10793 (diagnostic_context::m_set_locations_cb): ...this and make
10795 (diagnostic_context::ice_handler_cb): Rename to...
10796 (diagnostic_context::m_ice_handler_cb): ...this and make private.
10797 (diagnostic_context::includes_seen): Rename to...
10798 (diagnostic_context::m_includes_seen): ...this and make private.
10799 (diagnostic_inhibit_notes): Update for field renaming.
10800 (diagnostic_context_auxiliary_data): Likewise.
10801 (diagnostic_abort_on_error): Convert from macro to inline function
10802 and update for field renaming.
10803 (diagnostic_kind_count): Convert from macro to inline function and
10804 use diagnostic_count accessor.
10805 (diagnostic_report_warnings_p): Update for field renaming.
10806 (diagnostic_initialize): Convert decl to inline function calling
10807 into diagnostic_context.
10808 (diagnostic_color_init): Likewise.
10809 (diagnostic_urls_init): Likewise.
10810 (diagnostic_urls_init): Likewise.
10811 (diagnostic_finish): Likewise.
10812 (diagnostic_report_current_module): Likewise.
10813 (diagnostic_show_any_path): Delete decl.
10814 (diagnostic_initialize_input_context): Convert decl to inline
10815 function calling into diagnostic_context.
10816 (diagnostic_classify_diagnostic): Likewise.
10817 (diagnostic_push_diagnostics): Likewise.
10818 (diagnostic_pop_diagnostics): Likewise.
10819 (diagnostic_report_diagnostic): Likewise.
10820 (diagnostic_action_after_output): Likewise.
10821 (diagnostic_check_max_errors): Likewise.
10822 (diagnostic_file_cache_fini): Delete decl.
10823 (diagnostic_converted_column): Delete decl.
10824 (warning_enabled_at): Convert decl to inline function calling into
10825 diagnostic_context.
10826 (option_unspecified_p): New.
10827 (diagnostic_emit_diagram): Delete decl.
10828 * gcc.cc: Remove include of "diagnostic-text-art.h".
10829 Update for changes to diagnostic_context.
10830 * input.cc (diagnostic_file_cache_init): Move implementation
10832 (diagnostic_context::file_cache_init): ...this new member
10834 (diagnostic_file_cache_fini): Delete.
10835 (diagnostics_file_cache_forcibly_evict_file): Update for
10836 m_file_cache becoming private.
10837 (location_get_source_line): Likewise.
10838 (get_source_file_content): Likewise.
10839 (location_missing_trailing_newline): Likewise.
10840 * input.h (diagnostics_file_cache_fini): Delete.
10841 * langhooks.cc: Update for changes to diagnostic_context.
10842 * lto-wrapper.cc: Likewise.
10843 * opts.cc: Remove include of "diagnostic-text-art.h".
10844 Update for changes to diagnostic_context.
10845 * selftest-diagnostic.cc: Update for changes to
10846 diagnostic_context.
10847 * toplev.cc: Likewise.
10848 * tree-diagnostic-path.cc: Likewise.
10849 * tree-diagnostic.cc: Likewise.
10851 2023-11-03 Martin Uecker <uecker@tugraz.at>
10854 * gimple-ssa-warn-access.cc
10855 (pass_waccess::maybe_check_access_sizes): For VLA bounds
10856 in parameters, only warn about null pointers with 'static'.
10858 2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
10860 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked
10861 calls to use masked simdclones.
10863 2023-11-03 David Malcolm <dmalcolm@redhat.com>
10865 * diagnostic.cc (diagnostic_initialize): Update for consolidation
10866 of group-based fields.
10867 (diagnostic_report_diagnostic): Likewise.
10868 (diagnostic_context::begin_group): New, based on body of
10869 auto_diagnostic_group's ctor.
10870 (diagnostic_context::end_group): New, based on body of
10871 auto_diagnostic_group's dtor.
10872 (auto_diagnostic_group::auto_diagnostic_group): Convert to a call
10874 (auto_diagnostic_group::~auto_diagnostic_group): Convert to a call
10876 * diagnostic.h (diagnostic_context::begin_group): New decl.
10877 (diagnostic_context::end_group): New decl.
10878 (diagnostic_context::diagnostic_group_nesting_depth): Rename to...
10879 (diagnostic_context::m_diagnostic_groups.m_nesting_depth):
10881 (diagnostic_context::diagnostic_group_emission_count): Rename
10883 (diagnostic_context::m_diagnostic_groups::m_emission_count):
10886 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
10888 PR tree-optimization/111766
10889 * range-op.cc (operator_equal::fold_range): Check constants
10890 against the bitmask.
10891 (operator_not_equal::fold_range): Ditto.
10892 * value-range.h (irange_bitmask::member_p): New.
10894 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
10896 * value-range.cc (irange_bitmask::adjust_range): New.
10897 (irange::intersect_bitmask): Call adjust_range.
10898 * value-range.h (irange_bitmask::adjust_range): New prototype.
10900 2023-11-03 Uros Bizjak <ubizjak@gmail.com>
10902 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
10904 (ix86_memory_address_reg_class): ... this. Generalize address
10905 register class handling to allow multiple address register classes.
10906 Return maximal class for unrecognized instructions. Improve comments.
10907 (ix86_insn_base_reg_class): Rewrite to handle
10908 multiple address register classes.
10909 (ix86_regno_ok_for_insn_base_p): Ditto.
10910 (ix86_insn_index_reg_class): Ditto.
10911 * config/i386/i386.md: Rename "gpr32" attribute to "addr"
10912 and substitute its values with "0" -> "gpr16", "1" -> "*".
10913 (addr): New attribute to limit allowed address register set.
10915 * config/i386/mmx.md: Rename "gpr32" attribute to "addr"
10916 and substitute its values with "0" -> "gpr16", "1" -> "*".
10917 * config/i386/sse.md: Ditto.
10919 2023-11-03 Richard Biener <rguenther@suse.de>
10921 * tree-vect-loop.cc (vectorizable_live_operation): Simplify
10922 LC PHI replacement.
10924 2023-11-03 Roger Sayle <roger@nextmovesoftware.com>
10926 * config/arc/arc.md (addsi3): Fix GNU-style code formatting.
10927 (adddi3): Change define_expand to generate a *adddi3.
10928 (*adddi3): New define_insn_and_split to lower DImode additions
10929 during the split1 pass (after combine and before reload).
10930 (ashldi3): New define_expand to (only) generate *ashldi3_cnt1
10931 for DImode left shifts by a single bit.
10932 (*ashldi3_cnt1): New define_insn_and_split to lower DImode
10933 left shifts by one bit to an *adddi3.
10935 2023-11-03 Richard Sandiford <richard.sandiford@arm.com>
10937 * config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove
10938 can_create_pseudo_p condition.
10940 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10942 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1.
10943 * tree-vect-stmts.cc (vectorizable_load): Ditto.
10945 2023-11-03 Richard Biener <rguenther@suse.de>
10947 PR tree-optimization/112366
10948 * tree-vect-loop.cc (vectorizable_live_operation): Remove
10951 2023-11-03 Richard Biener <rguenther@suse.de>
10953 PR tree-optimization/112310
10954 * tree-ssa-pre.cc (do_hoist_insertion): Keep the union
10955 of expressions, validate dependences are contained within
10956 the hoistable set before hoisting.
10958 2023-11-03 Pan Li <pan2.li@intel.com>
10960 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
10961 (lround<mode><v_i_l_ll_convert>2): Ditto.
10962 (lceil<mode><v_i_l_ll_convert>2): Ditto.
10963 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
10964 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
10966 (lround<mode><v_f2si_convert>2): Ditto.
10967 (lceil<mode><v_f2si_convert>2): Ditto.
10968 (lfloor<mode><v_f2si_convert>2): Ditto.
10969 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
10971 (lround<mode><v_f2di_convert>2): Ditto.
10972 (lceil<mode><v_f2di_convert>2): Ditto.
10973 (lfloor<mode><v_f2di_convert>2): Ditto.
10974 * config/riscv/vector-iterators.md: Renew iterators for both
10977 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10980 * config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function.
10981 (simplify_replace_vlmax_avl): Ditto.
10982 (pass_avlprop::execute): Add immediate AVL simplification.
10983 * config/riscv/riscv-protos.h (imm_avl_p): Rename.
10984 * config/riscv/riscv-v.cc (const_vlmax_p): Ditto.
10985 (imm_avl_p): Ditto.
10986 (emit_vlmax_insn): Adapt for new interface name.
10987 * config/riscv/vector.md (mode_idx): New attribute.
10989 2023-11-03 Pan Li <pan2.li@intel.com>
10992 2023-11-02 Pan Li <pan2.li@intel.com>
10994 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
10995 (lround<mode><v_i_l_ll_convert>2): Ditto.
10996 (lceil<mode><v_i_l_ll_convert>2): Ditto.
10997 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
10998 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
11000 (lround<mode><v_f2si_convert>2): Ditto.
11001 (lceil<mode><v_f2si_convert>2): Ditto.
11002 (lfloor<mode><v_f2si_convert>2): Ditto.
11003 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
11005 (lround<mode><v_f2di_convert>2): Ditto.
11006 (lceil<mode><v_f2di_convert>2): Ditto.
11007 (lfloor<mode><v_f2di_convert>2): Ditto.
11008 * config/riscv/vector-iterators.md: Renew iterators for both
11011 2023-11-02 Edwin Lu <ewlu@rivosinc.com>
11013 * config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert
11015 2023-11-02 Jeff Law <jlaw@ventanamicro.com>
11017 * config/h8300/combiner.md: Add new patterns for single bit
11020 2023-11-02 Pan Li <pan2.li@intel.com>
11022 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
11023 (lround<mode><v_i_l_ll_convert>2): Ditto.
11024 (lceil<mode><v_i_l_ll_convert>2): Ditto.
11025 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
11026 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
11028 (lround<mode><v_f2si_convert>2): Ditto.
11029 (lceil<mode><v_f2si_convert>2): Ditto.
11030 (lfloor<mode><v_f2si_convert>2): Ditto.
11031 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
11033 (lround<mode><v_f2di_convert>2): Ditto.
11034 (lceil<mode><v_f2di_convert>2): Ditto.
11035 (lfloor<mode><v_f2di_convert>2): Ditto.
11036 * config/riscv/vector-iterators.md: Renew iterators for both
11039 2023-11-02 Sam James <sam@gentoo.org>
11041 * doc/passes.texi (Dead code elimination): Explicitly say 'lifetime'
11042 as this has become the standard term for what we're doing here.
11044 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11046 * config/riscv/riscv-avlprop.cc
11047 (pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow
11048 non-real insn AVL propation.
11050 2023-11-02 Robin Dapp <rdapp@ventanamicro.com>
11052 PR middle-end/111401
11053 * internal-fn.cc (internal_fn_else_index): New function.
11054 * internal-fn.h (internal_fn_else_index): Define.
11055 * tree-if-conv.cc (convert_scalar_cond_reduction): Emit COND_OP
11057 (predicate_scalar_phi): Add whitespace.
11058 * tree-vect-loop.cc (fold_left_reduction_fn): Add IFN_COND_OP.
11059 (neutral_op_for_reduction): Return -0 for PLUS.
11060 (check_reduction_path): Don't count else operand in COND_OP.
11061 (vect_is_simple_reduction): Ditto.
11062 (vect_create_epilog_for_reduction): Fix whitespace.
11063 (vectorize_fold_left_reduction): Add COND_OP handling.
11064 (vectorizable_reduction): Don't count else operand in COND_OP.
11065 (vect_transform_reduction): Add COND_OP handling.
11066 * tree-vectorizer.h (neutral_op_for_reduction): Add default
11069 2023-11-02 Richard Biener <rguenther@suse.de>
11071 PR tree-optimization/112320
11072 * gimple-fold.h (rewrite_to_defined_overflow): New overload
11073 for in-place operation.
11074 * gimple-fold.cc (rewrite_to_defined_overflow): Add stmt
11075 iterator argument to worker, define separate API for
11076 in-place and not in-place operation.
11077 * tree-if-conv.cc (predicate_statements): Simplify.
11078 * tree-scalar-evolution.cc (final_value_replacement_loop):
11080 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): Adjust.
11081 * tree-ssa-reassoc.cc (update_range_test): Likewise.
11083 2023-11-02 Uros Bizjak <ubizjak@gmail.com>
11085 * config/i386/i386.md: Move stack protector patterns
11086 above mov $0,%reg -> xor %reg,%reg peephole2 pattern.
11088 2023-11-02 liuhongt <hongtao.liu@intel.com>
11090 * config/i386/mmx.md (cmlav4hf4): New expander.
11091 (cmla_conjv4hf4): Ditto.
11092 (cmulv4hf3): Ditto.
11093 (cmul_conjv4hf3): Ditto.
11095 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11097 * config/riscv/vector.md: Fix redundant codes in attributes.
11099 2023-11-02 xuli <xuli1@eswincomputing.com>
11101 * config/riscv/riscv-vector-builtins-bases.cc: Expand non-tuple intrinsics.
11102 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Define non-tuple intrinsics.
11103 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
11104 * config/riscv/riscv-vector-builtins.cc: Add arg types.
11106 2023-11-02 Pan Li <pan2.li@intel.com>
11108 * tree-vect-stmts.cc (vectorizable_internal_function): Add type
11109 size check for vectype_out doesn't participating for optab query.
11110 (vectorizable_call): Remove the type size check.
11112 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11115 * config/riscv/vector.md: Add '0'.
11117 2023-11-01 Roger Sayle <roger@nextmovesoftware.com>
11120 * config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition
11121 as operands[2] with predicate register_operand must be !MEM_P.
11122 (peephole2): Optimize a mulx followed by a register-to-register
11123 move, to place result in the correct destination if possible.
11125 2023-11-01 Patrick O'Neill <patrick@rivosinc.com>
11127 * config/riscv/sync.md: Use riscv_subword_address function to
11128 calculate the address and shift in atomic_test_and_set.
11130 2023-11-01 Vineet Gupta <vineetg@rivosinc.com>
11132 * config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode
11133 returned for libcall case.
11135 2023-11-01 Martin Uecker <uecker@tugraz.at>
11138 * doc/invoke.texi: Document -Walloc-size option.
11140 2023-11-01 Edwin Lu <ewlu@rivosinc.com>
11142 * genautomata.cc (write_automata): move endif
11144 2023-11-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
11146 * omp-simd-clone.cc (simd_clone_adjust_return_type): Hoist out code to
11147 create return array and don't return new type.
11148 (simd_clone_adjust_argument_types): Hoist out code that creates
11149 ipa_param_body_adjustments and don't return them.
11150 (simd_clone_adjust): Call TARGET_SIMD_CLONE_ADJUST after return and
11151 argument types have been vectorized, create adjustments and return array
11153 (expand_simd_clones): Call TARGET_SIMD_CLONE_ADJUST after return and
11154 argument types have been vectorized.
11156 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
11159 * config/i386/i386.md (stack_protexct_set_2 peephole2):
11160 Use general_gr_operand as operand 4 predicate.
11162 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
11164 * config/i386/i386.md (stack_protect_set): Explicitly
11165 generate scratch register in word mode.
11166 (@stack_protect_set_1_<mode>): Rename to ...
11167 (@stack_protect_set_1_<PTR:mode>_<SWI48:mode>): ... this.
11168 Use SWI48 mode iterator to match scratch register.
11169 (stack_protexct_set_1 peephole2): Use PTR, W and SWI48 mode
11170 iterators to match peephole sequence. Use general_operand
11171 predicate for operand 4. Allow different operand 2 and operand 3
11172 registers and use peep2_reg_dead_p to ensure new scratch
11173 register is dead before peephole seqeunce. Use peep2_reg_dead_p
11174 to ensure old scratch register is dead after peephole sequence.
11175 (*stack_protect_set_2_<mode>): Rename to ...
11176 (*stack_protect_set_2_<mode>_si): .. this.
11177 (*stack_protect_set_3): Rename to ...
11178 (*stack_protect_set_2_<mode>_di): ... this.
11179 Use PTR mode iterator to match stack protector memory move.
11180 Use earlyclobber for all alternatives of operand 1.
11181 (stack_protexct_set_2 peephole2): Use PTR, W and SWI48 mode
11182 iterators to match peephole sequence. Use general_operand
11183 predicate for operand 4. Allow different operand 2 and operand 3
11184 registers and use peep2_reg_dead_p to ensure new scratch
11185 register is dead before peephole seqeunce. Use peep2_reg_dead_p
11186 to ensure old scratch register is dead after peephole sequence.
11188 2023-11-01 xuli <xuli1@eswincomputing.com>
11190 * config/riscv/riscv-vector-builtins-functions.def (vundefined): Add vundefine
11191 intrinsics for tuple types.
11192 * config/riscv/riscv-vector-builtins.cc: Ditto.
11193 * config/riscv/vector.md (@vundefined<mode>): Ditto.
11195 2023-11-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11197 * tree-vect-slp.cc (vect_build_slp_tree_1): Fix whitespace.
11199 2023-10-31 David Malcolm <dmalcolm@redhat.com>
11201 * Makefile.in (ANALYZER_OBJS): Add analyzer/record-layout.o.
11203 2023-10-31 David Malcolm <dmalcolm@redhat.com>
11205 * input.cc (dump_location_info): Update for removal of
11206 MACRO_MAP_EXPANSION_POINT_LOCATION.
11207 * tree-diagnostic.cc (maybe_unwind_expanded_macro_loc):
11210 2023-10-31 David Malcolm <dmalcolm@redhat.com>
11212 * opts.cc (get_option_url): Update comment; the requirement to
11213 pass DOCUMENTATION_ROOT_URL's value via -D was removed in
11214 r10-8065-ge33a1eae25b8a8.
11216 2023-10-31 David Malcolm <dmalcolm@redhat.com>
11218 * pretty-print.cc (pretty_printer::pretty_printer): Initialize
11219 m_skipping_null_url.
11220 (pp_begin_url): Handle URL being null.
11221 (pp_end_url): Likewise.
11222 (selftest::test_null_urls): New.
11223 (selftest::pretty_print_cc_tests): Call it.
11224 * pretty-print.h (pretty_printer::m_skipping_null_url): New.
11226 2023-10-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11228 * tree-vect-slp.cc (vect_get_operand_map): Add MASK_LEN_GATHER_LOAD.
11229 (vect_build_slp_tree_1): Ditto.
11230 (vect_build_slp_tree_2): Ditto.
11232 2023-10-31 Cupertino Miranda <cupertino.miranda@oracle.com>
11234 * config/bpf/bpf-passes.def (pass_lower_bpf_core): Added pass.
11235 * config/bpf/bpf-protos.h: Added prototype for new pass.
11236 * config/bpf/bpf.cc (bpf_delegitimize_address): New function.
11237 * config/bpf/bpf.md (mov_reloc_core<MM:mode>): Prefixed
11239 * config/bpf/core-builtins.cc (cr_builtins) Added access_node to
11241 (is_attr_preserve_access): Improved check.
11242 (core_field_info): Make use of root_for_core_field_info
11244 (process_field_expr): Adapted to new functions.
11245 (pack_type): Small improvement.
11246 (bpf_handle_plugin_finish_type): Adapted to GTY(()).
11247 (bpf_init_core_builtins): Changed to new function names.
11248 (construct_builtin_core_reloc): Improved implementation.
11249 (bpf_resolve_overloaded_core_builtin): Changed how
11250 __builtin_preserve_access_index is converted.
11251 (compute_field_expr): Corrected implementation. Added
11252 access_node argument.
11253 (bpf_core_get_index): Added valid argument.
11254 (root_for_core_field_info, pack_field_expr)
11255 (core_expr_with_field_expr_plus_base, make_core_safe_access_index)
11256 (replace_core_access_index_comp_expr, maybe_get_base_for_field_expr)
11257 (core_access_clean, core_is_access_index, core_mark_as_access_index)
11258 (make_gimple_core_safe_access_index, execute_lower_bpf_core)
11259 (make_pass_lower_bpf_core): Added functions.
11260 (pass_data_lower_bpf_core): New pass struct.
11261 (pass_lower_bpf_core): New gimple_opt_pass class.
11262 (pack_field_expr_for_preserve_field)
11263 (bpf_replace_core_move_operands): Removed function.
11264 (bpf_enum_value_kind): Added GTY(()).
11265 * config/bpf/core-builtins.h (bpf_field_info_kind, bpf_type_id_kind)
11266 (bpf_type_info_kind, bpf_enum_value_kind): New enum.
11267 * config/bpf/t-bpf: Added pass bpf-passes.def to PASSES_EXTRA.
11269 2023-10-31 Neal Frager <neal.frager@amd.com>
11271 * config/microblaze/microblaze.cc: Fix mcpu version check.
11273 2023-10-31 Patrick O'Neill <patrick@rivosinc.com>
11275 * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove
11276 TARGET_ATOMIC constraint
11277 (atomic_store_rvwmo<mode>): Ditto.
11278 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto.
11279 (atomic_store_ztso<mode>): Ditto.
11280 * config/riscv/sync.md (atomic_load<mode>): Ditto.
11281 (atomic_store<mode>): Ditto.
11283 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
11285 * config/riscv/riscv.cc (riscv_index_reg_class):
11286 Return GR_REGS for XTheadFMemIdx.
11287 (riscv_regno_ok_for_index_p): Add support for XTheadFMemIdx.
11288 * config/riscv/riscv.h (HARDFP_REG_P): New macro.
11289 * config/riscv/thead.cc (is_fmemidx_mode): New function.
11290 (th_memidx_classify_address_index): Add support for XTheadFMemIdx.
11291 (th_fmemidx_output_index): New function.
11292 (th_output_move): Add support for XTheadFMemIdx.
11293 * config/riscv/thead.md (TH_M_ANYF): New mode iterator.
11294 (TH_M_NOEXTF): Likewise.
11295 (*th_fmemidx_movsf_hardfloat): New INSN.
11296 (*th_fmemidx_movdf_hardfloat_rv64): Likewise.
11297 (*th_fmemidx_I_a): Likewise.
11298 (*th_fmemidx_I_c): Likewise.
11299 (*th_fmemidx_US_a): Likewise.
11300 (*th_fmemidx_US_c): Likewise.
11301 (*th_fmemidx_UZ_a): Likewise.
11302 (*th_fmemidx_UZ_c): Likewise.
11304 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
11306 * config/riscv/constraints.md (th_m_mia): New constraint.
11307 (th_m_mib): Likewise.
11308 (th_m_mir): Likewise.
11309 (th_m_miu): Likewise.
11310 * config/riscv/riscv-protos.h (enum riscv_address_type):
11311 Add new address types ADDRESS_REG_REG, ADDRESS_REG_UREG,
11312 and ADDRESS_REG_WB and their documentation.
11313 (struct riscv_address_info): Add new field 'shift' and
11314 document the field usage for the new address types.
11315 (riscv_valid_base_register_p): New prototype.
11316 (th_memidx_legitimate_modify_p): Likewise.
11317 (th_memidx_legitimate_index_p): Likewise.
11318 (th_classify_address): Likewise.
11319 (th_output_move): Likewise.
11320 (th_print_operand_address): Likewise.
11321 * config/riscv/riscv.cc (riscv_index_reg_class):
11322 Return GR_REGS for XTheadMemIdx.
11323 (riscv_regno_ok_for_index_p): Add support for XTheadMemIdx.
11324 (riscv_classify_address): Call th_classify_address() on top.
11325 (riscv_output_move): Call th_output_move() on top.
11326 (riscv_print_operand_address): Call th_print_operand_address()
11328 * config/riscv/riscv.h (HAVE_POST_MODIFY_DISP): New macro.
11329 (HAVE_PRE_MODIFY_DISP): Likewise.
11330 * config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2): Disable
11332 (*zero_extendqi<SUPERQI:mode>2_internal): Convert to expand,
11333 create INSN with same name and disable it for XTheadMemIdx.
11334 (extendsidi2): Likewise.
11335 (*extendsidi2_internal): Disable for XTheadMemIdx.
11336 * config/riscv/thead.cc (valid_signed_immediate): New helper
11338 (th_memidx_classify_address_modify): New function.
11339 (th_memidx_legitimate_modify_p): Likewise.
11340 (th_memidx_output_modify): Likewise.
11341 (is_memidx_mode): Likewise.
11342 (th_memidx_classify_address_index): Likewise.
11343 (th_memidx_legitimate_index_p): Likewise.
11344 (th_memidx_output_index): Likewise.
11345 (th_classify_address): Likewise.
11346 (th_output_move): Likewise.
11347 (th_print_operand_address): Likewise.
11348 * config/riscv/thead.md (*th_memidx_operand): New splitter.
11349 (*th_memidx_zero_extendqi<SUPERQI:mode>2): New INSN.
11350 (*th_memidx_extendsidi2): Likewise.
11351 (*th_memidx_zero_extendsidi2): Likewise.
11352 (*th_memidx_zero_extendhi<GPR:mode>2): Likewise.
11353 (*th_memidx_extend<SHORT:mode><SUPERQI:mode>2): Likewise.
11354 (*th_memidx_bb_zero_extendsidi2): Likewise.
11355 (*th_memidx_bb_zero_extendhi<GPR:mode>2): Likewise.
11356 (*th_memidx_bb_extendhi<GPR:mode>2): Likewise.
11357 (*th_memidx_bb_extendqi<SUPERQI:mode>2): Likewise.
11358 (TH_M_ANYI): New mode iterator.
11359 (TH_M_NOEXTI): Likewise.
11360 (*th_memidx_I_a): New combiner optimization.
11361 (*th_memidx_I_b): Likewise.
11362 (*th_memidx_I_c): Likewise.
11363 (*th_memidx_US_a): Likewise.
11364 (*th_memidx_US_b): Likewise.
11365 (*th_memidx_US_c): Likewise.
11366 (*th_memidx_UZ_a): Likewise.
11367 (*th_memidx_UZ_b): Likewise.
11368 (*th_memidx_UZ_c): Likewise.
11370 2023-10-31 Carl Love <cel@us.ibm.com>
11372 * doc/extend.texi (__builtin_bcdsub_le, __builtin_bcdsub_ge): Add
11373 documentation for the builti-ins.
11375 2023-10-31 Vladimir N. Makarov <vmakarov@redhat.com>
11377 PR rtl-optimization/111971
11378 * lra-constraints.cc: (process_alt_operands): Don't check start
11379 hard regs for regs originated from register variables.
11381 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
11383 * config/riscv/autovec.md (<ieee_fmaxmin_op><mode>3): fmax/fmin
11385 (cond_<ieee_fmaxmin_op><mode>): Ditto.
11386 (cond_len_<ieee_fmaxmin_op><mode>): Ditto.
11387 (reduc_fmax_scal_<mode>): Ditto.
11388 (reduc_fmin_scal_<mode>): Ditto.
11389 * config/riscv/riscv-v.cc (needs_fp_rounding): Add fmin/fmax.
11390 * config/riscv/vector-iterators.md (fmin): New UNSPEC.
11391 (UNSPEC_VFMIN): Ditto.
11392 * config/riscv/vector.md (@pred_<ieee_fmaxmin_op><mode>): Add
11393 UNSPEC insn patterns.
11394 (@pred_<ieee_fmaxmin_op><mode>_scalar): Ditto.
11396 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
11400 * Makefile.in: Handle split insn-emit.cc.
11401 * configure: Regenerate.
11402 * configure.ac: Add --with-insnemit-partitions.
11403 * genemit.cc (output_peephole2_scratches): Print to file instead
11405 (print_code): Ditto.
11406 (gen_rtx_scratch): Ditto.
11408 (gen_emit_seq): Ditto.
11409 (emit_c_code): Ditto.
11411 (gen_expand): Ditto.
11412 (gen_split): Ditto.
11413 (output_add_clobbers): Ditto.
11414 (output_added_clobbers_hard_reg_p): Ditto.
11415 (print_overload_arguments): Ditto.
11416 (print_overload_test): Ditto.
11417 (handle_overloaded_code_for): Ditto.
11418 (handle_overloaded_gen): Ditto.
11419 (print_header): New function.
11420 (handle_arg): New function.
11421 (main): Split output into 10 files.
11422 * gensupport.cc (count_patterns): New function.
11423 * gensupport.h (count_patterns): Define.
11424 * read-md.cc (md_reader::print_md_ptr_loc): Add file argument.
11425 * read-md.h (class md_reader): Change definition.
11427 2023-10-31 Alexandre Oliva <oliva@adacore.com>
11429 PR tree-optimization/111943
11430 * gimple-harden-control-flow.cc: Adjust copyright year.
11431 (rt_bb_visited): Add vfalse and vtrue data members.
11432 Zero-initialize them in the ctor.
11433 (rt_bb_visited::insert_exit_check_on_edge): Upon encountering
11434 abnormal edges, insert initializers for vfalse and vtrue on
11435 entry, and insert the check sequence guarded by a conditional
11438 2023-10-31 Richard Biener <rguenther@suse.de>
11440 PR tree-optimization/112305
11441 * tree-scalar-evolution.h (expression_expensive): Adjust.
11442 * tree-scalar-evolution.cc (expression_expensive): Record
11443 when we see a COND_EXPR.
11444 (final_value_replacement_loop): When the replacement contains
11445 a COND_EXPR, rewrite it to defined overflow.
11446 * tree-ssa-loop-ivopts.cc (may_eliminate_iv): Adjust.
11448 2023-10-31 Xi Ruoyao <xry111@xry111.site>
11451 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
11452 if not defined yet.
11454 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
11456 * gimple-match.h (gimple_match_op::gimple_match_op):
11457 Add interfaces for more arguments.
11458 (gimple_match_op::set_op): Add interfaces for more arguments.
11459 * match.pd: Add support of combining cond_len_op + vec_cond
11461 2023-10-31 Haochen Jiang <haochen.jiang@intel.com>
11463 * config/i386/avx512cdintrin.h (target): Push evex512 for
11465 * config/i386/avx512vlintrin.h (target): Split avx512cdvl part
11467 * config/i386/i386-builtin.def (BDESC): Do not check evex512
11468 for builtins not needed.
11470 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
11472 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
11473 Change to define_expand.
11475 2023-10-31 liuhongt <hongtao.liu@intel.com>
11478 * config/i386/mmx.md (*mmx_pblendvb_v8qi_1): Change
11479 define_split to define_insn_and_split to handle
11480 immediate_operand for comparison.
11481 (*mmx_pblendvb_v8qi_2): Ditto.
11482 (*mmx_pblendvb_<mode>_1): Ditto.
11483 (*mmx_pblendvb_v4qi_2): Ditto.
11484 (<code><mode>3): Remove define_split after it.
11485 (<code>v8qi3): Ditto.
11486 (<code><mode>3): Ditto.
11487 (<ode>v2hi3): Ditto.
11489 2023-10-31 Andrew Pinski <pinskia@gmail.com>
11491 * match.pd (`a == 1 ? b : a OP b`): New pattern.
11492 (`a == -1 ? b : a & b`): New pattern.
11494 2023-10-31 Andrew Pinski <pinskia@gmail.com>
11496 * match.pd: (`a == 0 ? b : b + a`,
11497 `a == 0 ? b : b - a`): New patterns.
11499 2023-10-31 Neal Frager <neal.frager@amd.com>
11501 * config/microblaze/microblaze.cc: Fix mcpu version check.
11503 2023-10-30 Mayshao <mayshao-oc@zhaoxin.com>
11505 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize yongfeng.
11506 * common/config/i386/i386-common.cc: Add yongfeng.
11507 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
11508 Add ZHAOXIN_FAM7H_YONGFENG.
11509 * config.gcc: Add yongfeng.
11510 * config/i386/driver-i386.cc (host_detect_local_cpu):
11511 Let -march=native recognize yongfeng processors.
11512 * config/i386/i386-c.cc (ix86_target_macros_internal): Add yongfeng.
11513 * config/i386/i386-options.cc (m_YONGFENG): New definition.
11514 (m_ZHAOXIN): Ditto.
11515 * config/i386/i386.h (enum processor_type): Add PROCESSOR_YONGFENG.
11516 * config/i386/i386.md: Add yongfeng.
11517 * config/i386/lujiazui.md: Fix typo.
11518 * config/i386/x86-tune-costs.h (struct processor_costs):
11519 Add yongfeng costs.
11520 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add yongfeng.
11521 (ix86_adjust_cost): Ditto.
11522 * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Replace
11523 m_LUJIAZUI with m_ZHAOXIN.
11524 (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
11525 (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto.
11526 (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto.
11527 (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto.
11528 (X86_TUNE_MOVX): Ditto.
11529 (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
11530 (X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto.
11531 (X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto.
11532 (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto.
11533 (X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto.
11534 (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
11535 (X86_TUNE_USE_LEAVE): Ditto.
11536 (X86_TUNE_PUSH_MEMORY): Ditto.
11537 (X86_TUNE_LCP_STALL): Ditto.
11538 (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
11539 (X86_TUNE_OPT_AGU): Ditto.
11540 (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto.
11541 (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto.
11542 (X86_TUNE_USE_SAHF): Ditto.
11543 (X86_TUNE_USE_BT): Ditto.
11544 (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto.
11545 (X86_TUNE_ONE_IF_CONV_INSN): Ditto.
11546 (X86_TUNE_AVOID_MFENCE): Ditto.
11547 (X86_TUNE_EXPAND_ABS): Ditto.
11548 (X86_TUNE_USE_SIMODE_FIOP): Ditto.
11549 (X86_TUNE_USE_FFREEP): Ditto.
11550 (X86_TUNE_EXT_80387_CONSTANTS): Ditto.
11551 (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
11552 (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
11553 (X86_TUNE_SSE_TYPELESS_STORES): Ditto.
11554 (X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto.
11555 (X86_TUNE_USE_GATHER_2PARTS): Add m_YONGFENG.
11556 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
11557 (X86_TUNE_USE_GATHER_8PARTS): Ditto.
11558 (X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
11559 * doc/extend.texi: Add details about yongfeng.
11560 * doc/invoke.texi: Ditto.
11561 * config/i386/yongfeng.md: New file to describe yongfeng processor.
11563 2023-10-30 Martin Jambor <mjambor@suse.cz>
11566 * ipa-prop.h (struct ipa_argagg_value): Newf flag killed.
11567 * ipa-modref.cc (ipcp_argagg_and_kill_overlap_p): New function.
11568 (update_signature): Mark any any IPA-CP aggregate constants at
11569 positions known to be killed as killed. Move check that there is
11570 clone_info after this pruning.
11571 * ipa-cp.cc (ipa_argagg_value_list::dump): Dump the killed flag.
11572 (ipa_argagg_value_list::push_adjusted_values): Clear the new flag.
11573 (push_agg_values_from_plats): Likewise.
11574 (ipa_push_agg_values_from_jfunc): Likewise.
11575 (estimate_local_effects): Likewise.
11576 (push_agg_values_for_index_from_edge): Likewise.
11577 * ipa-prop.cc (write_ipcp_transformation_info): Stream the killed
11579 (read_ipcp_transformation_info): Likewise.
11580 (ipcp_get_aggregate_const): Update comment, assert that encountered
11581 record does not have killed flag set.
11582 (ipcp_transform_function): Prune all aggregate constants with killed
11585 2023-10-30 Martin Jambor <mjambor@suse.cz>
11588 * ipa-prop.h (ipcp_transformation): New member function template
11590 * ipa-sra.cc (zap_useless_ipcp_results): Use remove_argaggs_if to
11591 filter aggreagate constants.
11593 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
11595 PR middle-end/101955
11596 * config/arc/arc.md (*extvsi_1_0): New define_insn_and_split
11597 to convert sign extract of the least significant bit into an
11598 AND $1 then a NEG when !TARGET_BARREL_SHIFTER.
11600 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
11602 * config/arc/arc.cc (arc_rtx_costs): Improve cost estimates.
11603 Provide reasonable values for SHIFTS and ROTATES by constant
11604 bit counts depending upon TARGET_BARREL_SHIFTER.
11605 (arc_insn_cost): Use insn attributes if the instruction is
11606 recognized. Avoid calling get_attr_length for type "multi",
11607 i.e. define_insn_and_split patterns without explicit type.
11608 Fall-back to set_rtx_cost for single_set and pattern_cost
11610 * config/arc/arc.h (COSTS_N_BYTES): Define helper macro.
11611 (BRANCH_COST): Improve/correct definition.
11612 (LOGICAL_OP_NON_SHORT_CIRCUIT): Preserve previous behavior.
11614 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
11616 * config/arc/arc.cc (arc_split_ashl): Use lsl16 on TARGET_SWAP.
11617 (arc_split_ashr): Use swap and sign-extend on TARGET_SWAP.
11618 (arc_split_lshr): Use lsr16 on TARGET_SWAP.
11619 (arc_split_rotl): Use swap on TARGET_SWAP.
11620 (arc_split_rotr): Likewise.
11621 * config/arc/arc.md (ANY_ROTATE): New code iterator.
11622 (<ANY_ROTATE>si2_cnt16): New define_insn for alternate form of
11623 swap instruction on TARGET_SWAP.
11624 (ashlsi2_cnt16): Rename from *ashlsi16_cnt16 and move earlier.
11625 (lshrsi2_cnt16): New define_insn for LSR16 instruction.
11626 (*ashlsi2_cnt16): See above.
11628 2023-10-30 Richard Ball <richard.ball@arm.com>
11630 * config/arm/aout.h: Change to use the Lrtx label.
11631 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Remove arm targets
11632 from (!target_pure_code) condition.
11633 (ADDR_VEC_ALIGN): Add align for tables in rodata section.
11634 * config/arm/arm.cc (arm_output_casesi): Alter the function to include
11635 .Lrtx label and remove adr instructions.
11636 * config/arm/arm.md
11637 (arm_casesi_internal): Use force_reg to generate ldr instructions that
11638 would otherwise be out of range, and change rtl to accommodate force reg.
11639 Additionally remove unnecessary register temp.
11640 (casesi): Remove pure code check for Arm.
11641 * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Remove arm
11642 targets from JUMP_TABLES_IN_TEXT_SECTION definition.
11644 2023-10-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
11647 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Change bitwise
11648 xor to an equality and fix comment indentation.
11650 2023-10-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11652 * config/riscv/riscv-protos.h (sew64_scalar_helper): Fix bug.
11653 * config/riscv/riscv-v.cc (sew64_scalar_helper): Ditto.
11654 * config/riscv/vector.md: Ditto.
11656 2023-10-30 liuhongt <hongtao.liu@intel.com>
11659 * config/i386/i386-expand.cc (ix86_expand_branch): Handle
11660 512-bit vector with vpcmpeq + kortest.
11661 * config/i386/i386.md (cbranchxi4): New expander.
11662 * config/i386/sse.md: (cbranch<mode>4): Extend to V16SImode
11665 2023-10-30 Haochen Gui <guihaoc@gcc.gnu.org>
11668 * expr.cc (qi_vector_mode_supported_p): Rename to...
11669 (by_pieces_mode_supported_p): ...this, and extends it to do
11670 the checking for both scalar and vector mode.
11671 (widest_fixed_size_mode_for_size): Call
11672 by_pieces_mode_supported_p to examine the mode.
11673 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Likewise.
11675 2023-10-29 Martin Uecker <uecker@tugraz.at>
11677 PR tree-optimization/109334
11678 * tree-object-size.cc (parm_object_size): Allow size
11679 computation for implicit access attributes.
11681 2023-10-29 Max Filippov <jcmvbkbc@gmail.com>
11683 * config/xtensa/xtensa.h (TARGET_SALT): Change HW version from
11684 260000 (which corresponds to RF-2014.0) to 270000 (which
11685 corresponds to RG-2015.0, the release where salt/saltu opcodes
11688 2023-10-29 Pan Li <pan2.li@intel.com>
11690 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Use
11691 reference type to prevent copying.
11693 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
11695 PR rtl-optimization/112107
11696 * ira-costs.cc: (calculate_equiv_gains): Use NONDEBUG_INSN_P
11699 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
11702 * config/gcn/gcn.cc (gcn_expand_epilogue): Fix kernel epilogue register
11705 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
11707 * config/gcn/gcn-valu.md
11708 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): Mention "operands" in
11709 condition to silence the warnings.
11710 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): Likewise.
11711 * config/gcn/gcn.md (*movti_insn): Likewise.
11713 2023-10-27 Richard Sandiford <richard.sandiford@arm.com>
11715 * recog.cc (insn_propagation::apply_to_pattern_1): Handle shared
11718 2023-10-27 Yangyu Chen <chenyangyu@isrc.iscas.ac.cn>
11720 * config/riscv/riscv.cc (rocket_tune_info): Fix int_div cost.
11721 (sifive_7_tune_info, thead_c906_tune_info): Likewise.
11723 2023-10-27 Robin Dapp <rdapp@ventanamicro.com>
11725 * config/riscv/autovec.md (rawmemchr<ANYI:mode>): New expander.
11726 * config/riscv/riscv-protos.h (gen_no_side_effects_vsetvl_rtx):
11728 (expand_rawmemchr): Define.
11729 * config/riscv/riscv-v.cc (force_vector_length_operand): Remove
11731 (expand_block_move): Move from here...
11732 * config/riscv/riscv-string.cc (expand_block_move): ...to here.
11733 (expand_rawmemchr): Add vectorized expander.
11734 * internal-fn.cc (expand_RAWMEMCHR): Fix typo.
11736 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
11738 * ira-costs.cc: (get_equiv_regno, calculate_equiv_gains):
11739 Process reg equivalence invariants.
11741 2023-10-27 Uros Bizjak <ubizjak@gmail.com>
11743 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
11744 i386: Fiy typo in "partial_memory_read_stall" tune option.
11746 2023-10-27 Victor Do Nascimento <victor.donascimento@arm.com>
11748 * config/aarch64/aarch64.cc (aarch64_print_operand): Add
11749 support for CONST_STRING.
11751 2023-10-27 Roger Sayle <roger@nextmovesoftware.com>
11754 * config/i386/i386.md (<u>mul<mode><dwi>3): Make operands 1 and
11755 2 take "regiser_operand" and "nonimmediate_operand" respectively.
11756 (<u>mulqihi3): Likewise.
11757 (*bmi2_umul<mode><dwi>3_1): Operand 2 needs to be register_operand
11758 matching the %d constraint. Use umul_highpart RTX to represent
11759 the highpart multiplication.
11760 (*umul<mode><dwi>3_1): Operand 2 should use regiser_operand
11761 predicate, and "a" rather than "0" as operands 0 and 2 have
11763 (define_split): For mul to mulx conversion, use the new
11764 umul_highpart RTX representation.
11765 (*mul<mode><dwi>3_1): Operand 1 should be register_operand
11766 and the constraint %a as operands 0 and 1 have different modes.
11767 (*<u>mulqihi3_1): Operand 1 should be register_operand matching
11769 (define_peephole2): Providing widening multiplication variants
11770 of the peephole2s that tweak highpart multiplication register
11773 2023-10-27 Lewis Hyatt <lhyatt@gmail.com>
11775 PR preprocessor/87299
11776 * toplev.cc (no_backend): New static global.
11777 (finalize): Remove argument no_backend, which is now a
11779 (process_options): Likewise.
11780 (do_compile): Likewise.
11781 (target_reinit): Don't do anything in preprocess-only mode.
11782 (toplev::main): Adapt to no_backend change.
11783 (toplev::finalize): Likewise.
11785 2023-10-27 Andrew Pinski <apinski@marvell.com>
11787 PR tree-optimization/101590
11788 PR tree-optimization/94884
11789 * match.pd (`(X BIT_OP Y) CMP X`): New pattern.
11791 2023-10-27 liuhongt <hongtao.liu@intel.com>
11794 * config/i386/i386-expand.cc (ix86_expand_sse_movcc): Handle
11795 V2HF/V2BF/V4HF/V4BFmode.
11796 * config/i386/i386.cc (ix86_get_mask_mode): Return QImode when
11797 data_mode is V4HF/V2HFmode.
11798 * config/i386/mmx.md (vec_cmpv4hfqi): New expander.
11799 (vcond_mask_<mode>v4hi): Ditto.
11800 (vcond_mask_<mode>qi): Ditto.
11801 (vec_cmpv2hfqi): Ditto.
11802 (vcond_mask_<mode>v2hi): Ditto.
11803 (mmx_plendvb_<mode>): Add 2 combine splitters after the
11805 (mmx_pblendvb_v8qi): Ditto.
11806 (<code>v2hi3): Add a combine splitter after the pattern.
11807 (<code><mode>3): Ditto.
11808 (<code>v8qi3): Ditto.
11809 (<code><mode>3): Ditto.
11810 * config/i386/sse.md (vcond<mode><mode>): Merge this with ..
11811 (vcond<sseintvecmodelower><mode>): .. this into ..
11812 (vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): .. this,
11813 and extend to V8BF/V16BF/V32BFmode.
11815 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11817 * config/riscv/riscv-opts.h (TARGET_MAX_LMUL): New macro.
11818 * config/riscv/riscv-v.cc (preferred_simd_mode): Adapt macro.
11819 (autovectorize_vector_modes): Ditto.
11820 (can_find_related_mode_p): Ditto.
11822 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11826 * config.gcc: Add AVL propagation pass.
11827 * config/riscv/riscv-passes.def (INSERT_PASS_AFTER): Ditto.
11828 * config/riscv/riscv-protos.h (make_pass_avlprop): Ditto.
11829 * config/riscv/t-riscv: Ditto.
11830 * config/riscv/riscv-avlprop.cc: New file.
11832 2023-10-26 David Malcolm <dmalcolm@redhat.com>
11834 * doc/extend.texi (Common Function Attributes): Add
11835 null_terminated_string_arg.
11837 2023-10-26 Andrew Pinski <pinskia@gmail.com>
11839 PR tree-optimization/111957
11840 * match.pd (`a != C1 ? abs(a) : C2`): New pattern.
11842 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
11844 * range-op-float.cc (range_operator::fold_range): Delete unused
11847 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
11849 * range-op-float.cc (range_operator::fold_range): Remove
11851 (range_operator::rv_fold): Remove unneeded arguments.
11852 (operator_plus::rv_fold): Same.
11853 (operator_minus::rv_fold): Same.
11854 (operator_mult::rv_fold): Same.
11855 (operator_div::rv_fold): Same.
11856 * range-op-mixed.h: Remove lb, ub, and maybe_nan arguments from
11858 * range-op.h: Same.
11860 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
11862 * range-op-float.cc (range_operator::fold_range): Pass frange
11863 argument to rv_fold.
11864 (range_operator::rv_fold): Add frange argument.
11865 (operator_plus::rv_fold): Same.
11866 (operator_minus::rv_fold): Same.
11867 (operator_mult::rv_fold): Same.
11868 (operator_div::rv_fold): Same.
11869 * range-op-mixed.h: Add frange argument to rv_fold methods.
11870 * range-op.h: Same.
11872 2023-10-26 Richard Ball <richard.ball@arm.com>
11874 * config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Add table output
11875 for different machine modes for arm.
11876 * config/arm/arm-protos.h (arm_output_casesi): New prototype.
11877 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Make arm use
11878 ASM_OUTPUT_ADDR_DIFF_ELT.
11879 (CASE_VECTOR_SHORTEN_MODE): Change table size calculation for
11881 (LABEL_ALIGN_AFTER_BARRIER): Change to accommodate .p2align 2
11883 * config/arm/arm.cc (arm_output_casesi): New function.
11884 * config/arm/arm.md (arm_casesi_internal): Change casesi expand
11886 for arm to use new function arm_output_casesi.
11888 2023-10-26 Iain Sandoe <iain@sandoe.co.uk>
11891 (darwin_label_is_anonymous_local_objc_name): Make metadata names
11892 linker-visibile for GNU objective C.
11894 2023-10-26 Vladimir N. Makarov <vmakarov@redhat.com>
11896 * dwarf2out.cc (reg_loc_descriptor): Use lra_eliminate_regs when
11898 * ira-costs.cc: Include regset.h.
11899 (equiv_can_be_consumed_p, get_equiv_regno, calculate_equiv_gains):
11901 (find_costs_and_classes): Call calculate_equiv_gains and redefine
11902 mem_cost of pseudos with equivs when LRA is used.
11903 * var-tracking.cc: Include ira.h and lra.h.
11904 (vt_initialize): Use lra_eliminate_regs when LRA is used.
11906 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11908 * doc/md.texi: Adapt COND_LEN pseudo code.
11910 2023-10-26 Roger Sayle <roger@nextmovesoftware.com>
11911 Richard Biener <rguenther@suse.de>
11913 PR rtl-optimization/91865
11914 * combine.cc (make_compound_operation): Avoid creating a
11915 ZERO_EXTEND of a ZERO_EXTEND.
11917 2023-10-26 Jiahao Xu <xujiahao@loongson.cn>
11919 * config/loongarch/lasx.md (vcond_mask_<ILASX:mode><ILASX:mode>): Change to
11920 (vcond_mask_<mode><mode256_i>): this.
11921 * config/loongarch/lsx.md (vcond_mask_<ILSX:mode><ILSX:mode>): Change to
11922 (vcond_mask_<mode><mode_i>): this.
11924 2023-10-26 Thomas Schwinge <thomas@codesourcery.com>
11926 * ipa-icf.cc (sem_item::target_supports_symbol_aliases_p):
11927 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);' before
11929 * ipa-visibility.cc (function_and_variable_visibility): Change
11930 '#ifdef ASM_OUTPUT_DEF' to 'if (TARGET_SUPPORTS_ALIASES)'.
11931 * varasm.cc (output_constant_pool_contents)
11932 [#ifdef ASM_OUTPUT_DEF]:
11933 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
11934 (do_assemble_alias) [#ifdef ASM_OUTPUT_DEF]:
11935 'if (!TARGET_SUPPORTS_ALIASES)',
11936 'gcc_checking_assert (seen_error ());'.
11937 (assemble_alias): Change '#if !defined (ASM_OUTPUT_DEF)' to
11938 'if (!TARGET_SUPPORTS_ALIASES)'.
11939 (default_asm_output_anchor):
11940 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
11942 2023-10-26 Alexandre Oliva <oliva@adacore.com>
11944 PR tree-optimization/111520
11945 * gimple-harden-conditionals.cc
11946 (pass_harden_compares::execute): Set EH edge probability and
11947 EH block execution count.
11949 2023-10-26 Alexandre Oliva <oliva@adacore.com>
11951 * tree-eh.h (make_eh_edges): Rename to...
11952 (make_eh_edge): ... this.
11953 * tree-eh.cc: Likewise. Adjust all callers...
11954 * gimple-harden-conditionals.cc: ... here, ...
11955 * gimple-harden-control-flow.cc: ... here, ...
11956 * tree-cfg.cc: ... here, ...
11957 * tree-inline.cc: ... and here.
11959 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
11961 * config/darwin.cc (darwin_override_options): Handle fPIE.
11963 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
11965 * config.gcc: Use -E to to sed to indicate that we are using
11968 2023-10-25 Jason Merrill <jason@redhat.com>
11970 * tree-core.h (struct tree_base): Update address_space comment.
11972 2023-10-25 Wilco Dijkstra <wilco.dijkstra@arm.com>
11974 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
11975 Add support for immediates using MOV/EOR bitmask.
11977 2023-10-25 Uros Bizjak <ubizjak@gmail.com>
11980 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
11982 * config/i386/i386.h (TARGET_PARTIAL_MEMORY_READ_STALL): New macro.
11983 * config/i386/i386.md: New peephole pattern to narrow test
11984 instructions with immediate operands that test memory locations
11987 2023-10-25 Andrew MacLeod <amacleod@redhat.com>
11989 * value-range.cc (irange::union_append): New.
11990 (irange::union_): Call union_append when appropriate.
11991 * value-range.h (irange::union_append): New prototype.
11993 2023-10-25 Chenghui Pan <panchenghui@loongson.cn>
11995 * config/loongarch/lasxintrin.h (__lasx_xvftintrnel_l_s): Fix comments.
11996 (__lasx_xvfrintrne_s): Ditto.
11997 (__lasx_xvfrintrne_d): Ditto.
11998 (__lasx_xvfrintrz_s): Ditto.
11999 (__lasx_xvfrintrz_d): Ditto.
12000 (__lasx_xvfrintrp_s): Ditto.
12001 (__lasx_xvfrintrp_d): Ditto.
12002 (__lasx_xvfrintrm_s): Ditto.
12003 (__lasx_xvfrintrm_d): Ditto.
12004 * config/loongarch/lsxintrin.h (__lsx_vftintrneh_l_s): Ditto.
12005 (__lsx_vfrintrne_s): Ditto.
12006 (__lsx_vfrintrne_d): Ditto.
12007 (__lsx_vfrintrz_s): Ditto.
12008 (__lsx_vfrintrz_d): Ditto.
12009 (__lsx_vfrintrp_s): Ditto.
12010 (__lsx_vfrintrp_d): Ditto.
12011 (__lsx_vfrintrm_s): Ditto.
12012 (__lsx_vfrintrm_d): Ditto.
12014 2023-10-25 chenxiaolong <chenxiaolong@loongson.cn>
12016 * config/loongarch/loongarch.md (get_thread_pointer<mode>):Adds the
12017 instruction template corresponding to the __builtin_thread_pointer
12019 * doc/extend.texi:Add the __builtin_thread_pointer function support
12020 description to the documentation.
12022 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12024 * Makefile.in (OBJS): Add rtl-ssa/movement.o.
12025 * rtl-ssa/access-utils.h (accesses_include_nonfixed_hard_registers)
12026 (single_set_info): New functions.
12027 (remove_uses_of_def, accesses_reference_same_resource): Declare.
12028 (insn_clobbers_resources): Likewise.
12029 * rtl-ssa/accesses.cc (rtl_ssa::remove_uses_of_def): New function.
12030 (rtl_ssa::accesses_reference_same_resource): Likewise.
12031 (rtl_ssa::insn_clobbers_resources): Likewise.
12032 * rtl-ssa/movement.h (can_move_insn_p): Declare.
12033 * rtl-ssa/movement.cc: New file.
12035 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12037 * rtl-ssa/functions.h (function_info::remains_available_at_insn):
12038 New member function.
12039 * rtl-ssa/accesses.cc (function_info::remains_available_at_insn):
12041 (function_info::make_use_available): Avoid false negatives for
12042 queries within an EBB.
12044 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12046 * rtl-ssa/changes.cc: Include sreal.h.
12047 (rtl_ssa::changes_are_worthwhile): When optimizing for speed,
12048 scale the cost of each instruction by its execution frequency.
12050 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12052 * rtl-ssa/access-utils.h (next_call_clobbers): New function.
12053 (is_single_dominating_def, remains_available_on_exit): Replace with...
12054 * rtl-ssa/functions.h (function_info::is_single_dominating_def)
12055 (function_info::remains_available_on_exit): ...these new member
12057 (function_info::m_clobbered_by_calls): New member variable.
12058 * rtl-ssa/functions.cc (function_info::function_info): Explicitly
12059 initialize m_clobbered_by_calls.
12060 * rtl-ssa/insns.cc (function_info::record_call_clobbers): Update
12061 m_clobbered_by_calls for each call-clobber note.
12062 * rtl-ssa/member-fns.inl (function_info::is_single_dominating_def):
12063 New function. Check for call clobbers.
12064 * rtl-ssa/accesses.cc (function_info::remains_available_on_exit):
12067 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12069 * rtl-ssa/internals.h (build_info::exit_block_dominator): New
12071 * rtl-ssa/blocks.cc (build_info::build_info): Initialize it.
12072 (bb_walker::bb_walker): Use it, moving the computation of the
12074 (function_info::process_all_blocks): ...here.
12075 (function_info::place_phis): Add dominance frontiers for the
12078 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12080 * rtl-ssa/functions.h (function_info::process_uses_of_deleted_def):
12081 New member function.
12082 * rtl-ssa/changes.cc (function_info::process_uses_of_deleted_def):
12084 (function_info::change_insns): Use it.
12086 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12088 * rtl-ssa/changes.cc (function_info::finalize_new_accesses):
12089 If a change describes a set of memory, ensure that that set
12090 is kept, regardless of the insn pattern.
12092 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12094 * rtl-ssa/changes.cc (function_info::apply_changes_to_insn): Remove
12095 call to add_reg_unused_notes and instead...
12096 (function_info::change_insns): ...use a separate loop here.
12098 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12100 * rtl-ssa/blocks.cc (function_info::add_artificial_accesses): Force
12101 global registers to be live on exit. Handle any block with zero
12102 successors like an exit block.
12104 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
12106 * omp-oacc-kernels-decompose.cc (omp_oacc_kernels_decompose_1):
12107 Handle 'OMP_CLAUSE_SELF' like 'OMP_CLAUSE_IF'.
12108 * omp-expand.cc (expand_omp_target): Handle 'OMP_CLAUSE_SELF' for
12109 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'.
12111 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
12113 * tree-core.h (omp_clause_code): Move 'OMP_CLAUSE_SELF' after
12115 * tree-pretty-print.cc (dump_omp_clause): Adjust.
12116 * tree.cc (omp_clause_num_ops, omp_clause_code_name): Likewise.
12117 * tree.h: Likewise.
12119 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12121 * config/riscv/riscv-protos.h (has_vl_op): Export from riscv-vsetvl to riscv-v
12122 (tail_agnostic_p): Ditto.
12123 (validate_change_or_fail): Ditto.
12124 (nonvlmax_avl_type_p): Ditto.
12125 (vlmax_avl_p): Ditto.
12127 (enum vlmul_type): Ditto.
12128 (count_regno_occurrences): Ditto.
12129 * config/riscv/riscv-v.cc (has_vl_op): Ditto.
12130 (get_default_ta): Ditto.
12131 (tail_agnostic_p): Ditto.
12132 (validate_change_or_fail): Ditto.
12133 (nonvlmax_avl_type_p): Ditto.
12134 (vlmax_avl_p): Ditto.
12136 (enum vlmul_type): Ditto.
12137 (get_vlmul): Ditto.
12138 (count_regno_occurrences): Ditto.
12139 * config/riscv/riscv-vsetvl.cc (vlmax_avl_p): Ditto.
12140 (has_vl_op): Ditto.
12142 (get_vlmul): Ditto.
12143 (get_default_ta): Ditto.
12144 (tail_agnostic_p): Ditto.
12145 (count_regno_occurrences): Ditto.
12146 (validate_change_or_fail): Ditto.
12148 2023-10-25 Chung-Lin Tang <cltang@codesourcery.com>
12150 * gimplify.cc (gimplify_scan_omp_clauses): Add OMP_CLAUSE_SELF case.
12151 (gimplify_adjust_omp_clauses): Likewise.
12152 * omp-expand.cc (expand_omp_target): Add OMP_CLAUSE_SELF expansion code,
12153 * omp-low.cc (scan_sharing_clauses): Add OMP_CLAUSE_SELF case.
12154 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_SELF enum.
12155 * tree-nested.cc (convert_nonlocal_omp_clauses): Add OMP_CLAUSE_SELF
12157 (convert_local_omp_clauses): Likewise.
12158 * tree-pretty-print.cc (dump_omp_clause): Add OMP_CLAUSE_SELF case.
12159 * tree.cc (omp_clause_num_ops): Add OMP_CLAUSE_SELF entry.
12160 (omp_clause_code_name): Likewise.
12161 * tree.h (OMP_CLAUSE_SELF_EXPR): New macro.
12163 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12165 * config/riscv/riscv-protos.h (vlmax_avl_type_p): New function.
12166 * config/riscv/riscv-v.cc (vlmax_avl_type_p): Ditto.
12167 * config/riscv/riscv-vsetvl.cc (get_avl): Adapt function.
12168 * config/riscv/vector.md: Change avl_type into avl_type_idx.
12170 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12172 * recog.cc (constrain_operands): Remove UNARY_P handling.
12173 * reload.cc (find_reloads): Likewise.
12175 2023-10-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12177 * gcov-io.h: Fix record length encoding in comment.
12179 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
12181 * config/i386/i386-features.cc (compute_convert_gain): Provide
12182 more accurate values (sizes) for inter-unit moves with -Os.
12184 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
12185 Claudiu Zissulescu <claziss@gmail.com>
12187 * config/arc/arc-protos.h (output_shift): Rename to...
12188 (output_shift_loop): Tweak API to take an explicit rtx_code.
12189 (arc_split_ashl): Prototype new function here.
12190 (arc_split_ashr): Likewise.
12191 (arc_split_lshr): Likewise.
12192 (arc_split_rotl): Likewise.
12193 (arc_split_rotr): Likewise.
12194 * config/arc/arc.cc (output_shift): Delete local prototype. Rename.
12195 (output_shift_loop): New function replacing output_shift to output
12196 a zero overheap loop for SImode shifts and rotates on ARC targets
12197 without barrel shifter (i.e. no hardware support for these insns).
12198 (arc_split_ashl): New helper function to split *ashlsi3_nobs.
12199 (arc_split_ashr): New helper function to split *ashrsi3_nobs.
12200 (arc_split_lshr): New helper function to split *lshrsi3_nobs.
12201 (arc_split_rotl): New helper function to split *rotlsi3_nobs.
12202 (arc_split_rotr): New helper function to split *rotrsi3_nobs.
12203 (arc_print_operand): Correct whitespace.
12204 (arc_rtx_costs): Likewise.
12205 (hwloop_optimize): Likewise.
12206 * config/arc/arc.md (ANY_SHIFT_ROTATE): New define_code_iterator.
12207 (define_code_attr insn): New code attribute to map to pattern name.
12208 (<ANY_SHIFT_ROTATE>si3): New expander unifying previous ashlsi3,
12209 ashrsi3 and lshrsi3 define_expands. Adds rotlsi3 and rotrsi3.
12210 (*<ANY_SHIFT_ROTATE>si3_nobs): New define_insn_and_split that
12211 unifies the previous *ashlsi3_nobs, *ashrsi3_nobs and *lshrsi3_nobs.
12212 We now call arc_split_<insn> in arc.cc to implement each split.
12213 (shift_si3): Delete define_insn, all shifts/rotates are now split.
12214 (shift_si3_loop): Rename to...
12215 (<insn>si3_loop): define_insn to handle loop implementations of
12216 SImode shifts and rotates, calling ouput_shift_loop for template.
12217 (rotrsi3): Rename to...
12218 (*rotrsi3_insn): define_insn for TARGET_BARREL_SHIFTER's ror.
12219 (*rotlsi3): New define_insn_and_split to transform left rotates
12220 into right rotates before reload.
12221 (rotlsi3_cnt1): New define_insn_and_split to implement a left
12222 rotate by one bit using an add.f followed by an adc.
12223 * config/arc/predicates.md (shiftr4_operator): Delete.
12225 2023-10-24 Claudiu Zissulescu <claziss@gmail.com>
12227 * config/arc/arc.md (mulsi3_700): Update pattern.
12228 (mulsi3_v2): Likewise.
12229 * config/arc/predicates.md (mpy_dest_reg_operand): Remove it.
12231 2023-10-24 Andrew Pinski <pinskia@gmail.com>
12233 PR tree-optimization/104376
12234 PR tree-optimization/101541
12235 * tree-ssa-phiopt.cc (factor_out_conditional_operation):
12236 Allow nop conversions even if it is defined by a statement
12237 inside the conditional.
12239 2023-10-24 Andrew Pinski <pinskia@gmail.com>
12241 PR tree-optimization/111913
12242 * match.pd (`popcount(X&Y) + popcount(X|Y)`): Add the resulting
12245 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12247 * rtl-ssa/blocks.cc (function_info::create_degenerate_phi): Check
12248 whether the requested phi already exists.
12250 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12252 * rtl-ssa.h: Include cfgbuild.h.
12253 * rtl-ssa/movement.h (can_insert_after): Replace is_jump with the
12254 more comprehensive control_flow_insn_p.
12256 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12258 * rtl-ssa/changes.cc (function_info::perform_pending_updates): Check
12259 whether an insn has been replaced by a note.
12261 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12263 * rtl-ssa/member-fns.inl (first_any_insn_use): Handle null
12266 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12268 * config/i386/i386-expand.cc (ix86_split_mmx_punpck): Allow the
12269 destination to be wider than the sources. Take the mode from the
12271 (ix86_expand_sse_extend): Pass the destination directly to
12272 ix86_split_mmx_punpck, rather than using a fresh register that
12275 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12277 * config/i386/predicates.md (aeswidekl_operation): Protect
12278 REGNO check with REG_P.
12280 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12282 * config/aarch64/aarch64.cc (aarch64_insn_cost): New function.
12283 (TARGET_INSN_COST): Define.
12285 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12287 * config/aarch64/atomics.md (aarch64_atomic_exchange<mode>): Require
12290 2023-10-24 xuli <xuli1@eswincomputing.com>
12293 * config/riscv/riscv-vector-builtins-bases.cc: fix bug.
12295 2023-10-24 Mark Harmstone <mark@harmstone.com>
12297 * opts.cc (debug_type_names): Remove stabs and xcoff.
12298 (df_set_names): Adjust.
12300 2023-10-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12303 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check.
12305 2023-10-23 Lewis Hyatt <lhyatt@gmail.com>
12307 PR preprocessor/36887
12308 * toplev.h (ident_hash_extra): Declare...
12309 * stringpool.cc (ident_hash_extra): ...this new global variable.
12310 (init_stringpool): Handle ident_hash_extra as well as ident_hash.
12311 (ggc_mark_stringpool): Likewise.
12312 (ggc_purge_stringpool): Likewise.
12313 (struct string_pool_data_extra): New struct.
12314 (spd2): New GC root variable.
12315 (gt_pch_save_stringpool): Use spd2 to handle ident_hash_extra,
12316 analogous to how spd is used to handle ident_hash.
12317 (gt_pch_restore_stringpool): Likewise.
12319 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
12321 PR tree-optimization/111794
12322 * tree-vect-stmts.cc (vectorizable_assignment): Add
12323 same-precision exception for dest and source.
12325 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
12327 * config/riscv/autovec.md (popcount<mode>2): New expander.
12328 * config/riscv/riscv-protos.h (expand_popcount): Define.
12329 * config/riscv/riscv-v.cc (expand_popcount): Vectorize popcount
12330 with the WWG algorithm.
12332 2023-10-23 Richard Biener <rguenther@suse.de>
12334 PR tree-optimization/111916
12335 * tree-sra.cc (sra_modify_assign): Do not lower all
12336 BIT_FIELD_REF reads that are sra_handled_bf_read_p.
12338 2023-10-23 Richard Biener <rguenther@suse.de>
12340 PR tree-optimization/111915
12341 * tree-vect-slp.cc (vect_build_slp_tree_1): Check all
12342 accesses are either grouped or not.
12344 2023-10-23 Richard Biener <rguenther@suse.de>
12347 * tree-inline.cc (setup_one_parameter): Move code emitting
12348 a dummy load when not optimizing ...
12349 (initialize_inlined_parameters): ... here to after when
12350 we remapped the parameter type.
12352 2023-10-23 Oleg Endo <olegendo@gcc.gnu.org>
12355 * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
12356 Skip over nop move insns.
12358 2023-10-23 Tamar Christina <tamar.christina@arm.com>
12360 PR tree-optimization/111860
12361 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
12362 Drop .MEM nodes only.
12364 2023-10-23 Andrew Pinski <apinski@marvell.com>
12366 * match.pd (`(A - B) CMP 0 ? (A - B) : (B - A)`):
12369 2023-10-23 Andrew Pinski <pinskia@gmail.com>
12371 * convert.cc (convert_to_pointer_1): Return error_mark_node
12373 (convert_to_real_1): Likewise.
12374 (convert_to_integer_1): Likewise.
12375 (convert_to_complex_1): Likewise.
12377 2023-10-23 Andrew Pinski <pinskia@gmail.com>
12380 * convert.cc (convert_to_complex_1): Return
12381 error_mark_node if either convert was an error
12382 when converting from a scalar.
12384 2023-10-23 Richard Biener <rguenther@suse.de>
12386 PR tree-optimization/111917
12387 * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
12388 new conditional after last stmt.
12390 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12393 * config/riscv/riscv-vsetvl.cc: Fix bug.
12395 2023-10-23 Pan Li <pan2.li@intel.com>
12397 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): Add insn type
12399 (expand_vec_trunc): Take MA instead of MU for cvt_x_f_rtz.
12401 2023-10-23 Xi Ruoyao <xry111@xry111.site>
12403 * doc/invoke.texi (-mexplicit-relocs=style): Document.
12404 (-mexplicit-relocs): Document as an alias of
12405 -mexplicit-relocs=always.
12406 (-mno-explicit-relocs): Document as an alias of
12407 -mexplicit-relocs=none.
12408 (-mcmodel=extreme): Mention -mexplicit-relocs=always instead of
12411 2023-10-23 Xi Ruoyao <xry111@xry111.site>
12413 * config/loongarch/predicates.md (symbolic_pcrel_operand): New
12415 * config/loongarch/loongarch.md (define_peephole2): Optimize
12416 la.local + ld/st to pcalau12i + ld/st if the address is only used
12417 once if -mexplicit-relocs=auto and -mcmodel=normal or medium.
12419 2023-10-23 Xi Ruoyao <xry111@xry111.site>
12421 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
12422 Return true for TLS symbol types if -mexplicit-relocs=auto.
12423 (loongarch_call_tls_get_addr): Replace TARGET_EXPLICIT_RELOCS
12424 with la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE.
12425 (loongarch_legitimize_tls_address): Likewise.
12426 * config/loongarch/loongarch.md (@tls_low<mode>): Remove
12427 TARGET_EXPLICIT_RELOCS from insn condition.
12429 2023-10-23 Xi Ruoyao <xry111@xry111.site>
12431 * config/loongarch/loongarch-protos.h
12432 (loongarch_explicit_relocs_p): Declare new function.
12433 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
12435 (loongarch_symbol_insns): Call loongarch_explicit_relocs_p for
12436 SYMBOL_GOT_DISP, instead of using TARGET_EXPLICIT_RELOCS.
12437 (loongarch_split_symbol): Call loongarch_explicit_relocs_p for
12438 deciding if return early, instead of using
12439 TARGET_EXPLICIT_RELOCS.
12440 (loongarch_output_move): CAll loongarch_explicit_relocs_p
12441 instead of using TARGET_EXPLICIT_RELOCS.
12442 * config/loongarch/loongarch.md (*low<mode>): Remove
12443 TARGET_EXPLICIT_RELOCS from insn condition.
12444 (@ld_from_got<mode>): Likewise.
12445 * config/loongarch/predicates.md (move_operand): Call
12446 loongarch_explicit_relocs_p instead of using
12447 TARGET_EXPLICIT_RELOCS.
12449 2023-10-23 Xi Ruoyao <xry111@xry111.site>
12451 * config/loongarch/genopts/loongarch-strings: Add strings for
12452 -mexplicit-relocs={auto,none,always}.
12453 * config/loongarch/genopts/loongarch.opt.in: Add options for
12454 -mexplicit-relocs={auto,none,always}.
12455 * config/loongarch/loongarch-str.h: Regenerate.
12456 * config/loongarch/loongarch.opt: Regenerate.
12457 * config/loongarch/loongarch-def.h
12458 (EXPLICIT_RELOCS_AUTO): Define.
12459 (EXPLICIT_RELOCS_NONE): Define.
12460 (EXPLICIT_RELOCS_ALWAYS): Define.
12461 (N_EXPLICIT_RELOCS_TYPES): Define.
12462 * config/loongarch/loongarch.cc
12463 (loongarch_option_override_internal): Error out if the old-style
12464 -m[no-]explicit-relocs option is used with
12465 -mexplicit-relocs={auto,none,always} together. Map
12466 -mno-explicit-relocs to -mexplicit-relocs=none and
12467 -mexplicit-relocs to -mexplicit-relocs=always for backward
12468 compatibility. Set a proper default for -mexplicit-relocs=
12469 based on configure-time probed linker capability. Update a
12470 diagnostic message to mention -mexplicit-relocs=always instead
12471 of the old-style -mexplicit-relocs.
12472 (loongarch_handle_model_attribute): Update a diagnostic message
12473 to mention -mexplicit-relocs=always instead of the old-style
12475 * config/loongarch/loongarch.h (TARGET_EXPLICIT_RELOCS): Define.
12477 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12479 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Fix typo.
12480 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
12482 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12484 * config/riscv/vector.md: Fix avl_type attribute of tuple mov<mode>.
12486 2023-10-23 Kewen Lin <linkw@linux.ibm.com>
12488 PR tree-optimization/111784
12489 * tree-vect-stmts.cc (vectorizable_store): Adjust costing way for
12490 adjacent vector stores, by costing them with the total number
12491 rather than costing them one by one.
12492 (vectorizable_load): Adjust costing way for adjacent vector
12493 loads, by costing them with the total number rather than costing
12496 2023-10-23 Haochen Jiang <haochen.jiang@intel.com>
12499 * config/i386/i386.cc (ix86_standard_x87sse_constant_load_p):
12500 Do not split to xmm16+ when !TARGET_AVX512VL.
12502 2023-10-23 Pan Li <pan2.li@intel.com>
12504 * config/riscv/riscv-protos.h (enum insn_type): Add new type
12506 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
12508 (expand_vec_ceil): Take MA instead of MU for tmp register.
12509 (expand_vec_floor): Ditto.
12510 (expand_vec_nearbyint): Ditto.
12511 (expand_vec_rint): Ditto.
12512 (expand_vec_round): Ditto.
12513 (expand_vec_roundeven): Ditto.
12515 2023-10-23 Lulu Cheng <chenglulu@loongson.cn>
12517 * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
12519 2023-10-23 Haochen Gui <guihaoc@gcc.gnu.org>
12522 * expr.cc (can_use_qi_vectors): New function to return true if
12523 we know how to implement OP using vectors of bytes.
12524 (qi_vector_mode_supported_p): New function to check if optabs
12525 exists for the mode and certain by pieces operations.
12526 (widest_fixed_size_mode_for_size): Replace the second argument
12527 with the type of by pieces operations. Call can_use_qi_vectors
12528 and qi_vector_mode_supported_p to do the check. Call
12529 scalar_mode_supported_p to check if the scalar mode is supported.
12530 (by_pieces_ninsns): Pass the type of by pieces operation to
12531 widest_fixed_size_mode_for_size.
12532 (class op_by_pieces_d): Remove m_qi_vector_mode. Add m_op to
12533 record the type of by pieces operations.
12534 (op_by_pieces_d::op_by_pieces_d): Change last argument to the
12535 type of by pieces operations, initialize m_op with it. Pass
12536 m_op to function widest_fixed_size_mode_for_size.
12537 (op_by_pieces_d::get_usable_mode): Pass m_op to function
12538 widest_fixed_size_mode_for_size.
12539 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call
12540 can_use_qi_vectors and qi_vector_mode_supported_p to do the
12542 (op_by_pieces_d::run): Pass m_op to function
12543 widest_fixed_size_mode_for_size.
12544 (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES.
12545 (store_by_pieces_d::store_by_pieces_d): Set m_op with the op.
12546 (can_store_by_pieces): Pass the type of by pieces operations to
12547 widest_fixed_size_mode_for_size.
12548 (clear_by_pieces): Initialize class store_by_pieces_d with
12550 (compare_by_pieces_d::compare_by_pieces_d): Set m_op to
12553 2023-10-23 liuhongt <hongtao.liu@intel.com>
12555 PR tree-optimization/111820
12556 PR tree-optimization/111833
12557 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Give
12558 up vectorization for nonlinear iv vect_step_op_mul when
12559 step_expr is not exact_log2 and niters is greater than
12560 TYPE_PRECISION (TREE_TYPE (step_expr)). Also don't vectorize
12561 for nagative niters_skip which will be used by fully masked
12563 (vect_can_advance_ivs_p): Pass whole phi_info to
12564 vect_can_peel_nonlinear_iv_p.
12565 * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Optimize
12566 init_expr * pow (step_expr, skipn) to init_expr
12567 << (log2 (step_expr) * skipn) when step_expr is exact_log2.
12569 2023-10-23 liuhongt <hongtao.liu@intel.com>
12571 * config/i386/mmx.md (mmx_pinsrw): Remove.
12573 2023-10-22 Andrew Pinski <pinskia@gmail.com>
12576 * config/aarch64/aarch64.md (*cmov<mode>_insn_insv): New pattern.
12577 (*cmov_uxtw_insn_insv): Likewise.
12579 2023-10-22 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
12581 * doc/invoke.texi: Document the new -nodefaultrpaths option.
12582 * doc/install.texi: Document the new --with-darwin-extra-rpath
12585 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
12587 * Makefile.in: set ENABLE_DARWIN_AT_RPATH in site.tmp.
12589 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
12591 * configure.ac: Add --with-darwin-extra-rpath option.
12592 * config/darwin.h: Handle DARWIN_EXTRA_RPATH.
12593 * config.in: Regenerate.
12594 * configure: Regenerate.
12596 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
12598 * aclocal.m4: Regenerate.
12599 * configure: Regenerate.
12600 * configure.ac: Handle Darwin rpaths.
12601 * config/darwin.h: Handle Darwin rpaths.
12602 * config/darwin.opt: Handle Darwin rpaths.
12603 * Makefile.in: Handle Darwin rpaths.
12605 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
12607 * gcc.cc (RUNPATH_OPTION): New.
12608 (do_spec_1): Provide '%P' as a spec to insert rpaths for
12609 each compiler startfile path.
12611 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
12612 Maxim Blinov <maxim.blinov@embecosm.com>
12613 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
12614 Iain Sandoe <iain@sandoe.co.uk>
12616 * config.gcc: Default to heap trampolines on macOS 11 and above.
12617 * config/i386/darwin.h: Define X86_CUSTOM_FUNCTION_TEST.
12618 * config/i386/i386.h: Define X86_CUSTOM_FUNCTION_TEST.
12619 * config/i386/i386.cc: Use X86_CUSTOM_FUNCTION_TEST.
12621 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
12622 Maxim Blinov <maxim.blinov@embecosm.com>
12623 Iain Sandoe <iain@sandoe.co.uk>
12624 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
12626 * builtins.def (BUILT_IN_NESTED_PTR_CREATED): Define.
12627 (BUILT_IN_NESTED_PTR_DELETED): Ditto.
12628 * common.opt (ftrampoline-impl): Add option to control
12629 generation of trampoline instantiation (heap or stack).
12630 * coretypes.h: Define enum trampoline_impl.
12631 * tree-nested.cc (convert_tramp_reference_op): Don't bother calling
12632 __builtin_adjust_trampoline for heap trampolines.
12633 (finalize_nesting_tree_1): Emit calls to
12634 __builtin_nested_...{created,deleted} if we're generating with
12635 -ftrampoline-impl=heap.
12636 * tree.cc (build_common_builtin_nodes): Build
12637 __builtin_nested_...{created,deleted}.
12638 * doc/invoke.texi (-ftrampoline-impl): Document.
12640 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
12642 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
12643 Prohibit 'E' and 'H' combinations.
12645 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
12647 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
12648 Change version number of the 'Zfa' extension to 1.0.
12650 2023-10-21 Pan Li <pan2.li@intel.com>
12653 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Remove.
12654 * config/riscv/riscv-protos.h (vls_mode_valid_p): New func decl.
12655 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Replace
12656 macro reference to func.
12657 (vls_mode_valid_p): New func impl for vls mode valid or not.
12658 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Replace
12659 macro reference to func.
12660 * config/riscv/vector-iterators.md: Ditto.
12662 2023-10-20 Roger Sayle <roger@nextmovesoftware.com>
12663 Uros Bizjak <ubizjak@gmail.com>
12665 PR middle-end/101955
12666 PR tree-optimization/106245
12667 * config/i386/i386.md (*extv<mode>_1_0): New define_insn_and_split.
12669 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
12671 * gimple-harden-control-flow.cc: Include memmodel.h.
12673 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
12675 * gimple-harden-control-flow.cc: Include tm_p.h.
12677 2023-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
12679 PR tree-optimization/111882
12680 * tree-if-conv.cc (get_bitfield_rep): Return NULL_TREE for bitfields
12681 with non-constant offsets.
12683 2023-10-20 Tamar Christina <tamar.christina@arm.com>
12685 PR tree-optimization/111866
12686 * tree-vect-loop-manip.cc (vect_do_peeling): Pass null as vinfo to
12687 vect_set_loop_condition during prolog peeling.
12689 2023-10-20 Richard Biener <rguenther@suse.de>
12691 PR tree-optimization/111445
12692 * tree-scalar-evolution.cc (simple_iv_with_niters):
12693 Add missing check for a sign-conversion.
12695 2023-10-20 Richard Biener <rguenther@suse.de>
12697 PR tree-optimization/110243
12698 PR tree-optimization/111336
12699 * tree-ssa-loop-ivopts.cc (strip_offset_1): Rewrite
12700 operations with undefined behavior on overflow to
12701 unsigned arithmetic.
12703 2023-10-20 Richard Biener <rguenther@suse.de>
12705 PR tree-optimization/111891
12706 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fix
12709 2023-10-20 Andrew Stubbs <ams@codesourcery.com>
12711 * config.gcc: Allow --with-arch=gfx1030.
12712 * config/gcn/gcn-hsa.h (NO_XNACK): gfx1030 does not support xnack.
12713 (ASM_SPEC): gfx1030 needs -mattr=+wavefrontsize64 set.
12714 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1030.
12715 (TARGET_GFX1030): New.
12716 (TARGET_RDNA2): New.
12717 * config/gcn/gcn-valu.md (@dpp_move<mode>): Disable for RDNA2.
12718 (addc<mode>3<exec_vcc>): Add RDNA2 syntax variant.
12719 (subc<mode>3<exec_vcc>): Likewise.
12720 (<convop><mode><vndi>2_exec): Add RDNA2 alternatives.
12721 (vec_cmp<mode>di): Likewise.
12722 (vec_cmp<u><mode>di): Likewise.
12723 (vec_cmp<mode>di_exec): Likewise.
12724 (vec_cmp<u><mode>di_exec): Likewise.
12725 (vec_cmp<mode>di_dup): Likewise.
12726 (vec_cmp<mode>di_dup_exec): Likewise.
12727 (reduc_<reduc_op>_scal_<mode>): Disable for RDNA2.
12728 (*<reduc_op>_dpp_shr_<mode>): Likewise.
12729 (*plus_carry_dpp_shr_<mode>): Likewise.
12730 (*plus_carry_in_dpp_shr_<mode>): Likewise.
12731 * config/gcn/gcn.cc (gcn_option_override): Recognise gfx1030.
12732 (gcn_global_address_p): RDNA2 only allows smaller offsets.
12733 (gcn_addr_space_legitimate_address_p): Likewise.
12734 (gcn_omp_device_kind_arch_isa): Recognise gfx1030.
12735 (gcn_expand_epilogue): Use VGPRs instead of SGPRs.
12736 (output_file_start): Configure gfx1030.
12737 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __RDNA2__;
12738 (ASSEMBLER_DIALECT): New.
12739 * config/gcn/gcn.md (rdna): New define_attr.
12740 (enabled): Use "rdna" attribute.
12741 (gcn_return): Remove s_dcache_wb.
12742 (addcsi3_scalar): Add RDNA2 syntax variant.
12743 (addcsi3_scalar_zero): Likewise.
12744 (addptrdi3): Likewise.
12745 (mulsi3): v_mul_lo_i32 should be v_mul_lo_u32 on all ISA.
12746 (*memory_barrier): Add RDNA2 syntax variant.
12747 (atomic_load<mode>): Add RDNA2 cache control variants, and disable
12748 scalar atomics for RDNA2.
12749 (atomic_store<mode>): Likewise.
12750 (atomic_exchange<mode>): Likewise.
12751 * config/gcn/gcn.opt (gpu_type): Add gfx1030.
12752 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1030): New.
12753 (main): Recognise -march=gfx1030.
12754 * config/gcn/t-omp-device: Add gfx1030 isa.
12756 2023-10-20 Richard Biener <rguenther@suse.de>
12758 PR tree-optimization/111000
12759 * stor-layout.h (element_precision): Move ..
12760 * tree.h (element_precision): .. here.
12761 * tree-ssa-loop-im.cc (movement_possibility_1): Restrict
12762 motion of shifts and rotates.
12764 2023-10-20 Alexandre Oliva <oliva@adacore.com>
12766 * tree-core.h (ECF_XTHROW): New macro.
12767 * tree.cc (set_call_expr): Add expected_throw attribute when
12769 (build_common_builtin_node): Add ECF_XTHROW to
12770 __cxa_end_cleanup and _Unwind_Resume or _Unwind_SjLj_Resume.
12771 * calls.cc (flags_from_decl_or_type): Check for expected_throw
12772 attribute to set ECF_XTHROW.
12773 * gimple.cc (gimple_build_call_from_tree): Propagate
12774 ECF_XTHROW from decl flags to gimple call...
12775 (gimple_call_flags): ... and back.
12776 * gimple.h (GF_CALL_XTHROW): New gf_mask flag.
12777 (gimple_call_set_expected_throw): New.
12778 (gimple_call_expected_throw_p): New.
12779 * Makefile.in (OBJS): Add gimple-harden-control-flow.o.
12780 * builtins.def (BUILT_IN___HARDCFR_CHECK): New.
12781 * common.opt (fharden-control-flow-redundancy): New.
12782 (-fhardcfr-check-returning-calls): New.
12783 (-fhardcfr-check-exceptions): New.
12784 (-fhardcfr-check-noreturn-calls=*): New.
12785 (Enum hardcfr_check_noreturn_calls): New.
12786 (fhardcfr-skip-leaf): New.
12787 * doc/invoke.texi: Document them.
12788 (hardcfr-max-blocks, hardcfr-max-inline-blocks): New params.
12789 * flag-types.h (enum hardcfr_noret): New.
12790 * gimple-harden-control-flow.cc: New.
12791 * params.opt (-param=hardcfr-max-blocks=): New.
12792 (-param=hradcfr-max-inline-blocks=): New.
12793 * passes.def (pass_harden_control_flow_redundancy): Add.
12794 * tree-pass.h (make_pass_harden_control_flow_redundancy):
12796 * doc/extend.texi: Document expected_throw attribute.
12798 2023-10-20 Alex Coplan <alex.coplan@arm.com>
12800 * rtl-ssa/changes.cc (function_info::change_insns): Ensure we call
12801 ::remove_insn on deleted insns.
12803 2023-10-20 Richard Biener <rguenther@suse.de>
12805 * doc/generic.texi ({L,R}ROTATE_EXPR): Document.
12807 2023-10-20 Oleg Endo <olegendo@gcc.gnu.org>
12810 * config/sh/sh.md (unnamed split pattern): Fix comparison of
12811 find_regno_note result.
12813 2023-10-20 Richard Biener <rguenther@suse.de>
12815 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Rewrite
12816 both STMT_VINFO_GATHER_SCATTER_P and VMAT_GATHER_SCATTER
12819 2023-10-20 Richard Biener <rguenther@suse.de>
12821 * tree-vect-slp.cc (off_map, off_op0_map, off_arg2_map,
12822 off_arg3_arg2_map): New.
12823 (vect_get_operand_map): Get flag whether the stmt was
12824 recognized as gather or scatter and use the above
12826 (vect_get_and_check_slp_defs): Adjust.
12827 (vect_build_slp_tree_2): Likewise.
12829 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12831 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Rename variables.
12832 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
12833 (pre_vsetvl::emit_vsetvl): Ditto.
12835 2023-10-20 Tamar Christina <tamar.christina@arm.com>
12836 Andre Vieira <andre.simoesdiasvieira@arm.com>
12838 * tree-if-conv.cc (if_convertible_loop_p_1): Move check from here ...
12839 (get_loop_body_if_conv_order): ... to here.
12840 (if_convertible_loop_p): Remove single_exit check.
12841 (tree_if_conversion): Move single_exit check to if-conversion part and
12842 support multiple exits.
12844 2023-10-20 Tamar Christina <tamar.christina@arm.com>
12845 Andre Vieira <andre.simoesdiasvieira@arm.com>
12847 * tree-vect-patterns.cc (vect_init_pattern_stmt): Copy STMT_VINFO_TYPE
12848 from original statement.
12849 (vect_recog_bitfield_ref_pattern): Support bitfields in gcond.
12851 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12854 * config/riscv/riscv-selftests.cc (run_const_vector_selftests): Adapt selftest.
12855 * config/riscv/riscv-v.cc (expand_const_vector): Change it into vec_duplicate splitter.
12857 2023-10-20 Lehua Ding <lehua.ding@rivai.ai>
12862 * config/riscv/riscv-vsetvl.cc (bitmap_union_of_preds_with_entry): New.
12864 (compute_reaching_defintion): New.
12865 (enum vsetvl_type): Moved.
12866 (vlmax_avl_p): Moved.
12867 (enum emit_type): Moved.
12868 (vlmul_to_str): Moved.
12869 (vlmax_avl_insn_p): Removed.
12870 (policy_to_str): Moved.
12871 (loop_basic_block_p): Removed.
12872 (valid_sew_p): Removed.
12873 (vsetvl_insn_p): Moved.
12874 (vsetvl_vtype_change_only_p): Removed.
12875 (after_or_same_p): Removed.
12876 (before_p): Removed.
12877 (anticipatable_occurrence_p): Removed.
12878 (available_occurrence_p): Removed.
12879 (insn_should_be_added_p): Removed.
12880 (get_all_sets): Moved.
12881 (get_same_bb_set): Moved.
12882 (gen_vsetvl_pat): Removed.
12883 (calculate_vlmul): Moved.
12884 (get_max_int_sew): New.
12885 (emit_vsetvl_insn): Removed.
12886 (get_max_float_sew): New.
12887 (eliminate_insn): Removed.
12888 (insert_vsetvl): Removed.
12889 (count_regno_occurrences): Moved.
12890 (get_vl_vtype_info): Removed.
12891 (enum def_type): Moved.
12892 (validate_change_or_fail): Moved.
12893 (change_insn): Removed.
12894 (get_all_real_uses): Moved.
12895 (get_forward_read_vl_insn): Removed.
12896 (get_backward_fault_first_load_insn): Removed.
12897 (change_vsetvl_insn): Removed.
12898 (avl_source_has_vsetvl_p): Removed.
12899 (source_equal_p): Moved.
12900 (calculate_sew): Removed.
12901 (same_equiv_note_p): Moved.
12902 (get_expr_id): New.
12903 (incompatible_avl_p): Removed.
12905 (different_sew_p): Removed.
12906 (get_bb_index): New.
12907 (different_lmul_p): Removed.
12908 (has_no_uses): Moved.
12909 (different_ratio_p): Removed.
12910 (different_tail_policy_p): Removed.
12911 (different_mask_policy_p): Removed.
12912 (possible_zero_avl_p): Removed.
12913 (enum demand_flags): New.
12914 (second_ratio_invalid_for_first_sew_p): Removed.
12915 (second_ratio_invalid_for_first_lmul_p): Removed.
12917 (float_insn_valid_sew_p): Removed.
12918 (second_sew_less_than_first_sew_p): Removed.
12919 (first_sew_less_than_second_sew_p): Removed.
12920 (class vsetvl_info): New.
12921 (compare_lmul): Removed.
12922 (second_lmul_less_than_first_lmul_p): Removed.
12923 (second_ratio_less_than_first_ratio_p): Removed.
12924 (DEF_INCOMPATIBLE_COND): Removed.
12925 (greatest_sew): Removed.
12926 (first_sew): Removed.
12927 (second_sew): Removed.
12928 (first_vlmul): Removed.
12929 (second_vlmul): Removed.
12930 (first_ratio): Removed.
12931 (second_ratio): Removed.
12932 (vlmul_for_first_sew_second_ratio): Removed.
12933 (vlmul_for_greatest_sew_second_ratio): Removed.
12934 (ratio_for_second_sew_first_vlmul): Removed.
12935 (class vsetvl_block_info): New.
12936 (DEF_SEW_LMUL_FUSE_RULE): New.
12937 (always_unavailable): Removed.
12938 (avl_unavailable_p): Removed.
12939 (class demand_system): New.
12940 (sew_unavailable_p): Removed.
12941 (lmul_unavailable_p): Removed.
12942 (ge_sew_unavailable_p): Removed.
12943 (ge_sew_lmul_unavailable_p): Removed.
12944 (ge_sew_ratio_unavailable_p): Removed.
12945 (DEF_UNAVAILABLE_COND): Removed.
12946 (same_sew_lmul_demand_p): Removed.
12947 (propagate_avl_across_demands_p): Removed.
12948 (reg_available_p): Removed.
12949 (support_relaxed_compatible_p): Removed.
12950 (demands_can_be_fused_p): Removed.
12951 (earliest_pred_can_be_fused_p): Removed.
12952 (vsetvl_dominated_by_p): Removed.
12953 (avl_info::avl_info): Removed.
12954 (avl_info::single_source_equal_p): Removed.
12955 (avl_info::multiple_source_equal_p): Removed.
12956 (DEF_SEW_LMUL_RULE): New.
12957 (avl_info::operator=): Removed.
12958 (avl_info::operator==): Removed.
12959 (DEF_POLICY_RULE): New.
12960 (avl_info::operator!=): Removed.
12961 (avl_info::has_non_zero_avl): Removed.
12962 (vl_vtype_info::vl_vtype_info): Removed.
12963 (vl_vtype_info::operator==): Removed.
12964 (DEF_AVL_RULE): New.
12965 (vl_vtype_info::operator!=): Removed.
12966 (vl_vtype_info::same_avl_p): Removed.
12967 (vl_vtype_info::same_vtype_p): Removed.
12968 (vl_vtype_info::same_vlmax_p): Removed.
12969 (vector_insn_info::operator>=): Removed.
12970 (vector_insn_info::operator==): Removed.
12971 (class pre_vsetvl): New.
12972 (vector_insn_info::parse_insn): Removed.
12973 (vector_insn_info::compatible_p): Removed.
12974 (vector_insn_info::skip_avl_compatible_p): Removed.
12975 (vector_insn_info::compatible_avl_p): Removed.
12976 (vector_insn_info::compatible_vtype_p): Removed.
12977 (vector_insn_info::available_p): Removed.
12978 (vector_insn_info::fuse_avl): Removed.
12979 (vector_insn_info::fuse_sew_lmul): Removed.
12980 (vector_insn_info::fuse_tail_policy): Removed.
12981 (vector_insn_info::fuse_mask_policy): Removed.
12982 (vector_insn_info::local_merge): Removed.
12983 (vector_insn_info::global_merge): Removed.
12984 (vector_insn_info::get_avl_or_vl_reg): Removed.
12985 (vector_insn_info::update_fault_first_load_avl): Removed.
12986 (vector_insn_info::dump): Removed.
12987 (vector_infos_manager::vector_infos_manager): Removed.
12988 (vector_infos_manager::create_expr): Removed.
12989 (vector_infos_manager::get_expr_id): Removed.
12990 (vector_infos_manager::all_same_ratio_p): Removed.
12991 (vector_infos_manager::all_avail_in_compatible_p): Removed.
12992 (vector_infos_manager::all_same_avl_p): Removed.
12993 (vector_infos_manager::expr_set_num): Removed.
12994 (vector_infos_manager::release): Removed.
12995 (vector_infos_manager::create_bitmap_vectors): Removed.
12996 (vector_infos_manager::free_bitmap_vectors): Removed.
12997 (vector_infos_manager::dump): Removed.
12998 (class pass_vsetvl): Adjust.
12999 (pass_vsetvl::get_vector_info): Removed.
13000 (pass_vsetvl::get_block_info): Removed.
13001 (pass_vsetvl::update_vector_info): Removed.
13002 (pass_vsetvl::update_block_info): Removed.
13003 (pre_vsetvl::compute_avl_def_data): New.
13004 (pass_vsetvl::simple_vsetvl): Removed.
13005 (pass_vsetvl::compute_local_backward_infos): Removed.
13006 (pass_vsetvl::need_vsetvl): Removed.
13007 (pass_vsetvl::transfer_before): Removed.
13008 (pass_vsetvl::transfer_after): Removed.
13009 (pre_vsetvl::compute_vsetvl_def_data): New.
13010 (pass_vsetvl::emit_local_forward_vsetvls): Removed.
13011 (pass_vsetvl::prune_expressions): Removed.
13012 (pass_vsetvl::compute_local_properties): Removed.
13013 (pre_vsetvl::compute_lcm_local_properties): New.
13014 (pass_vsetvl::earliest_fusion): Removed.
13015 (pre_vsetvl::fuse_local_vsetvl_info): New.
13016 (pass_vsetvl::vsetvl_fusion): Removed.
13017 (pass_vsetvl::can_refine_vsetvl_p): Removed.
13018 (pre_vsetvl::earliest_fuse_vsetvl_info): New.
13019 (pass_vsetvl::refine_vsetvls): Removed.
13020 (pass_vsetvl::cleanup_vsetvls): Removed.
13021 (pass_vsetvl::commit_vsetvls): Removed.
13022 (pass_vsetvl::pre_vsetvl): Removed.
13023 (pass_vsetvl::get_vsetvl_at_end): Removed.
13024 (local_avl_compatible_p): Removed.
13025 (pass_vsetvl::local_eliminate_vsetvl_insn): Removed.
13026 (pre_vsetvl::pre_global_vsetvl_info): New.
13027 (get_first_vsetvl_before_rvv_insns): Removed.
13028 (pass_vsetvl::global_eliminate_vsetvl_insn): Removed.
13029 (pre_vsetvl::emit_vsetvl): New.
13030 (pass_vsetvl::ssa_post_optimization): Removed.
13031 (pre_vsetvl::cleaup): New.
13032 (pre_vsetvl::remove_avl_operand): New.
13033 (pass_vsetvl::df_post_optimization): Removed.
13034 (pre_vsetvl::remove_unused_dest_operand): New.
13035 (pass_vsetvl::init): Removed.
13036 (pass_vsetvl::done): Removed.
13037 (pass_vsetvl::compute_probabilities): Removed.
13038 (pass_vsetvl::lazy_vsetvl): Adjust.
13039 (pass_vsetvl::execute): Adjust.
13040 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Removed.
13041 (DEF_SEW_LMUL_RULE): New.
13042 (DEF_SEW_LMUL_FUSE_RULE): Removed.
13043 (DEF_POLICY_RULE): New.
13044 (DEF_UNAVAILABLE_COND): Removed
13045 (DEF_AVL_RULE): New demand type.
13046 (sew_lmul): New demand type.
13047 (ratio_only): New demand type.
13048 (sew_only): New demand type.
13049 (ge_sew): New demand type.
13050 (ratio_and_ge_sew): New demand type.
13051 (tail_mask_policy): New demand type.
13052 (tail_policy_only): New demand type.
13053 (mask_policy_only): New demand type.
13054 (ignore_policy): New demand type.
13055 (avl): New demand type.
13056 (non_zero_avl): New demand type.
13057 (ignore_avl): New demand type.
13058 * config/riscv/t-riscv: Removed riscv-vsetvl.h
13059 * config/riscv/riscv-vsetvl.h: Removed.
13061 2023-10-20 Alexandre Oliva <oliva@adacore.com>
13063 * tree-eh.cc (make_eh_edges): Return the new edge.
13064 * tree-eh.h (make_eh_edges): Likewise.
13066 2023-10-19 Marek Polacek <polacek@redhat.com>
13068 * doc/contrib.texi: Add entry for Patrick Palka.
13070 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13072 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function
13073 compatible with mask parameters in clone.
13074 * tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean
13076 (vectorizable_simd_clone_call): Enable the use of masked clones in
13077 fully masked loops.
13079 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13081 PR tree-optimization/110485
13082 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial
13083 vectors usage if a notinbranch simdclone has been selected.
13085 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13087 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case
13088 simd clone calls and only use types that are mapped to vectors.
13089 (simd_clone_call_p): New helper function.
13091 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13093 * tree-parloops.cc (try_transform_to_exit_first_loop_alt): Accept
13094 poly NIT and ALT_BOUND.
13096 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13098 * tree-parloops.cc (create_loop_fn): Copy specific target and
13099 optimization options to clone.
13101 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13103 * omp-simd-clone.cc (simd_clone_subparts): Remove.
13104 (simd_clone_init_simd_arrays): Replace simd_clone_supbarts with
13105 TYPE_VECTOR_SUBPARTS.
13106 (ipa_simd_modify_function_body): Likewise.
13107 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Likewise.
13108 (simd_clone_subparts): Remove.
13110 2023-10-19 Jason Merrill <jason@redhat.com>
13112 * ABOUT-GCC-NLS: Add usage guidance.
13114 2023-10-19 Jason Merrill <jason@redhat.com>
13116 * diagnostic-core.h (permerror): Rename new overloads...
13117 (permerror_opt): To this.
13118 * diagnostic.cc: Likewise.
13120 2023-10-19 Tamar Christina <tamar.christina@arm.com>
13122 PR tree-optimization/111860
13123 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
13124 Remove PHI nodes that dominate loop.
13126 2023-10-19 Richard Biener <rguenther@suse.de>
13128 PR tree-optimization/111131
13129 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Make
13130 sure to update all gather/scatter stmt DRs, not only those
13131 that eventually got VMAT_GATHER_SCATTER set.
13132 * tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add.
13133 (vect_get_and_check_slp_defs): Handle gathers/scatters,
13134 adding the offset as SLP operand and comparing base and scale.
13135 (vect_build_slp_tree_1): Handle gathers.
13136 (vect_build_slp_tree_2): Likewise.
13138 2023-10-19 Richard Biener <rguenther@suse.de>
13140 * tree-vect-stmts.cc (vect_build_gather_load_calls): Rename
13142 (vect_build_one_gather_load_call): ... this. Refactor,
13143 inline widening/narrowing support ...
13144 (vectorizable_load): ... here, do gather vectorization
13145 with builtin decls along other gather vectorization.
13147 2023-10-19 Alex Coplan <alex.coplan@arm.com>
13149 * config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ...
13150 (load_pair_dw_<TX:mode><TX2:mode>): ... this.
13151 (store_pair_dw_tftf): Rename to ...
13152 (store_pair_dw_<TX:mode><TX2:mode>): ... this.
13153 * config/aarch64/iterators.md (TX2): New.
13155 2023-10-19 Alex Coplan <alex.coplan@arm.com>
13157 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new
13158 parameter to give final insn position, infer use of mem if it isn't
13159 specified explicitly.
13160 (function_info::change_insns): Pass down final insn position to
13161 finalize_new_accesses.
13162 * rtl-ssa/functions.h: Add parameter to finalize_new_accesses.
13164 2023-10-19 Alex Coplan <alex.coplan@arm.com>
13166 * rtl-ssa/accesses.cc (function_info::reparent_use): New.
13167 * rtl-ssa/functions.h (function_info): Declare new member
13168 function reparent_use.
13170 2023-10-19 Alex Coplan <alex.coplan@arm.com>
13172 * rtl-ssa/access-utils.h (drop_memory_access): New.
13174 2023-10-19 Alex Coplan <alex.coplan@arm.com>
13176 * rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we
13177 update the prev pointer on the following nondebug insn in the
13178 case that !insn->is_debug_insn () && next->is_debug_insn ().
13180 2023-10-19 Haochen Jiang <haochen.jiang@intel.com>
13182 * config/i386/i386.h: Correct the ISA enabled for Arrow Lake.
13183 Also make Clearwater Forest depends on Sierra Forest.
13184 * config/i386/i386-options.cc: Revise the order of the macro
13185 definition to avoid confusion.
13186 * doc/extend.texi: Revise documentation.
13187 * doc/invoke.texi: Correct documentation.
13189 2023-10-19 Andrew Stubbs <ams@codesourcery.com>
13191 * config.gcc (amdgcn): Switch default to --with-arch=gfx900.
13192 Implement support for --with-multilib-list.
13193 * config/gcn/t-gcn-hsa: Likewise.
13194 * doc/install.texi: Likewise.
13195 * doc/invoke.texi: Mark Fiji deprecated.
13197 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
13199 * config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from
13200 vector_costs. Add a constructor.
13201 (loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to
13202 adjust the cost for inner loops.
13203 (loongarch_vector_costs::count_operations): New function.
13204 (loongarch_vector_costs::determine_suggested_unroll_factor): Ditto.
13205 (loongarch_vector_costs::finish_cost): Ditto.
13206 (loongarch_builtin_vectorization_cost): Adjust.
13207 * config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter.
13208 (loongarcg-vect-issue-info): Ditto.
13209 (mmemvec-cost): Delete.
13210 * config/loongarch/genopts/loongarch.opt.in
13211 (loongarch-vect-unroll-limit): Ditto.
13212 (loongarcg-vect-issue-info): Ditto.
13213 (mmemvec-cost): Delete.
13214 * doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option.
13216 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
13218 * config/loongarch/lasx.md
13219 (vec_widen_<su>mult_even_v8si): New patterns.
13220 (vec_widen_<su>add_hi_<mode>): Ditto.
13221 (vec_widen_<su>add_lo_<mode>): Ditto.
13222 (vec_widen_<su>sub_hi_<mode>): Ditto.
13223 (vec_widen_<su>sub_lo_<mode>): Ditto.
13224 (vec_widen_<su>mult_hi_<mode>): Ditto.
13225 (vec_widen_<su>mult_lo_<mode>): Ditto.
13226 * config/loongarch/loongarch.md (u_bool): New iterator.
13227 * config/loongarch/loongarch-protos.h
13228 (loongarch_expand_vec_widen_hilo): New prototype.
13229 * config/loongarch/loongarch.cc
13230 (loongarch_expand_vec_interleave): New function.
13231 (loongarch_expand_vec_widen_hilo): New function.
13233 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
13235 * config/loongarch/lasx.md
13236 (avg<mode>3_ceil): New patterns.
13237 (uavg<mode>3_ceil): Ditto.
13238 (avg<mode>3_floor): Ditto.
13239 (uavg<mode>3_floor): Ditto.
13240 (usadv32qi): Ditto.
13241 (ssadv32qi): Ditto.
13242 * config/loongarch/lsx.md
13243 (avg<mode>3_ceil): New patterns.
13244 (uavg<mode>3_ceil): Ditto.
13245 (avg<mode>3_floor): Ditto.
13246 (uavg<mode>3_floor): Ditto.
13247 (usadv16qi): Ditto.
13248 (ssadv16qi): Ditto.
13250 2023-10-18 Andrew Pinski <pinskia@gmail.com>
13252 PR middle-end/111863
13253 * expr.cc (do_store_flag): Don't over write arg0
13254 when stripping off `& POW2`.
13256 2023-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13258 PR tree-optimization/111648
13259 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1
13260 chooses base element from arg, ensure that it's a natural stepped
13262 (build_vec_cst_rand): New param natural_stepped and use it to
13263 construct a naturally stepped sequence.
13264 (test_nunits_min_2): Add new unit tests Case 6 and Case 7.
13266 2023-10-18 Dimitar Dimitrov <dimitar@dinux.eu>
13268 * config/pru/pru.cc (pru_insn_cost): New function.
13269 (TARGET_INSN_COST): Define for PRU.
13271 2023-10-18 Andrew Carlotti <andrew.carlotti@arm.com>
13273 * config/aarch64/aarch64.cc (aarch64_test_fractional_cost):
13274 Test <= instead of testing < twice.
13276 2023-10-18 Jakub Jelinek <jakub@redhat.com>
13278 PR bootstrap/111852
13279 * cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of
13280 using rtx_def type for memory_extend_buf, use unsigned char
13281 arrayy with size of rtx_def and its alignment.
13283 2023-10-18 Jason Merrill <jason@redhat.com>
13285 * doc/invoke.texi: Move -fpermissive to Warning Options.
13286 * diagnostic.cc (update_effective_level_from_pragmas): Remove
13287 redundant system header check.
13288 (diagnostic_report_diagnostic): Move down syshdr/-w check.
13289 (diagnostic_impl): Handle DK_PERMERROR with an option number.
13290 (permerror): Add new overloads.
13291 * diagnostic-core.h (permerror): Declare them.
13293 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
13295 * gimplify.cc (gimplify_bind_expr): Remove "omp allocate" attribute
13296 to avoid that auxillary statement list reaches LTO.
13298 2023-10-18 Jakub Jelinek <jakub@redhat.com>
13300 PR tree-optimization/111845
13301 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary
13302 statements for the 4 operand addition or subtraction of 3 operands
13303 from 1 operand cases and remove them when successful. Look for
13304 nested additions even from rhs[2], not just rhs[1].
13306 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
13309 * config/nvptx/nvptx.cc (nvptx_option_override): Issue fatal error
13310 instead of an assert ICE when no -march= has been specified.
13312 2023-10-18 Iain Sandoe <iain@sandoe.co.uk>
13314 * config.in: Regenerate.
13315 * config/darwin.cc (darwin_file_start): Add assembler directives
13316 for the target OS version, where these are supported by the
13318 (darwin_override_options): Check for building >= macOS 10.14.
13319 * configure: Regenerate.
13320 * configure.ac: Check for assembler support of .build_version
13323 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13325 PR tree-optimization/109154
13326 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
13327 (typedef struct ifcvt_arg_entry): New.
13328 (cmp_arg_entry): New.
13329 (gen_phi_arg_condition, gen_phi_nest_statement,
13330 predicate_scalar_phi): Use them.
13332 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13334 PR tree-optimization/109154
13335 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
13336 Rewrite to new syntax.
13337 (*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in
13340 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13342 PR tree-optimization/109154
13343 * tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN.
13345 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13347 PR tree-optimization/109154
13348 * match.pd: Add new cond_op rule.
13350 2023-10-18 Xi Ruoyao <xry111@xry111.site>
13352 * config/loongarch/loongarch.md (movfcc): Use fcmp.caf.s for
13355 2023-10-18 Richard Biener <rguenther@suse.de>
13357 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
13358 Relax check to again allow passing integer mode masks
13359 as traditional vectors.
13361 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13363 * tree-loop-distribution.cc (copy_loop_before): Request no LCSSA.
13364 * tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional
13366 (slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling.
13367 (find_guard_arg): Look value up through explicit edge and original defs.
13368 (vect_do_peeling): Use it.
13369 (slpeel_update_phi_nodes_for_guard2): Take explicit exit edge.
13370 (slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops):
13372 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi.
13373 * tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add
13374 optional param to turn off LCSSA mode.
13376 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13378 * tree-if-conv.cc (tree_if_conversion): Record exits in aux.
13379 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
13381 * tree-vect-loop.cc (vect_get_loop_niters): Determine main exit.
13382 (vec_init_loop_exit_info): Extend analysis when multiple exits.
13383 (vect_analyze_loop_form): Record conds and determine main cond.
13384 (vect_create_loop_vinfo): Extend bookkeeping of conds.
13385 (vect_analyze_loop): Release conds.
13386 * tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS,
13387 LOOP_VINFO_LOOP_IV_COND): New.
13388 (struct vect_loop_form_info): Add conds, alt_loop_conds;
13389 (struct loop_vec_info): Add conds, loop_iv_cond.
13391 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13393 * tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly.
13394 (loop_distribution::distribute_loop): Bail out of not single exit.
13395 * tree-scalar-evolution.cc (get_loop_exit_condition): New.
13396 * tree-scalar-evolution.h (get_loop_exit_condition): New.
13397 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit
13399 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors,
13400 vect_set_loop_condition_partial_vectors_avx512,
13401 vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly
13403 (slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and
13404 return new peeled corresponding peeled exit.
13405 (slpeel_can_duplicate_loop_p): Explicitly take exit.
13406 (find_loop_location): Handle not knowing an explicit exit.
13407 (vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf,
13408 find_guard_arg, slpeel_update_phi_nodes_for_loops,
13409 slpeel_update_phi_nodes_for_guard2): Use new exits.
13410 (vect_do_peeling): Update bookkeeping to keep track of exits.
13411 * tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to
13413 (vec_init_loop_exit_info): New.
13414 (_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv,
13415 vec_epilogue_loop_iv, scalar_loop_iv.
13416 (vect_analyze_loop_form): Initialize exits.
13417 (vect_create_loop_vinfo): Set main exit.
13418 (vect_create_epilog_for_reduction, vectorizable_live_operation,
13419 vect_transform_loop): Use it.
13420 (scale_profile_for_vect_loop): Explicitly take exit to scale.
13421 * tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit.
13422 * tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT,
13423 LOOP_VINFO_SCALAR_IV_EXIT): New.
13424 (struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv,
13426 (vect_set_loop_condition, slpeel_can_duplicate_loop_p,
13427 slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits.
13428 (vec_init_loop_exit_info): New.
13429 (struct vect_loop_form_info): Add loop_exit.
13431 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13433 * tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body
13435 (vectorizable_comparison_1): ...This.
13437 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13439 * config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function.
13440 (expand_vec_perm_const_1): Add consecutive pattern recognition.
13442 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
13444 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther
13446 * common/config/i386/i386-common.cc (processor_name):
13448 (processor_alias_table): Ditto.
13449 * common/config/i386/i386-cpuinfo.h (enum processor_types):
13450 Add INTEL_PANTHERLAKE.
13451 * config.gcc: Add -march=pantherlake.
13452 * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor
13453 the if clause. Handle pantherlake.
13454 * config/i386/i386-c.cc (ix86_target_macros_internal):
13455 Handle pantherlake.
13456 * config/i386/i386-options.cc (processor_cost_table): Ditto.
13457 (m_PANTHERLAKE): New.
13458 (m_CORE_HYBRID): Add pantherlake.
13459 * config/i386/i386.h (enum processor_type): Ditto.
13460 * doc/extend.texi: Ditto.
13461 * doc/invoke.texi: Ditto.
13463 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
13465 * config/i386/i386-options.cc (m_CORE_HYBRID): New.
13466 * config/i386/x86-tune.def: Replace hybrid client tune to
13469 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
13471 * common/config/i386/cpuinfo.h
13472 (get_intel_cpu): Handle Clearwater Forest.
13473 * common/config/i386/i386-common.cc (processor_name):
13474 Add Clearwater Forest.
13475 (processor_alias_table): Ditto.
13476 * common/config/i386/i386-cpuinfo.h (enum processor_types):
13477 Add INTEL_CLEARWATERFOREST.
13478 * config.gcc: Add -march=clearwaterforest.
13479 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
13481 * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
13482 * config/i386/i386-options.cc (processor_cost_table): Ditto.
13483 (m_CLEARWATERFOREST): New.
13484 (m_CORE_ATOM): Add clearwaterforest.
13485 * config/i386/i386.h (enum processor_type): Ditto.
13486 * doc/extend.texi: Ditto.
13487 * doc/invoke.texi: Ditto.
13489 2023-10-18 liuhongt <hongtao.liu@intel.com>
13491 * config/i386/mmx.md (fma<mode>4): New expander.
13492 (fms<mode>4): Ditto.
13493 (fnma<mode>4): Ditto.
13494 (fnms<mode>4): Ditto.
13495 (vec_fmaddsubv4hf4): Ditto.
13496 (vec_fmsubaddv4hf4): Ditto.
13498 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13501 * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function.
13503 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
13505 * config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make
13506 the position of the LR save slot dependent on stack clash
13507 protection unless shadow call stacks are enabled.
13509 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
13511 * config/aarch64/aarch64.h (aarch64_frame): Add vectors that
13512 store the list saved GPRs, FPRs and predicate registers.
13513 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize
13514 the lists of saved registers. Use them to choose push candidates.
13515 Invalidate pop candidates if we're not going to do a pop.
13516 (aarch64_next_callee_save): Delete.
13517 (aarch64_save_callee_saves): Take a list of registers,
13518 rather than a range. Make !skip_wb select only write-back
13520 (aarch64_expand_prologue): Update calls accordingly.
13521 (aarch64_restore_callee_saves): Take a list of registers,
13522 rather than a range. Always skip pop candidates. Also skip
13523 LR if shadow call stacks are enabled.
13524 (aarch64_expand_epilogue): Update calls accordingly.
13526 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
13528 * cfgbuild.h (find_sub_basic_blocks): Declare.
13529 * cfgbuild.cc (update_profile_for_new_sub_basic_block): New function,
13531 (find_many_sub_basic_blocks): ...here.
13532 (find_sub_basic_blocks): New function.
13533 * function.cc (thread_prologue_and_epilogue_insns): Handle
13534 epilogues that contain jumps.
13536 2023-10-17 Andrew Pinski <apinski@marvell.com>
13538 PR tree-optimization/110817
13539 * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
13540 check for boolean type as they don't have "[0,1]" range.
13542 2023-10-17 Andrew Pinski <pinskia@gmail.com>
13544 PR tree-optimization/111432
13545 * match.pd (`a & (x | CST)`): New pattern.
13547 2023-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13549 * tree-cfg.cc (move_sese_region_to_fn): Initialize profile_count for
13552 2023-10-17 Richard Biener <rguenther@suse.de>
13554 PR tree-optimization/111846
13555 * tree-vectorizer.h (_slp_tree::simd_clone_info): Add.
13556 (SLP_TREE_SIMD_CLONE_INFO): New.
13557 * tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
13558 SLP_TREE_SIMD_CLONE_INFO.
13559 (_slp_tree::~_slp_tree): Release it.
13560 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
13561 SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO
13562 dependent on if we're doing SLP.
13564 2023-10-17 Jakub Jelinek <jakub@redhat.com>
13566 * wide-int-print.h (print_dec_buf_size): For length, divide number
13567 of bits by 3 and add 3 instead of division by 4 and adding 4.
13568 * wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call
13569 print_hex, instead call print_decu on either negated value after
13570 printing - or on wi itself.
13571 (print_decu): Don't call print_hex, instead print even large numbers
13573 (pp_wide_int_large): Assume len from print_dec_buf_size is big enough
13574 even if it returns false.
13575 * pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if
13576 pp_wide_int_large should be used.
13577 * tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size
13578 to compute needed buffer size.
13580 2023-10-17 Richard Biener <rguenther@suse.de>
13582 PR middle-end/111818
13583 * tree-ssa.cc (maybe_optimize_var): When clearing
13584 DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
13586 2023-10-17 Richard Biener <rguenther@suse.de>
13588 PR tree-optimization/111807
13589 * tree-sra.cc (build_ref_for_model): Only call
13590 build_reconstructed_reference when the offsets are the same.
13592 2023-10-17 Vineet Gupta <vineetg@rivosinc.com>
13595 * expr.cc (expand_expr_real_2): Do not clear SUBREG_PROMOTED_VAR_P.
13597 2023-10-17 Chenghui Pan <panchenghui@loongson.cn>
13599 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
13600 fix impl related to vec_initv32qiv16qi template to avoid ICE.
13602 2023-10-17 Lulu Cheng <chenglulu@loongson.cn>
13603 Chenghua Xu <xuchenghua@loongson.cn>
13605 * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
13608 2023-10-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13610 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix big LMUL issue.
13611 (get_store_value): New function.
13613 2023-10-16 Jeff Law <jlaw@ventanamicro.com>
13615 * explow.cc (probe_stack_range): Handle case when expand_binop
13616 does not construct its result in the expected location.
13618 2023-10-16 David Malcolm <dmalcolm@redhat.com>
13620 * diagnostic.cc (diagnostic_initialize): When LANG=C, update
13621 default for -fdiagnostics-text-art-charset from emoji to ascii.
13622 * doc/invoke.texi (fdiagnostics-text-art-charset): Document the above.
13624 2023-10-16 David Malcolm <dmalcolm@redhat.com>
13626 * diagnostic.cc (diagnostic_initialize): Ensure
13627 context->extra_output_kind is initialized.
13629 2023-10-16 Uros Bizjak <ubizjak@gmail.com>
13631 * config/i386/i386.cc (ix86_can_inline_p):
13632 Handle CM_LARGE and CM_LARGE_PIC.
13633 (x86_elf_aligned_decl_common): Ditto.
13634 (x86_output_aligned_bss): Ditto.
13635 * config/i386/i386.opt: Update doc for -mlarge-data-threshold=.
13636 * doc/invoke.texi: Update doc for -mlarge-data-threshold=.
13638 2023-10-16 Christoph Müllner <christoph.muellner@vrull.eu>
13640 * config/riscv/riscv-protos.h (emit_block_move): Remove redundant
13641 prototype. Improve comment.
13642 * config/riscv/riscv.cc (riscv_block_move_straight): Move from riscv.cc
13643 into riscv-string.cc.
13644 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
13645 (riscv_expand_block_move): Likewise.
13646 * config/riscv/riscv-string.cc (riscv_block_move_straight): Add moved
13648 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
13649 (riscv_expand_block_move): Likewise.
13651 2023-10-16 Manolis Tsamis <manolis.tsamis@vrull.eu>
13653 * Makefile.in: Add fold-mem-offsets.o.
13654 * passes.def: Schedule a new pass.
13655 * tree-pass.h (make_pass_fold_mem_offsets): Declare.
13656 * common.opt: New options.
13657 * doc/invoke.texi: Document new option.
13658 * fold-mem-offsets.cc: New file.
13660 2023-10-16 Andrew Pinski <pinskia@gmail.com>
13662 PR tree-optimization/101541
13663 * match.pd (A CMP 0 ? A : -A): Improve
13664 using bitwise_equal_p.
13666 2023-10-16 Andrew Pinski <pinskia@gmail.com>
13668 PR tree-optimization/31531
13669 * match.pd (~X op ~Y): Allow for an optional nop convert.
13670 (~X op C): Likewise.
13672 2023-10-16 Roger Sayle <roger@nextmovesoftware.com>
13674 * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to
13675 use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER.
13677 2023-10-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
13679 * config/s390/vector.md (popcountv8hi2_vx): Sign extend each
13680 unsigned vector element.
13682 2023-10-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13684 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes.
13686 2023-10-16 Jiufu Guo <guojiufu@linux.ibm.com>
13688 * fold-const.cc (expr_not_equal_to): Replace get_global_range_query
13689 by get_range_query.
13690 * gimple-fold.cc (size_must_be_zero_p): Likewise.
13691 * gimple-range-fold.cc (fur_source::fur_source): Likewise.
13692 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Likewise.
13693 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
13695 2023-10-16 liuhongt <hongtao.liu@intel.com>
13697 * config/i386/mmx.md (V2FI_32): New mode iterator
13698 (movd_v2hf_to_sse): Rename to ..
13699 (movd_<mode>_to_sse): .. this.
13700 (movd_v2hf_to_sse_reg): Rename to ..
13701 (movd_<mode>_to_sse_reg): .. this.
13702 (fix<fixunssuffix>_trunc<mode><mmxintvecmodelower>2): New
13704 (fix<fixunssuffix>_truncv2hfv2si2): Ditto.
13705 (float<floatunssuffix><mmxintvecmodelower><mode>2): Ditto.
13706 (float<floatunssuffix>v2siv2hf2): Ditto.
13707 (extendv2hfv2sf2): Ditto.
13708 (truncv2sfv2hf2): Ditto.
13709 * config/i386/sse.md (*vec_concatv8hf_movss): Rename to ..
13710 (*vec_concat<mode>_movss): .. this.
13712 2023-10-16 liuhongt <hongtao.liu@intel.com>
13714 * config/i386/i386-expand.cc (ix86_sse_copysign_to_positive):
13716 (ix86_expand_round_sse4): Ditto.
13717 * config/i386/i386.md (roundhf2): New expander.
13718 (lroundhf<mode>2): Ditto.
13719 (lrinthf<mode>2): Ditto.
13720 (l<rounding_insn>hf<mode>2): Ditto.
13721 * config/i386/mmx.md (sqrt<mode>2): Ditto.
13722 (btrunc<mode>2): Ditto.
13723 (nearbyint<mode>2): Ditto.
13724 (rint<mode>2): Ditto.
13725 (lrint<mode><mmxintvecmodelower>2): Ditto.
13726 (floor<mode>2): Ditto.
13727 (lfloor<mode><mmxintvecmodelower>2): Ditto.
13728 (ceil<mode>2): Ditto.
13729 (lceil<mode><mmxintvecmodelower>2): Ditto.
13730 (round<mode>2): Ditto.
13731 (lround<mode><mmxintvecmodelower>2): Ditto.
13732 * config/i386/sse.md (lrint<mode><sseintvecmodelower>2): Ditto.
13733 (lfloor<mode><sseintvecmodelower>2): Ditto.
13734 (lceil<mode><sseintvecmodelower>2): Ditto.
13735 (lround<mode><sseintvecmodelower>2): Ditto.
13736 (sse4_1_round<ssescalarmodesuffix>): Extend to V8HF.
13737 (round<mode>2): Extend to V8HF/V16HF/V32HF.
13739 2023-10-15 Tobias Burnus <tobias@codesourcery.com>
13741 * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not
13742 @code; document more completely the supported Fortran sentinels.
13744 2023-10-15 Roger Sayle <roger@nextmovesoftware.com>
13746 * optabs.cc (expand_subword_shift): Call simplify_expand_binop
13747 instead of expand_binop. Optimize cases (i.e. avoid generating
13748 RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab
13749 (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1.
13751 2023-10-15 Jakub Jelinek <jakub@redhat.com>
13753 PR tree-optimization/111800
13754 * wide-int-print.h (print_dec_buf_size, print_decs_buf_size,
13755 print_decu_buf_size, print_hex_buf_size): New inline functions.
13756 * wide-int.cc (assert_deceq): Use print_dec_buf_size.
13757 (assert_hexeq): Use print_hex_buf_size.
13758 * wide-int-print.cc (print_decs): Use print_decs_buf_size.
13759 (print_decu): Use print_decu_buf_size.
13760 (print_hex): Use print_hex_buf_size.
13761 (pp_wide_int_large): Use print_dec_buf_size.
13762 * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size.
13763 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
13765 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
13766 print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument.
13768 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
13770 * combine.cc (simplify_compare_const): Fix handling of unsigned
13773 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13775 * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI.
13777 2023-10-14 Tobias Burnus <tobias@codesourcery.com>
13779 * gimplify.cc (gimplify_bind_expr): Handle Fortran's
13780 'omp allocate' for stack variables.
13782 2023-10-14 Jakub Jelinek <jakub@redhat.com>
13785 * tree-core.h (struct tree_base): Remove int_length.offset
13786 member, change type of int_length.unextended and int_length.extended
13787 from unsigned char to unsigned short.
13788 * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove.
13789 (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS,
13790 instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and
13791 TREE_INT_CST_NUNITS.
13792 * tree.cc (wide_int_to_tree_1): Don't assert
13793 TREE_INT_CST_OFFSET_NUNITS value.
13794 (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS.
13795 * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024.
13796 (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment.
13797 (trailing_wide_int_storage): Change m_len type from unsigned char *
13798 to unsigned short *.
13799 (trailing_wide_int_storage::trailing_wide_int_storage): Change second
13800 argument from unsigned char * to unsigned short *.
13801 (trailing_wide_ints): Change m_max_len type from unsigned char to
13802 unsigned short. Change m_len element type from
13803 struct{unsigned char len;} to unsigned short.
13804 (trailing_wide_ints <N>::operator []): Remove .len from m_len
13806 * value-range-storage.h (irange_storage::lengths_address): Change
13807 return type from const unsigned char * to const unsigned short *.
13808 (irange_storage::write_lengths_address): Change return type from
13809 unsigned char * to unsigned short *.
13810 * value-range-storage.cc (irange_storage::write_lengths_address):
13812 (irange_storage::lengths_address): Change return type from
13813 const unsigned char * to const unsigned short *.
13814 (write_wide_int): Change len argument type from unsigned char *&
13815 to unsigned short *&.
13816 (irange_storage::set_irange): Change len variable type from
13817 unsigned char * to unsigned short *.
13818 (read_wide_int): Change len argument type from unsigned char to
13819 unsigned short. Use trailing_wide_int_storage <unsigned short>
13820 instead of trailing_wide_int_storage and
13821 trailing_wide_int <unsigned short> instead of trailing_wide_int.
13822 (irange_storage::get_irange): Change len variable type from
13823 unsigned char * to unsigned short *.
13824 (irange_storage::size): Multiply n by sizeof (unsigned short)
13825 in len_size variable initialization.
13826 (irange_storage::dump): Change len variable type from
13827 unsigned char * to unsigned short *.
13829 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13831 * config/riscv/vector-iterators.md: Remove redundant iterators.
13833 2023-10-13 Andrew MacLeod <amacleod@redhat.com>
13835 PR tree-optimization/111622
13836 * value-relation.cc (equiv_oracle::add_partial_equiv): Do not
13837 register a partial equivalence if an operand has no uses.
13839 2023-10-13 Richard Biener <rguenther@suse.de>
13841 PR tree-optimization/111795
13842 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
13843 integer mode mask arguments.
13845 2023-10-13 Richard Biener <rguenther@suse.de>
13847 * tree-vect-slp.cc (mask_call_maps): New.
13848 (vect_get_operand_map): Handle IFN_MASK_CALL.
13849 (vect_build_slp_tree_1): Likewise.
13850 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
13853 2023-10-13 Richard Biener <rguenther@suse.de>
13855 PR tree-optimization/111779
13856 * tree-sra.cc (sra_handled_bf_read_p): New function.
13857 (build_access_from_expr_1): Handle some BIT_FIELD_REFs.
13858 (sra_modify_expr): Likewise.
13859 (make_fancy_name_1): Skip over BIT_FIELD_REF.
13861 2023-10-13 Richard Biener <rguenther@suse.de>
13863 PR tree-optimization/111773
13864 * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do
13865 not elide noreturn calls that are reflected to the IL.
13867 2023-10-13 Kito Cheng <kito.cheng@sifive.com>
13869 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump
13871 * config/riscv/riscv.h (MAX_POLY_VARIANT): New.
13873 2023-10-13 Pan Li <pan2.li@intel.com>
13875 * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New
13876 pattern for lfloor/lfloorf.
13877 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
13878 (expand_vec_lfloor): New func decl for expanding lfloor.
13879 * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl
13880 for expanding lfloor.
13882 2023-10-13 Pan Li <pan2.li@intel.com>
13884 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
13885 pattern] for lceil/lceilf.
13886 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
13887 (expand_vec_lceil): New func decl for expanding lceil.
13888 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
13889 for expanding lceil.
13891 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
13894 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
13895 code from shifts that are undefined.
13896 (can_be_built_by_li_lis_and_rldicr): Likewise.
13897 (can_be_built_by_li_and_rldic): Protect code from shifts that
13898 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
13900 2023-10-12 Alex Coplan <alex.coplan@arm.com>
13902 * reg-notes.def (NOALIAS): Correct comment.
13904 2023-10-12 Jakub Jelinek <jakub@redhat.com>
13906 PR bootstrap/111787
13907 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
13908 static data member.
13909 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
13910 (wi::ints_for): Provide separate partial specializations for
13911 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
13912 and CONST_PRECISION, rather than using
13913 int_traits <extended_tree <N> >::precision_type as the second template
13915 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
13916 static data member.
13917 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
13920 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
13922 PR middle-end/111777
13923 * doc/extend.texi: Change subsubsection to subsection for
13926 2023-10-12 Tamar Christina <tamar.christina@arm.com>
13928 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
13930 2023-10-12 Jakub Jelinek <jakub@redhat.com>
13932 * wide-int.h (widest_int_storage <N>::write_val): If l is small
13933 and there is space in u.val array, store a canary value at the
13935 (widest_int_storage <N>::set_len): Check the canary hasn't been
13938 2023-10-12 Jakub Jelinek <jakub@redhat.com>
13941 * wide-int.h: Adjust file comment.
13942 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
13943 (WIDE_INT_MAX_INL_PRECISION): Define.
13944 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
13945 is smaller than WIDE_INT_MAX_ELTS.
13946 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
13947 WIDEST_INT_MAX_PRECISION): Define.
13948 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
13949 to pass 0 as a new argument.
13950 (class widest_int_storage): Likewise.
13951 (widest_int, widest2_int): Change typedefs to use widest_int_storage
13952 rather than fixed_wide_int_storage.
13953 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
13954 (struct binary_traits): Add partial specializations for
13955 INL_CONST_PRECISION.
13956 (generic_wide_int): Add needs_write_val_arg static data member.
13957 (int_traits): Likewise.
13958 (wide_int_storage): Replace val non-static data member with a union
13959 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
13960 assignment operator and destructor. Add unsigned int argument to
13962 (wide_int_storage::wide_int_storage): Initialize precision to 0
13963 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
13964 Assert in non-default ctor T's precision_type is not
13965 INL_CONST_PRECISION and allocate u.valp for large precision. Add
13967 (wide_int_storage::~wide_int_storage): New.
13968 (wide_int_storage::operator=): Add copy assignment operator. In
13969 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
13970 assert ctor T's precision_type is not INL_CONST_PRECISION and
13971 if precision changes, deallocate and/or allocate u.valp.
13972 (wide_int_storage::get_val): Return u.valp rather than u.val for
13974 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
13976 (wide_int_storage::set_len): Use write_val instead of writing val
13978 (wide_int_storage::from, wide_int_storage::from_array): Adjust
13980 (wide_int_storage::create): Allocate u.valp for large precisions.
13981 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
13982 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
13984 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
13985 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
13986 Adjust write_val callers.
13987 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
13988 (WIDEST_INT): Define.
13989 (widest_int_storage): New template class.
13990 (wi::int_traits <widest_int_storage>): New.
13991 (trailing_wide_int_storage::write_val): Add unused unsigned int
13993 (wi::get_binary_precision): Use
13994 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
13995 rather than get_precision on get_binary_result.
13996 (wi::copy): Adjust write_val callers. Don't call set_len if
13997 needs_write_val_arg.
13998 (wi::bit_not): If result.needs_write_val_arg, call write_val
13999 again with upper bound estimate of len.
14000 (wi::sext, wi::zext, wi::set_bit): Likewise.
14001 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
14002 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
14003 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
14004 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
14005 wi::lshift, wi::lrshift, wi::arshift): Likewise.
14006 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
14008 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
14009 generic_wide_int, instead add functions and templates for each
14010 storage of generic_wide_int. Make functions for
14011 generic_wide_int <wide_int_storage> and templates for
14012 generic_wide_int <widest_int_storage <N>> deleted.
14013 (wi::mask, wi::shifted_mask): Adjust write_val calls.
14014 * wide-int.cc (zeros): Decrease array size to 1.
14015 (BLOCKS_NEEDED): Use CEIL.
14016 (canonize): Use HOST_WIDE_INT_M1.
14017 (wi::from_buffer): Pass 0 to write_val.
14018 (wi::to_mpz): Use CEIL.
14019 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
14020 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
14021 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
14022 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
14023 above WIDE_INT_MAX_INL_PRECISION estimate precision from
14024 lengths of operands. Use XALLOCAVEC allocated buffers for
14025 prec above WIDE_INT_MAX_INL_PRECISION.
14026 (wi::divmod_internal): Likewise.
14027 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
14028 it from xlen and skip.
14029 (rshift_large_common): Remove xprecision argument, add len
14030 argument with len computed in caller. Don't return anything.
14031 (wi::lrshift_large, wi::arshift_large): Compute len here
14032 and pass it to rshift_large_common, for lengths above
14033 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
14034 (assert_deceq, assert_hexeq): For lengths above
14035 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
14036 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
14037 WIDE_INT_MAX_PRECISION.
14038 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
14039 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
14040 * wide-int-print.cc (print_decs, print_decu, print_hex): For
14041 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
14042 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
14043 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
14044 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
14045 WIDE_INT_MAX_PRECISION.
14046 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
14047 instead of hard coded CONST_PRECISION.
14048 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
14049 WIDE_INT_MAX_PRECISION.
14050 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
14051 than WIDE_INT_MAX_PRECISION.
14052 (wi::ints_for::zero): Use
14053 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
14054 wi::CONST_PRECISION.
14055 * tree.cc (build_replicated_int_cst): Formatting fix. Use
14056 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
14057 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
14058 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
14059 * double-int.h (wi::int_traits <double_int>::precision_type): Change
14060 to INL_CONST_PRECISION from CONST_PRECISION.
14061 * poly-int.h (struct poly_coeff_traits): Add partial specialization
14062 for wi::INL_CONST_PRECISION.
14063 * cfgloop.h (bound_wide_int): New typedef.
14064 (struct nb_iter_bound): Change bound type from widest_int to
14066 (struct loop): Change nb_iterations_upper_bound,
14067 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
14068 widest_int to bound_wide_int.
14069 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
14070 of i_bound is too large for bound_wide_int. Adjustments for the
14071 widest_int to bound_wide_int type change in non-static data members.
14072 (get_estimated_loop_iterations, get_max_loop_iterations,
14073 get_likely_max_loop_iterations): Adjustments for the widest_int to
14074 bound_wide_int type change in non-static data members.
14075 * tree-vect-loop.cc (vect_transform_loop): Likewise.
14076 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
14077 XALLOCAVEC allocated buffer for i_bound len above
14078 WIDE_INT_MAX_INL_ELTS.
14079 (record_estimate): Return early if wi::min_precision of i_bound is too
14080 large for bound_wide_int. Adjustments for the widest_int to
14081 bound_wide_int type change in non-static data members.
14082 (wide_int_cmp): Use bound_wide_int instead of widest_int.
14083 (bound_index): Use bound_wide_int instead of widest_int.
14084 (discover_iteration_bound_by_body_walk): Likewise. Use
14085 widest_int::from to convert it to widest_int when passed to
14086 record_niter_bound.
14087 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
14088 widest_int when passed to record_niter_bound.
14089 (estimate_numbers_of_iteration): Don't record upper bound if
14090 loop->nb_iterations has too large precision for bound_wide_int.
14091 (n_of_executions_at_most): Use widest_int::from.
14092 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
14093 the widest_int to bound_wide_int changes.
14094 * match.pd (fold_sign_changed_comparison simplification): Use
14095 wide_int::from on wi::to_wide instead of wi::to_widest.
14096 * value-range.h (irange::maybe_resize): Avoid using memcpy on
14097 non-trivially copyable elements.
14098 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
14099 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
14100 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
14101 Use wide_int::from on wi::to_wide instead of wi::to_widest.
14102 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
14103 before calling wi::udiv_trunc.
14104 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
14105 bound_wide_int type change in non-static data members.
14106 * lto-streamer-in.cc (input_cfg): Likewise.
14107 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
14108 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
14109 XALLOCAVEC allocated buffer. Formatting fix.
14110 * data-streamer-in.cc (streamer_read_wide_int,
14111 streamer_read_widest_int): Likewise.
14112 * tree-affine.cc (aff_combination_expand): Use placement new to
14113 construct name_expansion.
14114 (free_name_expansion): Destruct name_expansion.
14115 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
14116 index type from widest_int to offset_int.
14117 (class incr_info_d): Change incr type from widest_int to offset_int.
14118 (alloc_cand_and_find_basis, backtrace_base_for_ref,
14119 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
14120 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
14121 slsr_process_add, cand_abs_increment, replace_mult_candidate,
14122 replace_unconditional_candidate, incr_vec_index,
14123 create_add_on_incoming_edge, create_phi_basis_1,
14124 replace_conditional_candidate, record_increment,
14125 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
14126 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
14127 nearest_common_dominator_for_cands, insert_initializers,
14128 all_phi_incrs_profitable_1, replace_one_candidate,
14129 replace_profitable_candidates): Use offset_int rather than widest_int
14130 and wi::to_offset rather than wi::to_widest.
14131 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
14132 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
14134 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
14135 to construct tree_niter_desc and destruct it on failure.
14136 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
14137 * gengtype.cc (main): Remove widest_int handling.
14138 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
14139 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
14140 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
14141 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
14142 assert get_len () fits into it.
14143 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
14144 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
14146 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
14147 wide_int::from on wi::to_wide instead of wi::to_widest.
14148 * omp-general.cc (score_wide_int): New typedef.
14149 (omp_context_compute_score): Use score_wide_int instead of widest_int
14150 and adjust for those changes.
14151 (struct omp_declare_variant_entry): Change score and
14152 score_in_declare_simd_clone non-static data member type from widest_int
14154 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
14155 score_wide_int instead of widest_int and adjust for those changes.
14156 (omp_lto_output_declare_variant_alt): Likewise.
14157 (omp_lto_input_declare_variant_alt): Likewise.
14158 * godump.cc (go_output_typedef): Assert get_len () is smaller than
14159 WIDE_INT_MAX_INL_ELTS.
14161 2023-10-12 Pan Li <pan2.li@intel.com>
14163 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
14164 pattern for lround/lroundf.
14165 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
14166 (expand_vec_lround): New func decl for expanding lround.
14167 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
14168 for expanding lround.
14170 2023-10-12 Jakub Jelinek <jakub@redhat.com>
14172 * dwarf2out.h (wide_int_ptr): Remove.
14173 (dw_wide_int_ptr): New typedef.
14174 (struct dw_val_node): Change type of val_wide from wide_int_ptr
14175 to dw_wide_int_ptr.
14176 (struct dw_wide_int): New type.
14177 (dw_wide_int::elt): New method.
14178 (dw_wide_int::operator ==): Likewise.
14179 * dwarf2out.cc (get_full_len): Change argument type to
14180 const dw_wide_int & from const wide_int &. Use CEIL. Call
14181 get_precision method instead of calling wi::get_precision.
14182 (alloc_dw_wide_int): New function.
14183 (add_AT_wide): Change w argument type to const wide_int_ref &
14184 from const wide_int &. Use alloc_dw_wide_int.
14185 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
14186 (insert_wide_int): Change val argument type to const wide_int_ref &
14187 from const wide_int &.
14188 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
14189 add_AT_wide instead of using a temporary variable.
14191 2023-10-12 Richard Biener <rguenther@suse.de>
14193 PR tree-optimization/111764
14194 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
14195 to allow x + x via special-casing of assigns.
14197 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
14199 * common/config/i386/cpuinfo.h (get_available_features):
14201 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
14202 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
14203 (ix86_handle_option): Handle -musermsr.
14204 * common/config/i386/i386-cpuinfo.h (enum processor_features):
14205 Add FEATURE_USER_MSR.
14206 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
14207 * config.gcc: Add usermsrintrin.h
14208 * config/i386/cpuid.h (bit_USER_MSR): New.
14209 * config/i386/i386-builtin-types.def:
14210 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
14211 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
14212 Add __builtin_urdmsr and __builtin_uwrmsr.
14213 * config/i386/i386-builtins.h (ix86_builtins):
14214 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
14215 * config/i386/i386-c.cc (ix86_target_macros_internal):
14216 Define __USER_MSR__.
14217 * config/i386/i386-expand.cc (ix86_expand_builtin):
14218 Handle new builtins.
14219 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
14220 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
14222 * config/i386/i386.md (urdmsr): New define_insn.
14224 * config/i386/i386.opt: Add option -musermsr.
14225 * config/i386/x86gprintrin.h: Include usermsrintrin.h
14226 * doc/extend.texi: Document usermsr.
14227 * doc/invoke.texi: Document -musermsr.
14228 * doc/sourcebuild.texi: Document target usermsr.
14229 * config/i386/usermsrintrin.h: New file.
14231 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
14233 * config.gcc: Add loongarch-driver.h to tm_files.
14234 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
14235 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
14236 instead of $(TM_H) for building generator programs.
14238 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14241 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
14242 instruction emission and incorporate to stack_protect_set<mode>.
14243 (stack_protect_setdi): Rename to ...
14244 (stack_protect_set<mode>): ... this, adjust constraint.
14245 (stack_protect_testsi): Support prefixed instruction emission and
14246 incorporate to stack_protect_test<mode>.
14247 (stack_protect_testdi): Rename to ...
14248 (stack_protect_test<mode>): ... this, adjust constraint.
14250 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14252 * tree-vect-stmts.cc (vectorizable_store): Consider generated
14253 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
14256 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14258 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
14259 (vectorizable_store): Adjust the costing for the remaining memory
14260 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
14262 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14264 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
14265 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
14267 (vectorizable_store): Adjust the cost handling on
14268 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
14270 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14272 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
14273 get VMAT_LOAD_STORE_LANES.
14274 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
14275 without calling vect_model_store_cost. Factor out new lambda function
14276 update_prologue_cost.
14278 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14280 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
14281 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
14283 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
14284 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
14286 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14288 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
14289 vectorizable_scan_store without calling vect_model_store_cost
14292 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14294 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
14295 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
14296 handlings and the related parameter gs_info.
14297 (vect_build_scatter_store_calls): Add the handlings on costing with
14298 one more argument cost_vec.
14299 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
14300 without calling vect_model_store_cost any more.
14302 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14304 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
14305 to vect_model_store_cost down to some different transform paths
14306 according to the handlings of different vect_memory_access_types
14307 or some special handling need.
14309 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14311 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
14312 vector store for some case of VMAT_ELEMENTWISE is supported.
14314 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
14315 Hu Lin1 <lin1.hu@intel.com>
14316 Hongyu Wang <hongyu.wang@intel.com>
14318 * config/i386/i386.cc (gen_push2): New function to emit push2
14319 and adjust cfa offset.
14320 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
14321 determine whether push2/pop2 can be used.
14322 (ix86_compute_frame_layout): Adjust preferred stack boundary
14323 and stack alignment needed for push2/pop2.
14324 (ix86_emit_save_regs): Emit push2 when available.
14325 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
14326 and adjust cfa info.
14327 (ix86_emit_restore_regs_using_pop2): New function to loop
14328 through the saved regs and call above.
14329 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
14330 when push2pop2 available.
14331 * config/i386/i386.md (push2_di): New pattern for push2.
14332 (pop2_di): Likewise for pop2.
14334 2023-10-12 Pan Li <pan2.li@intel.com>
14336 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
14337 (lrint<mode><v_i_l_ll_convert>2): Rename to.
14338 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
14340 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
14342 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
14344 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
14346 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
14347 pseudo op instead of a "call" pseudo op.
14349 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
14351 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
14353 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
14354 (riscv_subset_list::clone): Ditto.
14355 (riscv_subset_list::parse_single_ext): Ditto.
14356 (riscv_subset_list::set_loc): Ditto.
14357 (riscv_set_arch_by_subset_list): Ditto.
14358 * common/config/riscv/riscv-common.cc
14359 (riscv_subset_list::parse_single_std_ext): New.
14360 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
14361 (riscv_subset_list::clone): Ditto.
14362 (riscv_subset_list::parse_single_ext): Ditto.
14363 (riscv_subset_list::set_loc): Ditto.
14364 (riscv_set_arch_by_subset_list): Ditto.
14366 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
14368 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
14369 from argument rather than get setting from global setting.
14370 (riscv_override_options_internal): New, splited from
14371 riscv_override_options, also take a gcc_options argument.
14372 (riscv_option_override): Splited most part to
14373 riscv_override_options_internal.
14375 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
14377 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
14378 TARGET_<NAME>_OPTS_P.
14379 (InverseMask): Ditto.
14380 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
14381 TARGET_<NAME>_OPTS_P macro.
14382 (InverseMask): Ditto.
14384 2023-10-11 Andrew Pinski <pinskia@gmail.com>
14386 PR tree-optimization/111282
14387 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
14388 `a & ((~a) ^ b)`): New patterns.
14390 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
14392 * common/config/riscv/riscv-common.cc: Add the XCValu
14394 * config/riscv/constraints.md: Add builtins for the XCValu
14396 * config/riscv/predicates.md (immediate_register_operand):
14398 * config/riscv/corev.def: Likewise.
14399 * config/riscv/corev.md: Likewise.
14400 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
14401 (RISCV_ATYPE_UHI): Likewise.
14402 * config/riscv/riscv-ftypes.def: Likewise.
14403 * config/riscv/riscv.opt: Likewise.
14404 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
14405 * doc/extend.texi: Add XCValu documentation.
14406 * doc/sourcebuild.texi: Likewise.
14408 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
14410 * common/config/riscv/riscv-common.cc: Add XCVmac.
14411 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
14412 * config/riscv/riscv-builtins.cc: Likewise.
14413 * config/riscv/riscv.md: Likewise.
14414 * config/riscv/riscv.opt: Likewise.
14415 * doc/extend.texi: Add XCVmac builtin documentation.
14416 * doc/sourcebuild.texi: Likewise.
14417 * config/riscv/corev.def: New file.
14418 * config/riscv/corev.md: New file.
14420 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14422 * config/riscv/autovec.md: Fix index bug.
14423 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
14424 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
14425 (gather_scatter_valid_offset_mode_p): New function.
14427 2023-10-11 Pan Li <pan2.li@intel.com>
14429 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
14431 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
14432 for expanding lint.
14433 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
14435 (expand_vec_lrint): New function impl for expanding lint.
14436 * config/riscv/vector-iterators.md: New mode attr and iterator.
14438 2023-10-11 Richard Biener <rguenther@suse.de>
14439 Jakub Jelinek <jakub@redhat.com>
14441 PR tree-optimization/111519
14442 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
14443 argument and pass it through to recursive calls and
14444 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
14445 change stmt for gimple_assign_single_p statements for which we don't
14447 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
14448 it through to recursive calls and count_nonzero_bytes calls. Don't
14449 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
14450 shadow the stmt argument.
14452 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
14454 PR middle-end/101955
14455 PR tree-optimization/106245
14456 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
14457 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
14459 2023-10-11 liuhongt <hongtao.liu@intel.com>
14462 * config/i386/mmx.md (divv4hf3): Refine predicate of
14463 operands[2] with register_operand.
14465 2023-10-10 Andrew Waterman <andrew@sifive.com>
14466 Philipp Tomsich <philipp.tomsich@vrull.eu>
14467 Jeff Law <jlaw@ventanamicro.com>
14469 * config/riscv/riscv.cc (struct machine_function): Track if a
14470 far-branch/jump is used within a function (and $ra needs to be
14472 (riscv_print_operand): Implement 'N' (inverse integer branch).
14473 (riscv_far_jump_used_p): Implement.
14474 (riscv_save_return_addr_reg_p): New function.
14475 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
14476 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
14477 (CALL_USED_REGISTERS): Update $ra.
14478 * config/riscv/riscv.md: Add new types "ret" and "jalr".
14479 (length attribute): Handle long conditional and unconditional
14481 (conditional branch pattern): Handle case where jump can not
14482 reach the intended target.
14483 (indirect_jump, tablejump): Use new "jalr" type.
14484 (simple_return): Use new "ret" type.
14485 (simple_return_internal, eh_return_internal): Likewise.
14486 (gpr_restore_return, riscv_mret): Likewise.
14487 (riscv_uret, riscv_sret): Likewise.
14488 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
14490 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
14492 2023-10-10 Andrew Pinski <pinskia@gmail.com>
14494 PR tree-optimization/111679
14495 * match.pd (`a | ((~a) ^ b)`): New pattern.
14497 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14500 * config/riscv/autovec.md: Add VLS BOOL modes.
14502 2023-10-10 Richard Biener <rguenther@suse.de>
14504 PR tree-optimization/111751
14505 * fold-const.cc (fold_view_convert_expr): Up the buffer size
14507 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
14508 constants, giving up when re-interpretation to the target type
14511 2023-10-10 Richard Biener <rguenther@suse.de>
14513 PR tree-optimization/111751
14514 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
14515 BLKmode result from the padding bits check.
14517 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
14519 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
14521 * config/arc/arc.md (addsi_compare): Make pattern canonical.
14522 (addsi_compare_2): Fix identation, constraint letters.
14523 (addsi_compare_3): Likewise.
14525 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
14527 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
14528 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
14529 when scaling loop profile
14531 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
14533 PR tree-optimization/111694
14534 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
14536 * value-relation.cc (adjust_equivalence_range): New.
14537 * value-relation.h (adjust_equivalence_range): New prototype.
14539 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
14541 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
14542 not call get_identity_relation.
14543 (gori_compute::compute_operand2_range): Ditto.
14544 * value-relation.cc (get_identity_relation): Remove.
14545 * value-relation.h (get_identity_relation): Remove protyotype.
14547 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
14549 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
14550 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
14552 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
14554 (TARGET_SCHED_ADJUST_COST): Define.
14555 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
14556 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
14557 * config/riscv/generic-ooo.md: New file.
14558 * config/riscv/vector.md: Add vsetvl_pre.
14560 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14562 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
14563 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
14564 * config/riscv/vector.md (movmisalign<mode>): New pattern.
14566 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
14568 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
14569 directives for store-pair instruction.
14571 2023-10-09 Richard Biener <rguenther@suse.de>
14573 PR tree-optimization/111715
14574 * alias.cc (reference_alias_ptr_type_1): When we have
14575 a type-punning ref at the base search for the access
14576 path part that's still semantically valid.
14578 2023-10-09 Pan Li <pan2.li@intel.com>
14580 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
14582 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
14584 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
14586 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
14587 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
14589 (ix86_split_lshr): Likewise, split shifts by one bit into
14590 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
14591 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
14592 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
14593 (rcrdi2): New define_insn for rcrq.
14594 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
14595 set the carry flag from the least significant bit, modelled using
14597 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
14598 controlling use of rcr 1 vs. shrd, which is significantly faster on
14601 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14603 * config/i386/i386.opt: Allow -mno-evex512.
14605 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14606 Hu, Lin1 <lin1.hu@intel.com>
14608 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
14611 (VFH_AVX512VL): Ditto.
14613 (VHF_AVX512VL): Ditto.
14614 (VI2H_AVX512VL): Ditto.
14615 (VI2F_256_512): Ditto.
14616 (VF48_I1248): Remove unused iterator.
14617 (VF48H_AVX512VL): Add TARGET_EVEX512.
14618 (VF_AVX512): Remove unused iterator.
14619 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
14620 (REDUC_SMINMAX_MODE): Ditto.
14622 (VFH_SF_AVX512VL): Ditto.
14623 (VEC_PERM_AVX2): Ditto.
14625 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14626 Hu, Lin1 <lin1.hu@intel.com>
14628 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
14630 (VI1_AVX512F): Ditto.
14631 (VI1_AVX512VNNI): Ditto.
14632 (VI1_AVX512VL_F): Ditto.
14633 (VI12_VI48F_AVX512VL): Ditto.
14634 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
14635 (sdot_prod<mode>): Ditto.
14636 (VEC_PERM_AVX2): Ditto.
14639 (vpmadd52<vpmadd52type>v8di): Ditto.
14640 (usdot_prod<mode>): Ditto.
14641 (vpdpbusd_v16si): Ditto.
14642 (vpdpbusds_v16si): Ditto.
14643 (vpdpwssd_v16si): Ditto.
14644 (vpdpwssds_v16si): Ditto.
14645 (VI48_AVX512VP2VL): Ditto.
14646 (avx512vp2intersect_2intersectv16si): Ditto.
14647 (VF_AVX512BF16VL): Ditto.
14648 (VF1_AVX512_256): Ditto.
14650 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14652 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
14653 Make sure there is EVEX512 enabled.
14654 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
14655 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
14656 when !TARGET_EVEX512.
14657 * config/i386/i386.md (avx512bw_512): New.
14658 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
14659 (*zero_extendsidi2): Change isa to avx512bw_512.
14662 (*andn<mode>_1): Change isa to kmov_isa.
14663 (*<code><mode>_1): Ditto.
14664 (*notxor<mode>_1): Ditto.
14665 (*one_cmpl<mode>2_1): Ditto.
14666 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
14667 (*ashl<mode>3_1): Change isa to kmov_isa.
14668 (*lshr<mode>3_1): Ditto.
14669 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
14670 (VI1248_AVX512VLBW): Ditto.
14671 (VHFBF_AVX512VL): Ditto.
14675 (VI1_AVX512): Ditto.
14676 (VI12_256_512_AVX512VL): Ditto.
14677 (VI2_AVX2_AVX512BW): Ditto.
14678 (VI2_AVX512VNNIBW): Ditto.
14679 (VI2_AVX512VL): Ditto.
14680 (VI2HFBF_AVX512VL): Ditto.
14681 (VI8_AVX2_AVX512BW): Ditto.
14682 (VIMAX_AVX2_AVX512BW): Ditto.
14683 (VIMAX_AVX512VL): Ditto.
14684 (VI12_AVX2_AVX512BW): Ditto.
14685 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
14686 (VI248_AVX512VL): Ditto.
14687 (VI248_AVX512VLBW): Ditto.
14688 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
14689 (VI248_AVX512BW): Ditto.
14690 (VI248_AVX512BW_AVX512VL): Ditto.
14691 (VI248_512): Ditto.
14692 (VI124_256_AVX512F_AVX512BW): Ditto.
14693 (VI_AVX512BW): Ditto.
14694 (VIHFBF_AVX512BW): Ditto.
14695 (SWI1248_AVX512BWDQ): Ditto.
14696 (SWI1248_AVX512BW): Ditto.
14697 (SWI1248_AVX512BWDQ2): Ditto.
14698 (*knotsi_1_zext): Ditto.
14699 (define_split for zero_extend + not): Ditto.
14701 (REDUC_SMINMAX_MODE): Ditto.
14702 (VEC_EXTRACT_MODE): Ditto.
14703 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
14704 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
14705 (truncv32hiv32qi2): Ditto.
14706 (avx512bw_<code>v32hiv32qi2): Ditto.
14707 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
14708 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
14709 (usadv64qi): Ditto.
14710 (VEC_PERM_AVX2): Ditto.
14711 (AVX512ZEXTMASK): Ditto.
14713 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
14714 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
14715 (avx512bw_packssdw<mask_name>): Ditto.
14716 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
14717 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
14718 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
14719 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
14720 (vec_unpacks_lo_di): Ditto.
14721 (SWI48x_MASK): New.
14722 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
14723 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
14724 (VI1248_AVX512VL_AVX512BW): Ditto.
14725 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
14726 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
14727 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
14728 (<insn>v32qiv32hi2): Ditto.
14729 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
14730 (VPERMI2): Add TARGET_EVEX512.
14733 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14735 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
14736 Add TARGET_EVEX512 for 512 bit usage.
14737 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
14738 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
14739 (VF1_128_256VL): Ditto.
14740 (VF2_AVX512VL): Ditto.
14741 (VI8_256_512): Ditto.
14742 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
14744 (AVX512_VEC): Ditto.
14745 (AVX512_VEC_2): Ditto.
14746 (VI4F_BRCST32x2): Ditto.
14747 (VI8F_BRCST64x2): Ditto.
14749 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14751 * config/i386/i386-builtins.cc
14752 (ix86_vectorize_builtin_gather): Disable 512 bit gather
14753 when !TARGET_EVEX512.
14754 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
14755 Add TARGET_EVEX512.
14756 (ix86_expand_int_sse_cmp): Ditto.
14757 (ix86_expand_vector_init_one_nonzero): Disable subroutine
14758 when !TARGET_EVEX512.
14759 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
14760 (ix86_vectorize_vec_perm_const): Disable subroutine when
14762 * config/i386/i386.cc
14763 (standard_sse_constant_p): Add TARGET_EVEX512.
14764 (standard_sse_constant_opcode): Ditto.
14765 (ix86_get_ssemov): Ditto.
14766 (ix86_legitimate_constant_p): Ditto.
14767 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
14768 when !TARGET_EVEX512.
14769 * config/i386/i386.md (avx512f_512): New.
14770 (movxi): Add TARGET_EVEX512.
14771 (*movxi_internal_avx512f): Ditto.
14772 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
14773 for alternative 13.
14774 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
14776 (*movhi_internal): Change alternative 11 to *Yv.
14777 (*movdf_internal): Change alternative 12 to Yv.
14778 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
14779 alternative 5 and 6.
14780 (*mov<mode>_internal): Change alternative 4 to Yv.
14781 (define_split for convert SF to DF): Add TARGET_EVEX512.
14782 (extendbfsf2_1): Ditto.
14783 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
14784 for 512 bit when !TARGET_EVEX512.
14785 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
14786 (V48_AVX512VL): Ditto.
14787 (V48_256_512_AVX512VL): Ditto.
14788 (V48H_AVX512VL): Ditto.
14789 (VI12_AVX512VL): Ditto.
14792 (V_256_512): Ditto.
14794 (VF1_VF2_AVX512DQ): Ditto.
14801 (VF2_512_256): Ditto.
14802 (VF2_512_256VL): Ditto.
14805 (VI48_AVX512VL): Ditto.
14806 (VI1248_AVX512VLBW): Ditto.
14807 (VF_AVX512VL): Ditto.
14808 (VFH_AVX512VL): Ditto.
14809 (VF1_AVX512VL): Ditto.
14814 (VI8_AVX512VL): Ditto.
14815 (VI2_AVX512F): Ditto.
14816 (VI4_AVX512F): Ditto.
14817 (VI4_AVX512VL): Ditto.
14818 (VI48_AVX512F_AVX512VL): Ditto.
14819 (VI8_AVX2_AVX512F): Ditto.
14820 (VI8_AVX_AVX512F): Ditto.
14823 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
14824 (VI248_AVX512VLBW): Ditto.
14825 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
14826 (VI248_AVX512BW): Ditto.
14827 (VI248_AVX512BW_AVX512VL): Ditto.
14828 (VI48_AVX512F): Ditto.
14829 (VI48_AVX_AVX512F): Ditto.
14830 (VI12_AVX_AVX512F): Ditto.
14831 (VI148_512): Ditto.
14832 (VI124_256_AVX512F_AVX512BW): Ditto.
14834 (VI_AVX512BW): Ditto.
14835 (VIHFBF_AVX512BW): Ditto.
14836 (VI4F_256_512): Ditto.
14837 (VI48F_256_512): Ditto.
14839 (VI12_VI48F_AVX512VL): Ditto.
14841 (AVX512MODE2P): Ditto.
14842 (STORENT_MODE): Ditto.
14843 (REDUC_PLUS_MODE): Ditto.
14844 (REDUC_SMINMAX_MODE): Ditto.
14845 (*andnot<mode>3): Change isa attribute to avx512f_512.
14846 (*andnot<mode>3): Ditto.
14847 (<code><mode>3): Ditto.
14848 (<code>tf3): Ditto.
14849 (FMAMODEM): Add TARGET_EVEX512.
14850 (FMAMODE_AVX512): Ditto.
14851 (VFH_SF_AVX512VL): Ditto.
14852 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
14853 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
14855 (avx512f_cvtdq2pd512_2): Ditto.
14856 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
14857 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
14859 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
14860 (vec_unpacks_lo_v16sf): Ditto.
14861 (vec_unpacks_hi_v16sf): Ditto.
14862 (vec_unpacks_float_hi_v16si): Ditto.
14863 (vec_unpacks_float_lo_v16si): Ditto.
14864 (vec_unpacku_float_hi_v16si): Ditto.
14865 (vec_unpacku_float_lo_v16si): Ditto.
14866 (vec_pack_sfix_trunc_v8df): Ditto.
14867 (avx512f_vec_pack_sfix_v8df): Ditto.
14868 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
14869 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
14870 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
14871 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
14872 (AVX512_VEC): Ditto.
14873 (AVX512_VEC_2): Ditto.
14874 (vec_extract_lo_v64qi): Ditto.
14875 (vec_extract_hi_v64qi): Ditto.
14876 (VEC_EXTRACT_MODE): Ditto.
14877 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
14878 (avx512f_movddup512<mask_name>): Ditto.
14879 (avx512f_unpcklpd512<mask_name>): Ditto.
14880 (*<avx512>_vternlog<mode>_all): Ditto.
14881 (*<avx512>_vpternlog<mode>_1): Ditto.
14882 (*<avx512>_vpternlog<mode>_2): Ditto.
14883 (*<avx512>_vpternlog<mode>_3): Ditto.
14884 (avx512f_shufps512_mask): Ditto.
14885 (avx512f_shufps512_1<mask_name>): Ditto.
14886 (avx512f_shufpd512_mask): Ditto.
14887 (avx512f_shufpd512_1<mask_name>): Ditto.
14888 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
14889 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
14890 (vec_dupv2df<mask_name>): Ditto.
14891 (trunc<pmov_src_lower><mode>2): Ditto.
14892 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
14893 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
14894 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
14895 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
14896 (truncv8div8qi2): Ditto.
14897 (avx512f_<code>v8div16qi2): Ditto.
14898 (*avx512f_<code>v8div16qi2_store_1): Ditto.
14899 (*avx512f_<code>v8div16qi2_store_2): Ditto.
14900 (avx512f_<code>v8div16qi2_mask): Ditto.
14901 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
14902 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
14903 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
14904 (vec_widen_umult_even_v16si<mask_name>): Ditto.
14905 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
14906 (vec_widen_smult_even_v16si<mask_name>): Ditto.
14907 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
14908 (VEC_PERM_AVX2): Ditto.
14909 (one_cmpl<mode>2): Ditto.
14910 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
14911 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
14912 (define_split to xor): Ditto.
14913 (*andnot<mode>3): Ditto.
14914 (define_split for ior): Ditto.
14915 (*iornot<mode>3): Ditto.
14916 (*xnor<mode>3): Ditto.
14917 (*<nlogic><mode>3): Ditto.
14918 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
14919 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
14920 (avx512f_pshufdv3_mask): Ditto.
14921 (avx512f_pshufd_1<mask_name>): Ditto.
14922 (*vec_extractv4ti): Ditto.
14923 (VEXTRACTI128_MODE): Ditto.
14924 (define_split to vec_extract): Ditto.
14925 (VI1248_AVX512VL_AVX512BW): Ditto.
14926 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
14927 (<insn>v16qiv16si2): Ditto.
14928 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
14929 (<insn>v16hiv16si2): Ditto.
14930 (avx512f_zero_extendv16hiv16si2_1): Ditto.
14931 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
14932 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
14933 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
14934 (<insn>v8qiv8di2): Ditto.
14935 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
14936 (<insn>v8hiv8di2): Ditto.
14937 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
14938 (*avx512f_zero_extendv8siv8di2_1): Ditto.
14939 (*avx512f_zero_extendv8siv8di2_2): Ditto.
14940 (<insn>v8siv8di2): Ditto.
14941 (avx512f_roundps512_sfix): Ditto.
14942 (vashrv8di3): Ditto.
14943 (vashrv16si3): Ditto.
14944 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
14945 (vec_dupv4sf): Add TARGET_EVEX512.
14946 (*vec_dupv4si): Ditto.
14947 (*vec_dupv2di): Ditto.
14948 (vec_dup<mode>): Change isa attribute to avx512f_512.
14949 (VPERMI2): Add TARGET_EVEX512.
14951 (VEC_INIT_MODE): Ditto.
14952 (VEC_INIT_HALF_MODE): Ditto.
14953 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
14955 (avx512f_vcvtps2ph512_mask_sae): Ditto.
14956 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
14958 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
14959 (INT_BROADCAST_MODE): Ditto.
14961 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14963 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
14964 Disable zmm broadcast for !TARGET_EVEX512.
14965 * config/i386/i386-options.cc (ix86_option_override_internal):
14966 Do not use PVW_512 when no-evex512.
14967 (ix86_simd_clone_adjust): Add evex512 target into string.
14968 * config/i386/i386.cc (type_natural_mode): Report ABI warning
14969 when using zmm register w/o evex512.
14970 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
14971 (ix86_hard_regno_mode_ok): Ditto.
14972 (ix86_set_reg_reg_cost): Ditto.
14973 (ix86_rtx_costs): Ditto.
14974 (ix86_vector_mode_supported_p): Ditto.
14975 (ix86_preferred_simd_mode): Ditto.
14976 (ix86_get_mask_mode): Ditto.
14977 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
14978 libmvec call when !TARGET_EVEX512.
14979 (ix86_simd_clone_usable): Ditto.
14980 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
14981 when !TARGET_EVEX512
14982 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
14983 (STORE_MAX_PIECES): Ditto.
14985 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14987 * config/i386/i386-builtin.def (BDESC): Add
14988 OPTION_MASK_ISA2_EVEX512.
14990 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14992 * config/i386/i386-builtin.def (BDESC): Add
14993 OPTION_MASK_ISA2_EVEX512.
14995 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14997 * config/i386/i386-builtin.def (BDESC): Add
14998 OPTION_MASK_ISA2_EVEX512.
15000 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15002 * config/i386/i386-builtin.def (BDESC): Add
15003 OPTION_MASK_ISA2_EVEX512.
15005 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15007 * config/i386/i386-builtin.def (BDESC): Add
15008 OPTION_MASK_ISA2_EVEX512.
15009 * config/i386/i386-builtins.cc
15010 (ix86_init_mmx_sse_builtins): Ditto.
15012 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15013 Hu, Lin1 <lin1.hu@intel.com>
15015 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
15018 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15020 * config.gcc: Add avx512bitalgvlintrin.h.
15021 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
15023 * config/i386/avx5124vnniwintrin.h: Ditto.
15024 * config/i386/avx512bf16intrin.h: Ditto.
15025 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
15026 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
15027 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
15029 * config/i386/avx512ifmaintrin.h: Ditto
15030 * config/i386/avx512pfintrin.h: Ditto
15031 * config/i386/avx512vbmi2intrin.h: Ditto.
15032 * config/i386/avx512vbmiintrin.h: Ditto.
15033 * config/i386/avx512vnniintrin.h: Ditto.
15034 * config/i386/avx512vp2intersectintrin.h: Ditto.
15035 * config/i386/avx512vpopcntdqintrin.h: Ditto.
15036 * config/i386/gfniintrin.h: Ditto.
15037 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
15038 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
15039 * config/i386/vpclmulqdqintrin.h: Ditto.
15040 * config/i386/avx512bitalgvlintrin.h: New.
15042 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15044 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
15047 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15049 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
15052 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15054 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
15056 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15058 * common/config/i386/i386-common.cc
15059 (OPTION_MASK_ISA2_EVEX512_SET): New.
15060 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
15061 (ix86_handle_option): Handle EVEX512.
15062 * config/i386/i386-c.cc
15063 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
15064 when AVX512VL is set.
15065 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
15066 (ix86_valid_target_attribute_inner_p): Ditto.
15067 (ix86_option_override_internal): Set EVEX512 target if it is not
15068 explicitly set when AVX512 is enabled. Disable
15069 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
15070 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
15072 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
15075 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
15076 from insn condition.
15077 (lrint<mode>si2): New insn pattern for 32bit lrint.
15079 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
15082 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
15083 Enable SImode on FP registers for P7.
15084 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
15085 move between FP registers. Set attribute isa of stfiwx to "*"
15086 and attribute of stxsiwx to "p7".
15088 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
15090 * config/s390/s390.md: Make use of new copysign RTL.
15092 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
15094 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
15095 with "jm" for alternative 0 and 1 of operand 2.
15096 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
15097 "ja" for alternative 0 and 1 of operand2.
15099 2023-10-08 David Malcolm <dmalcolm@redhat.com>
15102 * text-art/table.cc (table::maybe_set_cell_span): New.
15103 (table::add_other_table): New.
15104 * text-art/table.h (class table::cell_placement): Add class table
15106 (table::add_rows): New.
15107 (table::add_row): Reimplement in terms of add_rows.
15108 (table::maybe_set_cell_span): New decl.
15109 (table::add_other_table): New decl.
15110 * text-art/types.h (operator+): New operator for rect + coord.
15112 2023-10-08 David Malcolm <dmalcolm@redhat.com>
15114 * genmatch.cc (main): Update for "m_" prefix of some fields of
15116 * input.cc (make_location): Update for removal of
15117 COMBINE_LOCATION_DATA.
15118 (dump_line_table_statistics): Update for "m_" prefix of some
15119 fields of line_maps.
15120 (location_with_discriminator): Update for removal of
15121 COMBINE_LOCATION_DATA.
15122 (line_table_test::line_table_test): Update for "m_" prefix of some
15123 fields of line_maps.
15124 * toplev.cc (general_init): Likewise.
15125 * tree.cc (set_block): Update for removal of
15126 COMBINE_LOCATION_DATA.
15127 (set_source_range): Likewise.
15129 2023-10-08 David Malcolm <dmalcolm@redhat.com>
15131 * input.cc (make_location): Move implementation to
15132 line_maps::make_location.
15134 2023-10-08 David Malcolm <dmalcolm@redhat.com>
15137 * input.cc (file_cache::add_file): Update leading comment to
15138 clarify that it can fail.
15139 (file_cache::lookup_or_add_file): Likewise.
15140 (file_cache::get_source_file_content): Gracefully handle
15141 lookup_or_add_file failing.
15143 2023-10-08 liuhongt <hongtao.liu@intel.com>
15145 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
15147 (ix86_build_signbit_mask): Ditto.
15148 * config/i386/mmx.md (mmxintvecmode): Ditto.
15149 (<code><mode>2): New define_expand.
15150 (*mmx_<code><mode>): New define_insn_and_split.
15151 (*mmx_nabs<mode>2): Ditto.
15152 (*mmx_andnot<mode>3): New define_insn.
15153 (<code><mode>3): Ditto.
15154 (copysign<mode>3): New define_expand.
15155 (xorsign<mode>3): Ditto.
15156 (signbit<mode>2): Ditto.
15158 2023-10-08 liuhongt <hongtao.liu@intel.com>
15160 * config/i386/mmx.md (VHF_32_64): New mode iterator.
15161 (<insn><mode>3): New define_expand, merged from ..
15162 (<insn>v4hf3): .. this and
15163 (<insn>v2hf3): .. this.
15164 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
15165 (movd_v2hf_to_sse): .. this.
15166 (<code><mode>3): New define_expand.
15168 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
15170 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
15171 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
15173 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
15175 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
15177 (can_be_built_by_li_lis_and_rldicr): New function.
15178 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
15179 can_be_built_by_li_lis_and_rldicl.
15181 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
15183 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
15185 (can_be_built_by_li_and_rotldi): Rename to ...
15186 (can_be_built_by_li_lis_and_rotldi): ... this function.
15187 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
15189 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
15191 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
15192 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
15194 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
15196 * config/riscv/linux.h: Pass the static-pie specific options to
15199 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
15201 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
15203 * config/aarch64/aarch64-tune.md: Regenerated.
15204 * doc/invoke.texi: Add command-line option for cortex-x4 core.
15206 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15207 Hongyu Wang <hongyu.wang@intel.com>
15208 Hongtao Liu <hongtao.liu@intel.com>
15210 * config/i386/constraints.md (jb): New constraint for vsib memory
15211 that does not allow gpr32.
15212 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
15213 alternative and set attr_gpr32 to 0.
15214 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
15216 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
15217 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
15218 (*rsqrtsf2_sse): Likewise.
15219 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
15220 avx/noavx and assign jr/r constraint to dest.
15221 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
15222 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
15223 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
15224 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
15225 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
15226 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
15227 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
15228 (<sse2_avx2>_pmovmskb): Likewise.
15229 (*<sse2_avx2>_pmovmskb_zext): Likewise.
15230 (*sse2_pmovmskb_ext): Likewise.
15231 (*<sse2_avx2>_pmovmskb_lt): Likewise.
15232 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
15233 (*sse2_pmovmskb_ext_lt): Likewise.
15234 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
15235 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
15236 (sse_vmrcpv4sf2): Likewise.
15237 (*sse_vmrcpv4sf2): Likewise.
15238 (rsqrt<mode>2): Likewise.
15239 (sse_vmrsqrtv4sf2): Likewise.
15240 (*sse_vmrsqrtv4sf2): Likewise.
15241 (avx_h<insn>v4df3): Likewise.
15242 (sse3_hsubv2df3): Likewise.
15243 (avx_h<insn>v8sf3): Likewise.
15244 (sse3_h<insn>v4sf3): Likewise.
15245 (<sse3>_lddqu<avxsizesuffix>): Likewise.
15246 (avx_cmp<mode>3): Likewise.
15247 (avx_vmcmp<mode>3): Likewise.
15248 (*sse2_gt<mode>3): Likewise.
15249 (sse_ldmxcsr): Likewise.
15250 (sse_stmxcsr): Likewise.
15251 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
15252 avx alternative and set attr_gpr32 to 0.
15253 (avx2_permv2ti): Likewise.
15254 (*avx_vperm2f128<mode>_full): Likewise.
15255 (*avx_vperm2f128<mode>_nozero): Likewise.
15256 (vec_set_lo_v32qi): Likewise.
15257 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
15258 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
15259 (avx_cmp<mode>3): Likewise.
15260 (avx_vmcmp<mode>3): Likewise.
15261 (*<sse>_maskcmp<mode>3_comm): Likewise.
15262 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
15264 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
15265 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
15266 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
15267 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
15268 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
15269 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
15270 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
15271 (vec_set_lo_<mode><mask_name>): Likewise.
15272 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
15273 (vec_set_hi_<mode><mask_name>): Likewise.
15274 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
15275 (vec_set_hi_<mode>): Likewise.
15276 (vec_set_lo_<mode>): Likewise.
15277 (avx2_set_hi_v32qi): Likewise.
15279 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15280 Hongyu Wang <hongyu.wang@intel.com>
15281 Hongtao Liu <hongtao.liu@intel.com>
15283 * config/i386/i386.md (*movhi_internal): Split out non-gpr
15284 supported pextrw with mem constraint to avx/noavx alternatives,
15285 set jm and attr gpr32 0 to the noavx alternative.
15286 (*mov<mode>_internal): Likewise.
15287 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
15288 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
15289 (mmx_pshufbv4qi3): Likewise.
15290 (*mmx_pinsrd): Likewise.
15291 (*mmx_pinsrb): Likewise.
15292 (*pinsrb): Likewise.
15293 (mmx_pshufbv8qi3): Likewise.
15294 (mmx_pshufbv4qi3): Likewise.
15295 (@sse4_1_insertps_<mode>): Likewise.
15296 (*mmx_pextrw): Split altrenatives and map non-EGPR
15297 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
15298 (*movv2qi_internal): Likewise.
15299 (*pextrw): Likewise.
15300 (*mmx_pextrb): Likewise.
15301 (*mmx_pextrb_zext): Likewise.
15302 (*pextrb): Likewise.
15303 (*pextrb_zext): Likewise.
15304 (vec_extractv2si_1): Likewise.
15305 (vec_extractv2si_1_zext): Likewise.
15306 * config/i386/sse.md: (vi128_h_r): New mode attr for
15307 pinsr{bw}/pextr{bw} with reg operand.
15308 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
15309 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
15310 (*vec_extract<mode>): Likewise.
15311 (*vec_extract<mode>): Likewise for HFBF pattern.
15312 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
15313 (*vec_extractv4si_1): Likewise.
15314 (*vec_extractv4si_zext): Likewise.
15315 (*vec_extractv2di_1): Likewise.
15316 (*vec_concatv2si_sse4_1): Likewise.
15317 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
15318 (vec_concatv2di): Likewise.
15319 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
15320 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
15321 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
15322 %v for avx/noavx alternatives if necessary.
15323 (*vec_concatv2sf_sse4_1): Likewise.
15324 (*sse4_1_extractps): Likewise.
15325 (vec_set<mode>_0): Likewise for VI4F_128.
15326 (*vec_setv4sf_sse4_1): Likewise.
15327 (@sse4_1_insertps<mode>): Likewise.
15328 (ssse3_pmaddubsw128): Likewise.
15329 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
15330 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
15331 (<ssse3_avx2>_palignr<mode>): Likewise.
15332 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
15333 (<sse4_1_avx2>_mpsadbw): Likewise.
15334 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
15335 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
15336 (*sse4_1_<code><mode>3<mask_name>): Likewise.
15337 (*<code>v8hi3): Likewise.
15338 (*<code>v16qi3): Likewise.
15339 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
15340 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
15341 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
15342 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
15343 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
15344 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
15345 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
15346 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
15347 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
15348 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
15349 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
15350 (aesdec): Likewise.
15351 (aesdeclast): Likewise.
15352 (aesenc): Likewise.
15353 (aesenclast): Likewise.
15354 (pclmulqdq): Likewise.
15355 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
15356 (vgf2p8affineqb_<mode><mask_name>): Likewise.
15357 (vgf2p8mulb_<mode><mask_name>): Likewise.
15359 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15360 Hongyu Wang <hongyu.wang@intel.com>
15361 Hongtao Liu <hongtao.liu@intel.com>
15363 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
15365 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
15367 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
15368 and constraint jm to all non-evex alternatives, adjust
15369 alternative outputs if evex reg is mentioned.
15370 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
15371 and constraint jm/ja to all non-evex alternatives.
15372 (ptesttf2): Likewise.
15373 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
15374 (sse4_1_round<ssescalarmodesuffix>): Likewise.
15375 (sse4_2_pcmpestri): Likewise.
15376 (sse4_2_pcmpestrm): Likewise.
15377 (sse4_2_pcmpestr_cconly): Likewise.
15378 (sse4_2_pcmpistr): Likewise.
15379 (sse4_2_pcmpistri): Likewise.
15380 (sse4_2_pcmpistrm): Likewise.
15381 (sse4_2_pcmpistr_cconly): Likewise.
15382 (aesimc): Likewise.
15383 (aeskeygenassist): Likewise.
15385 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15386 Hongyu Wang <hongyu.wang@intel.com>
15387 Hongtao Liu <hongtao.liu@intel.com>
15389 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
15390 attr gpr32 0 and constraint jm/ja to all mem alternatives.
15391 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
15392 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
15393 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
15394 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
15395 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
15396 (<ssse3_avx2>_psign<mode>3): Likewise.
15397 (ssse3_psign<mode>3): Likewise.
15398 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
15399 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
15400 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
15401 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
15402 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
15403 (<sse4_1_avx2>_mpsadbw): Likewise.
15404 (<sse4_1_avx2>_pblendvb): Likewise.
15405 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
15406 (sse4_1_pblend<ssemodesuffix>): Likewise.
15407 (*avx2_pblend<ssemodesuffix>): Likewise.
15408 (avx2_permv2ti): Likewise.
15409 (*avx_vperm2f128<mode>_nozero): Likewise.
15410 (*avx2_eq<mode>3): Likewise.
15411 (*sse4_1_eqv2di3): Likewise.
15412 (sse4_2_gtv2di3): Likewise.
15413 (avx2_gt<mode>3): Likewise.
15415 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15416 Hongyu Wang <hongyu.wang@intel.com>
15417 Hongtao Liu <hongtao.liu@intel.com>
15419 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
15421 (<xsave>_rex64): Likewise.
15422 (<xrstor>_rex64): Likewise.
15423 (<xrstor>64): Likewise.
15424 (fxsave64): Likewise.
15425 (fxstore64): Likewise.
15427 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
15428 Kong Lingling <lingling.kong@intel.com>
15429 Hongtao Liu <hongtao.liu@intel.com>
15431 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
15432 adjust mnemonic for vmovduq/vmovdqa.
15433 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
15434 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
15435 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
15438 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15439 Hongyu Wang <hongyu.wang@intel.com>
15440 Hongtao Liu <hongtao.liu@intel.com>
15442 * config/i386/i386.cc (map_egpr_constraints): New funciton to
15443 map common constraints to EGPR prohibited constraints.
15444 (ix86_md_asm_adjust): Calls map_egpr_constraints.
15445 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
15447 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15448 Hongyu Wang <hongyu.wang@intel.com>
15449 Hongtao Liu <hongtao.liu@intel.com>
15451 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
15453 (ix86_regno_ok_for_insn_base_p): Likewise.
15454 (ix86_insn_index_reg_class): Likewise.
15455 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
15456 New helper function to scan the insn.
15457 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
15458 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
15459 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
15460 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
15461 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
15462 (INSN_INDEX_REG_CLASS): Likewise.
15463 (enum reg_class): Add INDEX_GPR16.
15464 (GENERAL_GPR16_REGNO_P): Define.
15465 * config/i386/i386.md (gpr32): New attribute.
15467 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15468 Hongyu Wang <hongyu.wang@intel.com>
15469 Hongtao Liu <hongtao.liu@intel.com>
15471 * config/i386/constraints.md (jr): New register constraint
15472 that prohibits EGPR.
15473 (jR): Constraint that force usage of EGPR.
15474 (jm): New memory constraint that prohibits EGPR.
15475 (ja): Likewise for Bm constraint.
15476 (jb): Likewise for Tv constraint.
15477 (j<): New auto-dec memory constraint that prohibits EGPR.
15478 (j>): Likewise for ">" constraint.
15479 (jo): Likewise for "o" constraint.
15480 (jv): Likewise for "V" constraint.
15481 (jp): Likewise for "p" constraint.
15482 * config/i386/i386.h (enum reg_class): Add new reg class
15485 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15486 Hongyu Wang <hongyu.wang@intel.com>
15487 Hongtao Liu <hongtao.liu@intel.com>
15489 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
15490 New function prototype.
15491 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
15493 (debugger64_register_map): Likewise.
15494 (ix86_conditional_register_usage): Clear REX2 register when APX
15496 (ix86_code_end): Add handling for REX2 reg.
15497 (print_reg): Likewise.
15498 (ix86_output_jmp_thunk_or_indirect): Likewise.
15499 (ix86_output_indirect_branch_via_reg): Likewise.
15500 (ix86_attr_length_vex_default): Likewise.
15501 (ix86_emit_save_regs): Adjust to allow saving r31.
15502 (ix86_register_priority): Set REX2 reg priority same as REX.
15503 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
15504 (x86_extended_rex2reg_mentioned_p): New function.
15505 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
15507 (REG_ALLOC_ORDER): Likewise.
15508 (FIRST_REX2_INT_REG): Define.
15509 (LAST_REX2_INT_REG): Ditto.
15510 (GENERAL_REGS): Add 16 new registers.
15511 (INT_SSE_REGS): Likewise.
15512 (FLOAT_INT_REGS): Likewise.
15513 (FLOAT_INT_SSE_REGS): Likewise.
15514 (INT_MASK_REGS): Likewise.
15515 (ALL_REGS):Likewise.
15516 (REX2_INT_REG_P): Define.
15517 (REX2_INT_REGNO_P): Ditto.
15518 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
15519 (REGNO_OK_FOR_INDEX_P): Ditto.
15520 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
15521 * config/i386/i386.md: Add 16 new integer general
15524 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15525 Hongyu Wang <hongyu.wang@intel.com>
15526 Hongtao Liu <hongtao.liu@intel.com>
15528 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
15529 (XCR_APX_F_ENABLED_MASK): Likewise.
15530 (get_available_features): Detect APX_F under
15531 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
15532 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
15533 (ix86_handle_option): Handle -mapxf.
15534 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
15535 * common/config/i386/i386-isas.h: Add entry for APX_F.
15536 * config/i386/cpuid.h (bit_APX_F): New.
15537 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
15538 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
15539 * config/i386/i386-opts.h (enum apx_features): New enum.
15540 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
15541 * config/i386/i386-options.cc (ix86_function_specific_save):
15542 Save ix86_apx_features.
15543 (ix86_function_specific_restore): Restore it.
15544 (ix86_valid_target_attribute_inner_p): Add mapxf.
15545 (ix86_option_override_internal): Set ix86_apx_features for PTA
15546 and TARGET_APX_F. Also reports error when APX_F is set but not
15547 having TARGET_64BIT.
15548 * config/i386/i386.opt: (-mapxf): New ISA flag option.
15549 (-mapx=): New enumeration option.
15550 (apx_features): New enum type.
15551 (apx_none): New enum value.
15552 (apx_egpr): Likewise.
15553 (apx_push2pop2): Likewise.
15554 (apx_ndd): Likewise.
15555 (apx_all): Likewise.
15556 * doc/invoke.texi: Document mapxf.
15558 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
15559 Kong Lingling <lingling.kong@intel.com>
15560 Hongtao Liu <hongtao.liu@intel.com>
15562 * addresses.h (index_reg_class): New wrapper function like
15564 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
15565 * doc/tm.texi.in: Ditto.
15566 * lra-constraints.cc (index_part_to_reg): Pass index_class.
15567 (process_address_1): Calls index_reg_class with curr_insn and
15568 replace INDEX_REG_CLASS with its return value index_cl.
15569 * reload.cc (find_reloads_address): Likewise.
15570 (find_reloads_address_1): Likewise.
15572 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15573 Hongyu Wang <hongyu.wang@intel.com>
15574 Hongtao Liu <hongtao.liu@intel.com>
15576 * addresses.h (base_reg_class): Add insn argument and new macro
15577 INSN_BASE_REG_CLASS.
15578 (regno_ok_for_base_p_1): Add insn argument and new macro
15579 REGNO_OK_FOR_INSN_BASE_P.
15580 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
15581 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
15582 REGNO_OK_FOR_INSN_BASE_P.
15583 * doc/tm.texi.in: Ditto.
15584 * lra-constraints.cc (process_address_1): Pass insn to
15586 (curr_insn_transform): Ditto.
15587 * reload.cc (find_reloads): Ditto.
15588 (find_reloads_address): Ditto.
15589 (find_reloads_address_1): Ditto.
15590 (find_reloads_subreg_address): Ditto.
15591 * reload1.cc (maybe_fix_stack_asms): Ditto.
15593 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
15596 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
15599 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
15602 * config/rs6000/predicates.md (lowpart_subreg_operator): New
15604 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
15605 (movsf_from_si2): Rename to ...
15606 (movsf_from_si2_<code>): ... this.
15608 2023-10-07 Pan Li <pan2.li@intel.com>
15611 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
15612 object is a REG before extracting its' REGNO.
15614 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
15616 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
15617 one into add3_cc_overflow_1 followed by add3_carry.
15618 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
15619 "*add<mode>3_cc_overflow_1" to provide generator function.
15621 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
15622 Uros Bizjak <ubizjak@gmail.com>
15624 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
15625 to perform left shifts into shorter instructions with -Oz.
15627 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
15629 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
15631 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
15633 * doc/extend.texi (Function Attributes): Mention standard attribute
15635 (Variable Attributes): Likewise.
15636 (Type Attributes): Likewise.
15637 (Attribute Syntax): Likewise.
15639 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
15641 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
15642 (mov<mode>_exec): Likewise.
15643 (mov<mode>_sgprbase): Likewise.
15644 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
15645 (*movti_insn): Likewise.
15647 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
15649 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
15651 2023-10-06 Andrew Pinski <pinskia@gmail.com>
15653 PR middle-end/111699
15654 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
15655 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
15657 2023-10-06 Jakub Jelinek <jakub@redhat.com>
15659 * ipa-prop.h (ipa_bits): Remove.
15660 (struct ipa_jump_func): Remove bits member.
15661 (struct ipcp_transformation): Remove bits member, adjust
15663 (ipa_get_ipa_bits_for_value): Remove.
15664 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
15665 (ipa_bits_hash_table): Remove.
15666 (ipa_print_node_jump_functions_for_edge): Don't print bits.
15667 (ipa_get_ipa_bits_for_value): Remove.
15668 (ipa_set_jfunc_bits): Remove.
15669 (ipa_compute_jump_functions_for_edge): For pointers query
15670 pointer alignment before ipa_set_jfunc_vr and update_bitmask
15671 in there. For integral types, just rely on bitmask already
15672 being handled in value ranges.
15673 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
15674 (ipcp_transformation_initialize): Neither here.
15675 (ipcp_transformation_t::duplicate): Don't copy bits vector.
15676 (ipa_write_jump_function): Don't stream bits here.
15677 (ipa_read_jump_function): Neither here.
15678 (useful_ipcp_transformation_info_p): Don't test bits vec.
15679 (write_ipcp_transformation_info): Don't stream bits here.
15680 (read_ipcp_transformation_info): Neither here.
15681 (ipcp_get_parm_bits): Get mask and value from m_vr rather
15683 (ipcp_update_bits): Remove.
15684 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
15685 bitmask stored in value range.
15686 (ipcp_transform_function): Don't test bits vector, don't call
15688 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
15689 jfunc->bits, instead get mask and value from jfunc->m_vr.
15690 (ipcp_store_bits_results): Remove.
15691 (ipcp_store_vr_results): Incorporate parts of
15692 ipcp_store_bits_results here, merge the bitmasks with value
15693 range if both are supplied.
15694 (ipcp_driver): Don't call ipcp_store_bits_results.
15695 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
15698 2023-10-06 Pan Li <pan2.li@intel.com>
15700 * config/riscv/autovec.md: Update comments.
15702 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
15704 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
15706 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
15708 * timevar.def (TV_TREE_FAST_VRP): New.
15709 * tree-pass.h (make_pass_fast_vrp): New prototype.
15710 * tree-vrp.cc (class fvrp_folder): New.
15711 (fvrp_folder::fvrp_folder): New.
15712 (fvrp_folder::~fvrp_folder): New.
15713 (fvrp_folder::value_of_expr): New.
15714 (fvrp_folder::value_on_edge): New.
15715 (fvrp_folder::value_of_stmt): New.
15716 (fvrp_folder::pre_fold_bb): New.
15717 (fvrp_folder::post_fold_bb): New.
15718 (fvrp_folder::pre_fold_stmt): New.
15719 (fvrp_folder::fold_stmt): New.
15720 (execute_fast_vrp): New.
15721 (pass_data_fast_vrp): New.
15722 (pass_vrp:execute): Check for fast VRP pass.
15723 (make_pass_fast_vrp): New.
15725 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
15727 * gimple-range.cc (dom_ranger::dom_ranger): New.
15728 (dom_ranger::~dom_ranger): New.
15729 (dom_ranger::range_of_expr): New.
15730 (dom_ranger::edge_range): New.
15731 (dom_ranger::range_on_edge): New.
15732 (dom_ranger::range_in_bb): New.
15733 (dom_ranger::range_of_stmt): New.
15734 (dom_ranger::maybe_push_edge): New.
15735 (dom_ranger::pre_bb): New.
15736 (dom_ranger::post_bb): New.
15737 * gimple-range.h (class dom_ranger): New.
15739 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
15741 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
15742 (gori_calc_operands): New.
15743 (gori_on_edge): New.
15744 (gori_name_helper): New.
15745 (gori_name_on_edge): New.
15746 * gimple-range-gori.h (gori_on_edge): New prototype.
15747 (gori_name_on_edge): New prototype.
15749 2023-10-05 Sergei Trofimovich <siarheit@google.com>
15752 PR gcov-profile/111559
15753 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
15754 uninitialized probabilities when merging counters with zero
15757 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
15760 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
15761 strategy for non-default address spaces.
15762 (decide_alg): Use loop strategy as a fallback strategy for
15763 non-default address spaces.
15765 2023-10-05 Jakub Jelinek <jakub@redhat.com>
15767 * sreal.cc (verify_aritmetics): Rename to ...
15768 (verify_arithmetics): ... this.
15769 (sreal_verify_arithmetics): Adjust caller.
15771 2023-10-05 Martin Jambor <mjambor@suse.cz>
15774 2023-10-03 Martin Jambor <mjambor@suse.cz>
15777 * cgraph.h (cgraph_edge): Add a parameter to
15778 redirect_call_stmt_to_callee.
15779 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
15780 parameter to modify_call.
15781 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
15782 parameter killed_ssas, pass it to padjs->modify_call.
15783 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
15784 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
15785 Instead of substituting uses, invoke purge_transitive_uses. If
15786 hash of killed SSAs has not been provided, create a temporary one
15787 and release SSAs that have been added to it.
15788 * tree-inline.cc (redirect_all_calls): Create
15789 id->killed_new_ssa_names earlier, pass it to edge redirection,
15791 (copy_body): Release SSAs in id->killed_new_ssa_names.
15793 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15795 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
15796 (vec_series<mode>): Ditto.
15797 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
15798 (shuffle_decompress_patterns): Ditto.
15800 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
15802 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
15803 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
15804 (arc_ccfsm_record_branch_deleted): Likewise.
15805 (arc_ccfsm_cond_exec_p): Likewise.
15806 (arc_ccfsm): Likewise.
15807 (arc_ccfsm_record_condition): Likewise.
15808 (make_pass_arc_ifcvt): Likewise.
15809 * config/arc/arc.cc (arc_ccfsm): Remove.
15810 (arc_ccfsm_current): Likewise.
15811 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
15812 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
15813 (ARC_CCFSM_COND_EXEC_P): Likewise.
15814 (CCFSM_ISCOMPACT): Likewise.
15815 (CCFSM_DBR_ISCOMPACT): Likewise.
15816 (machine_function): Remove ccfsm related fields.
15817 (arc_ifcvt): Remove pass.
15818 (arc_print_operand): Remove `#` punct operand and other ccfsm
15820 (arc_ccfsm_advance): Remove.
15821 (arc_ccfsm_at_label): Likewise.
15822 (arc_ccfsm_record_condition): Likewise.
15823 (arc_ccfsm_post_advance): Likewise.
15824 (arc_ccfsm_branch_deleted_p): Likewise.
15825 (arc_ccfsm_record_branch_deleted): Likewise.
15826 (arc_ccfsm_cond_exec_p): Likewise.
15827 (arc_get_ccfsm_cond): Likewise.
15828 (arc_final_prescan_insn): Remove ccfsm references.
15829 (arc_internal_label): Likewise.
15830 (arc_reorg): Likewise.
15831 (arc_output_libcall): Likewise.
15832 * config/arc/arc.md: Remove ccfsm references and update related
15833 instruction patterns.
15835 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
15837 * config/arc/arc.cc (arc_init): Remove '^' punct char.
15838 (arc_print_operand): Remove related code.
15839 * config/arc/arc.md: Update patterns which uses '%&'.
15841 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
15843 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
15844 (arc_toggle_unalign): Likewise.
15845 * config/arc/arc.cc (machine_function) Remove unalign.
15846 (arc_init): Remove `&` punct character.
15847 (arc_print_operand): Remove `&` related functions.
15848 (arc_verify_short): Update function's number of parameters.
15849 (output_short_suffix): Update function.
15850 (arc_short_long): Likewise.
15851 (arc_clear_unalign): Remove.
15852 (arc_toggle_unalign): Likewise.
15853 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
15854 (ASM_OUTPUT_ALIGN): Update.
15855 * config/arc/arc.md: Remove all `%&` references.
15856 * config/arc/arc.opt (mannotate-align): Ignore option.
15857 * doc/invoke.texi (mannotate-align): Update description.
15859 2023-10-05 Richard Biener <rguenther@suse.de>
15861 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
15862 ask for internal_fn_p (CFN_LAST).
15864 2023-10-05 Richard Biener <rguenther@suse.de>
15866 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
15867 visited value numbers are available itself.
15869 2023-10-05 Richard Biener <rguenther@suse.de>
15872 * doc/extend.texi (attribute flatten): Clarify.
15874 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
15876 * config/arc/arc-protos.h (emit_shift): Delete prototype.
15877 (arc_pre_reload_split): New function prototype.
15878 * config/arc/arc.cc (emit_shift): Delete function.
15879 (arc_pre_reload_split): New predicate function, copied from i386,
15880 to schedule define_insn_and_split splitters to the split1 pass.
15881 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
15882 (ashrsi3): Likewise.
15883 (lshrsi3): Likewise.
15884 (shift_si3): Move after other shift patterns, and disable when
15885 operands[2] is one (which is handled by its own define_insn).
15886 Use shiftr4_operator, instead of shift4_operator, as this is no
15887 longer used for left shifts.
15888 (shift_si3_loop): Likewise. Additionally remove match_scratch.
15889 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
15890 (*ashrsi3_nobs): Likewise.
15891 (*lshrsi3_nobs): Likewise.
15892 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
15893 (add_shift): Rename define_insn from *add_shift.
15894 * config/arc/predicates.md (shiftl4_operator): Delete.
15895 (shift4_operator): Delete.
15897 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
15899 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
15900 Change type attribute to "unary", as this doesn't have operands[2].
15901 Change length attribute to "*,4" to allow compact representation.
15902 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
15903 insn type attribute to "unary", as this doesn't have operands[2].
15904 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
15905 insn type attribute to "unary", as this doesn't have operands[2].
15907 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
15909 PR rtl-optimization/110701
15910 * combine.cc (record_dead_and_set_regs_1): Split comment into
15911 pieces placed before the relevant clauses. When the SET_DEST
15912 is a partial_subreg_p, mark the bits outside of the updated
15913 portion of the destination as undefined.
15915 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
15917 PR bootstrap/111664
15918 * opt-read.awk: Drop multidimensional arrays.
15919 * opth-gen.awk: Ditto.
15921 2023-10-04 Xi Ruoyao <xry111@xry111.site>
15923 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
15924 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
15926 2023-10-04 Jakub Jelinek <jakub@redhat.com>
15928 PR middle-end/111369
15929 * match.pd (x == cstN ? cst4 : cst3): Use
15930 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
15931 Fix comment typo. Formatting fix.
15932 (a?~t:t -> (-(a))^t): Always convert to type rather
15933 than using build_nonstandard_integer_type. Perform negation
15934 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
15936 2023-10-04 Jakub Jelinek <jakub@redhat.com>
15938 PR tree-optimization/111668
15939 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
15940 a ? 0 : -1 cases before the powerof2cst cases and differentiate
15941 between 1-bit precision types, larger precision boolean types
15942 and other integral types. Fix comment pastos and formatting.
15944 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
15946 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
15947 pointers rather than range_info_get_range.
15949 2023-10-03 Martin Jambor <mjambor@suse.cz>
15951 * ipa-modref.h (modref_summary::dump): Make const.
15952 * ipa-modref.cc (modref_summary::dump): Likewise.
15953 (dump_lto_records): Dump to out instead of dump_file.
15955 2023-10-03 Martin Jambor <mjambor@suse.cz>
15958 * ipa-param-manipulation.cc
15959 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
15960 return uses of PARAM will be removed.
15961 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
15962 * ipa-sra.cc (isra_param_desc): New fields
15963 remove_only_when_retval_removed and split_only_when_retval_removed.
15964 (struct gensum_param_desc): Likewise. Fix comment long line.
15965 (ipa_sra_function_summaries::duplicate): Copy the new flags.
15966 (dump_gensum_param_descriptor): Dump the new flags.
15967 (dump_isra_param_descriptor): Likewise.
15968 (isra_track_scalar_value_uses): New parameter desc. Set its flag
15969 remove_only_when_retval_removed when encountering a simple return.
15970 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
15971 with desc. Pass it to isra_track_scalar_value_uses and set its
15973 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
15974 parameter. If there is a direct return use, mark any..
15975 (create_parameter_descriptors): Pass the whole parameter descriptor to
15976 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
15977 (process_scan_results): Copy the new flags.
15978 (isra_write_node_summary): Stream the new flags.
15979 (isra_read_node_info): Likewise.
15980 (adjust_parameter_descriptions): Check that transformations
15981 requring return removal only happen when return value is removed.
15982 Restructure main loop. Adjust dump message.
15984 2023-10-03 Martin Jambor <mjambor@suse.cz>
15987 * cgraph.h (cgraph_edge): Add a parameter to
15988 redirect_call_stmt_to_callee.
15989 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
15990 parameter to modify_call.
15991 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
15992 parameter killed_ssas, pass it to padjs->modify_call.
15993 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
15994 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
15995 Instead of substituting uses, invoke purge_transitive_uses. If
15996 hash of killed SSAs has not been provided, create a temporary one
15997 and release SSAs that have been added to it.
15998 * tree-inline.cc (redirect_all_calls): Create
15999 id->killed_new_ssa_names earlier, pass it to edge redirection,
16001 (copy_body): Release SSAs in id->killed_new_ssa_names.
16003 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
16005 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
16006 * tree-vrp.cc (vrp_pass_num): Remove.
16007 (pass_vrp::my_pass): Remove.
16008 (pass_vrp::pass_vrp): Add warn_p as a parameter.
16009 (pass_vrp::final_p): New.
16010 (pass_vrp::set_pass_param): Set final_p param.
16011 (pass_vrp::execute): Call execute_range_vrp with no conditions.
16012 (make_pass_vrp): Pass additional parameter.
16013 (make_pass_early_vrp): Ditto.
16015 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
16017 * tree-ssanames.cc (set_range_info): Return true only if the
16018 current value changes.
16020 2023-10-03 David Malcolm <dmalcolm@redhat.com>
16022 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
16023 prefixes to text_info fields.
16024 (diagnostic_report_diagnostic): Likewise.
16025 (verbatim): Use text_info ctor.
16026 (simple_diagnostic_path::add_event): Likewise.
16027 (simple_diagnostic_path::add_thread_event): Likewise.
16028 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
16029 "m_" prefixes to text_info fields.
16030 (dump_context::dump_printf_va): Use text_info ctor.
16031 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
16032 (graphviz_out::print): Likewise.
16033 * opt-problem.cc (opt_problem::opt_problem): Likewise.
16034 * pretty-print.cc (pp_format): Update for "m_" prefixes to
16036 (pp_printf): Use text_info ctor.
16037 (pp_verbatim): Likewise.
16038 (assert_pp_format_va): Likewise.
16039 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
16041 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
16043 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
16044 prefixes to text_info fields.
16045 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
16047 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
16049 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
16050 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
16051 (*scc_insn): Don't split to a conditional move sequence for LTU.
16053 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
16055 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
16056 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
16057 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
16058 (load_pair_dw_<DX:mode><DX2:mode>)
16059 (store_pair_sw_<SX:mode><SX2:mode>)
16060 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
16061 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
16062 (*extend<SHORT:mode><GPI:mode>2_aarch64)
16063 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
16064 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
16065 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
16066 (add<mode>3_compare0, *addsi3_compare0_uxtw)
16067 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
16068 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
16069 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
16070 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
16071 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
16072 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
16073 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
16074 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
16075 (*aarch64_ashl_sisd_or_int_<mode>3)
16076 (*aarch64_lshr_sisd_or_int_<mode>3)
16077 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
16078 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
16079 (<optab><fcvt_target><GPF:mode>2)
16080 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
16081 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
16082 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
16084 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
16085 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
16086 (*aarch64_mul_unpredicated_<mode>)
16087 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
16088 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
16089 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
16090 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
16091 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
16092 (@aarch64_sve_<sve_int_op>_lane_<mode>)
16093 (@aarch64_sve_add_mul_lane_<mode>)
16094 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
16095 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
16096 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
16097 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
16098 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
16099 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
16100 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
16101 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
16102 (@aarch64_sve_qadd_<sve_int_op><mode>)
16103 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
16104 (@aarch64_sve_sub_<sve_int_op><mode>)
16105 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
16106 (@aarch64_sve_qsub_<sve_int_op><mode>)
16107 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
16108 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
16109 (@aarch64_pred_<sve_int_op><mode>)
16110 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
16111 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
16112 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
16113 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
16114 (*cond_<sve_fp_op><mode>_any_relaxed)
16115 (*cond_<sve_fp_op><mode>_any_strict)
16116 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
16117 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
16118 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
16119 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
16120 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
16121 (*aarch64_sve_mov<mode>, aarch64_wrffr)
16122 (mask_scatter_store<mode><v_int_container>)
16123 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
16124 (*mask_scatter_store<mode><v_int_container>_sxtw)
16125 (*mask_scatter_store<mode><v_int_container>_uxtw)
16126 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
16127 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
16128 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
16129 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
16130 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
16131 (vec_series<mode>, @extract_<last_op>_<mode>)
16132 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
16133 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
16134 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
16135 (@cond_<optab><mode>)
16136 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
16137 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
16138 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
16139 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
16140 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
16141 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
16142 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
16143 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
16144 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
16145 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
16146 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
16147 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
16148 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
16149 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
16150 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
16151 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
16152 (*cond_bic<mode>_2, *cond_bic<mode>_any)
16153 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
16154 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
16155 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
16156 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
16157 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
16158 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
16159 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
16160 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
16161 (*cond_<optab><mode>_2_const_relaxed)
16162 (*cond_<optab><mode>_2_const_strict)
16163 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
16164 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
16165 (*cond_<optab><mode>_any_const_relaxed)
16166 (*cond_<optab><mode>_any_const_strict)
16167 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
16168 (*cond_add<mode>_2_const_strict)
16169 (*cond_add<mode>_any_const_relaxed)
16170 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
16171 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
16172 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
16173 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
16174 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
16175 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
16176 (*aarch64_pred_abd<mode>_strict)
16177 (*aarch64_cond_abd<mode>_2_relaxed)
16178 (*aarch64_cond_abd<mode>_2_strict)
16179 (*aarch64_cond_abd<mode>_3_relaxed)
16180 (*aarch64_cond_abd<mode>_3_strict)
16181 (*aarch64_cond_abd<mode>_any_relaxed)
16182 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
16183 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
16184 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
16185 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
16186 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
16187 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
16188 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
16189 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
16190 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
16191 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
16192 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
16193 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
16194 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
16195 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
16196 (@aarch64_sve_<sve_fp_op>vnx4sf)
16197 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
16198 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
16199 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
16200 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
16201 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
16202 (@aarch64_fold_extract_vector_<last_op>_<mode>)
16203 (@aarch64_sve_splice<mode>)
16204 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
16205 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
16206 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
16207 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
16208 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
16209 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
16210 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
16211 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
16212 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
16213 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
16214 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
16215 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
16216 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
16217 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
16218 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
16219 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
16220 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
16222 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
16223 (load_pair<DREG:mode><DREG2:mode>)
16224 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
16225 (aarch64_simd_mov_from_<mode>low)
16226 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
16227 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
16228 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
16229 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
16230 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
16231 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
16232 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
16233 (*aarch64_combinez_be<mode>)
16234 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
16235 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
16236 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
16238 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
16240 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
16241 in new compact pattern syntax.
16243 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
16245 * gensupport.cc (convert_syntax): Updated to support unordered
16246 constraints in compact syntax.
16248 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
16250 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
16251 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
16252 (copysign<mode>3_hard): Likewise.
16253 (copysign<mode>3_soft): Likewise.
16254 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
16256 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
16259 2023-10-02 David Malcolm <dmalcolm@redhat.com>
16261 * diagnostic-format-json.cc (toplevel_array): Remove global in
16262 favor of json_output_format::m_top_level_array.
16263 (cur_group): Likewise, for json_output_format::m_cur_group.
16264 (cur_children_array): Likewise, for
16265 json_output_format::m_cur_children_array.
16266 (class json_output_format): New.
16267 (json_begin_diagnostic): Remove, in favor of
16268 json_output_format::on_begin_diagnostic.
16269 (json_end_diagnostic): Convert to...
16270 (json_output_format::on_end_diagnostic): ...this.
16271 (json_begin_group): Remove, in favor of
16272 json_output_format::on_begin_group.
16273 (json_end_group): Remove, in favor of
16274 json_output_format::on_end_group.
16275 (json_flush_to_file): Remove, in favor of
16276 json_output_format::flush_to_file.
16277 (json_stderr_final_cb): Remove, in favor of json_output_format
16279 (json_output_base_file_name): Remove global.
16280 (class json_stderr_output_format): New.
16281 (json_file_final_cb): Remove.
16282 (class json_file_output_format): New.
16283 (json_emit_diagram): Remove.
16284 (diagnostic_output_format_init_json): Update.
16285 (diagnostic_output_format_init_json_file): Update.
16286 * diagnostic-format-sarif.cc (the_builder): Remove this global,
16287 moving to a field of the sarif_output_format.
16288 (sarif_builder::maybe_make_artifact_content_object): Use the
16289 context's m_file_cache.
16290 (get_source_lines): Convert to...
16291 (sarif_builder::get_source_lines): ...this, using context's
16293 (sarif_begin_diagnostic): Remove, in favor of
16294 sarif_output_format::on_begin_diagnostic.
16295 (sarif_end_diagnostic): Remove, in favor of
16296 sarif_output_format::on_end_diagnostic.
16297 (sarif_begin_group): Remove, in favor of
16298 sarif_output_format::on_begin_group.
16299 (sarif_end_group): Remove, in favor of
16300 sarif_output_format::on_end_group.
16301 (sarif_flush_to_file): Delete.
16302 (sarif_stderr_final_cb): Delete.
16303 (sarif_output_base_file_name): Delete.
16304 (sarif_file_final_cb): Delete.
16305 (class sarif_output_format): New.
16306 (sarif_emit_diagram): Delete.
16307 (class sarif_stream_output_format): New.
16308 (class sarif_file_output_format): New.
16309 (diagnostic_output_format_init_sarif): Update.
16310 (diagnostic_output_format_init_sarif_stderr): Update.
16311 (diagnostic_output_format_init_sarif_file): Update.
16312 (diagnostic_output_format_init_sarif_stream): Update.
16313 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
16314 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
16315 diagnostic_text_output_format's dtor.
16316 (diagnostic_initialize): Update, making a new instance of
16317 diagnostic_text_output_format.
16318 (diagnostic_finish): Delete m_output_format, rather than calling
16320 (diagnostic_report_diagnostic): Assert that m_output_format is
16321 non-NULL. Replace call to begin_group_cb with call to
16322 m_output_format->on_begin_group. Replace call to
16323 diagnostic_starter with call to
16324 m_output_format->on_begin_diagnostic. Replace call to
16325 diagnostic_finalizer with call to
16326 m_output_format->on_end_diagnostic.
16327 (diagnostic_emit_diagram): Replace both optional call to
16328 m_diagrams.m_emission_cb and default implementation with call to
16329 m_output_format->on_diagram. Move default implementation to
16330 diagnostic_text_output_format::on_diagram.
16331 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
16332 end_group_cb with call to m_output_format->on_end_group.
16333 (diagnostic_text_output_format::~diagnostic_text_output_format):
16334 New, based on default_diagnostic_final_cb.
16335 (diagnostic_text_output_format::on_begin_diagnostic): New, based
16336 on code from diagnostic_report_diagnostic.
16337 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
16338 (diagnostic_text_output_format::on_diagram): New, based on code
16339 from diagnostic_emit_diagram.
16340 * diagnostic.h (class diagnostic_output_format): New.
16341 (class diagnostic_text_output_format): New.
16342 (diagnostic_context::begin_diagnostic): Move to...
16343 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
16344 (diagnostic_context::start_span): Move to...
16345 (diagnostic_context::m_text_callbacks::start_span): ...here.
16346 (diagnostic_context::end_diagnostic): Move to...
16347 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
16348 (diagnostic_context::begin_group_cb): Remove, in favor of
16349 m_output_format->on_begin_group.
16350 (diagnostic_context::end_group_cb): Remove, in favor of
16351 m_output_format->on_end_group.
16352 (diagnostic_context::final_cb): Remove, in favor of
16353 m_output_format's dtor.
16354 (diagnostic_context::m_output_format): New field.
16355 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
16356 of m_output_format->on_diagram.
16357 (diagnostic_starter): Update.
16358 (diagnostic_finalizer): Update.
16359 (diagnostic_output_format_init_sarif_stream): New.
16360 * input.cc (location_get_source_line): Move implementation apart from
16361 call to diagnostic_file_cache_init to...
16362 (file_cache::get_source_line): ...this new function...
16363 (location_get_source_line): ...and reintroduce, rewritten in terms of
16364 file_cache::get_source_line.
16365 (get_source_file_content): Likewise, refactor into...
16366 (file_cache::get_source_file_content): ...this new function.
16367 * input.h (file_cache::get_source_line): New decl.
16368 (file_cache::get_source_file_content): New decl.
16369 * selftest-diagnostic.cc
16370 (test_diagnostic_context::test_diagnostic_context): Update.
16371 * tree-diagnostic-path.cc (event_range::print): Update for
16372 change to diagnostic_context's start_span callback.
16374 2023-10-02 David Malcolm <dmalcolm@redhat.com>
16376 * diagnostic-show-locus.cc: Update for reorganization of
16377 source-printing fields of diagnostic_context.
16378 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
16379 (diagnostic_initialize): Likewise.
16380 * diagnostic.h (diagnostic_context::show_caret): Move to...
16381 (diagnostic_context::m_source_printing::enabled): ...here.
16382 (diagnostic_context::caret_max_width): Move to...
16383 (diagnostic_context::m_source_printing::max_width): ...here.
16384 (diagnostic_context::caret_chars): Move to...
16385 (diagnostic_context::m_source_printing::caret_chars): ...here.
16386 (diagnostic_context::colorize_source_p): Move to...
16387 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
16388 (diagnostic_context::show_labels_p): Move to...
16389 (diagnostic_context::m_source_printing::show_labels_p): ...here.
16390 (diagnostic_context::show_line_numbers_p): Move to...
16391 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
16392 (diagnostic_context::min_margin_width): Move to...
16393 (diagnostic_context::m_source_printing::min_margin_width): ...here.
16394 (diagnostic_context::show_ruler_p): Move to...
16395 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
16396 (diagnostic_same_line): Update for above changes.
16397 * opts.cc (common_handle_option): Update for reorganization of
16398 source-printing fields of diagnostic_context.
16399 * selftest-diagnostic.cc
16400 (test_diagnostic_context::test_diagnostic_context): Likewise.
16401 * toplev.cc (general_init): Likewise.
16402 * tree-diagnostic-path.cc (struct event_range): Likewise.
16404 2023-10-02 David Malcolm <dmalcolm@redhat.com>
16406 * diagnostic.cc (diagnostic_initialize): Initialize
16407 set_locations_cb to nullptr.
16409 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
16412 * config/arm/constraints.md: Remove Pf constraint.
16413 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
16414 (arm_atomic_load_acquire<mode>): Likewise.
16415 (arm_atomic_store<mode>): Likewise.
16416 (arm_atomic_store_release<mode>): Likewise.
16417 (atomic_load<mode>): Switch patterns to define_expand.
16418 (atomic_store<mode>): Likewise.
16419 (arm_atomic_loaddi2_ldrd): Remove predication.
16420 (arm_load_exclusive<mode>): Likewise.
16421 (arm_load_acquire_exclusive<mode>): Likewise.
16422 (arm_load_exclusivesi): Likewise.
16423 (arm_load_acquire_exclusivesi): Likewise.
16424 (arm_load_exclusivedi): Likewise.
16425 (arm_load_acquire_exclusivedi): Likewise.
16426 (arm_store_exclusive<mode>): Likewise.
16427 (arm_store_release_exclusivedi): Likewise.
16428 (arm_store_release_exclusive<mode>): Likewise.
16429 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
16431 2023-10-02 Tamar Christina <tamar.christina@arm.com>
16434 2023-10-02 Tamar Christina <tamar.christina@arm.com>
16436 PR tree-optimization/109154
16437 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
16438 (cmp_arg_entry): New.
16439 (predicate_scalar_phi): Use it.
16441 2023-10-02 Tamar Christina <tamar.christina@arm.com>
16443 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
16444 (@xorsign<mode>3): ...This.
16445 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
16446 (@xorsign<mode>3): ..This and emit vectors directly
16447 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
16449 2023-10-02 Tamar Christina <tamar.christina@arm.com>
16451 * emit-rtl.cc (validate_subreg): Relax subreg rule.
16453 2023-10-02 Tamar Christina <tamar.christina@arm.com>
16455 PR tree-optimization/109154
16456 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
16457 (cmp_arg_entry): New.
16458 (predicate_scalar_phi): Use it.
16460 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
16462 PR bootstrap/111642
16463 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
16464 poly_int64 typedef.
16465 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
16467 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
16468 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16470 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
16472 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
16474 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
16476 (cpymem<P:mode>) .. this.
16478 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16480 * combine.cc (simplify_compare_const): Properly handle unsigned
16481 constants while narrowing comparison of memory and constants.
16483 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
16485 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
16486 (MASK_ZIFENCEI): Delete;
16487 (MASK_ZIHINTNTL): Ditto.
16488 (MASK_ZIHINTPAUSE): Ditto.
16489 (TARGET_ZICSR): Ditto.
16490 (TARGET_ZIFENCEI): Ditto.
16491 (TARGET_ZIHINTNTL): Ditto.
16492 (TARGET_ZIHINTPAUSE): Ditto.
16493 (MASK_ZAWRS): Ditto.
16494 (TARGET_ZAWRS): Ditto.
16499 (TARGET_ZBA): Ditto.
16500 (TARGET_ZBB): Ditto.
16501 (TARGET_ZBC): Ditto.
16502 (TARGET_ZBS): Ditto.
16503 (MASK_ZFINX): Ditto.
16504 (MASK_ZDINX): Ditto.
16505 (MASK_ZHINX): Ditto.
16506 (MASK_ZHINXMIN): Ditto.
16507 (TARGET_ZFINX): Ditto.
16508 (TARGET_ZDINX): Ditto.
16509 (TARGET_ZHINX): Ditto.
16510 (TARGET_ZHINXMIN): Ditto.
16511 (MASK_ZBKB): Ditto.
16512 (MASK_ZBKC): Ditto.
16513 (MASK_ZBKX): Ditto.
16514 (MASK_ZKNE): Ditto.
16515 (MASK_ZKND): Ditto.
16516 (MASK_ZKNH): Ditto.
16518 (MASK_ZKSED): Ditto.
16519 (MASK_ZKSH): Ditto.
16521 (TARGET_ZBKB): Ditto.
16522 (TARGET_ZBKC): Ditto.
16523 (TARGET_ZBKX): Ditto.
16524 (TARGET_ZKNE): Ditto.
16525 (TARGET_ZKND): Ditto.
16526 (TARGET_ZKNH): Ditto.
16527 (TARGET_ZKR): Ditto.
16528 (TARGET_ZKSED): Ditto.
16529 (TARGET_ZKSH): Ditto.
16530 (TARGET_ZKT): Ditto.
16531 (MASK_ZTSO): Ditto.
16532 (TARGET_ZTSO): Ditto.
16533 (MASK_VECTOR_ELEN_32): Ditto.
16534 (MASK_VECTOR_ELEN_64): Ditto.
16535 (MASK_VECTOR_ELEN_FP_32): Ditto.
16536 (MASK_VECTOR_ELEN_FP_64): Ditto.
16537 (MASK_VECTOR_ELEN_FP_16): Ditto.
16538 (TARGET_VECTOR_ELEN_32): Ditto.
16539 (TARGET_VECTOR_ELEN_64): Ditto.
16540 (TARGET_VECTOR_ELEN_FP_32): Ditto.
16541 (TARGET_VECTOR_ELEN_FP_64): Ditto.
16542 (TARGET_VECTOR_ELEN_FP_16): Ditto.
16543 (MASK_ZVBB): Ditto.
16544 (MASK_ZVBC): Ditto.
16545 (TARGET_ZVBB): Ditto.
16546 (TARGET_ZVBC): Ditto.
16547 (MASK_ZVKG): Ditto.
16548 (MASK_ZVKNED): Ditto.
16549 (MASK_ZVKNHA): Ditto.
16550 (MASK_ZVKNHB): Ditto.
16551 (MASK_ZVKSED): Ditto.
16552 (MASK_ZVKSH): Ditto.
16553 (MASK_ZVKN): Ditto.
16554 (MASK_ZVKNC): Ditto.
16555 (MASK_ZVKNG): Ditto.
16556 (MASK_ZVKS): Ditto.
16557 (MASK_ZVKSC): Ditto.
16558 (MASK_ZVKSG): Ditto.
16559 (MASK_ZVKT): Ditto.
16560 (TARGET_ZVKG): Ditto.
16561 (TARGET_ZVKNED): Ditto.
16562 (TARGET_ZVKNHA): Ditto.
16563 (TARGET_ZVKNHB): Ditto.
16564 (TARGET_ZVKSED): Ditto.
16565 (TARGET_ZVKSH): Ditto.
16566 (TARGET_ZVKN): Ditto.
16567 (TARGET_ZVKNC): Ditto.
16568 (TARGET_ZVKNG): Ditto.
16569 (TARGET_ZVKS): Ditto.
16570 (TARGET_ZVKSC): Ditto.
16571 (TARGET_ZVKSG): Ditto.
16572 (TARGET_ZVKT): Ditto.
16573 (MASK_ZVL32B): Ditto.
16574 (MASK_ZVL64B): Ditto.
16575 (MASK_ZVL128B): Ditto.
16576 (MASK_ZVL256B): Ditto.
16577 (MASK_ZVL512B): Ditto.
16578 (MASK_ZVL1024B): Ditto.
16579 (MASK_ZVL2048B): Ditto.
16580 (MASK_ZVL4096B): Ditto.
16581 (MASK_ZVL8192B): Ditto.
16582 (MASK_ZVL16384B): Ditto.
16583 (MASK_ZVL32768B): Ditto.
16584 (MASK_ZVL65536B): Ditto.
16585 (TARGET_ZVL32B): Ditto.
16586 (TARGET_ZVL64B): Ditto.
16587 (TARGET_ZVL128B): Ditto.
16588 (TARGET_ZVL256B): Ditto.
16589 (TARGET_ZVL512B): Ditto.
16590 (TARGET_ZVL1024B): Ditto.
16591 (TARGET_ZVL2048B): Ditto.
16592 (TARGET_ZVL4096B): Ditto.
16593 (TARGET_ZVL8192B): Ditto.
16594 (TARGET_ZVL16384B): Ditto.
16595 (TARGET_ZVL32768B): Ditto.
16596 (TARGET_ZVL65536B): Ditto.
16597 (MASK_ZICBOZ): Ditto.
16598 (MASK_ZICBOM): Ditto.
16599 (MASK_ZICBOP): Ditto.
16600 (TARGET_ZICBOZ): Ditto.
16601 (TARGET_ZICBOM): Ditto.
16602 (TARGET_ZICBOP): Ditto.
16603 (MASK_ZICOND): Ditto.
16604 (TARGET_ZICOND): Ditto.
16606 (TARGET_ZFA): Ditto.
16607 (MASK_ZFHMIN): Ditto.
16609 (MASK_ZVFHMIN): Ditto.
16610 (MASK_ZVFH): Ditto.
16611 (TARGET_ZFHMIN): Ditto.
16612 (TARGET_ZFH): Ditto.
16613 (TARGET_ZVFHMIN): Ditto.
16614 (TARGET_ZVFH): Ditto.
16615 (MASK_ZMMUL): Ditto.
16616 (TARGET_ZMMUL): Ditto.
16622 (MASK_ZCMP): Ditto.
16623 (MASK_ZCMT): Ditto.
16624 (TARGET_ZCA): Ditto.
16625 (TARGET_ZCB): Ditto.
16626 (TARGET_ZCE): Ditto.
16627 (TARGET_ZCF): Ditto.
16628 (TARGET_ZCD): Ditto.
16629 (TARGET_ZCMP): Ditto.
16630 (TARGET_ZCMT): Ditto.
16631 (MASK_SVINVAL): Ditto.
16632 (MASK_SVNAPOT): Ditto.
16633 (TARGET_SVINVAL): Ditto.
16634 (TARGET_SVNAPOT): Ditto.
16635 (MASK_XTHEADBA): Ditto.
16636 (MASK_XTHEADBB): Ditto.
16637 (MASK_XTHEADBS): Ditto.
16638 (MASK_XTHEADCMO): Ditto.
16639 (MASK_XTHEADCONDMOV): Ditto.
16640 (MASK_XTHEADFMEMIDX): Ditto.
16641 (MASK_XTHEADFMV): Ditto.
16642 (MASK_XTHEADINT): Ditto.
16643 (MASK_XTHEADMAC): Ditto.
16644 (MASK_XTHEADMEMIDX): Ditto.
16645 (MASK_XTHEADMEMPAIR): Ditto.
16646 (MASK_XTHEADSYNC): Ditto.
16647 (TARGET_XTHEADBA): Ditto.
16648 (TARGET_XTHEADBB): Ditto.
16649 (TARGET_XTHEADBS): Ditto.
16650 (TARGET_XTHEADCMO): Ditto.
16651 (TARGET_XTHEADCONDMOV): Ditto.
16652 (TARGET_XTHEADFMEMIDX): Ditto.
16653 (TARGET_XTHEADFMV): Ditto.
16654 (TARGET_XTHEADINT): Ditto.
16655 (TARGET_XTHEADMAC): Ditto.
16656 (TARGET_XTHEADMEMIDX): Ditto.
16657 (TARGET_XTHEADMEMPAIR): Ditto.
16658 (TARGET_XTHEADSYNC): Ditto.
16659 (MASK_XVENTANACONDOPS): Ditto.
16660 (TARGET_XVENTANACONDOPS): Ditto.
16661 * config/riscv/riscv.opt: Add new Mask defination.
16662 * doc/options.texi: Add explanation for this new usage.
16663 * opt-functions.awk: Add new function to find the index
16664 of target variable from extra_target_vars.
16665 * opt-read.awk: Add new function to store the Mask flags.
16666 * opth-gen.awk: Add new function to output the defination of
16667 Mask Macro and Target Macro.
16669 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
16670 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16671 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16674 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
16675 Change second parameter to rtx *.
16676 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
16677 * config/riscv/vector.md: Changed callers of
16678 riscv_vector::legitimize_move.
16679 (*mov<mode>_mem_to_mem): Remove.
16681 2023-09-30 Jakub Jelinek <jakub@redhat.com>
16684 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
16685 Replace safe_grow with safe_grow_cleared.
16687 2023-09-30 Jakub Jelinek <jakub@redhat.com>
16689 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
16690 in function comment.
16692 2023-09-30 Jakub Jelinek <jakub@redhat.com>
16694 PR middle-end/111625
16695 PR middle-end/111637
16696 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
16698 (bitint_large_huge::handle_operand_addr): For uninitialized operands
16699 use limb_prec or -limb_prec precision.
16701 2023-09-30 Jakub Jelinek <jakub@redhat.com>
16703 * vec.h (quick_grow): Uncomment static_assert.
16705 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
16707 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
16709 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
16711 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
16712 SETs when the outer code is INSN.
16714 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
16716 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
16719 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
16721 * poly-int.h (poly_int_pod): Delete.
16722 (poly_coeff_traits::init_cast): New type.
16723 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
16724 (poly_int): Replace constructors that take 1 and 2 coefficients with
16725 a general one that takes an arbitrary number of coefficients.
16726 Delegate initialization to two new private constructors, one of
16727 which uses the coefficients as-is and one of which adds an extra
16728 zero of the appropriate type (and precision, where applicable).
16729 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
16730 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
16731 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
16732 * gengtype.cc (main): Don't register poly_int64_pod.
16733 * calls.cc (initialize_argument_information): Use poly_int rather
16735 (combine_pending_stack_adjustment_and_call): Likewise.
16736 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
16737 * data-streamer.h (bp_unpack_poly_value): Likewise.
16738 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
16739 (struct queued_reg_save): Likewise.
16740 * dwarf2out.h (struct dw_cfa_location): Likewise.
16741 * emit-rtl.h (struct incoming_args): Likewise.
16742 (struct rtl_data): Likewise.
16743 * expr.cc (get_bit_range): Likewise.
16744 (get_inner_reference): Likewise.
16745 * expr.h (get_bit_range): Likewise.
16746 * fold-const.cc (split_address_to_core_and_offset): Likewise.
16747 (ptr_difference_const): Likewise.
16748 * fold-const.h (ptr_difference_const): Likewise.
16749 * function.cc (try_fit_stack_local): Likewise.
16750 (instantiate_new_reg): Likewise.
16751 * function.h (struct expr_status): Likewise.
16752 (struct args_size): Likewise.
16753 * genmodes.cc (ZERO_COEFFS): Likewise.
16754 (mode_size_inline): Likewise.
16755 (mode_nunits_inline): Likewise.
16756 (emit_mode_precision): Likewise.
16757 (emit_mode_size): Likewise.
16758 (emit_mode_nunits): Likewise.
16759 * gimple-fold.cc (get_base_constructor): Likewise.
16760 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
16761 * inchash.h (class hash): Likewise.
16762 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
16763 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
16765 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
16766 * lra-eliminations.cc (self_elim_offsets): Likewise.
16767 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
16768 * omp-low.cc (omplow_simd_context): Likewise.
16769 * pretty-print.cc (pp_wide_integer): Likewise.
16770 * pretty-print.h (pp_wide_integer): Likewise.
16771 * reload.cc (struct decomposition): Likewise.
16772 * reload.h (struct reload): Likewise.
16773 * reload1.cc (spill_stack_slot_width): Likewise.
16774 (struct elim_table): Likewise.
16775 (offsets_at): Likewise.
16776 (init_eliminable_invariants): Likewise.
16777 * rtl.h (union rtunion): Likewise.
16778 (poly_int_rtx_p): Likewise.
16779 (strip_offset): Likewise.
16780 (strip_offset_and_add): Likewise.
16781 * rtlanal.cc (strip_offset): Likewise.
16782 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
16783 (get_addr_base_and_unit_offset_1): Likewise.
16784 (get_addr_base_and_unit_offset): Likewise.
16785 * tree-dfa.h (get_ref_base_and_extent): Likewise.
16786 (get_addr_base_and_unit_offset_1): Likewise.
16787 (get_addr_base_and_unit_offset): Likewise.
16788 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
16789 (strip_offset): Likewise.
16790 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
16791 * tree.cc (ptrdiff_tree_p): Likewise.
16792 * tree.h (poly_int_tree_p): Likewise.
16793 (ptrdiff_tree_p): Likewise.
16794 (get_inner_reference): Likewise.
16796 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
16798 * config/pa/pa.md (memory_barrier): Revise comment.
16799 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
16800 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
16802 2023-09-29 Jakub Jelinek <jakub@redhat.com>
16804 * vec.h (quick_insert, ordered_remove, unordered_remove,
16805 block_remove, qsort, sort, stablesort, quick_grow): Guard
16806 std::is_trivially_{copyable,default_constructible} and
16807 vec_detail::is_trivially_copyable_or_pair static assertions
16808 with GCC_VERSION >= 5000.
16809 (vec_detail::is_trivially_copyable_or_pair): Guard definition
16810 with GCC_VERSION >= 5000.
16812 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
16814 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
16815 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
16816 and aarch64_stp_policy to aarch64_ldp_stp_policy.
16817 (enum aarch64_stp_policy): Removed.
16818 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
16819 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
16820 and left only the definitions to the aarch64-opts one.
16821 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
16822 (aarch64_parse_stp_policy): Removed.
16823 (aarch64_override_options_internal): Removed calls to parsing
16824 functions and added obvious direct assignments.
16825 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
16826 code quality based on the new changes.
16827 * config/aarch64/aarch64.opt: Use single enum type
16828 aarch64_ldp_stp_policy for both ldp and stp options.
16830 2023-09-29 Richard Biener <rguenther@suse.de>
16832 PR tree-optimization/111583
16833 * tree-loop-distribution.cc (find_single_drs): Ensure the
16834 load/store are always executed.
16836 2023-09-29 Jakub Jelinek <jakub@redhat.com>
16838 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
16839 quick_grow_cleared method on unprom rather than quick_grow.
16841 2023-09-29 Sergei Trofimovich <siarheit@google.com>
16843 PR middle-end/111505
16844 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
16845 Add new helper. Use helper instead of memset() to wipe out pointers.
16847 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
16849 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
16851 * builtins.cc (c_readstr): Likewise. Build a local array of
16852 bytes and use native_decode_rtx to get the rtx image.
16853 (builtin_memcpy_read_str): Simplify accordingly.
16854 (builtin_strncpy_read_str): Likewise.
16855 (builtin_memset_read_str): Likewise.
16856 (builtin_memset_gen_str): Likewise.
16857 * expr.cc (string_cst_read_str): Likewise.
16859 2023-09-29 Jakub Jelinek <jakub@redhat.com>
16861 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
16862 instead of quick_grow on vec<bitmap_head> members.
16863 * cfganal.cc (control_dependences::control_dependences): Likewise.
16864 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
16865 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
16866 on auto_vec<bitmap_head> vars.
16867 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
16868 of quick_grow on vec<bitmap_head> var.
16870 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
16873 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
16875 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
16878 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
16881 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
16882 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
16883 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
16885 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
16888 2023-09-28 Pan Li <pan2.li@intel.com>
16891 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
16893 * config/riscv/vector-iterators.md: New iterator.
16895 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
16897 * rtl.h (lra_in_progress): Change type to bool.
16898 (ira_in_progress): Add new extern.
16899 * ira.cc (ira_in_progress): New global.
16900 (pass_ira::execute): Set up ira_in_progress.
16901 * lra.cc: (lra_in_progress): Change type to bool and initialize.
16902 (lra): Use bool values for lra_in_progress.
16903 * lra-eliminations.cc (init_elim_table): Ditto.
16905 2023-09-28 Richard Biener <rguenther@suse.de>
16908 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
16909 Use a heap allocated worklist for CFG traversal instead of
16912 2023-09-28 Jakub Jelinek <jakub@redhat.com>
16913 Jonathan Wakely <jwakely@redhat.com>
16915 * vec.h: Mention in file comment limited support for non-POD types
16916 in some operations.
16917 (vec_destruct): New function template.
16918 (release): Use it for non-trivially destructible T.
16919 (truncate): Likewise.
16920 (quick_push): Perform a placement new into slot
16921 instead of assignment.
16922 (pop): For non-trivially destructible T return void
16923 rather than T & and destruct the popped element.
16924 (quick_insert, ordered_remove): Note that they aren't suitable
16925 for non-trivially copyable types. Add static_asserts for that.
16926 (block_remove): Assert T is trivially copyable.
16927 (vec_detail::is_trivially_copyable_or_pair): New trait.
16928 (qsort, sort, stablesort): Assert T is trivially copyable or
16929 std::pair with both trivally copyable types.
16930 (quick_grow): Add assert T is trivially default constructible,
16931 for now commented out.
16932 (quick_grow_cleared): Don't call quick_grow, instead inline it
16933 by hand except for the new static_assert.
16934 (gt_ggc_mx): Assert T is trivially destructable.
16935 (auto_vec::operator=): Formatting fixes.
16936 (auto_vec::auto_vec): Likewise.
16937 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
16938 it manually and call quick_grow_cleared method rather than quick_grow.
16939 (safe_grow_cleared): Likewise.
16940 * edit-context.cc (class line_event): Move definition earlier.
16941 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
16943 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
16944 safe_grow_cleared instead of safe_grow followed by placement new
16945 constructing the elements.
16947 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
16949 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
16950 * tree-affine.cc (expr_to_aff_combination): Likewise.
16952 2023-09-28 Richard Biener <rguenther@suse.de>
16954 PR tree-optimization/111614
16955 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
16956 convert the first vector when required.
16958 2023-09-28 xuli <xuli1@eswincomputing.com>
16961 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
16962 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
16964 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
16966 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
16968 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
16971 * configure: Regenerate.
16972 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
16974 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
16975 Philipp Tomsich <philipp.tomsich@vrull.eu>
16976 Manolis Tsamis <manolis.tsamis@vrull.eu>
16978 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
16980 (enum aarch64_stp_policy): New enum type.
16981 * config/aarch64/aarch64-protos.h (struct tune_params): Add
16982 appropriate enums for the policies.
16983 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
16984 * config/aarch64/aarch64-tuning-flags.def
16985 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
16987 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
16988 function to parse ldp-policy parameter.
16989 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
16990 (aarch64_override_options_internal): Call parsing functions.
16991 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
16992 (aarch64_operands_ok_for_ldpstp): Add call to
16993 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
16994 check and alignment check and remove superseded ones.
16995 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
16996 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
16997 check and alignment check and remove superseded ones.
16998 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
16999 (aarch64-stp-policy): New param.
17000 * doc/invoke.texi: Document the parameters accordingly.
17002 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
17004 * tree-data-ref.cc (include calls.h): Add new include.
17005 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
17007 2023-09-27 Richard Biener <rguenther@suse.de>
17009 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
17011 2023-09-27 Jakub Jelinek <jakub@redhat.com>
17014 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
17015 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
17017 * function.cc (assign_parm_find_data_types): Likewise.
17019 2023-09-27 Pan Li <pan2.li@intel.com>
17021 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
17022 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
17023 (enum insn_type): Ditto.
17024 (expand_vec_roundeven): New func decl.
17025 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
17027 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17030 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
17032 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17034 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
17036 2023-09-27 Pan Li <pan2.li@intel.com>
17038 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
17039 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
17040 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
17041 (expand_vec_trunc): Ditto.
17043 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
17047 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
17048 Handle failure from expand_builtin_atomic_test_and_set.
17049 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
17050 generate atomic code through target support, return NULL
17051 instead of emitting non-atomic code. Also, for code handling
17052 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
17053 from calling emit_store_flag_force instead of returning NULL.
17055 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
17057 PR tree-optimization/111599
17058 * value-relation.cc (relation_oracle::valid_equivs): Ensure
17061 2023-09-26 Andrew Pinski <apinski@marvell.com>
17063 PR tree-optimization/106164
17064 PR tree-optimization/111456
17065 * match.pd (`(A ==/!= B) & (A CMP C)`):
17066 Support an optional cast on the second A.
17067 (`(A ==/!= B) | (A CMP C)`): Likewise.
17069 2023-09-26 Andrew Pinski <apinski@marvell.com>
17071 PR tree-optimization/111469
17072 * tree-ssa-phiopt.cc (minmax_replacement): Fix
17073 the assumption for the `non-diamond` handling cases
17076 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17078 * match.pd: Optimize COND_ADD reduction pattern.
17080 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17082 PR tree-optimization/111594
17083 PR tree-optimization/110660
17084 * match.pd: Optimize COND_LEN_ADD reduction.
17086 2023-09-26 Pan Li <pan2.li@intel.com>
17088 * config/riscv/autovec.md (round<mode>2): New pattern.
17089 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
17090 (enum insn_type): Ditto.
17091 (expand_vec_round): New function decl.
17092 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
17094 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
17096 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
17098 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
17100 PR middle-end/111547
17101 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
17102 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
17104 2023-09-26 Pan Li <pan2.li@intel.com>
17106 * config/riscv/autovec.md (rint<mode>2): New pattern.
17107 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
17108 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
17110 2023-09-26 Pan Li <pan2.li@intel.com>
17112 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
17113 * config/riscv/riscv-protos.h (enum insn_type): New enum.
17114 (expand_vec_nearbyint): New function decl.
17115 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
17117 2023-09-26 Pan Li <pan2.li@intel.com>
17119 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
17120 (get_fp_rounding_coefficient): Rename.
17121 (gen_floor_const_fp): Remove.
17122 (expand_vec_ceil): Take renamed func.
17123 (expand_vec_floor): Ditto.
17125 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
17127 PR middle-end/111497
17128 * lra-constraints.cc (lra_constraints): Copy substituted
17130 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
17132 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
17134 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
17135 return statement in the varying case.
17137 2023-09-25 Xi Ruoyao <xry111@xry111.site>
17139 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
17141 2023-09-25 Andrew Pinski <apinski@marvell.com>
17143 PR tree-optimization/110386
17144 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
17146 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17149 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
17151 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
17154 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
17157 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
17160 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
17161 target_option_default_node when the callee has no option
17162 attributes, also simplify the existing code accordingly.
17164 2023-09-25 Guo Jie <guojie@loongson.cn>
17166 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
17167 pattern for vector construction.
17168 (vec_set<mode>_internal): Ditto.
17169 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
17170 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
17171 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
17172 Optimized the implementation of vector construction.
17173 (loongarch_expand_vector_init_same): New function.
17174 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
17175 pattern for vector construction.
17176 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
17178 (vec_concatv2df): Ditto.
17179 (vec_concatv4sf): Ditto.
17181 2023-09-24 Pan Li <pan2.li@intel.com>
17184 * config/riscv/riscv-v.cc
17185 (expand_vector_init_merge_repeating_sequence): Bugfix
17187 2023-09-24 Andrew Pinski <apinski@marvell.com>
17189 PR tree-optimization/111543
17190 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
17192 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17194 * config/riscv/autovec-opt.md: Extend VLS modes
17195 * config/riscv/vector-iterators.md: Ditto.
17197 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17199 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
17201 2023-09-23 Pan Li <pan2.li@intel.com>
17203 * config/riscv/autovec.md (floor<mode>2): New pattern.
17204 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
17205 (enum insn_type): Ditto.
17206 (expand_vec_floor): New function decl.
17207 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
17208 (expand_vec_floor): Ditto.
17210 2023-09-22 Pan Li <pan2.li@intel.com>
17212 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
17213 (emit_vec_float_cmp_mask): Rename.
17214 (expand_vec_copysign): Ditto.
17215 (emit_vec_copysign): Ditto.
17216 (emit_vec_abs): New function impl.
17217 (emit_vec_cvt_x_f): Ditto.
17218 (emit_vec_cvt_f_x): Ditto.
17219 (expand_vec_ceil): Ditto.
17221 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17223 * config/riscv/vector-iterators.md: Extend VLS modes.
17225 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17227 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
17228 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
17229 (vec_duplicate<mode>): Ditto.
17231 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17233 * config/riscv/autovec.md: Add VLS conditional patterns.
17234 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
17235 (expand_cond_binop): Ditto.
17236 (expand_cond_ternop): Ditto.
17237 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
17238 (expand_cond_binop): Ditto.
17239 (expand_cond_ternop): Ditto.
17241 2023-09-22 xuli <xuli1@eswincomputing.com>
17244 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
17245 into vrgatherei16.vv.
17247 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
17249 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
17250 New combine patterns.
17251 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
17253 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
17255 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
17256 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
17258 2023-09-22 Pan Li <pan2.li@intel.com>
17260 * config/riscv/autovec.md (ceil<mode>2): New pattern.
17261 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
17262 (enum insn_type): Ditto.
17263 (expand_vec_ceil): New function decl.
17264 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
17265 (expand_vec_float_cmp_mask): Ditto.
17266 (expand_vec_copysign): Ditto.
17267 (expand_vec_ceil): Ditto.
17268 * config/riscv/vector.md: Add VLS mode support.
17270 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17272 * config/riscv/autovec.md: Extend VLS modes.
17274 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17276 * config/riscv/vector-iterators.md: Extend VLS modes.
17278 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
17279 Robin Dapp <rdapp.gcc@gmail.com>
17281 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
17282 (emit_nonvlmax_insn): Adjust comments.
17283 (emit_vlmax_insn_lra): Adjust comments.
17285 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17287 * config.gcc (*linux*): Set rust target_objs, and
17288 target_has_targetrustm,
17289 * config/t-linux (linux-rust.o): New rule.
17290 * config/linux-rust.cc: New file.
17292 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17294 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
17295 rust_target_objs and target_has_targetrustm.
17296 * config/t-winnt (winnt-rust.o): New rule.
17297 * config/winnt-rust.cc: New file.
17299 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17301 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
17302 and target_has_targetrustm.
17303 * config/fuchsia-rust.cc: New file.
17304 * config/t-fuchsia: New file.
17306 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17308 * config.gcc (*-*-vxworks*): Set rust_target_objs and
17309 target_has_targetrustm.
17310 * config/t-vxworks (vxworks-rust.o): New rule.
17311 * config/vxworks-rust.cc: New file.
17313 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17315 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
17316 target_has_targetrustm.
17317 * config/t-dragonfly (dragonfly-rust.o): New rule.
17318 * config/dragonfly-rust.cc: New file.
17320 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17322 * config.gcc (*-*-solaris2*): Set rust_target_objs and
17323 target_has_targetrustm.
17324 * config/t-sol2 (sol2-rust.o): New rule.
17325 * config/sol2-rust.cc: New file.
17327 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17329 * config.gcc (*-*-openbsd*): Set rust_target_objs and
17330 target_has_targetrustm.
17331 * config/t-openbsd (openbsd-rust.o): New rule.
17332 * config/openbsd-rust.cc: New file.
17334 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17336 * config.gcc (*-*-netbsd*): Set rust_target_objs and
17337 target_has_targetrustm.
17338 * config/t-netbsd (netbsd-rust.o): New rule.
17339 * config/netbsd-rust.cc: New file.
17341 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17343 * config.gcc (*-*-freebsd*): Set rust_target_objs and
17344 target_has_targetrustm.
17345 * config/t-freebsd (freebsd-rust.o): New rule.
17346 * config/freebsd-rust.cc: New file.
17348 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17350 * config.gcc (*-*-darwin*): Set rust_target_objs and
17351 target_has_targetrustm.
17352 * config/t-darwin (darwin-rust.o): New rule.
17353 * config/darwin-rust.cc: New file.
17355 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17357 * config/i386/t-i386 (i386-rust.o): New rule.
17358 * config/i386/i386-rust.cc: New file.
17359 * config/i386/i386-rust.h: New file.
17361 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17363 * doc/tm.texi: Regenerate.
17364 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
17366 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17368 * doc/tm.texi: Regenerate.
17369 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
17370 TARGET_RUST_CPU_INFO.
17372 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17374 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
17375 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
17376 (tm_rust.h, cs-tm_rust.h, default-rust.o,
17377 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
17378 (s-tm-texi): Also check timestamp on rust-target.def.
17379 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
17380 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
17381 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
17383 * configure: Regenerate.
17384 * configure.ac (tm_rust_file_list, tm_rust_include_list,
17385 rust_target_objs): Add substitutes.
17386 * doc/tm.texi: Regenerate.
17387 * doc/tm.texi.in (targetrustm): Document.
17388 (target_has_targetrustm): Document.
17389 * genhooks.cc: Include rust/rust-target.def.
17390 * config/default-rust.cc: New file.
17392 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17395 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
17396 * config/riscv/predicates.md (autovec_else_operand): New predicate.
17397 * config/riscv/riscv-v.cc (get_else_operand): New function.
17398 (expand_cond_len_unop): Adapt ELSE value.
17399 (expand_cond_len_binop): Ditto.
17400 (expand_cond_len_ternop): Ditto.
17401 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
17402 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
17404 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17407 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
17409 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
17411 PR tree-optimization/111355
17412 * match.pd ((X + C) / N): Update pattern.
17414 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
17416 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
17418 2023-09-21 xuli <xuli1@eswincomputing.com>
17421 * config/riscv/constraints.md (c01): const_int 1.
17422 (c02): const_int 2.
17423 (c04): const_int 4.
17424 (c08): const_int 8.
17425 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
17426 (vector_eew16_stride_operand): Ditto.
17427 (vector_eew32_stride_operand): Ditto.
17428 (vector_eew64_stride_operand): Ditto.
17429 * config/riscv/vector-iterators.md: New iterator for stride operand.
17430 * config/riscv/vector.md: Add stride = element width constraint.
17432 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
17434 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
17435 (const_1_or_4_operand): Ditto.
17436 (vector_gs_scale_operand_16): Ditto.
17437 (vector_gs_scale_operand_32): Ditto.
17438 * config/riscv/vector-iterators.md: Adjust.
17440 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17442 * config/riscv/autovec.md: Extend VLS modes.
17443 * config/riscv/vector-iterators.md: Ditto.
17444 * config/riscv/vector.md: Ditto.
17446 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
17448 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
17449 of the return value.
17450 (ssa_cache::dump): Don't print GLOBAL RANGE header.
17451 (ssa_lazy_cache::merge_range): Adjust return value meaning.
17452 (ranger_cache::dump): Print GLOBAL RANGE header.
17454 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
17456 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
17458 (foperator_unordered_gt::fold_range): Same.
17459 (foperator_unordered_lt::fold_range): Same.
17460 (foperator_unordered_le::fold_range): Same.
17462 2023-09-20 Jakub Jelinek <jakub@redhat.com>
17464 * builtins.h (type_to_class): Declare.
17465 * builtins.cc (type_to_class): No longer static. Return
17466 int rather than enum.
17467 * doc/extend.texi (__builtin_classify_type): Document.
17469 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17472 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
17473 * optabs.cc (maybe_legitimize_operand): Ditto.
17474 (can_reuse_operands_p): Ditto.
17475 * optabs.h (enum expand_operand_type): Ditto.
17476 (create_undefined_input_operand): Ditto.
17478 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
17480 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
17481 'omp allocate' variables; move stack cleanup after other
17483 (omp_notice_variable): Process original decl when decl
17484 of the value-expression for a 'omp allocate' variable is passed.
17485 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
17487 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
17489 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
17490 support simplifying vector int not only scalar int.
17492 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17494 * config/riscv/vector-iterators.md: Extend VLS floating-point.
17496 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17498 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
17500 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
17503 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
17504 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
17506 2023-09-20 Richard Biener <rguenther@suse.de>
17508 PR tree-optimization/111489
17509 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
17511 2023-09-20 Richard Biener <rguenther@suse.de>
17513 PR tree-optimization/111489
17514 * doc/invoke.texi (--param uninit-max-chain-len): Document.
17515 (--param uninit-max-num-chains): Likewise.
17516 * params.opt (-param=uninit-max-chain-len=): New.
17517 (-param=uninit-max-num-chains=): Likewise.
17518 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
17519 param_uninit_max_num_chains.
17520 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
17521 (uninit_analysis::init_use_preds): Avoid VLA.
17522 (uninit_analysis::init_from_phi_def): Likewise.
17523 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
17524 template parameter.
17526 2023-09-20 Jakub Jelinek <jakub@redhat.com>
17528 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
17529 GET_MODE_PRECISION of TImode or DImode depending on whether
17530 TImode is supported scalar mode.
17531 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
17532 * expr.cc (expand_expr_real_1): Likewise.
17533 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
17534 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
17536 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
17538 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
17539 (*n<optab><mode>): Ditto.
17540 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
17541 (*<any_shiftrt:optab>trunc<mode>): Ditto.
17542 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
17543 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
17544 (*single_widen_mult<any_extend:su><mode>): Ditto.
17545 (*single_widen_mul<any_extend:su><mode>): Ditto.
17546 (*single_widen_mult<mode>): Ditto.
17547 (*single_widen_mul<mode>): Ditto.
17548 (*dual_widen_fma<mode>): Ditto.
17549 (*dual_widen_fma<su><mode>): Ditto.
17550 (*single_widen_fma<mode>): Ditto.
17551 (*single_widen_fma<su><mode>): Ditto.
17552 (*dual_fma<mode>): Ditto.
17553 (*single_fma<mode>): Ditto.
17554 (*dual_fnma<mode>): Ditto.
17555 (*dual_widen_fnma<mode>): Ditto.
17556 (*single_fnma<mode>): Ditto.
17557 (*single_widen_fnma<mode>): Ditto.
17558 (*dual_fms<mode>): Ditto.
17559 (*dual_widen_fms<mode>): Ditto.
17560 (*single_fms<mode>): Ditto.
17561 (*single_widen_fms<mode>): Ditto.
17562 (*dual_fnms<mode>): Ditto.
17563 (*dual_widen_fnms<mode>): Ditto.
17564 (*single_fnms<mode>): Ditto.
17565 (*single_widen_fnms<mode>): Ditto.
17567 2023-09-20 Jakub Jelinek <jakub@redhat.com>
17570 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
17571 on vars or function decls if -fopenmp or -fopenmp-simd.
17573 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
17576 * config/riscv/autovec-opt.md: Add missed operand.
17578 2023-09-20 Omar Sandoval <osandov@osandov.com>
17581 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
17582 dwarf_split_debug_info.
17584 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17586 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
17587 (vectorize_related_mode): Add VLS related modes.
17588 * config/riscv/vector-iterators.md: Extend VLS modes.
17590 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
17592 PR rtl-optimization/110071
17593 * ira-color.cc (improve_allocation): Consider cost of callee
17596 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
17597 Xi Ruoyao <xry111@xry111.site>
17599 * configure: Regenerate.
17600 * configure.ac: Checking assembler for -mno-relax support.
17601 Disable relaxation when probing leb128 support.
17603 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
17605 * config.in: Regenerate.
17606 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
17607 mrelax. And set the initial value of explicit-relocs according to the
17609 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
17610 --no-relax option to the linker.
17611 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
17612 -mno-relax, pass the -mno-relax option to the assembler.
17613 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
17614 * config/loongarch/loongarch.opt: Regenerate.
17615 * configure: Regenerate.
17616 * configure.ac: Add detection of support for binutils relax function.
17618 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
17620 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
17621 -fdeps-target= flags.
17622 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
17623 only -fdeps-format= is specified.
17624 * json.h: Add a TODO item to refactor out to share with
17625 `libcpp/mkdeps.cc`.
17627 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
17628 Jason Merrill <jason@redhat.com>
17630 * gcc.cc (join_spec_func): Add a spec function to join all
17633 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
17635 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
17636 src_op_0 var to avoid rtl check error.
17638 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
17640 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
17642 (operator_not_equal::fold_range): Handle VREL_EQ.
17643 (operator_lt::fold_range): Remove special casing for VREL_EQ.
17644 (operator_gt::fold_range): Same.
17645 (foperator_unordered_equal::fold_range): Same.
17647 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
17649 * doc/extend.texi: Document attributes hot, cold on C++ types.
17651 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
17653 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
17654 modulo instruction is disabled.
17655 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
17656 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
17657 (define_expand umod<mode>3): New.
17658 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
17659 instruction is disabled.
17660 (umodti3, modti3): Check if the modulo instruction is disabled.
17662 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
17664 * doc/gm2.texi (fdebug-builtins): Correct description.
17666 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
17668 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
17669 * config/iq2000/iq2000.md (rotrsi3): Use it.
17671 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
17673 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
17674 (operator_lt::op2_range): Same.
17675 (operator_le::op1_range): Same.
17676 (operator_le::op2_range): Same.
17677 (operator_gt::op1_range): Same.
17678 (operator_gt::op2_range): Same.
17679 (operator_ge::op1_range): Same.
17680 (operator_ge::op2_range): Same.
17681 (foperator_unordered_lt::op1_range): Same.
17682 (foperator_unordered_lt::op2_range): Same.
17683 (foperator_unordered_le::op1_range): Same.
17684 (foperator_unordered_le::op2_range): Same.
17685 (foperator_unordered_gt::op1_range): Same.
17686 (foperator_unordered_gt::op2_range): Same.
17687 (foperator_unordered_ge::op1_range): Same.
17688 (foperator_unordered_ge::op2_range): Same.
17690 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
17692 * value-range.h (frange::update_nan): New.
17694 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
17696 * range-op-float.cc (operator_not_equal::op2_range): New.
17697 * range-op-mixed.h: Add operator_not_equal::op2_range.
17699 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
17701 PR tree-optimization/110080
17702 PR tree-optimization/110249
17703 * tree-vrp.cc (remove_unreachable::final_p): New.
17704 (remove_unreachable::maybe_register): Rename from
17705 maybe_register_block and call early or final routine.
17706 (fully_replaceable): New.
17707 (remove_unreachable::handle_early): New.
17708 (remove_unreachable::remove_and_update_globals): Remove
17709 non-final processing.
17710 (rvrp_folder::rvrp_folder): Add final flag to constructor.
17711 (rvrp_folder::post_fold_bb): Remove unreachable registration.
17712 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
17713 (execute_ranger_vrp): Adjust some call parameters.
17715 2023-09-19 Richard Biener <rguenther@suse.de>
17718 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
17720 * tree-pretty-print.cc (op_symbol): Likewise.
17721 (op_symbol_code): Print TDF_GIMPLE variant if requested.
17722 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
17724 (dump_gimple_cond): Likewise.
17726 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
17727 Pan Li <pan2.li@intel.com>
17729 * tree-streamer.h (bp_unpack_machine_mode): If
17730 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
17732 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17734 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
17736 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17738 * config/riscv/autovec.md: Extend VLS modes.
17739 * config/riscv/vector.md: Ditto.
17741 2023-09-19 Richard Biener <rguenther@suse.de>
17743 PR tree-optimization/111465
17744 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
17745 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
17747 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17749 * config/riscv/autovec.md: Extend VLS floating-point modes.
17750 * config/riscv/vector.md: Ditto.
17752 2023-09-19 Jakub Jelinek <jakub@redhat.com>
17754 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
17755 nor check type_has_mode_precision_p for width larger than [TD]Imode
17757 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
17758 to type. Use boolean_true_node instead of
17759 constant_boolean_node (true, boolean_type_node). Formatting fixes.
17761 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17763 * config/riscv/autovec.md: Add VLS modes.
17764 * config/riscv/vector.md: Ditto.
17766 2023-09-19 Jakub Jelinek <jakub@redhat.com>
17768 * tree.cc (build_bitint_type): Assert precision is not 0, or
17769 for signed types 1.
17770 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
17771 of unsigned _BitInt(1).
17773 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
17775 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
17776 Removed old combine patterns.
17777 (*single_<optab>mult_plus<mode>): Ditto.
17778 (*double_<optab>mult_plus<mode>): Ditto.
17779 (*sign_zero_extend_fma): Ditto.
17780 (*zero_sign_extend_fma): Ditto.
17781 (*double_widen_fma<mode>): Ditto.
17782 (*single_widen_fma<mode>): Ditto.
17783 (*double_widen_fnma<mode>): Ditto.
17784 (*single_widen_fnma<mode>): Ditto.
17785 (*double_widen_fms<mode>): Ditto.
17786 (*single_widen_fms<mode>): Ditto.
17787 (*double_widen_fnms<mode>): Ditto.
17788 (*single_widen_fnms<mode>): Ditto.
17789 (*reduc_plus_scal_<mode>): Adjust name.
17790 (*widen_reduc_plus_scal_<mode>): Adjust name.
17791 (*dual_widen_fma<mode>): New combine pattern.
17792 (*dual_widen_fmasu<mode>): Ditto.
17793 (*dual_widen_fmaus<mode>): Ditto.
17794 (*dual_fma<mode>): Ditto.
17795 (*single_fma<mode>): Ditto.
17796 (*dual_fnma<mode>): Ditto.
17797 (*single_fnma<mode>): Ditto.
17798 (*dual_fms<mode>): Ditto.
17799 (*single_fms<mode>): Ditto.
17800 (*dual_fnms<mode>): Ditto.
17801 (*single_fnms<mode>): Ditto.
17802 * config/riscv/autovec.md (fma<mode>4):
17803 Reafctor fma pattern.
17804 (*fma<VI:mode><P:mode>): Removed.
17805 (fnma<mode>4): Reafctor.
17806 (*fnma<VI:mode><P:mode>): Removed.
17807 (*fma<VF:mode><P:mode>): Removed.
17808 (*fnma<VF:mode><P:mode>): Removed.
17809 (fms<mode>4): Reafctor.
17810 (*fms<VF:mode><P:mode>): Removed.
17811 (fnms<mode>4): Reafctor.
17812 (*fnms<VF:mode><P:mode>): Removed.
17813 * config/riscv/riscv-protos.h (prepare_ternary_operands):
17815 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
17816 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
17817 (*pred_mul_plus<mode>): Removed.
17818 (*pred_mul_plus<mode>_scalar): Removed.
17819 (*pred_mul_plus<mode>_extended_scalar): Removed.
17820 (*pred_minus_mul<mode>_undef): New pattern.
17821 (*pred_minus_mul<mode>): Removed.
17822 (*pred_minus_mul<mode>_scalar): Removed.
17823 (*pred_minus_mul<mode>_extended_scalar): Removed.
17824 (*pred_mul_<optab><mode>_undef): New pattern.
17825 (*pred_mul_<optab><mode>): Removed.
17826 (*pred_mul_<optab><mode>_scalar): Removed.
17827 (*pred_mul_neg_<optab><mode>_undef): New pattern.
17828 (*pred_mul_neg_<optab><mode>): Removed.
17829 (*pred_mul_neg_<optab><mode>_scalar): Removed.
17831 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
17833 * config/riscv/riscv-vector-builtins.cc
17834 (builtin_decl, expand_builtin): Replace SVE with RVV.
17836 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
17838 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
17839 riscv-cmo.def and riscv-scalar-crypto.def.
17841 2023-09-18 Pan Li <pan2.li@intel.com>
17843 * config/riscv/autovec.md: Extend to vls mode.
17845 2023-09-18 Pan Li <pan2.li@intel.com>
17847 * config/riscv/autovec.md: Bugfix.
17848 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
17850 2023-09-18 Andrew Pinski <apinski@marvell.com>
17852 PR tree-optimization/111442
17853 * match.pd (zero_one_valued_p): Have the bit_and match not be
17856 2023-09-18 Andrew Pinski <apinski@marvell.com>
17858 PR tree-optimization/111435
17859 * match.pd (zero_one_valued_p): Don't do recursion
17862 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
17864 * config/darwin-protos.h (enum darwin_external_toolchain): New.
17865 * config/darwin.cc (DSYMUTIL_VERSION): New.
17866 (darwin_override_options): Choose the default debug DWARF version
17867 depending on the configured dsymutil version.
17869 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
17871 * configure: Regenerate.
17872 * configure.ac: Handle explict disable of stdlib option, set
17873 defaults for Darwin.
17875 2023-09-18 Andrew Pinski <apinski@marvell.com>
17877 PR tree-optimization/111431
17878 * match.pd (`(a == CST) & a`): New pattern.
17880 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17882 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
17883 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
17885 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
17888 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
17889 Add support for immediates using shifted ORR/BIC.
17890 (aarch64_split_dimode_const_store): Apply if we save one instruction.
17891 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
17892 Make pattern global.
17894 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
17896 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
17897 (neoverse-v1): Place before zeus.
17898 (neoverse-v2): Place before demeter.
17899 * config/aarch64/aarch64-tune.md: Regenerate.
17901 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17903 * config/riscv/autovec.md: Add VLS modes.
17904 * config/riscv/vector-iterators.md: Ditto.
17905 * config/riscv/vector.md: Ditto.
17907 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17909 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
17910 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
17912 2023-09-18 Richard Biener <rguenther@suse.de>
17914 PR tree-optimization/111294
17915 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
17917 (back_threader::find_paths_to_names): Adjust.
17918 (back_threader::maybe_thread_block): Likewise.
17919 (back_threader_profitability::possibly_profitable_path_p): Remove
17920 code applying extra costs to copies PHIs.
17922 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17924 * config/riscv/autovec.md: Extend VLS modes.
17925 * config/riscv/vector.md: Ditto.
17927 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17929 * config/riscv/vector.md (mov<mode>): New pattern.
17930 (*mov<mode>_mem_to_mem): Ditto.
17931 (*mov<mode>): Ditto.
17932 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
17933 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
17934 (*mov<mode>_vls): Ditto.
17935 (movmisalign<mode>): Ditto.
17936 (@vec_duplicate<mode>): Ditto.
17937 * config/riscv/autovec-vls.md: Removed.
17939 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17942 * config/riscv/autovec.md: Add VLS modes.
17944 2023-09-18 Jason Merrill <jason@redhat.com>
17946 * doc/gty.texi: Add discussion of cache vs. deletable.
17948 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17950 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
17951 (copysign<mode>3): Ditto.
17952 (xorsign<mode>3): Ditto.
17953 (<optab><mode>2): Ditto.
17954 * config/riscv/autovec.md: Extend VLS modes.
17956 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
17958 PR middle-end/111303
17959 * match.pd ((t * 2) / 2): Update pattern.
17961 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
17963 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
17965 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17968 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
17969 (vec_extract<mode><vel>): Ditto.
17970 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
17971 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
17972 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
17974 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
17976 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
17977 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
17978 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
17979 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
17980 new insn/expansions.
17981 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
17982 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
17983 (*riscv_<sha256_op>_si): New raw instruction for RV32.
17984 (*riscv_<sm3_op>_si): Ditto.
17985 (*riscv_<sm4_op>_si): Ditto.
17986 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
17987 (riscv_<sm3_op>_di_extended): Ditto.
17988 (riscv_<sm4_op>_di_extended): Ditto.
17989 (riscv_<sha256_op>_si): New common instruction expansion.
17990 (riscv_<sm3_op>_si): Ditto.
17991 (riscv_<sm4_op>_si): Ditto.
17992 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
17993 "crypto_zksh" and "crypto_zksed". Remove availability
17994 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
17995 * config/riscv/riscv-ftypes.def: Remove unused function type.
17996 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
17997 intrinsics to operate on uint32_t.
17999 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
18001 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
18002 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
18003 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
18004 Removed as no longer used.
18005 (RISCV_ATYPE_UDI): New for uint64_t.
18006 * config/riscv/riscv-cmo.def: Make types unsigned for not working
18007 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
18008 argument/return types.
18009 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
18010 number and shift amount types unsigned.
18011 * config/riscv/riscv-scalar-crypto.def: Ditto.
18013 2023-09-16 Pan Li <pan2.li@intel.com>
18015 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
18017 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
18019 * config/riscv/predicates.md: Restrict predicate
18020 to allow 'reg' only.
18022 2023-09-15 Andrew Pinski <apinski@marvell.com>
18024 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
18025 Also match `a & zero_one_valued_p` too.
18027 2023-09-15 Andrew Pinski <apinski@marvell.com>
18029 PR tree-optimization/111414
18030 * match.pd (`(1 >> X) != 0`): Check to see if
18031 the integer_onep was an integral type (not a vector type).
18033 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
18035 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
18036 run phi analysis, and do it before loop analysis.
18038 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
18040 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
18043 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
18045 PR tree-optimization/111407
18046 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
18047 when one of the operands is subject to abnormal coalescing.
18049 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
18051 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
18052 (enum insn_type): Ditto.
18053 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
18054 (emit_vlmax_insn): Adjust.
18055 (emit_nonvlmax_insn): Adjust.
18056 (emit_vlmax_insn_lra): Adjust.
18058 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
18060 * config/riscv/autovec-opt.md: Adjust.
18061 * config/riscv/autovec.md: Ditto.
18062 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
18063 (expand_reduction): Adjust expand_reduction prototype.
18064 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
18065 (expand_reduction): Refactor expand_reduction.
18067 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
18070 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
18071 the lower memory access to a mem-pair operand.
18073 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
18075 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
18076 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
18077 before the driver canonicalization routines.
18078 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
18079 to loongarch-driver.h
18080 * config/loongarch/t-linux: Move multilib-related definitions to
18082 * config/loongarch/t-multilib: New file. Inject library build
18083 options obtained from --with-multilib-list.
18084 * config/loongarch/t-loongarch: Same.
18086 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
18089 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
18090 New combine pattern.
18091 (*fold_left_widen_plus_<mode>): Ditto.
18092 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
18093 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
18094 Change from define_expand to define_insn_and_split.
18095 (fold_left_plus_<mode>): Ditto.
18096 (mask_len_fold_left_plus_<mode>): Ditto.
18097 * config/riscv/riscv-v.cc (expand_reduction):
18098 Support widen reduction.
18099 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
18100 Add new iterators and attrs.
18102 2023-09-14 David Malcolm <dmalcolm@redhat.com>
18104 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
18105 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
18106 (sarif_thread_flow::sarif_thread_flow): New.
18107 (sarif_builder::make_code_flow_object): Reimplement, creating
18108 per-thread threadFlow objects, populating them with the relevant
18110 (sarif_builder::make_thread_flow_object): Delete, moving the
18111 code into sarif_builder::make_code_flow_object.
18112 (sarif_builder::make_thread_flow_location_object): Add
18113 "path_event_idx" param. Use it to set "executionOrder"
18115 * diagnostic-path.h (diagnostic_event::get_thread_id): New
18116 pure-virtual vfunc.
18117 (class diagnostic_thread): New.
18118 (diagnostic_path::num_threads): New pure-virtual vfunc.
18119 (diagnostic_path::get_thread): New pure-virtual vfunc.
18120 (diagnostic_path::multithreaded_p): New decl.
18121 (simple_diagnostic_event::simple_diagnostic_event): Add optional
18123 (simple_diagnostic_event::get_thread_id): New accessor.
18124 (simple_diagnostic_event::m_thread_id): New.
18125 (class simple_diagnostic_thread): New.
18126 (simple_diagnostic_path::simple_diagnostic_path): Move definition
18128 (simple_diagnostic_path::num_threads): New.
18129 (simple_diagnostic_path::get_thread): New.
18130 (simple_diagnostic_path::add_thread): New.
18131 (simple_diagnostic_path::add_thread_event): New.
18132 (simple_diagnostic_path::m_threads): New.
18133 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
18134 param for overriding the context's printer.
18135 (diagnostic_show_locus): Likwise.
18136 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
18137 Move here from diagnostic-path.h. Add main thread.
18138 (simple_diagnostic_path::num_threads): New.
18139 (simple_diagnostic_path::get_thread): New.
18140 (simple_diagnostic_path::add_thread): New.
18141 (simple_diagnostic_path::add_thread_event): New.
18142 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
18143 param and use it to initialize m_thread_id. Reformat.
18144 * diagnostic.h: Add pretty_printer param for overriding the
18146 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
18147 (can_consolidate_events): Compare thread ids.
18148 (class per_thread_summary): New.
18149 (event_range::event_range): Add per_thread_summary arg.
18150 (event_range::print): Add "pp" param and use it rather than dc's
18152 (event_range::m_thread_id): New field.
18153 (event_range::m_per_thread_summary): New field.
18154 (path_summary::multithreaded_p): New.
18155 (path_summary::get_events_for_thread_id): New.
18156 (path_summary::m_per_thread_summary): New field.
18157 (path_summary::m_thread_id_to_events): New field.
18158 (path_summary::get_or_create_events_for_thread_id): New.
18159 (path_summary::path_summary): Create per_thread_summary instances
18160 as needed and associate the event_range instances with them.
18161 (base_indent): Move here from print_path_summary_as_text.
18162 (per_frame_indent): Likewise.
18163 (class thread_event_printer): New, adapted from parts of
18164 print_path_summary_as_text.
18165 (print_path_summary_as_text): Make static. Reimplement to
18166 moving most of existing code to class thread_event_printer,
18167 capturing state as per-thread as appropriate.
18168 (default_tree_diagnostic_path_printer): Add missing 'break' on
18171 2023-09-14 David Malcolm <dmalcolm@redhat.com>
18173 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
18174 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
18175 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
18176 clearing the deletable gcc_root_tab_t.
18177 (ggc_common_finalize): New.
18178 * ggc.h (ggc_common_finalize): New decl.
18179 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
18180 ggc_common_finalize.
18182 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
18184 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
18185 unsigned comparisons.
18186 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
18187 generation of salt/saltu instructions.
18188 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
18189 * config/xtensa/xtensa.md (salt, saltu): New instruction
18192 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
18194 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
18197 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
18199 * config/riscv/autovec.md: Change rtx code to unspec.
18200 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
18201 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
18202 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
18204 (class widen_freducop): Removed.
18205 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
18206 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
18207 (@pred_<reduc_op><mode>): New name.
18208 (@pred_widen_reduc_plus<v_su><mode>): Change name.
18209 (@pred_reduc_plus<order><mode>): Change name.
18210 (@pred_widen_reduc_plus<order><mode>): Change name.
18212 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
18214 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
18215 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
18216 * config/riscv/vector-iterators.md: New iterators and attrs.
18217 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
18219 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
18220 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
18221 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
18222 (@pred_reduc_<reduc><mode>): Added.
18223 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
18224 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
18225 (@pred_widen_reduc_plus<v_su><mode>): Added.
18226 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
18227 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
18228 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
18229 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
18230 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
18231 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
18232 (@pred_reduc_plus<order><mode>): Added.
18233 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
18234 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
18235 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
18236 (@pred_widen_reduc_plus<order><mode>): Added.
18238 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
18240 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
18241 Move WHILELO handling to...
18242 (aarch64_vector_costs::finish_cost): ...here. Check whether the
18243 vectorizer has decided to use a predicated loop.
18245 2023-09-14 Andrew Pinski <apinski@marvell.com>
18247 PR tree-optimization/106164
18248 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
18249 Expand to support constants that are off by one.
18251 2023-09-14 Andrew Pinski <apinski@marvell.com>
18253 * genmatch.cc (parser::parse_result): For an else clause
18254 of an if statement inside a switch, error out explictly.
18256 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18258 * config/riscv/autovec-opt.md: Add VLS mask modes.
18259 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
18260 (vcond_mask_<mode><vm>): Add VLS mask modes.
18261 * config/riscv/vector.md: Ditto.
18263 2023-09-14 Richard Biener <rguenther@suse.de>
18265 PR tree-optimization/111294
18266 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
18267 operands that eventually become dead and use simple_dce_from_worklist
18268 to remove their definitions if they did so.
18270 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
18272 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
18273 Accept all nonimmediate_operands, but keep the existing constraints.
18274 If the instruction is split before RA, load invalid addresses into
18275 a temporary register.
18276 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
18278 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18281 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
18282 (vector_insn_info::global_merge): Ditto.
18283 (vector_insn_info::get_avl_or_vl_reg): Ditto.
18285 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18287 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
18289 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
18291 * config/loongarch/loongarch-def.c: Modify the default value of
18294 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18296 * config/xtensa/xtensa.cc (xtensa_expand_scc):
18297 Revert the changes from the last patch, as the work in the RTL
18298 expansion pass is too far to determine the physical registers.
18299 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
18300 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
18302 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
18305 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
18307 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18309 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
18310 (@vec_extract<mode><vel>): Ditto.
18311 * config/riscv/vector.md: Ditto
18313 2023-09-13 Andrew Pinski <apinski@marvell.com>
18315 * match.pd (`X <= MAX(X, Y)`):
18316 Move before `MIN (X, C1) < C2` pattern.
18318 2023-09-13 Andrew Pinski <apinski@marvell.com>
18320 PR tree-optimization/111364
18321 * match.pd (`MIN (X, Y) == X`): Extend
18322 to min/lt, min/ge, max/gt, max/le.
18324 2023-09-13 Andrew Pinski <apinski@marvell.com>
18326 PR tree-optimization/111345
18327 * match.pd (`Y > (X % Y)`): Merge
18329 (`(X % Y) < Y`): Pattern by adding `:c`
18332 2023-09-13 Richard Biener <rguenther@suse.de>
18334 PR tree-optimization/111387
18335 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
18336 EDGE_DFS_BACK when doing BB vectorization.
18337 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
18338 to compute RPO and mark backedges.
18340 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
18342 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
18343 New combine pattern.
18344 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
18345 (<mulh_table><mode>3_highpart): Merged pattern.
18346 (umul<mode>3_highpart): Mrege smul and umul.
18347 * config/riscv/vector-iterators.md (umul): New iterators.
18348 (UNSPEC_VMULHU): New iterators.
18350 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
18352 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
18353 New combine pattern.
18354 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
18356 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
18358 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
18359 (*cond_copysign<mode>): New combine pattern.
18360 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
18362 2023-09-13 Richard Biener <rguenther@suse.de>
18364 PR tree-optimization/111397
18365 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
18366 argument to specify whether the PHI destination doesn't flow in
18367 from an abnormal PHI.
18368 (propagate_value): Adjust.
18369 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
18371 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
18373 (process_bb): Likewise.
18375 2023-09-13 Pan Li <pan2.li@intel.com>
18378 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
18380 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
18382 PR tree-optimization/111303
18383 * match.pd ((X - N * M) / N): Add undefined_p checking.
18384 ((X + N * M) / N): Likewise.
18385 ((X + C) div_rshift N): Likewise.
18387 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18390 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
18392 2023-09-12 Martin Jambor <mjambor@suse.cz>
18394 * dbgcnt.def (form_fma): New.
18395 * tree-ssa-math-opts.cc: Include dbgcnt.h.
18396 (convert_mult_to_fma): Bail out if the debug counter say so.
18398 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
18400 * config/riscv/autovec-opt.md: Update type
18401 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
18403 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18405 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
18407 (aarch64_layout_frame): Use it to decide whether locals should
18408 go above or below the saved registers.
18409 (aarch64_expand_prologue): Update stack layout comment.
18410 Emit a stack tie after the final adjustment.
18412 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18414 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
18415 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
18416 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
18418 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18420 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
18421 (aarch64_frame::hard_fp_save_and_probe): New fields.
18422 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
18423 Rather than asserting that a leaf function saves LR, instead assert
18424 that a leaf function saves something.
18425 (aarch64_get_separate_components): Prevent the chosen probe
18426 registers from being individually shrink-wrapped.
18427 (aarch64_allocate_and_probe_stack_space): Remove workaround for
18428 probe registers that aren't at the bottom of the previous allocation.
18430 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18432 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
18433 Always probe the residual allocation at offset 1024, asserting
18434 that that is in range.
18436 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18438 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
18439 the LR save slot is in the first 16 bytes of the register save area.
18440 Only form STP/LDP push/pop candidates if both registers are valid.
18441 (aarch64_allocate_and_probe_stack_space): Remove workaround for
18442 when LR was not in the first 16 bytes.
18444 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18446 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
18447 Don't probe final allocations that are exactly 1KiB in size (after
18448 unprobed space above the final allocation has been deducted).
18450 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18452 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
18453 calculation of initial_adjust for frames in which all saves
18456 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18458 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
18459 the allocation of the top of the frame.
18461 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18463 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
18465 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
18466 from the bottom of the frame, rather than the bottom of the saved
18467 register area. Measure reg_offset from the bottom of the frame
18468 rather than the bottom of the saved register area.
18469 (aarch64_save_callee_saves): Update accordingly.
18470 (aarch64_restore_callee_saves): Likewise.
18471 (aarch64_get_separate_components): Likewise.
18472 (aarch64_process_components): Likewise.
18474 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18476 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
18478 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18480 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
18482 (aarch64_frame::bytes_above_hard_fp): ...this.
18483 * config/aarch64/aarch64.cc (aarch64_layout_frame)
18484 (aarch64_expand_prologue): Update accordingly.
18485 (aarch64_initial_elimination_offset): Likewise.
18487 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18489 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
18490 (aarch64_frame::bytes_above_locals): ...this.
18491 * config/aarch64/aarch64.cc (aarch64_layout_frame)
18492 (aarch64_initial_elimination_offset): Update accordingly.
18494 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18496 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
18497 calculation of chain_offset into the emit_frame_chain block.
18499 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18501 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
18502 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
18503 callee_offset handling.
18504 (aarch64_save_callee_saves): Replace the start_offset parameter
18505 with a bytes_below_sp parameter.
18506 (aarch64_restore_callee_saves): Likewise.
18507 (aarch64_expand_prologue): Update accordingly.
18508 (aarch64_expand_epilogue): Likewise.
18510 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18512 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
18514 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
18515 (aarch64_expand_epilogue): Use it instead of
18516 below_hard_fp_saved_regs_size.
18518 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18520 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
18522 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
18523 and use it instead of crtl->outgoing_args_size.
18524 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
18525 of outgoing_args_size.
18526 (aarch64_process_components): Likewise.
18528 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18530 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
18531 allocate the frame in one go if there are no saved registers.
18533 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18535 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
18536 chain_offset rather than callee_offset.
18538 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18540 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
18541 a local shorthand for cfun->machine->frame.
18542 (aarch64_restore_callee_saves, aarch64_get_separate_components):
18543 (aarch64_process_components): Likewise.
18544 (aarch64_allocate_and_probe_stack_space): Likewise.
18545 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
18546 (aarch64_layout_frame): Use existing shorthand for one more case.
18548 2023-09-12 Andrew Pinski <apinski@marvell.com>
18550 PR tree-optimization/107881
18551 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
18552 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
18554 2023-09-12 Pan Li <pan2.li@intel.com>
18556 * config/riscv/riscv-vector-costs.h (struct range): Removed.
18558 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18560 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
18561 (compute_nregs_for_mode): Ditto.
18562 (live_range_conflict_p): Ditto.
18563 (max_number_of_live_regs): Ditto.
18564 (compute_lmul): Ditto.
18565 (costs::prefer_new_lmul_p): Ditto.
18566 (costs::better_main_loop_than_p): Ditto.
18567 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
18568 (struct var_live_range): Ditto.
18569 (struct autovec_info): Ditto.
18570 * config/riscv/t-riscv: Update makefile for COST model.
18572 2023-09-12 Jakub Jelinek <jakub@redhat.com>
18574 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
18577 2023-09-12 Jakub Jelinek <jakub@redhat.com>
18579 PR middle-end/111338
18580 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
18582 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
18583 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
18584 optimization if type's precision is too large for
18585 vn_walk_cb_data::bufsize.
18587 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
18589 * doc/gm2.texi (Compiler options): Document new option
18592 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
18594 * doc/sourcebuild.texi (stack_size): Update.
18596 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
18598 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
18599 (<optab>_not<mode>3): Likewise.
18600 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
18602 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
18604 (GEN_EMIT_HELPER2): Likewise.
18605 (emit_strcmp_scalar_compare_byte): New function.
18606 (emit_strcmp_scalar_compare_subword): Likewise.
18607 (emit_strcmp_scalar_compare_word): Likewise.
18608 (emit_strcmp_scalar_load_and_compare): Likewise.
18609 (emit_strcmp_scalar_call_to_libc): Likewise.
18610 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
18611 (emit_strcmp_scalar_result_calculation): Likewise.
18612 (riscv_expand_strcmp_scalar): Likewise.
18613 (riscv_expand_strcmp): Likewise.
18614 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
18616 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
18617 (cmpstrnsi): Invoke expansion function for str(n)cmp.
18618 (cmpstrsi): Likewise.
18619 * config/riscv/riscv.opt: Add new parameter
18620 '-mstring-compare-inline-limit'.
18621 * doc/invoke.texi: Document new parameter
18622 '-mstring-compare-inline-limit'.
18624 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
18626 * config.gcc: Add new object riscv-string.o.
18628 * config/riscv/riscv-protos.h (riscv_expand_strlen):
18630 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
18631 * config/riscv/riscv.opt: New flag 'minline-strlen'.
18632 * config/riscv/t-riscv: Add new object riscv-string.o.
18633 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
18634 (th_rev<mode>2): Likewise.
18635 (th_tstnbz<mode>2): New INSN.
18636 * doc/invoke.texi: Document '-minline-strlen'.
18637 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
18638 (emit_unlikely_jump_insn): Likewise.
18639 * rtl.h (emit_likely_jump_insn): New prototype.
18640 (emit_unlikely_jump_insn): Likewise.
18641 * config/riscv/riscv-string.cc: New file.
18643 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
18645 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
18646 (TARGET_SUPPORTS_ALIASES): Define.
18648 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
18650 * doc/sourcebuild.texi (check-function-bodies): Update.
18652 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
18654 * gimplify.cc (gimplify_bind_expr): Check for
18655 insertion after variable cleanup. Convert 'omp allocate'
18656 var-decl attribute to GOMP_alloc/GOMP_free calls.
18658 2023-09-12 xuli <xuli1@eswincomputing.com>
18660 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
18661 parameter e and replace NULL_RTX with gcc_unreachable.
18663 2023-09-12 xuli <xuli1@eswincomputing.com>
18665 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
18667 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
18668 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
18669 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
18671 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
18672 * config/riscv/riscv-vector-builtins.cc: Add args type.
18674 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
18676 * config/riscv/riscv.cc
18677 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
18678 riscv_avoid_shrink_wrapping_separate.
18679 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
18681 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
18683 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
18685 * shrink-wrap.cc (try_shrink_wrapping_separate):call
18686 use_shrink_wrapping_separate.
18687 (use_shrink_wrapping_separate): wrap the condition
18688 check in use_shrink_wrapping_separate.
18689 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
18691 2023-09-11 Andrew Pinski <apinski@marvell.com>
18693 PR tree-optimization/111348
18694 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
18695 the cmp part of the pattern.
18697 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
18700 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
18701 Call output_addr_const for CASE_CONST_SCALAR_INT.
18703 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
18705 * config/riscv/thead.md: Update types
18707 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
18709 * config/riscv/riscv.md: Update types
18711 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
18713 * config/riscv/riscv.md: Add "zicond" type
18714 * config/riscv/zicond.md: Update types
18716 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
18718 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
18719 * config/riscv/zc.md: Update types
18721 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
18723 * config/riscv/autovec-opt.md: Update types
18724 * config/riscv/autovec.md: likewise
18726 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18728 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
18730 (s390_vec_unsigned_flt): Ditto.
18731 (s390_vec_revb_flt): Ditto.
18732 (s390_vec_reve_flt): Ditto.
18733 (s390_vclfnhs): Fix operand flags.
18734 (s390_vclfnls): Ditto.
18735 (s390_vcrnfs): Ditto.
18736 (s390_vcfn): Ditto.
18737 (s390_vcnf): Ditto.
18739 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18741 * config/s390/s390-builtins.def (O_U64): New.
18746 (O_M12): Change bit position.
18757 (OB_DEF_VAR): Add operand constraints.
18759 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
18762 2023-09-11 Andrew Pinski <apinski@marvell.com>
18764 PR tree-optimization/111349
18765 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
18766 the cmp part of the pattern.
18768 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18771 * config/riscv/riscv.opt: Set default as scalable vectorization.
18773 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18775 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
18776 (get_all_successors): Ditto.
18777 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
18778 (get_all_successors): Ditto.
18780 2023-09-11 Jakub Jelinek <jakub@redhat.com>
18782 PR middle-end/111329
18783 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
18784 function. For printing values which don't fit into digit_buffer
18785 use out-of-line function.
18786 * wide-int-print.h (pp_wide_int_large): Declare.
18787 * wide-int-print.cc: Include pretty-print.h.
18788 (pp_wide_int_large): Define.
18790 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18792 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
18793 Use dominance analysis.
18794 (pass_vsetvl::init): Ditto.
18795 (pass_vsetvl::done): Ditto.
18797 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18800 * config/riscv/autovec.md: Add VLS modes.
18801 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
18802 (cmp_lmul_gt_one): Ditto.
18803 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
18804 (cmp_lmul_gt_one): Ditto.
18805 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
18806 (riscv_vectorize_vec_perm_const): Ditto.
18807 * config/riscv/vector-iterators.md: Ditto.
18808 * config/riscv/vector.md: Ditto.
18810 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18812 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
18813 * config/riscv/vector-iterators.md: New iterator
18815 2023-09-11 Andrew Pinski <apinski@marvell.com>
18817 PR tree-optimization/111346
18818 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
18821 2023-09-11 liuhongt <hongtao.liu@intel.com>
18825 * config/i386/sse.md (int_comm): New int_attr.
18826 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
18827 Remove % for Complex conjugate operations since they're not
18829 (fma_<complexpairopname>_<mode>_pair): Ditto.
18830 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
18831 (cmul<conj_op><mode>3): Ditto.
18833 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18835 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
18836 fixed-vlmax/vls vector permutation.
18838 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18840 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
18842 2023-09-10 Andrew Pinski <apinski@marvell.com>
18844 PR tree-optimization/111331
18845 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
18846 Fix the LE/GE comparison to the correct value.
18847 * tree-ssa-phiopt.cc (minmax_replacement):
18848 Fix the LE/GE comparison for the
18849 `(a CMP CST1) ? max<a,CST2> : a` optimization.
18851 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
18853 * config/darwin.cc (darwin_function_section): Place unlikely
18854 executed global init code into the standard cold section.
18856 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18859 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
18860 (pass_vsetvl::pre_vsetvl): Ditto.
18861 (pass_vsetvl::init): Ditto.
18862 (pass_vsetvl::lazy_vsetvl): Ditto.
18864 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
18866 * config/loongarch/loongarch.md (mulsidi3_64bit):
18867 Field unsigned extension support.
18868 (<u>muldi3_highpart): Modify template name.
18869 (<u>mulsi3_highpart): Likewise.
18870 (<u>mulsidi3_64bit): Field unsigned extension support.
18871 (<su>muldi3_highpart): Modify muldi3_highpart to
18873 (<su>mulsi3_highpart): Modify mulsi3_highpart to
18876 2023-09-09 Xi Ruoyao <xry111@xry111.site>
18878 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
18879 Check precondition (delta must be a power of 2) and use
18880 popcount_hwi instead of a homebrew loop.
18882 2023-09-09 Xi Ruoyao <xry111@xry111.site>
18884 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
18885 Define to the maximum amount of bytes able to be loaded or
18886 stored with one machine instruction.
18887 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
18888 New static function.
18889 (loongarch_block_move_straight): Call
18890 loongarch_mode_for_move_size for machine_mode to be moved.
18891 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
18892 instead of UNITS_PER_WORD.
18894 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18896 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
18898 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
18900 * fold-const.cc (can_min_p): New function.
18901 (poly_int_binop): Try fold MIN_EXPR.
18903 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
18905 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
18906 case VREL_EQ nor call frelop_early_resolve.
18908 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
18910 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
18911 Remove broken INSN.
18912 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
18913 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
18915 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
18917 * config/riscv/thead.md: Use more appropriate mode attributes
18920 2023-09-08 Guo Jie <guojie@loongson.cn>
18922 * common/config/loongarch/loongarch-common.cc:
18923 (default_options loongarch_option_optimization_table):
18924 Default to -fsched-pressure.
18926 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
18928 * config.gcc: remove non-POSIX syntax "<<<".
18930 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
18932 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
18933 Rename postfix to _bitmanip.
18934 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
18935 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
18937 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18939 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
18941 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18943 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
18945 2023-09-07 liuhongt <hongtao.liu@intel.com>
18947 * config/i386/sse.md
18948 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
18949 (VHFBF_AVX512VL): New mode iterator.
18950 (VI2HFBF_AVX512VL): New mode iterator.
18952 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
18954 * value-range.h (contains_zero_p): Return false for undefined ranges.
18955 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
18956 contains_zero_p change above.
18957 (operator_ge::op1_op2_relation): Same.
18958 (operator_equal::op1_op2_relation): Same.
18959 (operator_not_equal::op1_op2_relation): Same.
18960 (operator_lt::op1_op2_relation): Same.
18961 (operator_le::op1_op2_relation): Same.
18962 (operator_ge::op1_op2_relation): Same.
18963 * range-op.cc (operator_equal::op1_op2_relation): Same.
18964 (operator_not_equal::op1_op2_relation): Same.
18965 (operator_lt::op1_op2_relation): Same.
18966 (operator_le::op1_op2_relation): Same.
18967 (operator_cast::op1_range): Same.
18968 (set_nonzero_range_from_mask): Same.
18969 (operator_bitwise_xor::op1_range): Same.
18970 (operator_addr_expr::fold_range): Same.
18971 (operator_addr_expr::op1_range): Same.
18973 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
18975 PR tree-optimization/110875
18976 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
18977 cache-prefilling routine when the ssa-name has no global value.
18979 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
18982 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
18983 (process_alt_operands): Set up the flag. Clear flag for chosen
18984 alternative with special memory constraints.
18985 (process_alt_operands): Set up used insn alternative depending on the flag.
18987 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18989 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
18990 * config/riscv/riscv.md: Ditto.
18991 * config/riscv/vector-iterators.md: Ditto.
18992 * config/riscv/vector.md: Ditto.
18994 2023-09-07 David Malcolm <dmalcolm@redhat.com>
18996 * diagnostic-core.h (error_meta): New decl.
18997 * diagnostic.cc (error_meta): New.
18999 2023-09-07 Jakub Jelinek <jakub@redhat.com>
19002 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
19003 inside gcc_assert, as later code relies on it filling info variable.
19004 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
19005 clear_padding_type): Likewise.
19006 * varasm.cc (output_constant): Likewise.
19007 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
19008 * stor-layout.cc (finish_bitfield_representative, layout_type):
19010 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
19012 2023-09-07 Xi Ruoyao <xry111@xry111.site>
19015 * config/loongarch/loongarch-protos.h
19016 (loongarch_pre_reload_split): Declare new function.
19017 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
19018 * config/loongarch/loongarch.cc
19019 (loongarch_pre_reload_split): Implement.
19020 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
19021 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
19023 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
19024 New define_insn_and_split.
19025 (bstrins_<mode>_for_ior_mask): Likewise.
19026 (define_peephole2): Further optimize code sequence produced by
19027 bstrins_<mode>_for_ior_mask if possible.
19029 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
19031 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
19032 rather than gen_rtx_PLUS.
19034 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19037 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
19038 (pass_vsetvl::df_post_optimization): Remove incorrect function.
19040 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
19042 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
19043 Parse 'XVentanaCondOps' extension.
19044 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
19045 (TARGET_XVENTANACONDOPS): Ditto.
19046 (TARGET_ZICOND_LIKE): New to represent targets with conditional
19047 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
19048 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
19049 with TARGET_ZICOND_LIKE.
19050 (riscv_expand_conditional_move): Ditto.
19051 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
19052 TARGET_ZICOND_LIKE.
19053 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
19054 * config/riscv/zicond.md: Modify description.
19055 (eqz_ventana): New to match corresponding czero instructions.
19056 (nez_ventana): Ditto.
19057 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
19058 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
19059 (*czero.<eqz>.<GPR><X>): Ditto.
19060 (*czero.eqz.<GPR><X>.opt1): Ditto.
19061 (*czero.nez.<GPR><X>.opt2): Ditto.
19063 2023-09-06 Ian Lance Taylor <iant@golang.org>
19066 * godump.cc (go_format_type): Handle BITINT_TYPE.
19068 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19071 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
19074 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19077 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
19078 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
19079 rather than make_edge, initialize bb->count.
19081 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19084 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
19085 Document general rules for _BitInt support library functions
19086 and document __mulbitint3 and __divmodbitint4.
19087 (Conversion functions): Document __fix{s,d,x,t}fbitint,
19088 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
19089 __bid_floatbitint{s,d,t}d.
19091 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19094 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
19097 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19100 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
19101 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
19102 check if all padding bits up to mode precision are zeros or sign
19103 bit copies and if not, jump to DO_ERROR.
19104 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
19105 Adjust expand_ubsan_result_store callers.
19106 * ubsan.cc: Include target.h and langhooks.h.
19107 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
19108 size converted to pointer sized integer, pass BITINT_TYPE values
19109 which fit into TImode (if supported) or DImode as those integer types
19110 or otherwise for now punt (pass 0).
19111 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
19112 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
19113 TImode/DImode precision rather than TK_Unknown used otherwise for
19114 large/huge BITINT_TYPEs.
19115 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
19116 they don't have mode precision.
19117 * ubsan.h (enum ubsan_print_style): New enumerator.
19119 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19122 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
19123 (ix86_bitint_type_info): New function.
19124 (TARGET_C_BITINT_TYPE_INFO): Redefine.
19126 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19129 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
19130 * passes.def: Add pass_lower_bitint after pass_lower_complex and
19131 pass_lower_bitint_O0 after pass_lower_complex_O0.
19132 * tree-pass.h (PROP_gimple_lbitint): Define.
19133 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
19134 * gimple-lower-bitint.h: New file.
19135 * tree-ssa-live.h (struct _var_map): Add bitint member.
19136 (init_var_map): Adjust declaration.
19137 (region_contains_p): Handle map->bitint like map->outofssa_p.
19138 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
19139 map->bitint and set map->outofssa_p to false if it is non-NULL.
19140 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
19141 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
19143 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
19144 not in that bitmap, and allow res without default def.
19145 (compute_optimized_partition_bases): In map->bitint mode try hard to
19146 coalesce any SSA_NAMEs with the same size.
19147 (coalesce_bitint): New function.
19148 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
19149 used_in_copies and call coalesce_bitint.
19150 * gimple-lower-bitint.cc: New file.
19152 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19155 * tree.def (BITINT_TYPE): New type.
19156 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
19157 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
19159 (BITINT_TYPE_P): Define.
19160 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
19161 they have BITINT_TYPE type.
19162 (tree_check6, tree_not_check6): New inline functions.
19163 (any_integral_type_check): Include BITINT_TYPE.
19164 (build_bitint_type): Declare.
19165 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
19166 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
19167 type_hash_canon): Handle BITINT_TYPE.
19168 (bitint_type_cache): New variable.
19169 (build_bitint_type): New function.
19170 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
19171 Handle BITINT_TYPE.
19172 (tree_cc_finalize): Free bitint_type_cache.
19173 * builtins.cc (type_to_class): Handle BITINT_TYPE.
19174 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
19175 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
19177 * convert.cc (convert_to_pointer_1, convert_to_real_1,
19178 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
19179 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
19180 GET_MODE_PRECISION (TYPE_MODE (type)).
19181 * doc/generic.texi (BITINT_TYPE): Document.
19182 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
19183 * doc/tm.texi: Regenerated.
19184 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
19185 gen_type_die_with_usage): Handle BITINT_TYPE.
19186 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
19187 handle those which fit into shwi.
19188 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
19189 to bitfield precision reads from BITINT_TYPE vars, parameters or
19190 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
19192 * fold-const.cc (fold_convert_loc, make_range_step): Handle
19194 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
19195 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
19196 (native_encode_int, native_interpret_int, native_interpret_expr):
19197 Handle BITINT_TYPE.
19198 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
19199 to some other integral type or vice versa conversions non-useless.
19200 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
19201 (clear_padding_unit): Mention in comment that _BitInt types don't need
19203 (clear_padding_bitint_needs_padding_p): New function.
19204 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
19205 (clear_padding_type): Likewise.
19206 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
19207 precision operands force pos_neg? to 1.
19208 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
19209 expand_BITINTTOFLOAT): New functions.
19210 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
19211 BITINTTOFLOAT): New internal functions.
19212 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
19213 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
19214 * match.pd (non-equality compare simplifications from fold_binary):
19215 Punt if TYPE_MODE (arg1_type) is BLKmode.
19216 * pretty-print.h (pp_wide_int): Handle printing of large precision
19217 wide_ints which would buffer overflow digit_buffer.
19218 * stor-layout.cc (finish_bitfield_representative): For bit-fields
19219 with BITINT_TYPE, prefer representatives with precisions in
19220 multiple of limb precision.
19221 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
19222 element type and assert it is BITINT_TYPE.
19223 * target.def (bitint_type_info): New C target hook.
19224 * target.h (struct bitint_info): New type.
19225 * targhooks.cc (default_bitint_type_info): New function.
19226 * targhooks.h (default_bitint_type_info): Declare.
19227 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
19228 Handle printing large wide_ints which would buffer overflow
19230 * tree-ssa-sccvn.cc: Include target.h.
19231 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
19233 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
19234 64-bit BITINT_TYPE subtract low bound from expression and cast to
19235 64-bit integer type both the controlling expression and case labels.
19236 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
19237 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
19238 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
19240 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
19241 unsigned_type_for rather than build_nonstandard_integer_type.
19243 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19246 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
19247 tieable for RVV modes.
19249 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19252 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
19254 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19256 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
19258 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19260 * config/xtensa/xtensa.cc (xtensa_expand_scc):
19261 Add code for particular constants (only 0 and INT_MIN for now)
19262 for EQ/NE boolean evaluation in SImode.
19263 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
19264 implementation has been integrated into the above.
19266 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
19269 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
19271 (*pred_widen_mulsu<mode>): Delete.
19272 (*pred_single_widen_mul<mode>): Delete.
19273 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
19274 Add new combine patterns.
19275 (*single_widen_sub<any_extend:su><mode>): Ditto.
19276 (*single_widen_add<any_extend:su><mode>): Ditto.
19277 (*single_widen_mult<any_extend:su><mode>): Ditto.
19278 (*dual_widen_mulsu<mode>): Ditto.
19279 (*dual_widen_mulus<mode>): Ditto.
19280 (*dual_widen_<optab><mode>): Ditto.
19281 (*single_widen_add<mode>): Ditto.
19282 (*single_widen_sub<mode>): Ditto.
19283 (*single_widen_mult<mode>): Ditto.
19284 * config/riscv/autovec.md (<optab><mode>3):
19285 Change define_expand to define_insn_and_split.
19286 (<optab><mode>2): Ditto.
19287 (abs<mode>2): Ditto.
19288 (smul<mode>3_highpart): Ditto.
19289 (umul<mode>3_highpart): Ditto.
19291 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
19293 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
19294 (riscv_asm_output_alias): Ditto.
19295 (riscv_asm_output_external): Ditto.
19296 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
19297 Output .variant_cc directive for vector function.
19298 (riscv_declare_function_name): Ditto.
19299 (riscv_asm_output_alias): Ditto.
19300 (riscv_asm_output_external): Ditto.
19301 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
19302 Implement ASM_DECLARE_FUNCTION_NAME.
19303 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
19304 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
19306 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
19308 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
19309 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
19310 (riscv_frame_info::reset): Reset new fileds.
19311 (riscv_call_tls_get_addr): Pass riscv_cc.
19312 (riscv_function_arg): Return riscv_cc for call patterm.
19313 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
19314 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
19315 (riscv_save_reg_p): Add vector callee-saved check.
19316 (riscv_stack_align): Add vector save area comment.
19317 (riscv_compute_frame_info): Ditto.
19318 (riscv_restore_reg): Update for type change.
19319 (riscv_for_each_saved_v_reg): New function save vector registers.
19320 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
19321 (riscv_expand_prologue): Ditto.
19322 (riscv_expand_epilogue): Ditto.
19323 (riscv_output_mi_thunk): Pass riscv_cc.
19324 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
19325 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
19326 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
19328 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
19330 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
19331 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
19332 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
19333 (riscv_init_cumulative_args): Setup variant_cc field.
19334 (riscv_vector_type_p): New function for checking vector type.
19335 (riscv_hard_regno_nregs): Hoist declare.
19336 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
19337 (riscv_get_arg_info): Support vector cc.
19338 (riscv_function_arg_advance): Update cum.
19339 (riscv_pass_by_reference): Handle vector args.
19340 (riscv_v_abi): New function return vector abi.
19341 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
19342 (riscv_arguments_is_vector_type_p): New function for check vector returns.
19343 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
19344 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
19345 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
19346 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
19347 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
19348 (V_ARG_FIRST): Ditto.
19349 (V_ARG_LAST): Ditto.
19350 (enum riscv_cc): Define all RISCV_CC variants.
19351 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
19353 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
19355 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
19356 Add sqrt + vcond_mask combine pattern.
19357 * config/riscv/autovec.md (<optab><mode>2):
19358 Change define_expand to define_insn_and_split.
19360 2023-09-06 Jason Merrill <jason@redhat.com>
19362 * common.opt: Update -fabi-version=19.
19364 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
19366 * config/riscv/zicond.md: Add closing parent to a comment.
19368 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
19370 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
19371 large constant cons/alt into a register.
19373 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
19375 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
19376 require one zero bit in the upper 32 bits for LI+RORI synthesis.
19378 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
19380 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
19382 2023-09-05 Andrew Pinski <apinski@marvell.com>
19384 PR tree-optimization/98710
19385 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
19386 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
19388 2023-09-05 Andrew Pinski <apinski@marvell.com>
19390 PR tree-optimization/103536
19391 * match.pd (`(x | y) & (x & z)`,
19392 `(x & y) | (x | z)`): New patterns.
19394 2023-09-05 Andrew Pinski <apinski@marvell.com>
19396 PR tree-optimization/107137
19397 * match.pd (`(nop_convert)-(convert)a`): New pattern.
19399 2023-09-05 Andrew Pinski <apinski@marvell.com>
19401 PR tree-optimization/96694
19402 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
19404 2023-09-05 Andrew Pinski <apinski@marvell.com>
19406 PR tree-optimization/105832
19407 * match.pd (`(1 >> X) != 0`): New pattern
19409 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
19411 * config/riscv/riscv.md: Update/Add types
19413 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
19415 * config/riscv/pic.md: Update types
19417 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
19419 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
19420 synthesis with rotate-right for XTheadBb.
19422 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
19424 * config/riscv/zicond.md: Fix op2 pattern.
19426 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
19428 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
19430 2023-09-05 Xi Ruoyao <xry111@xry111.site>
19432 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
19433 Define to 0 if not defined yet.
19435 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
19437 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
19438 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
19440 2023-09-05 Pan Li <pan2.li@intel.com>
19442 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
19443 * config/riscv/vector.md: Extend iterator for VLS.
19445 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
19447 * config.gcc: Export the header file lasxintrin.h.
19448 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
19449 Add Loongson ASX builtin functions support.
19450 (AVAIL_ALL): Ditto.
19451 (LASX_BUILTIN): Ditto.
19452 (LASX_NO_TARGET_BUILTIN): Ditto.
19453 (LASX_BUILTIN_TEST_BRANCH): Ditto.
19454 (CODE_FOR_lasx_xvsadd_b): Ditto.
19455 (CODE_FOR_lasx_xvsadd_h): Ditto.
19456 (CODE_FOR_lasx_xvsadd_w): Ditto.
19457 (CODE_FOR_lasx_xvsadd_d): Ditto.
19458 (CODE_FOR_lasx_xvsadd_bu): Ditto.
19459 (CODE_FOR_lasx_xvsadd_hu): Ditto.
19460 (CODE_FOR_lasx_xvsadd_wu): Ditto.
19461 (CODE_FOR_lasx_xvsadd_du): Ditto.
19462 (CODE_FOR_lasx_xvadd_b): Ditto.
19463 (CODE_FOR_lasx_xvadd_h): Ditto.
19464 (CODE_FOR_lasx_xvadd_w): Ditto.
19465 (CODE_FOR_lasx_xvadd_d): Ditto.
19466 (CODE_FOR_lasx_xvaddi_bu): Ditto.
19467 (CODE_FOR_lasx_xvaddi_hu): Ditto.
19468 (CODE_FOR_lasx_xvaddi_wu): Ditto.
19469 (CODE_FOR_lasx_xvaddi_du): Ditto.
19470 (CODE_FOR_lasx_xvand_v): Ditto.
19471 (CODE_FOR_lasx_xvandi_b): Ditto.
19472 (CODE_FOR_lasx_xvbitsel_v): Ditto.
19473 (CODE_FOR_lasx_xvseqi_b): Ditto.
19474 (CODE_FOR_lasx_xvseqi_h): Ditto.
19475 (CODE_FOR_lasx_xvseqi_w): Ditto.
19476 (CODE_FOR_lasx_xvseqi_d): Ditto.
19477 (CODE_FOR_lasx_xvslti_b): Ditto.
19478 (CODE_FOR_lasx_xvslti_h): Ditto.
19479 (CODE_FOR_lasx_xvslti_w): Ditto.
19480 (CODE_FOR_lasx_xvslti_d): Ditto.
19481 (CODE_FOR_lasx_xvslti_bu): Ditto.
19482 (CODE_FOR_lasx_xvslti_hu): Ditto.
19483 (CODE_FOR_lasx_xvslti_wu): Ditto.
19484 (CODE_FOR_lasx_xvslti_du): Ditto.
19485 (CODE_FOR_lasx_xvslei_b): Ditto.
19486 (CODE_FOR_lasx_xvslei_h): Ditto.
19487 (CODE_FOR_lasx_xvslei_w): Ditto.
19488 (CODE_FOR_lasx_xvslei_d): Ditto.
19489 (CODE_FOR_lasx_xvslei_bu): Ditto.
19490 (CODE_FOR_lasx_xvslei_hu): Ditto.
19491 (CODE_FOR_lasx_xvslei_wu): Ditto.
19492 (CODE_FOR_lasx_xvslei_du): Ditto.
19493 (CODE_FOR_lasx_xvdiv_b): Ditto.
19494 (CODE_FOR_lasx_xvdiv_h): Ditto.
19495 (CODE_FOR_lasx_xvdiv_w): Ditto.
19496 (CODE_FOR_lasx_xvdiv_d): Ditto.
19497 (CODE_FOR_lasx_xvdiv_bu): Ditto.
19498 (CODE_FOR_lasx_xvdiv_hu): Ditto.
19499 (CODE_FOR_lasx_xvdiv_wu): Ditto.
19500 (CODE_FOR_lasx_xvdiv_du): Ditto.
19501 (CODE_FOR_lasx_xvfadd_s): Ditto.
19502 (CODE_FOR_lasx_xvfadd_d): Ditto.
19503 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
19504 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
19505 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
19506 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
19507 (CODE_FOR_lasx_xvffint_s_w): Ditto.
19508 (CODE_FOR_lasx_xvffint_d_l): Ditto.
19509 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
19510 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
19511 (CODE_FOR_lasx_xvfsub_s): Ditto.
19512 (CODE_FOR_lasx_xvfsub_d): Ditto.
19513 (CODE_FOR_lasx_xvfmul_s): Ditto.
19514 (CODE_FOR_lasx_xvfmul_d): Ditto.
19515 (CODE_FOR_lasx_xvfdiv_s): Ditto.
19516 (CODE_FOR_lasx_xvfdiv_d): Ditto.
19517 (CODE_FOR_lasx_xvfmax_s): Ditto.
19518 (CODE_FOR_lasx_xvfmax_d): Ditto.
19519 (CODE_FOR_lasx_xvfmin_s): Ditto.
19520 (CODE_FOR_lasx_xvfmin_d): Ditto.
19521 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
19522 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
19523 (CODE_FOR_lasx_xvflogb_s): Ditto.
19524 (CODE_FOR_lasx_xvflogb_d): Ditto.
19525 (CODE_FOR_lasx_xvmax_b): Ditto.
19526 (CODE_FOR_lasx_xvmax_h): Ditto.
19527 (CODE_FOR_lasx_xvmax_w): Ditto.
19528 (CODE_FOR_lasx_xvmax_d): Ditto.
19529 (CODE_FOR_lasx_xvmaxi_b): Ditto.
19530 (CODE_FOR_lasx_xvmaxi_h): Ditto.
19531 (CODE_FOR_lasx_xvmaxi_w): Ditto.
19532 (CODE_FOR_lasx_xvmaxi_d): Ditto.
19533 (CODE_FOR_lasx_xvmax_bu): Ditto.
19534 (CODE_FOR_lasx_xvmax_hu): Ditto.
19535 (CODE_FOR_lasx_xvmax_wu): Ditto.
19536 (CODE_FOR_lasx_xvmax_du): Ditto.
19537 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
19538 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
19539 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
19540 (CODE_FOR_lasx_xvmaxi_du): Ditto.
19541 (CODE_FOR_lasx_xvmin_b): Ditto.
19542 (CODE_FOR_lasx_xvmin_h): Ditto.
19543 (CODE_FOR_lasx_xvmin_w): Ditto.
19544 (CODE_FOR_lasx_xvmin_d): Ditto.
19545 (CODE_FOR_lasx_xvmini_b): Ditto.
19546 (CODE_FOR_lasx_xvmini_h): Ditto.
19547 (CODE_FOR_lasx_xvmini_w): Ditto.
19548 (CODE_FOR_lasx_xvmini_d): Ditto.
19549 (CODE_FOR_lasx_xvmin_bu): Ditto.
19550 (CODE_FOR_lasx_xvmin_hu): Ditto.
19551 (CODE_FOR_lasx_xvmin_wu): Ditto.
19552 (CODE_FOR_lasx_xvmin_du): Ditto.
19553 (CODE_FOR_lasx_xvmini_bu): Ditto.
19554 (CODE_FOR_lasx_xvmini_hu): Ditto.
19555 (CODE_FOR_lasx_xvmini_wu): Ditto.
19556 (CODE_FOR_lasx_xvmini_du): Ditto.
19557 (CODE_FOR_lasx_xvmod_b): Ditto.
19558 (CODE_FOR_lasx_xvmod_h): Ditto.
19559 (CODE_FOR_lasx_xvmod_w): Ditto.
19560 (CODE_FOR_lasx_xvmod_d): Ditto.
19561 (CODE_FOR_lasx_xvmod_bu): Ditto.
19562 (CODE_FOR_lasx_xvmod_hu): Ditto.
19563 (CODE_FOR_lasx_xvmod_wu): Ditto.
19564 (CODE_FOR_lasx_xvmod_du): Ditto.
19565 (CODE_FOR_lasx_xvmul_b): Ditto.
19566 (CODE_FOR_lasx_xvmul_h): Ditto.
19567 (CODE_FOR_lasx_xvmul_w): Ditto.
19568 (CODE_FOR_lasx_xvmul_d): Ditto.
19569 (CODE_FOR_lasx_xvclz_b): Ditto.
19570 (CODE_FOR_lasx_xvclz_h): Ditto.
19571 (CODE_FOR_lasx_xvclz_w): Ditto.
19572 (CODE_FOR_lasx_xvclz_d): Ditto.
19573 (CODE_FOR_lasx_xvnor_v): Ditto.
19574 (CODE_FOR_lasx_xvor_v): Ditto.
19575 (CODE_FOR_lasx_xvori_b): Ditto.
19576 (CODE_FOR_lasx_xvnori_b): Ditto.
19577 (CODE_FOR_lasx_xvpcnt_b): Ditto.
19578 (CODE_FOR_lasx_xvpcnt_h): Ditto.
19579 (CODE_FOR_lasx_xvpcnt_w): Ditto.
19580 (CODE_FOR_lasx_xvpcnt_d): Ditto.
19581 (CODE_FOR_lasx_xvxor_v): Ditto.
19582 (CODE_FOR_lasx_xvxori_b): Ditto.
19583 (CODE_FOR_lasx_xvsll_b): Ditto.
19584 (CODE_FOR_lasx_xvsll_h): Ditto.
19585 (CODE_FOR_lasx_xvsll_w): Ditto.
19586 (CODE_FOR_lasx_xvsll_d): Ditto.
19587 (CODE_FOR_lasx_xvslli_b): Ditto.
19588 (CODE_FOR_lasx_xvslli_h): Ditto.
19589 (CODE_FOR_lasx_xvslli_w): Ditto.
19590 (CODE_FOR_lasx_xvslli_d): Ditto.
19591 (CODE_FOR_lasx_xvsra_b): Ditto.
19592 (CODE_FOR_lasx_xvsra_h): Ditto.
19593 (CODE_FOR_lasx_xvsra_w): Ditto.
19594 (CODE_FOR_lasx_xvsra_d): Ditto.
19595 (CODE_FOR_lasx_xvsrai_b): Ditto.
19596 (CODE_FOR_lasx_xvsrai_h): Ditto.
19597 (CODE_FOR_lasx_xvsrai_w): Ditto.
19598 (CODE_FOR_lasx_xvsrai_d): Ditto.
19599 (CODE_FOR_lasx_xvsrl_b): Ditto.
19600 (CODE_FOR_lasx_xvsrl_h): Ditto.
19601 (CODE_FOR_lasx_xvsrl_w): Ditto.
19602 (CODE_FOR_lasx_xvsrl_d): Ditto.
19603 (CODE_FOR_lasx_xvsrli_b): Ditto.
19604 (CODE_FOR_lasx_xvsrli_h): Ditto.
19605 (CODE_FOR_lasx_xvsrli_w): Ditto.
19606 (CODE_FOR_lasx_xvsrli_d): Ditto.
19607 (CODE_FOR_lasx_xvsub_b): Ditto.
19608 (CODE_FOR_lasx_xvsub_h): Ditto.
19609 (CODE_FOR_lasx_xvsub_w): Ditto.
19610 (CODE_FOR_lasx_xvsub_d): Ditto.
19611 (CODE_FOR_lasx_xvsubi_bu): Ditto.
19612 (CODE_FOR_lasx_xvsubi_hu): Ditto.
19613 (CODE_FOR_lasx_xvsubi_wu): Ditto.
19614 (CODE_FOR_lasx_xvsubi_du): Ditto.
19615 (CODE_FOR_lasx_xvpackod_d): Ditto.
19616 (CODE_FOR_lasx_xvpackev_d): Ditto.
19617 (CODE_FOR_lasx_xvpickod_d): Ditto.
19618 (CODE_FOR_lasx_xvpickev_d): Ditto.
19619 (CODE_FOR_lasx_xvrepli_b): Ditto.
19620 (CODE_FOR_lasx_xvrepli_h): Ditto.
19621 (CODE_FOR_lasx_xvrepli_w): Ditto.
19622 (CODE_FOR_lasx_xvrepli_d): Ditto.
19623 (CODE_FOR_lasx_xvandn_v): Ditto.
19624 (CODE_FOR_lasx_xvorn_v): Ditto.
19625 (CODE_FOR_lasx_xvneg_b): Ditto.
19626 (CODE_FOR_lasx_xvneg_h): Ditto.
19627 (CODE_FOR_lasx_xvneg_w): Ditto.
19628 (CODE_FOR_lasx_xvneg_d): Ditto.
19629 (CODE_FOR_lasx_xvbsrl_v): Ditto.
19630 (CODE_FOR_lasx_xvbsll_v): Ditto.
19631 (CODE_FOR_lasx_xvfmadd_s): Ditto.
19632 (CODE_FOR_lasx_xvfmadd_d): Ditto.
19633 (CODE_FOR_lasx_xvfmsub_s): Ditto.
19634 (CODE_FOR_lasx_xvfmsub_d): Ditto.
19635 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
19636 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
19637 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
19638 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
19639 (CODE_FOR_lasx_xvpermi_q): Ditto.
19640 (CODE_FOR_lasx_xvpermi_d): Ditto.
19641 (CODE_FOR_lasx_xbnz_v): Ditto.
19642 (CODE_FOR_lasx_xbz_v): Ditto.
19643 (CODE_FOR_lasx_xvssub_b): Ditto.
19644 (CODE_FOR_lasx_xvssub_h): Ditto.
19645 (CODE_FOR_lasx_xvssub_w): Ditto.
19646 (CODE_FOR_lasx_xvssub_d): Ditto.
19647 (CODE_FOR_lasx_xvssub_bu): Ditto.
19648 (CODE_FOR_lasx_xvssub_hu): Ditto.
19649 (CODE_FOR_lasx_xvssub_wu): Ditto.
19650 (CODE_FOR_lasx_xvssub_du): Ditto.
19651 (CODE_FOR_lasx_xvabsd_b): Ditto.
19652 (CODE_FOR_lasx_xvabsd_h): Ditto.
19653 (CODE_FOR_lasx_xvabsd_w): Ditto.
19654 (CODE_FOR_lasx_xvabsd_d): Ditto.
19655 (CODE_FOR_lasx_xvabsd_bu): Ditto.
19656 (CODE_FOR_lasx_xvabsd_hu): Ditto.
19657 (CODE_FOR_lasx_xvabsd_wu): Ditto.
19658 (CODE_FOR_lasx_xvabsd_du): Ditto.
19659 (CODE_FOR_lasx_xvavg_b): Ditto.
19660 (CODE_FOR_lasx_xvavg_h): Ditto.
19661 (CODE_FOR_lasx_xvavg_w): Ditto.
19662 (CODE_FOR_lasx_xvavg_d): Ditto.
19663 (CODE_FOR_lasx_xvavg_bu): Ditto.
19664 (CODE_FOR_lasx_xvavg_hu): Ditto.
19665 (CODE_FOR_lasx_xvavg_wu): Ditto.
19666 (CODE_FOR_lasx_xvavg_du): Ditto.
19667 (CODE_FOR_lasx_xvavgr_b): Ditto.
19668 (CODE_FOR_lasx_xvavgr_h): Ditto.
19669 (CODE_FOR_lasx_xvavgr_w): Ditto.
19670 (CODE_FOR_lasx_xvavgr_d): Ditto.
19671 (CODE_FOR_lasx_xvavgr_bu): Ditto.
19672 (CODE_FOR_lasx_xvavgr_hu): Ditto.
19673 (CODE_FOR_lasx_xvavgr_wu): Ditto.
19674 (CODE_FOR_lasx_xvavgr_du): Ditto.
19675 (CODE_FOR_lasx_xvmuh_b): Ditto.
19676 (CODE_FOR_lasx_xvmuh_h): Ditto.
19677 (CODE_FOR_lasx_xvmuh_w): Ditto.
19678 (CODE_FOR_lasx_xvmuh_d): Ditto.
19679 (CODE_FOR_lasx_xvmuh_bu): Ditto.
19680 (CODE_FOR_lasx_xvmuh_hu): Ditto.
19681 (CODE_FOR_lasx_xvmuh_wu): Ditto.
19682 (CODE_FOR_lasx_xvmuh_du): Ditto.
19683 (CODE_FOR_lasx_xvssran_b_h): Ditto.
19684 (CODE_FOR_lasx_xvssran_h_w): Ditto.
19685 (CODE_FOR_lasx_xvssran_w_d): Ditto.
19686 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
19687 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
19688 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
19689 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
19690 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
19691 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
19692 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
19693 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
19694 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
19695 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
19696 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
19697 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
19698 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
19699 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
19700 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
19701 (CODE_FOR_lasx_xvftint_w_s): Ditto.
19702 (CODE_FOR_lasx_xvftint_l_d): Ditto.
19703 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
19704 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
19705 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
19706 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
19707 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
19708 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
19709 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
19710 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
19711 (CODE_FOR_lasx_xvsat_b): Ditto.
19712 (CODE_FOR_lasx_xvsat_h): Ditto.
19713 (CODE_FOR_lasx_xvsat_w): Ditto.
19714 (CODE_FOR_lasx_xvsat_d): Ditto.
19715 (CODE_FOR_lasx_xvsat_bu): Ditto.
19716 (CODE_FOR_lasx_xvsat_hu): Ditto.
19717 (CODE_FOR_lasx_xvsat_wu): Ditto.
19718 (CODE_FOR_lasx_xvsat_du): Ditto.
19719 (loongarch_builtin_vectorized_function): Ditto.
19720 (loongarch_expand_builtin_insn): Ditto.
19721 (loongarch_expand_builtin): Ditto.
19722 * config/loongarch/loongarch-ftypes.def (1): Ditto.
19726 * config/loongarch/lasxintrin.h: New file.
19728 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
19730 * config/loongarch/loongarch-modes.def
19731 (VECTOR_MODES): Add Loongson ASX instruction support.
19732 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
19733 (loongarch_split_256bit_move_p): Ditto.
19734 (loongarch_expand_vector_group_init): Ditto.
19735 (loongarch_expand_vec_perm_1): Ditto.
19736 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
19737 (loongarch_valid_offset_p): Ditto.
19738 (loongarch_address_insns): Ditto.
19739 (loongarch_const_insns): Ditto.
19740 (loongarch_legitimize_move): Ditto.
19741 (loongarch_builtin_vectorization_cost): Ditto.
19742 (loongarch_split_move_p): Ditto.
19743 (loongarch_split_move): Ditto.
19744 (loongarch_output_move_index_float): Ditto.
19745 (loongarch_split_256bit_move_p): Ditto.
19746 (loongarch_split_256bit_move): Ditto.
19747 (loongarch_output_move): Ditto.
19748 (loongarch_print_operand_reloc): Ditto.
19749 (loongarch_print_operand): Ditto.
19750 (loongarch_hard_regno_mode_ok_uncached): Ditto.
19751 (loongarch_hard_regno_nregs): Ditto.
19752 (loongarch_class_max_nregs): Ditto.
19753 (loongarch_can_change_mode_class): Ditto.
19754 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
19755 (loongarch_vector_mode_supported_p): Ditto.
19756 (loongarch_preferred_simd_mode): Ditto.
19757 (loongarch_autovectorize_vector_modes): Ditto.
19758 (loongarch_lsx_output_division): Ditto.
19759 (loongarch_expand_lsx_shuffle): Ditto.
19760 (loongarch_expand_vec_perm): Ditto.
19761 (loongarch_expand_vec_perm_interleave): Ditto.
19762 (loongarch_try_expand_lsx_vshuf_const): Ditto.
19763 (loongarch_expand_vec_perm_even_odd_1): Ditto.
19764 (loongarch_expand_vec_perm_even_odd): Ditto.
19765 (loongarch_expand_vec_perm_1): Ditto.
19766 (loongarch_expand_vec_perm_const_2): Ditto.
19767 (loongarch_is_quad_duplicate): Ditto.
19768 (loongarch_is_double_duplicate): Ditto.
19769 (loongarch_is_odd_extraction): Ditto.
19770 (loongarch_is_even_extraction): Ditto.
19771 (loongarch_is_extraction_permutation): Ditto.
19772 (loongarch_is_center_extraction): Ditto.
19773 (loongarch_is_reversing_permutation): Ditto.
19774 (loongarch_is_di_misalign_extract): Ditto.
19775 (loongarch_is_si_misalign_extract): Ditto.
19776 (loongarch_is_lasx_lowpart_interleave): Ditto.
19777 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
19778 (COMPARE_SELECTOR): Ditto.
19779 (loongarch_is_lasx_lowpart_extract): Ditto.
19780 (loongarch_is_lasx_highpart_interleave): Ditto.
19781 (loongarch_is_lasx_highpart_interleave_2): Ditto.
19782 (loongarch_is_elem_duplicate): Ditto.
19783 (loongarch_is_op_reverse_perm): Ditto.
19784 (loongarch_is_single_op_perm): Ditto.
19785 (loongarch_is_divisible_perm): Ditto.
19786 (loongarch_is_triple_stride_extract): Ditto.
19787 (loongarch_vectorize_vec_perm_const): Ditto.
19788 (loongarch_cpu_sched_reassociation_width): Ditto.
19789 (loongarch_expand_vector_extract): Ditto.
19790 (emit_reduc_half): Ditto.
19791 (loongarch_expand_vec_unpack): Ditto.
19792 (loongarch_expand_vector_group_init): Ditto.
19793 (loongarch_expand_vector_init): Ditto.
19794 (loongarch_expand_lsx_cmp): Ditto.
19795 (loongarch_builtin_support_vector_misalignment): Ditto.
19796 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
19797 (BITS_PER_LASX_REG): Ditto.
19798 (STRUCTURE_SIZE_BOUNDARY): Ditto.
19799 (LASX_REG_FIRST): Ditto.
19800 (LASX_REG_LAST): Ditto.
19801 (LASX_REG_NUM): Ditto.
19802 (LASX_REG_P): Ditto.
19803 (LASX_REG_RTX_P): Ditto.
19804 (LASX_SUPPORTED_MODE_P): Ditto.
19805 * config/loongarch/loongarch.md: Ditto.
19806 * config/loongarch/lasx.md: New file.
19808 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
19810 * config.gcc: Export the header file lsxintrin.h.
19811 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
19812 (enum loongarch_builtin_type): Ditto.
19813 (AVAIL_ALL): Ditto.
19814 (LARCH_BUILTIN): Ditto.
19815 (LSX_BUILTIN): Ditto.
19816 (LSX_BUILTIN_TEST_BRANCH): Ditto.
19817 (LSX_NO_TARGET_BUILTIN): Ditto.
19818 (CODE_FOR_lsx_vsadd_b): Ditto.
19819 (CODE_FOR_lsx_vsadd_h): Ditto.
19820 (CODE_FOR_lsx_vsadd_w): Ditto.
19821 (CODE_FOR_lsx_vsadd_d): Ditto.
19822 (CODE_FOR_lsx_vsadd_bu): Ditto.
19823 (CODE_FOR_lsx_vsadd_hu): Ditto.
19824 (CODE_FOR_lsx_vsadd_wu): Ditto.
19825 (CODE_FOR_lsx_vsadd_du): Ditto.
19826 (CODE_FOR_lsx_vadd_b): Ditto.
19827 (CODE_FOR_lsx_vadd_h): Ditto.
19828 (CODE_FOR_lsx_vadd_w): Ditto.
19829 (CODE_FOR_lsx_vadd_d): Ditto.
19830 (CODE_FOR_lsx_vaddi_bu): Ditto.
19831 (CODE_FOR_lsx_vaddi_hu): Ditto.
19832 (CODE_FOR_lsx_vaddi_wu): Ditto.
19833 (CODE_FOR_lsx_vaddi_du): Ditto.
19834 (CODE_FOR_lsx_vand_v): Ditto.
19835 (CODE_FOR_lsx_vandi_b): Ditto.
19836 (CODE_FOR_lsx_bnz_v): Ditto.
19837 (CODE_FOR_lsx_bz_v): Ditto.
19838 (CODE_FOR_lsx_vbitsel_v): Ditto.
19839 (CODE_FOR_lsx_vseqi_b): Ditto.
19840 (CODE_FOR_lsx_vseqi_h): Ditto.
19841 (CODE_FOR_lsx_vseqi_w): Ditto.
19842 (CODE_FOR_lsx_vseqi_d): Ditto.
19843 (CODE_FOR_lsx_vslti_b): Ditto.
19844 (CODE_FOR_lsx_vslti_h): Ditto.
19845 (CODE_FOR_lsx_vslti_w): Ditto.
19846 (CODE_FOR_lsx_vslti_d): Ditto.
19847 (CODE_FOR_lsx_vslti_bu): Ditto.
19848 (CODE_FOR_lsx_vslti_hu): Ditto.
19849 (CODE_FOR_lsx_vslti_wu): Ditto.
19850 (CODE_FOR_lsx_vslti_du): Ditto.
19851 (CODE_FOR_lsx_vslei_b): Ditto.
19852 (CODE_FOR_lsx_vslei_h): Ditto.
19853 (CODE_FOR_lsx_vslei_w): Ditto.
19854 (CODE_FOR_lsx_vslei_d): Ditto.
19855 (CODE_FOR_lsx_vslei_bu): Ditto.
19856 (CODE_FOR_lsx_vslei_hu): Ditto.
19857 (CODE_FOR_lsx_vslei_wu): Ditto.
19858 (CODE_FOR_lsx_vslei_du): Ditto.
19859 (CODE_FOR_lsx_vdiv_b): Ditto.
19860 (CODE_FOR_lsx_vdiv_h): Ditto.
19861 (CODE_FOR_lsx_vdiv_w): Ditto.
19862 (CODE_FOR_lsx_vdiv_d): Ditto.
19863 (CODE_FOR_lsx_vdiv_bu): Ditto.
19864 (CODE_FOR_lsx_vdiv_hu): Ditto.
19865 (CODE_FOR_lsx_vdiv_wu): Ditto.
19866 (CODE_FOR_lsx_vdiv_du): Ditto.
19867 (CODE_FOR_lsx_vfadd_s): Ditto.
19868 (CODE_FOR_lsx_vfadd_d): Ditto.
19869 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
19870 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
19871 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
19872 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
19873 (CODE_FOR_lsx_vffint_s_w): Ditto.
19874 (CODE_FOR_lsx_vffint_d_l): Ditto.
19875 (CODE_FOR_lsx_vffint_s_wu): Ditto.
19876 (CODE_FOR_lsx_vffint_d_lu): Ditto.
19877 (CODE_FOR_lsx_vfsub_s): Ditto.
19878 (CODE_FOR_lsx_vfsub_d): Ditto.
19879 (CODE_FOR_lsx_vfmul_s): Ditto.
19880 (CODE_FOR_lsx_vfmul_d): Ditto.
19881 (CODE_FOR_lsx_vfdiv_s): Ditto.
19882 (CODE_FOR_lsx_vfdiv_d): Ditto.
19883 (CODE_FOR_lsx_vfmax_s): Ditto.
19884 (CODE_FOR_lsx_vfmax_d): Ditto.
19885 (CODE_FOR_lsx_vfmin_s): Ditto.
19886 (CODE_FOR_lsx_vfmin_d): Ditto.
19887 (CODE_FOR_lsx_vfsqrt_s): Ditto.
19888 (CODE_FOR_lsx_vfsqrt_d): Ditto.
19889 (CODE_FOR_lsx_vflogb_s): Ditto.
19890 (CODE_FOR_lsx_vflogb_d): Ditto.
19891 (CODE_FOR_lsx_vmax_b): Ditto.
19892 (CODE_FOR_lsx_vmax_h): Ditto.
19893 (CODE_FOR_lsx_vmax_w): Ditto.
19894 (CODE_FOR_lsx_vmax_d): Ditto.
19895 (CODE_FOR_lsx_vmaxi_b): Ditto.
19896 (CODE_FOR_lsx_vmaxi_h): Ditto.
19897 (CODE_FOR_lsx_vmaxi_w): Ditto.
19898 (CODE_FOR_lsx_vmaxi_d): Ditto.
19899 (CODE_FOR_lsx_vmax_bu): Ditto.
19900 (CODE_FOR_lsx_vmax_hu): Ditto.
19901 (CODE_FOR_lsx_vmax_wu): Ditto.
19902 (CODE_FOR_lsx_vmax_du): Ditto.
19903 (CODE_FOR_lsx_vmaxi_bu): Ditto.
19904 (CODE_FOR_lsx_vmaxi_hu): Ditto.
19905 (CODE_FOR_lsx_vmaxi_wu): Ditto.
19906 (CODE_FOR_lsx_vmaxi_du): Ditto.
19907 (CODE_FOR_lsx_vmin_b): Ditto.
19908 (CODE_FOR_lsx_vmin_h): Ditto.
19909 (CODE_FOR_lsx_vmin_w): Ditto.
19910 (CODE_FOR_lsx_vmin_d): Ditto.
19911 (CODE_FOR_lsx_vmini_b): Ditto.
19912 (CODE_FOR_lsx_vmini_h): Ditto.
19913 (CODE_FOR_lsx_vmini_w): Ditto.
19914 (CODE_FOR_lsx_vmini_d): Ditto.
19915 (CODE_FOR_lsx_vmin_bu): Ditto.
19916 (CODE_FOR_lsx_vmin_hu): Ditto.
19917 (CODE_FOR_lsx_vmin_wu): Ditto.
19918 (CODE_FOR_lsx_vmin_du): Ditto.
19919 (CODE_FOR_lsx_vmini_bu): Ditto.
19920 (CODE_FOR_lsx_vmini_hu): Ditto.
19921 (CODE_FOR_lsx_vmini_wu): Ditto.
19922 (CODE_FOR_lsx_vmini_du): Ditto.
19923 (CODE_FOR_lsx_vmod_b): Ditto.
19924 (CODE_FOR_lsx_vmod_h): Ditto.
19925 (CODE_FOR_lsx_vmod_w): Ditto.
19926 (CODE_FOR_lsx_vmod_d): Ditto.
19927 (CODE_FOR_lsx_vmod_bu): Ditto.
19928 (CODE_FOR_lsx_vmod_hu): Ditto.
19929 (CODE_FOR_lsx_vmod_wu): Ditto.
19930 (CODE_FOR_lsx_vmod_du): Ditto.
19931 (CODE_FOR_lsx_vmul_b): Ditto.
19932 (CODE_FOR_lsx_vmul_h): Ditto.
19933 (CODE_FOR_lsx_vmul_w): Ditto.
19934 (CODE_FOR_lsx_vmul_d): Ditto.
19935 (CODE_FOR_lsx_vclz_b): Ditto.
19936 (CODE_FOR_lsx_vclz_h): Ditto.
19937 (CODE_FOR_lsx_vclz_w): Ditto.
19938 (CODE_FOR_lsx_vclz_d): Ditto.
19939 (CODE_FOR_lsx_vnor_v): Ditto.
19940 (CODE_FOR_lsx_vor_v): Ditto.
19941 (CODE_FOR_lsx_vori_b): Ditto.
19942 (CODE_FOR_lsx_vnori_b): Ditto.
19943 (CODE_FOR_lsx_vpcnt_b): Ditto.
19944 (CODE_FOR_lsx_vpcnt_h): Ditto.
19945 (CODE_FOR_lsx_vpcnt_w): Ditto.
19946 (CODE_FOR_lsx_vpcnt_d): Ditto.
19947 (CODE_FOR_lsx_vxor_v): Ditto.
19948 (CODE_FOR_lsx_vxori_b): Ditto.
19949 (CODE_FOR_lsx_vsll_b): Ditto.
19950 (CODE_FOR_lsx_vsll_h): Ditto.
19951 (CODE_FOR_lsx_vsll_w): Ditto.
19952 (CODE_FOR_lsx_vsll_d): Ditto.
19953 (CODE_FOR_lsx_vslli_b): Ditto.
19954 (CODE_FOR_lsx_vslli_h): Ditto.
19955 (CODE_FOR_lsx_vslli_w): Ditto.
19956 (CODE_FOR_lsx_vslli_d): Ditto.
19957 (CODE_FOR_lsx_vsra_b): Ditto.
19958 (CODE_FOR_lsx_vsra_h): Ditto.
19959 (CODE_FOR_lsx_vsra_w): Ditto.
19960 (CODE_FOR_lsx_vsra_d): Ditto.
19961 (CODE_FOR_lsx_vsrai_b): Ditto.
19962 (CODE_FOR_lsx_vsrai_h): Ditto.
19963 (CODE_FOR_lsx_vsrai_w): Ditto.
19964 (CODE_FOR_lsx_vsrai_d): Ditto.
19965 (CODE_FOR_lsx_vsrl_b): Ditto.
19966 (CODE_FOR_lsx_vsrl_h): Ditto.
19967 (CODE_FOR_lsx_vsrl_w): Ditto.
19968 (CODE_FOR_lsx_vsrl_d): Ditto.
19969 (CODE_FOR_lsx_vsrli_b): Ditto.
19970 (CODE_FOR_lsx_vsrli_h): Ditto.
19971 (CODE_FOR_lsx_vsrli_w): Ditto.
19972 (CODE_FOR_lsx_vsrli_d): Ditto.
19973 (CODE_FOR_lsx_vsub_b): Ditto.
19974 (CODE_FOR_lsx_vsub_h): Ditto.
19975 (CODE_FOR_lsx_vsub_w): Ditto.
19976 (CODE_FOR_lsx_vsub_d): Ditto.
19977 (CODE_FOR_lsx_vsubi_bu): Ditto.
19978 (CODE_FOR_lsx_vsubi_hu): Ditto.
19979 (CODE_FOR_lsx_vsubi_wu): Ditto.
19980 (CODE_FOR_lsx_vsubi_du): Ditto.
19981 (CODE_FOR_lsx_vpackod_d): Ditto.
19982 (CODE_FOR_lsx_vpackev_d): Ditto.
19983 (CODE_FOR_lsx_vpickod_d): Ditto.
19984 (CODE_FOR_lsx_vpickev_d): Ditto.
19985 (CODE_FOR_lsx_vrepli_b): Ditto.
19986 (CODE_FOR_lsx_vrepli_h): Ditto.
19987 (CODE_FOR_lsx_vrepli_w): Ditto.
19988 (CODE_FOR_lsx_vrepli_d): Ditto.
19989 (CODE_FOR_lsx_vsat_b): Ditto.
19990 (CODE_FOR_lsx_vsat_h): Ditto.
19991 (CODE_FOR_lsx_vsat_w): Ditto.
19992 (CODE_FOR_lsx_vsat_d): Ditto.
19993 (CODE_FOR_lsx_vsat_bu): Ditto.
19994 (CODE_FOR_lsx_vsat_hu): Ditto.
19995 (CODE_FOR_lsx_vsat_wu): Ditto.
19996 (CODE_FOR_lsx_vsat_du): Ditto.
19997 (CODE_FOR_lsx_vavg_b): Ditto.
19998 (CODE_FOR_lsx_vavg_h): Ditto.
19999 (CODE_FOR_lsx_vavg_w): Ditto.
20000 (CODE_FOR_lsx_vavg_d): Ditto.
20001 (CODE_FOR_lsx_vavg_bu): Ditto.
20002 (CODE_FOR_lsx_vavg_hu): Ditto.
20003 (CODE_FOR_lsx_vavg_wu): Ditto.
20004 (CODE_FOR_lsx_vavg_du): Ditto.
20005 (CODE_FOR_lsx_vavgr_b): Ditto.
20006 (CODE_FOR_lsx_vavgr_h): Ditto.
20007 (CODE_FOR_lsx_vavgr_w): Ditto.
20008 (CODE_FOR_lsx_vavgr_d): Ditto.
20009 (CODE_FOR_lsx_vavgr_bu): Ditto.
20010 (CODE_FOR_lsx_vavgr_hu): Ditto.
20011 (CODE_FOR_lsx_vavgr_wu): Ditto.
20012 (CODE_FOR_lsx_vavgr_du): Ditto.
20013 (CODE_FOR_lsx_vssub_b): Ditto.
20014 (CODE_FOR_lsx_vssub_h): Ditto.
20015 (CODE_FOR_lsx_vssub_w): Ditto.
20016 (CODE_FOR_lsx_vssub_d): Ditto.
20017 (CODE_FOR_lsx_vssub_bu): Ditto.
20018 (CODE_FOR_lsx_vssub_hu): Ditto.
20019 (CODE_FOR_lsx_vssub_wu): Ditto.
20020 (CODE_FOR_lsx_vssub_du): Ditto.
20021 (CODE_FOR_lsx_vabsd_b): Ditto.
20022 (CODE_FOR_lsx_vabsd_h): Ditto.
20023 (CODE_FOR_lsx_vabsd_w): Ditto.
20024 (CODE_FOR_lsx_vabsd_d): Ditto.
20025 (CODE_FOR_lsx_vabsd_bu): Ditto.
20026 (CODE_FOR_lsx_vabsd_hu): Ditto.
20027 (CODE_FOR_lsx_vabsd_wu): Ditto.
20028 (CODE_FOR_lsx_vabsd_du): Ditto.
20029 (CODE_FOR_lsx_vftint_w_s): Ditto.
20030 (CODE_FOR_lsx_vftint_l_d): Ditto.
20031 (CODE_FOR_lsx_vftint_wu_s): Ditto.
20032 (CODE_FOR_lsx_vftint_lu_d): Ditto.
20033 (CODE_FOR_lsx_vandn_v): Ditto.
20034 (CODE_FOR_lsx_vorn_v): Ditto.
20035 (CODE_FOR_lsx_vneg_b): Ditto.
20036 (CODE_FOR_lsx_vneg_h): Ditto.
20037 (CODE_FOR_lsx_vneg_w): Ditto.
20038 (CODE_FOR_lsx_vneg_d): Ditto.
20039 (CODE_FOR_lsx_vshuf4i_d): Ditto.
20040 (CODE_FOR_lsx_vbsrl_v): Ditto.
20041 (CODE_FOR_lsx_vbsll_v): Ditto.
20042 (CODE_FOR_lsx_vfmadd_s): Ditto.
20043 (CODE_FOR_lsx_vfmadd_d): Ditto.
20044 (CODE_FOR_lsx_vfmsub_s): Ditto.
20045 (CODE_FOR_lsx_vfmsub_d): Ditto.
20046 (CODE_FOR_lsx_vfnmadd_s): Ditto.
20047 (CODE_FOR_lsx_vfnmadd_d): Ditto.
20048 (CODE_FOR_lsx_vfnmsub_s): Ditto.
20049 (CODE_FOR_lsx_vfnmsub_d): Ditto.
20050 (CODE_FOR_lsx_vmuh_b): Ditto.
20051 (CODE_FOR_lsx_vmuh_h): Ditto.
20052 (CODE_FOR_lsx_vmuh_w): Ditto.
20053 (CODE_FOR_lsx_vmuh_d): Ditto.
20054 (CODE_FOR_lsx_vmuh_bu): Ditto.
20055 (CODE_FOR_lsx_vmuh_hu): Ditto.
20056 (CODE_FOR_lsx_vmuh_wu): Ditto.
20057 (CODE_FOR_lsx_vmuh_du): Ditto.
20058 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
20059 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
20060 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
20061 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
20062 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
20063 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
20064 (CODE_FOR_lsx_vssran_b_h): Ditto.
20065 (CODE_FOR_lsx_vssran_h_w): Ditto.
20066 (CODE_FOR_lsx_vssran_w_d): Ditto.
20067 (CODE_FOR_lsx_vssran_bu_h): Ditto.
20068 (CODE_FOR_lsx_vssran_hu_w): Ditto.
20069 (CODE_FOR_lsx_vssran_wu_d): Ditto.
20070 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
20071 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
20072 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
20073 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
20074 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
20075 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
20076 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
20077 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
20078 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
20079 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
20080 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
20081 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
20082 (loongarch_builtin_vector_type): Ditto.
20083 (loongarch_build_cvpointer_type): Ditto.
20084 (LARCH_ATYPE_CVPOINTER): Ditto.
20085 (LARCH_ATYPE_BOOLEAN): Ditto.
20086 (LARCH_ATYPE_V2SF): Ditto.
20087 (LARCH_ATYPE_V2HI): Ditto.
20088 (LARCH_ATYPE_V2SI): Ditto.
20089 (LARCH_ATYPE_V4QI): Ditto.
20090 (LARCH_ATYPE_V4HI): Ditto.
20091 (LARCH_ATYPE_V8QI): Ditto.
20092 (LARCH_ATYPE_V2DI): Ditto.
20093 (LARCH_ATYPE_V4SI): Ditto.
20094 (LARCH_ATYPE_V8HI): Ditto.
20095 (LARCH_ATYPE_V16QI): Ditto.
20096 (LARCH_ATYPE_V2DF): Ditto.
20097 (LARCH_ATYPE_V4SF): Ditto.
20098 (LARCH_ATYPE_V4DI): Ditto.
20099 (LARCH_ATYPE_V8SI): Ditto.
20100 (LARCH_ATYPE_V16HI): Ditto.
20101 (LARCH_ATYPE_V32QI): Ditto.
20102 (LARCH_ATYPE_V4DF): Ditto.
20103 (LARCH_ATYPE_V8SF): Ditto.
20104 (LARCH_ATYPE_UV2DI): Ditto.
20105 (LARCH_ATYPE_UV4SI): Ditto.
20106 (LARCH_ATYPE_UV8HI): Ditto.
20107 (LARCH_ATYPE_UV16QI): Ditto.
20108 (LARCH_ATYPE_UV4DI): Ditto.
20109 (LARCH_ATYPE_UV8SI): Ditto.
20110 (LARCH_ATYPE_UV16HI): Ditto.
20111 (LARCH_ATYPE_UV32QI): Ditto.
20112 (LARCH_ATYPE_UV2SI): Ditto.
20113 (LARCH_ATYPE_UV4HI): Ditto.
20114 (LARCH_ATYPE_UV8QI): Ditto.
20115 (loongarch_builtin_vectorized_function): Ditto.
20116 (LARCH_GET_BUILTIN): Ditto.
20117 (loongarch_expand_builtin_insn): Ditto.
20118 (loongarch_expand_builtin_lsx_test_branch): Ditto.
20119 (loongarch_expand_builtin): Ditto.
20120 * config/loongarch/loongarch-ftypes.def (1): Ditto.
20124 * config/loongarch/lsxintrin.h: New file.
20126 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
20128 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
20148 * config/loongarch/genopts/loongarch.opt.in: Ditto.
20149 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
20150 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
20151 (VECTOR_MODE): Ditto.
20153 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
20154 (loongarch_split_move_insn): Ditto.
20155 (loongarch_split_128bit_move): Ditto.
20156 (loongarch_split_128bit_move_p): Ditto.
20157 (loongarch_split_lsx_copy_d): Ditto.
20158 (loongarch_split_lsx_insert_d): Ditto.
20159 (loongarch_split_lsx_fill_d): Ditto.
20160 (loongarch_expand_vec_cmp): Ditto.
20161 (loongarch_const_vector_same_val_p): Ditto.
20162 (loongarch_const_vector_same_bytes_p): Ditto.
20163 (loongarch_const_vector_same_int_p): Ditto.
20164 (loongarch_const_vector_shuffle_set_p): Ditto.
20165 (loongarch_const_vector_bitimm_set_p): Ditto.
20166 (loongarch_const_vector_bitimm_clr_p): Ditto.
20167 (loongarch_lsx_vec_parallel_const_half): Ditto.
20168 (loongarch_gen_const_int_vector): Ditto.
20169 (loongarch_lsx_output_division): Ditto.
20170 (loongarch_expand_vector_init): Ditto.
20171 (loongarch_expand_vec_unpack): Ditto.
20172 (loongarch_expand_vec_perm): Ditto.
20173 (loongarch_expand_vector_extract): Ditto.
20174 (loongarch_expand_vector_reduc): Ditto.
20175 (loongarch_ldst_scaled_shift): Ditto.
20176 (loongarch_expand_vec_cond_expr): Ditto.
20177 (loongarch_expand_vec_cond_mask_expr): Ditto.
20178 (loongarch_builtin_vectorized_function): Ditto.
20179 (loongarch_gen_const_int_vector_shuffle): Ditto.
20180 (loongarch_build_signbit_mask): Ditto.
20181 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
20182 (loongarch_setup_incoming_varargs): Ditto.
20183 (loongarch_emit_move): Ditto.
20184 (loongarch_const_vector_bitimm_set_p): Ditto.
20185 (loongarch_const_vector_bitimm_clr_p): Ditto.
20186 (loongarch_const_vector_same_val_p): Ditto.
20187 (loongarch_const_vector_same_bytes_p): Ditto.
20188 (loongarch_const_vector_same_int_p): Ditto.
20189 (loongarch_const_vector_shuffle_set_p): Ditto.
20190 (loongarch_symbol_insns): Ditto.
20191 (loongarch_cannot_force_const_mem): Ditto.
20192 (loongarch_valid_offset_p): Ditto.
20193 (loongarch_valid_index_p): Ditto.
20194 (loongarch_classify_address): Ditto.
20195 (loongarch_address_insns): Ditto.
20196 (loongarch_ldst_scaled_shift): Ditto.
20197 (loongarch_const_insns): Ditto.
20198 (loongarch_split_move_insn_p): Ditto.
20199 (loongarch_subword_at_byte): Ditto.
20200 (loongarch_legitimize_move): Ditto.
20201 (loongarch_builtin_vectorization_cost): Ditto.
20202 (loongarch_split_move_p): Ditto.
20203 (loongarch_split_move): Ditto.
20204 (loongarch_split_move_insn): Ditto.
20205 (loongarch_output_move_index_float): Ditto.
20206 (loongarch_split_128bit_move_p): Ditto.
20207 (loongarch_split_128bit_move): Ditto.
20208 (loongarch_split_lsx_copy_d): Ditto.
20209 (loongarch_split_lsx_insert_d): Ditto.
20210 (loongarch_split_lsx_fill_d): Ditto.
20211 (loongarch_output_move): Ditto.
20212 (loongarch_extend_comparands): Ditto.
20213 (loongarch_print_operand_reloc): Ditto.
20214 (loongarch_print_operand): Ditto.
20215 (loongarch_hard_regno_mode_ok_uncached): Ditto.
20216 (loongarch_hard_regno_call_part_clobbered): Ditto.
20217 (loongarch_hard_regno_nregs): Ditto.
20218 (loongarch_class_max_nregs): Ditto.
20219 (loongarch_can_change_mode_class): Ditto.
20220 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
20221 (loongarch_secondary_reload): Ditto.
20222 (loongarch_vector_mode_supported_p): Ditto.
20223 (loongarch_preferred_simd_mode): Ditto.
20224 (loongarch_autovectorize_vector_modes): Ditto.
20225 (loongarch_lsx_output_division): Ditto.
20226 (loongarch_option_override_internal): Ditto.
20227 (loongarch_hard_regno_caller_save_mode): Ditto.
20228 (MAX_VECT_LEN): Ditto.
20229 (loongarch_spill_class): Ditto.
20230 (struct expand_vec_perm_d): Ditto.
20231 (loongarch_promote_function_mode): Ditto.
20232 (loongarch_expand_vselect): Ditto.
20233 (loongarch_starting_frame_offset): Ditto.
20234 (loongarch_expand_vselect_vconcat): Ditto.
20235 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
20236 (TARGET_OPTION_OVERRIDE): Ditto.
20237 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
20238 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
20239 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
20240 (loongarch_expand_lsx_shuffle): Ditto.
20241 (TARGET_SCHED_INIT): Ditto.
20242 (TARGET_SCHED_REORDER): Ditto.
20243 (TARGET_SCHED_REORDER2): Ditto.
20244 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
20245 (TARGET_SCHED_ADJUST_COST): Ditto.
20246 (TARGET_SCHED_ISSUE_RATE): Ditto.
20247 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
20248 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
20249 (TARGET_VALID_POINTER_MODE): Ditto.
20250 (TARGET_REGISTER_MOVE_COST): Ditto.
20251 (TARGET_MEMORY_MOVE_COST): Ditto.
20252 (TARGET_RTX_COSTS): Ditto.
20253 (TARGET_ADDRESS_COST): Ditto.
20254 (TARGET_IN_SMALL_DATA_P): Ditto.
20255 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
20256 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
20257 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
20258 (loongarch_expand_vec_perm): Ditto.
20259 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
20260 (TARGET_RETURN_IN_MEMORY): Ditto.
20261 (TARGET_FUNCTION_VALUE): Ditto.
20262 (TARGET_LIBCALL_VALUE): Ditto.
20263 (loongarch_try_expand_lsx_vshuf_const): Ditto.
20264 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
20265 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
20266 (TARGET_PRINT_OPERAND): Ditto.
20267 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
20268 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
20269 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
20270 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
20271 (TARGET_MUST_PASS_IN_STACK): Ditto.
20272 (TARGET_PASS_BY_REFERENCE): Ditto.
20273 (TARGET_ARG_PARTIAL_BYTES): Ditto.
20274 (TARGET_FUNCTION_ARG): Ditto.
20275 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
20276 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
20277 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
20278 (TARGET_INIT_BUILTINS): Ditto.
20279 (loongarch_expand_vec_perm_const_1): Ditto.
20280 (loongarch_expand_vec_perm_const_2): Ditto.
20281 (loongarch_vectorize_vec_perm_const): Ditto.
20282 (loongarch_cpu_sched_reassociation_width): Ditto.
20283 (loongarch_sched_reassociation_width): Ditto.
20284 (loongarch_expand_vector_extract): Ditto.
20285 (emit_reduc_half): Ditto.
20286 (loongarch_expand_vector_reduc): Ditto.
20287 (loongarch_expand_vec_unpack): Ditto.
20288 (loongarch_lsx_vec_parallel_const_half): Ditto.
20289 (loongarch_constant_elt_p): Ditto.
20290 (loongarch_gen_const_int_vector_shuffle): Ditto.
20291 (loongarch_expand_vector_init): Ditto.
20292 (loongarch_expand_lsx_cmp): Ditto.
20293 (loongarch_expand_vec_cond_expr): Ditto.
20294 (loongarch_expand_vec_cond_mask_expr): Ditto.
20295 (loongarch_expand_vec_cmp): Ditto.
20296 (loongarch_case_values_threshold): Ditto.
20297 (loongarch_build_const_vector): Ditto.
20298 (loongarch_build_signbit_mask): Ditto.
20299 (loongarch_builtin_support_vector_misalignment): Ditto.
20300 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
20301 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
20302 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
20303 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
20304 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
20305 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
20306 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
20307 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
20308 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
20309 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
20310 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
20311 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
20312 (UNITS_PER_LSX_REG): Ditto.
20313 (BITS_PER_LSX_REG): Ditto.
20314 (BIGGEST_ALIGNMENT): Ditto.
20315 (LSX_REG_FIRST): Ditto.
20316 (LSX_REG_LAST): Ditto.
20317 (LSX_REG_NUM): Ditto.
20318 (LSX_REG_P): Ditto.
20319 (LSX_REG_RTX_P): Ditto.
20320 (IMM13_OPERAND): Ditto.
20321 (LSX_SUPPORTED_MODE_P): Ditto.
20322 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
20323 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
20324 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
20331 * config/loongarch/loongarch.opt: Ditto.
20332 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
20333 (const_uimm3_operand): Ditto.
20334 (const_8_to_11_operand): Ditto.
20335 (const_12_to_15_operand): Ditto.
20336 (const_uimm4_operand): Ditto.
20337 (const_uimm6_operand): Ditto.
20338 (const_uimm7_operand): Ditto.
20339 (const_uimm8_operand): Ditto.
20340 (const_imm5_operand): Ditto.
20341 (const_imm10_operand): Ditto.
20342 (const_imm13_operand): Ditto.
20343 (reg_imm10_operand): Ditto.
20344 (aq8b_operand): Ditto.
20345 (aq8h_operand): Ditto.
20346 (aq8w_operand): Ditto.
20347 (aq8d_operand): Ditto.
20348 (aq10b_operand): Ditto.
20349 (aq10h_operand): Ditto.
20350 (aq10w_operand): Ditto.
20351 (aq10d_operand): Ditto.
20352 (aq12b_operand): Ditto.
20353 (aq12h_operand): Ditto.
20354 (aq12w_operand): Ditto.
20355 (aq12d_operand): Ditto.
20356 (const_m1_operand): Ditto.
20357 (reg_or_m1_operand): Ditto.
20358 (const_exp_2_operand): Ditto.
20359 (const_exp_4_operand): Ditto.
20360 (const_exp_8_operand): Ditto.
20361 (const_exp_16_operand): Ditto.
20362 (const_exp_32_operand): Ditto.
20363 (const_0_or_1_operand): Ditto.
20364 (const_0_to_3_operand): Ditto.
20365 (const_0_to_7_operand): Ditto.
20366 (const_2_or_3_operand): Ditto.
20367 (const_4_to_7_operand): Ditto.
20368 (const_8_to_15_operand): Ditto.
20369 (const_16_to_31_operand): Ditto.
20370 (qi_mask_operand): Ditto.
20371 (hi_mask_operand): Ditto.
20372 (si_mask_operand): Ditto.
20373 (d_operand): Ditto.
20374 (db4_operand): Ditto.
20375 (db7_operand): Ditto.
20376 (db8_operand): Ditto.
20377 (ib3_operand): Ditto.
20378 (sb4_operand): Ditto.
20379 (sb5_operand): Ditto.
20380 (sb8_operand): Ditto.
20381 (sd8_operand): Ditto.
20382 (ub4_operand): Ditto.
20383 (ub8_operand): Ditto.
20384 (uh4_operand): Ditto.
20385 (uw4_operand): Ditto.
20386 (uw5_operand): Ditto.
20387 (uw6_operand): Ditto.
20388 (uw8_operand): Ditto.
20389 (addiur2_operand): Ditto.
20390 (addiusp_operand): Ditto.
20391 (andi16_operand): Ditto.
20392 (movep_src_register): Ditto.
20393 (movep_src_operand): Ditto.
20394 (fcc_reload_operand): Ditto.
20395 (muldiv_target_operand): Ditto.
20396 (const_vector_same_val_operand): Ditto.
20397 (const_vector_same_simm5_operand): Ditto.
20398 (const_vector_same_uimm5_operand): Ditto.
20399 (const_vector_same_ximm5_operand): Ditto.
20400 (const_vector_same_uimm6_operand): Ditto.
20401 (par_const_vector_shf_set_operand): Ditto.
20402 (reg_or_vector_same_val_operand): Ditto.
20403 (reg_or_vector_same_simm5_operand): Ditto.
20404 (reg_or_vector_same_uimm5_operand): Ditto.
20405 (reg_or_vector_same_ximm5_operand): Ditto.
20406 (reg_or_vector_same_uimm6_operand): Ditto.
20407 * doc/md.texi: Ditto.
20408 * config/loongarch/lsx.md: New file.
20410 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20412 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
20413 (get_all_predecessors): New function.
20414 (get_all_successors): Ditto.
20415 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
20416 (get_all_successors): Ditto.
20417 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
20418 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
20420 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
20422 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
20423 (split_addsi): Likewise.
20424 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
20425 'N', 'x', and 'J' code letters.
20426 (arc_output_addsi): Make it static.
20427 (split_addsi): Remove it.
20428 * config/arc/arc.h (UNSIGNED_INT*): New defines.
20429 (SINNED_INT*): Likewise.
20430 * config/arc/arc.md (type): Add add, sub, bxor types.
20431 (tst_movb): Change code letter from 's' to 'x'.
20432 (andsi3_i): Likewise.
20433 (addsi3_mixed): Refurbish the pattern.
20434 (call_i): Change code letter from 'S' to 'J'.
20435 * config/arc/arc700.md: Add newly introduced types.
20436 * config/arc/arcHS.md: Likewsie.
20437 * config/arc/arcHS4x.md: Likewise.
20438 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
20439 (CM4): Update description.
20440 (CP4, C6u, C6n, CIs, C4p): New constraint.
20442 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
20444 * common/config/arc/arc-common.cc (arc_option_optimization_table):
20445 Remove mbbit_peephole.
20446 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
20447 (store_direct): Likewise.
20448 (BBIT peephole2): Likewise.
20449 * config/arc/arc.opt (mbbit-peephole): Ignore option.
20450 * doc/invoke.texi (mbbit-peephole): Update document.
20452 2023-09-05 Jakub Jelinek <jakub@redhat.com>
20454 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
20455 avreage -> average.
20457 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
20459 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
20460 options passed from driver to gnat1 as explicit for multilib.
20462 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
20464 * config.gcc: add loongarch*-elf target.
20465 * config/loongarch/elf.h: New file.
20466 Link against newlib by default.
20468 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
20470 * config.gcc: use -mstrict-align for building libraries
20471 if --with-strict-align-lib is given.
20472 * doc/install.texi: likewise.
20474 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
20476 * config/loongarch/loongarch-c.cc: Export macros
20477 "__loongarch_{arch,tune}" in the preprocessor.
20479 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
20481 * config.gcc: Make --with-abi= obsolete, decide the default ABI
20482 with target triplet. Allow specifying multilib library build
20483 options with --with-multilib-list and --with-multilib-default.
20484 * config/loongarch/t-linux: Likewise.
20485 * config/loongarch/genopts/loongarch-strings: Likewise.
20486 * config/loongarch/loongarch-str.h: Likewise.
20487 * doc/install.texi: Likewise.
20488 * config/loongarch/genopts/loongarch.opt.in: Introduce
20489 -m[no-]l[a]sx options. Only process -m*-float and
20490 -m[no-]l[a]sx in the GCC driver.
20491 * config/loongarch/loongarch.opt: Likewise.
20492 * config/loongarch/la464.md: Likewise.
20493 * config/loongarch/loongarch-c.cc: Likewise.
20494 * config/loongarch/loongarch-cpu.cc: Likewise.
20495 * config/loongarch/loongarch-cpu.h: Likewise.
20496 * config/loongarch/loongarch-def.c: Likewise.
20497 * config/loongarch/loongarch-def.h: Likewise.
20498 * config/loongarch/loongarch-driver.cc: Likewise.
20499 * config/loongarch/loongarch-driver.h: Likewise.
20500 * config/loongarch/loongarch-opts.cc: Likewise.
20501 * config/loongarch/loongarch-opts.h: Likewise.
20502 * config/loongarch/loongarch.cc: Likewise.
20503 * doc/invoke.texi: Likewise.
20505 2023-09-05 liuhongt <hongtao.liu@intel.com>
20507 * config/i386/sse.md: (V8BFH_128): Renamed to ..
20508 (VHFBF_128): .. this.
20509 (V16BFH_256): Renamed to ..
20510 (VHFBF_256): .. this.
20511 (avx512f_mov<mode>): Extend to V_128.
20512 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
20513 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
20514 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
20515 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
20516 * config/i386/i386-expand.cc (expand_vec_perm_blend):
20517 Canonicalize vec_merge.
20519 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20521 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
20522 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
20523 (autovectorize_vector_modes): Ditto.
20524 (vectorize_related_mode): Ditto.
20526 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
20528 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
20529 all 32b Darwin PowerPC cases.
20531 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
20533 * config/darwin-sections.def (static_init_section): Add the
20534 __TEXT,__StaticInit section.
20535 * config/darwin.cc (darwin_function_section): Use the static init
20536 section for global initializers, to match other platform toolchains.
20538 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
20540 * config/darwin-sections.def (darwin_exception_section): Move to
20541 the __TEXT segment.
20542 * config/darwin.cc (darwin_emit_except_table_label): Align before
20543 the exception table label.
20544 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
20545 relative 4byte relocs.
20547 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
20549 * config/darwin.cc (dump_machopic_symref_flags): New.
20550 (debug_machopic_symref_flags): New.
20552 2023-09-04 Pan Li <pan2.li@intel.com>
20554 * config/riscv/riscv-vector-builtins-types.def
20555 (vfloat16mf4_t): Add FP16 intrinsic def.
20556 (vfloat16mf2_t): Ditto.
20557 (vfloat16m1_t): Ditto.
20558 (vfloat16m2_t): Ditto.
20559 (vfloat16m4_t): Ditto.
20560 (vfloat16m8_t): Ditto.
20562 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
20564 PR tree-optimization/108757
20565 * match.pd ((X - N * M) / N): New pattern.
20566 ((X + N * M) / N): New pattern.
20567 ((X + C) div_rshift N): New pattern.
20569 2023-09-04 Guo Jie <guojie@loongson.cn>
20571 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
20572 movsf_hardfloat and movdf_hardfloat.
20574 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
20576 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
20577 In unsigned QImode test, check for sign extended subreg and/or
20578 constant operands, and do a sign extension in that case.
20579 * config/loongarch/loongarch.md (TARGET_64BIT): Define
20580 template cbranchqi4.
20582 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
20584 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
20585 from memory into floating-point registers.
20587 2023-09-03 Pan Li <pan2.li@intel.com>
20589 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
20591 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
20593 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
20595 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
20596 pointer before overwriting it.
20598 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
20600 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
20601 Associate the __float128 type to float128_type_node so that it can
20602 be recognized by the compiler.
20603 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
20604 Add the flag "FLOAT128_TYPE" to gcc and associate a function
20605 with the suffix "q" to "f128".
20606 * doc/extend.texi:Added support for 128-bit floating-point functions on
20607 the LoongArch architecture.
20609 2023-09-01 Jakub Jelinek <jakub@redhat.com>
20612 * common.opt (fabi-version=): Document version 19.
20613 * doc/invoke.texi (-fabi-version=): Likewise.
20615 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
20617 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
20618 New combine pattern.
20619 (*cond_<float_cvt><vconvert><mode>): Ditto.
20620 (*cond_<optab><vnconvert><mode>): Ditto.
20621 (*cond_<float_cvt><vnconvert><mode>): Ditto.
20622 (*cond_<optab><mode><vnconvert>): Ditto.
20623 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
20624 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
20625 (<float_cvt><vconvert><mode>2): Adjust.
20626 (<optab><vnconvert><mode>2): Adjust.
20627 (<float_cvt><vnconvert><mode>2): Adjust.
20628 (<optab><mode><vnconvert>2): Adjust.
20629 (<float_cvt><mode><vnconvert>2): Adjust.
20630 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
20632 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
20634 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
20635 New combine pattern.
20636 (*cond_trunc<mode><v_double_trunc>): Ditto.
20637 * config/riscv/autovec.md: Adjust.
20638 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
20640 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
20642 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
20643 New combine pattern.
20644 (*cond_<optab><v_quad_trunc><mode>): Ditto.
20645 (*cond_<optab><v_oct_trunc><mode>): Ditto.
20646 (*cond_trunc<mode><v_double_trunc>): Ditto.
20647 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
20648 (<optab><v_oct_trunc><mode>2): Ditto.
20650 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
20652 * config/riscv/autovec.md: Adjust.
20653 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
20654 (expand_cond_len_binop): Ditto.
20655 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
20656 (expand_cond_len_op): Ditto.
20657 (expand_cond_len_unop): Ditto.
20658 (expand_cond_len_binop): Ditto.
20659 (expand_cond_len_ternop): Ditto.
20661 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20663 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
20664 VECT_COMPARE_COSTS by default.
20666 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
20668 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
20670 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20672 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
20674 * config/riscv/riscv.opt: Add dynamic compile option.
20676 2023-09-01 Pan Li <pan2.li@intel.com>
20678 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
20679 vls floating-point autovec.
20680 * config/riscv/vector-iterators.md: New iterator for
20681 floating-point V and VLS.
20682 * config/riscv/vector.md: Add VLS to floating-point binop.
20684 2023-09-01 Andrew Pinski <apinski@marvell.com>
20686 PR tree-optimization/19832
20687 * match.pd: Add pattern to optimize
20688 `(a != b) ? a OP b : c`.
20690 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
20691 Guo Jie <guojie@loongson.cn>
20694 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
20695 frame_pointer_needed to determine whether to use the $fp register.
20697 2023-08-31 Andrew Pinski <apinski@marvell.com>
20699 PR tree-optimization/110915
20700 * match.pd (min_value, max_value): Extend to vector constants.
20702 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
20704 * config.in: Regenerate.
20705 * config/darwin-c.cc: Change spelling to macOS.
20706 * config/darwin-driver.cc: Likewise.
20707 * config/darwin.h: Likewise.
20708 * configure.ac: Likewise.
20709 * doc/contrib.texi: Likewise.
20710 * doc/extend.texi: Likewise.
20711 * doc/invoke.texi: Likewise.
20712 * doc/plugins.texi: Likewise.
20713 * doc/tm.texi: Regenerate.
20714 * doc/tm.texi.in: Change spelling to macOS.
20715 * plugin.cc: Likewise.
20717 2023-08-31 Pan Li <pan2.li@intel.com>
20719 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
20720 * config/riscv/autovec.md: Ditto.
20722 2023-08-31 Pan Li <pan2.li@intel.com>
20724 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
20725 * config/riscv/autovec.md: Ditto.
20727 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
20729 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
20730 rather than a call. List each possible destination register
20731 in the call pattern.
20733 2023-08-31 Pan Li <pan2.li@intel.com>
20735 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
20736 * config/riscv/autovec.md: Ditto.
20738 2023-08-31 Pan Li <pan2.li@intel.com>
20739 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20741 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
20742 * config/riscv/autovec.md: Ditto.
20743 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
20745 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
20747 * config/riscv/autovec.md (shifts): Use
20748 vector_scalar_shift_operand.
20749 * config/riscv/predicates.md (vector_scalar_shift_operand): New
20752 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20754 * config.gcc: Add vector cost model framework for RVV.
20755 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
20756 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
20757 * config/riscv/t-riscv: Ditto.
20758 * config/riscv/riscv-vector-costs.cc: New file.
20759 * config/riscv/riscv-vector-costs.h: New file.
20761 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
20764 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
20765 AltiVec address operands.
20766 (define_insn_and_split movxo): Likewise.
20767 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
20768 redundant mode size check.
20770 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
20772 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
20773 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
20774 Change to default policy.
20775 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
20776 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
20777 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
20779 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
20781 * config/riscv/autovec-opt.md: Adjust.
20782 * config/riscv/autovec-vls.md: Ditto.
20783 * config/riscv/autovec.md: Ditto.
20784 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
20785 (enum insn_flags): Add insn flags.
20786 (emit_vlmax_insn): Adjust.
20787 (emit_vlmax_fp_insn): Delete.
20788 (emit_vlmax_ternary_insn): Delete.
20789 (emit_vlmax_fp_ternary_insn): Delete.
20790 (emit_nonvlmax_insn): Adjust.
20791 (emit_vlmax_slide_insn): Delete.
20792 (emit_nonvlmax_slide_tu_insn): Delete.
20793 (emit_vlmax_merge_insn): Delete.
20794 (emit_vlmax_cmp_insn): Delete.
20795 (emit_vlmax_cmp_mu_insn): Delete.
20796 (emit_vlmax_masked_mu_insn): Delete.
20797 (emit_scalar_move_insn): Delete.
20798 (emit_nonvlmax_integer_move_insn): Delete.
20799 (emit_vlmax_insn_lra): Add.
20800 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
20801 (emit_vlmax_insn): Adjust.
20802 (emit_nonvlmax_insn): Adjust.
20803 (emit_vlmax_insn_lra): Add.
20804 (emit_vlmax_fp_insn): Delete.
20805 (emit_vlmax_ternary_insn): Delete.
20806 (emit_vlmax_fp_ternary_insn): Delete.
20807 (emit_vlmax_slide_insn): Delete.
20808 (emit_nonvlmax_slide_tu_insn): Delete.
20809 (emit_nonvlmax_slide_insn): Delete.
20810 (emit_vlmax_merge_insn): Delete.
20811 (emit_vlmax_cmp_insn): Delete.
20812 (emit_vlmax_cmp_mu_insn): Delete.
20813 (emit_vlmax_masked_insn): Delete.
20814 (emit_nonvlmax_masked_insn): Delete.
20815 (emit_vlmax_masked_store_insn): Delete.
20816 (emit_nonvlmax_masked_store_insn): Delete.
20817 (emit_vlmax_masked_mu_insn): Delete.
20818 (emit_vlmax_masked_fp_mu_insn): Delete.
20819 (emit_nonvlmax_tu_insn): Delete.
20820 (emit_nonvlmax_fp_tu_insn): Delete.
20821 (emit_nonvlmax_tumu_insn): Delete.
20822 (emit_nonvlmax_fp_tumu_insn): Delete.
20823 (emit_scalar_move_insn): Delete.
20824 (emit_cpop_insn): Delete.
20825 (emit_vlmax_integer_move_insn): Delete.
20826 (emit_nonvlmax_integer_move_insn): Delete.
20827 (emit_vlmax_gather_insn): Delete.
20828 (emit_vlmax_masked_gather_mu_insn): Delete.
20829 (emit_vlmax_compress_insn): Delete.
20830 (emit_nonvlmax_compress_insn): Delete.
20831 (emit_vlmax_reduction_insn): Delete.
20832 (emit_vlmax_fp_reduction_insn): Delete.
20833 (emit_nonvlmax_fp_reduction_insn): Delete.
20834 (expand_vec_series): Adjust.
20835 (expand_const_vector): Adjust.
20836 (legitimize_move): Adjust.
20837 (sew64_scalar_helper): Adjust.
20838 (expand_tuple_move): Adjust.
20839 (expand_vector_init_insert_elems): Adjust.
20840 (expand_vector_init_merge_repeating_sequence): Adjust.
20841 (expand_vec_cmp): Adjust.
20842 (expand_vec_cmp_float): Adjust.
20843 (expand_vec_perm): Adjust.
20844 (shuffle_merge_patterns): Adjust.
20845 (shuffle_compress_patterns): Adjust.
20846 (shuffle_decompress_patterns): Adjust.
20847 (expand_load_store): Adjust.
20848 (expand_cond_len_op): Adjust.
20849 (expand_cond_len_unop): Adjust.
20850 (expand_cond_len_binop): Adjust.
20851 (expand_gather_scatter): Adjust.
20852 (expand_cond_len_ternop): Adjust.
20853 (expand_reduction): Adjust.
20854 (expand_lanes_load_store): Adjust.
20855 (expand_fold_extract_last): Adjust.
20856 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
20857 * config/riscv/vector.md: Adjust.
20859 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
20862 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
20863 load/store with length only on 64-bit Power10.
20865 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
20867 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
20868 SWAP option is enabled.
20869 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
20871 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
20873 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
20874 Use common insn for signed and unsigned front-end definitions.
20875 * config/arm/arm_mve_builtins.def
20876 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
20877 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
20878 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
20881 (mve_rot): Likewise.
20883 (VxCADDQ_M): Likewise.
20884 * config/arm/unspecs.md (unspec): Likewise.
20885 * config/arm/mve.md: Fix minor typo.
20887 2023-08-31 liuhongt <hongtao.liu@intel.com>
20889 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
20890 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
20891 (VF_AVX512HFBF16): Renamed to VHFBF.
20892 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
20893 (VF_AVX512FP16): Removed.
20894 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
20895 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
20896 (rsqrt<mode>2): Ditto.
20897 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
20898 (vcond<mode><code>): Ditto.
20899 (vcond<sseintvecmodelower><mode>): Ditto.
20900 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
20901 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
20902 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
20903 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
20904 (cmla<conj_op><mode>4): Ditto.
20905 (fma_<mode>_fadd_fmul): Ditto.
20906 (fma_<mode>_fadd_fcmul): Ditto.
20907 (fma_<complexopname>_<mode>_fma_zero): Ditto.
20908 (fma_<mode>_fmaddc_bcst): Ditto.
20909 (fma_<mode>_fcmaddc_bcst): Ditto.
20910 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
20911 (cmul<conj_op><mode>3): Ditto.
20912 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
20914 (vec_unpacks_lo_<mode>): Ditto.
20915 (vec_unpacks_hi_<mode>): Ditto.
20916 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
20917 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
20918 (*vec_extract<mode>_0): Ditto.
20919 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
20921 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
20924 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
20926 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
20928 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
20929 (operator_minus::overflow_free_p): New declare.
20930 (operator_mult::overflow_free_p): New declare.
20931 * range-op.cc (range_op_handler::overflow_free_p): New function.
20932 (range_operator::overflow_free_p): New default function.
20933 (operator_plus::overflow_free_p): New function.
20934 (operator_minus::overflow_free_p): New function.
20935 (operator_mult::overflow_free_p): New function.
20936 * range-op.h (range_op_handler::overflow_free_p): New declare.
20937 (range_operator::overflow_free_p): New declare.
20938 * value-range.cc (irange::nonnegative_p): New function.
20939 (irange::nonpositive_p): New function.
20940 * value-range.h (irange::nonnegative_p): New declare.
20941 (irange::nonpositive_p): New declare.
20943 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
20946 * config/pru/predicates.md (const_0_operand): New predicate.
20947 (pru_cstore_comparison_operator): Ditto.
20948 * config/pru/pru.md (cstore<mode>4): New pattern.
20949 (cstoredi4): Ditto.
20951 2023-08-30 Richard Biener <rguenther@suse.de>
20953 PR tree-optimization/111228
20954 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
20955 New simplifications.
20957 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20959 * config/riscv/autovec.md (movmisalign<mode>): Delete.
20961 2023-08-30 Die Li <lidie@eswincomputing.com>
20962 Fei Gao <gaofei@eswincomputing.com>
20964 * config/riscv/peephole.md: New pattern.
20965 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
20966 (zcmp_mv_sreg_operand): New predicate.
20967 * config/riscv/riscv.md: New predicate.
20968 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
20969 (*mvsa01<X:mode>): New pattern.
20971 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
20973 * config/riscv/riscv.cc
20974 (riscv_zcmp_can_use_popretz): true if popretz can be used
20975 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
20976 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
20977 * config/riscv/riscv.md: define A0_REGNUM
20978 * config/riscv/zc.md
20979 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
20980 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
20981 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
20982 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
20983 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
20984 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
20985 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
20986 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
20987 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
20988 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
20989 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
20990 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
20992 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
20994 * config/riscv/iterators.md
20995 (slot0_offset): slot 0 offset in stack GPRs area in bytes
20996 (slot1_offset): slot 1 offset in stack GPRs area in bytes
20997 (slot2_offset): likewise
20998 (slot3_offset): likewise
20999 (slot4_offset): likewise
21000 (slot5_offset): likewise
21001 (slot6_offset): likewise
21002 (slot7_offset): likewise
21003 (slot8_offset): likewise
21004 (slot9_offset): likewise
21005 (slot10_offset): likewise
21006 (slot11_offset): likewise
21007 (slot12_offset): likewise
21008 * config/riscv/predicates.md
21009 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
21010 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
21011 (stack_push_up_to_s1_operand): likewise
21012 (stack_push_up_to_s2_operand): likewise
21013 (stack_push_up_to_s3_operand): likewise
21014 (stack_push_up_to_s4_operand): likewise
21015 (stack_push_up_to_s5_operand): likewise
21016 (stack_push_up_to_s6_operand): likewise
21017 (stack_push_up_to_s7_operand): likewise
21018 (stack_push_up_to_s8_operand): likewise
21019 (stack_push_up_to_s9_operand): likewise
21020 (stack_push_up_to_s11_operand): likewise
21021 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
21022 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
21023 (stack_pop_up_to_s1_operand): likewise
21024 (stack_pop_up_to_s2_operand): likewise
21025 (stack_pop_up_to_s3_operand): likewise
21026 (stack_pop_up_to_s4_operand): likewise
21027 (stack_pop_up_to_s5_operand): likewise
21028 (stack_pop_up_to_s6_operand): likewise
21029 (stack_pop_up_to_s7_operand): likewise
21030 (stack_pop_up_to_s8_operand): likewise
21031 (stack_pop_up_to_s9_operand): likewise
21032 (stack_pop_up_to_s11_operand): likewise
21033 * config/riscv/riscv-protos.h
21034 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
21035 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
21036 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
21037 (riscv_use_multi_push): true if multi push is used
21038 (riscv_multi_push_sregs_count): num of sregs in multi-push
21039 (riscv_multi_push_regs_count): num of regs in multi-push
21040 (riscv_16bytes_align): align to 16 bytes
21041 (riscv_stack_align): moved to a better place
21042 (riscv_save_libcall_count): no functional change
21043 (riscv_compute_frame_info): add zcmp frame info
21044 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
21045 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
21046 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
21047 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
21048 (riscv_expand_prologue): allocate stack by cm.push
21049 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
21050 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
21051 (zcmp_base_adj): calculate stack adjustment base size
21052 (zcmp_additional_adj): calculate stack adjustment additional size
21053 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
21054 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
21055 (S0_MASK): likewise
21056 (S1_MASK): likewise
21057 (S2_MASK): likewise
21058 (S3_MASK): likewise
21059 (S4_MASK): likewise
21060 (S5_MASK): likewise
21061 (S6_MASK): likewise
21062 (S7_MASK): likewise
21063 (S8_MASK): likewise
21064 (S9_MASK): likewise
21065 (S10_MASK): likewise
21066 (S11_MASK): likewise
21067 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
21068 (ZCMP_MAX_SPIMM): max spimm value
21069 (ZCMP_SP_INC_STEP): zcmp sp increment step
21070 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
21071 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
21072 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
21073 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
21074 * config/riscv/riscv.md: include zc.md
21075 * config/riscv/zc.md: New file. machine description for zcmp
21077 2023-08-30 Jakub Jelinek <jakub@redhat.com>
21079 PR tree-optimization/110914
21080 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
21081 adjust_last_stmt unless len is known constant.
21083 2023-08-30 Jakub Jelinek <jakub@redhat.com>
21085 PR tree-optimization/111015
21086 * gimple-ssa-store-merging.cc
21087 (imm_store_chain_info::output_merged_store): Use wi::mask and
21088 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
21089 build_int_cst to build BIT_AND_EXPR mask.
21091 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21093 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
21094 (call_may_clobber_ref_p_1): Ditto.
21095 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
21096 (get_alias_ptr_type_for_ptr_address): Ditto.
21098 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21100 * config/riscv/riscv-vsetvl.cc
21101 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
21103 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21105 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
21106 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
21109 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
21111 * config/riscv/zicond.md: New splitters to rewrite single bit
21112 sign extension as the condition to a czero in the desired form.
21114 2023-08-29 David Malcolm <dmalcolm@redhat.com>
21117 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
21119 2023-08-29 David Malcolm <dmalcolm@redhat.com>
21122 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
21124 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
21126 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
21127 zvfh can generate zfa extended instruction fli.h, just like zfh.
21129 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
21130 Vineet Gupta <vineetg@rivosinc.com>
21132 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
21133 __riscv_unaligned_avoid with value 1 or
21134 __riscv_unaligned_slow with value 1 or
21135 __riscv_unaligned_fast with value 1
21136 * config/riscv/riscv.cc (riscv_option_override): Define
21137 riscv_user_wants_strict_align. Set
21138 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
21139 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
21141 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
21143 * config/riscv/autovec-vls.md: Update types
21144 * config/riscv/riscv.md: Add vector placeholder type
21145 * config/riscv/vector.md: Update types
21147 2023-08-29 Carl Love <cel@us.ibm.com>
21149 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
21150 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
21151 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
21152 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
21153 New buit-in definitions.
21154 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
21155 overloaded definition.
21156 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
21158 2023-08-29 Pan Li <pan2.li@intel.com>
21159 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21161 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
21162 (riscv_legitimize_const_move): Handle ref plus const poly.
21164 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
21166 * common/config/riscv/riscv-common.cc
21167 (riscv_implied_info): Add implications from unprivileged extensions.
21168 (riscv_ext_version_table): Add stub support for all unprivileged
21169 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
21171 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
21173 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
21174 Add stub support for all vendor extensions supported by Binutils.
21176 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
21178 * common/config/riscv/riscv-common.cc
21179 (riscv_implied_info): Add implications from privileged extensions.
21180 (riscv_ext_version_table): Add stub support for all privileged
21181 extensions supported by Binutils.
21183 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
21185 * config/riscv/autovec.md: Adjust
21186 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
21187 (get_vlmax_rtx): Exported.
21188 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
21189 (emit_vlmax_masked_gather_mu_insn): Adjust.
21190 (get_vlmax_rtx): New func.
21191 (expand_load_store): Adjust.
21192 (expand_cond_len_unop): Call expand_cond_len_op.
21193 (expand_cond_len_op): New subroutine.
21194 (expand_cond_len_binop): Call expand_cond_len_op.
21195 (expand_cond_len_ternop): Call expand_cond_len_op.
21196 (expand_lanes_load_store): Adjust.
21198 2023-08-29 Jakub Jelinek <jakub@redhat.com>
21200 PR middle-end/79173
21201 PR middle-end/111209
21202 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
21203 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
21204 carry-out on higher limb. Don't match it though if it could be
21205 matched later on 4 argument addition/subtraction.
21207 2023-08-29 Andrew Pinski <apinski@marvell.com>
21209 PR tree-optimization/111147
21210 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
21211 instead of matching bit_not.
21213 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
21215 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
21218 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21220 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
21221 (pass_vsetvl::compute_local_properties): Fix bug.
21222 (pass_vsetvl::commit_vsetvls): Ditto.
21223 * config/riscv/riscv-vsetvl.h: New function.
21225 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
21228 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
21230 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
21231 force_reg mem target operand.
21232 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
21233 (*pred_mov<mode>): Remove imm -> reg pattern.
21234 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
21236 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
21238 * common/config/loongarch/loongarch-common.cc:
21239 Enable '-free' on O2 and above.
21240 * doc/invoke.texi: Modify the description information
21241 of the '-free' compilation option and add the LoongArch
21244 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
21246 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
21248 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
21250 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
21251 Implement the 'Zihintpause' extension, version 2.0.
21252 (riscv_ext_flag_table) Add 'Zihintpause' handling.
21253 * config/riscv/riscv-builtins.cc: Remove availability predicate
21254 "always" and add "hint_pause".
21255 (riscv_builtins) : Add "pause" extension.
21256 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
21257 * config/riscv/riscv.md (riscv_pause): Adjust output based on
21258 TARGET_ZIHINTPAUSE.
21260 2023-08-28 Andrew Pinski <apinski@marvell.com>
21262 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
21263 instead of specifically checking for ~X.
21265 2023-08-28 Andrew Pinski <apinski@marvell.com>
21267 PR tree-optimization/111146
21268 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
21271 2023-08-28 Andrew Pinski <apinski@marvell.com>
21273 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
21274 when resimplify returns true.
21275 (match_simplify_replacement): Print only if accepted the match-and-simplify
21276 result rather than the full sequence.
21278 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21280 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
21282 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
21284 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21286 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
21288 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21290 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
21291 (vmulltq_poly): New.
21292 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
21293 (vmulltq_poly): New.
21294 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
21295 (vmulltq_poly): New.
21296 * config/arm/arm_mve.h (vmulltq_poly): Remove.
21297 (vmullbq_poly): Remove.
21298 (vmullbq_poly_m): Remove.
21299 (vmulltq_poly_m): Remove.
21300 (vmullbq_poly_x): Remove.
21301 (vmulltq_poly_x): Remove.
21302 (vmulltq_poly_p8): Remove.
21303 (vmullbq_poly_p8): Remove.
21304 (vmulltq_poly_p16): Remove.
21305 (vmullbq_poly_p16): Remove.
21306 (vmullbq_poly_m_p8): Remove.
21307 (vmullbq_poly_m_p16): Remove.
21308 (vmulltq_poly_m_p8): Remove.
21309 (vmulltq_poly_m_p16): Remove.
21310 (vmullbq_poly_x_p8): Remove.
21311 (vmullbq_poly_x_p16): Remove.
21312 (vmulltq_poly_x_p8): Remove.
21313 (vmulltq_poly_x_p16): Remove.
21314 (__arm_vmulltq_poly_p8): Remove.
21315 (__arm_vmullbq_poly_p8): Remove.
21316 (__arm_vmulltq_poly_p16): Remove.
21317 (__arm_vmullbq_poly_p16): Remove.
21318 (__arm_vmullbq_poly_m_p8): Remove.
21319 (__arm_vmullbq_poly_m_p16): Remove.
21320 (__arm_vmulltq_poly_m_p8): Remove.
21321 (__arm_vmulltq_poly_m_p16): Remove.
21322 (__arm_vmullbq_poly_x_p8): Remove.
21323 (__arm_vmullbq_poly_x_p16): Remove.
21324 (__arm_vmulltq_poly_x_p8): Remove.
21325 (__arm_vmulltq_poly_x_p16): Remove.
21326 (__arm_vmulltq_poly): Remove.
21327 (__arm_vmullbq_poly): Remove.
21328 (__arm_vmullbq_poly_m): Remove.
21329 (__arm_vmulltq_poly_m): Remove.
21330 (__arm_vmullbq_poly_x): Remove.
21331 (__arm_vmulltq_poly_x): Remove.
21333 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21335 * config/arm/arm-mve-builtins-functions.h (class
21336 unspec_mve_function_exact_insn_vmull_poly): New.
21338 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21340 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
21341 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
21343 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21345 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
21346 support for 'U' and 'p' format specifiers.
21348 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21350 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
21352 (TYPES_poly_8_16): New.
21354 * config/arm/arm-mve-builtins.def (p8): New type suffix.
21356 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
21358 (struct type_suffix_info): Add poly_p field.
21360 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21362 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
21364 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
21366 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
21368 * config/arm/arm_mve.h (vmulltq_int): Remove.
21369 (vmullbq_int): Remove.
21370 (vmullbq_int_m): Remove.
21371 (vmulltq_int_m): Remove.
21372 (vmullbq_int_x): Remove.
21373 (vmulltq_int_x): Remove.
21374 (vmulltq_int_u8): Remove.
21375 (vmullbq_int_u8): Remove.
21376 (vmulltq_int_s8): Remove.
21377 (vmullbq_int_s8): Remove.
21378 (vmulltq_int_u16): Remove.
21379 (vmullbq_int_u16): Remove.
21380 (vmulltq_int_s16): Remove.
21381 (vmullbq_int_s16): Remove.
21382 (vmulltq_int_u32): Remove.
21383 (vmullbq_int_u32): Remove.
21384 (vmulltq_int_s32): Remove.
21385 (vmullbq_int_s32): Remove.
21386 (vmullbq_int_m_s8): Remove.
21387 (vmullbq_int_m_s32): Remove.
21388 (vmullbq_int_m_s16): Remove.
21389 (vmullbq_int_m_u8): Remove.
21390 (vmullbq_int_m_u32): Remove.
21391 (vmullbq_int_m_u16): Remove.
21392 (vmulltq_int_m_s8): Remove.
21393 (vmulltq_int_m_s32): Remove.
21394 (vmulltq_int_m_s16): Remove.
21395 (vmulltq_int_m_u8): Remove.
21396 (vmulltq_int_m_u32): Remove.
21397 (vmulltq_int_m_u16): Remove.
21398 (vmullbq_int_x_s8): Remove.
21399 (vmullbq_int_x_s16): Remove.
21400 (vmullbq_int_x_s32): Remove.
21401 (vmullbq_int_x_u8): Remove.
21402 (vmullbq_int_x_u16): Remove.
21403 (vmullbq_int_x_u32): Remove.
21404 (vmulltq_int_x_s8): Remove.
21405 (vmulltq_int_x_s16): Remove.
21406 (vmulltq_int_x_s32): Remove.
21407 (vmulltq_int_x_u8): Remove.
21408 (vmulltq_int_x_u16): Remove.
21409 (vmulltq_int_x_u32): Remove.
21410 (__arm_vmulltq_int_u8): Remove.
21411 (__arm_vmullbq_int_u8): Remove.
21412 (__arm_vmulltq_int_s8): Remove.
21413 (__arm_vmullbq_int_s8): Remove.
21414 (__arm_vmulltq_int_u16): Remove.
21415 (__arm_vmullbq_int_u16): Remove.
21416 (__arm_vmulltq_int_s16): Remove.
21417 (__arm_vmullbq_int_s16): Remove.
21418 (__arm_vmulltq_int_u32): Remove.
21419 (__arm_vmullbq_int_u32): Remove.
21420 (__arm_vmulltq_int_s32): Remove.
21421 (__arm_vmullbq_int_s32): Remove.
21422 (__arm_vmullbq_int_m_s8): Remove.
21423 (__arm_vmullbq_int_m_s32): Remove.
21424 (__arm_vmullbq_int_m_s16): Remove.
21425 (__arm_vmullbq_int_m_u8): Remove.
21426 (__arm_vmullbq_int_m_u32): Remove.
21427 (__arm_vmullbq_int_m_u16): Remove.
21428 (__arm_vmulltq_int_m_s8): Remove.
21429 (__arm_vmulltq_int_m_s32): Remove.
21430 (__arm_vmulltq_int_m_s16): Remove.
21431 (__arm_vmulltq_int_m_u8): Remove.
21432 (__arm_vmulltq_int_m_u32): Remove.
21433 (__arm_vmulltq_int_m_u16): Remove.
21434 (__arm_vmullbq_int_x_s8): Remove.
21435 (__arm_vmullbq_int_x_s16): Remove.
21436 (__arm_vmullbq_int_x_s32): Remove.
21437 (__arm_vmullbq_int_x_u8): Remove.
21438 (__arm_vmullbq_int_x_u16): Remove.
21439 (__arm_vmullbq_int_x_u32): Remove.
21440 (__arm_vmulltq_int_x_s8): Remove.
21441 (__arm_vmulltq_int_x_s16): Remove.
21442 (__arm_vmulltq_int_x_s32): Remove.
21443 (__arm_vmulltq_int_x_u8): Remove.
21444 (__arm_vmulltq_int_x_u16): Remove.
21445 (__arm_vmulltq_int_x_u32): Remove.
21446 (__arm_vmulltq_int): Remove.
21447 (__arm_vmullbq_int): Remove.
21448 (__arm_vmullbq_int_m): Remove.
21449 (__arm_vmulltq_int_m): Remove.
21450 (__arm_vmullbq_int_x): Remove.
21451 (__arm_vmulltq_int_x): Remove.
21453 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21455 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
21456 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
21458 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21460 * config/arm/arm-mve-builtins-functions.h (class
21461 unspec_mve_function_exact_insn_vmull): New.
21463 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21465 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
21466 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
21468 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
21470 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
21471 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
21472 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
21473 (mve_vmulltq_int_<supf><mode>): Merge into ...
21474 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
21475 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
21476 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
21477 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
21478 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
21479 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
21480 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
21482 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21484 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
21487 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21489 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
21490 (binary_acca_int64): Likewise.
21492 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
21494 * range-op-float.cc (fold_range): Handle relations.
21496 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
21498 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
21499 Optimize the function implementation.
21501 2023-08-28 liuhongt <hongtao.liu@intel.com>
21504 * config/i386/sse.md (V48_AVX2): Rename to ..
21505 (V48_128_256): .. this.
21506 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
21507 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
21508 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
21509 integral modes when TARGET_AVX2 is not available.
21510 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
21511 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
21513 (maskstore<mode><sseintvecmodelower>): Ditto.
21515 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21517 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
21519 (after_or_same_p): Ditto.
21520 (find_reg_killed_by): Delete.
21521 (has_vsetvl_killed_avl_p): Ditto.
21522 (anticipatable_occurrence_p): Refactor.
21523 (any_set_in_bb_p): Delete.
21524 (count_regno_occurrences): Ditto.
21525 (backward_propagate_worthwhile_p): Ditto.
21526 (demands_can_be_fused_p): Ditto.
21527 (earliest_pred_can_be_fused_p): New function.
21528 (vsetvl_dominated_by_p): Ditto.
21529 (vector_insn_info::parse_insn): Refactor.
21530 (vector_insn_info::merge): Refactor.
21531 (vector_insn_info::dump): Refactor.
21532 (vector_infos_manager::vector_infos_manager): Refactor.
21533 (vector_infos_manager::all_empty_predecessor_p): Delete.
21534 (vector_infos_manager::all_same_avl_p): Ditto.
21535 (vector_infos_manager::create_bitmap_vectors): Refactor.
21536 (vector_infos_manager::free_bitmap_vectors): Refactor.
21537 (vector_infos_manager::dump): Refactor.
21538 (pass_vsetvl::update_block_info): New function.
21539 (enum fusion_type): Ditto.
21540 (pass_vsetvl::get_backward_fusion_type): Delete.
21541 (pass_vsetvl::hard_empty_block_p): Ditto.
21542 (pass_vsetvl::backward_demand_fusion): Ditto.
21543 (pass_vsetvl::forward_demand_fusion): Ditto.
21544 (pass_vsetvl::demand_fusion): Ditto.
21545 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
21546 (pass_vsetvl::compute_local_properties): Ditto.
21547 (pass_vsetvl::earliest_fusion): New function.
21548 (pass_vsetvl::vsetvl_fusion): Ditto.
21549 (pass_vsetvl::commit_vsetvls): Refactor.
21550 (get_first_vsetvl_before_rvv_insns): Ditto.
21551 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
21552 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
21553 (pass_vsetvl::df_post_optimization): Refactor.
21554 (pass_vsetvl::lazy_vsetvl): Ditto.
21555 * config/riscv/riscv-vsetvl.h: Ditto.
21557 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21559 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
21560 * config/riscv/riscv-protos.h (enum insn_type): New enum.
21561 (expand_fold_extract_last): New function.
21562 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
21563 (emit_cpop_insn): Ditto.
21564 (emit_nonvlmax_compress_insn): Ditto.
21565 (expand_fold_extract_last): Ditto.
21566 * config/riscv/vector.md: Fix vcpop.m ratio demand.
21568 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
21570 * config/riscv/sync-rvwmo.md: updated types to "multi" or
21571 "atomic" based on number of assembly lines generated
21572 * config/riscv/sync-ztso.md: likewise
21573 * config/riscv/sync.md: likewise
21575 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
21577 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
21579 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
21580 instructions FLI.H/S/D can load.
21581 * config/riscv/iterators.md (ceil): New.
21582 * config/riscv/riscv-opts.h (MASK_ZFA): New.
21584 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
21585 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
21586 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
21588 (riscv_const_insns): Likewise.
21589 (riscv_legitimize_const_move): Likewise.
21590 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
21592 (riscv_split_doubleword_move): Likewise.
21593 (riscv_output_move): Output the mov instructions in zfa extension.
21594 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
21596 (riscv_secondary_memory_needed): Likewise.
21597 * config/riscv/riscv.md (fminm<mode>3): New.
21598 (fmaxm<mode>3): New.
21599 (movsidf2_low_rv32): New.
21600 (movsidf2_high_rv32): New.
21601 (movdfsisi3_rv32): New.
21602 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
21603 * config/riscv/riscv.opt: New.
21605 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
21608 * omp-general.cc (omp_runtime_api_procname): New.
21609 (omp_runtime_api_call): Moved here from omp-low.cc, and make
21611 * omp-general.h: Include omp-api.h.
21612 * omp-low.cc (omp_runtime_api_call): Delete this copy.
21614 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
21616 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
21617 * doc/gimple.texi (GIMPLE instruction set): Add
21618 GIMPLE_OMP_STRUCTURED_BLOCK.
21619 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
21620 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
21621 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
21622 GIMPLE_OMP_STRUCTURED_BLOCK.
21623 (pp_gimple_stmt_1): Likewise.
21624 * gimple-walk.cc (walk_gimple_stmt): Likewise.
21625 * gimple.cc (gimple_build_omp_structured_block): New.
21626 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
21627 * gimple.h (gimple_build_omp_structured_block): Declare.
21628 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
21629 (CASE_GIMPLE_OMP): Likewise.
21630 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
21631 (gimplify_expr): Likewise.
21632 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
21633 GIMPLE_OMP_STRUCTURED_BLOCK.
21634 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
21635 (lower_omp_1): Likewise.
21636 (diagnose_sb_1): Likewise.
21637 (diagnose_sb_2): Likewise.
21638 * tree-inline.cc (remap_gimple_stmt): Handle
21639 GIMPLE_OMP_STRUCTURED_BLOCK.
21640 (estimate_num_insns): Likewise.
21641 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
21642 (convert_local_reference_stmt): Likewise.
21643 (convert_gimple_call): Likewise.
21644 * tree-pretty-print.cc (dump_generic_node): Handle
21645 OMP_STRUCTURED_BLOCK.
21646 * tree.def (OMP_STRUCTURED_BLOCK): New.
21647 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
21649 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
21651 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
21652 cost. Add some comments about different constants handling.
21654 2023-08-25 Andrew Pinski <apinski@marvell.com>
21656 * match.pd (`a ? one_zero : one_zero`): Move
21657 below detection of minmax.
21659 2023-08-25 Andrew Pinski <apinski@marvell.com>
21661 * match.pd (`a | C -> C`): New pattern.
21663 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
21665 * caller-save.cc (new_saved_hard_reg):
21666 Rename TRUE/FALSE to true/false.
21667 (setup_save_areas): Ditto.
21668 * gcc.cc (set_collect_gcc_options): Ditto.
21669 (driver::build_multilib_strings): Ditto.
21670 (print_multilib_info): Ditto.
21671 * genautomata.cc (gen_cpu_unit): Ditto.
21672 (gen_query_cpu_unit): Ditto.
21673 (gen_bypass): Ditto.
21674 (gen_excl_set): Ditto.
21675 (gen_presence_absence_set): Ditto.
21676 (gen_presence_set): Ditto.
21677 (gen_final_presence_set): Ditto.
21678 (gen_absence_set): Ditto.
21679 (gen_final_absence_set): Ditto.
21680 (gen_automaton): Ditto.
21681 (gen_regexp_repeat): Ditto.
21682 (gen_regexp_allof): Ditto.
21683 (gen_regexp_oneof): Ditto.
21684 (gen_regexp_sequence): Ditto.
21685 (process_decls): Ditto.
21686 (reserv_sets_are_intersected): Ditto.
21687 (initiate_excl_sets): Ditto.
21688 (form_reserv_sets_list): Ditto.
21689 (check_presence_pattern_sets): Ditto.
21690 (check_absence_pattern_sets): Ditto.
21691 (check_regexp_units_distribution): Ditto.
21692 (check_unit_distributions_to_automata): Ditto.
21693 (create_ainsns): Ditto.
21694 (output_insn_code_cases): Ditto.
21695 (output_internal_dead_lock_func): Ditto.
21696 (form_important_insn_automata_lists): Ditto.
21697 * gengtype-state.cc (read_state_files_list): Ditto.
21698 * gengtype.cc (main): Ditto.
21699 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
21701 * gimple.cc (gimple_build_call_from_tree): Ditto.
21702 (preprocess_case_label_vec_for_gimple): Ditto.
21703 * gimplify.cc (gimplify_call_expr): Ditto.
21704 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
21706 2023-08-25 Richard Biener <rguenther@suse.de>
21708 PR tree-optimization/111137
21709 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
21710 Properly handle grouped stores from other SLP instances.
21712 2023-08-25 Richard Biener <rguenther@suse.de>
21714 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
21715 Split out from vect_slp_analyze_node_dependences, remove
21717 (vect_slp_analyze_load_dependences): Split out from
21718 vect_slp_analyze_node_dependences, adjust comments. Process
21719 queued stores before any disambiguation.
21720 (vect_slp_analyze_node_dependences): Remove.
21721 (vect_slp_analyze_instance_dependence): Adjust.
21723 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
21725 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
21727 (operator_not_equal::fold_range): Adjust for relations.
21728 (operator_lt::fold_range): Same.
21729 (operator_gt::fold_range): Same.
21730 (foperator_unordered_equal::fold_range): Same.
21731 (foperator_unordered_lt::fold_range): Same.
21732 (foperator_unordered_le::fold_range): Same.
21733 (foperator_unordered_gt::fold_range): Same.
21734 (foperator_unordered_ge::fold_range): Same.
21736 2023-08-25 Richard Biener <rguenther@suse.de>
21738 PR tree-optimization/111136
21739 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
21740 stores force STMT_VINFO_STRIDED_P and also duplicate that
21743 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21745 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
21746 Add early continue.
21748 2023-08-25 liuhongt <hongtao.liu@intel.com>
21750 * config/i386/sse.md (vec_set<mode>): Removed.
21751 (V_128H): Merge into ..
21753 (V_256H): Merge into ..
21755 (V_512): Add V32HF, V32BF.
21756 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
21758 (vcond<mode><sseintvecmodelower>): Removed
21759 (vcondu<mode><sseintvecmodelower>): Removed.
21760 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
21762 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
21765 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
21766 Adjust paramter order.
21768 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
21771 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
21773 2023-08-24 David Malcolm <dmalcolm@redhat.com>
21776 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
21777 list of functions known to the analyzer.
21779 2023-08-24 Richard Biener <rguenther@suse.de>
21781 PR tree-optimization/111123
21782 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
21783 remove indirect clobbers here ...
21784 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
21785 (remove_indirect_clobbers): New function.
21787 2023-08-24 Jan Hubicka <jh@suse.cz>
21789 * cfg.h (struct control_flow_graph): New field full_profile.
21790 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
21791 * cfg.cc (init_flow): Set full_profile to false.
21792 * graphite.cc (graphite_transform_loops): Set full_profile to false.
21793 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
21794 * predict.cc (pass_profile::execute): Set full_profile to true.
21795 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
21796 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
21797 if full_profile is set.
21798 * tree-inline.cc (initialize_cfun): Initialize full_profile.
21799 (expand_call_inline): Combine full_profile.
21801 2023-08-24 Richard Biener <rguenther@suse.de>
21803 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
21804 load_p to ldst_p, fix mistakes and rely on
21805 STMT_VINFO_DATA_REF.
21807 2023-08-24 Jan Hubicka <jh@suse.cz>
21809 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
21810 of newly build trap bb.
21812 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21814 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
21815 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
21816 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
21818 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
21820 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
21821 * config/riscv/riscv.cc (riscv_option_override): Set sched
21822 pressure algorithm.
21824 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
21826 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
21828 2023-08-24 Richard Biener <rguenther@suse.de>
21830 PR tree-optimization/111125
21831 * tree-vect-slp.cc (vect_slp_function): Split at novector
21832 loop entry, do not push blocks in novector loops.
21834 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
21836 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
21838 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21840 * genmatch.cc (decision_tree::gen): Support
21841 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
21842 * gimple-match-exports.cc (gimple_simplify): Ditto.
21843 (gimple_resimplify6): New function.
21844 (gimple_resimplify7): New function.
21845 (gimple_match_op::resimplify): Support
21846 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
21847 (convert_conditional_op): Ditto.
21848 (build_call_internal): Ditto.
21849 (try_conditional_simplification): Ditto.
21850 (gimple_extract): Ditto.
21851 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
21852 * internal-fn.cc (CASE): Ditto.
21854 2023-08-24 Richard Biener <rguenther@suse.de>
21856 PR tree-optimization/111115
21857 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
21858 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
21860 * tree-vect-slp.cc (arg3_arg2_map): New.
21861 (vect_get_operand_map): Handle IFN_MASK_STORE.
21862 (vect_slp_child_index_for_operand): New function.
21863 (vect_build_slp_tree_1): Handle statements with no LHS,
21865 (vect_remove_slp_scalar_calls): Likewise.
21866 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
21867 SLP child corresponding to the ifn value index.
21868 (vectorizable_store): Likewise for the mask index. Support
21870 (vectorizable_load): Lookup the SLP child corresponding to the
21873 2023-08-24 Richard Biener <rguenther@suse.de>
21875 PR tree-optimization/111125
21876 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
21877 for the remain_defs processing.
21879 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
21881 * config/aarch64/aarch64.cc: Include ssa.h.
21882 (aarch64_multiply_add_p): Require the second operand of an
21883 Advanced SIMD subtraction to be a multiplication. Assume that
21884 such an operation won't be fused if the second operand is used
21885 multiple times and if the first operand is also a multiplication.
21887 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21889 * tree-vect-loop.cc (vectorizable_reduction): Apply
21890 LEN_FOLD_EXTRACT_LAST.
21891 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
21893 2023-08-24 Richard Biener <rguenther@suse.de>
21895 PR tree-optimization/111128
21896 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
21897 Emit external shift operand inline if we promoted it with
21898 another pattern stmt.
21900 2023-08-24 Pan Li <pan2.li@intel.com>
21902 * config/riscv/autovec.md: Fix typo.
21904 2023-08-24 Pan Li <pan2.li@intel.com>
21906 * config/riscv/riscv-vector-builtins-bases.cc
21907 (class binop_frm): Removed.
21908 (class reverse_binop_frm): Ditto.
21909 (class widen_binop_frm): Ditto.
21910 (class vfmacc_frm): Ditto.
21911 (class vfnmacc_frm): Ditto.
21912 (class vfmsac_frm): Ditto.
21913 (class vfnmsac_frm): Ditto.
21914 (class vfmadd_frm): Ditto.
21915 (class vfnmadd_frm): Ditto.
21916 (class vfmsub_frm): Ditto.
21917 (class vfnmsub_frm): Ditto.
21918 (class vfwmacc_frm): Ditto.
21919 (class vfwnmacc_frm): Ditto.
21920 (class vfwmsac_frm): Ditto.
21921 (class vfwnmsac_frm): Ditto.
21922 (class unop_frm): Ditto.
21923 (class vfrec7_frm): Ditto.
21924 (class binop): Add frm_op_type template arg.
21925 (class unop): Ditto.
21926 (class widen_binop): Ditto.
21927 (class widen_binop_fp): Ditto.
21928 (class reverse_binop): Ditto.
21929 (class vfmacc): Ditto.
21930 (class vfnmsac): Ditto.
21931 (class vfmadd): Ditto.
21932 (class vfnmsub): Ditto.
21933 (class vfnmacc): Ditto.
21934 (class vfmsac): Ditto.
21935 (class vfnmadd): Ditto.
21936 (class vfmsub): Ditto.
21937 (class vfwmacc): Ditto.
21938 (class vfwnmacc): Ditto.
21939 (class vfwmsac): Ditto.
21940 (class vfwnmsac): Ditto.
21941 (class float_misc): Ditto.
21943 2023-08-24 Andrew Pinski <apinski@marvell.com>
21945 PR tree-optimization/111109
21946 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
21947 Add check to make sure cmp and icmp are inverse.
21949 2023-08-24 Andrew Pinski <apinski@marvell.com>
21951 PR tree-optimization/95929
21952 * match.pd (convert?(-a)): New pattern
21953 for 1bit integer types.
21955 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
21958 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
21960 * common/config/i386/cpuinfo.h (get_available_features):
21961 Add avx10_set and version and detect avx10.1.
21962 (cpu_indicator_init): Handle avx10.1-512.
21963 * common/config/i386/i386-common.cc
21964 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
21965 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
21966 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
21967 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
21968 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
21969 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
21971 * common/config/i386/i386-cpuinfo.h (enum processor_features):
21972 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
21973 FEATURE_AVX10_512BIT.
21974 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
21975 AVX10_512BIT, AVX10_1 and AVX10_1_512.
21976 * config/i386/constraints.md (Yk): Add AVX10_1.
21979 * config/i386/cpuid.h (bit_AVX10): New.
21980 (bit_AVX10_256): Ditto.
21981 (bit_AVX10_512): Ditto.
21982 * config/i386/i386-c.cc (ix86_target_macros_internal):
21983 Define AVX10_512BIT and AVX10_1.
21984 * config/i386/i386-isa.def
21985 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
21986 (AVX10_1): Add DEF_PTA(AVX10_1).
21987 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
21988 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
21990 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
21991 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
21992 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
21993 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
21994 (ix86_conditional_register_usage): Ditto.
21995 (ix86_hard_regno_mode_ok): Ditto.
21996 (ix86_rtx_costs): Ditto.
21997 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
21998 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
22000 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
22001 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
22002 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
22005 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22008 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22010 * common/config/i386/i386-common.cc
22011 (ix86_check_avx10): New function to check isa_flags and
22012 isa_flags_explicit to emit warning when AVX10 is enabled
22014 (ix86_check_avx512): New function to check isa_flags and
22015 isa_flags_explicit to emit warning when AVX512 is enabled
22017 (ix86_handle_option): Do not change the flags when warning
22019 * config/i386/driver-i386.cc (host_detect_local_cpu):
22020 Do not append -mno-avx10.1 for -march=native.
22022 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22025 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22027 * common/config/i386/i386-common.cc
22028 (ix86_check_avx10_vector_width): New function to check isa_flags
22029 to emit a warning when there is a conflict in AVX10 options for
22031 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
22032 * config/i386/driver-i386.cc (host_detect_local_cpu):
22033 Do not append -mno-avx10-max-512bit for -march=native.
22035 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22038 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22040 * config/i386/avx512vldqintrin.h: Remove target attribute.
22041 * config/i386/i386-builtin.def (BDESC):
22042 Add OPTION_MASK_ISA2_AVX10_1.
22043 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
22044 * config/i386/i386-expand.cc
22045 (ix86_check_builtin_isa_match): Ditto.
22046 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
22047 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
22048 and avx10_1_or_avx512vl.
22049 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
22050 (VF1_128_256VLDQ_AVX10_1): Ditto.
22051 (VI8_AVX512VLDQ_AVX10_1): Ditto.
22052 (<sse>_andnot<mode>3<mask_name>):
22053 Add TARGET_AVX10_1 and change isa attr from avx512dq to
22054 avx10_1_or_avx512dq.
22055 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
22056 avx512vl to avx10_1_or_avx512vl.
22057 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
22058 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
22059 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
22061 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
22063 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
22064 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
22065 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
22066 Add TARGET_AVX10_1.
22067 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
22068 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
22069 Remove target check.
22070 (avx512dq_mul<mode>3<mask_name>): Ditto.
22071 (*avx512dq_mul<mode>3<mask_name>): Ditto.
22072 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
22073 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
22074 Remove target check.
22075 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
22076 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
22077 Remove target check.
22078 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
22079 (mask_avx512vl_condition): Ditto.
22082 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22085 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22087 * config/i386/avx512vldqintrin.h: Remove target attribute.
22088 * config/i386/i386-builtin.def (BDESC):
22089 Add OPTION_MASK_ISA2_AVX10_1.
22090 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
22091 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
22092 (VI48_AVX512VLDQ_AVX10_1): Ditto.
22093 (VF2_AVX512VL): Remove.
22094 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
22095 Add TARGET_AVX10_1.
22096 (*<code><mode>3<mask_name>): Change isa attribute to
22097 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
22098 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
22099 to avx10_1_or_avx512vl.
22100 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
22101 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
22102 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
22103 Add TARGET_AVX10_1.
22104 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
22105 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
22106 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
22107 Add TARGET_AVX10_1.
22108 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
22109 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
22110 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
22111 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
22112 (float<floatunssuffix>v4div4sf2<mask_name>):
22113 Add TARGET_AVX10_1.
22114 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
22115 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
22116 (float<floatunssuffix>v2div2sf2): Ditto.
22117 (float<floatunssuffix>v2div2sf2_mask): Ditto.
22118 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
22119 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
22120 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
22121 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
22122 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
22123 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
22124 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
22125 Change when constraint is enabled.
22127 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22130 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22132 * config/i386/avx512vldqintrin.h: Remove target attribute.
22133 * config/i386/i386-builtin.def (BDESC):
22134 Add OPTION_MASK_ISA2_AVX10_1.
22135 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
22136 (VFH_AVX512VLDQ_AVX10_1): Ditto.
22137 (VF1_AVX512VLDQ_AVX10_1): Ditto.
22138 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
22139 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
22140 (vec_pack<floatprefix>_float_<mode>): Change iterator to
22141 VI8_AVX512VLDQ_AVX10_1. Remove target check.
22142 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
22143 VF1_AVX512VLDQ_AVX10_1. Remove target check.
22144 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
22145 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
22146 (avx512vl_vextractf128<mode>): Change iterator to
22147 VI48F_256_DQVL_AVX10_1. Remove target check.
22148 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
22149 (vec_extract_hi_<mode>): Ditto.
22150 (avx512vl_vinsert<mode>): Ditto.
22151 (vec_set_lo_<mode><mask_name>): Ditto.
22152 (vec_set_hi_<mode><mask_name>): Ditto.
22153 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
22154 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
22155 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
22156 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
22157 * config/i386/subst.md (mask_avx512dq_condition): Add
22159 (mask_scalar_merge): Ditto.
22161 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22164 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
22167 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
22170 2023-08-24 Richard Biener <rguenther@suse.de>
22173 * dwarf2out.cc (prune_unused_types_walk): Handle
22174 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
22175 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
22176 and DW_TAG_dynamic_type as to only output them when referenced.
22178 2023-08-24 liuhongt <hongtao.liu@intel.com>
22180 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
22183 2023-08-24 liuhongt <hongtao.liu@intel.com>
22185 * common/config/i386/i386-common.cc (processor_names): Add new
22186 member graniterapids-s and arrowlake-s.
22187 * config/i386/i386-options.cc (processor_alias_table): Update
22188 table with PROCESSOR_ARROWLAKE_S and
22189 PROCESSOR_GRANITERAPIDS_D.
22190 (m_GRANITERAPID_D): New macro.
22191 (m_ARROWLAKE_S): Ditto.
22192 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
22193 (processor_cost_table): Add icelake_cost for
22194 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
22195 PROCESSOR_ARROWLAKE_S.
22196 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
22198 * config/i386/i386.h (enum processor_type): Add new member
22199 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
22200 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
22201 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
22203 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
22205 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
22206 to help simplify code further.
22208 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
22210 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
22211 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
22212 Initialize using a range instead of value and edge.
22213 (phi_group::calculate_using_modifier): Use initializer value and
22214 process for relations after trying for iteration convergence.
22215 (phi_group::refine_using_relation): Use initializer range.
22216 (phi_group::dump): Rework the dump output.
22217 (phi_analyzer::process_phi): Allow multiple constant initilizers.
22218 Dump groups immediately as created.
22219 (phi_analyzer::dump): Tweak output.
22220 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
22221 (phi_group::initial_value): Delete.
22222 (phi_group::refine_using_relation): Adjust prototype.
22223 (phi_group::m_initial_value): Delete.
22224 (phi_group::m_initial_edge): Delete.
22225 (phi_group::m_vr): Use int_range_max.
22226 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
22228 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
22230 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
22231 no group was created.
22232 (phi_analyzer::process_phi): Do not create groups of one phi node.
22234 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
22236 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
22237 CODE, CMP_CODE and BIT_CODE arguments.
22238 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
22239 (aarch64_gen_ccmp_next): Likewise.
22240 * doc/tm.texi: Regenerated.
22242 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
22244 * coretypes.h (rtx_code): Add forward declaration.
22245 * rtl.h (rtx_code): Make compatible with forward declaration.
22247 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
22250 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
22251 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
22252 DWIH mode iterator. Disable (=&r,m,m) alternative for
22254 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
22255 alternative for 32-bit targets.
22257 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
22259 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
22260 appropriate type attribute.
22262 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
22264 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
22265 (*copysign<mode>_neg): Ditto.
22266 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
22267 (<optab><mode>2): Ditto.
22268 (cond_<optab><mode>): New.
22269 (cond_len_<optab><mode>): Ditto.
22270 * config/riscv/riscv-protos.h (enum insn_type): New.
22271 (expand_cond_len_unop): New helper func.
22272 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
22273 (expand_cond_len_unop): New helper func.
22275 2023-08-23 Jan Hubicka <jh@suse.cz>
22277 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
22278 (should_duplicate_loop_header_p): Fix return value for static exits.
22279 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
22281 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
22283 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
22284 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
22285 and update the final nest accordingly.
22287 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
22289 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
22290 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
22291 and update the final nest accordingly.
22293 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
22295 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
22296 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
22297 gvec_oprnds with auto_delete_vec.
22299 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22301 * config/riscv/riscv-vsetvl.cc
22302 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
22304 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22306 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
22308 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
22310 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22312 * config/riscv/vector.md: Add attribute.
22314 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22316 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
22317 (vector_infos_manager::all_same_ratio_p): Ditto.
22318 (vector_infos_manager::all_same_avl_p): Ditto.
22319 (pass_vsetvl::refine_vsetvls): Ditto.
22320 (pass_vsetvl::cleanup_vsetvls): Ditto.
22321 (pass_vsetvl::commit_vsetvls): Ditto.
22322 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
22323 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
22324 (pass_vsetvl::compute_probabilities): Ditto.
22326 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22328 * config/riscv/t-riscv: Add riscv-vsetvl.def
22330 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
22332 * config/riscv/riscv.opt: Add --param names
22333 riscv-autovec-preference and riscv-autovec-lmul
22335 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
22337 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
22339 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
22341 * tree-core.h (enum omp_clause_defaultmap_kind): Add
22342 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
22343 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
22344 * tree-pretty-print.cc (dump_omp_clause): Likewise.
22346 2023-08-22 Jakub Jelinek <jakub@redhat.com>
22349 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
22350 types aren't supported in C++.
22352 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22354 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
22355 * internal-fn.cc (fold_len_extract_direct): Ditto.
22356 (expand_fold_len_extract_optab_fn): Ditto.
22357 (direct_fold_len_extract_optab_supported_p): Ditto.
22358 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
22359 * optabs.def (OPTAB_D): Ditto.
22361 2023-08-22 Richard Biener <rguenther@suse.de>
22363 * tree-vect-stmts.cc (vectorizable_store): Do not bump
22364 DR_GROUP_STORE_COUNT here. Remove early out.
22365 (vect_transform_stmt): Only call vectorizable_store on
22366 the last element of an interleaving chain.
22368 2023-08-22 Richard Biener <rguenther@suse.de>
22370 PR tree-optimization/94864
22371 PR tree-optimization/94865
22372 PR tree-optimization/93080
22373 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
22374 for vector insertion from vector extraction.
22376 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22377 Kewen.Lin <linkw@linux.ibm.com>
22379 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
22380 (vectorizable_live_operation): Add live vectorization for length loop
22383 2023-08-22 David Malcolm <dmalcolm@redhat.com>
22386 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
22388 2023-08-22 Pan Li <pan2.li@intel.com>
22390 * config/riscv/riscv-vector-builtins-bases.cc
22391 (vfwredusum_frm_obj): New declaration.
22393 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22394 * config/riscv/riscv-vector-builtins-functions.def
22395 (vfwredusum_frm): New intrinsic function def.
22397 2023-08-21 David Faust <david.faust@oracle.com>
22399 * config/bpf/bpf.md (neg): Second operand must be a register.
22401 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
22403 * config/riscv/bitmanip.md: Added bitmanip type to insns
22404 that are missing types.
22406 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
22408 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
22411 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
22413 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
22414 Fix format specifier.
22416 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
22418 * value-range.cc (frange::union_nans): Return false if nothing
22420 (range_tests_floats): New test.
22422 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
22424 PR tree-optimization/111048
22425 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
22427 (fold_vec_perm_cst): Remove workaround and again call
22428 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
22429 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
22431 2023-08-21 Richard Biener <rguenther@suse.de>
22433 PR tree-optimization/111082
22434 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
22435 pun operations that can overflow.
22437 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22439 * lcm.cc (compute_antinout_edge): Export as global use.
22440 (compute_earliest): Ditto.
22441 (compute_rev_insert_delete): Ditto.
22442 * lcm.h (compute_antinout_edge): Ditto.
22443 (compute_earliest): Ditto.
22445 2023-08-21 Richard Biener <rguenther@suse.de>
22447 PR tree-optimization/111070
22448 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
22449 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
22451 2023-08-21 Andrew Pinski <apinski@marvell.com>
22453 PR tree-optimization/111002
22454 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
22456 2023-08-21 liuhongt <hongtao.liu@intel.com>
22458 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
22460 * common/config/i386/i386-common.cc (alias_table): Support
22461 -march=gracemont as an alias of -march=alderlake.
22463 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
22465 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
22466 instead of src in the call to ix86_expand_sse_cmp.
22467 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
22468 force operands[1] to a register.
22469 (<any_extend:insn>v4hiv4si2): Ditto.
22470 (<any_extend:insn>v2siv2di2): Ditto.
22472 2023-08-20 Andrew Pinski <apinski@marvell.com>
22474 PR tree-optimization/111006
22475 PR tree-optimization/110986
22476 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
22478 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
22481 * Makefile.in: improve error message when /usr/include is
22484 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
22486 PR middle-end/111017
22487 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
22488 to expand_omp_build_cond for 'factor != 0' condition, resulting
22489 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
22491 2023-08-19 Guo Jie <guojie@loongson.cn>
22492 Lulu Cheng <chenglulu@loongson.cn>
22494 * config/loongarch/t-loongarch: Add loongarch-driver.h into
22495 TM_H. Add loongarch-def.h and loongarch-tune.h into
22498 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
22501 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
22502 Also handle V2QImode.
22503 (ix86_expand_sse_extend): New function.
22504 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
22505 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
22506 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
22507 (<any_extend:insn>v2hiv2si2): Ditto.
22508 (<any_extend:insn>v2qiv2hi2): Ditto.
22509 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
22510 (<any_extend:insn>v4hiv4si2): Ditto.
22511 (<any_extend:insn>v2siv2di2): Ditto.
22513 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
22516 * value-range.cc (irange::union_bitmask): Return FALSE if updated
22517 bitmask is semantically equivalent to the original mask.
22518 (irange::intersect_bitmask): Same.
22519 (irange::get_bitmask): Add comment.
22521 2023-08-18 Richard Biener <rguenther@suse.de>
22523 PR tree-optimization/111019
22524 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
22525 also scrap base and offset in case the ref is indirect.
22527 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
22529 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
22531 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
22533 PR bootstrap/111021
22534 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
22536 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
22538 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
22540 (vectorizable_store): ... here.
22542 2023-08-18 Richard Biener <rguenther@suse.de>
22544 PR tree-optimization/111048
22545 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
22548 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
22551 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
22554 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
22556 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
22557 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
22558 and update the final nest accordingly.
22560 2023-08-18 Andrew Pinski <apinski@marvell.com>
22562 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
22563 cond_len_neg and cond_len_one_cmpl.
22565 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
22567 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
22568 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
22569 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
22570 (*local_pic_load_32d<ANYF:mode>): Ditto.
22571 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
22572 (*local_pic_store<ANYF:mode>): Ditto.
22573 (*local_pic_store<ANYLSF:mode>): Ditto.
22574 (*local_pic_store_32d<ANYF:mode>): Ditto.
22575 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
22577 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
22578 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22580 * config/riscv/predicates.md (vector_const_0_operand): New.
22581 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
22583 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
22585 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
22588 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
22590 PR tree-optimization/111009
22591 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
22593 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
22595 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
22596 slots_num initialization from here ...
22597 (lra_spill): ... to here before the 1st call of
22598 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
22599 fp->sp elimination.
22601 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
22604 * doc/invoke.texi (Option Summary): Mention
22605 -Wcompare-distinct-pointer-types under `Warning Options'.
22606 (Warning Options): Document -Wcompare-distinct-pointer-types.
22608 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
22610 * recog.cc (memory_address_addr_space_p): Mark possibly unused
22611 argument as unused.
22613 2023-08-17 Richard Biener <rguenther@suse.de>
22615 PR tree-optimization/111039
22616 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
22617 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
22619 2023-08-17 Alex Coplan <alex.coplan@arm.com>
22621 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
22623 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
22626 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
22627 `naked' function attribute.
22628 (bpf_warn_func_return): New function.
22629 (TARGET_WARN_FUNC_RETURN): Define.
22630 (bpf_expand_prologue): Add preventive comment.
22631 (bpf_expand_epilogue): Likewise.
22632 * doc/extend.texi (BPF Function Attributes): Document the `naked'
22633 function attribute.
22635 2023-08-17 Richard Biener <rguenther@suse.de>
22637 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
22638 !needs_fold_left_reduction_p to decide whether we can
22639 handle the reduction with association.
22640 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
22641 reductions perform all arithmetic in an unsigned type.
22643 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
22645 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
22647 * configure: Regenerate.
22649 2023-08-17 Pan Li <pan2.li@intel.com>
22651 * config/riscv/riscv-vector-builtins-bases.cc
22652 (widen_freducop): Add frm_opt_type template arg.
22653 (vfwredosum_frm_obj): New declaration.
22655 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22656 * config/riscv/riscv-vector-builtins-functions.def
22657 (vfwredosum_frm): New intrinsic function def.
22659 2023-08-17 Pan Li <pan2.li@intel.com>
22661 * config/riscv/riscv-vector-builtins-bases.cc
22662 (vfredosum_frm_obj): New declaration.
22664 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22665 * config/riscv/riscv-vector-builtins-functions.def
22666 (vfredosum_frm): New intrinsic function def.
22668 2023-08-17 Pan Li <pan2.li@intel.com>
22670 * config/riscv/riscv-vector-builtins-bases.cc
22671 (class freducop): Add frm_op_type template arg.
22672 (vfredusum_frm_obj): New declaration.
22674 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22675 * config/riscv/riscv-vector-builtins-functions.def
22676 (vfredusum_frm): New intrinsic function def.
22677 * config/riscv/riscv-vector-builtins-shapes.cc
22678 (struct reduc_alu_frm_def): New class for frm shape.
22679 (SHAPE): New declaration.
22680 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
22682 2023-08-17 Pan Li <pan2.li@intel.com>
22684 * config/riscv/riscv-vector-builtins-bases.cc
22685 (class vfncvt_f): Add frm_op_type template arg.
22686 (vfncvt_f_frm_obj): New declaration.
22688 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22689 * config/riscv/riscv-vector-builtins-functions.def
22690 (vfncvt_f_frm): New intrinsic function def.
22692 2023-08-17 Pan Li <pan2.li@intel.com>
22694 * config/riscv/riscv-vector-builtins-bases.cc
22695 (vfncvt_xu_frm_obj): New declaration.
22697 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22698 * config/riscv/riscv-vector-builtins-functions.def
22699 (vfncvt_xu_frm): New intrinsic function def.
22701 2023-08-17 Pan Li <pan2.li@intel.com>
22703 * config/riscv/riscv-vector-builtins-bases.cc
22704 (class vfncvt_x): Add frm_op_type template arg.
22705 (BASE): New declaration.
22706 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22707 * config/riscv/riscv-vector-builtins-functions.def
22708 (vfncvt_x_frm): New intrinsic function def.
22709 * config/riscv/riscv-vector-builtins-shapes.cc
22710 (struct narrow_alu_frm_def): New shape function for frm.
22711 (SHAPE): New declaration.
22712 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
22714 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22716 * config/i386/avx512vldqintrin.h: Remove target attribute.
22717 * config/i386/i386-builtin.def (BDESC):
22718 Add OPTION_MASK_ISA2_AVX10_1.
22719 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
22720 (VFH_AVX512VLDQ_AVX10_1): Ditto.
22721 (VF1_AVX512VLDQ_AVX10_1): Ditto.
22722 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
22723 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
22724 (vec_pack<floatprefix>_float_<mode>): Change iterator to
22725 VI8_AVX512VLDQ_AVX10_1. Remove target check.
22726 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
22727 VF1_AVX512VLDQ_AVX10_1. Remove target check.
22728 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
22729 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
22730 (avx512vl_vextractf128<mode>): Change iterator to
22731 VI48F_256_DQVL_AVX10_1. Remove target check.
22732 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
22733 (vec_extract_hi_<mode>): Ditto.
22734 (avx512vl_vinsert<mode>): Ditto.
22735 (vec_set_lo_<mode><mask_name>): Ditto.
22736 (vec_set_hi_<mode><mask_name>): Ditto.
22737 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
22738 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
22739 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
22740 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
22741 * config/i386/subst.md (mask_avx512dq_condition): Add
22743 (mask_scalar_merge): Ditto.
22745 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22747 * config/i386/avx512vldqintrin.h: Remove target attribute.
22748 * config/i386/i386-builtin.def (BDESC):
22749 Add OPTION_MASK_ISA2_AVX10_1.
22750 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
22751 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
22752 (VI48_AVX512VLDQ_AVX10_1): Ditto.
22753 (VF2_AVX512VL): Remove.
22754 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
22755 Add TARGET_AVX10_1.
22756 (*<code><mode>3<mask_name>): Change isa attribute to
22757 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
22758 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
22759 to avx10_1_or_avx512vl.
22760 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
22761 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
22762 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
22763 Add TARGET_AVX10_1.
22764 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
22765 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
22766 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
22767 Add TARGET_AVX10_1.
22768 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
22769 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
22770 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
22771 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
22772 (float<floatunssuffix>v4div4sf2<mask_name>):
22773 Add TARGET_AVX10_1.
22774 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
22775 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
22776 (float<floatunssuffix>v2div2sf2): Ditto.
22777 (float<floatunssuffix>v2div2sf2_mask): Ditto.
22778 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
22779 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
22780 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
22781 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
22782 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
22783 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
22784 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
22785 Change when constraint is enabled.
22787 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22790 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
22791 (second_sew_less_than_first_sew_p): Fix bug.
22792 (first_sew_less_than_second_sew_p): Ditto.
22794 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22796 * config/i386/avx512vldqintrin.h: Remove target attribute.
22797 * config/i386/i386-builtin.def (BDESC):
22798 Add OPTION_MASK_ISA2_AVX10_1.
22799 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
22800 * config/i386/i386-expand.cc
22801 (ix86_check_builtin_isa_match): Ditto.
22802 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
22803 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
22804 and avx10_1_or_avx512vl.
22805 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
22806 (VF1_128_256VLDQ_AVX10_1): Ditto.
22807 (VI8_AVX512VLDQ_AVX10_1): Ditto.
22808 (<sse>_andnot<mode>3<mask_name>):
22809 Add TARGET_AVX10_1 and change isa attr from avx512dq to
22810 avx10_1_or_avx512dq.
22811 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
22812 avx512vl to avx10_1_or_avx512vl.
22813 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
22814 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
22815 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
22817 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
22819 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
22820 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
22821 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
22822 Add TARGET_AVX10_1.
22823 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
22824 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
22825 Remove target check.
22826 (avx512dq_mul<mode>3<mask_name>): Ditto.
22827 (*avx512dq_mul<mode>3<mask_name>): Ditto.
22828 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
22829 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
22830 Remove target check.
22831 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
22832 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
22833 Remove target check.
22834 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
22835 (mask_avx512vl_condition): Ditto.
22838 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22840 * common/config/i386/i386-common.cc
22841 (ix86_check_avx10_vector_width): New function to check isa_flags
22842 to emit a warning when there is a conflict in AVX10 options for
22844 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
22845 * config/i386/driver-i386.cc (host_detect_local_cpu):
22846 Do not append -mno-avx10-max-512bit for -march=native.
22848 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22850 * common/config/i386/i386-common.cc
22851 (ix86_check_avx10): New function to check isa_flags and
22852 isa_flags_explicit to emit warning when AVX10 is enabled
22854 (ix86_check_avx512): New function to check isa_flags and
22855 isa_flags_explicit to emit warning when AVX512 is enabled
22857 (ix86_handle_option): Do not change the flags when warning
22859 * config/i386/driver-i386.cc (host_detect_local_cpu):
22860 Do not append -mno-avx10.1 for -march=native.
22862 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22864 * common/config/i386/cpuinfo.h (get_available_features):
22865 Add avx10_set and version and detect avx10.1.
22866 (cpu_indicator_init): Handle avx10.1-512.
22867 * common/config/i386/i386-common.cc
22868 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
22869 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
22870 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
22871 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
22872 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
22873 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
22875 * common/config/i386/i386-cpuinfo.h (enum processor_features):
22876 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
22877 FEATURE_AVX10_512BIT.
22878 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
22879 AVX10_512BIT, AVX10_1 and AVX10_1_512.
22880 * config/i386/constraints.md (Yk): Add AVX10_1.
22883 * config/i386/cpuid.h (bit_AVX10): New.
22884 (bit_AVX10_256): Ditto.
22885 (bit_AVX10_512): Ditto.
22886 * config/i386/i386-c.cc (ix86_target_macros_internal):
22887 Define AVX10_512BIT and AVX10_1.
22888 * config/i386/i386-isa.def
22889 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
22890 (AVX10_1): Add DEF_PTA(AVX10_1).
22891 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
22892 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
22894 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
22895 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
22896 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
22897 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
22898 (ix86_conditional_register_usage): Ditto.
22899 (ix86_hard_regno_mode_ok): Ditto.
22900 (ix86_rtx_costs): Ditto.
22901 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
22902 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
22904 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
22905 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
22906 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
22909 2023-08-17 Sergei Trofimovich <siarheit@google.com>
22911 * flag-types.h (vrp_mode): Remove unused.
22913 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
22915 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
22918 2023-08-17 Andrew Pinski <apinski@marvell.com>
22920 * internal-fn.def (COND_NOT): New internal function.
22921 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
22923 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
22924 into conditional not.
22925 * optabs.def (cond_one_cmpl): New optab.
22926 (cond_len_one_cmpl): Likewise.
22928 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
22930 PR rtl-optimization/110254
22931 * ira-color.cc (improve_allocation): Update array
22932 allocated_hard_reg_p.
22934 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
22936 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
22937 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
22938 (lra_update_fp2sp_elimination): Ditto.
22939 (update_reg_eliminate): Adjust spill_pseudos call.
22940 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
22941 in lra_update_fp2sp_elimination.
22943 2023-08-16 Richard Ball <richard.ball@arm.com>
22945 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
22946 * config/aarch64/aarch64-tune.md: Regenerate.
22947 * doc/invoke.texi: Document Cortex-A720 CPU.
22949 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
22951 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
22952 Implement expander.
22953 (<u>avg<v_double_trunc>3_ceil): Ditto.
22954 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
22957 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
22959 * internal-fn.cc (vec_extract_direct): Change type argument
22961 (expand_vec_extract_optab_fn): Call convert_optab_fn.
22962 (direct_vec_extract_optab_supported_p): Use
22963 convert_optab_supported_p.
22965 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
22966 Richard Sandiford <richard.sandiford@arm.com>
22968 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
22969 (valid_mask_for_fold_vec_perm_cst_p): New function.
22970 (fold_vec_perm_cst): Likewise.
22971 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
22972 (test_fold_vec_perm_cst): New namespace.
22973 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
22974 (test_fold_vec_perm_cst::validate_res): Likewise.
22975 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
22976 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
22977 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
22978 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
22979 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
22980 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
22981 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
22982 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
22983 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
22984 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
22985 (test_fold_vec_perm_cst::test): Likewise.
22986 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
22988 2023-08-16 Pan Li <pan2.li@intel.com>
22990 * config/riscv/riscv-vector-builtins-bases.cc
22991 (BASE): New declaration.
22992 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22993 * config/riscv/riscv-vector-builtins-functions.def
22994 (vfwcvt_xu_frm): New intrinsic function def.
22996 2023-08-16 Pan Li <pan2.li@intel.com>
22998 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
23000 2023-08-16 Pan Li <pan2.li@intel.com>
23002 * config/riscv/riscv-vector-builtins-bases.cc
23003 (BASE): New declaration.
23004 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23005 * config/riscv/riscv-vector-builtins-functions.def
23006 (vfwcvt_x_frm): New intrinsic function def.
23008 2023-08-16 Pan Li <pan2.li@intel.com>
23010 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
23011 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23012 * config/riscv/riscv-vector-builtins-functions.def
23013 (vfcvt_f_frm): New intrinsic function def.
23015 2023-08-16 Pan Li <pan2.li@intel.com>
23017 * config/riscv/riscv-vector-builtins-bases.cc
23018 (BASE): New declaration.
23019 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23020 * config/riscv/riscv-vector-builtins-functions.def
23021 (vfcvt_xu_frm): New intrinsic function def..
23023 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
23026 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
23027 extract when the element is 7 on BE while 8 on LE for byte or 3 on
23028 BE while 4 on LE for halfword.
23030 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
23033 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
23034 for V8HI and V16QI.
23035 (vsx_extract_v4si): New expand for V4SI extraction.
23036 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
23037 word 1 from BE order.
23038 (*mfvsrwz): New insn pattern for mfvsrwz.
23039 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
23040 word 1 from BE order.
23041 (*vsx_extract_si): Remove.
23042 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
23045 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23047 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
23049 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
23050 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
23051 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
23052 (expand_lanes_load_store): New function.
23053 * config/riscv/vector-iterators.md: New iterator.
23055 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23057 * internal-fn.cc (internal_load_fn_p): Apply
23058 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
23059 (internal_store_fn_p): Ditto.
23060 (internal_fn_len_index): Ditto.
23061 (internal_fn_mask_index): Ditto.
23062 (internal_fn_stored_value_index): Ditto.
23063 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
23064 (vect_load_lanes_supported): Ditto.
23065 * tree-vect-loop.cc: Ditto.
23066 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
23067 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
23068 (get_group_load_store_type): Ditto.
23069 (vectorizable_store): Ditto.
23070 (vectorizable_load): Ditto.
23071 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
23072 (vect_load_lanes_supported): Ditto.
23074 2023-08-16 Pan Li <pan2.li@intel.com>
23076 * config/riscv/riscv-vector-builtins-bases.cc
23077 (enum frm_op_type): New type for frm.
23078 (BASE): New declaration.
23079 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23080 * config/riscv/riscv-vector-builtins-functions.def
23081 (vfcvt_x_frm): New intrinsic function def.
23083 2023-08-16 liuhongt <hongtao.liu@intel.com>
23085 * config/i386/i386-builtins.cc
23086 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
23087 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
23088 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
23089 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
23090 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
23091 for use_scatter_8parts
23092 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
23093 (TARGET_USE_GATHER_8PARTS): .. this.
23094 (TARGET_USE_SCATTER): Rename to ..
23095 (TARGET_USE_SCATTER_8PARTS): .. this.
23096 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
23097 (X86_TUNE_USE_GATHER_8PARTS): .. this.
23098 (X86_TUNE_USE_SCATTER): Rename to
23099 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
23100 * config/i386/i386.opt: Add new options mgather, mscatter.
23102 2023-08-16 liuhongt <hongtao.liu@intel.com>
23104 * config/i386/i386-options.cc (m_GDS): New macro.
23105 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
23107 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
23108 (X86_TUNE_USE_GATHER): Ditto.
23110 2023-08-16 liuhongt <hongtao.liu@intel.com>
23112 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
23113 vmovsd when moving DFmode between SSE_REGS.
23114 (movhi_internal): Generate vmovdqa instead of vmovsh when
23115 moving HImode between SSE_REGS.
23116 (mov<mode>_internal): Use vmovaps instead of vmovsh when
23117 moving HF/BFmode between SSE_REGS.
23119 2023-08-15 David Faust <david.faust@oracle.com>
23121 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
23123 2023-08-15 David Faust <david.faust@oracle.com>
23126 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
23127 for any mode 32-bits or smaller, not just SImode.
23129 2023-08-15 Martin Jambor <mjambor@suse.cz>
23133 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
23134 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
23135 (ipcp_transform_function): Do not deallocate transformation info.
23136 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
23138 (vn_reference_lookup_2): When hitting default-def vuse, query
23139 IPA-CP transformation info for any known constants.
23141 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
23142 Thomas Schwinge <thomas@codesourcery.com>
23144 * gimplify.cc (oacc_region_type_name): New function.
23145 (oacc_default_clause): If no 'default' clause appears on this
23146 compute construct, see if one appears on a lexically containing
23148 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
23149 ctx->oacc_default_clause_ctx to current context.
23151 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23154 * config/riscv/predicates.md: Fix predicate.
23156 2023-08-15 Richard Biener <rguenther@suse.de>
23158 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
23159 slp_inst_kind_ctor handling.
23160 (vect_analyze_slp): Simplify.
23161 (vect_build_slp_instance): Dump when we analyze a CTOR.
23162 (vect_slp_check_for_constructors): Rename to ...
23163 (vect_slp_check_for_roots): ... this. Register a
23164 slp_root for CONSTRUCTORs instead of shoving them to
23165 the set of grouped stores.
23166 (vect_slp_analyze_bb_1): Adjust.
23168 2023-08-15 Richard Biener <rguenther@suse.de>
23170 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
23172 (_slp_instance::remain_defs): ... this.
23173 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
23174 (SLP_INSTANCE_REMAIN_DEFS): ... this.
23175 (slp_root::remain): New.
23176 (slp_root::slp_root): Adjust.
23177 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
23178 (vect_build_slp_instance): Get extra remain parameter,
23179 adjust former handling of a cut off stmt.
23180 (vect_analyze_slp_instance): Adjust.
23181 (vect_analyze_slp): Likewise.
23182 (_bb_vec_info::~_bb_vec_info): Likewise.
23183 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
23184 (vect_slp_check_for_constructors): Handle non-internal
23185 defs as remain defs of a reduction.
23186 (vectorize_slp_instance_root_stmt): Adjust.
23188 2023-08-15 Richard Biener <rguenther@suse.de>
23190 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
23191 (canonicalize_loop_induction_variables): Use find_loop_location.
23193 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
23195 PR bootstrap/111021
23196 * config/cris/cris-protos.h: Revert recent change.
23197 * config/cris/cris.cc (cris_legitimate_address_p): Remove
23198 code_helper unused parameter.
23199 (cris_legitimate_address_p_hook): New wrapper function.
23200 (TARGET_LEGITIMATE_ADDRESS_P): Change to
23201 cris_legitimate_address_p_hook.
23203 2023-08-15 Richard Biener <rguenther@suse.de>
23205 PR tree-optimization/110963
23206 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
23207 a PHI node when the expression is available on all edges
23208 and we insert at most one copy from a constant.
23210 2023-08-15 Richard Biener <rguenther@suse.de>
23212 PR tree-optimization/110991
23213 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
23214 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
23215 that will end up constant.
23217 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
23219 PR bootstrap/111021
23220 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
23222 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
23224 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
23225 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
23226 and update the final nest accordingly.
23228 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
23230 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
23233 2023-08-15 Pan Li <pan2.li@intel.com>
23235 * mode-switching.cc (create_pre_exit): Add SET insn check.
23237 2023-08-15 Pan Li <pan2.li@intel.com>
23239 * config/riscv/riscv-vector-builtins-bases.cc
23240 (class vfrec7_frm): New class for frm.
23241 (vfrec7_frm_obj): New declaration.
23243 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23244 * config/riscv/riscv-vector-builtins-functions.def
23245 (vfrec7_frm): New intrinsic function definition.
23246 * config/riscv/vector-iterators.md
23247 (VFMISC): Remove VFREC7.
23249 (float_insn_type): Ditto.
23250 (VFMISC_FRM): New int iterator.
23251 (misc_frm_op): New op for frm.
23252 (float_frm_insn_type): New type for frm.
23253 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
23254 New pattern for misc frm.
23256 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
23258 * lra-constraints.cc (curr_insn_transform): Process output stack
23259 pointer reloads before emitting reload insns.
23261 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
23264 * doc/invoke.texi: Add documentation of
23265 fanalyzer-show-events-in-system-headers
23267 2023-08-14 Jan Hubicka <jh@suse.cz>
23269 PR gcov-profile/110988
23270 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
23272 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
23274 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
23275 Enable compressed builtins when ZC* extensions enabled.
23276 * config/riscv/riscv-shorten-memrefs.cc:
23277 Enable shorten_memrefs pass when ZC* extensions enabled.
23278 * config/riscv/riscv.cc (riscv_compressed_reg_p):
23279 Enable compressible registers when ZC* extensions enabled.
23280 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
23281 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
23282 (riscv_first_stack_step): Allow compression of the register saves
23283 without adding extra instructions.
23284 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
23285 to 16 bits when ZC* extensions enabled.
23287 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
23289 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
23290 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
23295 (MASK_ZCMP): Ditto.
23296 (MASK_ZCMT): Ditto.
23297 (TARGET_ZCA): New target.
23298 (TARGET_ZCB): Ditto.
23299 (TARGET_ZCE): Ditto.
23300 (TARGET_ZCF): Ditto.
23301 (TARGET_ZCD): Ditto.
23302 (TARGET_ZCMP): Ditto.
23303 (TARGET_ZCMT): Ditto.
23304 * config/riscv/riscv.opt: New target variable.
23306 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23309 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
23311 * genrecog.cc (print_nonbool_test): Fix type error of
23312 switch (SUBREG_BYTE (op))'.
23314 2023-08-14 Richard Biener <rguenther@suse.de>
23316 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
23318 2023-08-14 Pan Li <pan2.li@intel.com>
23320 * config/riscv/riscv-vector-builtins-bases.cc
23321 (class unop_frm): New class for frm.
23322 (vfsqrt_frm_obj): New declaration.
23324 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23325 * config/riscv/riscv-vector-builtins-functions.def
23326 (vfsqrt_frm): New intrinsic function definition.
23328 2023-08-14 Pan Li <pan2.li@intel.com>
23330 * config/riscv/riscv-vector-builtins-bases.cc
23331 (class vfwnmsac_frm): New class for frm.
23332 (vfwnmsac_frm_obj): New declaration.
23334 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23335 * config/riscv/riscv-vector-builtins-functions.def
23336 (vfwnmsac_frm): New intrinsic function definition.
23338 2023-08-14 Pan Li <pan2.li@intel.com>
23340 * config/riscv/riscv-vector-builtins-bases.cc
23341 (class vfwmsac_frm): New class for frm.
23342 (vfwmsac_frm_obj): New declaration.
23344 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23345 * config/riscv/riscv-vector-builtins-functions.def
23346 (vfwmsac_frm): New intrinsic function definition.
23348 2023-08-14 Pan Li <pan2.li@intel.com>
23350 * config/riscv/riscv-vector-builtins-bases.cc
23351 (class vfwnmacc_frm): New class for frm.
23352 (vfwnmacc_frm_obj): New declaration.
23354 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23355 * config/riscv/riscv-vector-builtins-functions.def
23356 (vfwnmacc_frm): New intrinsic function definition.
23358 2023-08-14 Cui, Lili <lili.cui@intel.com>
23360 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
23363 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
23365 * config/mmix/predicates.md (mmix_address_operand): Use
23366 lra_in_progress, not reload_in_progress.
23368 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
23370 * config/mmix/mmix.cc: Re-enable LRA.
23372 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
23374 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
23375 when lra_in_progress.
23377 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
23379 * config/mmix/mmix.cc: Disable LRA for MMIX.
23381 2023-08-14 Pan Li <pan2.li@intel.com>
23383 * config/riscv/riscv-vector-builtins-bases.cc
23384 (class vfwmacc_frm): New class for vfwmacc frm.
23385 (vfwmacc_frm_obj): New declaration.
23387 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23388 * config/riscv/riscv-vector-builtins-functions.def
23389 (vfwmacc_frm): Function definition for vfwmacc.
23390 * config/riscv/riscv-vector-builtins.cc
23391 (function_expander::use_widen_ternop_insn): Add frm support.
23393 2023-08-14 Pan Li <pan2.li@intel.com>
23395 * config/riscv/riscv-vector-builtins-bases.cc
23396 (class vfnmsub_frm): New class for vfnmsub frm.
23397 (vfnmsub_frm): New declaration.
23399 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23400 * config/riscv/riscv-vector-builtins-functions.def
23401 (vfnmsub_frm): New function declaration.
23403 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
23405 * lra-constraints.cc (curr_insn_transform): Set done_p up and
23406 check it on true after processing output stack pointer reload.
23408 2023-08-12 Jakub Jelinek <jakub@redhat.com>
23410 * Makefile.in (USER_H): Add stdckdint.h.
23411 * ginclude/stdckdint.h: New file.
23413 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23416 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
23418 2023-08-12 Patrick Palka <ppalka@redhat.com>
23420 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
23421 Delimit output with braces.
23423 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23426 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
23428 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23430 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
23431 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
23432 * config/riscv/vector.md: Ditto.
23434 2023-08-11 David Malcolm <dmalcolm@redhat.com>
23437 * doc/analyzer.texi (__analyzer_get_strlen): New.
23438 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
23440 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
23442 * config/rx/rx.md (subdi3): Fix test for borrow.
23444 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23446 PR middle-end/110989
23447 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
23448 (vectorizable_load): Ditto.
23450 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
23452 * config/bpf/bpf.md (allocate_stack): Define.
23453 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
23454 stack pointer register.
23455 (FIXED_REGISTERS): Adjust accordingly.
23456 (CALL_USED_REGISTERS): Likewise.
23457 (REG_CLASS_CONTENTS): Likewise.
23458 (REGISTER_NAMES): Likewise.
23459 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
23460 space for callee-saved registers.
23461 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
23462 (bpf_expand_epilogue): Do not restore callee-saved registers in
23465 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
23467 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
23468 about too many arguments if function is always inlined.
23470 2023-08-11 Patrick Palka <ppalka@redhat.com>
23472 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
23473 Don't call component_ref_field_offset if the RHS isn't a decl.
23475 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
23477 PR bootstrap/110646
23478 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
23480 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
23482 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
23483 (process_alt_operands): Set the flag.
23484 (curr_insn_transform): Modify stack pointer offsets if output
23485 stack pointer reload is generated.
23487 2023-08-11 Joseph Myers <joseph@codesourcery.com>
23489 * configure: Regenerate.
23491 2023-08-11 Richard Biener <rguenther@suse.de>
23493 PR tree-optimization/110979
23494 * tree-vect-loop.cc (vectorizable_reduction): For
23495 FOLD_LEFT_REDUCTION without target support make sure
23496 we don't need to honor signed zeros and sign dependent rounding.
23498 2023-08-11 Richard Biener <rguenther@suse.de>
23500 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
23501 subgraph entries. Dump the used vector size based on the
23502 SLP subgraph entry root vector type.
23504 2023-08-11 Pan Li <pan2.li@intel.com>
23506 * config/riscv/riscv-vector-builtins-bases.cc
23507 (class vfmsub_frm): New class for vfmsub frm.
23508 (vfmsub_frm): New declaration.
23510 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23511 * config/riscv/riscv-vector-builtins-functions.def
23512 (vfmsub_frm): New function declaration.
23514 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23516 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
23517 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
23518 (expand_partial_store_optab_fn): Ditto.
23519 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
23520 (MASK_LEN_STORE_LANES): Ditto.
23521 * optabs.def (OPTAB_CD): Ditto.
23523 2023-08-11 Pan Li <pan2.li@intel.com>
23525 * config/riscv/riscv-vector-builtins-bases.cc
23526 (class vfnmadd_frm): New class for vfnmadd frm.
23527 (vfnmadd_frm): New declaration.
23529 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23530 * config/riscv/riscv-vector-builtins-functions.def
23531 (vfnmadd_frm): New function declaration.
23533 2023-08-11 Drew Ross <drross@redhat.com>
23534 Jakub Jelinek <jakub@redhat.com>
23536 PR tree-optimization/109938
23537 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
23539 2023-08-11 Pan Li <pan2.li@intel.com>
23541 * config/riscv/riscv-vector-builtins-bases.cc
23542 (class vfmadd_frm): New class for vfmadd frm.
23543 (vfmadd_frm_obj): New declaration.
23545 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23546 * config/riscv/riscv-vector-builtins-functions.def
23547 (vfmadd_frm): New function definition.
23549 2023-08-11 Pan Li <pan2.li@intel.com>
23551 * config/riscv/riscv-vector-builtins-bases.cc
23552 (class vfnmsac_frm): New class for vfnmsac frm.
23553 (vfnmsac_frm_obj): New declaration.
23555 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23556 * config/riscv/riscv-vector-builtins-functions.def
23557 (vfnmsac_frm): New function definition.
23559 2023-08-11 Jakub Jelinek <jakub@redhat.com>
23561 * doc/extend.texi (Typeof): Document typeof_unqual
23562 and __typeof_unqual__.
23564 2023-08-11 Andrew Pinski <apinski@marvell.com>
23566 PR tree-optimization/110954
23567 * generic-match-head.cc (bitwise_inverted_equal_p): Add
23568 wascmp argument and set it accordingly.
23569 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
23570 wascmp argument to the macro.
23571 (gimple_bitwise_inverted_equal_p): Add
23572 wascmp argument and set it accordingly.
23573 * match.pd (`a & ~a`, `a ^| ~a`): Update call
23574 to bitwise_inverted_equal_p and handle wascmp case.
23575 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
23576 call to bitwise_inverted_equal_p and check to see
23577 if was !wascmp or if precision was 1.
23579 2023-08-11 Martin Uecker <uecker@tugraz.at>
23582 * doc/invoke.texi: Update.
23584 2023-08-11 Pan Li <pan2.li@intel.com>
23586 * config/riscv/riscv-vector-builtins-bases.cc
23587 (class vfmsac_frm): New class for vfmsac frm.
23588 (vfmsac_frm_obj): New declaration.
23590 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23591 * config/riscv/riscv-vector-builtins-functions.def
23592 (vfmsac_frm): New function definition
23594 2023-08-10 Jan Hubicka <jh@suse.cz>
23596 PR middle-end/110923
23597 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
23599 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
23601 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
23602 dependent on 'a' extension.
23603 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
23604 (TARGET_ZTSO): New target.
23605 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
23607 (riscv_memmodel_needs_amo_release): Add Ztso case.
23608 (riscv_print_operand): Add Ztso case for LR/SC annotations.
23609 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
23610 * config/riscv/riscv.opt: Add Ztso target variable.
23611 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
23612 Ztso specific insn.
23613 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
23614 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
23615 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
23616 specific load/store/fence mappings.
23617 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
23618 specific load/store/fence mappings.
23620 2023-08-10 Jan Hubicka <jh@suse.cz>
23622 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
23625 2023-08-10 Jan Hubicka <jh@suse.cz>
23627 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
23629 2023-08-10 Jan Hubicka <jh@suse.cz>
23631 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
23632 handling of undefined values.
23634 2023-08-10 Jakub Jelinek <jakub@redhat.com>
23637 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
23638 return virtual phis and return NULL if there is a virtual phi
23639 where the arguments from E0 and E1 edges aren't equal.
23641 2023-08-10 Richard Biener <rguenther@suse.de>
23643 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
23644 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
23646 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23649 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
23651 2023-08-10 Pan Li <pan2.li@intel.com>
23653 * config/riscv/riscv-vector-builtins-bases.cc
23654 (class vfnmacc_frm): New class for vfnmacc.
23655 (vfnmacc_frm_obj): New declaration.
23657 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23658 * config/riscv/riscv-vector-builtins-functions.def
23659 (vfnmacc_frm): New function definition.
23661 2023-08-10 Pan Li <pan2.li@intel.com>
23663 * config/riscv/riscv-vector-builtins-bases.cc
23664 (class vfmacc_frm): New class for vfmacc frm.
23665 (vfmacc_frm_obj): New declaration.
23667 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23668 * config/riscv/riscv-vector-builtins-functions.def
23669 (vfmacc_frm): New function definition.
23671 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23674 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
23676 2023-08-10 Richard Biener <rguenther@suse.de>
23678 * tree-vectorizer.h (vectorizable_live_operation): Remove
23679 gimple_stmt_iterator * argument.
23680 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
23681 Adjust plumbing around vect_get_loop_mask.
23682 (vect_analyze_loop_operations): Adjust.
23683 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
23684 (vect_bb_slp_mark_live_stmts): Likewise.
23685 (vect_schedule_slp_node): Likewise.
23686 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
23687 Remove gimple_stmt_iterator * argument.
23688 (vect_transform_stmt): Adjust.
23690 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23692 * config/riscv/vector-iterators.md: Add missing modes.
23694 2023-08-10 Jakub Jelinek <jakub@redhat.com>
23697 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
23698 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
23700 2023-08-10 Jakub Jelinek <jakub@redhat.com>
23703 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
23704 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
23707 2023-08-10 liuhongt <hongtao.liu@intel.com>
23710 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
23711 sanitize upper part of V4HFmode register with
23712 -fno-trapping-math.
23713 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
23714 (<divv4hf3): Ditto.
23715 (<insn>v2hf3): Ditto.
23717 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
23718 register with -fno-trapping-math.
23720 2023-08-10 Pan Li <pan2.li@intel.com>
23721 Kito Cheng <kito.cheng@sifive.com>
23723 * config/riscv/riscv-protos.h
23724 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
23725 (get_frm_mode): New declaration.
23726 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
23727 * config/riscv/riscv-vector-builtins.cc
23728 (function_expander::use_ternop_insn): Take care of frm reg.
23729 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
23730 (riscv_emit_frm_mode_set): Ditto.
23731 (riscv_emit_mode_set): Ditto.
23732 (riscv_frm_adjust_mode_after_call): Ditto.
23733 (riscv_frm_mode_needed): Ditto.
23734 (riscv_frm_mode_after): Ditto.
23735 (riscv_mode_entry): Ditto.
23736 (riscv_mode_exit): Ditto.
23737 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
23738 * config/riscv/vector.md
23739 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
23740 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
23742 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23744 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
23745 incorrect anticipate info.
23747 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
23749 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
23750 Remove 'Zve32d' from the version list.
23752 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
23754 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
23755 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
23756 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
23757 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
23759 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
23761 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
23762 (mem_shadd_or_shadd_rtx_p): New function.
23764 2023-08-09 Andrew Pinski <apinski@marvell.com>
23766 PR tree-optimization/110937
23767 PR tree-optimization/100798
23768 * match.pd (`a ? ~b : b`): Handle this
23771 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
23773 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
23775 2023-08-09 Richard Ball <richard.ball@arm.com>
23777 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
23778 * config/aarch64/aarch64-tune.md: Regenerate.
23779 * doc/invoke.texi: Document Cortex-A520 CPU.
23781 2023-08-09 Carl Love <cel@us.ibm.com>
23783 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
23784 Move definitions to Altivec stanza.
23785 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
23788 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23791 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
23792 stepped vector support.
23794 2023-08-09 liuhongt <hongtao.liu@intel.com>
23796 * common/config/i386/cpuinfo.h (get_available_features):
23797 Rename local variable subleaf_level to max_subleaf_level.
23799 2023-08-09 Richard Biener <rguenther@suse.de>
23801 PR rtl-optimization/110587
23802 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
23804 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
23806 PR tree-optimization/110248
23807 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
23808 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
23809 legitimate when outer code is PLUS.
23811 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
23813 PR tree-optimization/110248
23814 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
23815 type code_helper and pass it to targetm.addr_space.legitimate_address_p
23816 instead of ERROR_MARK.
23817 (offsettable_address_addr_space_p): Update one function pointer with
23818 one more argument of type code_helper as its assignees
23819 memory_address_addr_space_p and strict_memory_address_addr_space_p
23820 have been adjusted, and adjust some call sites with ERROR_MARK.
23821 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
23822 (memory_address_addr_space_p): Adjust with one more unnamed argument
23823 of type code_helper with default ERROR_MARK.
23824 (strict_memory_address_addr_space_p): Likewise.
23825 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
23826 argument of type code_helper.
23827 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
23828 type code_helper and pass it to memory_address_addr_space_p.
23829 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
23830 one more unnamed argument of type code_helper with default value
23832 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
23833 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
23834 pass it to all valid_mem_ref_p calls.
23836 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
23838 PR tree-optimization/110248
23839 * coretypes.h (class code_helper): Add forward declaration.
23840 * doc/tm.texi: Regenerate.
23841 * lra-constraints.cc (valid_address_p): Call target hook
23842 targetm.addr_space.legitimate_address_p with an extra parameter
23843 ERROR_MARK as its prototype changes.
23844 * recog.cc (memory_address_addr_space_p): Likewise.
23845 * reload.cc (strict_memory_address_addr_space_p): Likewise.
23846 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
23847 Extend with one more argument of type code_helper, update the
23848 documentation accordingly.
23849 * targhooks.cc (default_legitimate_address_p): Adjust for the
23850 new code_helper argument.
23851 (default_addr_space_legitimate_address_p): Likewise.
23852 * targhooks.h (default_legitimate_address_p): Likewise.
23853 (default_addr_space_legitimate_address_p): Likewise.
23854 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
23855 with extra unnamed code_helper argument with default ERROR_MARK.
23856 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
23857 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
23858 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
23859 (tree.h): New include for tree_code ERROR_MARK.
23860 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
23861 unnamed code_helper argument with default ERROR_MARK.
23862 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
23863 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
23864 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
23865 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
23866 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
23867 (tree.h): New include for tree_code ERROR_MARK.
23868 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
23869 unnamed code_helper argument with default ERROR_MARK.
23870 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
23871 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
23873 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
23874 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
23875 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
23876 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
23877 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
23878 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
23879 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
23880 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
23881 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
23883 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
23884 (m32c_addr_space_legitimate_address_p): Likewise.
23885 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
23886 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
23887 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
23888 * config/microblaze/microblaze-protos.h (tree.h): New include for
23889 tree_code ERROR_MARK.
23890 (microblaze_legitimate_address_p): Adjust with extra unnamed
23891 code_helper argument with default ERROR_MARK.
23892 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
23894 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
23895 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
23896 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
23897 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
23898 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
23899 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
23900 argument with default ERROR_MARK and adjust the call to function
23901 msp430_legitimate_address_p.
23902 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
23903 unnamed code_helper argument with default ERROR_MARK.
23904 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
23905 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
23906 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
23907 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
23908 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
23909 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
23910 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
23911 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
23912 (tree.h): New include for tree_code ERROR_MARK.
23913 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
23914 extra unnamed code_helper argument with default ERROR_MARK.
23915 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
23916 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
23917 argument and adjust the call to function rs6000_legitimate_address_p.
23918 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
23919 unnamed code_helper argument with default ERROR_MARK.
23920 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
23921 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
23922 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
23923 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
23924 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
23925 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
23926 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
23927 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
23929 (tree.h): New include for tree_code ERROR_MARK.
23930 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
23931 Adjust with extra unnamed code_helper argument with default
23934 2023-08-09 liuhongt <hongtao.liu@intel.com>
23936 * common/config/i386/cpuinfo.h (get_available_features): Check
23937 EAX for valid subleaf before use CPUID.
23939 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
23941 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
23942 for the temporary when canonicalizing the condition.
23944 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
23946 * config/bpf/core-builtins.cc: Cleaned include headers.
23947 (struct cr_builtins): Added GTY.
23948 (cr_builtins_ref): Created.
23949 (builtins_data) Changed to GC root.
23950 (allocate_builtin_data): Changed.
23951 Included gt-core-builtins.h.
23952 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
23953 (bpf_core_extra_ref): Created.
23954 (bpf_comment_info): Changed to GC root.
23955 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
23957 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
23960 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
23961 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
23962 upper part of V2SFmode register with -fno-trapping-math.
23963 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
23965 (<smaxmin:code>v2sf3): Ditto.
23966 (sqrtv2sf2): Ditto.
23967 (*mmx_haddv2sf3_low): Ditto.
23968 (*mmx_hsubv2sf3_low): Ditto.
23969 (vec_addsubv2sf3): Ditto.
23970 (vec_cmpv2sfv2si): Ditto.
23971 (vcond<V2FI:mode>v2sf): Ditto.
23974 (fnmav2sf4): Ditto.
23975 (fnmsv2sf4): Ditto.
23976 (fix_truncv2sfv2si2): Ditto.
23977 (fixuns_truncv2sfv2si2): Ditto.
23978 (floatv2siv2sf2): Ditto.
23979 (floatunsv2siv2sf2): Ditto.
23980 (nearbyintv2sf2): Ditto.
23981 (rintv2sf2): Ditto.
23982 (lrintv2sfv2si2): Ditto.
23983 (ceilv2sf2): Ditto.
23984 (lceilv2sfv2si2): Ditto.
23985 (floorv2sf2): Ditto.
23986 (lfloorv2sfv2si2): Ditto.
23987 (btruncv2sf2): Ditto.
23988 (roundv2sf2): Ditto.
23989 (lroundv2sfv2si2): Ditto.
23990 * doc/invoke.texi (x86 Options): Document
23991 -mpartial-vector-fp-math option.
23993 2023-08-08 Andrew Pinski <apinski@marvell.com>
23995 PR tree-optimization/103281
23996 PR tree-optimization/28794
23997 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
23999 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
24000 (simplify_using_ranges::simplify_casted_cond): Rename to ...
24001 (simplify_using_ranges::simplify_casted_compare): This
24002 and change arguments to take op0 and op1.
24003 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
24004 (simplify_using_ranges::simplify): For tcc_comparison assignments call
24005 simplify_compare_assign_using_ranges_1.
24006 * vr-values.h (simplify_using_ranges): Add
24007 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
24008 Rename simplify_casted_cond and simplify_casted_compare and
24009 update argument types.
24011 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
24013 * genmatch.cc: Log line numbers indirectly.
24015 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
24017 * genmatch.cc: Make sinfo map ordered.
24018 * Makefile.in: Require the ordered map header for genmatch.o.
24020 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
24022 * ordered-hash-map.h: Add get_or_insert.
24023 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
24025 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24027 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
24028 (cond_len_<optab><mode>): Ditto.
24029 (cond_fma<mode>): Ditto.
24030 (cond_len_fma<mode>): Ditto.
24031 (cond_fnma<mode>): Ditto.
24032 (cond_len_fnma<mode>): Ditto.
24033 (cond_fms<mode>): Ditto.
24034 (cond_len_fms<mode>): Ditto.
24035 (cond_fnms<mode>): Ditto.
24036 (cond_len_fnms<mode>): Ditto.
24037 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
24039 (enum insn_type): Add new enum type.
24040 (prepare_ternary_operands): New function.
24041 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
24042 (emit_nonvlmax_tumu_insn): Ditto.
24043 (emit_nonvlmax_fp_tumu_insn): Ditto.
24044 (expand_cond_len_binop): Add condtional operations.
24045 (expand_cond_len_ternop): Ditto.
24046 (prepare_ternary_operands): New function.
24047 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
24048 riscv_get_v_regno_alignment as global scope.
24049 * config/riscv/vector.md: Fix ternary bugs.
24051 2023-08-08 Richard Biener <rguenther@suse.de>
24053 PR tree-optimization/49955
24054 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
24055 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
24056 * tree-vect-slp.cc (vect_free_slp_instance): Release
24057 SLP_INSTANCE_REMAIN_STMTS.
24058 (vect_build_slp_instance): Make the number of lanes of
24059 a BB reduction even.
24060 (vectorize_slp_instance_root_stmt): Handle unvectorized
24061 defs of a BB reduction.
24063 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24065 * internal-fn.cc (get_len_internal_fn): New function.
24066 (DEF_INTERNAL_COND_FN): Ditto.
24067 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
24068 * internal-fn.h (get_len_internal_fn): Ditto.
24069 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
24071 2023-08-08 Richard Biener <rguenther@suse.de>
24073 PR tree-optimization/110924
24074 * tree-ssa-live.h (virtual_operand_live): Update comment.
24075 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
24076 optimization, look at each predecessor.
24077 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
24079 2023-08-08 yulong <shiyulong@iscas.ac.cn>
24081 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
24083 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24085 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
24086 * config/riscv/vector.md: Ditto.
24088 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24090 * config/riscv/autovec.md: Add VLS shift.
24092 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24094 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
24095 * config/riscv/vector-iterators.md: Ditto.
24096 * config/riscv/vector.md: Ditto.
24098 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
24100 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
24102 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
24104 * configure: Regenerate.
24106 2023-08-07 John Ericson <git@JohnEricson.me>
24108 * configure: Regenerate.
24110 2023-08-07 Alan Modra <amodra@gmail.com>
24112 * configure: Regenerate.
24114 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
24116 * configure: Regenerate.
24118 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
24120 * configure: Regenerate.
24122 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
24124 * configure: Regenerate.
24126 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
24128 * configure: Regenerate.
24130 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
24132 * configure: Regenerate.
24134 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
24136 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
24137 VOIDmode operands to conditional before canonicalization.
24139 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
24141 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
24142 (find_oldest_value_reg): Inline stack_pointer_rtx check.
24143 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
24145 2023-08-07 Martin Jambor <mjambor@suse.cz>
24148 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
24149 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
24150 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
24151 (ptr_parm_has_nonarg_uses): Likewise.
24152 * ipa-param-manipulation.cc
24153 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
24154 (ipa_param_body_adjustments::mark_dead_statements): Move initial
24155 checks to get_ddef_if_exists_and_is_used.
24156 (ipa_param_body_adjustments::mark_clobbers_dead): New.
24157 (ipa_param_body_adjustments::common_initialization): Call
24158 mark_clobbers_dead when splitting.
24160 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
24162 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
24163 as an argument and pass it to riscv_emit_int_order_test.
24164 (riscv_expand_conditional_move): Handle cases where the condition
24165 is not EQ/NE or the second argument to the conditional is not
24167 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
24168 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
24170 2023-08-07 Andrew Pinski <apinski@marvell.com>
24172 PR tree-optimization/109959
24173 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
24176 2023-08-07 Richard Biener <rguenther@suse.de>
24178 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
24179 calculate post-dominators. Calculate RPO on the inverted
24180 graph and process blocks in that order.
24182 2023-08-07 liuhongt <hongtao.liu@intel.com>
24185 * config/i386/i386-protos.h
24186 (vpternlog_redundant_operand_mask): Adjust parameter type.
24187 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
24188 INTVAL instead of XINT, also adjust parameter type from rtx*
24189 to rtx since the function only needs operands[4] in vpternlog
24191 (substitute_vpternlog_operands): Pass operands[4] instead of
24192 operands to vpternlog_redundant_operand_mask.
24193 * config/i386/sse.md: Ditto.
24195 2023-08-07 Richard Biener <rguenther@suse.de>
24197 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
24198 around dumping code.
24200 2023-08-07 liuhongt <hongtao.liu@intel.com>
24203 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
24204 to define_expand and break into ..
24205 (<insn>v4hf3): .. this.
24206 (divv4hf3): .. this.
24207 (<insn>v2hf3): .. this.
24208 (divv2hf3): .. this.
24209 (movd_v2hf_to_sse): New define_expand.
24210 (movq_<mode>_to_sse): Extend to V4HFmode.
24211 (mmxdoublevecmode): Ditto.
24212 (V2FI_V4HF): New mode iterator.
24213 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
24214 by using mode iterator V4SF_V8HF, renamed to ..
24215 (*vec_concat<mode>): .. this.
24216 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
24217 iterator V4SF_V8HF, renamed to ..
24218 (*vec_concat<mode>_0): .. this.
24219 (*vec_concatv8hf_movss): New define_insn.
24220 (V4SF_V8HF): New mode iterator.
24222 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24224 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
24226 2023-08-07 Jan Beulich <jbeulich@suse.com>
24228 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
24229 (*mmx_pinsrb): Likewise.
24230 (*mmx_pextrb): Likewise.
24231 (*mmx_pextrb_zext): Likewise.
24232 (mmx_pshufbv8qi3): Likewise.
24233 (mmx_pshufbv4qi3): Likewise.
24234 (mmx_pswapdv2si2): Likewise.
24235 (*pinsrb): Likewise.
24236 (*pextrb): Likewise.
24237 (*pextrb_zext): Likewise.
24238 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
24239 (*sse2_eq<mode>3): Likewise.
24240 (*sse2_gt<mode>3): Likewise.
24241 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
24242 (*vec_extract<mode>): Likewise.
24243 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
24244 (*vec_extractv16qi_zext): Likewise.
24245 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
24246 (ssse3_pmaddubsw128): Likewise.
24247 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
24248 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
24249 (<ssse3_avx2>_psign<mode>3): Likewise.
24250 (<ssse3_avx2>_palignr<mode>): Likewise.
24251 (*abs<mode>2): Likewise.
24252 (sse4_2_pcmpestr): Likewise.
24253 (sse4_2_pcmpestri): Likewise.
24254 (sse4_2_pcmpestrm): Likewise.
24255 (sse4_2_pcmpestr_cconly): Likewise.
24256 (sse4_2_pcmpistr): Likewise.
24257 (sse4_2_pcmpistri): Likewise.
24258 (sse4_2_pcmpistrm): Likewise.
24259 (sse4_2_pcmpistr_cconly): Likewise.
24260 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
24261 (vgf2p8affineqb_<mode><mask_name>): Likewise.
24262 (vgf2p8mulb_<mode><mask_name>): Likewise.
24263 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
24265 (*<code>v16qi3 [umaxmin]): Likewise.
24267 2023-08-07 Jan Beulich <jbeulich@suse.com>
24269 * config/i386/i386.md (sse4_1_round<mode>2): Make
24270 "length_immediate" uniformly 1.
24271 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
24272 (mmx_pblendvb_<mode>): Likewise.
24274 2023-08-07 Jan Beulich <jbeulich@suse.com>
24276 * config/i386/sse.md
24277 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
24278 "prefix" attribute.
24279 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
24282 2023-08-07 Jan Beulich <jbeulich@suse.com>
24284 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
24285 "prefix_extra", and "mode" attributes.
24286 (xop_phadd<u>bd): Likewise.
24287 (xop_phadd<u>bq): Likewise.
24288 (xop_phadd<u>wd): Likewise.
24289 (xop_phadd<u>wq): Likewise.
24290 (xop_phadd<u>dq): Likewise.
24291 (xop_phsubbw): Likewise.
24292 (xop_phsubwd): Likewise.
24293 (xop_phsubdq): Likewise.
24294 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
24295 (xop_rotr<mode>3): Likewise.
24296 (xop_frcz<mode>2): Likewise.
24297 (*xop_vmfrcz<mode>2): Likewise.
24298 (xop_vrotl<mode>3): Add "prefix" attribute. Change
24299 "prefix_extra" to 1.
24300 (xop_sha<mode>3): Likewise.
24301 (xop_shl<mode>3): Likewise.
24303 2023-08-07 Jan Beulich <jbeulich@suse.com>
24305 * config/i386/sse.md
24306 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
24308 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
24309 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
24310 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
24311 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
24312 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
24313 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
24314 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
24315 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
24316 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
24317 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
24318 (vec_extract_lo_v64qi): Likewise.
24319 (vec_extract_hi_v64qi): Likewise.
24320 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
24321 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
24322 (*avx512f_<code><mode>3<mask_name>): Likewise.
24323 (*vec_extractv4ti): Likewise.
24324 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
24325 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
24326 Add "length_immediate".
24328 2023-08-07 Jan Beulich <jbeulich@suse.com>
24330 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
24332 (@rdseed<mode>): Likewise.
24333 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
24334 Adjust "prefix_extra".
24335 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
24336 (*sse4_1_<code><mode>3<mask_name>): Likewise.
24337 (*avx2_eq<mode>3): Likewise.
24338 (avx2_gt<mode>3): Likewise.
24339 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
24340 (*vec_extract<mode>): Likewise.
24341 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
24343 2023-08-07 Jan Beulich <jbeulich@suse.com>
24345 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
24346 "prefix_rep". Drop "prefix_extra".
24347 (wr<fsgs>base<mode>): Likewise.
24348 (ptwrite<mode>): Likewise.
24350 2023-08-07 Jan Beulich <jbeulich@suse.com>
24352 * config/i386/i386.md (isa): Move up.
24353 (length_immediate): Handle "fma4".
24354 (prefix): Handle "ssemuladd".
24355 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
24356 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
24358 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
24359 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
24360 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
24362 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
24363 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
24364 (*fma_fnmadd_<mode>): Likewise.
24365 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
24367 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
24368 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
24369 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
24371 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
24372 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
24373 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
24375 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
24376 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
24377 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
24379 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
24380 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
24381 (*fmai_fmadd_<mode>): Likewise.
24382 (*fmai_fmsub_<mode>): Likewise.
24383 (*fmai_fnmadd_<mode><round_name>): Likewise.
24384 (*fmai_fnmsub_<mode><round_name>): Likewise.
24385 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
24386 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
24387 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
24388 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
24389 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
24390 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
24391 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
24392 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
24393 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
24394 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
24395 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
24396 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
24397 (*fma4i_vmfmadd_<mode>): Likewise.
24398 (*fma4i_vmfmsub_<mode>): Likewise.
24399 (*fma4i_vmfnmadd_<mode>): Likewise.
24400 (*fma4i_vmfnmsub_<mode>): Likewise.
24401 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
24402 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
24403 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
24405 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
24406 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
24407 (xop_p<macs>dql): Likewise.
24408 (xop_p<macs>dqh): Likewise.
24409 (xop_p<macs>wd): Likewise.
24410 (xop_p<madcs>wd): Likewise.
24411 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
24413 2023-08-07 Jan Beulich <jbeulich@suse.com>
24415 * config/i386/i386.md (length_immediate): Handle "sse4arg".
24416 (prefix): Likewise.
24417 (*xop_pcmov_<mode>): Add "mode" attribute.
24418 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
24419 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
24420 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
24421 (*xop_pcmov_<mode>): Add "mode" attribute.
24422 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
24424 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
24425 "prefix_extra", and "length_immediate" attributes.
24426 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
24427 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
24428 and "length_immediate" attributes. Switch "type" to "sse4arg".
24429 (xop_pcom_tf<mode>3): Likewise.
24430 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
24432 2023-08-07 Jan Beulich <jbeulich@suse.com>
24434 * config/i386/i386.md (prefix_extra): Correct comment. Fold
24435 cases yielding 2 into ones yielding 1.
24437 2023-08-07 Jan Hubicka <jh@suse.cz>
24439 PR tree-optimization/106293
24440 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
24441 * tree-vect-loop.cc (vect_transform_loop): Likewise.
24443 2023-08-07 Andrew Pinski <apinski@marvell.com>
24445 PR tree-optimization/96695
24446 * match.pd (min_value, max_value): Extend to
24449 2023-08-06 Jan Hubicka <jh@suse.cz>
24451 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
24452 __builtin_expect that CPU likely supports cpuid.
24454 2023-08-06 Jan Hubicka <jh@suse.cz>
24456 * tree-loop-distribution.cc (loop_distribution::execute): Disable
24457 distribution for loops with estimated iterations 0.
24459 2023-08-06 Jan Hubicka <jh@suse.cz>
24461 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
24463 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
24465 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
24466 more Zicond patterns. Fix whitespace typo.
24467 (riscv_rtx_costs): Remove accidental code duplication.
24468 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
24470 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
24473 * config/i386/i386-protos.h
24474 (vpternlog_redundant_operand_mask): Declare.
24475 (substitute_vpternlog_operands): Declare.
24476 * config/i386/i386.cc
24477 (vpternlog_redundant_operand_mask): New helper.
24478 (substitute_vpternlog_operands): New function. Use them...
24479 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
24481 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
24483 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
24484 value of -1 is equivalent to don't care.
24485 (extract_integral_bit_field): Indicate that we don't require
24486 the most significant word to be zero extended, if we're about
24488 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
24489 of -1 is equivalent to don't care. Don't clear the most
24490 significant bits with AND mask when UNSIGNEDP is -1.
24492 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
24494 * config/i386/sse.md (define_split): Convert highpart:DF extract
24495 from V2DFmode register into a sse2_storehpd instruction.
24496 (define_split): Likewise, convert lowpart:DF extract from V2DF
24497 register into a sse2_storelpd instruction.
24499 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
24501 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
24504 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
24506 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
24507 against early clobber hard regs.
24509 2023-08-04 Tamar Christina <tamar.christina@arm.com>
24511 * doc/extend.texi: Document it.
24513 2023-08-04 Tamar Christina <tamar.christina@arm.com>
24516 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
24517 vec_widen_<sur>shiftl_hi_<mode>): Remove.
24518 (aarch64_<sur>shll<mode>_internal): Renamed to...
24519 (aarch64_<su>shll<mode>): .. This.
24520 (aarch64_<sur>shll2<mode>_internal): Renamed to...
24521 (aarch64_<su>shll2<mode>): .. This.
24522 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
24524 * config/aarch64/constraints.md (D2, DL): New.
24525 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
24527 2023-08-04 Tamar Christina <tamar.christina@arm.com>
24529 * gensupport.cc (conlist): Support length 0 attribute.
24531 2023-08-04 Tamar Christina <tamar.christina@arm.com>
24533 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
24534 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
24536 2023-08-04 Tamar Christina <tamar.christina@arm.com>
24538 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
24540 (aarch64_adjust_stmt_cost): Use it.
24541 (aarch64_vector_costs::count_ops): Likewise.
24542 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
24543 aarch64_adjust_stmt_cost.
24545 2023-08-04 Richard Biener <rguenther@suse.de>
24547 PR tree-optimization/110838
24548 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
24549 Fix right-shift value sanitizing. Properly emit external
24550 def mangling in the preheader rather than in the pattern
24551 def sequence where it will fail vectorizing.
24553 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
24555 PR middle-end/110316
24557 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
24558 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
24559 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
24560 (timer::validate_phases): Use integral arithmetic to check
24562 (timer::print_row, timer::print): Convert from integral
24563 nanoseconds to floating point seconds before printing.
24564 (timer::all_zero): Change limit to nanosec count instead of
24565 fractional count of seconds.
24566 (make_json_for_timevar_time_def): Convert from integral
24567 nanoseconds to floating point seconds before recording.
24568 * timevar.h (struct timevar_time_def): Update all measurements
24569 to use uint64_t nanoseconds rather than seconds stored in a
24572 2023-08-04 Richard Biener <rguenther@suse.de>
24574 PR tree-optimization/110838
24575 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
24576 the arithmetic right-shift case to non-negative operands.
24578 2023-08-04 Pan Li <pan2.li@intel.com>
24581 2023-08-04 Pan Li <pan2.li@intel.com>
24583 * config/riscv/riscv-vector-builtins-bases.cc
24584 (class vfmacc_frm): New class for vfmacc frm.
24585 (vfmacc_frm_obj): New declaration.
24587 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24588 * config/riscv/riscv-vector-builtins-functions.def
24589 (vfmacc_frm): New function definition.
24590 * config/riscv/riscv-vector-builtins.cc
24591 (function_expander::use_ternop_insn): Add frm operand support.
24592 * config/riscv/vector.md: Add vfmuladd to frm_mode.
24594 2023-08-04 Pan Li <pan2.li@intel.com>
24597 2023-08-04 Pan Li <pan2.li@intel.com>
24599 * config/riscv/riscv-vector-builtins-bases.cc
24600 (class vfnmacc_frm): New class for vfnmacc.
24601 (vfnmacc_frm_obj): New declaration.
24603 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24604 * config/riscv/riscv-vector-builtins-functions.def
24605 (vfnmacc_frm): New function definition.
24607 2023-08-04 Pan Li <pan2.li@intel.com>
24610 2023-08-04 Pan Li <pan2.li@intel.com>
24612 * config/riscv/riscv-vector-builtins-bases.cc
24613 (class vfmsac_frm): New class for vfmsac frm.
24614 (vfmsac_frm_obj): New declaration.
24616 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24617 * config/riscv/riscv-vector-builtins-functions.def
24618 (vfmsac_frm): New function definition.
24620 2023-08-04 Pan Li <pan2.li@intel.com>
24623 2023-08-04 Pan Li <pan2.li@intel.com>
24625 * config/riscv/riscv-vector-builtins-bases.cc
24626 (class vfnmsac_frm): New class for vfnmsac frm.
24627 (vfnmsac_frm_obj): New declaration.
24629 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24630 * config/riscv/riscv-vector-builtins-functions.def
24631 (vfnmsac_frm): New function definition.
24633 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
24635 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
24636 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
24637 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
24638 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
24639 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
24640 (attiny102, attiny104): New devices.
24641 * doc/avr-mmcu.texi: Regenerate.
24643 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
24645 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
24646 and PM_OFFSET entries.
24648 2023-08-04 Andrew Pinski <apinski@marvell.com>
24650 PR tree-optimization/110874
24651 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
24652 (gimple_maybe_cmp): Likewise.
24653 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
24654 and gimple_maybe_cmp instead of being recursive.
24655 * match.pd (bit_not_with_nop): New match pattern.
24656 (maybe_cmp): Likewise.
24658 2023-08-04 Drew Ross <drross@redhat.com>
24660 PR middle-end/101955
24661 * match.pd ((signed x << c) >> c): New canonicalization.
24663 2023-08-04 Pan Li <pan2.li@intel.com>
24665 * config/riscv/riscv-vector-builtins-bases.cc
24666 (class vfnmsac_frm): New class for vfnmsac frm.
24667 (vfnmsac_frm_obj): New declaration.
24669 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24670 * config/riscv/riscv-vector-builtins-functions.def
24671 (vfnmsac_frm): New function definition.
24673 2023-08-04 Pan Li <pan2.li@intel.com>
24675 * config/riscv/riscv-vector-builtins-bases.cc
24676 (class vfmsac_frm): New class for vfmsac frm.
24677 (vfmsac_frm_obj): New declaration.
24679 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24680 * config/riscv/riscv-vector-builtins-functions.def
24681 (vfmsac_frm): New function definition.
24683 2023-08-04 Pan Li <pan2.li@intel.com>
24685 * config/riscv/riscv-vector-builtins-bases.cc
24686 (class vfnmacc_frm): New class for vfnmacc.
24687 (vfnmacc_frm_obj): New declaration.
24689 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24690 * config/riscv/riscv-vector-builtins-functions.def
24691 (vfnmacc_frm): New function definition.
24693 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
24696 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
24697 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
24699 2023-08-04 Pan Li <pan2.li@intel.com>
24701 * config/riscv/riscv-vector-builtins-bases.cc
24702 (class vfmacc_frm): New class for vfmacc frm.
24703 (vfmacc_frm_obj): New declaration.
24705 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24706 * config/riscv/riscv-vector-builtins-functions.def
24707 (vfmacc_frm): New function definition.
24708 * config/riscv/riscv-vector-builtins.cc
24709 (function_expander::use_ternop_insn): Add frm operand support.
24710 * config/riscv/vector.md: Add vfmuladd to frm_mode.
24712 2023-08-04 Pan Li <pan2.li@intel.com>
24714 * config/riscv/riscv-vector-builtins-bases.cc
24715 (vfwmul_frm_obj): New declaration.
24716 (vfwmul_frm): Ditto.
24717 * config/riscv/riscv-vector-builtins-bases.h:
24718 (vfwmul_frm): Ditto.
24719 * config/riscv/riscv-vector-builtins-functions.def
24720 (vfwmul_frm): New function definition.
24721 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
24723 2023-08-04 Pan Li <pan2.li@intel.com>
24725 * config/riscv/riscv-vector-builtins-bases.cc
24726 (binop_frm): New declaration.
24727 (reverse_binop_frm): Likewise.
24729 * config/riscv/riscv-vector-builtins-bases.h:
24730 (vfdiv_frm): New extern declaration.
24731 (vfrdiv_frm): Likewise.
24732 * config/riscv/riscv-vector-builtins-functions.def
24733 (vfdiv_frm): New function definition.
24734 (vfrdiv_frm): Likewise.
24735 * config/riscv/vector.md: Add vfdiv to frm_mode.
24737 2023-08-03 Jan Hubicka <jh@suse.cz>
24739 * tree-cfg.cc (print_loop_info): Print entry count.
24741 2023-08-03 Jan Hubicka <jh@suse.cz>
24743 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
24745 2023-08-03 Jan Hubicka <jh@suse.cz>
24747 PR bootstrap/110857
24748 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
24749 unadjusted_exit_count.
24751 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
24753 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
24756 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
24758 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
24759 various Zicond patterns.
24760 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
24761 sfb_alu_operand for both arms of the conditional move.
24762 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
24764 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
24770 * config.gcc: Added core-builtins.cc and .o files.
24771 * config/bpf/bpf-passes.def: Removed file.
24772 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
24773 bpf_replace_core_move_operands): New prototypes.
24774 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
24775 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
24776 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
24777 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
24778 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
24780 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
24781 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
24782 (mov_reloc_core<mode>): Added.
24783 * config/bpf/core-builtins.cc (struct cr_builtin, enum
24784 cr_decision struct cr_local, struct cr_final, struct
24785 core_builtin_helpers, enum bpf_plugin_states): Added types.
24786 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
24788 (allocate_builtin_data, get_builtin-data, search_builtin_data,
24789 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
24790 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
24791 bpf_core_get_index, compute_field_expr,
24792 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
24793 process_field_expr, pack_enum_value, process_enum_value, pack_type,
24794 process_type, bpf_require_core_support, make_core_relo, read_kind,
24795 kind_access_index, kind_preserve_field_info, kind_enum_value,
24796 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
24797 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
24798 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
24799 bpf_expand_core_builtin, bpf_add_core_reloc,
24800 bpf_replace_core_move_operands): Added functions.
24801 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
24802 (bpf_init_core_builtins, bpf_expand_core_builtin,
24803 bpf_resolve_overloaded_core_builtin): Added functions.
24804 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
24805 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
24806 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
24807 * config/bpf/t-bpf: Added core-builtins.o.
24808 * doc/extend.texi: Added documentation for new BPF builtins.
24810 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
24812 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
24813 ranges to the call to relation_fold_and_or.
24814 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
24815 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
24816 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
24817 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
24818 a varying op1 and op2 to call.
24819 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
24820 (operator_equal::op1_op2_relation): New float version.
24821 (operator_not_equal::op1_op2_relation): Ditto.
24822 (operator_lt::op1_op2_relation): Ditto.
24823 (operator_le::op1_op2_relation): Ditto.
24824 (operator_gt::op1_op2_relation): Ditto.
24825 (operator_ge::op1_op2_relation) Ditto.
24826 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
24828 (operator_not_equal::op1_op2_relation): Ditto.
24829 (operator_lt::op1_op2_relation): Ditto.
24830 (operator_le::op1_op2_relation): Ditto.
24831 (operator_gt::op1_op2_relation): Ditto.
24832 (operator_ge::op1_op2_relation): Ditto.
24833 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
24835 (range_operator::op1_op2_relation): Add extra params.
24836 (operator_equal::op1_op2_relation): Ditto.
24837 (operator_not_equal::op1_op2_relation): Ditto.
24838 (operator_lt::op1_op2_relation): Ditto.
24839 (operator_le::op1_op2_relation): Ditto.
24840 (operator_gt::op1_op2_relation): Ditto.
24841 (operator_ge::op1_op2_relation): Ditto.
24842 * range-op.h (range_operator): New prototypes.
24843 (range_op_handler): Ditto.
24845 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
24847 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
24848 Use identity relation.
24849 (gori_compute::compute_operand2_range): Ditto.
24850 * value-relation.cc (get_identity_relation): New.
24851 * value-relation.h (get_identity_relation): New prototype.
24853 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
24855 * value-range.h (Value_Range::set_varying): Set the type.
24856 (Value_Range::set_zero): Ditto.
24857 (Value_Range::set_nonzero): Ditto.
24859 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
24861 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
24864 2023-08-03 Pan Li <pan2.li@intel.com>
24866 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
24868 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
24870 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
24872 2023-08-03 Richard Biener <rguenther@suse.de>
24874 PR tree-optimization/110838
24875 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
24876 Adjust the shift operand of RSHIFT_EXPRs.
24878 2023-08-03 Richard Biener <rguenther@suse.de>
24880 PR tree-optimization/110702
24881 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
24882 we created a NULL pointer based access rewrite that to
24885 2023-08-03 Richard Biener <rguenther@suse.de>
24887 * tree-ssa-sink.cc: Include tree-ssa-live.h.
24888 (pass_sink_code::execute): Instantiate virtual_operand_live
24890 (sink_code_in_bb): Pass down virtual_operand_live.
24891 (statement_sink_location): Get virtual_operand_live and
24892 verify we are not sinking loads across stores by looking up
24893 the live virtual operand at the sink location.
24895 2023-08-03 Richard Biener <rguenther@suse.de>
24897 * tree-ssa-live.h (class virtual_operand_live): New.
24898 * tree-ssa-live.cc (virtual_operand_live::init): New.
24899 (virtual_operand_live::get_live_in): Likewise.
24900 (virtual_operand_live::get_live_out): Likewise.
24902 2023-08-03 Richard Biener <rguenther@suse.de>
24904 * passes.def: Exchange loop splitting and final value
24905 replacement passes.
24907 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
24909 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
24910 New function which handles bswap patterns for vec_perm_const.
24911 (vectorize_vec_perm_const_1): Call new function.
24912 * config/s390/vector.md (*bswap<mode>): Fix operands in output
24914 (*vstbr<mode>): New insn.
24916 2023-08-03 Alexandre Oliva <oliva@adacore.com>
24918 * config/vxworks-smp.opt: New. Introduce -msmp.
24919 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
24920 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
24921 lib_smp when -msmp is present in the command line.
24922 * doc/invoke.texi: Document it.
24924 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
24926 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
24927 when enabling -mno-omit-leaf-frame-pointer
24928 (riscv_option_override): Override omit-frame-pointer.
24929 (riscv_frame_pointer_required): Save s0 for non-leaf function
24930 (TARGET_FRAME_POINTER_REQUIRED): Override defination
24931 * config/riscv/riscv.opt: Add option support.
24933 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
24936 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
24937 place operand in a register before gen_<insn>64ti2_doubleword.
24938 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
24939 operand in a register before gen_<insn>32di2_doubleword.
24940 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
24941 (<any_rotate>64ti2_doubleword): Likewise.
24943 2023-08-03 Pan Li <pan2.li@intel.com>
24945 * config/riscv/riscv-vector-builtins-bases.cc
24946 (vfmul_frm_obj): New declaration.
24948 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
24949 * config/riscv/riscv-vector-builtins-functions.def
24950 (vfmul_frm): New function definition.
24951 * config/riscv/vector.md: Add vfmul to frm_mode.
24953 2023-08-03 Andrew Pinski <apinski@marvell.com>
24955 * match.pd (`~X & X`): Check that the types match.
24956 (`~x | x`, `~x ^ x`): Likewise.
24958 2023-08-03 Pan Li <pan2.li@intel.com>
24960 * config/riscv/riscv-vector-builtins-bases.h: Remove
24961 redudant declaration.
24963 2023-08-03 Pan Li <pan2.li@intel.com>
24965 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
24967 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
24968 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
24969 Add vfwsub function definitions.
24971 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
24973 PR rtl-optimization/110867
24974 * combine.cc (simplify_compare_const): Try the optimization only
24975 in case the constant fits into the comparison mode.
24977 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
24979 * config/riscv/zicond.md: Remove incorrect zicond patterns and
24980 renumber/rename them.
24981 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
24983 2023-08-02 Richard Biener <rguenther@suse.de>
24985 * tree-phinodes.h (add_phi_node_to_bb): Remove.
24986 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
24988 2023-08-02 Jan Beulich <jbeulich@suse.com>
24990 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
24991 two of the alternatives.
24993 2023-08-02 Richard Biener <rguenther@suse.de>
24995 PR tree-optimization/92335
24996 * tree-ssa-sink.cc (select_best_block): Before loop
24997 optimizations avoid sinking unconditional loads/stores
24998 in innermost loops to conditional executed places.
25000 2023-08-02 Andrew Pinski <apinski@marvell.com>
25002 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
25003 the comparison operands before comparing them.
25005 2023-08-02 Andrew Pinski <apinski@marvell.com>
25007 * match.pd (`~X & X`, `~X | X`): Move over to
25008 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
25009 handles that already.
25010 Remove range test simplifications to true/false as they
25011 are now handled by these patterns.
25013 2023-08-02 Andrew Pinski <apinski@marvell.com>
25015 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
25016 statement's lhs and rhs to check if trivial dead.
25017 Rename inserted_exprs to exprs_maybe_dce; also move it so
25018 bitmap is not allocated if not needed.
25020 2023-08-02 Pan Li <pan2.li@intel.com>
25022 * config/riscv/riscv-vector-builtins-bases.cc
25023 (class widen_binop_frm): New class for binop frm.
25024 (BASE): Add vfwadd_frm.
25025 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
25026 * config/riscv/riscv-vector-builtins-functions.def
25027 (vfwadd_frm): New function definition.
25028 * config/riscv/riscv-vector-builtins-shapes.cc
25029 (BASE_NAME_MAX_LEN): New macro.
25030 (struct alu_frm_def): Leverage new base class.
25031 (struct build_frm_base): New build base for frm.
25032 (struct widen_alu_frm_def): New struct for widen alu frm.
25033 (SHAPE): Add widen_alu_frm shape.
25034 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
25035 * config/riscv/vector.md (frm_mode): Add vfwalu type.
25037 2023-08-02 Jan Hubicka <jh@suse.cz>
25039 * cfgloop.h (loop_count_in): Declare.
25040 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
25041 (loop_count_in): Move here from ...
25042 * cfgloopmanip.cc (loop_count_in): ... here.
25043 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
25045 2023-08-02 Jan Hubicka <jh@suse.cz>
25047 * cfg.cc (scale_strictly_dominated_blocks): New function.
25048 * cfg.h (scale_strictly_dominated_blocks): Declare.
25049 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
25051 2023-08-02 Richard Biener <rguenther@suse.de>
25053 PR rtl-optimization/110587
25054 * lra-spills.cc (return_regno_p): Remove.
25055 (regno_in_use_p): Likewise.
25056 (lra_final_code_change): Do not remove noop moves
25057 between hard registers.
25059 2023-08-02 liuhongt <hongtao.liu@intel.com>
25062 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
25063 HFmode, use mode iterator VFH instead.
25064 (vec_fmsubadd<mode>4): Ditto.
25065 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
25066 Remove scalar mode from iterator, use VFH_AVX512VL instead.
25067 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
25070 2023-08-02 liuhongt <hongtao.liu@intel.com>
25072 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
25073 pre_reload define_insn_and_split.
25075 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
25077 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
25078 using Zicond to implement some conditional moves.
25080 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
25082 * config/riscv/zicond.md: Use the X iterator instead of ANYI
25083 on the comparison input operands.
25085 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
25087 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
25089 (case SET): For INSNs that just set a REG, take the cost from the
25091 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
25093 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
25095 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
25096 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
25097 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
25098 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
25099 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
25100 (OPTION_MASK_ISA_ABM_SET):
25101 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
25103 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
25105 * config/s390/s390.cc (s390_encode_section_info): Assume external
25106 symbols without explicit alignment to be unaligned if
25107 -munaligned-symbols has been specified.
25108 * config/s390/s390.opt (-munaligned-symbols): New option.
25110 2023-08-01 Richard Ball <richard.ball@arm.com>
25112 * gimple-fold.cc (fold_ctor_reference):
25113 Add support for poly_int.
25115 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
25118 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
25119 LABEL_NUSES of new conditional branch instruction.
25121 2023-08-01 Jan Hubicka <jh@suse.cz>
25123 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
25124 constant prologue peeling.
25126 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
25128 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
25130 2023-08-01 Pan Li <pan2.li@intel.com>
25131 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25133 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
25134 (STATIC_FRM_P): Ditto.
25135 (struct mode_switching_info): New struct for mode switching.
25136 (struct machine_function): Add new field mode switching.
25137 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
25138 (riscv_frm_adjust_mode_after_call): New function for call mode.
25139 (riscv_frm_emit_after_call_in_bb_end): New function for emit
25140 insn when call as the end of bb.
25141 (riscv_frm_mode_needed): New function for frm mode needed.
25142 (frm_unknown_dynamic_p): Remove call check.
25143 (riscv_mode_needed): Extrac function for frm.
25144 (riscv_frm_mode_after): Add DYN_CALL after.
25145 (riscv_mode_entry): Remove backup rtl initialization.
25146 * config/riscv/vector.md (frm_mode): Add dyn_call.
25147 (fsrmsi_restore_exit): Rename to _volatile.
25148 (fsrmsi_restore_volatile): Likewise.
25150 2023-08-01 Pan Li <pan2.li@intel.com>
25152 * config/riscv/riscv-vector-builtins-bases.cc
25153 (class reverse_binop_frm): Add new template for reversed frm.
25154 (vfsub_frm_obj): New obj.
25155 (vfrsub_frm_obj): Likewise.
25156 * config/riscv/riscv-vector-builtins-bases.h:
25157 (vfsub_frm): New declaration.
25158 (vfrsub_frm): Likewise.
25159 * config/riscv/riscv-vector-builtins-functions.def
25160 (vfsub_frm): New function define.
25161 (vfrsub_frm): Likewise.
25163 2023-08-01 Andrew Pinski <apinski@marvell.com>
25165 PR tree-optimization/93044
25166 * match.pd (nested int casts): A truncation (to the same size or smaller)
25167 can always remove the inner cast.
25169 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
25172 * doc/invoke.texi (-Wmissing-variable-declarations): Document
25175 2023-07-31 Andrew Pinski <apinski@marvell.com>
25177 PR tree-optimization/106164
25178 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
25179 `a == b | a < b`, `a == b | a > b`): Handle these cases
25182 2023-07-31 Andrew Pinski <apinski@marvell.com>
25184 PR tree-optimization/106164
25185 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
25186 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
25188 2023-07-31 Andrew Pinski <apinski@marvell.com>
25190 PR tree-optimization/100864
25191 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
25192 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
25193 (gimple_bitwise_inverted_equal_p): New function.
25194 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
25195 instead of direct matching bit_not.
25197 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
25200 * gcc-ar.cc (main): Expand argv and use
25201 temporary response file to call ar if any
25202 expansions were made.
25204 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
25206 PR tree-optimization/110582
25207 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
25208 range vector for non-ssa names.
25210 2023-07-31 David Malcolm <dmalcolm@redhat.com>
25213 * diagnostic-client-data-hooks.h (class sarif_object): New forward
25215 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
25217 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
25218 (class sarif_invocation): Inherit from sarif_object rather than
25220 (class sarif_result): Likewise.
25221 (class sarif_ice_notification): Likewise.
25222 (sarif_object::get_or_create_properties): New.
25223 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
25224 to call the context's add_sarif_invocation_properties hook.
25225 (sarif_builder::flush_to_file): Pass m_context to
25226 sarif_invocation::prepare_to_flush.
25227 * diagnostic-format-sarif.h: New header.
25228 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
25229 writes to stderr. Document that if SARIF diagnostic output is
25230 requested then any timing information is written in JSON form as
25231 part of the SARIF output, rather than to stderr.
25232 * timevar.cc: Include "json.h".
25233 (timer::named_items::m_hash_map): Split out type into...
25234 (timer::named_items::hash_map_t): ...this new typedef.
25235 (timer::named_items::make_json): New function.
25236 (timevar_diff): New function.
25237 (make_json_for_timevar_time_def): New function.
25238 (timer::timevar_def::make_json): New function.
25239 (timer::make_json): New function.
25240 * timevar.h (class json::value): New forward decl.
25241 (timer::make_json): New decl.
25242 (timer::timevar_def::make_json): New decl.
25243 * tree-diagnostic-client-data-hooks.cc: Include
25244 "diagnostic-format-sarif.h" and "timevar.h".
25245 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
25248 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
25250 * combine.cc (simplify_compare_const): Narrow comparison of
25251 memory and constant.
25252 (try_combine): Adapt new function signature.
25253 (simplify_comparison): Adapt new function signature.
25255 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
25257 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
25259 (expand_vector_init_insert_elems): Ditto.
25261 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
25264 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
25265 single_defuse_cycle while counting reduction_latency.
25267 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25269 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
25270 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
25271 (COND_ADD): Remove.
25276 (COND_RDIV): Ditto.
25279 (COND_FMIN): Ditto.
25280 (COND_FMAX): Ditto.
25288 (COND_FNMA): Ditto.
25289 (COND_FNMS): Ditto.
25291 (COND_LEN_ADD): Ditto.
25292 (COND_LEN_SUB): Ditto.
25293 (COND_LEN_MUL): Ditto.
25294 (COND_LEN_DIV): Ditto.
25295 (COND_LEN_MOD): Ditto.
25296 (COND_LEN_RDIV): Ditto.
25297 (COND_LEN_MIN): Ditto.
25298 (COND_LEN_MAX): Ditto.
25299 (COND_LEN_FMIN): Ditto.
25300 (COND_LEN_FMAX): Ditto.
25301 (COND_LEN_AND): Ditto.
25302 (COND_LEN_IOR): Ditto.
25303 (COND_LEN_XOR): Ditto.
25304 (COND_LEN_SHL): Ditto.
25305 (COND_LEN_SHR): Ditto.
25306 (COND_LEN_FMA): Ditto.
25307 (COND_LEN_FMS): Ditto.
25308 (COND_LEN_FNMA): Ditto.
25309 (COND_LEN_FNMS): Ditto.
25310 (COND_LEN_NEG): Ditto.
25311 (ADD): New macro define.
25332 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
25335 * config/i386/i386-features.cc (compute_convert_gain): Check
25336 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
25337 and V4SImode rotates in STV.
25338 (general_scalar_chain::convert_rotate): Likewise.
25340 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
25342 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
25343 * config/riscv/riscv-protos.h (get_mask_mode): Update return
25345 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
25347 (emit_vlmax_insn): Ditto.
25348 (emit_vlmax_fp_insn): Ditto.
25349 (emit_vlmax_ternary_insn): Ditto.
25350 (emit_vlmax_fp_ternary_insn): Ditto.
25351 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
25352 (emit_nonvlmax_insn): Ditto.
25353 (emit_vlmax_slide_insn): Ditto.
25354 (emit_nonvlmax_slide_tu_insn): Ditto.
25355 (emit_vlmax_merge_insn): Ditto.
25356 (emit_vlmax_masked_insn): Ditto.
25357 (emit_nonvlmax_masked_insn): Ditto.
25358 (emit_vlmax_masked_store_insn): Ditto.
25359 (emit_nonvlmax_masked_store_insn): Ditto.
25360 (emit_vlmax_masked_mu_insn): Ditto.
25361 (emit_nonvlmax_tu_insn): Ditto.
25362 (emit_nonvlmax_fp_tu_insn): Ditto.
25363 (emit_scalar_move_insn): Ditto.
25364 (emit_vlmax_compress_insn): Ditto.
25365 (emit_vlmax_reduction_insn): Ditto.
25366 (emit_vlmax_fp_reduction_insn): Ditto.
25367 (emit_nonvlmax_fp_reduction_insn): Ditto.
25368 (expand_vec_series): Ditto.
25369 (expand_vector_init_merge_repeating_sequence): Ditto.
25370 (expand_vec_perm): Ditto.
25371 (shuffle_merge_patterns): Ditto.
25372 (shuffle_compress_patterns): Ditto.
25373 (shuffle_decompress_patterns): Ditto.
25374 (expand_reduction): Ditto.
25375 (get_mask_mode): Update return type.
25376 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
25377 is valid, and use new get_mask_mode interface.
25379 2023-07-31 Pan Li <pan2.li@intel.com>
25381 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
25382 Move rm suffix before mask.
25384 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25386 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
25387 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
25390 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
25393 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
25394 (extzv<mode>): Likewise.
25395 (insv<mode>): Likewise.
25396 (*testqi_ext_3): Likewise.
25397 (*btr<mode>_2): Likewise.
25398 (define_split): Likewise.
25399 (*btsq_imm): Likewise.
25400 (*btrq_imm): Likewise.
25401 (*btcq_imm): Likewise.
25402 (define_peephole2 x3): Likewise.
25403 (*bt<mode>): Likewise
25404 (*bt<mode>_mask): New define_insn_and_split.
25405 (*jcc_bt<mode>): Use QImode for offsets.
25406 (*jcc_bt<mode>_1): Delete obsolete pattern.
25407 (*jcc_bt<mode>_mask): Use QImode offsets.
25408 (*jcc_bt<mode>_mask_1): Likewise.
25409 (define_split): Likewise.
25410 (*bt<mode>_setcqi): Likewise.
25411 (*bt<mode>_setncqi): Likewise.
25412 (*bt<mode>_setnc<mode>): Likewise.
25413 (*bt<mode>_setncqi_2): Likewise.
25414 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
25415 (bmi2_bzhi_<mode>3): Use QImode offsets.
25416 (*bmi2_bzhi_<mode>3): Likewise.
25417 (*bmi2_bzhi_<mode>3_1): Likewise.
25418 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
25419 (@tbm_bextri_<mode>): Likewise.
25421 2023-07-29 Jan Hubicka <jh@suse.cz>
25423 * profile-count.cc (profile_probability::sqrt): New member function.
25424 (profile_probability::pow): Likewise.
25425 * profile-count.h: (profile_probability::sqrt): Declare
25426 (profile_probability::pow): Likewise.
25427 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
25429 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
25431 * gimple-range-cache.cc (ssa_cache::merge_range): New.
25432 (ssa_lazy_cache::merge_range): New.
25433 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
25434 (class ssa_lazy_cache): Ditto.
25435 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
25437 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
25439 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
25440 Move from value-query.cc.
25441 (substitute_and_fold_engine::value_of_stmt): Ditto.
25442 (substitute_and_fold_engine::range_of_expr): New.
25443 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
25444 range_query. New prototypes.
25445 * value-query.cc (value_query::value_on_edge): Relocate.
25446 (value_query::value_of_stmt): Ditto.
25447 * value-query.h (class value_query): Remove.
25448 (class range_query): Remove base class. Adjust prototypes.
25450 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
25452 PR tree-optimization/110205
25453 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
25454 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
25455 Add final override.
25456 * range-op.cc (operator_lshift): Add missing final overrides.
25457 (operator_rshift): Ditto.
25459 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
25461 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
25462 optimizations in BPF target.
25464 2023-07-28 Honza <jh@ryzen4.suse.cz>
25466 * cfgloopmanip.cc (loop_count_in): Break out from ...
25467 (loop_exit_for_scaling): Break out from ...
25468 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
25469 add more sanity check and debug info.
25470 (scale_loop_profile): ... here.
25471 (create_empty_loop_on_edge): Fix whitespac.
25472 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
25473 * loop-unroll.cc (unroll_loop_constant_iterations): Use
25474 update_loop_exit_probability_scale_dom_bbs.
25475 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
25476 (tree_transform_and_unroll_loop): Use
25477 update_loop_exit_probability_scale_dom_bbs.
25478 * tree-ssa-loop-split.cc (split_loop): Use
25479 update_loop_exit_probability_scale_dom_bbs.
25481 2023-07-28 Jan Hubicka <jh@suse.cz>
25483 PR middle-end/77689
25484 * tree-ssa-loop-split.cc: Include value-query.h.
25485 (split_at_bb_p): Analyze cases where EQ/NE can be turned
25486 into LT/LE/GT/GE; return updated guard code.
25487 (split_loop): Use guard code.
25489 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
25490 Richard Biener <rguenther@suse.de>
25492 PR middle-end/28071
25493 PR rtl-optimization/110587
25494 * expr.cc (emit_group_load_1): Simplify logic for calling
25495 force_reg on ORIG_SRC, to avoid making a copy if the source
25496 is already in a pseudo register.
25498 2023-07-28 Jan Hubicka <jh@suse.cz>
25500 PR middle-end/106923
25501 * tree-ssa-loop-split.cc (connect_loops): Change probability
25502 of the test preconditioning second loop to very_likely.
25503 (fix_loop_bb_probability): Handle correctly case where
25504 on of the arms of the conditional is empty.
25505 (split_loop): Fold the test guarding first condition to
25506 see if it is constant true; Set correct entry block
25507 probabilities of the split loops; determine correct loop
25508 eixt probabilities.
25510 2023-07-28 xuli <xuli1@eswincomputing.com>
25512 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
25513 vsadd[u] and vssub[u].
25514 * config/riscv/vector.md: Ditto.
25516 2023-07-28 Jan Hubicka <jh@suse.cz>
25518 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
25519 loops when IV test is not overflowing.
25521 2023-07-28 liuhongt <hongtao.liu@intel.com>
25524 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
25526 (avx512cd_maskw_vec_dup<mode>): Ditto.
25528 2023-07-27 David Faust <david.faust@oracle.com>
25532 * config/bpf/bpf.opt (msmov): New option.
25533 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
25534 * config/bpf/bpf.md (*extendsidi2): New.
25535 (extendhidi2): New.
25536 (extendqidi2): New.
25537 (extendsisi2): New.
25538 (extendhisi2): New.
25539 (extendqisi2): New.
25540 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
25541 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
25542 also enables -msmov.
25544 2023-07-27 David Faust <david.faust@oracle.com>
25546 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
25547 Add -mbswap and -msdiv eBPF options.
25548 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
25549 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
25552 2023-07-27 David Faust <david.faust@oracle.com>
25554 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
25555 in pseudo-C dialect output template.
25556 (sub<AM:mode>3): Likewise.
25558 2023-07-27 Jan Hubicka <jh@suse.cz>
25560 * tree-vect-loop.cc (optimize_mask_stores): Make store
25563 2023-07-27 Jan Hubicka <jh@suse.cz>
25565 * cfgloop.h (single_dom_exit): Declare.
25566 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
25567 * cfgrtl.cc (struct cfg_hooks): Fix comment.
25568 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
25569 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
25570 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
25572 (tree_transform_and_unroll_loop): ... here;
25574 2023-07-27 Jan Hubicka <jh@suse.cz>
25576 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
25577 tree-ssa-loop-manip.cc and avoid recursion.
25578 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
25579 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
25581 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
25582 (scale_dominated_blocks_in_loop): Declare.
25583 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
25584 (change_edge_frequency): Remove.
25585 * predict.h (change_edge_frequency): Remove.
25586 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
25588 (niter_for_unrolled_loop): Remove.
25589 (tree_transform_and_unroll_loop): Fix profile update.
25591 2023-07-27 Jan Hubicka <jh@suse.cz>
25593 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
25594 to guessed; fix count of new_bb.
25596 2023-07-27 Jan Hubicka <jh@suse.cz>
25598 * profile-count.h (profile_count::apply_probability): Fix
25599 handling of uninitialized probabilities, optimize scaling
25602 2023-07-27 Richard Biener <rguenther@suse.de>
25604 PR tree-optimization/91838
25605 * gimple-match-head.cc: Include attribs.h and asan.h.
25606 * generic-match-head.cc: Likewise.
25607 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
25609 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25611 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
25612 (ADJUST_ALIGNMENT): Ditto.
25613 (ADJUST_PRECISION): Ditto.
25614 (VLS_MODES): Ditto.
25615 (VECTOR_MODE_WITH_PREFIX): Ditto.
25616 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
25617 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
25618 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
25619 (legitimize_move): Enable basic VLS modes support.
25620 (get_vlmul): Ditto.
25621 (get_ratio): Ditto.
25622 (get_vector_mode): Ditto.
25623 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
25624 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
25625 (VLS_ENTRY): New macro.
25626 (riscv_v_ext_mode_p): Add vls modes.
25627 (riscv_get_v_regno_alignment): New function.
25628 (riscv_print_operand): Add vls modes.
25629 (riscv_hard_regno_nregs): Ditto.
25630 (riscv_hard_regno_mode_ok): Ditto.
25631 (riscv_regmode_natural_size): Ditto.
25632 (riscv_vectorize_preferred_vector_alignment): Ditto.
25633 * config/riscv/riscv.md: Ditto.
25634 * config/riscv/vector-iterators.md: Ditto.
25635 * config/riscv/vector.md: Ditto.
25636 * config/riscv/autovec-vls.md: New file.
25638 2023-07-27 Pan Li <pan2.li@intel.com>
25640 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
25641 (vread_csr): Ditto.
25642 (vwrite_csr): Ditto.
25644 2023-07-27 demin.han <demin.han@starfivetech.com>
25646 * config/riscv/autovec.md: Delete which_alternative use in split
25648 2023-07-27 Richard Biener <rguenther@suse.de>
25650 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
25652 (pass_sink_code::execute): ... in the caller.
25654 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
25655 Richard Biener <rguenther@suse.de>
25657 PR tree-optimization/110776
25658 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
25661 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
25663 * config/riscv/riscv.md: Include zicond.md
25664 * config/riscv/zicond.md: New file.
25666 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
25668 * common/config/riscv/riscv-common.cc: New extension.
25669 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
25670 (TARGET_ZICOND): New target.
25672 2023-07-26 Carl Love <cel@us.ibm.com>
25674 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
25675 specifies the number of built-in arguments to check.
25676 (altivec_resolve_overloaded_builtin): Update calls to find_instance
25677 to pass the number of built-in arguments to be checked.
25679 2023-07-26 David Faust <david.faust@oracle.com>
25681 * config/bpf/bpf.opt (mv3-atomics): New option.
25682 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
25683 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
25684 (REG_CLASS_NAMES): Likewise.
25685 (REG_CLASS_CONTENTS): Likewise.
25686 (REGNO_REG_CLASS): Handle R0.
25687 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
25688 (UNSPEC_AAND): New unspec.
25689 (UNSPEC_AOR): Likewise.
25690 (UNSPEC_AXOR): Likewise.
25691 (UNSPEC_AFADD): Likewise.
25692 (UNSPEC_AFAND): Likewise.
25693 (UNSPEC_AFOR): Likewise.
25694 (UNSPEC_AFXOR): Likewise.
25695 (UNSPEC_AXCHG): Likewise.
25696 (UNSPEC_ACMPX): Likewise.
25697 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
25699 * config/bpf/atomic.md: ...Here. New file.
25700 * config/bpf/constraints.md (t): New constraint for R0.
25701 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
25703 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
25705 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
25708 2023-07-26 Carl Love <cel@us.ibm.com>
25710 * config/rs6000/rs6000-builtins.def: Rename
25711 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
25712 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
25713 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
25714 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
25715 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
25716 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
25717 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
25718 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
25719 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
25720 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
25721 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
25722 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
25723 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
25724 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
25725 * config/rs6000/rs6000-c.cc (find_instance): Add case
25726 RS6000_OVLD_VEC_REPLACE_UN.
25727 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
25728 Fix first argument type. Rename VREPLACE_UN_UV4SI as
25729 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
25730 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
25731 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
25732 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
25733 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
25734 REPLACE_ELT_V for vector modes.
25735 (REPLACE_ELT): New scalar mode iterator.
25736 (REPLACE_ELT_char): Add scalar attributes.
25737 (vreplace_un_<mode>): Change iterator and mode attribute.
25739 2023-07-26 David Malcolm <dmalcolm@redhat.com>
25742 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
25744 2023-07-26 Richard Biener <rguenther@suse.de>
25746 PR tree-optimization/106081
25747 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
25748 Assign layout -1 to splats.
25750 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
25752 * range-op-mixed.h (class operator_cast): Add update_bitmask.
25753 * range-op.cc (operator_cast::update_bitmask): New.
25754 (operator_cast::fold_range): Call update_bitmask.
25756 2023-07-26 Li Xu <xuli1@eswincomputing.com>
25758 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
25759 scalar type to float16, eliminate warning.
25760 (vfloat16mf4x3_t): Ditto.
25761 (vfloat16mf4x4_t): Ditto.
25762 (vfloat16mf4x5_t): Ditto.
25763 (vfloat16mf4x6_t): Ditto.
25764 (vfloat16mf4x7_t): Ditto.
25765 (vfloat16mf4x8_t): Ditto.
25766 (vfloat16mf2x2_t): Ditto.
25767 (vfloat16mf2x3_t): Ditto.
25768 (vfloat16mf2x4_t): Ditto.
25769 (vfloat16mf2x5_t): Ditto.
25770 (vfloat16mf2x6_t): Ditto.
25771 (vfloat16mf2x7_t): Ditto.
25772 (vfloat16mf2x8_t): Ditto.
25773 (vfloat16m1x2_t): Ditto.
25774 (vfloat16m1x3_t): Ditto.
25775 (vfloat16m1x4_t): Ditto.
25776 (vfloat16m1x5_t): Ditto.
25777 (vfloat16m1x6_t): Ditto.
25778 (vfloat16m1x7_t): Ditto.
25779 (vfloat16m1x8_t): Ditto.
25780 (vfloat16m2x2_t): Ditto.
25781 (vfloat16m2x3_t): Ditto.
25782 (vfloat16m2x4_t): Ditto.
25783 (vfloat16m4x2_t): Ditto.
25784 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
25785 * config/riscv/vector.md: add tuple mode in attr sew.
25787 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
25790 * config/i386/i386.md (plusminusmult): New code iterator.
25791 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
25792 (movq_<mode>_to_sse): New expander.
25793 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
25794 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
25795 as a wrapper around V4SFmode operation.
25796 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
25797 nonimmediate_operand.
25798 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
25799 operand 2 predicates to nonimmediate_operand.
25800 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
25801 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
25802 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
25803 operand 2 predicates to nonimmediate_operand.
25804 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
25805 nonimmediate_operand.
25806 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
25807 operand 2 predicates to nonimmediate_operand.
25808 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
25809 (<smaxmin:code>v2sf3): Ditto.
25810 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
25811 predicates to nonimmediate_operand.
25812 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
25813 operand 1 and operand 2 predicates to nonimmediate_operand.
25814 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
25815 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
25816 (*mmx_haddv2sf3_low): Ditto.
25817 (*mmx_hsubv2sf3_low): Ditto.
25818 (vec_addsubv2sf3): Ditto.
25819 (*mmx_maskcmpv2sf3_comm): Remove.
25820 (*mmx_maskcmpv2sf3): Remove.
25821 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
25822 (vcond<V2FI:mode>v2sf): Ditto.
25825 (fnmav2sf4): Ditto.
25826 (fnmsv2sf4): Ditto.
25827 (fix_truncv2sfv2si2): Ditto.
25828 (fixuns_truncv2sfv2si2): Ditto.
25829 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
25830 Change operand 1 predicate to nonimmediate_operand.
25831 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
25832 (floatunsv2siv2sf2): Ditto.
25833 (mmx_floatv2siv2sf2): Remove SSE alternatives.
25834 Change operand 1 predicate to nonimmediate_operand.
25835 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
25836 (rintv2sf2): Ditto.
25837 (lrintv2sfv2si2): Ditto.
25838 (ceilv2sf2): Ditto.
25839 (lceilv2sfv2si2): Ditto.
25840 (floorv2sf2): Ditto.
25841 (lfloorv2sfv2si2): Ditto.
25842 (btruncv2sf2): Ditto.
25843 (roundv2sf2): Ditto.
25844 (lroundv2sfv2si2): Ditto.
25845 (*mmx_roundv2sf2): Remove.
25847 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
25849 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
25851 2023-07-26 Richard Biener <rguenther@suse.de>
25853 PR tree-optimization/110799
25854 * tree-ssa-pre.cc (compute_avail): More thoroughly match
25855 up TBAA behavior of redundant loads.
25857 2023-07-26 Jakub Jelinek <jakub@redhat.com>
25859 PR tree-optimization/110755
25860 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
25861 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
25862 it is exact op1 + (-op1) or op1 - op1.
25864 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
25867 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
25868 operands output with "x".
25870 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
25872 * range-op.cc (class operator_absu): Add update_bitmask.
25873 (operator_absu::update_bitmask): New.
25875 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
25877 * range-op-mixed.h (class operator_abs): Add update_bitmask.
25878 * range-op.cc (operator_abs::update_bitmask): New.
25880 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
25882 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
25883 * range-op.cc (operator_bitwise_not::update_bitmask): New.
25885 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
25887 * range-op.cc (update_known_bitmask): Handle unary operators.
25889 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
25891 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
25893 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
25895 * config/riscv/riscv.md: Likewise.
25897 2023-07-26 Jan Hubicka <jh@suse.cz>
25899 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
25900 if we divide by zero.
25902 2023-07-25 David Faust <david.faust@oracle.com>
25904 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
25905 enclosing parentheses for pseudo-C dialect.
25906 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
25907 operands of pseudo-C dialect output templates where needed.
25908 (zero_extendqidi2): Likewise.
25909 (zero_extendsidi2): Likewise.
25910 (*mov<MM:mode>): Likewise.
25912 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
25914 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
25915 (bit_value_mult_const): Same.
25916 (get_individual_bits): Same.
25918 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
25921 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
25922 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
25923 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
25924 (minmax_op): New int attribute.
25925 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
25926 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
25927 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
25928 pattern to fmaxdf3.
25929 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
25931 2023-07-24 David Faust <david.faust@oracle.com>
25933 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
25935 2023-07-24 Drew Ross <drross@redhat.com>
25936 Jakub Jelinek <jakub@redhat.com>
25938 PR middle-end/109986
25939 * generic-match-head.cc (bitwise_equal_p): New macro.
25940 * gimple-match-head.cc (bitwise_equal_p): New macro.
25941 (gimple_nop_convert): Declare.
25942 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
25943 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
25945 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
25947 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
25948 single quote rather than backquote in diagnostic.
25950 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
25953 * config/bpf/bpf.opt: New command-line option -msdiv.
25954 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
25955 * config/bpf/bpf.cc (bpf_option_override): Initialize
25957 * doc/invoke.texi (eBPF Options): Document -msdiv.
25959 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
25961 * config/riscv/riscv.cc (riscv_option_override): Spell out
25962 greater than and use cannot in diagnostic string.
25964 2023-07-24 Richard Biener <rguenther@suse.de>
25966 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
25967 (_slp_tree::vec_stmts): Remove.
25968 (SLP_TREE_VEC_STMTS): Remove.
25969 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
25970 (_slp_tree::_slp_tree): Adjust.
25971 (_slp_tree::~_slp_tree): Likewise.
25972 (vect_get_slp_vect_def): Simplify.
25973 (vect_get_slp_defs): Likewise.
25974 (vect_transform_slp_perm_load_1): Adjust.
25975 (vect_add_slp_permutation): Likewise.
25976 (vect_schedule_slp_node): Likewise.
25977 (vectorize_slp_instance_root_stmt): Likewise.
25978 (vect_schedule_scc): Likewise.
25979 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
25980 (vectorizable_call): Likewise.
25981 (vectorizable_call): Likewise.
25982 (vect_create_vectorized_demotion_stmts): Likewise.
25983 (vectorizable_conversion): Likewise.
25984 (vectorizable_assignment): Likewise.
25985 (vectorizable_shift): Likewise.
25986 (vectorizable_operation): Likewise.
25987 (vectorizable_load): Likewise.
25988 (vectorizable_condition): Likewise.
25989 (vectorizable_comparison): Likewise.
25990 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
25991 (vectorize_fold_left_reduction): Use push_vec_def.
25992 (vect_transform_reduction): Likewise.
25993 (vect_transform_cycle_phi): Likewise.
25994 (vectorizable_lc_phi): Likewise.
25995 (vectorizable_phi): Likewise.
25996 (vectorizable_recurr): Likewise.
25997 (vectorizable_induction): Likewise.
25998 (vectorizable_live_operation): Likewise.
26000 2023-07-24 Richard Biener <rguenther@suse.de>
26002 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
26004 2023-07-24 Richard Biener <rguenther@suse.de>
26006 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
26007 * config/i386/i386-expand.cc: Likewise.
26008 * config/i386/i386-features.cc: Likewise.
26009 * config/i386/i386-options.cc: Likewise.
26011 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
26013 * tree-vect-stmts.cc (vectorizable_conversion): Handle
26014 more demotion/promotion for modifier == NONE.
26016 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
26021 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
26022 (extzv<mode>): Likewise.
26023 (insv<mode>): Likewise.
26024 (*testqi_ext_3): Likewise.
26025 (*btr<mode>_2): Likewise.
26026 (define_split): Likewise.
26027 (*btsq_imm): Likewise.
26028 (*btrq_imm): Likewise.
26029 (*btcq_imm): Likewise.
26030 (define_peephole2 x3): Likewise.
26031 (*bt<mode>): Likewise
26032 (*bt<mode>_mask): New define_insn_and_split.
26033 (*jcc_bt<mode>): Use QImode for offsets.
26034 (*jcc_bt<mode>_1): Delete obsolete pattern.
26035 (*jcc_bt<mode>_mask): Use QImode offsets.
26036 (*jcc_bt<mode>_mask_1): Likewise.
26037 (define_split): Likewise.
26038 (*bt<mode>_setcqi): Likewise.
26039 (*bt<mode>_setncqi): Likewise.
26040 (*bt<mode>_setnc<mode>): Likewise.
26041 (*bt<mode>_setncqi_2): Likewise.
26042 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
26043 (bmi2_bzhi_<mode>3): Use QImode offsets.
26044 (*bmi2_bzhi_<mode>3): Likewise.
26045 (*bmi2_bzhi_<mode>3_1): Likewise.
26046 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
26047 (@tbm_bextri_<mode>): Likewise.
26049 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
26051 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
26052 * config/bpf/bpf.opt (mkernel): Remove option.
26053 * config/bpf/bpf.cc (bpf_target_macros): Do not define
26054 BPF_KERNEL_VERSION_CODE.
26056 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
26059 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
26060 (mbswap): New option.
26061 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
26062 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
26063 * config/bpf/bpf.md: Use bswap instructions if available for
26064 bswap* insn, and fix constraint.
26065 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
26067 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26069 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
26070 (mask_len_fold_left_plus_<mode>): Ditto.
26071 * config/riscv/riscv-protos.h (enum insn_type): New enum.
26072 (enum reduction_type): Ditto.
26073 (expand_reduction): Add in-order reduction.
26074 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
26075 (expand_reduction): Add in-order reduction.
26077 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26079 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
26080 (vectorize_fold_left_reduction): Ditto.
26081 (vectorizable_reduction): Ditto.
26082 (vect_transform_reduction): Ditto.
26084 2023-07-24 Richard Biener <rguenther@suse.de>
26086 PR tree-optimization/110777
26087 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
26088 Avoid propagating abnormals.
26090 2023-07-24 Richard Biener <rguenther@suse.de>
26092 PR tree-optimization/110766
26093 * tree-scalar-evolution.cc
26094 (analyze_and_compute_bitwise_induction_effect): Check the PHI
26095 is defined in the loop header.
26097 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
26099 PR tree-optimization/110740
26100 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
26101 loop with a single scalar iteration.
26103 2023-07-24 Pan Li <pan2.li@intel.com>
26105 * config/riscv/riscv-vector-builtins-shapes.cc
26106 (struct alu_frm_def): Take range check.
26108 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
26111 * config/riscv/predicates.md (const_0_operand): Add back
26114 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
26116 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
26117 64-bit insertions into TImode optimizations with -O0, unless
26118 the function has the "naked" attribute (for PR target/110533).
26120 2023-07-22 Andrew Pinski <apinski@marvell.com>
26123 * rtl.h (extended_count): Change last argument type
26126 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
26128 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
26129 (extzv<mode>): Likewise.
26130 (insv<mode>): Likewise.
26131 (*testqi_ext_3): Likewise.
26132 (*btr<mode>_2): Likewise.
26133 (define_split): Likewise.
26134 (*btsq_imm): Likewise.
26135 (*btrq_imm): Likewise.
26136 (*btcq_imm): Likewise.
26137 (define_peephole2 x3): Likewise.
26138 (*bt<mode>): Likewise
26139 (*bt<mode>_mask): New define_insn_and_split.
26140 (*jcc_bt<mode>): Use QImode for offsets.
26141 (*jcc_bt<mode>_1): Delete obsolete pattern.
26142 (*jcc_bt<mode>_mask): Use QImode offsets.
26143 (*jcc_bt<mode>_mask_1): Likewise.
26144 (define_split): Likewise.
26145 (*bt<mode>_setcqi): Likewise.
26146 (*bt<mode>_setncqi): Likewise.
26147 (*bt<mode>_setnc<mode>): Likewise.
26148 (*bt<mode>_setncqi_2): Likewise.
26149 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
26150 (bmi2_bzhi_<mode>3): Use QImode offsets.
26151 (*bmi2_bzhi_<mode>3): Likewise.
26152 (*bmi2_bzhi_<mode>3_1): Likewise.
26153 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
26154 (@tbm_bextri_<mode>): Likewise.
26156 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
26158 * config/bfin/bfin.md (ones): Fix length computation.
26160 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
26162 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
26163 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
26164 instead of FRAME_POINTER_REGNUM to spill pseudos.
26166 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
26167 Richard Biener <rguenther@suse.de>
26170 * gimplify.cc (gimplify_compound_lval): If the array's type
26171 is error_mark_node then return GS_ERROR.
26173 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
26176 * config/bpf/bpf.opt: Added option -masm=<dialect>.
26177 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
26178 * config/bpf/bpf.cc (bpf_print_register): New function.
26179 (bpf_print_register): Support pseudo-c syntax for registers.
26180 (bpf_print_operand_address): Likewise.
26181 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
26182 (ASSEMBLER_DIALECT): Define.
26183 * config/bpf/bpf.md: Added pseudo-c templates.
26184 * doc/invoke.texi (-masm=): New eBPF option item.
26186 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
26188 * config/bpf/bpf.md: fixed template for neg instruction.
26190 2023-07-21 Jan Hubicka <jh@suse.cz>
26193 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
26194 profiles by vectorization factor.
26195 (vect_transform_loop): Check for flat profiles.
26197 2023-07-21 Jan Hubicka <jh@suse.cz>
26199 * cfgloop.h (maybe_flat_loop_profile): Declare
26200 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
26201 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
26203 2023-07-21 Jan Hubicka <jh@suse.cz>
26205 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
26206 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
26207 * predict.cc (estimate_bb_frequencies): Likewise.
26208 * profile.cc (branch_prob): Likewise.
26209 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
26211 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
26213 * config.in: Regenerate.
26214 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
26215 (LINK_COMMAND_SPEC_A): Add demangle handling.
26216 * configure: Regenerate.
26217 * configure.ac: Detect linker support for '-demangle'.
26219 2023-07-21 Jan Hubicka <jh@suse.cz>
26221 * sreal.cc (sreal::to_nearest_int): New.
26222 (sreal_verify_basics): Verify also to_nearest_int.
26223 (verify_aritmetics): Likewise.
26224 (sreal_verify_conversions): New.
26225 (sreal_cc_tests): Call sreal_verify_conversions.
26226 * sreal.h: (sreal::to_nearest_int): Declare
26228 2023-07-21 Jan Hubicka <jh@suse.cz>
26230 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
26231 (should_duplicate_loop_header_p): Return info on profitability.
26232 (do_while_loop_p): Watch for constant conditionals.
26233 (update_profile_after_ch): Do not sanity check that all
26234 static exits are taken.
26235 (ch_base::copy_headers): Run on all loops.
26236 (pass_ch::process_loop_p): Improve heuristics by handling also
26237 do_while loop and duplicating shortest sequence containing all
26240 2023-07-21 Jan Hubicka <jh@suse.cz>
26242 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
26243 tests first; update finite_p flag.
26245 2023-07-21 Jan Hubicka <jh@suse.cz>
26247 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
26248 * cfgloop.h (print_loop_info): Declare.
26249 * tree-cfg.cc (print_loop_info): Break out from ...; add
26250 printing of missing fields and profile
26251 (print_loop): ... here.
26253 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26255 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
26257 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26259 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
26260 (vectorizable_operation): Ditto.
26262 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26264 * config/riscv/autovec.md: Align order of mask and len.
26265 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
26266 (expand_gather_scatter): Ditto.
26267 * doc/md.texi: Ditto.
26268 * internal-fn.cc (add_len_and_mask_args): Ditto.
26269 (add_mask_and_len_args): Ditto.
26270 (expand_partial_load_optab_fn): Ditto.
26271 (expand_partial_store_optab_fn): Ditto.
26272 (expand_scatter_store_optab_fn): Ditto.
26273 (expand_gather_load_optab_fn): Ditto.
26274 (internal_fn_len_index): Ditto.
26275 (internal_fn_mask_index): Ditto.
26276 (internal_len_load_store_bias): Ditto.
26277 * tree-vect-stmts.cc (vectorizable_store): Ditto.
26278 (vectorizable_load): Ditto.
26280 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26282 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
26283 (mask_len_load<mode><vm>): Ditto.
26284 (len_maskstore<mode><vm>): Ditto.
26285 (mask_len_store<mode><vm>): Ditto.
26286 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
26287 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
26288 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
26289 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
26290 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
26291 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
26292 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
26293 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
26294 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
26295 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
26296 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
26297 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
26298 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
26299 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
26300 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
26301 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
26302 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
26303 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
26304 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
26305 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
26306 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
26307 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
26308 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
26309 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
26310 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
26311 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
26312 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
26313 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
26314 * doc/md.texi: Ditto.
26315 * genopinit.cc (main): Ditto.
26316 (CMP_NAME): Ditto. Ditto.
26317 * gimple-fold.cc (arith_overflowed_p): Ditto.
26318 (gimple_fold_partial_load_store_mem_ref): Ditto.
26319 (gimple_fold_call): Ditto.
26320 * internal-fn.cc (len_maskload_direct): Ditto.
26321 (mask_len_load_direct): Ditto.
26322 (len_maskstore_direct): Ditto.
26323 (mask_len_store_direct): Ditto.
26324 (expand_call_mem_ref): Ditto.
26325 (expand_len_maskload_optab_fn): Ditto.
26326 (expand_mask_len_load_optab_fn): Ditto.
26327 (expand_len_maskstore_optab_fn): Ditto.
26328 (expand_mask_len_store_optab_fn): Ditto.
26329 (direct_len_maskload_optab_supported_p): Ditto.
26330 (direct_mask_len_load_optab_supported_p): Ditto.
26331 (direct_len_maskstore_optab_supported_p): Ditto.
26332 (direct_mask_len_store_optab_supported_p): Ditto.
26333 (internal_load_fn_p): Ditto.
26334 (internal_store_fn_p): Ditto.
26335 (internal_gather_scatter_fn_p): Ditto.
26336 (internal_fn_len_index): Ditto.
26337 (internal_fn_mask_index): Ditto.
26338 (internal_fn_stored_value_index): Ditto.
26339 (internal_len_load_store_bias): Ditto.
26340 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
26341 (MASK_LEN_GATHER_LOAD): Ditto.
26342 (LEN_MASK_LOAD): Ditto.
26343 (MASK_LEN_LOAD): Ditto.
26344 (LEN_MASK_SCATTER_STORE): Ditto.
26345 (MASK_LEN_SCATTER_STORE): Ditto.
26346 (LEN_MASK_STORE): Ditto.
26347 (MASK_LEN_STORE): Ditto.
26348 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
26349 (supports_vec_scatter_store_p): Ditto.
26350 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
26351 (target_supports_len_load_store_p): Ditto.
26352 * optabs.def (OPTAB_CD): Ditto.
26353 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
26354 (call_may_clobber_ref_p_1): Ditto.
26355 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
26356 (dse_optimize_stmt): Ditto.
26357 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
26358 (get_alias_ptr_type_for_ptr_address): Ditto.
26359 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
26360 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
26361 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
26362 (vect_get_strided_load_store_ops): Ditto.
26363 (vectorizable_store): Ditto.
26364 (vectorizable_load): Ditto.
26366 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
26368 * config/i386/i386.opt: Fix a typo.
26370 2023-07-21 Richard Biener <rguenther@suse.de>
26372 PR tree-optimization/88540
26373 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
26374 with NaNs but handle the simple case by if-converting to a
26377 2023-07-21 Andrew Pinski <apinski@marvell.com>
26379 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
26382 2023-07-21 Richard Biener <rguenther@suse.de>
26384 PR tree-optimization/110742
26385 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
26386 Do not materialize an edge permutation in an external node with
26388 (vect_slp_analyze_node_operations_1): Guard purely internal
26391 2023-07-21 Jan Hubicka <jh@suse.cz>
26393 * cfgloop.cc: Include sreal.h.
26394 (flow_loop_dump): Dump sreal iteration exsitmate.
26395 (get_estimated_loop_iterations): Update.
26396 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
26397 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
26398 (expected_loop_iterations_unbounded): Use new API.
26399 * cfgloopmanip.cc (scale_loop_profile): Use
26400 expected_loop_iterations_by_profile
26401 * predict.cc (pass_profile::execute): Likewise.
26402 * profile.cc (branch_prob): Likewise.
26403 * tree-ssa-loop-niter.cc: Include sreal.h.
26404 (estimate_numbers_of_iterations): Likewise
26406 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
26408 PR tree-optimization/110744
26409 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
26410 operand for ifn IFN_LEN_STORE.
26412 2023-07-21 liuhongt <hongtao.liu@intel.com>
26415 * common.opt: (fcf-protection=): Add EnumSet attribute to
26416 support combination of params.
26418 2023-07-21 David Malcolm <dmalcolm@redhat.com>
26420 PR middle-end/110612
26421 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
26423 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
26424 (table_geometry::table_y_to_canvas_y): Likewise.
26425 * text-art/table.h (table_geometry::m_table): Drop unused field.
26426 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
26429 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
26432 * config/i386/i386-features.cc
26433 (general_scalar_chain::compute_convert_gain): Calculate gain
26434 for extend higpart case.
26435 (general_scalar_chain::convert_op): Handle
26436 ASHIFTRT/ASHIFT combined RTX.
26437 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
26438 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
26439 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
26440 New define_insn_and_split pattern.
26441 (*extendv2di2_highpart_stv): Ditto.
26443 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
26445 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
26448 2023-07-20 Andrew Pinski <apinski@marvell.com>
26450 * combine.cc (dump_combine_stats): Remove.
26451 (dump_combine_total_stats): Remove.
26452 (total_attempts, total_merges, total_extras,
26453 total_successes): Remove.
26454 (combine_instructions): Don't increment total stats
26455 instead use statistics_counter_event.
26456 * dumpfile.cc (print_combine_total_stats): Remove.
26457 * dumpfile.h (print_combine_total_stats): Remove.
26458 (dump_combine_total_stats): Remove.
26459 * passes.cc (finish_optimization_passes):
26460 Don't call print_combine_total_stats.
26461 * rtl.h (dump_combine_total_stats): Remove.
26462 (dump_combine_stats): Remove.
26464 2023-07-20 Jan Hubicka <jh@suse.cz>
26466 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
26469 2023-07-20 Martin Jambor <mjambor@suse.cz>
26471 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
26472 (analyzer-text-art-ideal-canvas-width): Likewise.
26473 (analyzer-text-art-string-ellipsis-head-len): Likewise.
26474 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
26476 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26478 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
26479 Refine code structure.
26481 2023-07-20 Jan Hubicka <jh@suse.cz>
26483 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
26484 (get_range_query): ... this one; do
26485 (static_loop_exit): Add query parametr, turn ranger to reference.
26486 (loop_static_stmt_p): New function.
26487 (loop_static_op_p): New function.
26488 (loop_iv_derived_p): Remove.
26489 (loop_combined_static_and_iv_p): New function.
26490 (should_duplicate_loop_header_p): Discover combined onditionals;
26491 do not track iv derived; improve dumps.
26492 (pass_ch::execute): Fix whitespace.
26494 2023-07-20 Richard Biener <rguenther@suse.de>
26496 PR tree-optimization/110204
26497 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
26498 Look through copies generated by PRE.
26500 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
26502 * tree-vect-stmts.cc (get_group_load_store_type): Account for
26503 `gap` when checking if need to peel twice.
26505 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
26507 PR middle-end/77928
26508 * doc/extend.texi: Document iseqsig builtin.
26509 * builtins.cc (fold_builtin_iseqsig): New function.
26510 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
26511 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
26512 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
26514 2023-07-20 Pan Li <pan2.li@intel.com>
26516 * config/riscv/vector.md: Fix incorrect match_operand.
26518 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
26520 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
26521 force_reg, to use SUBREG rather than create a new pseudo when
26522 inserting DFmode fields into TImode with insvti_{high,low}part.
26523 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
26524 define_insn_and_split...
26525 (*concatditi3_3): 64-bit implementation. Provide alternative
26526 that allows register allocation to use SSE registers that is
26527 split into vec_concatv2di after reload.
26528 (*concatsidi3_3): 32-bit implementation.
26530 2023-07-20 Richard Biener <rguenther@suse.de>
26532 PR middle-end/61747
26533 * internal-fn.cc (expand_vec_cond_optab_fn): When the
26534 value operands are equal to the original comparison operands
26535 preserve that equality by re-using the comparison expansion.
26536 * optabs.cc (emit_conditional_move): When the value operands
26537 are equal to the comparison operands and would be forced to
26538 a register by prepare_cmp_insn do so earlier, preserving the
26541 2023-07-20 Pan Li <pan2.li@intel.com>
26543 * config/riscv/vector.md: Align pattern format.
26545 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
26547 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
26548 Granite Rapids{, D} from documentation.
26550 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26552 * config/riscv/autovec.md
26553 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
26554 Refactor RVV machine modes.
26555 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
26556 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
26557 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
26558 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
26559 (len_mask_gather_load<mode><mode>): Ditto.
26560 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
26561 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
26562 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
26563 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
26564 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
26565 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
26566 (len_mask_scatter_store<mode><mode>): Ditto.
26567 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
26568 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
26569 (ADJUST_NUNITS): Ditto.
26570 (ADJUST_ALIGNMENT): Ditto.
26571 (ADJUST_BYTESIZE): Ditto.
26572 (ADJUST_PRECISION): Ditto.
26573 (RVV_MODES): Ditto.
26574 (RVV_WHOLE_MODES): Ditto.
26575 (RVV_FRACT_MODE): Ditto.
26576 (RVV_NF8_MODES): Ditto.
26577 (RVV_NF4_MODES): Ditto.
26578 (VECTOR_MODES_WITH_PREFIX): Ditto.
26579 (VECTOR_MODE_WITH_PREFIX): Ditto.
26580 (RVV_TUPLE_MODES): Ditto.
26581 (RVV_NF2_MODES): Ditto.
26582 (RVV_TUPLE_PARTIAL_MODES): Ditto.
26583 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
26585 (TUPLE_ENTRY): Ditto.
26586 (get_vlmul): Ditto.
26588 (get_ratio): Ditto.
26589 (preferred_simd_mode): Ditto.
26590 (autovectorize_vector_modes): Ditto.
26591 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
26592 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
26593 (vbool64_t): Ditto.
26594 (vbool32_t): Ditto.
26595 (vbool16_t): Ditto.
26600 (vint8mf8_t): Ditto.
26601 (vuint8mf8_t): Ditto.
26602 (vint8mf4_t): Ditto.
26603 (vuint8mf4_t): Ditto.
26604 (vint8mf2_t): Ditto.
26605 (vuint8mf2_t): Ditto.
26606 (vint8m1_t): Ditto.
26607 (vuint8m1_t): Ditto.
26608 (vint8m2_t): Ditto.
26609 (vuint8m2_t): Ditto.
26610 (vint8m4_t): Ditto.
26611 (vuint8m4_t): Ditto.
26612 (vint8m8_t): Ditto.
26613 (vuint8m8_t): Ditto.
26614 (vint16mf4_t): Ditto.
26615 (vuint16mf4_t): Ditto.
26616 (vint16mf2_t): Ditto.
26617 (vuint16mf2_t): Ditto.
26618 (vint16m1_t): Ditto.
26619 (vuint16m1_t): Ditto.
26620 (vint16m2_t): Ditto.
26621 (vuint16m2_t): Ditto.
26622 (vint16m4_t): Ditto.
26623 (vuint16m4_t): Ditto.
26624 (vint16m8_t): Ditto.
26625 (vuint16m8_t): Ditto.
26626 (vint32mf2_t): Ditto.
26627 (vuint32mf2_t): Ditto.
26628 (vint32m1_t): Ditto.
26629 (vuint32m1_t): Ditto.
26630 (vint32m2_t): Ditto.
26631 (vuint32m2_t): Ditto.
26632 (vint32m4_t): Ditto.
26633 (vuint32m4_t): Ditto.
26634 (vint32m8_t): Ditto.
26635 (vuint32m8_t): Ditto.
26636 (vint64m1_t): Ditto.
26637 (vuint64m1_t): Ditto.
26638 (vint64m2_t): Ditto.
26639 (vuint64m2_t): Ditto.
26640 (vint64m4_t): Ditto.
26641 (vuint64m4_t): Ditto.
26642 (vint64m8_t): Ditto.
26643 (vuint64m8_t): Ditto.
26644 (vfloat16mf4_t): Ditto.
26645 (vfloat16mf2_t): Ditto.
26646 (vfloat16m1_t): Ditto.
26647 (vfloat16m2_t): Ditto.
26648 (vfloat16m4_t): Ditto.
26649 (vfloat16m8_t): Ditto.
26650 (vfloat32mf2_t): Ditto.
26651 (vfloat32m1_t): Ditto.
26652 (vfloat32m2_t): Ditto.
26653 (vfloat32m4_t): Ditto.
26654 (vfloat32m8_t): Ditto.
26655 (vfloat64m1_t): Ditto.
26656 (vfloat64m2_t): Ditto.
26657 (vfloat64m4_t): Ditto.
26658 (vfloat64m8_t): Ditto.
26659 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
26660 (TUPLE_ENTRY): Ditto.
26661 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
26662 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
26663 (riscv_v_adjust_nunits): Ditto.
26664 (riscv_v_adjust_bytesize): Ditto.
26665 (riscv_v_adjust_precision): Ditto.
26666 (riscv_convert_vector_bits): Ditto.
26667 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
26668 * config/riscv/riscv.md: Ditto.
26669 * config/riscv/vector-iterators.md: Ditto.
26670 * config/riscv/vector.md
26671 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
26672 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
26673 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
26674 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
26675 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
26676 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
26677 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
26678 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
26679 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
26680 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
26681 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
26682 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
26683 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
26684 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
26685 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
26686 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
26687 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
26688 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
26689 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
26690 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
26691 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
26692 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
26693 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
26694 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
26695 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
26696 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
26697 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
26698 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
26699 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
26700 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
26701 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
26702 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
26703 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
26705 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
26707 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
26708 (lra_asm_insn_error): New prototype.
26709 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
26711 (lra_spill): Call lra_update_fp2sp_elimination.
26712 * lra-eliminations.cc: Remove trailing spaces.
26713 (elimination_fp2sp_occured_p): New static flag.
26714 (lra_eliminate_regs_1): Set the flag up.
26715 (update_reg_eliminate): Modify the assert for stack to frame
26716 pointer elimination.
26717 (lra_update_fp2sp_elimination): New function.
26718 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
26720 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
26722 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
26724 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
26725 dependencies from target pragmas.
26726 * config/aarch64/arm_fp16.h (target): Likewise.
26727 * config/aarch64/arm_neon.h (target): Likewise.
26729 2023-07-19 Andrew Pinski <apinski@marvell.com>
26731 PR tree-optimization/110252
26732 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
26733 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
26734 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
26735 (match_simplify_replacement): Temporarily
26736 remove the flow sensitive info on the two statements that might
26739 2023-07-19 Andrew Pinski <apinski@marvell.com>
26741 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
26742 with flow_sensitive_info_storage.
26743 (follow_outer_ssa_edges): Update how to save off the flow
26745 (maybe_fold_comparisons_from_match_pd): Update restoring
26746 of flow sensitive info.
26747 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
26748 (flow_sensitive_info_storage::restore): New method.
26749 (flow_sensitive_info_storage::save_and_clear): New method.
26750 (flow_sensitive_info_storage::clear_storage): New method.
26751 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
26753 2023-07-19 Andrew Pinski <apinski@marvell.com>
26755 PR tree-optimization/110726
26756 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
26757 Add checks to make sure the type was one bit precision
26760 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26762 * doc/md.texi: Add mask_len_fold_left_plus.
26763 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
26764 (expand_mask_len_fold_left_optab_fn): Ditto.
26765 (direct_mask_len_fold_left_optab_supported_p): Ditto.
26766 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
26767 * optabs.def (OPTAB_D): Ditto.
26769 2023-07-19 Jakub Jelinek <jakub@redhat.com>
26771 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
26773 2023-07-19 Jakub Jelinek <jakub@redhat.com>
26775 PR tree-optimization/110731
26776 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
26777 divisor as UNSIGNED regardless of sgn.
26779 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
26781 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
26782 (standard_extensions_p): Add check.
26783 (riscv_subset_list::add): Just return NULL if it failed before.
26784 (riscv_subset_list::parse_std_ext): Continue parse when find a error
26785 (riscv_subset_list::parse): Just return NULL if it failed before.
26786 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
26788 2023-07-19 Jan Beulich <jbeulich@suse.com>
26790 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
26792 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
26793 gen_vec_extract_hi.
26794 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
26795 gen_vec_interleave_low. Rename local variable.
26797 2023-07-19 Jan Beulich <jbeulich@suse.com>
26799 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
26800 alternative. Move AVX512VL part of condition to new "enabled"
26803 2023-07-19 liuhongt <hongtao.liu@intel.com>
26806 * config/i386/i386-builtins.cc
26807 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
26808 (ix86_register_bf16_builtin_type): Ditto.
26809 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
26810 isn't available, undef the macros which are used to check the
26811 backend support of the _Float16/__bf16 types when building
26812 libstdc++ and libgcc.
26813 * config/i386/i386.cc (construct_container): Issue errors for
26814 HFmode/BFmode when TARGET_SSE2 is not available.
26815 (function_value_32): Ditto.
26816 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
26817 (ix86_libgcc_floating_mode_supported_p): Ditto.
26818 (ix86_emit_support_tinfos): Adjust codes.
26819 (ix86_invalid_conversion): Return diagnostic message string
26820 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
26821 (ix86_invalid_unary_op): New function.
26822 (ix86_invalid_binary_op): Ditto.
26823 (TARGET_INVALID_UNARY_OP): Define.
26824 (TARGET_INVALID_BINARY_OP): Define.
26825 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
26826 related instrinsics header files.
26827 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
26829 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
26831 * dwarf2asm.cc: Change FALSE to false.
26832 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
26833 * dwarf2out.cc (matches_main_base): Change return type from
26834 int to bool. Change "last_match" variable to bool.
26835 (dump_struct_debug): Change return type from int to bool.
26836 Change "matches" and "result" function arguments to bool.
26837 (is_pseudo_reg): Change return type from int to bool.
26838 (is_tagged_type): Ditto.
26839 (same_loc_p): Ditto.
26840 (same_dw_val_p): Change return type from int to bool and adjust
26841 function body accordingly.
26842 (same_attr_p): Ditto.
26843 (same_die_p): Ditto.
26844 (is_type_die): Ditto.
26845 (is_declaration_die): Ditto.
26846 (should_move_die_to_comdat): Ditto.
26847 (is_base_type): Ditto.
26848 (is_based_loc): Ditto.
26849 (local_scope_p): Ditto.
26850 (class_scope_p): Ditto.
26851 (class_or_namespace_scope_p): Ditto.
26852 (is_tagged_type): Ditto.
26853 (is_rust): Use void argument.
26854 (is_nested_in_subprogram): Change return type from int to bool.
26855 (contains_subprogram_definition): Ditto.
26856 (gen_struct_or_union_type_die): Change "nested", "complete"
26857 and "ns_decl" variables to bool.
26858 (is_naming_typedef_decl): Change FALSE to false.
26860 2023-07-18 Jan Hubicka <jh@suse.cz>
26862 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
26863 for queries not in headers.
26864 (static_loop_exit): Add basic blck parameter; update use of
26866 (should_duplicate_loop_header_p): Add ranger and static_exits
26867 parameter. Do not account statements that will be optimized
26868 out after duplicaiton in overall size. Add ranger query to
26870 (update_profile_after_ch): Take static_exits has set instead of
26871 single eliminated_edge.
26872 (ch_base::copy_headers): Do all analysis in the first pass;
26873 remember invariant_exits and static_exits.
26875 2023-07-18 Jason Merrill <jason@redhat.com>
26877 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
26879 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
26881 * doc/gm2.texi (Semantic checking): Change example testwithptr
26884 2023-07-18 Richard Biener <rguenther@suse.de>
26886 PR middle-end/105715
26887 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
26888 (pass_gimple_isel::execute): ... this. Duplicate
26889 comparison defs of COND_EXPRs.
26891 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26893 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
26894 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
26895 (riscv_convert_vector_bits): Ditto.
26897 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26899 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
26900 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
26902 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
26904 * config/s390/vx-builtins.md: New vsel pattern.
26906 2023-07-18 liuhongt <hongtao.liu@intel.com>
26909 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
26910 Remove # from assemble output.
26912 2023-07-18 liuhongt <hongtao.liu@intel.com>
26915 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
26916 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
26917 3 define_peephole2 after the pattern.
26919 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26921 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
26923 2023-07-18 Pan Li <pan2.li@intel.com>
26924 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26926 * config/riscv/riscv.cc (struct machine_function): Add new field.
26927 (riscv_static_frm_mode_p): New function.
26928 (riscv_emit_frm_mode_set): New function for emit FRM.
26929 (riscv_emit_mode_set): Extract function for FRM.
26930 (riscv_mode_needed): Fix the TODO.
26931 (riscv_mode_entry): Initial dynamic frm RTL.
26932 (riscv_mode_exit): Return DYN_EXIT.
26933 * config/riscv/riscv.md: Add rdfrm.
26934 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
26935 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
26937 (fsrmsi_backup): New pattern for swap.
26938 (fsrmsi_restore): New pattern for restore.
26939 (fsrmsi_restore_exit): New pattern for restore exit.
26940 (frrmsi): New pattern for backup.
26942 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
26944 * doc/extend.texi: Add @cindex on __auto_type.
26946 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
26948 * combine-stack-adj.cc (stack_memref_p): Change return type from
26949 int to bool and adjust function body accordingly.
26950 (rest_of_handle_stack_adjustments): Change return type to void.
26952 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
26954 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
26955 (cant_combine_insn_p): Change return type from int to bool and adjust
26956 function body accordingly.
26957 (can_combine_p): Ditto.
26958 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
26959 function arguments from int to bool.
26960 (contains_muldiv): Change return type from int to bool and adjust
26961 function body accordingly.
26962 (try_combine): Ditto. Change "new_direct_jump" pointer function
26963 argument from int to bool. Change "substed_i2", "substed_i1",
26964 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
26965 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
26966 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
26967 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
26968 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
26969 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
26971 (subst): Change "in_dest", "in_cond" and "unique_copy" function
26972 arguments from int to bool.
26973 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
26974 arguments from int to bool.
26975 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
26976 function argument from int to bool.
26977 (force_int_to_mode): Change "just_select" function argument
26978 from int to bool. Change "next_select" variable to bool.
26979 (rtx_equal_for_field_assignment_p): Change return type from
26980 int to bool and adjust function body accordingly.
26981 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
26982 argument from int to bool.
26983 (get_last_value_validate): Change return type from int to bool
26984 and adjust function body accordingly.
26985 (reg_dead_at_p): Ditto.
26986 (reg_bitfield_target_p): Ditto.
26987 (combine_instructions): Ditto. Change "new_direct_jump"
26989 (can_combine_p): Change return type from int to bool
26990 and adjust function body accordingly.
26991 (likely_spilled_retval_p): Ditto.
26992 (can_change_dest_mode): Change "added_sets" function argument
26994 (find_split_point): Change "unsignedp" variable to bool.
26995 (simplify_if_then_else): Change "comparison_p" and "swapped"
26997 (simplify_set): Change "other_changed" variable to bool.
26998 (expand_compound_operation): Change "unsignedp" variable to bool.
26999 (force_to_mode): Change "just_select" function argument
27000 from int to bool. Change "next_select" variable to bool.
27001 (extended_count): Change "unsignedp" function argument to bool.
27002 (simplify_shift_const_1): Change "complement_p" variable to bool.
27003 (simplify_comparison): Change "changed" variable to bool.
27004 (rest_of_handle_combine): Change return type to void.
27006 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
27009 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
27011 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
27013 * ira.cc (setup_reg_class_relations): Continue
27014 if regclass cl3 is hard_reg_set_empty_p.
27016 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27018 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
27020 2023-07-17 Martin Jambor <mjambor@suse.cz>
27022 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
27025 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
27027 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
27029 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
27032 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
27033 recur add all implied extensions.
27034 (riscv_subset_list::check_implied_ext): Add new method.
27035 (riscv_subset_list::parse): Call checker check_implied_ext.
27036 * config/riscv/riscv-subset.h: Add new method.
27038 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27040 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
27041 (reduc_smax_scal_<mode>): Ditto.
27042 (reduc_umax_scal_<mode>): Ditto.
27043 (reduc_smin_scal_<mode>): Ditto.
27044 (reduc_umin_scal_<mode>): Ditto.
27045 (reduc_and_scal_<mode>): Ditto.
27046 (reduc_ior_scal_<mode>): Ditto.
27047 (reduc_xor_scal_<mode>): Ditto.
27048 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
27049 (expand_reduction): New function.
27050 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
27051 (emit_vlmax_fp_reduction_insn): Ditto.
27052 (get_m1_mode): Ditto.
27053 (expand_cond_len_binop): Fix name.
27054 (expand_reduction): New function
27055 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
27056 (validate_change_or_fail): New function.
27057 (change_insn): Fix VSETVL BUG.
27058 (change_vsetvl_insn): Ditto.
27059 (pass_vsetvl::backward_demand_fusion): Ditto.
27060 (pass_vsetvl::df_post_optimization): Ditto.
27062 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
27064 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
27066 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
27068 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
27069 Remove parameter name from declaration of unused parameter.
27071 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
27073 PR tree-optimization/110652
27074 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
27077 2023-07-17 Richard Biener <rguenther@suse.de>
27079 PR tree-optimization/110669
27080 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
27081 Check we matched a header PHI.
27083 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
27085 * tree-ssanames.cc (set_bitmask): New.
27086 * tree-ssanames.h (set_bitmask): New.
27088 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
27090 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
27092 * value-range.h (irange_bitmask::union_): Normalize beforehand.
27093 (irange_bitmask::intersect): Same.
27095 2023-07-17 Andrew Pinski <apinski@marvell.com>
27097 PR tree-optimization/95923
27098 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
27100 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
27102 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
27103 to the std::sort comparison lambda function const.
27105 2023-07-17 Andrew Pinski <apinski@marvell.com>
27107 PR tree-optimization/110666
27108 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
27110 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
27112 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
27113 Arrow Lake and Arrow Lake S.
27114 * common/config/i386/i386-common.cc:
27115 (processor_name): Add arrowlake.
27116 (processor_alias_table): Add arrow lake, arrow lake s and lunar
27118 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
27119 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
27120 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
27121 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
27123 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
27125 * config/i386/i386-options.cc (m_ARROWLAKE): New.
27126 (processor_cost_table): Add arrowlake.
27127 * config/i386/i386.h (enum processor_type):
27128 Add PROCESSOR_ARROWLAKE.
27129 * config/i386/x86-tune.def: Add m_ARROWLAKE.
27130 * doc/extend.texi: Add arrowlake and arrowlake-s.
27131 * doc/invoke.texi: Ditto.
27133 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
27135 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
27136 have the same iterator. Also renaming all the occurence to
27138 (usdot_prod<mode>): New define_expand.
27139 (udot_prod<mode>): Ditto.
27141 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
27143 * common/config/i386/cpuinfo.h (get_available_features):
27145 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
27146 OPTION_MASK_ISA2_SM4_UNSET): New.
27147 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
27148 (ix86_handle_option): Handle -msm4.
27149 * common/config/i386/i386-cpuinfo.h (enum processor_features):
27151 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
27153 * config.gcc: Add sm4intrin.h.
27154 * config/i386/cpuid.h (bit_SM4): New.
27155 * config/i386/i386-builtin.def (BDESC): Add new builtins.
27156 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
27158 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
27159 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
27160 (ix86_valid_target_attribute_inner_p): Handle sm4.
27161 * config/i386/i386.opt: Add option -msm4.
27162 * config/i386/immintrin.h: Include sm4intrin.h
27163 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
27164 (vsm4rnds4_<mode>): Ditto.
27165 * doc/extend.texi: Document sm4.
27166 * doc/invoke.texi: Document -msm4.
27167 * doc/sourcebuild.texi: Document target sm4.
27168 * config/i386/sm4intrin.h: New file.
27170 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
27172 * common/config/i386/cpuinfo.h (get_available_features):
27174 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
27175 OPTION_MASK_ISA2_SHA512_UNSET): New.
27176 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
27177 (ix86_handle_option): Handle -msha512.
27178 * common/config/i386/i386-cpuinfo.h (enum processor_features):
27179 Add FEATURE_SHA512.
27180 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
27182 * config.gcc: Add sha512intrin.h.
27183 * config/i386/cpuid.h (bit_SHA512): New.
27184 * config/i386/i386-builtin-types.def:
27185 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
27186 * config/i386/i386-builtin.def (BDESC): Add new builtins.
27187 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
27189 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
27190 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
27191 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
27192 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
27193 (ix86_valid_target_attribute_inner_p): Handle sha512.
27194 * config/i386/i386.opt: Add option -msha512.
27195 * config/i386/immintrin.h: Include sha512intrin.h.
27196 * config/i386/sse.md (vsha512msg1): New define insn.
27197 (vsha512msg2): Ditto.
27198 (vsha512rnds2): Ditto.
27199 * doc/extend.texi: Document sha512.
27200 * doc/invoke.texi: Document -msha512.
27201 * doc/sourcebuild.texi: Document target sha512.
27202 * config/i386/sha512intrin.h: New file.
27204 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
27206 * common/config/i386/cpuinfo.h (get_available_features):
27208 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
27209 OPTION_MASK_ISA2_SM3_UNSET): New.
27210 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
27211 (ix86_handle_option): Handle -msm3.
27212 * common/config/i386/i386-cpuinfo.h (enum processor_features):
27214 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
27216 * config.gcc: Add sm3intrin.h
27217 * config/i386/cpuid.h (bit_SM3): New.
27218 * config/i386/i386-builtin-types.def:
27219 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
27220 * config/i386/i386-builtin.def (BDESC): Add new builtins.
27221 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
27223 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
27224 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
27225 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
27226 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
27227 (ix86_valid_target_attribute_inner_p): Handle sm3.
27228 * config/i386/i386.opt: Add option -msm3.
27229 * config/i386/immintrin.h: Include sm3intrin.h.
27230 * config/i386/sse.md (vsm3msg1): New define insn.
27232 (vsm3rnds2): Ditto.
27233 * doc/extend.texi: Document sm3.
27234 * doc/invoke.texi: Document -msm3.
27235 * doc/sourcebuild.texi: Document target sm3.
27236 * config/i386/sm3intrin.h: New file.
27238 2023-07-17 Kong Lingling <lingling.kong@intel.com>
27239 Haochen Jiang <haochen.jiang@intel.com>
27241 * common/config/i386/cpuinfo.h (get_available_features): Detect
27243 * common/config/i386/i386-common.cc
27244 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
27245 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
27246 (ix86_handle_option): Handle -mavxvnniint16.
27247 * common/config/i386/i386-cpuinfo.h (enum processor_features):
27248 Add FEATURE_AVXVNNIINT16.
27249 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
27251 * config.gcc: Add avxvnniint16.h.
27252 * config/i386/avxvnniint16intrin.h: New file.
27253 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
27254 * config/i386/i386-builtin.def: Add new builtins.
27255 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
27257 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
27258 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
27259 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
27260 * config/i386/i386.opt: Add option -mavxvnniint16.
27261 * config/i386/immintrin.h: Include avxvnniint16.h.
27262 * config/i386/sse.md
27263 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
27264 * doc/extend.texi: Document avxvnniint16.
27265 * doc/invoke.texi: Document -mavxvnniint16.
27266 * doc/sourcebuild.texi: Document target avxvnniint16.
27268 2023-07-16 Jan Hubicka <jh@suse.cz>
27270 PR middle-end/110649
27271 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
27272 (vect_transform_loop): Move scale_profile_for_vect_loop after
27273 upper bound updates.
27275 2023-07-16 Jan Hubicka <jh@suse.cz>
27277 PR tree-optimization/110649
27278 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
27279 probability of the if-then-else construct.
27281 2023-07-16 Jan Hubicka <jh@suse.cz>
27283 PR middle-end/110649
27284 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
27286 2023-07-15 Andrew Pinski <apinski@marvell.com>
27288 * doc/contrib.texi: Update my entry.
27290 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
27292 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
27294 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
27295 (tld_load): Likewise.
27296 (tgd_load_pic): Change to expander.
27297 (tld_load_pic, tld_offset_load, tp_load): Likewise.
27298 (tie_load_pic, tle_load): Likewise.
27299 (tgd_load_picsi, tgd_load_picdi): New.
27300 (tld_load_picsi, tld_load_picdi): New.
27301 (tld_offset_load<P:mode>): New.
27302 (tp_load<P:mode>): New.
27303 (tie_load_picsi, tie_load_picdi): New.
27304 (tle_load<P:mode>): New.
27306 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27308 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
27309 (vcmlaq_rot180, vcmlaq_rot270): New.
27310 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
27311 (vcmlaq_rot180, vcmlaq_rot270): New.
27312 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
27313 (vcmlaq_rot180, vcmlaq_rot270): New.
27314 * config/arm/arm-mve-builtins.cc
27315 (function_instance::has_inactive_argument): Handle vcmlaq,
27316 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
27317 * config/arm/arm_mve.h (vcmlaq): Delete.
27318 (vcmlaq_rot180): Delete.
27319 (vcmlaq_rot270): Delete.
27320 (vcmlaq_rot90): Delete.
27321 (vcmlaq_m): Delete.
27322 (vcmlaq_rot180_m): Delete.
27323 (vcmlaq_rot270_m): Delete.
27324 (vcmlaq_rot90_m): Delete.
27325 (vcmlaq_f16): Delete.
27326 (vcmlaq_rot180_f16): Delete.
27327 (vcmlaq_rot270_f16): Delete.
27328 (vcmlaq_rot90_f16): Delete.
27329 (vcmlaq_f32): Delete.
27330 (vcmlaq_rot180_f32): Delete.
27331 (vcmlaq_rot270_f32): Delete.
27332 (vcmlaq_rot90_f32): Delete.
27333 (vcmlaq_m_f32): Delete.
27334 (vcmlaq_m_f16): Delete.
27335 (vcmlaq_rot180_m_f32): Delete.
27336 (vcmlaq_rot180_m_f16): Delete.
27337 (vcmlaq_rot270_m_f32): Delete.
27338 (vcmlaq_rot270_m_f16): Delete.
27339 (vcmlaq_rot90_m_f32): Delete.
27340 (vcmlaq_rot90_m_f16): Delete.
27341 (__arm_vcmlaq_f16): Delete.
27342 (__arm_vcmlaq_rot180_f16): Delete.
27343 (__arm_vcmlaq_rot270_f16): Delete.
27344 (__arm_vcmlaq_rot90_f16): Delete.
27345 (__arm_vcmlaq_f32): Delete.
27346 (__arm_vcmlaq_rot180_f32): Delete.
27347 (__arm_vcmlaq_rot270_f32): Delete.
27348 (__arm_vcmlaq_rot90_f32): Delete.
27349 (__arm_vcmlaq_m_f32): Delete.
27350 (__arm_vcmlaq_m_f16): Delete.
27351 (__arm_vcmlaq_rot180_m_f32): Delete.
27352 (__arm_vcmlaq_rot180_m_f16): Delete.
27353 (__arm_vcmlaq_rot270_m_f32): Delete.
27354 (__arm_vcmlaq_rot270_m_f16): Delete.
27355 (__arm_vcmlaq_rot90_m_f32): Delete.
27356 (__arm_vcmlaq_rot90_m_f16): Delete.
27357 (__arm_vcmlaq): Delete.
27358 (__arm_vcmlaq_rot180): Delete.
27359 (__arm_vcmlaq_rot270): Delete.
27360 (__arm_vcmlaq_rot90): Delete.
27361 (__arm_vcmlaq_m): Delete.
27362 (__arm_vcmlaq_rot180_m): Delete.
27363 (__arm_vcmlaq_rot270_m): Delete.
27364 (__arm_vcmlaq_rot90_m): Delete.
27366 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27368 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
27369 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
27370 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
27371 (mve_insn): Add vcmla.
27372 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
27374 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
27376 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
27377 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
27378 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
27379 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
27381 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
27383 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27385 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
27386 (vcmulq_rot180, vcmulq_rot270): New.
27387 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
27388 (vcmulq_rot180, vcmulq_rot270): New.
27389 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
27390 (vcmulq_rot180, vcmulq_rot270): New.
27391 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
27392 (vcmulq_rot270): Delete.
27393 (vcmulq_rot180): Delete.
27395 (vcmulq_m): Delete.
27396 (vcmulq_rot180_m): Delete.
27397 (vcmulq_rot270_m): Delete.
27398 (vcmulq_rot90_m): Delete.
27399 (vcmulq_x): Delete.
27400 (vcmulq_rot90_x): Delete.
27401 (vcmulq_rot180_x): Delete.
27402 (vcmulq_rot270_x): Delete.
27403 (vcmulq_rot90_f16): Delete.
27404 (vcmulq_rot270_f16): Delete.
27405 (vcmulq_rot180_f16): Delete.
27406 (vcmulq_f16): Delete.
27407 (vcmulq_rot90_f32): Delete.
27408 (vcmulq_rot270_f32): Delete.
27409 (vcmulq_rot180_f32): Delete.
27410 (vcmulq_f32): Delete.
27411 (vcmulq_m_f32): Delete.
27412 (vcmulq_m_f16): Delete.
27413 (vcmulq_rot180_m_f32): Delete.
27414 (vcmulq_rot180_m_f16): Delete.
27415 (vcmulq_rot270_m_f32): Delete.
27416 (vcmulq_rot270_m_f16): Delete.
27417 (vcmulq_rot90_m_f32): Delete.
27418 (vcmulq_rot90_m_f16): Delete.
27419 (vcmulq_x_f16): Delete.
27420 (vcmulq_x_f32): Delete.
27421 (vcmulq_rot90_x_f16): Delete.
27422 (vcmulq_rot90_x_f32): Delete.
27423 (vcmulq_rot180_x_f16): Delete.
27424 (vcmulq_rot180_x_f32): Delete.
27425 (vcmulq_rot270_x_f16): Delete.
27426 (vcmulq_rot270_x_f32): Delete.
27427 (__arm_vcmulq_rot90_f16): Delete.
27428 (__arm_vcmulq_rot270_f16): Delete.
27429 (__arm_vcmulq_rot180_f16): Delete.
27430 (__arm_vcmulq_f16): Delete.
27431 (__arm_vcmulq_rot90_f32): Delete.
27432 (__arm_vcmulq_rot270_f32): Delete.
27433 (__arm_vcmulq_rot180_f32): Delete.
27434 (__arm_vcmulq_f32): Delete.
27435 (__arm_vcmulq_m_f32): Delete.
27436 (__arm_vcmulq_m_f16): Delete.
27437 (__arm_vcmulq_rot180_m_f32): Delete.
27438 (__arm_vcmulq_rot180_m_f16): Delete.
27439 (__arm_vcmulq_rot270_m_f32): Delete.
27440 (__arm_vcmulq_rot270_m_f16): Delete.
27441 (__arm_vcmulq_rot90_m_f32): Delete.
27442 (__arm_vcmulq_rot90_m_f16): Delete.
27443 (__arm_vcmulq_x_f16): Delete.
27444 (__arm_vcmulq_x_f32): Delete.
27445 (__arm_vcmulq_rot90_x_f16): Delete.
27446 (__arm_vcmulq_rot90_x_f32): Delete.
27447 (__arm_vcmulq_rot180_x_f16): Delete.
27448 (__arm_vcmulq_rot180_x_f32): Delete.
27449 (__arm_vcmulq_rot270_x_f16): Delete.
27450 (__arm_vcmulq_rot270_x_f32): Delete.
27451 (__arm_vcmulq_rot90): Delete.
27452 (__arm_vcmulq_rot270): Delete.
27453 (__arm_vcmulq_rot180): Delete.
27454 (__arm_vcmulq): Delete.
27455 (__arm_vcmulq_m): Delete.
27456 (__arm_vcmulq_rot180_m): Delete.
27457 (__arm_vcmulq_rot270_m): Delete.
27458 (__arm_vcmulq_rot90_m): Delete.
27459 (__arm_vcmulq_x): Delete.
27460 (__arm_vcmulq_rot90_x): Delete.
27461 (__arm_vcmulq_rot180_x): Delete.
27462 (__arm_vcmulq_rot270_x): Delete.
27464 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27466 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
27467 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
27468 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
27469 (MVE_VCADDQ_VCMULQ_M): New.
27470 (mve_insn): Add vcmul.
27471 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
27474 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
27476 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
27477 @mve_<mve_insn>q<mve_rot>_f<mode>.
27478 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
27479 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
27480 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
27482 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27484 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
27485 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
27486 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
27487 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
27488 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
27489 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
27490 * config/arm/arm-mve-builtins-functions.h (class
27491 unspec_mve_function_exact_insn_rot): New.
27492 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
27493 (vcaddq_rot270): Delete.
27494 (vhcaddq_rot90): Delete.
27495 (vhcaddq_rot270): Delete.
27496 (vcaddq_rot270_m): Delete.
27497 (vcaddq_rot90_m): Delete.
27498 (vhcaddq_rot270_m): Delete.
27499 (vhcaddq_rot90_m): Delete.
27500 (vcaddq_rot90_x): Delete.
27501 (vcaddq_rot270_x): Delete.
27502 (vhcaddq_rot90_x): Delete.
27503 (vhcaddq_rot270_x): Delete.
27504 (vcaddq_rot90_u8): Delete.
27505 (vcaddq_rot270_u8): Delete.
27506 (vhcaddq_rot90_s8): Delete.
27507 (vhcaddq_rot270_s8): Delete.
27508 (vcaddq_rot90_s8): Delete.
27509 (vcaddq_rot270_s8): Delete.
27510 (vcaddq_rot90_u16): Delete.
27511 (vcaddq_rot270_u16): Delete.
27512 (vhcaddq_rot90_s16): Delete.
27513 (vhcaddq_rot270_s16): Delete.
27514 (vcaddq_rot90_s16): Delete.
27515 (vcaddq_rot270_s16): Delete.
27516 (vcaddq_rot90_u32): Delete.
27517 (vcaddq_rot270_u32): Delete.
27518 (vhcaddq_rot90_s32): Delete.
27519 (vhcaddq_rot270_s32): Delete.
27520 (vcaddq_rot90_s32): Delete.
27521 (vcaddq_rot270_s32): Delete.
27522 (vcaddq_rot90_f16): Delete.
27523 (vcaddq_rot270_f16): Delete.
27524 (vcaddq_rot90_f32): Delete.
27525 (vcaddq_rot270_f32): Delete.
27526 (vcaddq_rot270_m_s8): Delete.
27527 (vcaddq_rot270_m_s32): Delete.
27528 (vcaddq_rot270_m_s16): Delete.
27529 (vcaddq_rot270_m_u8): Delete.
27530 (vcaddq_rot270_m_u32): Delete.
27531 (vcaddq_rot270_m_u16): Delete.
27532 (vcaddq_rot90_m_s8): Delete.
27533 (vcaddq_rot90_m_s32): Delete.
27534 (vcaddq_rot90_m_s16): Delete.
27535 (vcaddq_rot90_m_u8): Delete.
27536 (vcaddq_rot90_m_u32): Delete.
27537 (vcaddq_rot90_m_u16): Delete.
27538 (vhcaddq_rot270_m_s8): Delete.
27539 (vhcaddq_rot270_m_s32): Delete.
27540 (vhcaddq_rot270_m_s16): Delete.
27541 (vhcaddq_rot90_m_s8): Delete.
27542 (vhcaddq_rot90_m_s32): Delete.
27543 (vhcaddq_rot90_m_s16): Delete.
27544 (vcaddq_rot270_m_f32): Delete.
27545 (vcaddq_rot270_m_f16): Delete.
27546 (vcaddq_rot90_m_f32): Delete.
27547 (vcaddq_rot90_m_f16): Delete.
27548 (vcaddq_rot90_x_s8): Delete.
27549 (vcaddq_rot90_x_s16): Delete.
27550 (vcaddq_rot90_x_s32): Delete.
27551 (vcaddq_rot90_x_u8): Delete.
27552 (vcaddq_rot90_x_u16): Delete.
27553 (vcaddq_rot90_x_u32): Delete.
27554 (vcaddq_rot270_x_s8): Delete.
27555 (vcaddq_rot270_x_s16): Delete.
27556 (vcaddq_rot270_x_s32): Delete.
27557 (vcaddq_rot270_x_u8): Delete.
27558 (vcaddq_rot270_x_u16): Delete.
27559 (vcaddq_rot270_x_u32): Delete.
27560 (vhcaddq_rot90_x_s8): Delete.
27561 (vhcaddq_rot90_x_s16): Delete.
27562 (vhcaddq_rot90_x_s32): Delete.
27563 (vhcaddq_rot270_x_s8): Delete.
27564 (vhcaddq_rot270_x_s16): Delete.
27565 (vhcaddq_rot270_x_s32): Delete.
27566 (vcaddq_rot90_x_f16): Delete.
27567 (vcaddq_rot90_x_f32): Delete.
27568 (vcaddq_rot270_x_f16): Delete.
27569 (vcaddq_rot270_x_f32): Delete.
27570 (__arm_vcaddq_rot90_u8): Delete.
27571 (__arm_vcaddq_rot270_u8): Delete.
27572 (__arm_vhcaddq_rot90_s8): Delete.
27573 (__arm_vhcaddq_rot270_s8): Delete.
27574 (__arm_vcaddq_rot90_s8): Delete.
27575 (__arm_vcaddq_rot270_s8): Delete.
27576 (__arm_vcaddq_rot90_u16): Delete.
27577 (__arm_vcaddq_rot270_u16): Delete.
27578 (__arm_vhcaddq_rot90_s16): Delete.
27579 (__arm_vhcaddq_rot270_s16): Delete.
27580 (__arm_vcaddq_rot90_s16): Delete.
27581 (__arm_vcaddq_rot270_s16): Delete.
27582 (__arm_vcaddq_rot90_u32): Delete.
27583 (__arm_vcaddq_rot270_u32): Delete.
27584 (__arm_vhcaddq_rot90_s32): Delete.
27585 (__arm_vhcaddq_rot270_s32): Delete.
27586 (__arm_vcaddq_rot90_s32): Delete.
27587 (__arm_vcaddq_rot270_s32): Delete.
27588 (__arm_vcaddq_rot270_m_s8): Delete.
27589 (__arm_vcaddq_rot270_m_s32): Delete.
27590 (__arm_vcaddq_rot270_m_s16): Delete.
27591 (__arm_vcaddq_rot270_m_u8): Delete.
27592 (__arm_vcaddq_rot270_m_u32): Delete.
27593 (__arm_vcaddq_rot270_m_u16): Delete.
27594 (__arm_vcaddq_rot90_m_s8): Delete.
27595 (__arm_vcaddq_rot90_m_s32): Delete.
27596 (__arm_vcaddq_rot90_m_s16): Delete.
27597 (__arm_vcaddq_rot90_m_u8): Delete.
27598 (__arm_vcaddq_rot90_m_u32): Delete.
27599 (__arm_vcaddq_rot90_m_u16): Delete.
27600 (__arm_vhcaddq_rot270_m_s8): Delete.
27601 (__arm_vhcaddq_rot270_m_s32): Delete.
27602 (__arm_vhcaddq_rot270_m_s16): Delete.
27603 (__arm_vhcaddq_rot90_m_s8): Delete.
27604 (__arm_vhcaddq_rot90_m_s32): Delete.
27605 (__arm_vhcaddq_rot90_m_s16): Delete.
27606 (__arm_vcaddq_rot90_x_s8): Delete.
27607 (__arm_vcaddq_rot90_x_s16): Delete.
27608 (__arm_vcaddq_rot90_x_s32): Delete.
27609 (__arm_vcaddq_rot90_x_u8): Delete.
27610 (__arm_vcaddq_rot90_x_u16): Delete.
27611 (__arm_vcaddq_rot90_x_u32): Delete.
27612 (__arm_vcaddq_rot270_x_s8): Delete.
27613 (__arm_vcaddq_rot270_x_s16): Delete.
27614 (__arm_vcaddq_rot270_x_s32): Delete.
27615 (__arm_vcaddq_rot270_x_u8): Delete.
27616 (__arm_vcaddq_rot270_x_u16): Delete.
27617 (__arm_vcaddq_rot270_x_u32): Delete.
27618 (__arm_vhcaddq_rot90_x_s8): Delete.
27619 (__arm_vhcaddq_rot90_x_s16): Delete.
27620 (__arm_vhcaddq_rot90_x_s32): Delete.
27621 (__arm_vhcaddq_rot270_x_s8): Delete.
27622 (__arm_vhcaddq_rot270_x_s16): Delete.
27623 (__arm_vhcaddq_rot270_x_s32): Delete.
27624 (__arm_vcaddq_rot90_f16): Delete.
27625 (__arm_vcaddq_rot270_f16): Delete.
27626 (__arm_vcaddq_rot90_f32): Delete.
27627 (__arm_vcaddq_rot270_f32): Delete.
27628 (__arm_vcaddq_rot270_m_f32): Delete.
27629 (__arm_vcaddq_rot270_m_f16): Delete.
27630 (__arm_vcaddq_rot90_m_f32): Delete.
27631 (__arm_vcaddq_rot90_m_f16): Delete.
27632 (__arm_vcaddq_rot90_x_f16): Delete.
27633 (__arm_vcaddq_rot90_x_f32): Delete.
27634 (__arm_vcaddq_rot270_x_f16): Delete.
27635 (__arm_vcaddq_rot270_x_f32): Delete.
27636 (__arm_vcaddq_rot90): Delete.
27637 (__arm_vcaddq_rot270): Delete.
27638 (__arm_vhcaddq_rot90): Delete.
27639 (__arm_vhcaddq_rot270): Delete.
27640 (__arm_vcaddq_rot270_m): Delete.
27641 (__arm_vcaddq_rot90_m): Delete.
27642 (__arm_vhcaddq_rot270_m): Delete.
27643 (__arm_vhcaddq_rot90_m): Delete.
27644 (__arm_vcaddq_rot90_x): Delete.
27645 (__arm_vcaddq_rot270_x): Delete.
27646 (__arm_vhcaddq_rot90_x): Delete.
27647 (__arm_vhcaddq_rot270_x): Delete.
27649 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27651 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
27652 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
27653 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
27654 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
27655 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
27656 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
27658 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
27659 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
27660 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
27661 VHCADDQ_ROT270_M_S.
27662 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
27663 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
27664 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
27665 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
27666 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
27667 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
27669 (VCADDQ_ROT270_M): Delete.
27670 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
27671 (VCADDQ_ROT90_M): Delete.
27672 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
27673 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
27675 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
27676 (mve_vcaddq<mve_rot><mode>): Rename into ...
27677 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
27678 (mve_vcaddq_rot270_m_<supf><mode>)
27679 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
27680 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
27681 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
27682 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
27684 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
27686 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
27689 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
27690 preparation statement over braces for a single statement.
27691 (*bt<mode>_setncqi): Likewise.
27692 (*bt<mode>_setncqi_2): New define_insn_and_split.
27694 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
27696 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
27697 case inserting of 64-bit values into a TImode register, to handle
27698 both DImode and DFmode using either *insvti_lowpart_1
27699 or *isnvti_highpart_1.
27701 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
27704 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
27705 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
27706 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
27707 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
27708 when the original source contains a paradoxical subreg.
27710 2023-07-14 Jan Hubicka <jh@suse.cz>
27712 * passes.cc (execute_function_todo): Remove
27713 TODO_rebuild_frequencies
27714 * passes.def: Add rebuild_frequencies pass.
27715 * predict.cc (estimate_bb_frequencies): Drop
27717 (tree_estimate_probability): Update call of
27718 estimate_bb_frequencies.
27719 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
27720 first and do not rebuild if not necessary.
27721 (class pass_rebuild_frequencies): New.
27722 (make_pass_rebuild_frequencies): New.
27723 * profile-count.h: Add profile_count::very_large_p.
27724 * tree-inline.cc (optimize_inline_calls): Do not return
27725 TODO_rebuild_frequencies
27726 * tree-pass.h (TODO_rebuild_frequencies): Remove.
27727 (make_pass_rebuild_frequencies): Declare.
27729 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27731 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
27732 * config/riscv/riscv-protos.h (enum insn_type): New enum.
27733 (expand_cond_len_ternop): New function.
27734 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
27735 (expand_cond_len_ternop): Ditto.
27737 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
27740 * config/bpf/bpf.md: Enable instruction scheduling.
27742 2023-07-14 Tamar Christina <tamar.christina@arm.com>
27744 PR tree-optimization/109154
27745 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
27746 (struct bb_predicate): Add no_predicate_stmts.
27747 (set_bb_predicate): Increase predicate count.
27748 (set_bb_predicate_gimplified_stmts): Conditionally initialize
27749 no_predicate_stmts.
27750 (get_bb_num_predicate_stmts): New.
27751 (init_bb_predicate): Initialzie no_predicate_stmts.
27752 (release_bb_predicate): Cleanup no_predicate_stmts.
27753 (insert_gimplified_predicates): Preserve no_predicate_stmts.
27755 2023-07-14 Tamar Christina <tamar.christina@arm.com>
27757 PR tree-optimization/109154
27758 * tree-if-conv.cc (gen_simplified_condition,
27759 gen_phi_nest_statement): New.
27760 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
27762 2023-07-14 Richard Biener <rguenther@suse.de>
27764 * gimple.h (gimple_phi_arg): New const overload.
27765 (gimple_phi_arg_def): Make gimple arg const.
27766 (gimple_phi_arg_def_from_edge): New inline function.
27767 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
27769 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
27770 new inline function.
27771 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
27773 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
27775 * common/config/riscv/riscv-common.cc:
27776 (riscv_implied_info): Add zihintntl item.
27777 (riscv_ext_version_table): Ditto.
27778 (riscv_ext_flag_table): Ditto.
27779 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
27780 (TARGET_ZIHINTNTL): Ditto.
27782 2023-07-14 Die Li <lidie@eswincomputing.com>
27784 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
27786 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
27789 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
27790 used by the address of the following memory operand.
27792 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
27795 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
27796 deallocate alloca-only frame.
27798 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
27801 * config/darwin.h (DARWIN_PLATFORM_ID): New.
27802 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
27803 and SDK data to the static linker.
27805 2023-07-13 Carl Love <cel@us.ibm.com>
27807 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
27808 built-in definition return type.
27809 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
27810 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
27811 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
27812 argument to return FPSCR fields.
27813 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
27814 the return value. Add description for
27815 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
27817 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
27820 * config/alpha/alpha.cc (alpha_emit_set_long_const):
27821 Always use DImode when constructing long const.
27823 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
27825 * haifa-sched.cc: Change TRUE/FALSE to true/false.
27827 * lra-assigns.cc: Ditto.
27828 * lra-constraints.cc: Ditto.
27829 * sel-sched.cc: Ditto.
27831 2023-07-13 Andrew Pinski <apinski@marvell.com>
27833 PR tree-optimization/110293
27834 PR tree-optimization/110539
27835 * match.pd: Expand the `x != (typeof x)(x == 0)`
27836 pattern to handle where the inner and outer comparsions
27837 are either `!=` or `==` and handle other constants
27840 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
27842 PR middle-end/109520
27843 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
27844 (lra_asm_insn_error): New prototype.
27845 * lra.cc: Include rtl_error.h.
27846 (lra_set_insn_recog_data): Initialize asm_reloads_num.
27847 (lra_asm_insn_error): New func whose code is taken from ...
27848 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
27849 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
27851 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27853 * genmatch.cc (commutative_op): Add COND_LEN_*
27854 * internal-fn.cc (first_commutative_argument): Ditto.
27856 (get_unconditional_internal_fn): Ditto.
27857 (can_interpret_as_conditional_op_p): Ditto.
27858 (internal_fn_len_index): Ditto.
27859 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
27860 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
27861 (convert_mult_to_fma): Ditto.
27862 (math_opts_dom_walker::after_dom_children): Ditto.
27864 2023-07-13 Pan Li <pan2.li@intel.com>
27866 * config/riscv/riscv.cc (vxrm_rtx): New static var.
27868 (global_state_unknown_p): Removed.
27869 (riscv_entity_mode_after): Removed.
27870 (asm_insn_p): New function.
27871 (vxrm_unknown_p): New function for fixed-point.
27872 (riscv_vxrm_mode_after): Ditto.
27873 (frm_unknown_dynamic_p): New function for floating-point.
27874 (riscv_frm_mode_after): Ditto.
27875 (riscv_mode_after): Leverage new functions.
27877 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
27879 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
27880 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
27881 calling vect_model_load_cost.
27883 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
27885 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
27886 handle memory_access_type VMAT_CONTIGUOUS, remove some
27887 VMAT_CONTIGUOUS_PERMUTE related handlings.
27888 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
27889 without calling vect_model_load_cost.
27891 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
27893 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
27894 VMAT_CONTIGUOUS_REVERSE any more.
27895 (vectorizable_load): Adjust the costing handling on
27896 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
27898 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
27900 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
27901 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
27902 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
27903 assert it will never get VMAT_LOAD_STORE_LANES.
27905 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
27907 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
27908 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
27909 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
27910 remove VMAT_GATHER_SCATTER related handlings and the related parameter
27913 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
27915 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
27916 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
27917 vect_model_load_cost.
27918 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
27919 VMAT_STRIDED_SLP any more, and remove their related handlings.
27921 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
27923 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
27924 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
27925 hoisting decision and without calling vect_model_load_cost.
27926 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
27927 and remove VMAT_INVARIANT related handlings.
27929 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
27931 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
27932 on costing with one extra argument cost_vec.
27933 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
27934 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
27935 gs_info.decl set any more.
27937 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
27939 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
27940 to vect_model_load_cost down to some different transform paths
27941 according to the handlings of different vect_memory_access_types.
27943 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
27945 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
27947 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27949 * config/riscv/autovec.md
27950 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
27951 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
27952 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
27953 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
27954 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
27955 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
27956 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
27957 (len_mask_gather_load<mode><mode>): Ditto.
27958 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
27959 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
27960 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
27961 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
27962 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
27963 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
27964 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
27965 (len_mask_scatter_store<mode><mode>): Ditto.
27966 * config/riscv/predicates.md (const_1_operand): New predicate.
27967 (vector_gs_scale_operand_16): Ditto.
27968 (vector_gs_scale_operand_32): Ditto.
27969 (vector_gs_scale_operand_64): Ditto.
27970 (vector_gs_extension_operand): Ditto.
27971 (vector_gs_scale_operand_16_rv32): Ditto.
27972 (vector_gs_scale_operand_32_rv32): Ditto.
27973 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
27974 (expand_gather_scatter): New function.
27975 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
27976 (emit_vlmax_masked_store_insn): New function.
27977 (emit_nonvlmax_masked_store_insn): Ditto.
27978 (modulo_sel_indices): Ditto.
27979 (expand_vec_perm): Fix SLP for gather/scatter.
27980 (prepare_gather_scatter): New function.
27981 (expand_gather_scatter): Ditto.
27982 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
27983 (subreg:SI (DI CONST_POLY_INT)).
27984 * config/riscv/vector-iterators.md: Add gather/scatter.
27985 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
27986 (@vec_duplicate<mode>): Ditto.
27987 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
27989 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
27991 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27993 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
27994 * config/riscv/riscv-protos.h (enum insn_type): New enum.
27995 (expand_cond_len_binop): New function.
27996 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
27997 (emit_nonvlmax_fp_tu_insn): Ditto.
27998 (need_fp_rounding_p): Ditto.
27999 (expand_cond_len_binop): Ditto.
28000 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
28001 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
28003 2023-07-12 Jan Hubicka <jh@suse.cz>
28005 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
28006 (gimple_duplicate_seme_region): ... this; break out profile updating
28008 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
28009 (ch_base::copy_headers): Update.
28010 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
28011 (gimple_duplicate_seme_region): ... this.
28013 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
28015 PR tree-optimization/107043
28016 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
28018 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
28020 PR tree-optimization/107053
28021 * gimple-range-op.cc (cfn_popcount): Use known set bits.
28023 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
28025 * ira.cc (equiv_init_varies_p): Change return type from int to bool
28026 and adjust function body accordingly.
28027 (equiv_init_movable_p): Ditto.
28028 (memref_used_between_p): Ditto.
28029 * lra-constraints.cc (valid_address_p): Ditto.
28031 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
28033 * range-op.cc (irange_to_masked_value): Remove.
28034 (update_known_bitmask): Update irange value/mask pair instead of
28035 only updating nonzero bits.
28037 2023-07-12 Jan Hubicka <jh@suse.cz>
28039 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
28040 parameter and rewrite profile updating code to handle edges elimination.
28041 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
28042 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
28043 (loop_iv_derived_p): New function.
28044 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
28045 of PHIs and propagation of IV derived variables.
28046 (ch_base::copy_headers): Pass around the invariant edges hash set.
28048 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
28050 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
28051 (last_active_insn): Change "skip_use_p" function argument to bool.
28052 (noce_operand_ok): Change return type from int to bool.
28053 (find_cond_trap): Ditto.
28054 (block_jumps_and_fallthru_p): Change "fallthru_p" and
28055 "jump_p" variables to bool.
28056 (noce_find_if_block): Change return type from int to bool.
28057 (cond_exec_find_if_block): Ditto.
28058 (find_if_case_1): Ditto.
28059 (find_if_case_2): Ditto.
28060 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
28061 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
28062 (cond_exec_process_insns): Change return type from int to bool.
28063 Change "mod_ok" function arg to bool.
28064 (cond_exec_process_if_block): Change return type from int to bool.
28065 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
28067 (noce_emit_store_flag): Change return type from int to bool.
28068 Change "reversep" function arg to bool. Change "cond_complex"
28070 (noce_try_move): Change return type from int to bool.
28071 (noce_try_ifelse_collapse): Ditto.
28072 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
28073 (noce_try_addcc): Change return type from int to bool. Change
28074 "subtract" variable to bool.
28075 (noce_try_store_flag_constants): Change return type from int to bool.
28076 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
28077 (noce_try_cmove): Change return type from int to bool.
28078 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
28079 (noce_try_minmax): Change return type from int to bool. Change
28080 "unsignedp" variable to bool.
28081 (noce_try_abs): Change return type from int to bool. Change
28082 "negate" variable to bool.
28083 (noce_try_sign_mask): Change return type from int to bool.
28084 (noce_try_move): Ditto.
28085 (noce_try_store_flag_constants): Ditto.
28086 (noce_try_cmove): Ditto.
28087 (noce_try_cmove_arith): Ditto.
28088 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
28089 (noce_try_bitop): Change return type from int to bool.
28090 (noce_operand_ok): Ditto.
28091 (noce_convert_multiple_sets): Ditto.
28092 (noce_convert_multiple_sets_1): Ditto.
28093 (noce_process_if_block): Ditto.
28094 (check_cond_move_block): Ditto.
28095 (cond_move_process_if_block): Ditto. Change "success_p"
28097 (rest_of_handle_if_conversion): Change return type to void.
28099 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28101 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
28103 (get_conditional_len_internal_fn): New function.
28104 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
28105 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
28108 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
28111 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
28113 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
28116 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
28117 define_insn_and_split derived from *add<dwi>3_doubleword_concat
28118 and *add<dwi>3_doubleword_zext.
28120 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
28123 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
28124 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
28125 (peephole2): Simplify rega = 0; rega op= rega cases.
28127 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
28129 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
28130 testing a TImode SUBREG of a 128-bit vector register against
28131 zero, use a PTEST instruction instead of first moving it to
28132 a pair of scalar registers.
28134 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
28136 * genopinit.cc (main): Adjust maximal number of optabs and
28138 * gensupport.cc (find_optab): Shift optab by 20 and mode by
28140 * optabs-query.h (optab_handler): Ditto.
28141 (convert_optab_handler): Ditto.
28143 2023-07-12 Richard Biener <rguenther@suse.de>
28145 PR tree-optimization/110630
28146 * tree-vect-slp.cc (vect_add_slp_permutation): New
28147 offset parameter, honor that for the extract code generation.
28148 (vectorizable_slp_permutation_1): Handle offsetted identities.
28150 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28152 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
28153 (umul<mode>3_highpart): Ditto.
28155 2023-07-12 Jan Beulich <jbeulich@suse.com>
28157 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
28158 alternative. Adjust original last alternative's "prefix"
28159 attribute to maybe_evex.
28161 2023-07-12 Jan Beulich <jbeulich@suse.com>
28163 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
28164 vbroadcastss for AVX2. New AVX512F alternative.
28165 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
28166 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
28168 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28170 * config/riscv/peephole.md: Remove XThead* peephole passes.
28171 * config/riscv/thead.md: Include thead-peephole.md.
28172 * config/riscv/thead-peephole.md: New file.
28174 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28176 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
28178 (riscv_index_reg_class): Likewise.
28179 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
28180 (riscv_index_reg_class): New function.
28181 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
28182 riscv_index_reg_class().
28183 (REGNO_OK_FOR_INDEX_P): Call new function
28184 riscv_regno_ok_for_index_p().
28186 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28188 * config/riscv/riscv-protos.h (enum riscv_address_type):
28189 New location of type definition.
28190 (struct riscv_address_info): Likewise.
28191 * config/riscv/riscv.cc (enum riscv_address_type):
28192 Old location of type definition.
28193 (struct riscv_address_info): Likewise.
28195 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28197 * config/riscv/riscv.h (Xmode): New macro.
28199 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28201 * config/riscv/riscv.cc (riscv_print_operand_address): Use
28202 output_addr_const rather than riscv_print_operand.
28204 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28206 * config/riscv/thead.md: Adjust constraints of th_addsl.
28208 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28210 * config/riscv/thead.cc (th_mempair_operands_p):
28211 Fix documentation of th_mempair_order_operands().
28213 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28215 * config/riscv/thead.cc (th_mempair_save_regs):
28216 Emit REG_FRAME_RELATED_EXPR notes in prologue.
28218 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28220 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
28221 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
28222 New XThead extension INSN.
28223 (*zero_extendsidi2_th_extu): New XThead extension INSN.
28224 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
28226 2023-07-12 liuhongt <hongtao.liu@intel.com>
28230 * config/i386/predicates.md
28231 (int_float_vector_all_ones_operand): New predicate.
28232 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
28234 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
28236 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
28238 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
28239 define_insn_and_split to avoid false dependence.
28240 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
28241 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
28242 of operands 1 to '0' to avoid false dependence.
28243 (*andnot<mode>3): Ditto.
28244 (iornot<mode>3): Ditto.
28245 (*<nlogic><mode>3): Ditto.
28247 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
28249 * common/config/i386/cpuinfo.h
28250 (get_intel_cpu): Handle Granite Rapids D.
28251 * common/config/i386/i386-common.cc:
28252 (processor_alias_table): Add graniterapids-d.
28253 * common/config/i386/i386-cpuinfo.h
28254 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
28255 * config.gcc: Add -march=graniterapids-d.
28256 * config/i386/driver-i386.cc (host_detect_local_cpu):
28257 Handle graniterapids-d.
28258 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
28259 * doc/extend.texi: Add graniterapids-d.
28260 * doc/invoke.texi: Ditto.
28262 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
28264 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
28265 Add OPTION_MASK_ISA_AVX512VL.
28266 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
28269 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28271 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
28272 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
28273 (shuffle_compress_patterns): Ditto.
28274 (expand_vec_perm_const_1): Ditto.
28276 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
28278 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
28279 * cfghooks.h (struct cfg_hooks): Change return type of
28280 verify_flow_info from integer to bool.
28281 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
28282 (can_delete_label_p): Ditto.
28283 (rtl_verify_flow_info): Change return type from int to bool
28284 and adjust function body accordingly. Change "err" variable to bool.
28285 (rtl_verify_flow_info_1): Ditto.
28286 (free_bb_for_insn): Change return type to void.
28287 (rtl_merge_blocks): Change "b_empty" variable to bool.
28288 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
28289 (verify_hot_cold_block_grouping): Change return type from int to bool.
28290 Change "err" variable to bool.
28291 (rtl_verify_edges): Ditto.
28292 (rtl_verify_bb_insns): Ditto.
28293 (rtl_verify_bb_pointers): Ditto.
28294 (rtl_verify_bb_insn_chain): Ditto.
28295 (rtl_verify_fallthru): Ditto.
28296 (rtl_verify_bb_layout): Ditto.
28297 (purge_all_dead_edges): Change "purged" variable to bool.
28298 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
28299 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
28300 (load_killed_in_block_p): Change return type from int to bool
28301 and adjust function body accordingly.
28302 (oprs_unchanged_p): Return true/false.
28303 (rest_of_handle_gcse2): Change return type to void.
28304 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
28305 int to bool. Change "err" variable to bool.
28307 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
28309 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
28311 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28313 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
28314 * internal-fn.cc (cond_len_unary_direct): Ditto.
28315 (cond_len_binary_direct): Ditto.
28316 (cond_len_ternary_direct): Ditto.
28317 (expand_cond_len_unary_optab_fn): Ditto.
28318 (expand_cond_len_binary_optab_fn): Ditto.
28319 (expand_cond_len_ternary_optab_fn): Ditto.
28320 (direct_cond_len_unary_optab_supported_p): Ditto.
28321 (direct_cond_len_binary_optab_supported_p): Ditto.
28322 (direct_cond_len_ternary_optab_supported_p): Ditto.
28323 * internal-fn.def (COND_LEN_ADD): Ditto.
28324 (COND_LEN_SUB): Ditto.
28325 (COND_LEN_MUL): Ditto.
28326 (COND_LEN_DIV): Ditto.
28327 (COND_LEN_MOD): Ditto.
28328 (COND_LEN_RDIV): Ditto.
28329 (COND_LEN_MIN): Ditto.
28330 (COND_LEN_MAX): Ditto.
28331 (COND_LEN_FMIN): Ditto.
28332 (COND_LEN_FMAX): Ditto.
28333 (COND_LEN_AND): Ditto.
28334 (COND_LEN_IOR): Ditto.
28335 (COND_LEN_XOR): Ditto.
28336 (COND_LEN_SHL): Ditto.
28337 (COND_LEN_SHR): Ditto.
28338 (COND_LEN_FMA): Ditto.
28339 (COND_LEN_FMS): Ditto.
28340 (COND_LEN_FNMA): Ditto.
28341 (COND_LEN_FNMS): Ditto.
28342 (COND_LEN_NEG): Ditto.
28343 * optabs.def (OPTAB_D): Ditto.
28345 2023-07-11 Richard Biener <rguenther@suse.de>
28347 PR tree-optimization/110614
28348 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
28349 SLP splats are not suitable for re-align ops.
28351 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
28353 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
28355 (vsx_quad_dform_memory_operand): Likewise.
28357 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
28359 * reorg.cc (stop_search_p): Change return type from int to bool
28360 and adjust function body accordingly.
28361 (resource_conflicts_p): Ditto.
28362 (insn_references_resource_p): Change return type from int to bool.
28363 (insn_sets_resource_p): Ditto.
28364 (redirect_with_delay_slots_safe_p): Ditto.
28365 (condition_dominates_p): Change return type from int to bool
28366 and adjust function body accordingly.
28367 (redirect_with_delay_list_safe_p): Ditto.
28368 (check_annul_list_true_false): Ditto. Change "annul_true_p"
28369 function argument to bool.
28370 (steal_delay_list_from_target): Change "pannul_p" function
28371 argument to bool pointer. Change "must_annul" and "used_annul"
28372 variables from int to bool.
28373 (steal_delay_list_from_fallthrough): Ditto.
28374 (own_thread_p): Change return type from int to bool and adjust
28375 function body accordingly. Change "allow_fallthrough" function
28377 (reorg_redirect_jump): Change return type from int to bool.
28378 (fill_simple_delay_slots): Change "non_jumps_p" function
28379 argument from int to bool. Change "maybe_never" varible to bool.
28380 (fill_slots_from_thread): Change "likely", "thread_if_true" and
28381 "own_thread" function arguments to bool. Change "lose" and
28382 "must_annul" variables to bool.
28383 (delete_from_delay_slot): Change "had_barrier" variable to bool.
28384 (try_merge_delay_insns): Change "annul_p" variable to bool.
28385 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
28387 (rest_of_handle_delay_slots): Change return type from int to void
28388 and adjust function body accordingly.
28390 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
28392 * doc/extend.texi (RISC-V Operand Modifiers): New.
28394 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28396 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
28397 (insert_insn_end_basic_block): Ditto.
28398 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
28399 * gcse.cc (insert_insn_end_basic_block): Export as global function.
28400 * gcse.h (insert_insn_end_basic_block): Ditto.
28402 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
28405 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
28406 (arm_builtin_decl): Hahndle MVE builtins.
28407 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
28408 (add_unique_function): Fix handling of
28409 __ARM_MVE_PRESERVE_USER_NAMESPACE.
28410 (add_overloaded_function): Likewise.
28411 * config/arm/arm-protos.h (builtin_decl): New declaration.
28413 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
28415 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
28417 2023-07-10 Xi Ruoyao <xry111@xry111.site>
28419 PR tree-optimization/110557
28420 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
28421 Ensure the output sign-extended if necessary.
28423 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
28425 * config/i386/i386.md (peephole2): Transform xchg insn with a
28426 REG_UNUSED note to a (simple) move.
28427 (*insvti_lowpart_1): New define_insn_and_split.
28428 (*insvdi_lowpart_1): Likewise.
28430 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
28432 * config/i386/i386-features.cc (compute_convert_gain): Tweak
28433 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
28434 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
28435 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
28437 2023-07-10 liuhongt <hongtao.liu@intel.com>
28440 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
28441 splitter to detect fp max pattern.
28442 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
28444 2023-07-09 Jan Hubicka <jh@suse.cz>
28446 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
28447 (dump_edge_info): Likewise.
28448 (dump_bb_info): Likewise.
28449 * profile-count.cc (profile_count::dump): Add comma between quality and
28452 2023-07-08 Jan Hubicka <jh@suse.cz>
28454 PR tree-optimization/110600
28455 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
28457 2023-07-08 Jan Hubicka <jh@suse.cz>
28459 PR middle-end/110590
28460 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
28461 inner loops and be more careful about inconsistent profiles.
28462 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
28463 exit is followed by other exit.
28465 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
28467 * cprop.cc (reg_available_p): Change return type from int to bool.
28468 (reg_not_set_p): Ditto.
28469 (try_replace_reg): Ditto. Change "success" variable to bool.
28470 (cprop_jump): Change return type from int to void
28471 and adjust function body accordingly.
28472 (constprop_register): Ditto.
28473 (cprop_insn): Ditto. Change "changed" variable to bool.
28474 (local_cprop_pass): Change return type from int to void
28475 and adjust function body accordingly.
28476 (bypass_block): Ditto. Change "change", "may_be_loop_header"
28477 and "removed_p" variables to bool.
28478 (bypass_conditional_jumps): Change return type from int to void
28479 and adjust function body accordingly. Change "changed"
28481 (one_cprop_pass): Ditto.
28483 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
28485 * gcse.cc (expr_equiv_p): Change return type from int to bool.
28486 (oprs_unchanged_p): Change return type from int to void
28487 and adjust function body accordingly.
28488 (oprs_anticipatable_p): Ditto.
28489 (oprs_available_p): Ditto.
28490 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
28491 arguments to bool. Change "found" variable to bool.
28492 (load_killed_in_block_p): Change return type from int to void and
28493 adjust function body accordingly. Change "avail_p" argument to bool.
28494 (pre_expr_reaches_here_p): Change return type from int to void
28495 and adjust function body accordingly.
28496 (pre_delete): Ditto. Change "changed" variable to bool.
28497 (pre_gcse): Change return type from int to void
28498 and adjust function body accordingly. Change "did_insert" and
28499 "changed" variables to bool.
28500 (one_pre_gcse_pass): Change return type from int to void
28501 and adjust function body accordingly. Change "changed" variable
28503 (should_hoist_expr_to_dom): Change return type from int to void
28504 and adjust function body accordingly. Change
28505 "visited_allocated_locally" variable to bool.
28506 (hoist_code): Change return type from int to void and adjust
28507 function body accordingly. Change "changed" variable to bool.
28508 (one_code_hoisting_pass): Ditto.
28509 (pre_edge_insert): Change return type from int to void and adjust
28510 function body accordingly. Change "did_insert" variable to bool.
28511 (pre_expr_reaches_here_p_work): Change return type from int to void
28512 and adjust function body accordingly.
28513 (simple_mem): Ditto.
28514 (want_to_gcse_p): Change return type from int to void
28515 and adjust function body accordingly.
28516 (can_assign_to_reg_without_clobbers_p): Update function body
28517 for bool return type.
28518 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
28519 (pre_insert_copies): Change "added_copy" variable to bool.
28521 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
28525 * doc/invoke.texi (Warning Options): Fix typos.
28527 2023-07-07 Jan Hubicka <jh@suse.cz>
28529 * profile-count.cc (profile_count::dump): Add FUN
28530 parameter; print relative frequency.
28531 (profile_count::debug): Update.
28532 * profile-count.h (profile_count::dump): Update
28535 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
28539 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
28540 TImode destinations from paradoxical SUBREGs (setting the lowpart)
28541 into explicit zero extensions. Use *insvti_highpart_1 instruction
28542 to set the highpart of a TImode destination.
28544 2023-07-07 Jan Hubicka <jh@suse.cz>
28546 * predict.cc (force_edge_cold): Use
28547 set_edge_probability_and_rescale_others; improve dumps.
28549 2023-07-07 Jan Hubicka <jh@suse.cz>
28551 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
28553 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
28556 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
28558 * config/s390/s390.cc (vec_init): Fix default case
28560 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
28562 * lra-assigns.cc (assign_by_spills): Add reload insns involving
28563 reload pseudos with non-refined class to be processed on the next
28565 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
28566 (in_class_p): Use it.
28567 (print_curr_insn_alt): New func.
28568 (process_alt_operands): Use it. Improve debug info.
28569 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
28570 pseudo class if it is not refined yet.
28572 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
28574 * value-range.cc (irange::get_bitmask_from_range): Return all the
28575 known bits for a singleton.
28576 (irange::set_range_from_bitmask): Set a range of a singleton when
28577 all bits are known.
28579 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
28581 * value-range.cc (irange::intersect): Leave normalization to
28584 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
28586 * data-streamer-in.cc (streamer_read_value_range): Adjust for
28588 * data-streamer-out.cc (streamer_write_vrange): Same.
28589 * range-op.cc (operator_cast::fold_range): Same.
28590 * value-range-pretty-print.cc
28591 (vrange_printer::print_irange_bitmasks): Same.
28592 * value-range-storage.cc (irange_storage::write_lengths_address):
28594 (irange_storage::set_irange): Same.
28595 (irange_storage::get_irange): Same.
28596 (irange_storage::size): Same.
28597 (irange_storage::dump): Same.
28598 * value-range-storage.h: Same.
28599 * value-range.cc (debug): New.
28600 (irange_bitmask::dump): New.
28601 (add_vrange): Adjust for value/mask.
28602 (irange::operator=): Same.
28603 (irange::set): Same.
28604 (irange::verify_range): Same.
28605 (irange::operator==): Same.
28606 (irange::contains_p): Same.
28607 (irange::irange_single_pair_union): Same.
28608 (irange::union_): Same.
28609 (irange::intersect): Same.
28610 (irange::invert): Same.
28611 (irange::get_nonzero_bits_from_range): Rename to...
28612 (irange::get_bitmask_from_range): ...this.
28613 (irange::set_range_from_nonzero_bits): Rename to...
28614 (irange::set_range_from_bitmask): ...this.
28615 (irange::set_nonzero_bits): Rename to...
28616 (irange::update_bitmask): ...this.
28617 (irange::get_nonzero_bits): Rename to...
28618 (irange::get_bitmask): ...this.
28619 (irange::intersect_nonzero_bits): Rename to...
28620 (irange::intersect_bitmask): ...this.
28621 (irange::union_nonzero_bits): Rename to...
28622 (irange::union_bitmask): ...this.
28623 (irange_bitmask::verify_mask): New.
28624 * value-range.h (class irange_bitmask): New.
28625 (irange_bitmask::set_unknown): New.
28626 (irange_bitmask::unknown_p): New.
28627 (irange_bitmask::irange_bitmask): New.
28628 (irange_bitmask::get_precision): New.
28629 (irange_bitmask::get_nonzero_bits): New.
28630 (irange_bitmask::set_nonzero_bits): New.
28631 (irange_bitmask::operator==): New.
28632 (irange_bitmask::union_): New.
28633 (irange_bitmask::intersect): New.
28634 (class irange): Friend vrange_printer.
28635 (irange::varying_compatible_p): Adjust for bitmask.
28636 (irange::set_varying): Same.
28637 (irange::set_nonzero): Same.
28639 2023-07-07 Jan Beulich <jbeulich@suse.com>
28641 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
28643 2023-07-07 Jan Beulich <jbeulich@suse.com>
28645 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
28646 alternative. Switch new last alternative's "isa" attribute to
28648 (vec_extract_hi_v32qi): Likewise.
28650 2023-07-07 Pan Li <pan2.li@intel.com>
28651 Robin Dapp <rdapp@ventanamicro.com>
28653 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
28655 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
28656 (riscv_mode_exit): Likewise for exit mode.
28657 (riscv_mode_needed): Likewise for needed mode.
28658 (riscv_mode_after): Likewise for after mode.
28660 2023-07-07 Pan Li <pan2.li@intel.com>
28662 * config/riscv/vector.md: Fix typo.
28664 2023-07-06 Jan Hubicka <jh@suse.cz>
28666 PR middle-end/25623
28667 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
28668 of iterations determined.
28669 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
28671 2023-07-06 Jan Hubicka <jh@suse.cz>
28673 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
28674 probability update to be safe on loops with subloops.
28675 Make bound parameter to be iteration bound.
28676 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
28677 of scale_loop_profile.
28678 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
28680 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
28682 PR tree-optimization/110449
28683 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
28684 vec_loop for the unrolled loop.
28686 2023-07-06 Jan Hubicka <jh@suse.cz>
28688 * cfg.cc (set_edge_probability_and_rescale_others): New function.
28689 (update_bb_profile_for_threading): Use it; simplify the rest.
28690 * cfg.h (set_edge_probability_and_rescale_others): Declare.
28691 * profile-count.h (profile_probability::apply_scale): New.
28693 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
28695 * doc/extend.texi (ARC Built-in Functions): Update documentation
28696 with missing builtins.
28698 2023-07-06 Richard Biener <rguenther@suse.de>
28700 PR tree-optimization/110556
28701 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
28702 assign code and all operands of non-stores.
28704 2023-07-06 Richard Biener <rguenther@suse.de>
28706 PR tree-optimization/110563
28707 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
28708 Remove second argument.
28709 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
28710 Remove for_epilogue_p argument. Merge assert ...
28711 (vect_analyze_loop_2): ... with check done before determining
28712 partial vectors by moving it after.
28713 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
28715 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28717 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
28718 few things re 'reorder' option and strings.
28719 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
28721 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28723 * gengtype-parse.cc: Clean up obsolete parametrized structs
28725 * gengtype.cc: Likewise.
28726 * gengtype.h: Likewise.
28728 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28730 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
28733 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28735 * gengtype-parse.cc (token_names): Add '"user"'.
28736 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
28737 'FIRST_TOKEN_WITH_VALUE'.
28739 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28741 * doc/gty.texi (GTY Options) <string_length>: Enhance.
28743 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28745 * gengtype.cc (write_root, write_roots): Explicitly reject
28746 'string_length' option.
28747 * doc/gty.texi (GTY Options) <string_length>: Document.
28749 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28751 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
28752 (ggc_pch_write_object): Remove 'bool is_string' argument.
28753 * ggc-common.cc: Adjust.
28754 * ggc-page.cc: Likewise.
28756 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
28758 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
28760 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
28762 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
28763 and add description for inling of function with arch and tune
28766 2023-07-06 Richard Biener <rguenther@suse.de>
28768 PR tree-optimization/110515
28769 * tree-ssa-pre.cc (compute_avail): Make code dealing
28770 with hoisting loads with different alias-sets more
28773 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28775 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
28777 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
28779 * config/i386/i386.cc (ix86_can_inline_p): If callee has
28780 default arch=x86-64 and tune=generic, do not block the
28781 inlining to its caller. Also allow callee with different
28782 arch= to be inlined if it has always_inline attribute and
28783 it's ISA is subset of caller's.
28785 2023-07-06 liuhongt <hongtao.liu@intel.com>
28787 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
28788 DF/SFmode AND/IOR/XOR/ANDN operations.
28790 2023-07-06 Andrew Pinski <apinski@marvell.com>
28792 PR middle-end/110554
28793 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
28794 just build using boolean_type_node instead of the cond_type.
28795 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
28796 that will feed into the COND_EXPR.
28798 2023-07-06 liuhongt <hongtao.liu@intel.com>
28801 * config/i386/i386.md (movdf_internal): Disparage slightly for
28802 2 alternatives (r,v) and (v,r) by adding constraint modifier
28805 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
28808 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
28809 initialization of new_addr.
28811 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
28813 PR tree-optimization/110474
28814 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
28815 unroll factor while selecting the epilog vect loop VF.
28817 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
28819 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
28822 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
28824 * gimple-range-gori.cc (compute_operand_range): After calling
28825 compute_operand2_range, recursively call self if needed.
28826 (compute_operand2_range): Turn into a leaf function.
28827 (gori_compute::compute_operand1_and_operand2_range): Finish
28828 operand2 calculation.
28829 * gimple-range-gori.h (compute_operand2_range): Remove name param.
28831 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
28833 * gimple-range-gori.cc (compute_operand_range): After calling
28834 compute_operand1_range, recursively call self if needed.
28835 (compute_operand1_range): Turn into a leaf function.
28836 (gori_compute::compute_operand1_and_operand2_range): Finish
28837 operand1 calculation.
28838 * gimple-range-gori.h (compute_operand1_range): Remove name param.
28840 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
28842 * gimple-range-gori.cc (compute_operand_range): Check for
28843 operand interdependence when both op1 and op2 are computed.
28844 (compute_operand1_and_operand2_range): No checks required now.
28846 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
28848 * gimple-range-gori.cc (compute_operand_range): Check for
28849 a relation between op1 and op2 and use that instead.
28850 (compute_operand1_range): Don't look for a relation override.
28851 (compute_operand2_range): Ditto.
28853 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
28855 * doc/contrib.texi (Contributors): Update my entry.
28857 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
28859 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
28862 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
28864 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
28865 scehdule_more_p and contributes_to_priority indirect frunction
28866 type from int to bool.
28867 (no_real_insns_p): Change return type from int to bool.
28868 (contributes_to_priority): Ditto.
28869 * haifa-sched.cc (no_real_insns_p): Change return type from
28870 int to bool and adjust function body accordingly.
28871 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
28872 variable type from int to bool.
28873 (ps_insn_advance_column): Change return type from int to bool.
28874 (ps_has_conflicts): Ditto. Change "has_conflicts"
28875 variable type from int to bool.
28876 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
28877 (conditions_mutex_p): Ditto.
28878 * sched-ebb.cc (schedule_more_p): Ditto.
28879 (ebb_contributes_to_priority): Change return type from
28880 int to bool and adjust function body accordingly.
28881 * sched-rgn.cc (is_cfg_nonregular): Ditto.
28882 (check_live_1): Ditto.
28884 (find_conditional_protection): Ditto.
28885 (is_conditionally_protected): Ditto.
28886 (is_prisky): Ditto.
28887 (is_exception_free): Ditto.
28888 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
28889 variables from int to bool.
28890 (extend_rgns): Change "rescan" variable from int to bool.
28891 (check_live): Change return type from
28892 int to bool and adjust function body accordingly.
28893 (can_schedule_ready_p): Ditto.
28894 (schedule_more_p): Ditto.
28895 (contributes_to_priority): Ditto.
28897 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
28899 * doc/md.texi: Document that vec_set and vec_extract must not
28901 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
28902 (gimple_expand_vec_set_extract_expr): ...to this.
28903 (gimple_expand_vec_exprs): Call renamed function.
28904 * internal-fn.cc (vec_extract_direct): Add.
28905 (expand_vec_extract_optab_fn): New function to expand
28907 (direct_vec_extract_optab_supported_p): Add.
28908 * internal-fn.def (VEC_EXTRACT): Add.
28909 * optabs.cc (can_vec_extract_var_idx_p): New function.
28910 * optabs.h (can_vec_extract_var_idx_p): Declare.
28912 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
28914 * config/riscv/autovec.md: Add gen_lowpart.
28916 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
28918 * config/riscv/autovec.md: Allow register index operand.
28920 2023-07-05 Pan Li <pan2.li@intel.com>
28922 * config/riscv/riscv-vector-builtins.cc
28923 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
28925 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
28927 * config/riscv/autovec.md: Use float_truncate.
28929 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28931 * internal-fn.cc (internal_fn_len_index): Apply
28932 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
28933 (internal_fn_mask_index): Ditto.
28934 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
28935 (supports_vec_scatter_store_p): Ditto.
28936 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
28937 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
28938 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
28939 (vect_get_strided_load_store_ops): Ditto.
28940 (vectorizable_store): Ditto.
28941 (vectorizable_load): Ditto.
28943 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
28944 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28946 * simplify-rtx.cc (native_encode_rtx): Ditto.
28947 (native_decode_vector_rtx): Ditto.
28948 (simplify_const_vector_byte_offset): Ditto.
28949 (simplify_const_vector_subreg): Ditto.
28950 * tree.cc (build_truth_vector_type_for_mode): Ditto.
28951 * varasm.cc (output_constant_pool_2): Ditto.
28953 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
28955 * config/mips/mips.cc (mips_expand_block_move): don't expand for
28956 r6 with -mno-unaligned-access option if one or both of src and
28957 dest are unaligned. restruct: return directly if length is not const.
28958 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
28960 2023-07-05 Jan Beulich <jbeulich@suse.com>
28963 * config/i386/sse.md: New splitters to simplify
28964 not;vec_duplicate as a singular vpternlog.
28965 (one_cmpl<mode>2): Allow broadcast for operand 1.
28966 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
28968 2023-07-05 Jan Beulich <jbeulich@suse.com>
28971 * config/i386/sse.md: New splitters to simplify
28972 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
28974 2023-07-05 Jan Beulich <jbeulich@suse.com>
28977 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
28978 form of splitter for PR target/100711.
28980 2023-07-05 Richard Biener <rguenther@suse.de>
28982 PR middle-end/110541
28983 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
28986 2023-07-05 Jan Beulich <jbeulich@suse.com>
28989 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
28990 for memory form operand 1.
28992 2023-07-05 Jan Beulich <jbeulich@suse.com>
28995 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
28996 bitwise vector operations.
28997 * config/i386/sse.md (*iornot<mode>3): New insn.
28998 (*xnor<mode>3): Likewise.
28999 (*<nlogic><mode>3): Likewise.
29000 (andor): New code iterator.
29001 (nlogic): New code attribute.
29002 (ternlog_nlogic): Likewise.
29004 2023-07-05 Richard Biener <rguenther@suse.de>
29006 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
29008 2023-07-05 yulong <shiyulong@iscas.ac.cn>
29010 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
29012 2023-07-05 yulong <shiyulong@iscas.ac.cn>
29014 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
29015 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
29016 (ADJUST_ALIGNMENT): Ditto.
29017 (RVV_TUPLE_PARTIAL_MODES): Ditto.
29018 (ADJUST_NUNITS): Ditto.
29019 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
29021 (vfloat16mf4x3_t): Ditto.
29022 (vfloat16mf4x4_t): Ditto.
29023 (vfloat16mf4x5_t): Ditto.
29024 (vfloat16mf4x6_t): Ditto.
29025 (vfloat16mf4x7_t): Ditto.
29026 (vfloat16mf4x8_t): Ditto.
29027 (vfloat16mf2x2_t): Ditto.
29028 (vfloat16mf2x3_t): Ditto.
29029 (vfloat16mf2x4_t): Ditto.
29030 (vfloat16mf2x5_t): Ditto.
29031 (vfloat16mf2x6_t): Ditto.
29032 (vfloat16mf2x7_t): Ditto.
29033 (vfloat16mf2x8_t): Ditto.
29034 (vfloat16m1x2_t): Ditto.
29035 (vfloat16m1x3_t): Ditto.
29036 (vfloat16m1x4_t): Ditto.
29037 (vfloat16m1x5_t): Ditto.
29038 (vfloat16m1x6_t): Ditto.
29039 (vfloat16m1x7_t): Ditto.
29040 (vfloat16m1x8_t): Ditto.
29041 (vfloat16m2x2_t): Ditto.
29042 (vfloat16m2x3_t): Ditto.
29043 (vfloat16m2x4_t): Ditto.
29044 (vfloat16m4x2_t): Ditto.
29045 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
29046 (vfloat16mf4x3_t): Ditto.
29047 (vfloat16mf4x4_t): Ditto.
29048 (vfloat16mf4x5_t): Ditto.
29049 (vfloat16mf4x6_t): Ditto.
29050 (vfloat16mf4x7_t): Ditto.
29051 (vfloat16mf4x8_t): Ditto.
29052 (vfloat16mf2x2_t): Ditto.
29053 (vfloat16mf2x3_t): Ditto.
29054 (vfloat16mf2x4_t): Ditto.
29055 (vfloat16mf2x5_t): Ditto.
29056 (vfloat16mf2x6_t): Ditto.
29057 (vfloat16mf2x7_t): Ditto.
29058 (vfloat16mf2x8_t): Ditto.
29059 (vfloat16m1x2_t): Ditto.
29060 (vfloat16m1x3_t): Ditto.
29061 (vfloat16m1x4_t): Ditto.
29062 (vfloat16m1x5_t): Ditto.
29063 (vfloat16m1x6_t): Ditto.
29064 (vfloat16m1x7_t): Ditto.
29065 (vfloat16m1x8_t): Ditto.
29066 (vfloat16m2x2_t): Ditto.
29067 (vfloat16m2x3_t): Ditto.
29068 (vfloat16m2x4_t): Ditto.
29069 (vfloat16m4x2_t): Ditto.
29070 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
29071 * config/riscv/riscv.md: New.
29072 * config/riscv/vector-iterators.md: New.
29074 2023-07-04 Andrew Pinski <apinski@marvell.com>
29076 PR tree-optimization/110487
29077 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
29078 build a nonstandard integer and use that.
29080 2023-07-04 Andrew Pinski <apinski@marvell.com>
29082 * match.pd (a?-1:0): Cast type an integer type
29083 rather the type before the negative.
29084 (a?0:-1): Likewise.
29086 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29088 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
29089 Change to use HARD_REG_BIT and its macros.
29090 * config/xtensa/xtensa.md
29091 (peephole2: regmove elimination during DFmode input reload):
29094 2023-07-04 Richard Biener <rguenther@suse.de>
29096 PR tree-optimization/110491
29097 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
29098 whether the PHI args are possibly undefined before folding
29101 2023-07-04 Pan Li <pan2.li@intel.com>
29102 Thomas Schwinge <thomas@codesourcery.com>
29104 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
29105 bits for machine mode table.
29106 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
29107 HOST machine mode bits.
29108 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
29109 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
29111 * tree-streamer.h (streamer_mode_table): Ditto.
29112 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
29113 as the packing limit.
29114 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
29116 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
29118 * lto-streamer.h (class lto_input_block): Capture
29119 'lto_file_decl_data *file_data' instead of just
29120 'unsigned char *mode_table'.
29121 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
29122 * ipa-fnsummary.cc (inline_read_section): Likewise.
29123 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
29124 * ipa-modref.cc (read_section): Likewise.
29125 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
29127 * ipa-sra.cc (isra_read_summary_section): Likewise.
29128 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
29129 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
29130 * lto-streamer-in.cc (lto_read_body_or_constructor)
29131 (lto_input_toplevel_asms): Likewise.
29132 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
29134 2023-07-04 Richard Biener <rguenther@suse.de>
29136 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
29137 (empty_bb_or_one_feeding_into_p): Check for them.
29138 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
29139 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
29141 2023-07-04 Richard Biener <rguenther@suse.de>
29143 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
29144 check guarding scalar_niter underflow.
29146 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
29148 PR tree-optimization/110531
29149 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
29150 slp_done_for_suggested_uf to false.
29152 2023-07-04 Richard Biener <rguenther@suse.de>
29154 PR tree-optimization/110228
29155 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
29156 Mark SSA may-undefs.
29157 (bb_no_side_effects_p): Check stmt uses for undefs.
29159 2023-07-04 Richard Biener <rguenther@suse.de>
29161 PR tree-optimization/110436
29162 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
29163 force live but not relevant pattern stmts relevant.
29165 2023-07-04 Lili Cui <lili.cui@intel.com>
29167 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
29168 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
29170 2023-07-04 Richard Biener <rguenther@suse.de>
29172 PR middle-end/110495
29173 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
29174 since we do not set TREE_OVERFLOW on those since the
29175 introduction of VL vectors.
29176 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
29177 at TREE_OVERFLOW to determine validity of association.
29179 2023-07-04 Richard Biener <rguenther@suse.de>
29181 PR tree-optimization/110310
29182 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
29183 Move costing part ...
29184 (vect_analyze_loop_costing): ... here. Integrate better
29185 estimate for epilogues from ...
29186 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
29187 with actual epilogue status.
29188 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
29189 avoid cancelling epilogue vectorization.
29190 (vect_update_epilogue_niters): Remove. No longer update
29191 epilogue LOOP_VINFO_NITERS.
29193 2023-07-04 Pan Li <pan2.li@intel.com>
29196 2023-07-03 Pan Li <pan2.li@intel.com>
29198 * config/riscv/vector.md: Fix typo.
29200 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29202 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
29203 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
29204 (expand_gather_load_optab_fn): Ditto.
29205 (internal_load_fn_p): Ditto.
29206 (internal_store_fn_p): Ditto.
29207 (internal_gather_scatter_fn_p): Ditto.
29208 (internal_fn_len_index): Ditto.
29209 (internal_fn_mask_index): Ditto.
29210 (internal_fn_stored_value_index): Ditto.
29211 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
29212 (LEN_MASK_SCATTER_STORE): Ditto.
29213 * optabs.def (OPTAB_CD): Ditto.
29215 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29217 * config/riscv/riscv-vsetvl.cc
29218 (vector_insn_info::parse_insn): Add early break.
29220 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
29222 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
29223 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
29225 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
29227 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
29229 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
29231 * common/config/riscv/riscv-common.cc: Add support for zvbb,
29232 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
29233 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
29234 * config/riscv/arch-canonicalize: Add canonicalization info for
29235 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
29236 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
29237 (MASK_ZVBC): Likewise.
29238 (TARGET_ZVBB): Likewise.
29239 (TARGET_ZVBC): Likewise.
29240 (MASK_ZVKG): Likewise.
29241 (MASK_ZVKNED): Likewise.
29242 (MASK_ZVKNHA): Likewise.
29243 (MASK_ZVKNHB): Likewise.
29244 (MASK_ZVKSED): Likewise.
29245 (MASK_ZVKSH): Likewise.
29246 (MASK_ZVKN): Likewise.
29247 (MASK_ZVKNC): Likewise.
29248 (MASK_ZVKNG): Likewise.
29249 (MASK_ZVKS): Likewise.
29250 (MASK_ZVKSC): Likewise.
29251 (MASK_ZVKSG): Likewise.
29252 (MASK_ZVKT): Likewise.
29253 (TARGET_ZVKG): Likewise.
29254 (TARGET_ZVKNED): Likewise.
29255 (TARGET_ZVKNHA): Likewise.
29256 (TARGET_ZVKNHB): Likewise.
29257 (TARGET_ZVKSED): Likewise.
29258 (TARGET_ZVKSH): Likewise.
29259 (TARGET_ZVKN): Likewise.
29260 (TARGET_ZVKNC): Likewise.
29261 (TARGET_ZVKNG): Likewise.
29262 (TARGET_ZVKS): Likewise.
29263 (TARGET_ZVKSC): Likewise.
29264 (TARGET_ZVKSG): Likewise.
29265 (TARGET_ZVKT): Likewise.
29266 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
29268 2023-07-03 Andrew Pinski <apinski@marvell.com>
29270 PR middle-end/110510
29271 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
29273 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
29275 * config/darwin.h: Avoid duplicate multiply_defined specs on
29276 earlier Darwin versions with shared libgcc.
29278 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
29280 * tree.h (tree_int_cst_equal): Change return type from int to bool.
29281 (operand_equal_for_phi_arg_p): Ditto.
29282 (tree_map_base_marked_p): Ditto.
29283 * tree.cc (contains_placeholder_p): Update function body
29284 for bool return type.
29285 (type_cache_hasher::equal): Ditto.
29286 (tree_map_base_hash): Change return type
29287 from int to void and adjust function body accordingly.
29288 (tree_int_cst_equal): Ditto.
29289 (operand_equal_for_phi_arg_p): Ditto.
29290 (get_narrower): Change "first" variable to bool.
29291 (cl_option_hasher::equal): Update function body for bool return type.
29292 * ggc.h (ggc_set_mark): Change return type from int to bool.
29293 (ggc_marked_p): Ditto.
29294 * ggc-page.cc (gt_ggc_mx): Change return type
29295 from int to void and adjust function body accordingly.
29296 (ggc_set_mark): Ditto.
29298 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29300 * config/riscv/autovec.md: Change order of
29301 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
29302 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
29303 * doc/md.texi: Ditto.
29304 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
29305 * internal-fn.cc (len_maskload_direct): Ditto.
29306 (len_maskstore_direct): Ditto.
29307 (add_len_and_mask_args): New function.
29308 (expand_partial_load_optab_fn): Change order of
29309 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
29310 (expand_partial_store_optab_fn): Ditto.
29311 (internal_fn_len_index): New function.
29312 (internal_fn_mask_index): Change order of
29313 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
29314 (internal_fn_stored_value_index): Ditto.
29315 (internal_len_load_store_bias): Ditto.
29316 * internal-fn.h (internal_fn_len_index): New function.
29317 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
29318 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
29319 * tree-vect-stmts.cc (vectorizable_store): Ditto.
29320 (vectorizable_load): Ditto.
29322 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
29325 * doc/gm2.texi (Semantic checking): Include examples using
29326 -Wuninit-variable-checking.
29328 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29330 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
29331 (*single_widen_fnma<mode>): Ditto.
29332 (*double_widen_fms<mode>): Ditto.
29333 (*single_widen_fms<mode>): Ditto.
29334 (*double_widen_fnms<mode>): Ditto.
29335 (*single_widen_fnms<mode>): Ditto.
29337 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29339 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
29340 into "*" in pattern name which simplifies build files.
29341 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
29342 (*pred_single_widen_mul<mode>): New pattern.
29344 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
29346 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
29347 the index to be 0 or 1.
29349 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
29352 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29354 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
29355 (*single_widen_fnma<mode>): Ditto.
29356 (*double_widen_fms<mode>): Ditto.
29357 (*single_widen_fms<mode>): Ditto.
29358 (*double_widen_fnms<mode>): Ditto.
29359 (*single_widen_fnms<mode>): Ditto.
29361 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29363 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
29364 (*single_widen_fnma<mode>): Ditto.
29365 (*double_widen_fms<mode>): Ditto.
29366 (*single_widen_fms<mode>): Ditto.
29367 (*double_widen_fnms<mode>): Ditto.
29368 (*single_widen_fnms<mode>): Ditto.
29370 2023-07-03 Pan Li <pan2.li@intel.com>
29372 * config/riscv/vector.md: Fix typo.
29374 2023-07-03 Richard Biener <rguenther@suse.de>
29376 PR tree-optimization/110506
29377 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
29378 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
29380 2023-07-03 Richard Biener <rguenther@suse.de>
29382 PR tree-optimization/110506
29383 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
29384 type before relying on TYPE_PRECISION to produce a nonzero mask.
29386 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29388 * config/mips/mips.md(*and<mode>3_mips16): Generates
29389 ZEB/ZEH instructions.
29391 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29393 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
29394 address register to M16_REGS for MIPS16.
29395 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
29396 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
29397 (AVAIL_NON_MIPS16 (cache..)): Update to
29398 AVAIL_MIPS16E2_OR_NON_MIPS16.
29399 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
29400 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
29402 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29404 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
29405 for ISA_HAS_MIPS16E2.
29406 (ISA_HAS_SYNC): Same as above.
29407 (ISA_HAS_LL_SC): Same as above.
29409 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29411 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
29412 Add logics for generating instruction.
29413 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
29414 * config/mips/mips.md(mov_<load>l): Generates instructions.
29415 (mov_<load>r): Same as above.
29416 (mov_<store>l): Adjusted for the conditions above.
29417 (mov_<store>r): Same as above.
29418 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
29419 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
29421 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29423 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
29424 (mips_const_insns): Same as above.
29425 (mips_output_move): Same as above.
29426 (mips_output_function_prologue): Same as above.
29427 * config/mips/mips.md: Same as above
29429 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29431 * config/mips/constraints.md(Yz): New constraints for mips16e2.
29432 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
29433 (mips_bit_clear_info): Same as above.
29434 * config/mips/mips.cc(mips_bit_clear_info): New function for
29435 generating instructions.
29436 (mips_bit_clear_p): Same as above.
29437 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
29438 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
29439 (*and<mode>3): Generates INS instruction.
29440 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
29441 (ior<mode>3): Add logics for ORI instruction.
29442 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
29443 (*ior<mode>3_mips16): Add logics for XORI instruction.
29444 (*xor<mode>3_mips16): Generates XORI instrucion.
29445 (*extzv<mode>): Add logics for EXT instruction.
29446 (*insv<mode>): Add logics for INS instruction.
29447 * config/mips/predicates.md(bit_clear_operand): New predicate for
29448 generating bitwise instructions.
29449 (and_reg_operand): Add logics for generating bitwise instructions.
29451 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29453 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
29454 that uses global pointer register.
29455 (mips16_unextended_reference_p): Same as above.
29456 (mips_pic_base_register): Same as above.
29457 (mips_init_relocs): Same as above.
29458 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
29459 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
29460 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
29461 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
29463 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29465 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
29466 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
29467 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
29468 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
29469 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
29470 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
29472 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29474 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
29476 * config/mips/mips.h(__mips_mips16e2): Defined a new
29478 (ISA_HAS_MIPS16E2): Defined a new macro.
29479 (ASM_SPEC): Pass mmips16e2 to the assembler.
29480 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
29481 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
29482 * doc/invoke.texi: Add -m(no-)mips16e2 option..
29484 2023-07-02 Jakub Jelinek <jakub@redhat.com>
29486 PR tree-optimization/110508
29487 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
29488 REALPART_EXPR opf nlhs if re2 is non-NULL.
29490 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29492 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
29494 * config/xtensa/xtensa.md (*xtensa_clamps):
29495 Add TARGET_MINMAX to the condition.
29497 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29499 * config/xtensa/xtensa.md (*eqne_INT_MIN):
29500 Add missing ":SI" to the match_operator.
29502 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
29505 * config/darwin.opt: Add fconstant-cfstrings alias to
29506 mconstant-cfstrings.
29507 * doc/invoke.texi: Amend invocation descriptions to reflect
29508 that the fconstant-cfstrings is a target-option alias and to
29509 add the missing mconstant-cfstrings option description to the
29512 2023-07-01 Jan Hubicka <jh@suse.cz>
29514 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
29515 parmaeter; update profile.
29516 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
29517 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
29518 (static_loop_exit): ... this; return the edge to be elliminated.
29519 (ch_base::copy_headers): Handle profile updating for eliminated exits.
29521 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
29523 * config/i386/i386-features.cc (compute_convert_gain): Provide
29524 gains/costs for ROTATE and ROTATERT (by an integer constant).
29525 (general_scalar_chain::convert_rotate): New helper function to
29526 convert a DImode or SImode rotation by an integer constant into
29528 (general_scalar_chain::convert_insn): Call the new convert_rotate
29529 for ROTATE and ROTATERT.
29530 (general_scalar_to_vector_candidate_p): Consider ROTATE and
29531 ROTATERT to be candidates if the second operand is an integer
29532 constant, valid for a rotation (or shift) in the given mode.
29533 * config/i386/i386-features.h (general_scalar_chain): Add new
29534 helper method convert_rotate.
29536 2023-07-01 Jan Hubicka <jh@suse.cz>
29538 PR tree-optimization/103680
29539 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
29540 make message clearer.
29542 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
29544 PR tree-optimization/101832
29545 * tree-object-size.cc (addr_object_size): Handle structure/union type
29546 when it has flexible size.
29548 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
29550 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
29551 (fold_nonarray_ctor_reference): Likewise. Specifically deal
29552 with integral bit-fields.
29553 (fold_ctor_reference): Make sure that the constructor uses the
29554 native storage order.
29556 2023-06-30 Jan Hubicka <jh@suse.cz>
29558 PR middle-end/109849
29559 * predict.cc (estimate_bb_frequencies): Turn to static function.
29560 (expr_expected_value_1): Fix handling of binary expressions with
29562 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
29563 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
29565 * predict.h (estimate_bb_frequencies): No longer declare it.
29567 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
29569 * fold-const.h (multiple_of_p): Change return type from int to bool.
29570 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
29571 neg_conp_p and neg_var_p variables to bool.
29572 (const_binop): Change sat_p variable to bool.
29573 (merge_ranges): Change no_overlap variable to bool.
29574 (extract_muldiv_1): Change same_p variable to bool.
29575 (tree_swap_operands_p): Update function body for bool return type.
29576 (fold_truth_andor): Change commutative variable to bool.
29577 (multiple_of_p): Change return type
29578 from int to void and adjust function body accordingly.
29579 * optabs.h (expand_twoval_unop): Change return type from int to bool.
29580 (expand_twoval_binop): Ditto.
29581 (can_compare_p): Ditto.
29582 (have_add2_insn): Ditto.
29583 (have_addptr3_insn): Ditto.
29584 (have_sub2_insn): Ditto.
29585 (have_insn_for): Ditto.
29586 * optabs.cc (add_equal_note): Ditto.
29587 (widen_operand): Change no_extend argument from int to bool.
29588 (expand_binop): Ditto.
29589 (expand_twoval_unop): Change return type
29590 from int to void and adjust function body accordingly.
29591 (expand_twoval_binop): Ditto.
29592 (can_compare_p): Ditto.
29593 (have_add2_insn): Ditto.
29594 (have_addptr3_insn): Ditto.
29595 (have_sub2_insn): Ditto.
29596 (have_insn_for): Ditto.
29598 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
29600 * config/aarch64/aarch64-simd.md
29601 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
29602 Expansions for abd vec widen optabs.
29603 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
29604 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
29605 that give the appropriate extend RTL for the max RTL.
29607 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
29609 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
29610 * optabs.def (vec_widen_sabd_optab,
29611 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
29612 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
29613 vec_widen_uabd_optab,
29614 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
29615 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
29617 * doc/md.texi: Document them.
29618 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
29619 to build a VEC_WIDEN_ABD call if the input precision is smaller
29620 than the precision of the output.
29621 (vect_recog_widen_abd_pattern): Should an ABD expression be
29622 found preceeding an extension, replace the two with a
29625 2023-06-30 Pan Li <pan2.li@intel.com>
29627 * config/riscv/vector.md: Refactor the common condition.
29629 2023-06-30 Richard Biener <rguenther@suse.de>
29631 PR tree-optimization/110496
29632 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
29633 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
29635 2023-06-30 Richard Biener <rguenther@suse.de>
29637 PR middle-end/110489
29638 * statistics.cc (curr_statistics_hash): Add argument
29639 indicating whether we should allocate the hash.
29640 (statistics_fini_pass): If the hash isn't allocated
29641 only print the summary header.
29643 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
29644 Thomas Schwinge <thomas@codesourcery.com>
29646 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
29648 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
29651 * config/mips/mips.cc (mips_function_arg_alignment): Returns
29652 the alignment of function argument. In case of typedef type,
29653 it returns the aligment of the aliased type.
29654 (mips_function_arg_boundary): Relocated calculation of the
29655 aligment of function arguments.
29657 2023-06-29 Jan Hubicka <jh@suse.cz>
29659 PR tree-optimization/109849
29660 * ipa-fnsummary.cc (decompose_param_expr): Skip
29661 functions returning its parameter.
29662 (set_cond_stmt_execution_predicate): Return early
29663 if predicate was constructed.
29665 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
29668 * doc/extend.texi: Document GCC extension on a structure containing
29669 a flexible array member to be a member of another structure.
29671 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
29673 * print-tree.cc (print_node): Print new bit type_include_flexarray.
29674 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
29675 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
29676 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
29677 in bit no_named_args_stdarg_p properly for its corresponding type.
29678 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
29679 out bit no_named_args_stdarg_p properly for its corresponding type.
29680 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
29682 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
29684 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
29685 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
29686 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
29688 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
29690 * value-range.cc (frange::set): Do not call verify_range.
29691 (frange::normalize_kind): Verify range.
29692 (frange::union_nans): Do not call verify_range.
29693 (frange::union_): Same.
29694 (frange::intersect): Same.
29695 (irange::irange_single_pair_union): Call normalize_kind if
29697 (irange::union_): Same.
29698 (irange::intersect): Same.
29699 (irange::set_range_from_nonzero_bits): Verify range.
29700 (irange::set_nonzero_bits): Call normalize_kind if necessary.
29701 (irange::get_nonzero_bits): Tweak comment.
29702 (irange::intersect_nonzero_bits): Call normalize_kind if
29704 (irange::union_nonzero_bits): Same.
29705 * value-range.h (irange::normalize_kind): Verify range.
29707 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
29709 * cselib.h (rtx_equal_for_cselib_1):
29710 Change return type from int to bool.
29711 (references_value_p): Ditto.
29712 (rtx_equal_for_cselib_p): Ditto.
29713 * expr.h (can_store_by_pieces): Ditto.
29714 (try_casesi): Ditto.
29715 (try_tablejump): Ditto.
29716 (safe_from_p): Ditto.
29717 * sbitmap.h (bitmap_equal_p): Ditto.
29718 * cselib.cc (references_value_p): Change return type
29719 from int to void and adjust function body accordingly.
29720 (rtx_equal_for_cselib_1): Ditto.
29721 * expr.cc (is_aligning_offset): Ditto.
29722 (can_store_by_pieces): Ditto.
29723 (mostly_zeros_p): Ditto.
29724 (all_zeros_p): Ditto.
29725 (safe_from_p): Ditto.
29726 (is_aligning_offset): Ditto.
29727 (try_casesi): Ditto.
29728 (try_tablejump): Ditto.
29729 (store_constructor): Change "need_to_clear" and
29730 "const_bounds_p" variables to bool.
29731 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
29733 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
29735 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
29738 2023-06-29 Richard Biener <rguenther@suse.de>
29740 PR tree-optimization/110460
29741 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
29742 Only allow integral, pointer and scalar float type scalar_type.
29744 2023-06-29 Lili Cui <lili.cui@intel.com>
29746 PR tree-optimization/110148
29747 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
29748 ops in this function.
29750 2023-06-29 Richard Biener <rguenther@suse.de>
29752 PR middle-end/110452
29753 * expr.cc (store_constructor): Handle uniform boolean
29754 vectors with integer mode specially.
29756 2023-06-29 Richard Biener <rguenther@suse.de>
29758 PR middle-end/110461
29759 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
29762 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
29764 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
29765 (array_slice): Relax va_gc constructor to handle all vectors
29766 with a vl_embed layout.
29768 2023-06-29 Pan Li <pan2.li@intel.com>
29770 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
29771 (riscv_mode_needed): Likewise.
29772 (riscv_entity_mode_after): Likewise.
29773 (riscv_mode_after): Likewise.
29774 (riscv_mode_entry): Likewise.
29775 (riscv_mode_exit): Likewise.
29776 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
29778 * config/riscv/riscv.md: Add FRM register.
29779 * config/riscv/vector-iterators.md: Add FRM type.
29780 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
29781 (fsrm): Define new insn for fsrm instruction.
29783 2023-06-29 Pan Li <pan2.li@intel.com>
29785 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
29786 Add macro for static frm min and max.
29787 * config/riscv/riscv-vector-builtins-bases.cc
29788 (class binop_frm): New class for floating-point with frm.
29789 (BASE): Add vfadd for frm.
29790 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
29791 * config/riscv/riscv-vector-builtins-functions.def
29792 (vfadd_frm): Likewise.
29793 * config/riscv/riscv-vector-builtins-shapes.cc
29794 (struct alu_frm_def): New struct for alu with frm.
29795 (SHAPE): Add alu with frm.
29796 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
29797 * config/riscv/riscv-vector-builtins.cc
29798 (function_checker::report_out_of_range_and_not): New function
29799 for report out of range and not val.
29800 (function_checker::require_immediate_range_or): New function
29801 for checking in range or one val.
29802 * config/riscv/riscv-vector-builtins.h: Add function decl.
29804 2023-06-29 Cui, Lili <lili.cui@intel.com>
29806 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
29807 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
29809 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
29812 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
29813 to insn before validating it.
29815 2023-06-28 Jan Hubicka <jh@suse.cz>
29817 PR middle-end/110334
29818 * ipa-fnsummary.h (ipa_fn_summary): Add
29819 safe_to_inline_to_always_inline.
29820 * ipa-inline.cc (can_early_inline_edge_p): ICE
29821 if SSA is not built; do cycle checking for
29822 always_inline functions.
29823 (inline_always_inline_functions): Be recrusive;
29824 watch for cycles; do not updat overall summary.
29825 (early_inliner): Do not give up on always_inlines.
29826 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
29829 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
29831 * output.h (leaf_function_p): Change return type from int to bool.
29832 (final_forward_branch_p): Ditto.
29833 (only_leaf_regs_used): Ditto.
29834 (maybe_assemble_visibility): Ditto.
29835 * varasm.h (supports_one_only): Ditto.
29836 * rtl.h (compute_alignments): Change return type from int to void.
29837 * final.cc (app_on): Change return type from int to bool.
29838 (compute_alignments): Change return type from int to void
29839 and adjust function body accordingly.
29840 (shorten_branches): Change "something_changed" variable
29841 type from int to bool.
29842 (leaf_function_p): Change return type from int to bool
29843 and adjust function body accordingly.
29844 (final_forward_branch_p): Ditto.
29845 (only_leaf_regs_used): Ditto.
29846 * varasm.cc (contains_pointers_p): Change return type from
29847 int to bool and adjust function body accordingly.
29848 (compare_constant): Ditto.
29849 (maybe_assemble_visibility): Ditto.
29850 (supports_one_only): Ditto.
29852 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
29855 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
29856 (maybe_copy_reg_attrs): New function.
29857 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
29858 (copyprop_hardreg_forward_1): Ditto.
29860 2023-06-28 Richard Biener <rguenther@suse.de>
29862 PR tree-optimization/110434
29863 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
29864 VAR we replace with <retval>.
29866 2023-06-28 Richard Biener <rguenther@suse.de>
29868 PR tree-optimization/110451
29869 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
29870 tcc_comparison are expensive.
29872 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
29874 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
29875 for TImode comparisons on 32-bit architectures.
29876 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
29877 SWIM1248x to exclude/avoid TImode being conditional on -m64.
29878 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
29879 and/or with TARGET_SSE4_1.
29880 * config/i386/predicates.md (ix86_timode_comparison_operator):
29881 New predicate that depends upon TARGET_64BIT.
29882 (ix86_timode_comparison_operand): Likewise.
29884 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
29887 * config/i386/i386-features.cc (compute_convert_gain): Provide
29888 more accurate gains for conversion of scalar comparisons to
29891 2023-06-28 Richard Biener <rguenther@suse.de>
29893 PR tree-optimization/110443
29894 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
29897 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
29899 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
29900 (peephole2 for move_and_compare): New.
29901 (mode_iterator WORD): New. Set the mode to SI/DImode by
29903 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
29904 (split pattern for compare_and_move): Likewise.
29906 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29908 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
29909 (*single_widen_fma<mode>): Ditto.
29911 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
29914 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
29916 (altivec_vupkhs<VU_char>_direct): ...this.
29917 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
29918 predicate to test if a constant can be loaded with vspltisw and
29920 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
29921 a vector constant can be synthesized with a vspltisw and a vupkhsw.
29922 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
29924 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
29925 function to return true if OP mode is V2DI and can be synthesized
29926 with vupkhsw and vspltisw.
29927 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
29928 constants with vspltisw and vupkhsw.
29930 2023-06-28 Jan Hubicka <jh@suse.cz>
29932 PR tree-optimization/110377
29933 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
29935 (ipa_analyze_node): Enable ranger.
29937 2023-06-28 Richard Biener <rguenther@suse.de>
29939 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
29940 (TYPE_PRECISION_RAW): Provide raw access to the precision
29942 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
29943 (gimple_canonical_types_compatible_p): Likewise.
29944 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
29945 Stream TYPE_PRECISION_RAW.
29946 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
29948 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
29950 2023-06-28 Alexandre Oliva <oliva@adacore.com>
29952 * doc/extend.texi (zero-call-used-regs): Document leafy and
29954 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
29955 LEAFY and variants.
29956 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
29957 functions in leafy mode.
29958 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
29960 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29962 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
29963 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
29965 (@pred_single_widen_add<mode>): New pattern.
29966 (@pred_single_widen_sub<mode>): New pattern.
29968 2023-06-28 liuhongt <hongtao.liu@intel.com>
29970 * config/i386/i386.cc (ix86_invalid_conversion): New function.
29971 (TARGET_INVALID_CONVERSION): Define as
29972 ix86_invalid_conversion.
29974 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
29976 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
29978 (<float_cvt><vnconvert><mode>2): Ditto.
29979 (<optab><mode><vnconvert>2): Ditto.
29980 (<float_cvt><mode><vnconvert>2): Ditto.
29981 * config/riscv/vector-iterators.md: Add vnconvert.
29983 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
29985 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
29987 (extend<v_quad_trunc><mode>2): Ditto.
29988 (trunc<mode><v_double_trunc>2): Ditto.
29989 (trunc<mode><v_quad_trunc>2): Ditto.
29990 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
29991 V_QUAD_TRUNC and v_quad_trunc.
29993 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
29995 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
29998 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
30000 * config/riscv/autovec.md (copysign<mode>3): Add expander.
30001 (xorsign<mode>3): Ditto.
30002 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
30004 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
30008 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
30009 (@pred_ncopysign<mode>_scalar): Ditto.
30011 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
30013 * config/riscv/autovec.md: VF_AUTO -> VF.
30014 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
30015 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
30017 * config/riscv/vector.md: Use new iterators.
30019 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
30021 * match.pd: Use element_mode and check if target supports
30022 operation with new type.
30024 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
30026 * config/aarch64/aarch64-sve-builtins-base.cc
30027 (svdupq_impl::fold_nonconst_dupq): New method.
30028 (svdupq_impl::fold): Call fold_nonconst_dupq.
30030 2023-06-27 Andrew Pinski <apinski@marvell.com>
30032 PR middle-end/110420
30033 PR middle-end/103979
30034 PR middle-end/98619
30035 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
30037 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
30039 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
30040 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
30042 (set_switch_stmt_execution_predicate): Same.
30043 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
30045 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
30047 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
30048 ipa_vr instead of value_range.
30051 (ipa_get_value_range): Same.
30052 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
30056 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
30058 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
30059 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
30060 (ipa_set_jfunc_vr): Take a range.
30061 (ipa_compute_jump_functions_for_edge): Pass range to
30063 (ipa_write_jump_function): Call streamer write helper.
30064 (ipa_read_jump_function): Call streamer read helper.
30065 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
30067 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
30069 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
30070 as a probable initializer rather than a probable complete statement.
30072 2023-06-27 Richard Biener <rguenther@suse.de>
30074 PR tree-optimization/96208
30075 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
30076 a non-grouped load if it is the same for all lanes.
30077 (vect_build_slp_tree_2): Handle not grouped loads.
30078 (vect_optimize_slp_pass::remove_redundant_permutations):
30080 (vect_transform_slp_perm_load_1): Likewise.
30081 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
30082 (get_group_load_store_type): Likewise. Handle
30083 invariant accesses.
30084 (vectorizable_load): Likewise.
30086 2023-06-27 liuhongt <hongtao.liu@intel.com>
30088 PR rtl-optimization/110237
30089 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
30091 (maskstore<mode><avx512fmaskmodelower): Ditto.
30092 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
30093 from original <avx512>_store<mode>_mask.
30095 2023-06-27 liuhongt <hongtao.liu@intel.com>
30097 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
30098 Move flag_expensive_optimizations && !optimize_size to ..
30099 * config/i386/i386-options.cc (ix86_option_override_internal):
30100 .. this, it makes -mvzeroupper independent of optimization
30101 level, but still keeps the behavior of architecture
30102 tuning(emit_vzeroupper) unchanged.
30104 2023-06-27 liuhongt <hongtao.liu@intel.com>
30107 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
30108 vzeroupper for vzeroupper call_insn.
30110 2023-06-27 Andrew Pinski <apinski@marvell.com>
30112 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
30115 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30117 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
30120 2023-06-26 Andrew Pinski <apinski@marvell.com>
30122 * doc/extend.texi (access attribute): Add
30124 (interrupt/interrupt_handler attribute):
30127 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30129 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
30130 Use <DWI> instead of <V2XWIDE>.
30131 (aarch64_sqrshrun_n<mode>): Likewise.
30133 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30135 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
30137 (aarch64_rnd_imm_p): ... This.
30138 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
30140 (aarch64_int_rnd_operand): ... This.
30141 (aarch64_simd_rshrn_imm_vec): Delete.
30142 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
30143 Adjust for the above.
30144 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
30145 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
30146 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
30147 (aarch64_sqrshrun_n<mode>_insn): Likewise.
30148 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
30149 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
30150 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
30151 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
30152 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
30154 (aarch64_rnd_imm_p): ... This.
30156 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
30158 * config/s390/s390.cc (s390_encode_section_info): Set
30159 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
30162 2023-06-26 Jan Hubicka <jh@suse.cz>
30164 PR tree-optimization/109849
30165 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
30166 count of newly constructed forwarder block.
30168 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
30170 * doc/optinfo.texi: Fix "steam" -> "stream".
30172 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30174 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
30176 (dse_optimize_stmt): Add LEN_MASK_STORE.
30178 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30180 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
30181 fold of LOAD/STORE with length.
30183 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
30185 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
30186 Check for interdependence between operands 1 and 2.
30188 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
30190 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
30191 into account when costing non-widening/truncating conversions.
30193 2023-06-26 Richard Biener <rguenther@suse.de>
30195 PR tree-optimization/110381
30196 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
30197 Materialize permutes before fold-left reductions.
30199 2023-06-26 Pan Li <pan2.li@intel.com>
30201 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
30203 2023-06-26 Richard Biener <rguenther@suse.de>
30205 * varasm.cc (initializer_constant_valid_p_1): Also
30206 constrain the type of value to be scalar integral
30207 before dispatching to narrowing_initializer_constant_valid_p.
30209 2023-06-26 Richard Biener <rguenther@suse.de>
30211 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
30212 Use element_precision.
30214 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30216 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
30218 (vcondu<V:mode><VI:mode>): Ditto.
30219 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
30220 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
30222 2023-06-26 Richard Biener <rguenther@suse.de>
30224 PR tree-optimization/110392
30225 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
30226 Do early exits on true/false predicate only after normalization.
30228 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30230 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
30233 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
30235 * config/i386/i386.md (peephole2): Simplify zeroing a register
30236 followed by an IOR, XOR or PLUS operation on it, into a move.
30237 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
30238 eliminate (and hide from reload) unnecessary word to doubleword
30239 extensions that are followed by left shifts by sufficiently large,
30240 but valid, bit counts.
30242 2023-06-26 liuhongt <hongtao.liu@intel.com>
30244 PR tree-optimization/110371
30245 PR tree-optimization/110018
30246 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
30247 save intermediate type operand instead of "subtle" vec_dest
30250 2023-06-26 liuhongt <hongtao.liu@intel.com>
30252 PR tree-optimization/110371
30253 PR tree-optimization/110018
30254 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
30255 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
30257 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
30259 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
30260 Override tune_string with arch_string if tune_string is not
30261 explicitly specified.
30263 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30265 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
30267 * config/riscv/riscv-vsetvl.h: New function.
30269 2023-06-25 Li Xu <xuli1@eswincomputing.com>
30271 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
30274 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30276 * config/riscv/autovec.md (len_load_<mode>): Remove.
30277 (len_maskload<mode><vm>): Remove.
30278 (len_store_<mode>): New pattern.
30279 (len_maskstore<mode><vm>): New pattern.
30280 * config/riscv/predicates.md (autovec_length_operand): New predicate.
30281 * config/riscv/riscv-protos.h (enum insn_type): New enum.
30282 (expand_load_store): New function.
30283 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
30284 (emit_nonvlmax_masked_insn): Ditto.
30285 (expand_load_store): Ditto.
30286 * config/riscv/riscv-vector-builtins.cc
30287 (function_expander::use_contiguous_store_insn): Add avl_type operand
30289 * config/riscv/vector.md: Ditto.
30291 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30293 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
30296 2023-06-25 Pan Li <pan2.li@intel.com>
30298 * config/riscv/vector.md: Revert.
30300 2023-06-25 Pan Li <pan2.li@intel.com>
30302 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
30303 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
30304 (ADJUST_ALIGNMENT): Ditto.
30305 (RVV_TUPLE_PARTIAL_MODES): Ditto.
30306 (ADJUST_NUNITS): Ditto.
30307 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
30308 (vfloat16mf4x3_t): Ditto.
30309 (vfloat16mf4x4_t): Ditto.
30310 (vfloat16mf4x5_t): Ditto.
30311 (vfloat16mf4x6_t): Ditto.
30312 (vfloat16mf4x7_t): Ditto.
30313 (vfloat16mf4x8_t): Ditto.
30314 (vfloat16mf2x2_t): Ditto.
30315 (vfloat16mf2x3_t): Ditto.
30316 (vfloat16mf2x4_t): Ditto.
30317 (vfloat16mf2x5_t): Ditto.
30318 (vfloat16mf2x6_t): Ditto.
30319 (vfloat16mf2x7_t): Ditto.
30320 (vfloat16mf2x8_t): Ditto.
30321 (vfloat16m1x2_t): Ditto.
30322 (vfloat16m1x3_t): Ditto.
30323 (vfloat16m1x4_t): Ditto.
30324 (vfloat16m1x5_t): Ditto.
30325 (vfloat16m1x6_t): Ditto.
30326 (vfloat16m1x7_t): Ditto.
30327 (vfloat16m1x8_t): Ditto.
30328 (vfloat16m2x2_t): Ditto.
30329 (vfloat16m2x3_t): Diito.
30330 (vfloat16m2x4_t): Diito.
30331 (vfloat16m4x2_t): Diito.
30332 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
30333 (vfloat16mf4x3_t): Ditto.
30334 (vfloat16mf4x4_t): Ditto.
30335 (vfloat16mf4x5_t): Ditto.
30336 (vfloat16mf4x6_t): Ditto.
30337 (vfloat16mf4x7_t): Ditto.
30338 (vfloat16mf4x8_t): Ditto.
30339 (vfloat16mf2x2_t): Ditto.
30340 (vfloat16mf2x3_t): Ditto.
30341 (vfloat16mf2x4_t): Ditto.
30342 (vfloat16mf2x5_t): Ditto.
30343 (vfloat16mf2x6_t): Ditto.
30344 (vfloat16mf2x7_t): Ditto.
30345 (vfloat16mf2x8_t): Ditto.
30346 (vfloat16m1x2_t): Ditto.
30347 (vfloat16m1x3_t): Ditto.
30348 (vfloat16m1x4_t): Ditto.
30349 (vfloat16m1x5_t): Ditto.
30350 (vfloat16m1x6_t): Ditto.
30351 (vfloat16m1x7_t): Ditto.
30352 (vfloat16m1x8_t): Ditto.
30353 (vfloat16m2x2_t): Ditto.
30354 (vfloat16m2x3_t): Ditto.
30355 (vfloat16m2x4_t): Ditto.
30356 (vfloat16m4x2_t): Ditto.
30357 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
30358 * config/riscv/riscv.md: Ditto.
30359 * config/riscv/vector-iterators.md: Ditto.
30361 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30363 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
30364 (gimple_fold_partial_load_store_mem_ref): Ditto.
30365 (gimple_fold_partial_store): Ditto.
30366 (gimple_fold_call): Ditto.
30368 2023-06-25 liuhongt <hongtao.liu@intel.com>
30371 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
30372 Refine pattern with UNSPEC_MASKLOAD.
30373 (maskload<mode><avx512fmaskmodelower>): Ditto.
30374 (*<avx512>_load<mode>_mask): Extend mode iterator to
30376 (*<avx512>_load<mode>): Ditto.
30378 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30380 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
30382 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30384 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
30385 LEN_MASK_{LOAD,STORE}
30387 2023-06-25 yulong <shiyulong@iscas.ac.cn>
30389 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
30391 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
30393 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
30395 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30397 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
30398 (*fma<VI:mode><P:mode>): Ditto.
30399 (*fnma<mode>): Ditto.
30400 (*fnma<VI:mode><P:mode>): Ditto.
30402 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30404 * config/riscv/autovec.md (fma<mode>4): New pattern.
30405 (*fma<mode>): Ditto.
30406 (fnma<mode>4): Ditto.
30407 (*fnma<mode>): Ditto.
30408 (fms<mode>4): Ditto.
30409 (*fms<mode>): Ditto.
30410 (fnms<mode>4): Ditto.
30411 (*fnms<mode>): Ditto.
30412 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
30414 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
30415 * config/riscv/vector.md: Fix attribute bug.
30417 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30419 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
30420 Apply LEN_MASK_{LOAD,STORE}.
30422 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30424 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
30425 Add LEN_MASK_{LOAD,STORE}.
30427 2023-06-24 David Malcolm <dmalcolm@redhat.com>
30429 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
30430 * diagnostic.cc: Likewise.
30431 * text-art/box-drawing.cc: Likewise.
30432 * text-art/canvas.cc: Likewise.
30433 * text-art/ruler.cc: Likewise.
30434 * text-art/selftests.cc: Likewise.
30435 * text-art/selftests.h (text_art::canvas): New forward decl.
30436 * text-art/style.cc: Add #define INCLUDE_VECTOR.
30437 * text-art/styled-string.cc: Likewise.
30438 * text-art/table.cc: Likewise.
30439 * text-art/table.h: Remove #include <vector>.
30440 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
30441 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
30442 Remove #include of <vector> and <string>.
30443 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
30444 * text-art/widget.h: Remove #include <vector>.
30446 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30448 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
30449 (internal_load_fn_p): Add LEN_MASK_LOAD.
30450 (internal_store_fn_p): Add LEN_MASK_STORE.
30451 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
30452 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
30453 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
30454 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
30455 (get_len_load_store_mode): Ditto.
30456 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
30457 (get_len_load_store_mode): Ditto.
30458 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
30459 (get_all_ones_mask): New function.
30460 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
30461 (vectorizable_load): Ditto.
30463 2023-06-23 Marek Polacek <polacek@redhat.com>
30465 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
30466 -std=gnu++26. Document that for C++23, its value is 202302L.
30467 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
30468 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
30469 (gen_compile_unit_die): Likewise.
30471 2023-06-23 Jan Hubicka <jh@suse.cz>
30473 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
30475 (pass_phiprop::execute): Do not compute it here; return
30476 update_ssa_only_virtuals if something changed.
30477 (pass_data_phiprop): Remove TODO_update_ssa from todos.
30479 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
30480 Aaron Sawdey <acsawdey@linux.ibm.com>
30483 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
30484 allowed prefixed lwa to be generated.
30485 * config/rs6000/fusion.md: Regenerate.
30486 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
30487 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
30488 plus compare immediate fused insns.
30489 (maybe_prefixed): Likewise.
30491 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
30493 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
30494 of ASHIFT to const0_rtx with sufficiently large shift count.
30495 Optimize highpart SUBREGs of ASHIFT as the shift operand when
30496 the shift count is the correct offset. Optimize SUBREGs of
30497 multi-word logic operations if the SUBREGs of both operands
30500 2023-06-23 Richard Biener <rguenther@suse.de>
30502 * varasm.cc (initializer_constant_valid_p_1): Only
30503 allow conversions between scalar floating point types.
30505 2023-06-23 Richard Biener <rguenther@suse.de>
30507 * tree-vect-stmts.cc (vectorizable_assignment):
30508 Properly handle non-integral operands when analyzing
30511 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
30513 PR tree-optimization/110280
30514 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
30515 using build_vector_from_val with the element of input operand, and
30516 mask's type if operand and mask's types don't match.
30518 2023-06-23 Richard Biener <rguenther@suse.de>
30520 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
30521 the truth_value_p case with !VECTOR_TYPE_P.
30523 2023-06-23 Richard Biener <rguenther@suse.de>
30525 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
30526 Exit early when the type isn't scalar integral.
30528 2023-06-23 Richard Biener <rguenther@suse.de>
30530 * match.pd ((outertype)((innertype0)a+(innertype1)b)
30531 -> ((newtype)a+(newtype)b)): Use element_precision
30534 2023-06-23 Richard Biener <rguenther@suse.de>
30536 * fold-const.cc (fold_binary_loc): Use element_precision
30537 when trying (double)float1 CMP (double)float2 to
30538 float1 CMP float2 simplification.
30539 * match.pd: Likewise.
30541 2023-06-23 Richard Biener <rguenther@suse.de>
30543 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
30544 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
30546 2023-06-23 Richard Biener <rguenther@suse.de>
30548 * tree-vect-stmts.cc (vector_vector_composition_type):
30549 Handle composition of a vector from a number of elements that
30550 happens to match its number of lanes.
30552 2023-06-22 Marek Polacek <polacek@redhat.com>
30554 * configure.ac (--enable-host-bind-now): New check. Add
30555 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
30556 * configure: Regenerate.
30557 * doc/install.texi: Document --enable-host-bind-now.
30559 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
30561 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
30563 2023-06-22 Richard Biener <rguenther@suse.de>
30565 PR tree-optimization/110332
30566 * tree-ssa-phiprop.cc (propagate_with_phi): Always
30567 check aliasing with edge inserted loads.
30569 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
30570 Uros Bizjak <ubizjak@gmail.com>
30572 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
30573 expansion of ptestc with equal operands as producing const1_rtx.
30574 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
30575 estimates of UNSPEC_PTEST, where the ptest performs the PAND
30576 or PAND of its operands.
30577 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
30578 of reg_equal_p operands into an x86_stc instruction.
30579 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
30580 (define_split): Similar to above for strict_low_part destinations.
30581 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
30583 2023-06-22 David Malcolm <dmalcolm@redhat.com>
30586 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
30587 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
30589 (fanalyzer-debug-text-art): New.
30591 2023-06-22 David Malcolm <dmalcolm@redhat.com>
30593 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
30594 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
30595 text-art/style.o, text-art/styled-string.o, text-art/table.o,
30596 text-art/theme.o, and text-art/widget.o.
30597 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
30598 (COLOR_FG_BRIGHT_RED): New.
30599 (COLOR_FG_BRIGHT_GREEN): New.
30600 (COLOR_FG_BRIGHT_YELLOW): New.
30601 (COLOR_FG_BRIGHT_BLUE): New.
30602 (COLOR_FG_BRIGHT_MAGENTA): New.
30603 (COLOR_FG_BRIGHT_CYAN): New.
30604 (COLOR_FG_BRIGHT_WHITE): New.
30605 (COLOR_BG_BRIGHT_BLACK): New.
30606 (COLOR_BG_BRIGHT_RED): New.
30607 (COLOR_BG_BRIGHT_GREEN): New.
30608 (COLOR_BG_BRIGHT_YELLOW): New.
30609 (COLOR_BG_BRIGHT_BLUE): New.
30610 (COLOR_BG_BRIGHT_MAGENTA): New.
30611 (COLOR_BG_BRIGHT_CYAN): New.
30612 (COLOR_BG_BRIGHT_WHITE): New.
30613 * common.opt (fdiagnostics-text-art-charset=): New option.
30614 (diagnostic-text-art.h): New SourceInclude.
30615 (diagnostic_text_art_charset) New Enum and EnumValues.
30616 * configure: Regenerate.
30617 * configure.ac (gccdepdir): Add text-art to loop.
30618 * diagnostic-diagram.h: New file.
30619 * diagnostic-format-json.cc (json_emit_diagram): New.
30620 (diagnostic_output_format_init_json): Wire it up to
30621 context->m_diagrams.m_emission_cb.
30622 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
30623 "text-art/canvas.h".
30624 (sarif_result::on_nested_diagnostic): Move code to...
30625 (sarif_result::add_related_location): ...this new function.
30626 (sarif_result::on_diagram): New.
30627 (sarif_builder::emit_diagram): New.
30628 (sarif_builder::make_message_object_for_diagram): New.
30629 (sarif_emit_diagram): New.
30630 (diagnostic_output_format_init_sarif): Set
30631 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
30632 * diagnostic-text-art.h: New file.
30633 * diagnostic.cc: Include "diagnostic-text-art.h",
30634 "diagnostic-diagram.h", and "text-art/theme.h".
30635 (diagnostic_initialize): Initialize context->m_diagrams and
30636 call diagnostics_text_art_charset_init.
30637 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
30638 (diagnostic_emit_diagram): New.
30639 (diagnostics_text_art_charset_init): New.
30640 * diagnostic.h (text_art::theme): New forward decl.
30641 (class diagnostic_diagram): Likewise.
30642 (diagnostic_context::m_diagrams): New field.
30643 (diagnostic_emit_diagram): New decl.
30644 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
30645 -fdiagnostics-text-art-charset=.
30646 (-fdiagnostics-plain-output): Add
30647 -fdiagnostics-text-art-charset=none.
30648 * gcc.cc: Include "diagnostic-text-art.h".
30649 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
30650 * opts-common.cc (decode_cmdline_options_to_array): Add
30651 "-fdiagnostics-text-art-charset=none" to expanded_args for
30652 -fdiagnostics-plain-output.
30653 * opts.cc: Include "diagnostic-text-art.h".
30654 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
30655 * pretty-print.cc (pp_unicode_character): New.
30656 * pretty-print.h (pp_unicode_character): New decl.
30657 * selftest-run-tests.cc: Include "text-art/selftests.h".
30658 (selftest::run_tests): Call text_art_tests.
30659 * text-art/box-drawing-chars.inc: New file, generated by
30660 contrib/unicode/gen-box-drawing-chars.py.
30661 * text-art/box-drawing.cc: New file.
30662 * text-art/box-drawing.h: New file.
30663 * text-art/canvas.cc: New file.
30664 * text-art/canvas.h: New file.
30665 * text-art/ruler.cc: New file.
30666 * text-art/ruler.h: New file.
30667 * text-art/selftests.cc: New file.
30668 * text-art/selftests.h: New file.
30669 * text-art/style.cc: New file.
30670 * text-art/styled-string.cc: New file.
30671 * text-art/table.cc: New file.
30672 * text-art/table.h: New file.
30673 * text-art/theme.cc: New file.
30674 * text-art/theme.h: New file.
30675 * text-art/types.h: New file.
30676 * text-art/widget.cc: New file.
30677 * text-art/widget.h: New file.
30679 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
30681 * function.h (emit_initial_value_sets):
30682 Change return type from int to void.
30683 (aggregate_value_p): Change return type from int to bool.
30684 (prologue_contains): Ditto.
30685 (epilogue_contains): Ditto.
30686 (prologue_epilogue_contains): Ditto.
30687 * function.cc (temp_slot): Make "in_use" variable bool.
30688 (make_slot_available): Update for changed "in_use" variable.
30689 (assign_stack_temp_for_type): Ditto.
30690 (emit_initial_value_sets): Change return type from int to void
30691 and update function body accordingly.
30692 (instantiate_virtual_regs): Ditto.
30693 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
30694 (safe_insn_predicate): Change return type from int to bool.
30695 (aggregate_value_p): Change return type from int to bool
30696 and update function body accordingly.
30697 (prologue_contains): Change return type from int to bool.
30698 (prologue_epilogue_contains): Ditto.
30700 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
30702 * common.opt (fp_contract_mode) [on]: Remove fallback.
30703 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
30704 * doc/invoke.texi (-ffp-contract): Update.
30705 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
30707 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30709 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
30710 Add alternatives to prefer to avoid same input and output Z register.
30711 (mask_gather_load<mode><v_int_container>): Likewise.
30712 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
30713 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
30714 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
30715 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
30717 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
30719 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30720 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
30721 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30722 <SVE_2BHSI:mode>_sxtw): Likewise.
30723 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30724 <SVE_2BHSI:mode>_uxtw): Likewise.
30725 (@aarch64_ldff1_gather<mode>): Likewise.
30726 (@aarch64_ldff1_gather<mode>): Likewise.
30727 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
30728 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
30729 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
30730 <VNx4_NARROW:mode>): Likewise.
30731 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30732 <VNx2_NARROW:mode>): Likewise.
30733 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30734 <VNx2_NARROW:mode>_sxtw): Likewise.
30735 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30736 <VNx2_NARROW:mode>_uxtw): Likewise.
30737 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
30738 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
30739 <SVE_PARTIAL_I:mode>): Likewise.
30741 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30743 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
30744 Convert to compact alternatives syntax.
30745 (mask_gather_load<mode><v_int_container>): Likewise.
30746 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
30747 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
30748 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
30749 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
30751 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
30753 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30754 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
30755 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30756 <SVE_2BHSI:mode>_sxtw): Likewise.
30757 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30758 <SVE_2BHSI:mode>_uxtw): Likewise.
30759 (@aarch64_ldff1_gather<mode>): Likewise.
30760 (@aarch64_ldff1_gather<mode>): Likewise.
30761 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
30762 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
30763 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
30764 <VNx4_NARROW:mode>): Likewise.
30765 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30766 <VNx2_NARROW:mode>): Likewise.
30767 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30768 <VNx2_NARROW:mode>_sxtw): Likewise.
30769 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30770 <VNx2_NARROW:mode>_uxtw): Likewise.
30771 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
30772 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
30773 <SVE_PARTIAL_I:mode>): Likewise.
30775 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30778 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30780 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
30781 Convert to compact alternatives syntax.
30782 (mask_gather_load<mode><v_int_container>): Likewise.
30783 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
30784 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
30785 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
30786 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
30788 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
30790 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30791 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
30792 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30793 <SVE_2BHSI:mode>_sxtw): Likewise.
30794 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30795 <SVE_2BHSI:mode>_uxtw): Likewise.
30796 (@aarch64_ldff1_gather<mode>): Likewise.
30797 (@aarch64_ldff1_gather<mode>): Likewise.
30798 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
30799 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
30800 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
30801 <VNx4_NARROW:mode>): Likewise.
30802 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30803 <VNx2_NARROW:mode>): Likewise.
30804 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30805 <VNx2_NARROW:mode>_sxtw): Likewise.
30806 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30807 <VNx2_NARROW:mode>_uxtw): Likewise.
30808 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
30809 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
30810 <SVE_PARTIAL_I:mode>): Likewise.
30812 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30814 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
30815 (get_len_load_store_mode): Ditto.
30816 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
30817 (get_len_load_store_mode): Ditto.
30818 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
30819 (get_len_load_store_mode): Ditto.
30820 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
30821 (get_len_load_store_mode): Ditto.
30822 * tree-if-conv.cc: include optabs-tree instead of optabs-query
30824 2023-06-21 Richard Biener <rguenther@suse.de>
30826 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
30827 split_constant_offset for the POINTER_PLUS_EXPR case.
30829 2023-06-21 Richard Biener <rguenther@suse.de>
30831 * tree-ssa-loop-ivopts.cc (record_group_use): Use
30832 split_constant_offset.
30834 2023-06-21 Richard Biener <rguenther@suse.de>
30836 * tree-loop-distribution.cc (classify_builtin_st): Use
30837 split_constant_offset.
30838 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
30839 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
30841 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30843 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
30844 Convert to compact alternatives syntax.
30845 (mask_gather_load<mode><v_int_container>): Likewise.
30846 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
30847 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
30848 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
30849 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
30851 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
30853 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30854 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
30855 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30856 <SVE_2BHSI:mode>_sxtw): Likewise.
30857 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30858 <SVE_2BHSI:mode>_uxtw): Likewise.
30859 (@aarch64_ldff1_gather<mode>): Likewise.
30860 (@aarch64_ldff1_gather<mode>): Likewise.
30861 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
30862 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
30863 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
30864 <VNx4_NARROW:mode>): Likewise.
30865 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30866 <VNx2_NARROW:mode>): Likewise.
30867 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30868 <VNx2_NARROW:mode>_sxtw): Likewise.
30869 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30870 <VNx2_NARROW:mode>_uxtw): Likewise.
30871 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
30872 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
30873 <SVE_PARTIAL_I:mode>): Likewise.
30875 2023-06-21 Tamar Christina <tamar.christina@arm.com>
30878 * doc/md.texi: Replace backslashchar.
30880 2023-06-21 Richard Biener <rguenther@suse.de>
30882 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
30883 Overload. For masked main loops make sure the vectorization
30884 factor isn't more than double the number of iterations.
30886 2023-06-21 Jan Beulich <jbeulich@suse.com>
30888 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
30889 value duplication by ix86_build_signbit_mask() when AVX512F and
30891 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
30892 2-alternative form. Adjust "mode" attribute. Add "enabled"
30894 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
30895 && !TARGET_PREFER_AVX256.
30896 (*<avx512>_vpternlog<mode>_2): Likewise.
30897 (*<avx512>_vpternlog<mode>_3): Likewise.
30899 2023-06-21 liuhongt <hongtao.liu@intel.com>
30902 * tree-vect-stmts.cc (vectorizable_conversion): Use
30903 intermiediate integer type for float_expr/fix_trunc_expr when
30904 direct optab is not existed.
30906 2023-06-20 Tamar Christina <tamar.christina@arm.com>
30908 PR bootstrap/110324
30909 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
30911 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
30913 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
30914 register operand to the stack pointer. Require the second register
30915 operand to have the number specified in a separate const_int operand.
30916 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
30917 (aarch64_allocate_and_probe_stack_space): Use it.
30918 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
30919 (aarch64_expand_epilogue): Likewise.
30921 2023-06-20 Jakub Jelinek <jakub@redhat.com>
30923 PR middle-end/79173
30924 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
30925 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
30928 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
30930 * calls.h (setjmp_call_p): Change return type from int to bool.
30931 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
30932 (store_one_arg): Change return type from int to bool
30933 and adjust function body accordingly. Change "sibcall_failure"
30935 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
30936 argument to bool. Change "partial_seen" variable to bool.
30937 (load_register_parameters): Change *sibcall_failure
30938 pointer argument to bool.
30939 (check_sibcall_argument_overlap_1): Change return type from int to bool
30940 and adjust function body accordingly.
30941 (check_sibcall_argument_overlap): Ditto. Change
30942 "mark_stored_args_map" argument to bool.
30943 (emit_call_1): Change "already_popped" variable to bool.
30944 (setjmp_call_p): Change return type from int to bool
30945 and adjust function body accordingly.
30946 (initialize_argument_information): Change *must_preallocate
30947 pointer argument to bool.
30948 (expand_call): Change "pcc_struct_value", "must_preallocate"
30949 and "sibcall_failure" variables to bool.
30950 (emit_library_call_value_1): Change "pcc_struct_value"
30953 2023-06-20 Martin Jambor <mjambor@suse.cz>
30956 * ipa-sra.cc (struct caller_issues): New field there_is_one.
30957 (check_for_caller_issues): Set it.
30958 (check_all_callers_for_issues): Check it.
30960 2023-06-20 Martin Jambor <mjambor@suse.cz>
30962 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
30963 (struct ipcp_transformation): Rearrange members according to
30964 C++ class coding convention, add m_uid_to_idx,
30965 get_param_index and maybe_create_parm_idx_map.
30966 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
30967 (compare_uids): Likewise.
30968 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
30969 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
30970 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
30971 (ipcp_update_vr): Likewise.
30972 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
30973 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
30975 2023-06-20 Carl Love <cel@us.ibm.com>
30977 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
30978 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
30979 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
30980 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
30981 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
30982 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
30983 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
30984 * config/rs6000/rs6000-builtins.def
30985 (__builtin_vsx_scalar_extract_exp_to_vec,
30986 __builtin_vsx_scalar_extract_sig_to_vec,
30987 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
30988 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
30989 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
30990 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
30991 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
30992 overloaded instance. Update comments.
30993 * config/rs6000/rs6000-overload.def
30994 (__builtin_vec_scalar_insert_exp): Add new overload definition with
30996 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
30997 overloaded definitions.
30998 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
30999 (DI_to_TI): New mode attribute.
31000 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
31001 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
31002 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
31003 * doc/extend.texi (scalar_extract_exp_to_vec,
31004 scalar_extract_sig_to_vec): Add documentation for new builtins.
31005 (scalar_insert_exp): Add new overloaded builtin definition.
31007 2023-06-20 Li Xu <xuli1@eswincomputing.com>
31009 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
31010 size of vector mask mode to one rvv register.
31012 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31014 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
31016 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
31018 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
31021 2023-06-20 Richard Biener <rguenther@suse.de>
31023 * tree-ssa-dse.cc (dse_classify_store): When we found
31024 no defs and the basic-block with the original definition
31025 ends in __builtin_unreachable[_trap] the store is dead.
31027 2023-06-20 Richard Biener <rguenther@suse.de>
31029 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
31030 keep the virtual SSA form up-to-date.
31032 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31034 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
31035 New define_insn_and_split.
31037 2023-06-20 Tamar Christina <tamar.christina@arm.com>
31039 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
31041 2023-06-20 Jan Beulich <jbeulich@suse.com>
31043 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
31044 constraint. Add new AVX512F alternative.
31046 2023-06-20 Richard Biener <rguenther@suse.de>
31049 * dwarf2out.cc (process_scope_var): Continue processing
31050 the decl after setting a parent in case the existing DIE
31053 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
31055 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
31056 (riscv_arg_has_vector): Simplify.
31057 (riscv_pass_in_vector_p): Adjust warning message.
31059 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
31061 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
31062 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
31063 * config/riscv/riscv.md (riscv_frcsr): New patterns.
31064 (riscv_fscsr): Likewise.
31066 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
31068 PR rtl-optimization/110305
31069 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
31070 Handle HONOR_SNANS for x + 0.0.
31072 2023-06-19 Jan Hubicka <jh@suse.cz>
31074 PR tree-optimization/109811
31075 PR tree-optimization/109849
31076 * passes.def: Add phiprop to early optimization passes.
31077 * tree-ssa-phiprop.cc: Allow clonning.
31079 2023-06-19 Tamar Christina <tamar.christina@arm.com>
31081 * config/aarch64/aarch64.md (arches): Add nosimd.
31082 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
31085 2023-06-19 Tamar Christina <tamar.christina@arm.com>
31086 Omar Tahir <Omar.Tahir2@arm.com>
31088 * gensupport.cc (class conlist, add_constraints, add_attributes,
31089 skip_spaces, expect_char, preprocess_compact_syntax,
31090 parse_section_layout, parse_section, convert_syntax): New.
31091 (process_rtx): Check for conversion.
31092 * genoutput.cc (process_template): Check for unresolved iterators.
31093 (class data): Add compact_syntax_p.
31094 (gen_insn): Use it.
31095 * gensupport.h (compact_syntax): New.
31096 (hash-set.h): Include.
31097 * doc/md.texi: Document it.
31099 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
31101 * recog.h (check_asm_operands): Change return type from int to bool.
31102 (insn_invalid_p): Ditto.
31103 (verify_changes): Ditto.
31104 (apply_change_group): Ditto.
31105 (constrain_operands): Ditto.
31106 (constrain_operands_cached): Ditto.
31107 (validate_replace_rtx_subexp): Ditto.
31108 (validate_replace_rtx): Ditto.
31109 (validate_replace_rtx_part): Ditto.
31110 (validate_replace_rtx_part_nosimplify): Ditto.
31111 (added_clobbers_hard_reg_p): Ditto.
31112 (peep2_regno_dead_p): Ditto.
31113 (peep2_reg_dead_p): Ditto.
31114 (store_data_bypass_p): Ditto.
31115 (if_test_bypass_p): Ditto.
31116 * rtl.h (split_all_insns_noflow): Change
31117 return type from unsigned int to void.
31118 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
31119 of generated added_clobbers_hard_reg_p from int to bool and adjust
31120 function body accordingly. Change "used" variable type from
31122 * recog.cc (check_asm_operands): Change return type
31123 from int to bool and adjust function body accordingly.
31124 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
31125 (verify_changes): Change return type from int to bool.
31126 (apply_change_group): Change return type from int to bool
31127 and adjust function body accordingly.
31128 (validate_replace_rtx_subexp): Change return type from int to bool.
31129 (validate_replace_rtx): Ditto.
31130 (validate_replace_rtx_part): Ditto.
31131 (validate_replace_rtx_part_nosimplify): Ditto.
31132 (constrain_operands_cached): Ditto.
31133 (constrain_operands): Ditto. Change "lose" and "win"
31134 variables type from int to bool.
31135 (split_all_insns_noflow): Change return type from unsigned int
31136 to void and adjust function body accordingly.
31137 (peep2_regno_dead_p): Change return type from int to bool.
31138 (peep2_reg_dead_p): Ditto.
31139 (peep2_find_free_register): Change "success"
31140 variable type from int to bool
31141 (store_data_bypass_p_1): Change return type from int to bool.
31142 (store_data_bypass_p): Ditto.
31144 2023-06-19 Li Xu <xuli1@eswincomputing.com>
31146 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
31149 2023-06-19 Pan Li <pan2.li@intel.com>
31152 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
31154 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
31155 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
31156 VF_ZVE63 and VF_ZVE32.
31157 * config/riscv/vector.md
31158 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
31159 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
31160 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
31161 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
31162 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
31163 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
31164 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
31165 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
31166 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
31167 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
31169 2023-06-19 Pan Li <pan2.li@intel.com>
31172 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
31174 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
31175 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
31176 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
31177 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
31178 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
31179 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
31180 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
31181 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
31182 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
31183 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
31184 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
31185 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
31186 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
31187 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
31189 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
31191 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
31192 (gcn_init_libfuncs): Add div and mod functions for all modes.
31193 Add placeholders for divmod functions.
31194 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
31196 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
31198 * tree-vect-generic.cc: Include optabs-libfuncs.h.
31199 (get_compute_type): Check optab_libfunc.
31200 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
31201 (vectorizable_operation): Check optab_libfunc.
31203 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
31205 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
31206 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
31207 (V_MOV, V_MOV_ALT): Likewise.
31208 (scalar_mode, SCALAR_MODE): Add TImode.
31209 (vnsi, VnSI, vndi, VnDI): Likewise.
31210 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
31211 (mov<mode>, mov<mode>_unspec): Use V_MOV.
31212 (*mov<mode>_4reg): New insn.
31213 (mov<mode>_exec): New 4reg variant.
31214 (mov<mode>_sgprbase): Likewise.
31215 (reload_in<mode>, reload_out<mode>): Use V_MOV.
31216 (vec_set<mode>): Likewise.
31217 (vec_duplicate<mode><exec>): New 4reg variant.
31218 (vec_extract<mode><scalar_mode>): Likewise.
31219 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
31220 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
31221 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
31222 (fold_extract_last_<mode>): Use V_MOV.
31223 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
31224 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
31225 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
31226 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
31227 gather<mode>_insn_2offsets<exec>): Use V_MOV.
31228 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
31229 scatter<mode>_insn_1offset<exec_scatter>,
31230 scatter<mode>_insn_1offset_ds<exec_scatter>,
31231 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
31232 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
31233 mask_scatter_store<mode><vnsi>): Likewise.
31234 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
31235 (gcn_hard_regno_mode_ok): Likewise.
31236 (GEN_VNM): Add TImode support.
31237 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
31238 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
31239 V8TImode, and V2TImode.
31240 (print_operand): Add 'J' and 'K' print codes.
31242 2023-06-19 Richard Biener <rguenther@suse.de>
31244 PR tree-optimization/110298
31245 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
31246 Clear number of iterations info before cleaning up the CFG.
31248 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31250 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
31251 Simplify vec_concat of lowpart subreg and high part vec_select.
31253 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
31255 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
31257 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
31259 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
31260 Handle null niters_skip.
31262 2023-06-19 Richard Biener <rguenther@suse.de>
31264 * config/aarch64/aarch64.cc
31265 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
31266 to LOOP_VINFO_MASKS.
31268 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
31271 * common/config/avr/avr-common.cc: Remove setting
31272 of OPT_fdelete_null_pointer_checks.
31273 * config/avr/avr.cc (avr_option_override): Clear
31274 flag_delete_null_pointer_checks if zero_address_valid.
31275 (avr_addr_space_zero_address_valid): New function.
31276 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
31279 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31280 Robin Dapp <rdapp.gcc@gmail.com>
31282 * doc/md.texi: Add len_mask{load,store}.
31283 * genopinit.cc (main): Ditto.
31285 * internal-fn.cc (len_maskload_direct): Ditto.
31286 (len_maskstore_direct): Ditto.
31287 (expand_call_mem_ref): Ditto.
31288 (expand_partial_load_optab_fn): Ditto.
31289 (expand_len_maskload_optab_fn): Ditto.
31290 (expand_partial_store_optab_fn): Ditto.
31291 (expand_len_maskstore_optab_fn): Ditto.
31292 (direct_len_maskload_optab_supported_p): Ditto.
31293 (direct_len_maskstore_optab_supported_p): Ditto.
31294 * internal-fn.def (LEN_MASK_LOAD): Ditto.
31295 (LEN_MASK_STORE): Ditto.
31296 * optabs.def (OPTAB_CD): Ditto.
31298 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
31300 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
31302 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
31304 * config/riscv/autovec.md (<optab><mode>3): Implement binop
31306 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
31307 (enum vxrm_field_enum): Rename this...
31308 (enum fixed_point_rounding_mode): ...to this.
31309 (enum frm_field_enum): Rename this...
31310 (enum floating_point_rounding_mode): ...to this.
31311 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
31312 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
31314 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
31315 (riscv_excess_precision): Do not convert to float for ZVFH.
31316 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
31318 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
31320 * config/riscv/vector-iterators.md: Add VI_QH iterator.
31321 * config/riscv/autovec-opt.md
31322 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
31323 that includes sign extension.
31324 (@pred_extract_first_sextsi<mode>): Dito for SImode.
31326 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
31328 * config/riscv/autovec.md (vec_set<mode>): Implement.
31329 (vec_extract<mode><vel>): Implement.
31330 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
31331 (emit_vlmax_slide_insn): Declare.
31332 (emit_nonvlmax_slide_tu_insn): Declare.
31333 (emit_scalar_move_insn): Export.
31334 (emit_nonvlmax_integer_move_insn): Export.
31335 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
31336 (emit_nonvlmax_slide_tu_insn): New function.
31337 (emit_vlmax_masked_mu_insn): No change.
31338 (emit_vlmax_integer_move_insn): Export.
31340 2023-06-19 Richard Biener <rguenther@suse.de>
31342 * tree-vectorizer.h (enum vect_partial_vector_style): New.
31343 (_loop_vec_info::partial_vector_style): Likewise.
31344 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
31345 (rgroup_controls::compare_type): Add.
31346 (vec_loop_masks): Change from a typedef to auto_vec<>
31348 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
31349 Adjust. Convert niters_skip to compare_type.
31350 (vect_set_loop_condition_partial_vectors_avx512): New function
31351 implementing the AVX512 partial vector codegen.
31352 (vect_set_loop_condition): Dispatch to the correct
31353 vect_set_loop_condition_partial_vectors_* function based on
31354 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
31355 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
31356 in the original niter type.
31357 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
31358 partial_vector_style.
31359 (can_produce_all_loop_masks_p): Adjust.
31360 (vect_verify_full_masking): Produce the rgroup_controls vector
31361 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
31362 (vect_verify_full_masking_avx512): New function implementing
31363 verification of AVX512 style masking.
31364 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
31365 (vect_analyze_loop_2): Also try AVX512 style masking.
31367 (vect_estimate_min_profitable_iters): Implement AVX512 style
31368 mask producing cost.
31369 (vect_record_loop_mask): Do not build the rgroup_controls
31370 vector here but record masks in a hash-set.
31371 (vect_get_loop_mask): Implement AVX512 style mask query,
31372 complementing the existing while_ult style.
31374 2023-06-19 Richard Biener <rguenther@suse.de>
31376 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
31378 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
31379 (vectorize_fold_left_reduction): Adjust.
31380 (vect_transform_reduction): Likewise.
31381 (vectorizable_live_operation): Likewise.
31382 * tree-vect-stmts.cc (vectorizable_call): Likewise.
31383 (vectorizable_operation): Likewise.
31384 (vectorizable_store): Likewise.
31385 (vectorizable_load): Likewise.
31386 (vectorizable_condition): Likewise.
31388 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
31391 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
31392 Add Optimization option property.
31394 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31396 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
31397 Add new pattern for the abovementioned case.
31399 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31401 * config/xtensa/xtensa.cc
31402 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
31404 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
31406 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
31408 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
31410 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
31412 2023-06-19 liuhongt <hongtao.liu@intel.com>
31415 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
31417 (sse2_packsswb<mask_name>): .. this, ..
31418 (avx2_packsswb<mask_name>): .. this and ..
31419 (avx512bw_packsswb<mask_name>): .. this.
31420 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
31421 (sse2_packssdw<mask_name>): .. this, ..
31422 (avx2_packssdw<mask_name>): .. this and ..
31423 (avx512bw_packssdw<mask_name>): .. this.
31425 2023-06-19 liuhongt <hongtao.liu@intel.com>
31428 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
31429 UNSPEC_US_TRUNCATE instead of original us_truncate for
31431 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
31433 (mmx_packsswb): .. this and ..
31434 (mmx_packuswb): .. this.
31435 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
31437 (s_trunsuffix): Removed code iterator.
31438 (any_s_truncate): Ditto.
31439 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
31440 UNSPEC_US_TRUNCATE instead of original us_truncate.
31441 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
31442 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
31444 2023-06-18 Pan Li <pan2.li@intel.com>
31446 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
31448 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
31450 * rtl.h (*rtx_equal_p_callback_function):
31451 Change return type from int to bool.
31452 (rtx_equal_p): Ditto.
31453 (*hash_rtx_callback_function): Ditto.
31454 * rtl.cc (rtx_equal_p): Change return type from int to bool
31455 and adjust function body accordingly.
31456 * early-remat.cc (scratch_equal): Ditto.
31457 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
31458 (hash_with_unspec_callback): Ditto.
31460 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
31462 * config/arc/arc.md (movqi_insn): Allow certain constants to
31463 be stored into memory in the pattern's condition.
31464 (movsf_insn): Similarly.
31466 2023-06-18 Honza <jh@ryzen3.suse.cz>
31468 PR tree-optimization/109849
31469 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
31470 ES; handle ipa_predicate::not_sra_candidate.
31471 (evaluate_properties_for_edge): Pass es to
31472 evaluate_conditions_for_known_args.
31473 (ipa_fn_summary_t::duplicate): Handle sra candidates.
31474 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
31475 (load_or_store_of_ptr_parameter): New function.
31476 (points_to_possible_sra_candidate_p): New function.
31477 (analyze_function_body): Initialize points_to_possible_sra_candidate;
31478 determine sra predicates.
31479 (estimate_ipcp_clone_size_and_time): Update call of
31480 evaluate_conditions_for_known_args.
31481 (remap_edge_params): Update points_to_possible_sra_candidate.
31482 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
31483 (write_ipa_call_summary): Likewise.
31484 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
31485 (dump_condition): Dump it.
31486 * ipa-predicate.h (struct inline_param_summary): Add
31487 points_to_possible_sra_candidate.
31489 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
31491 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
31492 function for setting the carry flag.
31493 (ix86_expand_builtin) <handlecarry>: Use it here.
31494 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
31495 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
31496 (usubc<mode>5): Likewise.
31498 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
31500 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
31501 for the immediate constant shift count.
31502 (*concat<mode><dwi>3_2): Likewise.
31503 (*concat<mode><dwi>3_3): Likewise.
31504 (*concat<mode><dwi>3_4): Likewise.
31505 (*concat<mode><dwi>3_5): Likewise.
31506 (*concat<mode><dwi>3_6): Likewise.
31508 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
31510 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
31511 (hash_rtx): Remove.
31512 * early-remat.cc (remat_candidate_hasher::equal): Update
31513 to call rtx_equal_p with rtx_equal_p_callback_function argument.
31514 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
31515 (rtx_equal_p): Remove.
31516 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
31517 argument with NULL default value.
31518 (rtx_equal_p_cb): Remove function declaration.
31519 (hash_rtx_cb): Ditto.
31520 (hash_rtx): Add hash_rtx_callback_function argument
31521 with NULL default value.
31522 * sel-sched-ir.cc (free_nop_pool): Update function comment.
31523 (skip_unspecs_callback): Ditto.
31524 (vinsn_init): Update to call hash_rtx with
31525 hash_rtx_callback_function argument.
31526 (vinsn_equal_p): Ditto.
31528 2023-06-18 yulong <shiyulong@iscas.ac.cn>
31530 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
31531 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
31532 (ADJUST_ALIGNMENT): Ditto.
31533 (RVV_TUPLE_PARTIAL_MODES): Ditto.
31534 (ADJUST_NUNITS): Ditto.
31535 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
31537 (vfloat16mf4x3_t): Ditto.
31538 (vfloat16mf4x4_t): Ditto.
31539 (vfloat16mf4x5_t): Ditto.
31540 (vfloat16mf4x6_t): Ditto.
31541 (vfloat16mf4x7_t): Ditto.
31542 (vfloat16mf4x8_t): Ditto.
31543 (vfloat16mf2x2_t): Ditto.
31544 (vfloat16mf2x3_t): Ditto.
31545 (vfloat16mf2x4_t): Ditto.
31546 (vfloat16mf2x5_t): Ditto.
31547 (vfloat16mf2x6_t): Ditto.
31548 (vfloat16mf2x7_t): Ditto.
31549 (vfloat16mf2x8_t): Ditto.
31550 (vfloat16m1x2_t): Ditto.
31551 (vfloat16m1x3_t): Ditto.
31552 (vfloat16m1x4_t): Ditto.
31553 (vfloat16m1x5_t): Ditto.
31554 (vfloat16m1x6_t): Ditto.
31555 (vfloat16m1x7_t): Ditto.
31556 (vfloat16m1x8_t): Ditto.
31557 (vfloat16m2x2_t): Ditto.
31558 (vfloat16m2x3_t): Ditto.
31559 (vfloat16m2x4_t): Ditto.
31560 (vfloat16m4x2_t): Ditto.
31561 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
31562 (vfloat16mf4x3_t): Ditto.
31563 (vfloat16mf4x4_t): Ditto.
31564 (vfloat16mf4x5_t): Ditto.
31565 (vfloat16mf4x6_t): Ditto.
31566 (vfloat16mf4x7_t): Ditto.
31567 (vfloat16mf4x8_t): Ditto.
31568 (vfloat16mf2x2_t): Ditto.
31569 (vfloat16mf2x3_t): Ditto.
31570 (vfloat16mf2x4_t): Ditto.
31571 (vfloat16mf2x5_t): Ditto.
31572 (vfloat16mf2x6_t): Ditto.
31573 (vfloat16mf2x7_t): Ditto.
31574 (vfloat16mf2x8_t): Ditto.
31575 (vfloat16m1x2_t): Ditto.
31576 (vfloat16m1x3_t): Ditto.
31577 (vfloat16m1x4_t): Ditto.
31578 (vfloat16m1x5_t): Ditto.
31579 (vfloat16m1x6_t): Ditto.
31580 (vfloat16m1x7_t): Ditto.
31581 (vfloat16m1x8_t): Ditto.
31582 (vfloat16m2x2_t): Ditto.
31583 (vfloat16m2x3_t): Ditto.
31584 (vfloat16m2x4_t): Ditto.
31585 (vfloat16m4x2_t): Ditto.
31586 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
31587 * config/riscv/riscv.md: New.
31588 * config/riscv/vector-iterators.md: New.
31590 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
31592 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
31593 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
31594 Generalize special case for converting TImode to V1TImode to handle
31595 all 128-bit vector conversions.
31597 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
31599 * gcc-ar.cc (main): Refactor to slightly reduce code
31600 duplication. Avoid unnecessary elements in nargv.
31602 2023-06-16 Pan Li <pan2.li@intel.com>
31605 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
31606 integer reduction expand.
31607 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
31608 and the LMUL1 attr respectively.
31609 * config/riscv/vector.md
31610 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
31611 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
31612 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
31613 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
31614 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
31615 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
31616 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
31618 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31621 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
31623 2023-06-16 Jakub Jelinek <jakub@redhat.com>
31625 PR middle-end/79173
31626 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
31627 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
31628 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
31630 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
31631 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
31632 * builtins.cc (fold_builtin_addc_subc): New function.
31633 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
31634 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
31636 2023-06-16 Jakub Jelinek <jakub@redhat.com>
31638 PR tree-optimization/110271
31639 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
31640 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
31641 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
31643 2023-06-16 Martin Jambor <mjambor@suse.cz>
31645 * configure: Regenerate.
31647 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
31648 Uros Bizjak <ubizjak@gmail.com>
31651 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
31652 define_insn_and_split combine *add<dwi>3_doubleword with
31653 a *concat<mode><dwi>3 for more efficient lowering after reload.
31655 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
31657 * ira-lives.cc: Include except.h.
31658 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
31659 when the pseudo does not live at the exception landing pad.
31661 2023-06-16 Alex Coplan <alex.coplan@arm.com>
31663 * doc/invoke.texi: Document -Welaborated-enum-base.
31665 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31667 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
31668 (ushrn2_n): ... This.
31669 (sqshrn2_n): Rename builtins to...
31670 (ssqshrn2_n): ... This.
31671 (uqshrn2_n): Rename builtins to...
31672 (uqushrn2_n): ... This.
31673 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
31674 (vqshrn_high_n_s32): Likewise.
31675 (vqshrn_high_n_s64): Likewise.
31676 (vqshrn_high_n_u16): Likewise.
31677 (vqshrn_high_n_u32): Likewise.
31678 (vqshrn_high_n_u64): Likewise.
31679 (vshrn_high_n_s16): Likewise.
31680 (vshrn_high_n_s32): Likewise.
31681 (vshrn_high_n_s64): Likewise.
31682 (vshrn_high_n_u16): Likewise.
31683 (vshrn_high_n_u32): Likewise.
31684 (vshrn_high_n_u64): Likewise.
31685 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
31687 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
31688 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
31689 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
31690 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
31691 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
31692 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
31693 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
31694 Update expander for the above.
31696 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31698 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
31699 (shrn2_n): ... This.
31700 (rshrn2): Rename builtins to...
31701 (rshrn2_n): ... This.
31702 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
31703 (vrshrn_high_n_s32): Likewise.
31704 (vrshrn_high_n_s64): Likewise.
31705 (vrshrn_high_n_u16): Likewise.
31706 (vrshrn_high_n_u32): Likewise.
31707 (vrshrn_high_n_u64): Likewise.
31708 (vshrn_high_n_s16): Likewise.
31709 (vshrn_high_n_s32): Likewise.
31710 (vshrn_high_n_s64): Likewise.
31711 (vshrn_high_n_u16): Likewise.
31712 (vshrn_high_n_u32): Likewise.
31713 (vshrn_high_n_u64): Likewise.
31714 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
31716 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
31717 (aarch64_shrn2<mode>_insn_le): Likewise.
31718 (aarch64_shrn2<mode>_insn_be): Likewise.
31719 (aarch64_shrn2<mode>): Likewise.
31720 (aarch64_rshrn2<mode>_insn_le): Likewise.
31721 (aarch64_rshrn2<mode>_insn_be): Likewise.
31722 (aarch64_rshrn2<mode>): Likewise.
31723 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
31724 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
31725 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
31726 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
31727 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
31728 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
31729 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
31730 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
31731 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
31732 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
31733 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
31734 (aarch64_sqshrun2_n<mode>): New define_expand.
31735 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
31736 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
31737 (aarch64_sqrshrun2_n<mode>): New define_expand.
31738 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
31739 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
31740 Delete unspec values.
31741 (VQSHRN_N): Delete int iterator.
31743 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31745 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
31746 * config/aarch64/aarch64-simd.md
31747 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
31748 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
31749 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
31750 * config/aarch64/iterators.md (shrn_s): New code attribute.
31752 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31754 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
31756 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
31757 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
31758 (aarch64_sqrshrun_n<mode>_insn): Likewise.
31759 (aarch64_sqshrun_n<mode>_insn): Likewise.
31760 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
31761 (aarch64_sqshrun_n<mode>): Likewise.
31762 (aarch64_sqrshrun_n<mode>): Likewise.
31763 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
31765 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31767 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
31768 (shrn_n): ... This.
31769 (rshrn): Rename builtins to...
31770 (rshrn_n): ... This.
31771 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
31772 (vshrn_n_s32): Likewise.
31773 (vshrn_n_s64): Likewise.
31774 (vshrn_n_u16): Likewise.
31775 (vshrn_n_u32): Likewise.
31776 (vshrn_n_u64): Likewise.
31777 (vrshrn_n_s16): Likewise.
31778 (vrshrn_n_s32): Likewise.
31779 (vrshrn_n_s64): Likewise.
31780 (vrshrn_n_u16): Likewise.
31781 (vrshrn_n_u32): Likewise.
31782 (vrshrn_n_u64): Likewise.
31783 * config/aarch64/aarch64-simd.md
31784 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
31785 (aarch64_shrn<mode>): Likewise.
31786 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
31787 (aarch64_rshrn<mode>): Likewise.
31788 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
31789 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
31790 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
31791 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
31792 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
31793 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
31794 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
31795 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
31796 (aarch64_sqshrun_n<mode>): Likewise.
31797 (aarch64_sqrshrun_n<mode>): Likewise.
31798 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
31799 (TRUNCEXTEND): New code attribute.
31800 (TRUNC_SHIFT): Likewise.
31801 (shrn_op): Likewise.
31802 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
31805 2023-06-16 Pan Li <pan2.li@intel.com>
31807 * config/riscv/riscv-vsetvl.cc
31808 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
31810 2023-06-16 Richard Biener <rguenther@suse.de>
31812 PR tree-optimization/110278
31813 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
31814 (x != (typeof x)(x == 0) -> true): Likewise.
31816 2023-06-16 Pali Rohár <pali@kernel.org>
31818 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
31819 (REAL_LIBGCC_SPEC): New define.
31820 * config/i386/mingw.opt: Add mcrtdll=
31821 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
31822 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
31823 (STARTFILE_SPEC): Adjust for -mcrtdll=.
31824 * doc/invoke.texi: Add mcrtdll= documentation.
31826 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
31828 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
31829 (mips_handle_code_readable_attr):New static function.
31830 (mips_get_code_readable_attr):New static enum function.
31831 (mips_set_current_function):Set the code_readable mode.
31832 (mips_option_override):Same as above.
31833 * doc/extend.texi:Document code_readable.
31835 2023-06-16 Richard Biener <rguenther@suse.de>
31837 PR tree-optimization/110269
31838 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
31839 with tree_expr_nonzero_p ...
31840 * match.pd (cmp (convert? addr@0) integer_zerop): With this
31843 2023-06-15 Marek Polacek <polacek@redhat.com>
31845 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
31846 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
31847 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
31848 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
31849 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
31851 * configure: Regenerate.
31852 * doc/install.texi: Document --enable-host-pie.
31854 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
31856 * regcprop.cc (maybe_mode_change): Enable stack pointer
31859 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
31861 PR tree-optimization/110266
31862 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
31864 (adjust_realpart_expr): Ditto.
31866 2023-06-15 Jan Beulich <jbeulich@suse.com>
31868 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
31871 2023-06-15 Jan Beulich <jbeulich@suse.com>
31873 * config/i386/constraints.md: Mention k and r for B.
31875 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
31876 Andrew Pinski <apinski@marvell.com>
31879 * config/loongarch/loongarch.md: Modify the register constraints for template
31880 "jumptable" and "indirect_jump" from "r" to "e".
31882 2023-06-15 Xi Ruoyao <xry111@xry111.site>
31884 * config/loongarch/loongarch-tune.h (loongarch_align): New
31886 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
31888 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
31890 * config/loongarch/loongarch.cc
31891 (loongarch_option_override_internal): Set the value of
31892 -falign-functions= if -falign-functions is enabled but no value
31893 is given. Likewise for -falign-labels=.
31895 2023-06-15 Jakub Jelinek <jakub@redhat.com>
31897 PR middle-end/79173
31898 * internal-fn.def (UADDC, USUBC): New internal functions.
31899 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
31900 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
31901 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
31902 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
31903 match_uaddc_usubc): New functions.
31904 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
31905 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
31906 other optimizations have been successful for those.
31907 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
31908 * fold-const-call.cc (fold_const_call): Likewise.
31909 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
31910 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
31911 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
31913 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
31914 define_expand patterns.
31915 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
31916 into NOTE_INSN_DELETED note rather than nop instruction.
31917 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
31920 2023-06-15 Jakub Jelinek <jakub@redhat.com>
31922 PR middle-end/79173
31923 * config/i386/i386.md (subborrow<mode>): Add alternative with
31924 memory destination and add for it define_peephole2
31925 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
31926 destination in these patterns.
31928 2023-06-15 Jakub Jelinek <jakub@redhat.com>
31930 PR middle-end/79173
31931 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
31932 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
31933 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
31934 using memory destination in these patterns.
31936 2023-06-15 Jakub Jelinek <jakub@redhat.com>
31938 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
31939 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
31940 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
31941 * fold-const-call.cc (fold_const_call): ... here.
31943 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
31945 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
31946 Rename to <su>abd<mode>3.
31947 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
31950 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
31952 * doc/md.texi (sabd, uabd): Document them.
31953 * internal-fn.def (ABD): Use new optab.
31954 * optabs.def (sabd_optab, uabd_optab): New optabs,
31955 * tree-vect-patterns.cc (vect_recog_absolute_difference):
31956 Recognize the following idiom abs (a - b).
31957 (vect_recog_sad_pattern): Refactor to use
31958 vect_recog_absolute_difference.
31959 (vect_recog_abd_pattern): Use patterns found by
31960 vect_recog_absolute_difference to build a new ABD
31963 2023-06-15 chenxiaolong <chenxl04200420@163.com>
31965 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
31966 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
31968 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31970 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
31971 (expand_vec_perm_const_1): Add merge optmization.
31973 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
31976 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
31977 (riscv_pass_by_reference): Return true for vector mode
31979 2023-06-15 Pan Li <pan2.li@intel.com>
31981 * config/riscv/autovec-opt.md: Align the predictor sytle.
31982 * config/riscv/autovec.md: Ditto.
31984 2023-06-15 Pan Li <pan2.li@intel.com>
31986 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
31987 Take elen instead of scalar BITS_PER_WORD.
31988 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
31989 instead of scaler BITS_PER_WORD.
31991 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
31993 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
31995 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31997 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
31998 Fix signed comparison warning in loop from npats to enelts.
32000 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
32002 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
32003 to offloading compilation.
32004 * config/gcn/mkoffload.cc (main): Adjust.
32005 * config/nvptx/mkoffload.cc (main): Likewise.
32006 * doc/invoke.texi (foffload-options): Update example.
32008 2023-06-14 liuhongt <hongtao.liu@intel.com>
32011 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
32012 for alternative 2 since there's no evex version for vpcmpeqd
32015 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
32017 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
32019 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
32021 * config/sh/divtab.cc: Remove.
32023 2023-06-13 Jakub Jelinek <jakub@redhat.com>
32025 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
32026 superfluous spaces around \t for vpcmpeqd.
32028 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
32030 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
32031 clearing vectors with only a single element. Set CLEARED if the
32032 vector was initialized to zero.
32034 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
32036 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
32039 (TUPLE_ENTRY): Undef.
32041 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32043 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
32044 (shuffle_generic_patterns): Ditto.
32045 (expand_vec_perm_const_1): Ditto.
32047 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32049 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
32050 (shuffle_decompress_patterns): Ditto.
32052 2023-06-13 Richard Biener <rguenther@suse.de>
32054 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
32056 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
32057 Kito Cheng <kito.cheng@sifive.com>
32059 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
32060 warning flag if func is not builtin
32061 * config/riscv/riscv.cc
32062 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
32063 (riscv_arg_has_vector): Determine whether the arg is vector type.
32064 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
32065 (riscv_init_cumulative_args): The same as header.
32066 (riscv_get_arg_info): Add the checking.
32067 (riscv_function_value): Check the func return and set warning flag
32068 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
32069 determine whether warning psabi or not.
32071 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32073 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
32074 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
32075 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
32076 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
32078 (arm_output_load_tpidr): Define.
32079 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
32080 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
32082 (reload_tp_hard): Likewise.
32083 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
32085 * doc/invoke.texi (Arm Options, mtp): Document new values.
32087 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32090 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
32091 AARCH64_TPIDRRO_EL0 value.
32092 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
32093 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
32094 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
32095 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
32097 2023-06-13 Alexandre Oliva <oliva@adacore.com>
32099 * range-op-float.cc (frange_nextafter): Drop inline.
32100 (frelop_early_resolve): Add static.
32101 (frange_float): Likewise.
32103 2023-06-13 Richard Biener <rguenther@suse.de>
32105 PR middle-end/110232
32106 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
32107 to check whether the buffer covers the whole vector.
32109 2023-06-13 Richard Biener <rguenther@suse.de>
32111 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
32112 .MASK_LOAD and friends set the size of the access to unknown.
32114 2023-06-13 Tejas Belagod <tbelagod@arm.com>
32117 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
32118 calls that have a constant input predicate vector.
32119 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
32120 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
32121 (svlast_impl::vect_all_same): Check if all vector elements are equal.
32123 2023-06-13 Andi Kleen <ak@linux.intel.com>
32125 * config/i386/gcc-auto-profile: Regenerate.
32127 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32129 * config/riscv/vector-iterators.md: Fix requirement.
32131 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32133 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
32134 (shuffle_decompress_patterns): New function.
32135 (expand_vec_perm_const_1): Add decompress optimization.
32137 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
32139 PR rtl-optimization/101188
32140 * postreload.cc (reload_cse_move2add_invalidate): New function,
32142 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
32144 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32146 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
32147 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
32148 and if maxv == 1, use constant element for duplicating into register.
32150 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
32152 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
32153 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
32154 (gimplify_adjust_omp_clauses): Change
32155 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
32156 GOMP_MAP_FORCE_PRESENT.
32157 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
32158 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
32159 to/from clauses with present modifier.
32161 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32163 PR tree-optimization/110205
32164 * range-op-float.cc (range_operator::fold_range): Add default FII
32166 * range-op-mixed.h (class operator_gt): Add missing final overrides.
32167 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
32168 (operator_lshift ::update_bitmask): Add final override.
32169 (operator_rshift ::update_bitmask): Add final override.
32170 * range-op.h (range_operator::fold_range): Add FII prototype.
32172 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32174 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
32175 Use range_op_handler directly.
32176 * range-op.cc (range_op_handler::range_op_handler): Unsigned
32177 param instead of tree-code.
32178 (ptr_op_widen_plus_signed): Delete.
32179 (ptr_op_widen_plus_unsigned): Delete.
32180 (ptr_op_widen_mult_signed): Delete.
32181 (ptr_op_widen_mult_unsigned): Delete.
32182 (range_op_table::initialize_integral_ops): Add new opcodes.
32183 * range-op.h (range_op_handler): Use unsigned.
32184 (OP_WIDEN_MULT_SIGNED): New.
32185 (OP_WIDEN_MULT_UNSIGNED): New.
32186 (OP_WIDEN_PLUS_SIGNED): New.
32187 (OP_WIDEN_PLUS_UNSIGNED): New.
32188 (RANGE_OP_TABLE_SIZE): New.
32189 (range_op_table::operator []): Use unsigned.
32190 (range_op_table::set): Use unsigned.
32191 (m_range_tree): Make unsigned.
32192 (ptr_op_widen_mult_signed): Remove.
32193 (ptr_op_widen_mult_unsigned): Remove.
32194 (ptr_op_widen_plus_signed): Remove.
32195 (ptr_op_widen_plus_unsigned): Remove.
32197 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32199 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
32200 manually as there is no access to the default operator.
32201 (cfn_copysign::fold_range): Don't check for validity.
32202 (cfn_ubsan::fold_range): Ditto.
32203 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
32204 * range-op.cc (default_operator): New.
32205 (range_op_handler::range_op_handler): Use default_operator
32207 (range_op_handler::operator bool): Move from header, compare
32208 against default operator.
32209 (range_op_handler::range_op): New.
32210 * range-op.h (range_op_handler::operator bool): Move.
32212 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32214 * range-op.cc (unified_table): Delete.
32215 (range_op_table operator_table): Instantiate.
32216 (range_op_table::range_op_table): Rename from unified_table.
32217 (range_op_handler::range_op_handler): Use range_op_table.
32218 * range-op.h (range_op_table::operator []): Inline.
32219 (range_op_table::set): Inline.
32221 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32223 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
32225 * gimple-range-op.cc (get_code): Rename from get_code_and_type
32227 (gimple_range_op_handler::supported_p): No need for type.
32228 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
32229 (cfn_copysign::fold_range): Ditto.
32230 (cfn_ubsan::fold_range): Ditto.
32231 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
32232 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
32233 * range-op-float.cc (operator_plus::op1_range): Ditto.
32234 (operator_mult::op1_range): Ditto.
32235 (range_op_float_tests): Ditto.
32236 * range-op.cc (get_op_handler): Remove.
32237 (range_op_handler::set_op_handler): Remove.
32238 (operator_plus::op1_range): No need for type.
32239 (operator_minus::op1_range): Ditto.
32240 (operator_mult::op1_range): Ditto.
32241 (operator_exact_divide::op1_range): Ditto.
32242 (operator_cast::op1_range): Ditto.
32243 (perator_bitwise_not::fold_range): Ditto.
32244 (operator_negate::fold_range): Ditto.
32245 * range-op.h (range_op_handler::range_op_handler): Remove type param.
32246 (range_cast): No need for type.
32247 (range_op_table::operator[]): Check for enum_code >= 0.
32248 * tree-data-ref.cc (compute_distributive_range): No need for type.
32249 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
32250 * value-query.cc (range_query::get_tree_range): Ditto.
32251 * value-relation.cc (relation_oracle::validate_relation): Ditto.
32252 * vr-values.cc (range_of_var_in_loop): Ditto.
32253 (simplify_using_ranges::fold_cond_with_ops): Ditto.
32255 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32257 * range-op-mixed.h (operator_max): Remove final.
32258 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
32259 (pointer_table::pointer_table): Remove.
32260 (class hybrid_max_operator): New.
32261 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
32262 * range-op.cc (pointer_tree_table): Remove.
32263 (unified_table::unified_table): Comment out MAX_EXPR.
32264 (get_op_handler): Remove check of pointer table.
32265 * range-op.h (class pointer_table): Remove.
32267 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32269 * range-op-mixed.h (operator_min): Remove final.
32270 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
32271 (class hybrid_min_operator): New.
32272 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
32273 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
32275 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32277 * range-op-mixed.h (operator_bitwise_or): Remove final.
32278 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
32279 (class hybrid_or_operator): New.
32280 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
32281 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
32283 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32285 * range-op-mixed.h (operator_bitwise_and): Remove final.
32286 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
32287 (class hybrid_and_operator): New.
32288 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
32289 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
32291 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32293 * Makefile.in (OBJS): Add range-op-ptr.o.
32294 * range-op-mixed.h (update_known_bitmask): Move prototype here.
32295 (minus_op1_op2_relation_effect): Move prototype here.
32296 (wi_includes_zero_p): Move function to here.
32297 (wi_zero_p): Ditto.
32298 * range-op.cc (update_known_bitmask): Remove static.
32299 (wi_includes_zero_p): Move to header.
32300 (wi_zero_p): Move to header.
32301 (minus_op1_op2_relation_effect): Remove static.
32302 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
32303 (pointer_plus_operator): Ditto.
32304 (pointer_min_max_operator): Ditto.
32305 (pointer_and_operator): Ditto.
32306 (pointer_or_operator): Ditto.
32307 (pointer_table): Ditto.
32308 (range_op_table::initialize_pointer_ops): Ditto.
32309 * range-op-ptr.cc: New.
32311 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32313 * range-op-mixed.h (class operator_max): Move from...
32314 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
32315 (get_op_handler): Remove the integral table.
32316 (class operator_max): Move from here.
32317 (integral_table::integral_table): Delete.
32318 * range-op.h (class integral_table): Delete.
32320 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32322 * range-op-mixed.h (class operator_min): Move from...
32323 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
32324 (class operator_min): Move from here.
32325 (integral_table::integral_table): Remove MIN_EXPR.
32327 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32329 * range-op-mixed.h (class operator_bitwise_or): Move from...
32330 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
32331 (class operator_bitwise_or): Move from here.
32332 (integral_table::integral_table): Remove BIT_IOR_EXPR.
32334 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32336 * range-op-mixed.h (class operator_bitwise_and): Move from...
32337 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
32338 (get_op_handler): Check for a pointer table entry first.
32339 (class operator_bitwise_and): Move from here.
32340 (integral_table::integral_table): Remove BIT_AND_EXPR.
32342 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32344 * range-op-mixed.h (class operator_bitwise_xor): Move from...
32345 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
32346 (class operator_bitwise_xor): Move from here.
32347 (integral_table::integral_table): Remove BIT_XOR_EXPR.
32348 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
32350 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32352 * range-op-mixed.h (class operator_bitwise_not): Move from...
32353 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
32354 (class operator_bitwise_not): Move from here.
32355 (integral_table::integral_table): Remove BIT_NOT_EXPR.
32356 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
32358 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32360 * range-op-mixed.h (class operator_addr_expr): Move from...
32361 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
32362 (class operator_addr_expr): Move from here.
32363 (integral_table::integral_table): Remove ADDR_EXPR.
32364 (pointer_table::pointer_table): Remove ADDR_EXPR.
32366 2023-06-12 Pan Li <pan2.li@intel.com>
32368 * config/riscv/riscv-vector-builtins-types.def
32369 (vfloat16m1_t): Add type to lmul1 ops.
32370 (vfloat16m2_t): Likewise.
32371 (vfloat16m4_t): Likewise.
32373 2023-06-12 Richard Biener <rguenther@suse.de>
32375 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
32376 .MASK_STORE and friend set the size of the access to
32379 2023-06-12 Tamar Christina <tamar.christina@arm.com>
32381 * config.in: Regenerate.
32382 * configure: Regenerate.
32383 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
32385 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32387 * config/riscv/autovec-opt.md
32388 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
32389 (*<any_shiftrt:optab>trunc<mode>): Ditto.
32390 * config/riscv/autovec.md (<optab><mode>3): Change to
32391 define_insn_and_split.
32392 (v<optab><mode>3): Ditto.
32393 (trunc<mode><v_double_trunc>2): Ditto.
32395 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32397 * simplify-rtx.cc (simplify_const_unary_operation):
32398 Handle US_TRUNCATE, SS_TRUNCATE.
32400 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
32403 * doc/gm2.texi (Standard procedures): Fix Next link.
32405 2023-06-12 Tamar Christina <tamar.christina@arm.com>
32407 * config.in: Regenerate.
32409 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
32411 PR middle-end/110142
32412 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
32413 subtype to vect_widened_op_tree and remove subtype parameter, also
32414 remove superfluous overloaded function definition.
32415 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
32416 to call to vect_recog_widen_op_pattern.
32417 (vect_recog_widen_minus_pattern): Likewise.
32419 2023-06-12 liuhongt <hongtao.liu@intel.com>
32421 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
32422 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
32423 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
32424 (vec_unpacks_lo_<mode>): Ditto.
32425 (vec_unpacks_hi_<mode>): Ditto.
32426 (sse_movlhps_<mode>): New define_insn.
32427 (ssse3_palignr<mode>_perm): Extend to V_128H.
32428 (V_128H): New mode iterator.
32429 (ssepackPHmode): New mode attribute.
32430 (vunpck_extract_mode): Ditto.
32431 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
32432 (vpckfloat_temp_mode): Ditto.
32433 (vpckfloat_op_mode): Ditto.
32434 (vunpckfixt_mode): Extend to VxHF.
32435 (vunpckfixt_model): Ditto.
32436 (vunpckfixt_extract_mode): Ditto.
32438 2023-06-12 Richard Biener <rguenther@suse.de>
32440 PR middle-end/110200
32441 * genmatch.cc (expr::gen_transform): Put braces around
32442 the if arm for the (convert ...) short-cut.
32444 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
32447 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
32448 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
32450 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
32453 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
32454 floating constant itself for real_to_target call.
32456 2023-06-12 Pan Li <pan2.li@intel.com>
32458 * config/riscv/riscv-vector-builtins-types.def
32459 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
32460 (vfloat16mf2_t): Ditto.
32461 (vfloat16m1_t): Ditto.
32462 (vfloat16m2_t): Ditto.
32463 (vfloat16m4_t): Ditto.
32465 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
32467 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
32468 Do not require a stack frame when debugging is enabled for AIX.
32470 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
32472 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
32473 Remove attribute values.
32474 (insv_notbit): New post-reload insn.
32475 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
32476 (*insv.not-bit.0_split, *insv.not-bit.7_split)
32477 (*insv.xor-extract_split): Split to insv_notbit.
32478 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
32479 (*insv.xor-extract): Remove post-reload insns.
32480 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
32481 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
32482 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
32483 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
32485 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
32488 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
32489 (MSB, SIZE): New mode attributes.
32490 (any_shift): New code iterator.
32491 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
32492 (*lshr<mode>3_const_split): Add constraint alternative for
32493 the case of shift-offset = MSB. Ditch "length" attribute.
32494 (extzv<mode): New. replaces extzv. Adjust following patterns.
32495 Use avr_out_extr, avr_out_extr_not to print asm.
32496 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
32497 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
32498 * config/avr/constraints.md (C15, C23, C31, Yil): New
32499 * config/avr/predicates.md (reg_or_low_io_operand)
32500 (const7_operand, reg_or_low_io_operand)
32501 (const15_operand, const_0_to_15_operand)
32502 (const23_operand, const_0_to_23_operand)
32503 (const31_operand, const_0_to_31_operand): New.
32504 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
32505 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
32506 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
32507 MSB case to new insn constraint "r" for operands[1].
32508 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
32509 Handle these cases.
32510 (avr_rtx_costs_1): Adjust cost for a new pattern.
32512 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32514 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
32515 (vector_insn_info::parse_insn): Add rtx_insn parse.
32516 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
32517 (get_first_vsetvl): New function.
32518 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
32519 (pass_vsetvl::cleanup_insns): Remove it.
32520 (pass_vsetvl::ssa_post_optimization): New function.
32521 (has_no_uses): Ditto.
32522 (pass_vsetvl::propagate_avl): Remove it.
32523 (pass_vsetvl::df_post_optimization): New function.
32524 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
32525 * config/riscv/riscv-vsetvl.h: Adapt declaration.
32527 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
32529 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
32530 (ipcp_vr_lattice::print): Call dump method.
32531 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
32533 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
32534 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
32536 (initialize_node_lattices): Pass type when appropriate.
32537 (ipa_vr_operation_and_type_effects): Make type agnostic.
32538 (ipa_value_range_from_jfunc): Same.
32539 (propagate_vr_across_jump_function): Same.
32540 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
32541 (evaluate_properties_for_edge): Same.
32542 * ipa-prop.cc (ipa_vr::get_vrange): Same.
32543 (ipcp_update_vr): Same.
32544 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
32545 (ipa_range_set_and_normalize): Same.
32547 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
32551 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
32552 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
32553 (avr_pass_data_ifelse): New pass_data for it.
32554 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
32555 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
32556 (avr_out_cmp_ext): New functions.
32557 (compare_condtition): Make sure REG_CC dies in the branch insn.
32558 (avr_rtx_costs_1): Add computation of cbranch costs.
32559 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
32560 [ADJUST_LEN_CMP_SEXT]Handle them.
32561 (TARGET_CANONICALIZE_COMPARISON): New define.
32562 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
32563 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
32564 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
32565 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
32566 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
32567 (avr_out_cmp_zext): New Protos
32568 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
32569 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
32570 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
32571 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
32572 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
32573 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
32574 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
32575 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
32576 (adjust_len) [add_set_ZN, cmp_zext]: New.
32577 (QIPSI): New mode iterator.
32578 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
32579 (gelt): New code iterator.
32580 (gelt_eqne): New code attribute.
32581 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
32582 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
32583 (*cmpqi_sign_extend): Remove insns.
32584 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
32585 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
32586 * config/avr/predicates.md (scratch_or_d_register_operand): New.
32587 * config/avr/constraints.md (Yxx): New constraint.
32589 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32591 * config/riscv/autovec.md (select_vl<mode>): New pattern.
32592 * config/riscv/riscv-protos.h (expand_select_vl): New function.
32593 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
32595 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32597 * range-op-float.cc (foperator_mult_div_base): Delete.
32598 (foperator_mult_div_base::find_range): Make static local function.
32599 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
32600 (operator_mult::op1_range): Rename from foperator_mult.
32601 (operator_mult::op2_range): Ditto.
32602 (operator_mult::rv_fold): Ditto.
32603 (float_table::float_table): Remove MULT_EXPR.
32604 (class foperator_div): Inherit from range_operator.
32605 (float_table::float_table): Delete.
32606 * range-op-mixed.h (class operator_mult): Combined from integer
32608 * range-op.cc (float_tree_table): Delete.
32609 (op_mult): New object.
32610 (unified_table::unified_table): Add MULT_EXPR.
32611 (get_op_handler): Do not check float table any longer.
32612 (class cross_product_operator): Move to range-op-mixed.h.
32613 (class operator_mult): Move to range-op-mixed.h.
32614 (integral_table::integral_table): Remove MULT_EXPR.
32615 (pointer_table::pointer_table): Remove MULT_EXPR.
32616 * range-op.h (float_table): Remove.
32618 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32620 * range-op-float.cc (foperator_negate): Remove. Move prototypes
32621 to range-op-mixed.h
32622 (operator_negate::fold_range): Rename from foperator_negate.
32623 (operator_negate::op1_range): Ditto.
32624 (float_table::float_table): Remove NEGATE_EXPR.
32625 * range-op-mixed.h (class operator_negate): Combined from integer
32627 * range-op.cc (op_negate): New object.
32628 (unified_table::unified_table): Add NEGATE_EXPR.
32629 (class operator_negate): Move to range-op-mixed.h.
32630 (integral_table::integral_table): Remove NEGATE_EXPR.
32631 (pointer_table::pointer_table): Remove NEGATE_EXPR.
32633 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32635 * range-op-float.cc (foperator_minus): Remove. Move prototypes
32636 to range-op-mixed.h
32637 (operator_minus::fold_range): Rename from foperator_minus.
32638 (operator_minus::op1_range): Ditto.
32639 (operator_minus::op2_range): Ditto.
32640 (operator_minus::rv_fold): Ditto.
32641 (float_table::float_table): Remove MINUS_EXPR.
32642 * range-op-mixed.h (class operator_minus): Combined from integer
32644 * range-op.cc (op_minus): New object.
32645 (unified_table::unified_table): Add MINUS_EXPR.
32646 (class operator_minus): Move to range-op-mixed.h.
32647 (integral_table::integral_table): Remove MINUS_EXPR.
32648 (pointer_table::pointer_table): Remove MINUS_EXPR.
32650 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32652 * range-op-float.cc (foperator_abs): Remove. Move prototypes
32653 to range-op-mixed.h
32654 (operator_abs::fold_range): Rename from foperator_abs.
32655 (operator_abs::op1_range): Ditto.
32656 (float_table::float_table): Remove ABS_EXPR.
32657 * range-op-mixed.h (class operator_abs): Combined from integer
32659 * range-op.cc (op_abs): New object.
32660 (unified_table::unified_table): Add ABS_EXPR.
32661 (class operator_abs): Move to range-op-mixed.h.
32662 (integral_table::integral_table): Remove ABS_EXPR.
32663 (pointer_table::pointer_table): Remove ABS_EXPR.
32665 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32667 * range-op-float.cc (foperator_plus): Remove. Move prototypes
32668 to range-op-mixed.h
32669 (operator_plus::fold_range): Rename from foperator_plus.
32670 (operator_plus::op1_range): Ditto.
32671 (operator_plus::op2_range): Ditto.
32672 (operator_plus::rv_fold): Ditto.
32673 (float_table::float_table): Remove PLUS_EXPR.
32674 * range-op-mixed.h (class operator_plus): Combined from integer
32676 * range-op.cc (op_plus): New object.
32677 (unified_table::unified_table): Add PLUS_EXPR.
32678 (class operator_plus): Move to range-op-mixed.h.
32679 (integral_table::integral_table): Remove PLUS_EXPR.
32680 (pointer_table::pointer_table): Remove PLUS_EXPR.
32682 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32684 * range-op-mixed.h (class operator_cast): Combined from integer
32686 * range-op.cc (op_cast): New object.
32687 (unified_table::unified_table): Add op_cast
32688 (class operator_cast): Move to range-op-mixed.h.
32689 (integral_table::integral_table): Remove op_cast
32690 (pointer_table::pointer_table): Remove op_cast.
32692 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32694 * range-op-float.cc (operator_cst::fold_range): New.
32695 * range-op-mixed.h (class operator_cst): Move from integer file.
32696 * range-op.cc (op_cst): New object.
32697 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
32698 (class operator_cst): Move to range-op-mixed.h.
32699 (integral_table::integral_table): Remove op_cst.
32700 (pointer_table::pointer_table): Remove op_cst.
32702 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32704 * range-op-float.cc (foperator_identity): Remove. Move prototypes
32705 to range-op-mixed.h
32706 (operator_identity::fold_range): Rename from foperator_identity.
32707 (operator_identity::op1_range): Ditto.
32708 (float_table::float_table): Remove fop_identity.
32709 * range-op-mixed.h (class operator_identity): Combined from integer
32711 * range-op.cc (op_identity): New object.
32712 (unified_table::unified_table): Add op_identity.
32713 (class operator_identity): Move to range-op-mixed.h.
32714 (integral_table::integral_table): Remove identity.
32715 (pointer_table::pointer_table): Remove identity.
32717 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32719 * range-op-float.cc (foperator_ge): Remove. Move prototypes
32720 to range-op-mixed.h
32721 (operator_ge::fold_range): Rename from foperator_ge.
32722 (operator_ge::op1_range): Ditto.
32723 (float_table::float_table): Remove GE_EXPR.
32724 * range-op-mixed.h (class operator_ge): Combined from integer
32726 * range-op.cc (op_ge): New object.
32727 (unified_table::unified_table): Add GE_EXPR.
32728 (class operator_ge): Move to range-op-mixed.h.
32729 (ge_op1_op2_relation): Fold into
32730 operator_ge::op1_op2_relation.
32731 (integral_table::integral_table): Remove GE_EXPR.
32732 (pointer_table::pointer_table): Remove GE_EXPR.
32733 * range-op.h (ge_op1_op2_relation): Delete.
32735 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32737 * range-op-float.cc (foperator_gt): Remove. Move prototypes
32738 to range-op-mixed.h
32739 (operator_gt::fold_range): Rename from foperator_gt.
32740 (operator_gt::op1_range): Ditto.
32741 (float_table::float_table): Remove GT_EXPR.
32742 * range-op-mixed.h (class operator_gt): Combined from integer
32744 * range-op.cc (op_gt): New object.
32745 (unified_table::unified_table): Add GT_EXPR.
32746 (class operator_gt): Move to range-op-mixed.h.
32747 (gt_op1_op2_relation): Fold into
32748 operator_gt::op1_op2_relation.
32749 (integral_table::integral_table): Remove GT_EXPR.
32750 (pointer_table::pointer_table): Remove GT_EXPR.
32751 * range-op.h (gt_op1_op2_relation): Delete.
32753 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32755 * range-op-float.cc (foperator_le): Remove. Move prototypes
32756 to range-op-mixed.h
32757 (operator_le::fold_range): Rename from foperator_le.
32758 (operator_le::op1_range): Ditto.
32759 (float_table::float_table): Remove LE_EXPR.
32760 * range-op-mixed.h (class operator_le): Combined from integer
32762 * range-op.cc (op_le): New object.
32763 (unified_table::unified_table): Add LE_EXPR.
32764 (class operator_le): Move to range-op-mixed.h.
32765 (le_op1_op2_relation): Fold into
32766 operator_le::op1_op2_relation.
32767 (integral_table::integral_table): Remove LE_EXPR.
32768 (pointer_table::pointer_table): Remove LE_EXPR.
32769 * range-op.h (le_op1_op2_relation): Delete.
32771 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32773 * range-op-float.cc (foperator_lt): Remove. Move prototypes
32774 to range-op-mixed.h
32775 (operator_lt::fold_range): Rename from foperator_lt.
32776 (operator_lt::op1_range): Ditto.
32777 (float_table::float_table): Remove LT_EXPR.
32778 * range-op-mixed.h (class operator_lt): Combined from integer
32780 * range-op.cc (op_lt): New object.
32781 (unified_table::unified_table): Add LT_EXPR.
32782 (class operator_lt): Move to range-op-mixed.h.
32783 (lt_op1_op2_relation): Fold into
32784 operator_lt::op1_op2_relation.
32785 (integral_table::integral_table): Remove LT_EXPR.
32786 (pointer_table::pointer_table): Remove LT_EXPR.
32787 * range-op.h (lt_op1_op2_relation): Delete.
32789 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32791 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
32792 to range-op-mixed.h
32793 (operator_equal::fold_range): Rename from foperator_not_equal.
32794 (operator_equal::op1_range): Ditto.
32795 (float_table::float_table): Remove NE_EXPR.
32796 * range-op-mixed.h (class operator_not_equal): Combined from integer
32798 * range-op.cc (op_equal): New object.
32799 (unified_table::unified_table): Add NE_EXPR.
32800 (class operator_not_equal): Move to range-op-mixed.h.
32801 (not_equal_op1_op2_relation): Fold into
32802 operator_not_equal::op1_op2_relation.
32803 (integral_table::integral_table): Remove NE_EXPR.
32804 (pointer_table::pointer_table): Remove NE_EXPR.
32805 * range-op.h (not_equal_op1_op2_relation): Delete.
32807 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32809 * range-op-float.cc (foperator_equal): Remove. Move prototypes
32810 to range-op-mixed.h
32811 (operator_equal::fold_range): Rename from foperator_equal.
32812 (operator_equal::op1_range): Ditto.
32813 (float_table::float_table): Remove EQ_EXPR.
32814 * range-op-mixed.h (class operator_equal): Combined from integer
32816 * range-op.cc (op_equal): New object.
32817 (unified_table::unified_table): Add EQ_EXPR.
32818 (class operator_equal): Move to range-op-mixed.h.
32819 (equal_op1_op2_relation): Fold into
32820 operator_equal::op1_op2_relation.
32821 (integral_table::integral_table): Remove EQ_EXPR.
32822 (pointer_table::pointer_table): Remove EQ_EXPR.
32823 * range-op.h (equal_op1_op2_relation): Delete.
32825 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32827 * range-op-float.cc (class float_table): Move to header.
32828 (float_table::float_table): Move float only operators to...
32829 (range_op_table::initialize_float_ops): Here.
32830 * range-op-mixed.h: New.
32831 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
32833 (float_tree_table): Moved from range-op-float.cc.
32834 (unified_tree_table): New.
32835 (unified_table::unified_table): New. Call initialize routines.
32836 (get_op_handler): Check unified table first.
32837 (range_op_handler::range_op_handler): Handle no type constructor.
32838 (integral_table::integral_table): Move integral only operators to...
32839 (range_op_table::initialize_integral_ops): Here.
32840 (pointer_table::pointer_table): Move pointer only operators to...
32841 (range_op_table::initialize_pointer_ops): Here.
32842 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
32843 (get_bool_state): Ditto.
32844 (empty_range_varying): Ditto.
32845 (relop_early_resolve): Ditto.
32846 (class range_op_table): Add new init methods for range types.
32847 (class integral_table): Move declaration to here.
32848 (class pointer_table): Move declaration to here.
32849 (class float_table): Move declaration to here.
32851 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32852 Richard Sandiford <richard.sandiford@arm.com>
32853 Richard Biener <rguenther@suse.de>
32855 * doc/md.texi: Add SELECT_VL support.
32856 * internal-fn.def (SELECT_VL): Ditto.
32857 * optabs.def (OPTAB_D): Ditto.
32858 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
32859 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
32860 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
32861 (vectorizable_store): Ditto.
32862 (vectorizable_load): Ditto.
32863 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
32865 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
32868 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
32871 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
32873 * range-op.cc (range_cast): Move to...
32874 * range-op.h (range_cast): Here and add generic a version.
32876 2023-06-09 Marek Polacek <polacek@redhat.com>
32880 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
32881 warn about designated initializers in C only.
32883 2023-06-09 Andrew Pinski <apinski@marvell.com>
32885 PR tree-optimization/97711
32886 PR tree-optimization/110155
32887 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
32888 ((zero_one != 0) ? z <op> y : y): Likewise.
32890 2023-06-09 Andrew Pinski <apinski@marvell.com>
32892 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
32893 multiply rather than negation/bit_and.
32895 2023-06-09 Andrew Pinski <apinski@marvell.com>
32897 * match.pd (`X & -Y -> X * Y`): Allow for truncation
32898 and the same type for unsigned types.
32900 2023-06-09 Andrew Pinski <apinski@marvell.com>
32902 PR tree-optimization/110165
32903 PR tree-optimization/110166
32904 * match.pd (zero_one_valued_p): Don't accept
32905 signed 1-bit integers.
32907 2023-06-09 Richard Biener <rguenther@suse.de>
32909 * match.pd (two conversions in a row): Use element_precision
32910 to DTRT for VECTOR_TYPE.
32912 2023-06-09 Pan Li <pan2.li@intel.com>
32914 * config/riscv/riscv.md (enabled): Move to another place, and
32915 add fp_vector_disabled to the cond.
32916 (fp_vector_disabled): New attr defined for disabling fp.
32917 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
32919 2023-06-09 Pan Li <pan2.li@intel.com>
32921 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
32924 2023-06-09 liuhongt <hongtao.liu@intel.com>
32927 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
32928 view_convert_expr mask to signed type when folding pblendvb
32931 2023-06-09 liuhongt <hongtao.liu@intel.com>
32934 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
32935 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
32936 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
32938 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
32939 real codename for __builtin_ia32_pabs{b,w,d}.
32941 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
32943 * gimple-range-op.cc
32944 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
32945 (gimple_range_op_handler::maybe_builtin_call): Adjust.
32946 * gimple-range-op.h (operand1, operand2): Use m_operator.
32947 * range-op.cc (integral_table, pointer_table): Relocate.
32948 (get_op_handler): Rename from get_handler and handle all types.
32949 (range_op_handler::range_op_handler): Relocate.
32950 (range_op_handler::set_op_handler): Relocate and adjust.
32951 (range_op_handler::range_op_handler): Relocate.
32952 (dispatch_trio): New.
32953 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
32954 (range_op_handler::dispatch_kind): New.
32955 (range_op_handler::fold_range): Relocate and Use new dispatch value.
32956 (range_op_handler::op1_range): Ditto.
32957 (range_op_handler::op2_range): Ditto.
32958 (range_op_handler::lhs_op1_relation): Ditto.
32959 (range_op_handler::lhs_op2_relation): Ditto.
32960 (range_op_handler::op1_op2_relation): Ditto.
32961 (range_op_handler::set_op_handler): Use m_operator member.
32962 * range-op.h (range_op_handler::operator bool): Use m_operator.
32963 (range_op_handler::dispatch_kind): New.
32964 (range_op_handler::m_valid): Delete.
32965 (range_op_handler::m_int): Delete
32966 (range_op_handler::m_float): Delete
32967 (range_op_handler::m_operator): New.
32968 (range_op_table::operator[]): Relocate from .cc file.
32969 (range_op_table::set): Ditto.
32970 * value-range.h (class vrange): Make range_op_handler a friend.
32972 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
32974 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
32975 (cfn_pass_through_arg1): Adjust using statemenmt.
32976 (cfn_signbit): Change base class, adjust using statement.
32977 (cfn_copysign): Ditto.
32979 (cfn_sincos): Ditto.
32980 * range-op-float.cc (fold_range): Change class to range_operator.
32984 (lhs_op1_relation): Ditto.
32985 (lhs_op2_relation): Ditto.
32986 (op1_op2_relation): Ditto.
32987 (foperator_*): Ditto.
32988 (class float_table): New. Inherit from range_op_table.
32989 (floating_tree_table) Change to range_op_table pointer.
32990 (class floating_op_table): Delete.
32991 * range-op.cc (operator_equal): Adjust using statement.
32992 (operator_not_equal): Ditto.
32993 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
32994 (operator_minus, operator_cast): Ditto.
32995 (operator_bitwise_and, pointer_plus_operator): Ditto.
32996 (get_float_handle): Change return type.
32997 * range-op.h (range_operator_float): Delete. Relocate all methods
32998 into class range_operator.
32999 (range_op_handler::m_float): Change type to range_operator.
33000 (floating_op_table): Delete.
33001 (floating_tree_table): Change type.
33003 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
33005 * range-op.cc (range_operator::fold_range): Call virtual routine.
33006 (range_operator::update_bitmask): New.
33007 (operator_equal::update_bitmask): New.
33008 (operator_not_equal::update_bitmask): New.
33009 (operator_lt::update_bitmask): New.
33010 (operator_le::update_bitmask): New.
33011 (operator_gt::update_bitmask): New.
33012 (operator_ge::update_bitmask): New.
33013 (operator_ge::update_bitmask): New.
33014 (operator_plus::update_bitmask): New.
33015 (operator_minus::update_bitmask): New.
33016 (operator_pointer_diff::update_bitmask): New.
33017 (operator_min::update_bitmask): New.
33018 (operator_max::update_bitmask): New.
33019 (operator_mult::update_bitmask): New.
33020 (operator_div:operator_div):New.
33021 (operator_div::update_bitmask): New.
33022 (operator_div::m_code): New member.
33023 (operator_exact_divide::operator_exact_divide): New constructor.
33024 (operator_lshift::update_bitmask): New.
33025 (operator_rshift::update_bitmask): New.
33026 (operator_bitwise_and::update_bitmask): New.
33027 (operator_bitwise_or::update_bitmask): New.
33028 (operator_bitwise_xor::update_bitmask): New.
33029 (operator_trunc_mod::update_bitmask): New.
33030 (op_ident, op_unknown, op_ptr_min_max): New.
33031 (op_nop, op_convert): Delete.
33032 (op_ssa, op_paren, op_obj_type): Delete.
33033 (op_realpart, op_imagpart): Delete.
33034 (op_ptr_min, op_ptr_max): Delete.
33035 (pointer_plus_operator:update_bitmask): New.
33036 (range_op_table::set): Do not use m_code.
33037 (integral_table::integral_table): Adjust to single instances.
33038 * range-op.h (range_operator::range_operator): Delete.
33039 (range_operator::m_code): Delete.
33040 (range_operator::update_bitmask): New.
33042 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
33044 * range-op-float.cc (range_operator_float::fold_range): Return
33045 NAN of the result type.
33047 2023-06-08 Jakub Jelinek <jakub@redhat.com>
33049 * optabs.cc (expand_ffs): Add forward declaration.
33050 (expand_doubleword_clz): Rename to ...
33051 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
33052 handle also doubleword CTZ and FFS in addition to CLZ.
33053 (expand_unop): Adjust caller. Also call it for doubleword
33054 ctz_optab and ffs_optab.
33056 2023-06-08 Jakub Jelinek <jakub@redhat.com>
33059 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
33060 n_words == 2 recurse with mmx_ok as first argument rather than false.
33062 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
33064 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
33065 avoid sign extension/undefined behaviour when setting each bit.
33067 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
33068 Uros Bizjak <ubizjak@gmail.com>
33070 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
33071 Use new x86_stc instruction when the carry flag must be set.
33072 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
33073 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
33074 * config/i386/i386.h (TARGET_SLOW_STC): New define.
33075 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
33076 (x86_stc): New define_insn.
33077 (define_peephole2): Convert x86_stc into alternate implementation
33078 on pentium4 without -Os when a QImode register is available.
33079 (*x86_cmc): New define_insn.
33080 (define_peephole2): Convert *x86_cmc into alternate implementation
33081 on pentium4 without -Os when a QImode register is available.
33082 (*setccc): New define_insn_and_split for a no-op CCCmode move.
33083 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
33084 recognize (and eliminate) the carry flag being copied to itself.
33085 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
33086 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
33088 2023-06-07 Andrew Pinski <apinski@marvell.com>
33090 * match.pd: Fix comment for the
33091 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
33093 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
33094 Jeff Law <jlaw@ventanamicro.com>
33096 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
33097 (rotrsi3_sext): Expose generator.
33098 (rotlsi3 pattern): Hide generator.
33099 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
33101 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
33102 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
33103 (mulsi3, <optab>si3): Likewise.
33104 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
33105 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
33106 (<u>mulsidi3): Likewise.
33107 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
33108 (mulsi3_extended, <optab>si3_extended): Likewise.
33109 (splitter for shadd feeding divison): Update RTL pattern to account
33110 for changes in how 32 bit ops are expanded for TARGET_64BIT.
33111 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
33113 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
33116 * config/riscv/riscv.cc (riscv_print_operand): Calculate
33117 memmodel only when it is valid.
33119 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
33121 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
33122 for constant element of a vector.
33124 2023-06-07 Jakub Jelinek <jakub@redhat.com>
33126 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
33127 instead compare tree_nonzero_bits <= 1U rather than just == 1.
33129 2023-06-07 Alex Coplan <alex.coplan@arm.com>
33132 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
33134 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
33135 names for builtins.
33136 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
33137 setup if in_lto_p, just like we do for SVE.
33138 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
33139 (__arm_st64b): Delete.
33140 (__arm_st64bv): Delete.
33141 (__arm_st64bv0): Delete.
33143 2023-06-07 Alex Coplan <alex.coplan@arm.com>
33146 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
33147 Use input operand for the destination address.
33148 * config/aarch64/aarch64.md (st64b): Fix constraint on address
33151 2023-06-07 Alex Coplan <alex.coplan@arm.com>
33154 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
33155 Replace eight consecutive spaces with tabs.
33156 (aarch64_init_ls64_builtins): Likewise.
33157 (aarch64_expand_builtin_ls64): Likewise.
33158 * config/aarch64/aarch64.md (ld64b): Likewise.
33161 (st64bv0): Likewise.
33163 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
33165 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
33166 offset table pseudo to a general reg subset.
33168 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33170 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
33172 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
33174 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
33175 (aarch64_sqxtun2<mode>_le): Likewise.
33176 (aarch64_sqxtun2<mode>_be): Likewise.
33177 (aarch64_sqxtun2<mode>): Adjust for the above.
33178 (aarch64_sqmovun<mode>): New define_expand.
33179 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
33180 (half_mask): New mode attribute.
33181 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
33184 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33186 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
33188 (aarch64_addp<mode>_insn): ... This...
33189 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
33190 (aarch64_addp<mode>): New define_expand.
33192 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33194 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
33195 * config/riscv/riscv-v.cc
33196 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
33198 (rvv_builder::single_step_npatterns_p): New function.
33199 (rvv_builder::npatterns_all_equal_p): Ditto.
33200 (const_vec_all_in_range_p): Support POLY handling.
33201 (gen_const_vector_dup): Ditto.
33202 (emit_vlmax_gather_insn): Add vrgatherei16.
33203 (emit_vlmax_masked_gather_mu_insn): Ditto.
33204 (expand_const_vector): Add VLA SLP const vector support.
33205 (expand_vec_perm): Support POLY.
33206 (struct expand_vec_perm_d): New struct.
33207 (shuffle_generic_patterns): New function.
33208 (expand_vec_perm_const_1): Ditto.
33209 (expand_vec_perm_const): Ditto.
33210 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
33211 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
33213 2023-06-07 Andrew Pinski <apinski@marvell.com>
33215 PR middle-end/110117
33216 * expr.cc (expand_single_bit_test): Handle
33217 const_int from expand_expr.
33219 2023-06-07 Andrew Pinski <apinski@marvell.com>
33221 * expr.cc (do_store_flag): Rearrange the
33222 TER code so that it overrides the nonzero bits
33223 info if we had `a & POW2`.
33225 2023-06-07 Andrew Pinski <apinski@marvell.com>
33227 PR tree-optimization/110134
33228 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
33230 (-A CMP CST -> B CMP (-CST)): Likewise.
33232 2023-06-07 Andrew Pinski <apinski@marvell.com>
33234 PR tree-optimization/89263
33235 PR tree-optimization/99069
33236 PR tree-optimization/20083
33237 PR tree-optimization/94898
33238 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
33239 one of the operands are constant.
33241 2023-06-07 Andrew Pinski <apinski@marvell.com>
33243 * match.pd (zero_one_valued_p): Match 0 integer constant
33246 2023-06-07 Pan Li <pan2.li@intel.com>
33248 * config/riscv/riscv-vector-builtins-types.def
33249 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
33250 (vfloat32m1_t): Ditto.
33251 (vfloat32m2_t): Ditto.
33252 (vfloat32m4_t): Ditto.
33253 (vfloat32m8_t): Ditto.
33254 (vint16mf4_t): Ditto.
33255 (vint16mf2_t): Ditto.
33256 (vint16m1_t): Ditto.
33257 (vint16m2_t): Ditto.
33258 (vint16m4_t): Ditto.
33259 (vint16m8_t): Ditto.
33260 (vuint16mf4_t): Ditto.
33261 (vuint16mf2_t): Ditto.
33262 (vuint16m1_t): Ditto.
33263 (vuint16m2_t): Ditto.
33264 (vuint16m4_t): Ditto.
33265 (vuint16m8_t): Ditto.
33266 (vint32mf2_t): Ditto.
33267 (vint32m1_t): Ditto.
33268 (vint32m2_t): Ditto.
33269 (vint32m4_t): Ditto.
33270 (vint32m8_t): Ditto.
33271 (vuint32mf2_t): Ditto.
33272 (vuint32m1_t): Ditto.
33273 (vuint32m2_t): Ditto.
33274 (vuint32m4_t): Ditto.
33275 (vuint32m8_t): Ditto.
33277 2023-06-07 Jason Merrill <jason@redhat.com>
33280 * doc/invoke.texi: Document it.
33282 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
33284 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
33285 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
33286 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
33287 NOT (BITREVERSE x) as BITREVERSE (NOT x).
33288 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
33289 Optimize PARITY (BITREVERSE x) as PARITY x.
33290 Optimize BITREVERSE (BITREVERSE x) as x.
33291 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
33292 BITREVERSE of a constant integer at compile-time.
33293 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
33294 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
33295 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
33296 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
33297 Optimize COPYSIGN (x, ABS y) as ABS x.
33298 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
33299 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
33300 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
33301 arguments at compile-time.
33303 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
33305 * rtl.h (function_invariant_p): Change return type from int to bool.
33306 * reload1.cc (function_invariant_p): Change return type from
33307 int to bool and adjust function body accordingly.
33309 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33311 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
33312 (*single_<optab>mult_plus<mode>): Ditto.
33313 (*double_<optab>mult_plus<mode>): Ditto.
33314 (*sign_zero_extend_fma): Ditto.
33315 (*zero_sign_extend_fma): Ditto.
33316 * config/riscv/riscv-protos.h (enum insn_type): New enum.
33318 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
33319 Tobias Burnus <tobias@codesourcery.com>
33321 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
33322 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
33324 (omp_get_attachment): Handle map clauses with 'present' modifier.
33325 (omp_group_base): Likewise.
33326 (gimplify_scan_omp_clauses): Reorder present maps to come first.
33327 Set GOVD flags for present defaultmaps.
33328 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
33329 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
33331 (lower_omp_target): Handle map clauses with 'present' modifier.
33332 Handle 'to' and 'from' clauses with 'present'.
33333 * tree-core.h (enum omp_clause_defaultmap_kind): Add
33334 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
33335 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
33336 'from' clauses with 'present' modifier. Handle present defaultmap.
33337 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
33339 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
33341 * config/rs6000/genfusion.pl: Delete some dead code.
33343 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
33345 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
33347 (gen_ld_cmpi_p10): ... this.
33349 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
33352 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
33353 duplicate expression.
33355 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33357 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
33358 Handle unsigned reduc_plus_scal_ builtins.
33359 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
33360 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
33361 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
33362 __builtin_aarch64_reduc_plus_scal_v2di.
33363 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
33365 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33367 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
33368 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
33369 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
33371 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33373 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
33374 (aarch64_shrn<mode>_insn_be): Delete.
33375 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
33376 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
33377 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
33378 (aarch64_rshrn<mode>_insn_le): Delete.
33379 (aarch64_rshrn<mode>_insn_be): Delete.
33380 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
33381 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
33383 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33385 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
33387 (aarch64_pars_overlap_p): Likewise.
33388 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
33389 Express in terms of UNSPEC_ADDV.
33390 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
33391 (*aarch64_<su>addlv<mode>_reduction): Define.
33392 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
33393 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
33394 (aarch64_pars_overlap_p): Likewise.
33395 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
33396 (VQUADW): New mode attribute.
33397 (VWIDE2X_S): Likewise.
33399 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
33400 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
33402 2023-06-06 Richard Biener <rguenther@suse.de>
33404 PR middle-end/110055
33405 * gimplify.cc (gimplify_target_expr): Do not emit
33406 CLOBBERs for variables which have static storage duration
33407 after gimplifying their initializers.
33409 2023-06-06 Richard Biener <rguenther@suse.de>
33411 PR tree-optimization/109143
33412 * tree-ssa-structalias.cc (solution_set_expand): Avoid
33413 one bitmap iteration and optimize bit range setting.
33415 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
33417 PR bootstrap/110120
33418 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
33419 XVECEXP, not XEXP, to access first item of a PARALLEL.
33421 2023-06-06 Pan Li <pan2.li@intel.com>
33423 * config/riscv/riscv-vector-builtins-types.def
33424 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
33425 (vfloat16mf2_t): Likewise.
33426 (vfloat16m1_t): Likewise.
33427 (vfloat16m2_t): Likewise.
33428 (vfloat16m4_t): Likewise.
33429 (vfloat16m8_t): Likewise.
33430 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
33431 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
33433 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
33435 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
33436 for cfi reg/mem machmode
33437 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
33439 2023-06-06 Li Xu <xuli1@eswincomputing.com>
33441 * config/riscv/vector-iterators.md:
33442 Fix 'REQUIREMENT' for machine_mode 'MODE'.
33443 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
33444 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
33445 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
33447 2023-06-06 Pan Li <pan2.li@intel.com>
33449 * config/riscv/vector-iterators.md: Fix typo in mode attr.
33451 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
33452 Joel Hutton <joel.hutton@arm.com>
33454 * doc/generic.texi: Remove old tree codes.
33455 * expr.cc (expand_expr_real_2): Remove old tree code cases.
33456 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
33457 * optabs-tree.cc (optab_for_tree_code): Likewise.
33458 (supportable_half_widening_operation): Likewise.
33459 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
33460 * tree-inline.cc (estimate_operator_cost): Likewise.
33461 (op_symbol_code): Likewise.
33462 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
33463 (vect_analyze_data_ref_accesses): Likewise.
33464 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
33465 * cfgexpand.cc (expand_debug_expr): Likewise.
33466 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
33467 (supportable_widening_operation): Likewise.
33468 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
33470 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
33471 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
33472 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
33473 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
33474 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
33475 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
33476 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
33477 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
33479 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
33480 Joel Hutton <joel.hutton@arm.com>
33481 Tamar Christina <tamar.christina@arm.com>
33483 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
33485 (vec_widen_<su>add_lo_<mode>): ... to this.
33486 (vec_widen_<su>addl_hi_<mode>): Rename this ...
33487 (vec_widen_<su>add_hi_<mode>): ... to this.
33488 (vec_widen_<su>subl_lo_<mode>): Rename this ...
33489 (vec_widen_<su>sub_lo_<mode>): ... to this.
33490 (vec_widen_<su>subl_hi_<mode>): Rename this ...
33491 (vec_widen_<su>sub_hi_<mode>): ...to this.
33492 * doc/generic.texi: Document new IFN codes.
33493 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
33494 (commutative_binary_fn_p): Add widen_plus fn's.
33495 (widening_fn_p): New function.
33496 (narrowing_fn_p): New function.
33497 (direct_internal_fn_optab): Change visibility.
33498 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
33499 internal_fn that expands into multiple internal_fns for widening.
33500 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
33501 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
33502 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
33503 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
33504 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
33505 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
33506 (lookup_hilo_internal_fn): Likewise.
33507 (widening_fn_p): Likewise.
33508 (Narrowing_fn_p): Likewise.
33509 * optabs.cc (commutative_optab_p): Add widening plus optabs.
33510 * optabs.def (OPTAB_D): Define widen add, sub optabs.
33511 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
33512 patterns with a hi/lo or even/odd split.
33513 (vect_recog_sad_pattern): Refactor to use new IFN codes.
33514 (vect_recog_widen_plus_pattern): Likewise.
33515 (vect_recog_widen_minus_pattern): Likewise.
33516 (vect_recog_average_pattern): Likewise.
33517 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
33519 (supportable_widening_operation): Likewise.
33520 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
33522 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
33523 Joel Hutton <joel.hutton@arm.com>
33525 * tree-vect-patterns.cc: Add include for gimple-iterator.
33526 (vect_recog_widen_op_pattern): Refactor to use code_helper.
33527 (vect_gimple_build): New function.
33528 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
33530 (vectorizable_call): Likewise.
33531 (vect_gen_widened_results_half): Likewise.
33532 (vect_create_vectorized_demotion_stmts): Likewise.
33533 (vect_create_vectorized_promotion_stmts): Likewise.
33534 (vect_create_half_widening_stmts): Likewise.
33535 (vectorizable_conversion): Likewise.
33536 (supportable_widening_operation): Likewise.
33537 (supportable_narrowing_operation): Likewise.
33538 * tree-vectorizer.h (supportable_widening_operation): Change
33539 prototype to use code_helper.
33540 (supportable_narrowing_operation): Likewise.
33541 (vect_gimple_build): New function prototype.
33542 * tree.h (code_helper::safe_as_tree_code): New function.
33543 (code_helper::safe_as_fn_code): New function.
33545 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
33547 * wide-int.cc (wi::bitreverse_large): New function implementing
33548 bit reversal of an integer.
33549 * wide-int.h (wi::bitreverse): New (template) function prototype.
33550 (bitreverse_large): Prototype helper function/implementation.
33551 (wi::bitreverse): New template wrapper around bitreverse_large.
33553 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
33555 * rtl.h (print_rtl_single): Change return type from int to void.
33556 (print_rtl_single_with_indent): Ditto.
33557 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
33558 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
33559 (rtx_writer::print_rtx_operand_code_0): Ditto.
33560 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
33561 (rtx_writer::print_rtx_operand_code_i): Ditto.
33562 (rtx_writer::print_rtx_operand_code_u): Ditto.
33563 (rtx_writer::print_rtx_operand): Ditto.
33564 (rtx_writer::print_rtx): Ditto.
33565 (rtx_writer::finish_directive): Ditto.
33566 (print_rtl_single): Change return type from int to void
33567 and adjust function body accordingly.
33568 (rtx_writer::print_rtl_single_with_indent): Ditto.
33570 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
33572 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
33573 (reg_class_subset_p): Ditto.
33574 * reginfo.cc (reg_classes_intersect_p): Ditto.
33575 (reg_class_subset_p): Ditto.
33577 2023-06-05 Pan Li <pan2.li@intel.com>
33579 * config/riscv/riscv-vector-builtins-types.def
33580 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
33581 (vfloat32m1_t): Ditto.
33582 (vfloat32m2_t): Ditto.
33583 (vfloat32m4_t): Ditto.
33584 (vfloat32m8_t): Ditto.
33585 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
33586 (vint16mf2_t): Ditto.
33587 (vint16m1_t): Ditto.
33588 (vint16m2_t): Ditto.
33589 (vint16m4_t): Ditto.
33590 (vint16m8_t): Ditto.
33591 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
33592 (vuint16mf2_t): Ditto.
33593 (vuint16m1_t): Ditto.
33594 (vuint16m2_t): Ditto.
33595 (vuint16m4_t): Ditto.
33596 (vuint16m8_t): Ditto.
33597 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
33598 (vint32m1_t): Ditto.
33599 (vint32m2_t): Ditto.
33600 (vint32m4_t): Ditto.
33601 (vint32m8_t): Ditto.
33602 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
33603 (vuint32m1_t): Ditto.
33604 (vuint32m2_t): Ditto.
33605 (vuint32m4_t): Ditto.
33606 (vuint32m8_t): Ditto.
33607 * config/riscv/vector-iterators.md: Add FP=16 support for V,
33608 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
33610 2023-06-05 Andrew Pinski <apinski@marvell.com>
33612 PR bootstrap/110085
33613 * Makefile.in (clean): Remove the removing of
33614 MULTILIB_DIR/MULTILIB_OPTIONS directories.
33616 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
33618 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
33620 * config/mips/mips.cc (speculation_barrier_libfunc): New static
33622 (mips_init_libfuncs): Initialize it.
33623 (mips_emit_speculation_barrier): New function.
33624 * config/mips/mips.md (speculation_barrier): Call
33625 mips_emit_speculation_barrier.
33627 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33629 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
33630 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
33631 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
33632 (rvv_builder::get_merged_repeating_sequence): Ditto.
33633 (rvv_builder::get_merge_scalar_mask): Ditto.
33634 (emit_scalar_move_insn): Ditto.
33635 (emit_vlmax_integer_move_insn): Ditto.
33636 (emit_nonvlmax_integer_move_insn): Ditto.
33637 (emit_vlmax_gather_insn): Ditto.
33638 (emit_vlmax_masked_gather_mu_insn): Ditto.
33639 (get_repeating_sequence_dup_machine_mode): Ditto.
33641 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33643 * config/riscv/autovec.md: Split arguments.
33644 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
33645 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
33647 2023-06-04 Andrew Pinski <apinski@marvell.com>
33649 * expr.cc (do_store_flag): Improve for single bit testing
33650 not against zero but against that single bit.
33652 2023-06-04 Andrew Pinski <apinski@marvell.com>
33654 * expr.cc (do_store_flag): Extend the one bit checking case
33655 to handle the case where we don't have an and but rather still
33656 one bit is known to be non-zero.
33658 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
33660 * config/h8300/constraints.md (Zz): Make this a normal
33662 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
33663 * config/h8300/logical.md (H8/SX bit patterns): Remove.
33665 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33667 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
33668 New insn_and_split patterns.
33670 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33673 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
33674 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
33675 (@vlmul_extx4<mode>): Ditto.
33676 (@vlmul_extx8<mode>): Ditto.
33677 (@vlmul_extx16<mode>): Ditto.
33678 (@vlmul_extx32<mode>): Ditto.
33679 (@vlmul_extx64<mode>): Ditto.
33680 (*vlmul_extx2<mode>): Ditto.
33681 (*vlmul_extx4<mode>): Ditto.
33682 (*vlmul_extx8<mode>): Ditto.
33683 (*vlmul_extx16<mode>): Ditto.
33684 (*vlmul_extx32<mode>): Ditto.
33685 (*vlmul_extx64<mode>): Ditto.
33687 2023-06-04 Pan Li <pan2.li@intel.com>
33689 * config/riscv/riscv-vector-builtins-types.def
33690 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
33691 (vfloat32m1_t): Likewise.
33692 (vfloat32m2_t): Likewise.
33693 (vfloat32m4_t): Likewise.
33694 (vfloat32m8_t): Likewise.
33695 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
33696 * config/riscv/vector-iterators.md: Add single to half machine
33699 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33701 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
33702 (*n<optab><mode>): Ditto.
33703 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
33704 (*n<optab><mode>): Ditto.
33705 * config/riscv/vector.md: Ditto.
33707 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
33710 * config/i386/i386-features.cc (scalar_chain::convert_compare):
33711 Update or delete REG_EQUAL notes, converting CONST_INT and
33712 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
33714 2023-06-04 Jason Merrill <jason@redhat.com>
33717 * tree-eh.cc (lower_resx): Pass the exception pointer to the
33719 * except.h: Tweak comment.
33721 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
33723 * postreload.cc (move2add_use_add2_insn): Handle
33724 trivial single_sets. Rename variable PAT to SET.
33725 (move2add_use_add3_insn, reload_cse_move2add): Similar.
33727 2023-06-04 Pan Li <pan2.li@intel.com>
33729 * config/riscv/riscv-vector-builtins-types.def
33730 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
33731 (vfloat16mf2_t): Likewise.
33732 (vfloat16m1_t): Likewise.
33733 (vfloat16m2_t): Likewise.
33734 (vfloat16m4_t): Likewise.
33735 (vfloat16m8_t): Likewise.
33736 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
33737 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
33738 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
33739 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
33742 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
33744 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
33747 2023-06-03 Die Li <lidie@eswincomputing.com>
33749 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
33751 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33753 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
33755 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33757 * config/riscv/vector.md: Add vector-opt.md.
33758 * config/riscv/autovec-opt.md: New file.
33760 2023-06-03 liuhongt <hongtao.liu@intel.com>
33762 PR tree-optimization/110067
33763 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
33764 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
33766 2023-06-03 liuhongt <hongtao.liu@intel.com>
33769 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
33770 (truncv2si<mode>2): Ditto.
33772 2023-06-02 Andrew Pinski <apinski@marvell.com>
33774 PR rtl-optimization/102733
33775 * dse.cc (store_info): Add addrspace field.
33776 (record_store): Record the address space
33777 and check to make sure they are the same.
33779 2023-06-02 Andrew Pinski <apinski@marvell.com>
33781 PR rtl-optimization/110042
33782 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
33783 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
33785 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
33788 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
33789 Make sure that we do not have a cap on field alignment before altering
33790 the struct layout based on the type alignment of the first entry.
33792 2023-06-02 David Faust <david.faust@oracle.com>
33795 * btfout.cc (btf_absolute_func_id): New function.
33796 (btf_asm_func_type): Call it here. Change index parameter from
33797 size_t to ctf_id_t. Use PRIu64 formatter.
33799 2023-06-02 Alex Coplan <alex.coplan@arm.com>
33801 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
33802 (btf_asm_datasec_type): Likewise.
33804 2023-06-02 Carl Love <cel@us.ibm.com>
33806 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
33807 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
33809 2023-06-02 Jason Merrill <jason@redhat.com>
33813 * tree.h (DECL_MERGEABLE): New.
33814 * tree-core.h (struct tree_decl_common): Mention it.
33815 * gimplify.cc (gimplify_init_constructor): Check it.
33816 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
33817 * varasm.cc (categorize_decl_for_section): Likewise.
33819 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
33821 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
33822 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
33823 (stack_regs_mentioned_p): Change return type from int to bool
33824 and adjust function body accordingly.
33825 (stack_regs_mentioned): Ditto.
33826 (check_asm_stack_operands): Ditto. Change "malformed_asm"
33828 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
33829 (swap_rtx_condition_1): Change return type from int to bool
33830 and adjust function body accordingly. Change "r" variable to bool.
33831 (swap_rtx_condition): Change return type from int to bool
33832 and adjust function body accordingly.
33833 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
33834 (subst_stack_regs): Ditto.
33835 (convert_regs_entry): Change return type from int to bool and adjust
33836 function body accordingly. Change "inserted" variable to bool.
33837 (convert_regs_1): Recode handling of control_flow_insn_deleted.
33838 (convert_regs_2): Recode handling of cfg_altered.
33839 (convert_regs): Ditto. Change "inserted" variable to bool.
33841 2023-06-02 Jason Merrill <jason@redhat.com>
33844 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
33845 (initializer_constant_valid_p_1): Compare float precision.
33847 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
33849 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
33852 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33854 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
33855 (vect_set_loop_condition_partial_vectors): Ditto.
33857 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
33860 * config/avr/avr.md: Add an RTL peephole to optimize operations on
33861 non-LD_REGS after a move from LD_REGS.
33862 (piaop): New code iterator.
33864 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
33867 * doc/install.texi: Document (optional) Perl usage for parallel
33868 testing of libgomp.
33870 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
33873 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
33876 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33877 KuanLin Chen <best124612@gmail.com>
33879 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
33880 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
33882 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33884 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
33886 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33888 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
33890 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33892 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
33894 (DEF_RVV_FRM_ENUM): Ditto.
33896 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33898 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
33899 intrinsic API expander
33900 * config/riscv/vector.md
33901 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
33902 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
33903 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
33905 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33907 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
33908 * config/riscv/predicates.md (vector_perm_operand): New predicate.
33909 * config/riscv/riscv-protos.h (enum insn_type): New enum.
33910 (expand_vec_perm): New function.
33911 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
33912 (gen_const_vector_dup): Ditto.
33913 (emit_vlmax_gather_insn): Ditto.
33914 (emit_vlmax_masked_gather_mu_insn): Ditto.
33915 (expand_vec_perm): Ditto.
33917 2023-06-01 Jason Merrill <jason@redhat.com>
33919 * doc/invoke.texi (-Wpedantic): Improve clarity.
33921 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
33923 * rtl.h (exp_equiv_p): Change return type from int to bool.
33924 * cse.cc (mention_regs): Change return type from int to bool
33925 and adjust function body accordingly.
33926 (exp_equiv_p): Ditto.
33927 (insert_regs): Ditto. Change "modified" function argument to bool
33928 and update usage accordingly.
33929 (record_jump_cond): Remove always zero "reversed_nonequality"
33930 function argument and update usage accordingly.
33931 (fold_rtx): Change "changed" variable to bool.
33932 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
33933 (is_dead_reg): Change return type from int to bool.
33935 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33937 * config/xtensa/xtensa.md (adddi3, subdi3):
33938 New RTL generation patterns implemented according to the instruc-
33939 tion idioms described in the Xtensa ISA reference manual (p. 600).
33941 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
33942 Uros Bizjak <ubizjak@gmail.com>
33945 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
33946 CODE_for_sse4_1_ptestzv2di.
33947 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
33948 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
33949 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
33950 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
33951 when expanding UNSPEC_PTEST to compare against zero.
33952 * config/i386/i386-features.cc (scalar_chain::convert_compare):
33953 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
33954 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
33955 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
33956 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
33957 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
33958 check for suitable matching modes for the UNSPEC_PTEST pattern.
33959 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
33960 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
33961 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
33962 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
33963 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
33964 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
33965 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
33967 (*ptest<mode>_and): Specify CCZ to only perform this optimization
33968 when only the Z flag is required.
33970 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
33973 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
33975 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33977 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
33978 Add =r,m and =r,m alternatives.
33979 (load_pair<DREG:mode><DREG2:mode>): Likewise.
33980 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
33982 2023-06-01 Pan Li <pan2.li@intel.com>
33984 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
33986 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
33987 (main): Disable FP16 tuple.
33988 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
33989 (TARGET_VECTOR_ELEN_FP_16): Ditto.
33990 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
33992 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
33993 (vfloat16mf2_t): Ditto.
33994 (vfloat16m1_t): Ditto.
33995 (vfloat16m2_t): Ditto.
33996 (vfloat16m4_t): Ditto.
33997 (vfloat16m8_t): Ditto.
33998 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
34000 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
34001 machine mode based on TARGET_VECTOR_ELEN_FP_16.
34003 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34005 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
34006 (DEF_RVV_FRM_ENUM): New macro.
34007 (handle_pragma_vector): Add FRM enum
34008 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
34015 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
34016 Richard Sandiford <richard.sandiford@arm.com>
34018 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
34019 Update call to wi::bswap.
34020 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
34021 Update call to wi::bswap.
34022 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
34023 Update calls to wi::bswap.
34024 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
34025 (wi::bswap_large): New function, with revised API.
34026 * wide-int.h (wi::bswap): New (template) function prototype.
34027 (wide_int_storage::bswap): Remove method.
34028 (sext_large, zext_large): Consistent indentation/line wrapping.
34029 (bswap_large): Prototype helper function containing implementation.
34030 (wi::bswap): New template wrapper around bswap_large.
34032 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34035 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
34036 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
34037 (usdot_prod<vsi2qi>): Rename to...
34038 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
34039 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
34040 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
34041 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
34042 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
34043 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
34044 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
34047 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34050 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
34051 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
34052 (aarch64_sq<r>dmulh_n<mode>): Rename to...
34053 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
34054 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
34055 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
34056 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
34057 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
34058 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
34059 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
34060 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
34061 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
34062 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
34063 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
34065 2023-05-31 David Faust <david.faust@oracle.com>
34067 * btfout.cc (btf_kind_names): New.
34068 (btf_kind_name): New.
34069 (btf_absolute_var_id): New utility function.
34070 (btf_relative_var_id): Likewise.
34071 (btf_relative_func_id): Likewise.
34072 (btf_absolute_datasec_id): Likewise.
34073 (btf_asm_type_ref): New.
34074 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
34075 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
34076 (btf_asm_varent): Likewise.
34077 (btf_asm_func_arg): Likewise.
34078 (btf_asm_datasec_entry): Likewise.
34079 (btf_asm_datasec_type): Likewise.
34080 (btf_asm_func_type): Likewise. Add index parameter.
34081 (btf_asm_enum_const): Likewise.
34082 (btf_asm_sou_member): Likewise.
34083 (output_btf_vars): Update btf_asm_* call accordingly.
34084 (output_asm_btf_sou_fields): Likewise.
34085 (output_asm_btf_enum_list): Likewise.
34086 (output_asm_btf_func_args_list): Likewise.
34087 (output_asm_btf_vlen_bytes): Likewise.
34088 (output_btf_func_types): Add ctf_container_ref parameter.
34089 Pass it to btf_asm_func_type.
34090 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
34091 (btf_output): Update output_btf_func_types call similarly.
34093 2023-05-31 David Faust <david.faust@oracle.com>
34095 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
34096 and BTF_KIND_FWD which do not use the size/type field at all.
34098 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
34100 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
34101 (active_insn_p): Ditto.
34102 (in_sequence_p): Ditto.
34103 (unshare_all_rtl): Change return type from int to void.
34104 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
34105 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
34106 and adjust function body accordingly.
34107 (mem_expr_equal_p): Ditto.
34108 (unshare_all_rtl): Change return type from int to void
34109 and adjust function body accordingly.
34110 (verify_rtx_sharing): Remove unneeded return.
34111 (active_insn_p): Change return type from int to bool
34112 and adjust function body accordingly.
34113 (in_sequence_p): Ditto.
34115 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
34117 * rtl.h (true_dependence): Change return type from int to bool.
34118 (canon_true_dependence): Ditto.
34119 (read_dependence): Ditto.
34120 (anti_dependence): Ditto.
34121 (canon_anti_dependence): Ditto.
34122 (output_dependence): Ditto.
34123 (canon_output_dependence): Ditto.
34124 (may_alias_p): Ditto.
34125 * alias.h (alias_sets_conflict_p): Ditto.
34126 (alias_sets_must_conflict_p): Ditto.
34127 (objects_must_conflict_p): Ditto.
34128 (nonoverlapping_memrefs_p): Ditto.
34129 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
34130 (record_set): Ditto.
34131 (base_alias_check): Ditto.
34132 (find_base_value): Ditto.
34133 (mems_in_disjoint_alias_sets_p): Ditto.
34134 (get_alias_set_entry): Ditto.
34135 (decl_for_component_ref): Ditto.
34136 (write_dependence_p): Ditto.
34137 (memory_modified_1): Ditto.
34138 (mems_in_disjoint_alias_set_p): Change return type from int to bool
34139 and adjust function body accordingly.
34140 (alias_sets_conflict_p): Ditto.
34141 (alias_sets_must_conflict_p): Ditto.
34142 (objects_must_conflict_p): Ditto.
34143 (rtx_equal_for_memref_p): Ditto.
34144 (base_alias_check): Ditto.
34145 (read_dependence): Ditto.
34146 (nonoverlapping_memrefs_p): Ditto.
34147 (true_dependence_1): Ditto.
34148 (true_dependence): Ditto.
34149 (canon_true_dependence): Ditto.
34150 (write_dependence_p): Ditto.
34151 (anti_dependence): Ditto.
34152 (canon_anti_dependence): Ditto.
34153 (output_dependence): Ditto.
34154 (canon_output_dependence): Ditto.
34155 (may_alias_p): Ditto.
34156 (init_alias_analysis): Change "changed" variable to bool.
34158 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34160 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
34161 expand into define_insn_and_split.
34163 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34165 * config/riscv/vector.md: Remove FRM.
34167 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34169 * config/riscv/vector.md: Remove FRM.
34171 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34173 * config/riscv/vector.md: Remove FRM.
34175 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
34178 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
34181 2023-05-31 Richard Biener <rguenther@suse.de>
34184 PR tree-optimization/109143
34185 * tree-ssa-structalias.cc (struct topo_info): Remove.
34186 (init_topo_info): Likewise.
34187 (free_topo_info): Likewise.
34188 (compute_topo_order): Simplify API, put the component
34189 with ESCAPED last so it's processed first.
34190 (topo_visit): Adjust.
34191 (solve_graph): Likewise.
34193 2023-05-31 Richard Biener <rguenther@suse.de>
34195 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
34197 (add_graph_edge): Count redundant edges we avoid to create.
34198 (dump_sa_stats): Dump them.
34199 (ipa_pta_execute): Do not dump generating constraints when
34200 we are not dumping them.
34202 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34204 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
34205 output template to avoid explicit switch on which_alternative.
34206 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
34207 (and<mode>3): Likewise.
34208 (ior<mode>3): Likewise.
34209 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
34211 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34213 * config/xtensa/predicates.md (xtensa_bit_join_operator):
34215 * config/xtensa/xtensa.md (ior_op): Remove.
34216 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
34217 insn_and_split pattern of the same name to express and capture
34218 the bit-combining operation with both sides swapped.
34219 In addition, replace use of code iterator with new operator
34221 (*shlrd_const, *shlrd_per_byte):
34222 Likewise regarding the code iterator.
34224 2023-05-31 Cui, Lili <lili.cui@intel.com>
34226 PR tree-optimization/110038
34227 * params.opt: Add a limit on tree-reassoc-width.
34228 * tree-ssa-reassoc.cc
34229 (rewrite_expr_tree_parallel): Add width limit.
34231 2023-05-31 Pan Li <pan2.li@intel.com>
34233 * common/config/riscv/riscv-common.cc:
34234 (riscv_implied_info): Add zvfh item.
34235 (riscv_ext_version_table): Ditto.
34236 (riscv_ext_flag_table): Ditto.
34237 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
34238 (TARGET_ZVFH): Ditto.
34240 2023-05-30 liuhongt <hongtao.liu@intel.com>
34242 PR tree-optimization/108804
34243 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
34244 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
34245 Add new parameter narrow_src_p.
34246 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
34247 vectorization by truncating to lower precision.
34248 * tree-vectorizer.h (vect_get_range_info): New declare.
34250 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
34252 * lra-int.h (lra_update_sp_offset): Add the prototype.
34253 * lra.cc (setup_sp_offset): Change the return type. Use
34254 lra_update_sp_offset.
34255 * lra-eliminations.cc (lra_update_sp_offset): New function.
34256 (lra_process_new_insns): Push the current insn to reprocess if the
34257 input reload changes sp offset.
34259 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
34262 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
34263 Fix misleading identation.
34265 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
34267 * rtl.h (comparison_dominates_p): Change return type from int to bool.
34268 (condjump_p): Ditto.
34269 (any_condjump_p): Ditto.
34270 (any_uncondjump_p): Ditto.
34271 (simplejump_p): Ditto.
34272 (returnjump_p): Ditto.
34273 (eh_returnjump_p): Ditto.
34274 (onlyjump_p): Ditto.
34275 (invert_jump_1): Ditto.
34276 (invert_jump): Ditto.
34277 (rtx_renumbered_equal_p): Ditto.
34278 (redirect_jump_1): Ditto.
34279 (redirect_jump): Ditto.
34280 (condjump_in_parallel_p): Ditto.
34281 * jump.cc (invert_exp_1): Adjust forward declaration.
34282 (comparison_dominates_p): Change return type from int to bool
34283 and adjust function body accordingly.
34284 (simplejump_p): Ditto.
34285 (condjump_p): Ditto.
34286 (condjump_in_parallel_p): Ditto.
34287 (any_uncondjump_p): Ditto.
34288 (any_condjump_p): Ditto.
34289 (returnjump_p): Ditto.
34290 (eh_returnjump_p): Ditto.
34291 (onlyjump_p): Ditto.
34292 (redirect_jump_1): Ditto.
34293 (redirect_jump): Ditto.
34294 (invert_exp_1): Ditto.
34295 (invert_jump_1): Ditto.
34296 (invert_jump): Ditto.
34297 (rtx_renumbered_equal_p): Ditto.
34299 2023-05-30 Andrew Pinski <apinski@marvell.com>
34301 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
34302 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
34303 Add ne as a possible cmp.
34304 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
34306 2023-05-30 Andrew Pinski <apinski@marvell.com>
34308 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
34311 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
34313 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
34314 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
34315 (and (extend X) C) as (zero_extend (and X C)), to also optimize
34316 modes wider than HOST_WIDE_INT.
34318 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
34321 * simplify-rtx.cc (simplify_const_relational_operation): Return
34322 early if we have a MODE_CC comparison that isn't a COMPARE against
34325 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
34327 * config/riscv/riscv.cc (riscv_const_insns): Allow
34328 const_vec_duplicates.
34330 2023-05-30 liuhongt <hongtao.liu@intel.com>
34332 PR middle-end/108938
34333 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
34334 function, cut from original find_bswap_or_nop function.
34335 (find_bswap_or_nop): Add a new parameter, detect bswap +
34336 rotate and save rotate result in the new parameter.
34337 (bswap_replace): Add a new parameter to indicate rotate and
34338 generate rotate stmt if needed.
34339 (maybe_optimize_vector_constructor): Adjust for new rotate
34340 parameter in the upper 2 functions.
34341 (pass_optimize_bswap::execute): Ditto.
34342 (imm_store_chain_info::output_merged_store): Ditto.
34344 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34346 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
34347 (aarch64_<su>adalp<mode>): New define_expand.
34348 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
34349 (aarch64_<su>addlp<mode>): Convert to define_expand.
34350 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
34351 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
34353 (USADDLP): Likewise.
34354 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
34356 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34358 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
34359 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
34360 srhadd, urhadd builtin codes for standard optab ones.
34361 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
34362 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
34364 (<u>avg<mode>3_ceil): Rename to...
34365 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
34367 (aarch64_<su>hsub<mode>): New define_expand.
34368 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
34369 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
34370 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
34372 2023-05-30 Andreas Schwab <schwab@suse.de>
34375 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
34376 match libsanitizer.
34378 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34380 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
34381 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
34383 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
34384 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
34385 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
34386 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
34387 (aarch64_<sra_op>sra_n<mode>): New define_expand.
34388 (aarch64_<sra_op>rsra_n<mode>): Likewise.
34389 (aarch64_<sur>sra_n<mode>): Rename to...
34390 (aarch64_<sur>sra_ndi): ... This.
34391 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
34392 any_target_p argument.
34393 (aarch64_extract_vec_duplicate_wide_int): Define.
34394 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
34395 (aarch64_const_vec_rnd_cst_p): Likewise.
34396 (aarch64_vector_mode_supported_any_target_p): Likewise.
34397 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
34398 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
34399 (VSRA): Adjust for the above.
34401 (V2XWIDE): New mode_attr.
34402 (vec_or_offset): Likewise.
34403 (SHIFTEXTEND): Likewise.
34404 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
34406 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
34407 clarify that it applies to current target options.
34408 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
34409 * doc/tm.texi.in: Regenerate.
34410 * stor-layout.cc (mode_for_vector): Check
34411 vector_mode_supported_any_target_p when iterating through vector modes.
34412 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
34413 clarify that it applies to current target options.
34414 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
34416 2023-05-30 Lili Cui <lili.cui@intel.com>
34418 PR tree-optimization/98350
34419 * tree-ssa-reassoc.cc
34420 (rewrite_expr_tree_parallel): Rewrite this function.
34421 (rank_ops_for_fma): New.
34422 (reassociate_bb): Handle new function.
34424 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
34426 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
34427 (rtx_unstable_p): Ditto.
34428 (reg_mentioned_p): Ditto.
34429 (reg_referenced_p): Ditto.
34430 (reg_used_between_p): Ditto.
34431 (reg_set_between_p): Ditto.
34432 (modified_between_p): Ditto.
34433 (no_labels_between_p): Ditto.
34434 (modified_in_p): Ditto.
34435 (reg_set_p): Ditto.
34436 (multiple_sets): Ditto.
34437 (set_noop_p): Ditto.
34438 (noop_move_p): Ditto.
34439 (reg_overlap_mentioned_p): Ditto.
34440 (dead_or_set_p): Ditto.
34441 (dead_or_set_regno_p): Ditto.
34442 (find_reg_fusage): Ditto.
34443 (find_regno_fusage): Ditto.
34444 (side_effects_p): Ditto.
34445 (volatile_refs_p): Ditto.
34446 (volatile_insn_p): Ditto.
34447 (may_trap_p_1): Ditto.
34448 (may_trap_p): Ditto.
34449 (may_trap_or_fault_p): Ditto.
34450 (computed_jump_p): Ditto.
34451 (auto_inc_p): Ditto.
34452 (loc_mentioned_in_p): Ditto.
34453 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
34454 (rtx_unstable_p): Change return type from int to bool
34455 and adjust function body accordingly.
34456 (rtx_addr_can_trap_p): Ditto.
34457 (reg_mentioned_p): Ditto.
34458 (no_labels_between_p): Ditto.
34459 (reg_used_between_p): Ditto.
34460 (reg_referenced_p): Ditto.
34461 (reg_set_between_p): Ditto.
34462 (reg_set_p): Ditto.
34463 (modified_between_p): Ditto.
34464 (modified_in_p): Ditto.
34465 (multiple_sets): Ditto.
34466 (set_noop_p): Ditto.
34467 (noop_move_p): Ditto.
34468 (reg_overlap_mentioned_p): Ditto.
34469 (dead_or_set_p): Ditto.
34470 (dead_or_set_regno_p): Ditto.
34471 (find_reg_fusage): Ditto.
34472 (find_regno_fusage): Ditto.
34473 (remove_node_from_insn_list): Ditto.
34474 (volatile_insn_p): Ditto.
34475 (volatile_refs_p): Ditto.
34476 (side_effects_p): Ditto.
34477 (may_trap_p_1): Ditto.
34478 (may_trap_p): Ditto.
34479 (may_trap_or_fault_p): Ditto.
34480 (computed_jump_p): Ditto.
34481 (auto_inc_p): Ditto.
34482 (loc_mentioned_in_p): Ditto.
34483 * combine.cc (can_combine_p): Update indirect function.
34485 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34487 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
34488 * config/riscv/iterators.md: New attribute.
34489 * config/riscv/vector-iterators.md: New attribute.
34491 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
34493 * config/riscv/riscv.md: Fix signed and unsigned comparison
34496 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34498 * config/riscv/autovec.md (fnma<mode>4): New pattern.
34499 (*fnma<mode>): Ditto.
34501 2023-05-29 Die Li <lidie@eswincomputing.com>
34503 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
34505 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
34506 process for TARGET_XTHEADCONDMOV
34508 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
34511 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
34512 TARGET_AVX512BW to generate truncv16hiv16qi2.
34514 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
34516 * config/riscv/riscv.md (and<mode>3): New expander.
34517 (*and<mode>3) New pattern.
34518 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
34521 2023-05-29 Pan Li <pan2.li@intel.com>
34523 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
34524 comments and rename local variables.
34525 (emit_nonvlmax_insn): Diito.
34526 (emit_vlmax_merge_insn): Ditto.
34527 (emit_vlmax_cmp_insn): Ditto.
34528 (emit_vlmax_cmp_mu_insn): Ditto.
34529 (emit_scalar_move_insn): Ditto.
34531 2023-05-29 Pan Li <pan2.li@intel.com>
34533 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
34535 (emit_nonvlmax_insn): Ditto.
34536 (emit_vlmax_merge_insn): Ditto.
34537 (emit_vlmax_cmp_insn): Ditto.
34538 (emit_vlmax_cmp_mu_insn): Ditto.
34539 (expand_vec_series): Ditto.
34541 2023-05-29 Pan Li <pan2.li@intel.com>
34543 * config/riscv/riscv-protos.h (enum insn_type): New type.
34544 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
34545 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
34547 (rvv_builder::get_merged_repeating_sequence): Ditto.
34548 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
34549 to evaluate the optimization cost.
34550 (rvv_builder::get_merge_scalar_mask): New function to get the merge
34552 (emit_scalar_move_insn): New function to emit vmv.s.x.
34553 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
34554 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
34556 (get_repeating_sequence_dup_machine_mode): New function to get the dup
34558 (expand_vector_init_merge_repeating_sequence): New function to perform
34560 (expand_vec_init): Add this vector init optimization.
34561 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
34563 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
34565 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
34566 put onto the increment when it is inserted after the position.
34568 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
34570 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
34573 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34575 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
34577 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34579 * config/riscv/autovec.md (fma<mode>4): New pattern.
34580 (*fma<mode>): Ditto.
34581 * config/riscv/riscv-protos.h (enum insn_type): New enum.
34582 (emit_vlmax_ternary_insn): New function.
34583 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
34585 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34587 * config/riscv/vector.md: Fix vimuladd instruction bug.
34589 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34591 * config/riscv/riscv.cc (global_state_unknown_p): New function.
34592 (riscv_mode_after): Fix incorrect VXM.
34594 2023-05-29 Pan Li <pan2.li@intel.com>
34596 * common/config/riscv/riscv-common.cc:
34597 (riscv_implied_info): Add zvfhmin item.
34598 (riscv_ext_version_table): Ditto.
34599 (riscv_ext_flag_table): Ditto.
34600 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
34601 (TARGET_ZFHMIN): Align indent.
34602 (TARGET_ZFH): Ditto.
34603 (TARGET_ZVFHMIN): New macro.
34605 2023-05-27 liuhongt <hongtao.liu@intel.com>
34608 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
34609 to VI_AVX2 to cover more modes.
34611 2023-05-27 liuhongt <hongtao.liu@intel.com>
34613 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
34614 Remove ATOM and ICELAKE(and later) core processors.
34616 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
34618 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
34620 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
34622 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
34625 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
34626 Juzhe Zhong <juzhe.zhong@rivai.ai>
34628 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
34630 (<optab><v_quad_trunc><mode>2): Dito.
34631 (<optab><v_oct_trunc><mode>2): Dito.
34632 (trunc<mode><v_double_trunc>2): Dito.
34633 (trunc<mode><v_quad_trunc>2): Dito.
34634 (trunc<mode><v_oct_trunc>2): Dito.
34635 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
34636 (autovectorize_vector_modes): Define.
34637 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
34639 (autovectorize_vector_modes): Implement hook.
34640 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
34641 Implement target hook.
34642 (riscv_vectorize_related_mode): Implement target hook.
34643 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
34644 (TARGET_VECTORIZE_RELATED_MODE): Define.
34645 * config/riscv/vector-iterators.md: Add lowercase versions of
34646 mode_attr iterators.
34648 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
34649 Tobias Burnus <tobias@codesourcery.com>
34651 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
34652 (ASM_SPEC): Use XNACKOPT.
34653 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
34654 (enum hsaco_attr_type): ... this, and generalize the names.
34655 (TARGET_XNACK): New macro.
34656 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
34658 (output_file_start): Update xnack handling.
34659 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
34660 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
34661 (sram_ecc_type): Rename to ...
34662 (hsaco_attr_type: ... this.)
34663 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
34664 (TEST_XNACK): Delete.
34665 (TEST_XNACK_ANY): New macro.
34666 (TEST_XNACK_ON): New macro.
34667 (main): Support the new -mxnack=on/off/any syntax.
34668 * doc/invoke.texi (-mxnack): Update for new syntax.
34670 2023-05-26 Andrew Pinski <apinski@marvell.com>
34672 * genmatch.cc (emit_debug_printf): New function.
34673 (dt_simplify::gen_1): Emit printf into the code
34674 before the `return true` or returning the folded result
34675 instead of emitting it always.
34677 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34679 * config/xtensa/xtensa-protos.h
34680 (xtensa_expand_block_set_unrolled_loop,
34681 xtensa_expand_block_set_small_loop): Remove.
34682 (xtensa_expand_block_set): New prototype.
34683 * config/xtensa/xtensa.cc
34684 (xtensa_expand_block_set_libcall): New subfunction.
34685 (xtensa_expand_block_set_unrolled_loop,
34686 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
34687 (xtensa_expand_block_set): New function that calls the above
34689 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
34690 xtensa_expand_block_set().
34692 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34694 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
34696 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
34698 * config/xtensa/constraints.md (O):
34699 Change to use the above function.
34700 * config/xtensa/xtensa.md (*subsi3_from_const):
34701 New insn_and_split pattern.
34703 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34705 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
34706 Retract excessive line folding, and correct the value of
34707 the "length" insn attribute related to TARGET_DENSITY.
34708 (*extzvsi-1bit_addsubx): Ditto.
34710 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
34712 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
34713 Do not disable call to ix86_expand_vecop_qihi2.
34715 2023-05-26 liuhongt <hongtao.liu@intel.com>
34719 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
34720 calculation when !hard_regno_mode_ok for GENERAL_REGS and
34721 mode, otherwise still use GENERAL_REGS.
34723 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34725 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
34726 explict VL and drop VL in ops.
34728 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
34730 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
34731 in different BB blocks.
34733 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
34735 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
34736 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
34737 instructions when available. Emulate truncation via
34738 ix86_expand_vec_perm_const_1 when native truncate insn
34740 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
34741 when available. Trivially rename some variables.
34742 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
34743 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
34744 calculation of V*QImode emulations to account for generation of
34745 2x-wider mode instructions.
34746 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
34747 emulations to account for generation of 2x-wider mode instructions.
34749 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
34752 * config/avr/avr.cc (avr_can_inline_p): New static function.
34753 (TARGET_CAN_INLINE_P): Define to that function.
34755 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
34758 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
34759 Handle any bit position and use mode QISI.
34760 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
34761 of 2 insns for bit-transfer of respective style.
34763 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
34765 * config/arm/iterators.md (MVE_6): Remove.
34766 * config/arm/mve.md: Replace MVE_6 with MVE_5.
34768 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34769 Richard Sandiford <richard.sandiford@arm.com>
34771 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
34773 (vect_set_loop_controls_directly): Add decrement IV support.
34774 (vect_set_loop_condition_partial_vectors): Ditto.
34775 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
34777 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
34780 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34783 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
34784 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
34785 Fix canonicalization of PLUS operands.
34786 (aarch64_fcmla<rot><mode>): Rename to...
34787 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
34788 Fix canonicalization of PLUS operands.
34789 (aarch64_fcmla_lane<rot><mode>): Rename to...
34790 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
34791 Fix canonicalization of PLUS operands.
34792 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
34793 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
34794 Fix canonicalization of PLUS operands.
34795 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
34797 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
34799 * config/arm/arm.md (rbitsi2): Rename to...
34800 (arm_rbit): ... This.
34801 (ctzsi2): Adjust for the above.
34802 (arm_rev16si2): Convert to define_expand.
34803 (arm_rev16si2_alt1): New pattern.
34804 (arm_rev16si2_alt): Rename to...
34805 (*arm_rev16si2_alt2): ... This.
34806 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
34807 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
34808 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
34809 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
34811 2023-05-25 Alex Coplan <alex.coplan@arm.com>
34814 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
34816 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
34817 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
34818 DFmode as an rvalue.
34820 2023-05-25 Richard Biener <rguenther@suse.de>
34823 * tree-vect-stmts.cc (vectorizable_condition): For
34824 embedded comparisons also handle the case when the target
34825 only provides vec_cmp and vcond_mask.
34827 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
34829 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
34832 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
34834 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
34835 (seq_cost_ignoring_scalar_moves): Likewise.
34836 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
34838 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34840 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
34841 (vcage_f32): Likewise.
34842 (vcages_f32): Likewise.
34843 (vcageq_f32): Likewise.
34844 (vcaged_f64): Likewise.
34845 (vcageq_f64): Likewise.
34846 (vcagts_f32): Likewise.
34847 (vcagt_f32): Likewise.
34848 (vcagt_f64): Likewise.
34849 (vcagtq_f32): Likewise.
34850 (vcagtd_f64): Likewise.
34851 (vcagtq_f64): Likewise.
34852 (vcale_f32): Likewise.
34853 (vcale_f64): Likewise.
34854 (vcaled_f64): Likewise.
34855 (vcales_f32): Likewise.
34856 (vcaleq_f32): Likewise.
34857 (vcaleq_f64): Likewise.
34858 (vcalt_f32): Likewise.
34859 (vcalt_f64): Likewise.
34860 (vcaltd_f64): Likewise.
34861 (vcaltq_f32): Likewise.
34862 (vcaltq_f64): Likewise.
34863 (vcalts_f32): Likewise.
34865 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
34869 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
34870 int to const int or const int to const unsigned int.
34871 (_mm512_mask_srli_epi16): Ditto.
34872 (_mm512_slli_epi16): Ditto.
34873 (_mm512_mask_slli_epi16): Ditto.
34874 (_mm512_maskz_slli_epi16): Ditto.
34875 (_mm512_srai_epi16): Ditto.
34876 (_mm512_mask_srai_epi16): Ditto.
34877 (_mm512_maskz_srai_epi16): Ditto.
34878 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
34879 (_mm512_mask_slli_epi64): Ditto.
34880 (_mm512_maskz_slli_epi64): Ditto.
34881 (_mm512_srli_epi64): Ditto.
34882 (_mm512_mask_srli_epi64): Ditto.
34883 (_mm512_maskz_srli_epi64): Ditto.
34884 (_mm512_srai_epi64): Ditto.
34885 (_mm512_mask_srai_epi64): Ditto.
34886 (_mm512_maskz_srai_epi64): Ditto.
34887 (_mm512_slli_epi32): Ditto.
34888 (_mm512_mask_slli_epi32): Ditto.
34889 (_mm512_maskz_slli_epi32): Ditto.
34890 (_mm512_srli_epi32): Ditto.
34891 (_mm512_mask_srli_epi32): Ditto.
34892 (_mm512_maskz_srli_epi32): Ditto.
34893 (_mm512_srai_epi32): Ditto.
34894 (_mm512_mask_srai_epi32): Ditto.
34895 (_mm512_maskz_srai_epi32): Ditto.
34896 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
34897 (_mm256_maskz_srai_epi16): Ditto.
34898 (_mm_mask_srai_epi16): Ditto.
34899 (_mm_maskz_srai_epi16): Ditto.
34900 (_mm256_mask_slli_epi16): Ditto.
34901 (_mm256_maskz_slli_epi16): Ditto.
34902 (_mm_mask_slli_epi16): Ditto.
34903 (_mm_maskz_slli_epi16): Ditto.
34904 (_mm_maskz_srli_epi16): Ditto.
34905 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
34906 (_mm256_maskz_srli_epi32): Ditto.
34907 (_mm_mask_srli_epi32): Ditto.
34908 (_mm_maskz_srli_epi32): Ditto.
34909 (_mm256_mask_srli_epi64): Ditto.
34910 (_mm256_maskz_srli_epi64): Ditto.
34911 (_mm_mask_srli_epi64): Ditto.
34912 (_mm_maskz_srli_epi64): Ditto.
34913 (_mm256_mask_srai_epi32): Ditto.
34914 (_mm256_maskz_srai_epi32): Ditto.
34915 (_mm_mask_srai_epi32): Ditto.
34916 (_mm_maskz_srai_epi32): Ditto.
34917 (_mm256_srai_epi64): Ditto.
34918 (_mm256_mask_srai_epi64): Ditto.
34919 (_mm256_maskz_srai_epi64): Ditto.
34920 (_mm_srai_epi64): Ditto.
34921 (_mm_mask_srai_epi64): Ditto.
34922 (_mm_maskz_srai_epi64): Ditto.
34923 (_mm_mask_slli_epi32): Ditto.
34924 (_mm_maskz_slli_epi32): Ditto.
34925 (_mm_mask_slli_epi64): Ditto.
34926 (_mm_maskz_slli_epi64): Ditto.
34927 (_mm256_mask_slli_epi32): Ditto.
34928 (_mm256_maskz_slli_epi32): Ditto.
34929 (_mm256_mask_slli_epi64): Ditto.
34930 (_mm256_maskz_slli_epi64): Ditto.
34932 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34934 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
34937 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
34939 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
34940 * data-streamer-out.cc (streamer_write_vrange): Same.
34941 * value-range.h (class vrange): Make streamer_write_vrange a friend.
34943 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
34945 * value-query.cc (range_query::get_tree_range): Set NAN directly
34947 * value-range.cc (frange::set): Assert that bounds are not NAN.
34949 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
34951 * value-range.cc (add_vrange): Handle known NANs.
34953 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
34955 * value-range.h (frange::set_nan): New.
34957 2023-05-25 Alexandre Oliva <oliva@adacore.com>
34960 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
34961 requires stricter alignment than MEM's.
34963 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
34965 PR tree-optimization/107822
34966 PR tree-optimization/107986
34967 * Makefile.in (OBJS): Add gimple-range-phi.o.
34968 * gimple-range-cache.h (ranger_cache::m_estimate): New
34969 phi_analyzer pointer member.
34970 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
34971 phi_analyzer if no loop info is available.
34972 * gimple-range-phi.cc: New file.
34973 * gimple-range-phi.h: New file.
34974 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
34976 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
34978 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
34980 (fold_range): Add range_query parameter.
34981 (fur_relation::fur_relation): New.
34982 (fur_relation::trio): New.
34983 (fur_relation::register_relation): New.
34984 (fold_relations): New.
34985 * gimple-range-fold.h (fold_range): Adjust prototypes.
34986 (fold_relations): New.
34988 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
34990 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
34991 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
34992 (ranger_cache::const_query): New.
34993 * gimple-range.cc (gimple_ranger::const_query): New.
34994 * gimple-range.h (gimple_ranger::const_query): New prototype.
34996 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
34998 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
34999 (ssa_cache::dump_range_query): Delete.
35000 (ssa_lazy_cache::dump_range_query): Delete.
35001 (ssa_lazy_cache::get_range): Move from header file.
35002 (ssa_lazy_cache::clear_range): ditto.
35003 (ssa_lazy_cache::clear): Ditto.
35004 * gimple-range-cache.h (class ssa_cache): Virtualize.
35005 (class ssa_lazy_cache): Inherit and virtualize.
35007 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
35009 * value-range.h (vrange::kind): Remove.
35011 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
35013 PR middle-end/109840
35014 * match.pd <popcount optimizations>: Preserve zero-extension when
35015 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
35016 popcount((T)x), so the popcount's argument keeps the same type.
35017 <parity optimizations>: Likewise preserve extensions when
35018 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
35019 parity((T)x), so that the parity's argument type is the same.
35021 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
35023 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
35024 (ipcp_store_vr_results): Same.
35025 * ipa-prop.cc (ipa_vr::ipa_vr): New.
35026 (ipa_vr::get_vrange): New.
35027 (ipa_vr::set_unknown): New.
35028 (ipa_vr::streamer_read): New.
35029 (ipa_vr::streamer_write): New.
35030 (write_ipcp_transformation_info): Use new ipa_vr API.
35031 (read_ipcp_transformation_info): Same.
35032 (ipa_vr::nonzero_p): Delete.
35033 (ipcp_update_vr): Use new ipa_vr API.
35034 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
35035 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
35037 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
35039 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
35040 silence overflow warnings later on.
35042 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
35044 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
35045 Remove handling of V8QImode.
35046 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
35047 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
35048 (v<insn>v4qi3): Ditto.
35049 * config/i386/sse.md (v<insn>v8qi3): Remove.
35051 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35054 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
35055 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
35056 (aarch64_simd_ashr<mode>): Rename to...
35057 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
35058 (aarch64_simd_imm_shl<mode>): Rename to...
35059 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
35060 (aarch64_simd_reg_sshl<mode>): Rename to...
35061 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
35062 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
35063 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
35064 (aarch64_simd_reg_shl<mode>_signed): Rename to...
35065 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
35066 (vec_shr_<mode>): Rename to...
35067 (vec_shr_<mode><vczle><vczbe>): ... This.
35068 (aarch64_<sur>shl<mode>): Rename to...
35069 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
35070 (aarch64_<sur>q<r>shl<mode>): Rename to...
35071 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
35073 2023-05-24 Richard Biener <rguenther@suse.de>
35076 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
35077 Perform final vector composition using
35078 ix86_expand_vector_init_general instead of setting
35079 the highpart and lowpart which causes spilling.
35081 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
35083 PR tree-optimization/109695
35084 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
35086 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
35087 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
35088 flag to set_global_range.
35089 (gimple_ranger::prefill_stmt_dependencies): Ditto.
35091 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
35093 PR tree-optimization/109695
35094 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
35096 (temporal_cache::current_p): Check always_current method.
35097 (temporal_cache::set_always_current): Add param and set value
35099 (temporal_cache::always_current_p): New.
35100 (ranger_cache::get_global_range): Adjust.
35101 (ranger_cache::set_global_range): set always current first.
35103 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
35105 PR tree-optimization/109695
35106 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
35107 fold_range with global query to choose an initial value.
35109 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35111 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
35114 2023-05-24 Richard Biener <rguenther@suse.de>
35116 PR tree-optimization/109849
35117 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
35118 expressions but take the first sets.
35120 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
35123 * doc/gm2.texi (High procedure function): New node.
35124 (Using): New menu entry for High procedure function.
35126 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
35128 PR rtl-optimization/109940
35129 * early-remat.cc (postorder_index): Rename to...
35130 (rpo_index): ...this.
35131 (compare_candidates): Sort by decreasing rpo_index rather than
35132 increasing postorder_index.
35133 (early_remat::sort_candidates): Calculate the forward RPO from
35135 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
35136 rather than DF_BACKWARD in reverse.
35138 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35141 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
35142 qualifier_none for the return operand.
35144 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35146 * config/riscv/autovec.md (<optab><mode>3): New pattern.
35147 (one_cmpl<mode>2): Ditto.
35148 (*<optab>not<mode>): Ditto.
35149 (*n<optab><mode>): Ditto.
35150 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
35153 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
35155 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
35156 calculation on n_perms by considering nvectors_per_build.
35158 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35159 Richard Sandiford <richard.sandiford@arm.com>
35161 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
35162 (vec_cmp<mode><vm>): New pattern.
35163 (vec_cmpu<mode><vm>): New pattern.
35164 (vcond<V:mode><VI:mode>): New pattern.
35165 (vcondu<V:mode><VI:mode>): New pattern.
35166 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
35167 (emit_vlmax_merge_insn): New function.
35168 (emit_vlmax_cmp_insn): Ditto.
35169 (emit_vlmax_cmp_mu_insn): Ditto.
35170 (expand_vec_cmp): Ditto.
35171 (expand_vec_cmp_float): Ditto.
35172 (expand_vcond): Ditto.
35173 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
35174 (emit_vlmax_cmp_insn): Ditto.
35175 (emit_vlmax_cmp_mu_insn): Ditto.
35176 (get_cmp_insn_code): Ditto.
35177 (expand_vec_cmp): Ditto.
35178 (expand_vec_cmp_float): Ditto.
35179 (expand_vcond): Ditto.
35181 2023-05-24 Pan Li <pan2.li@intel.com>
35183 * config/riscv/genrvv-type-indexer.cc (main): Add
35184 unsigned_eew*_lmul1_interpret for indexer.
35185 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
35186 Register vuint*m1_t interpret function.
35187 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
35188 New macro for vuint8m1_t.
35189 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
35190 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
35191 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
35192 (vbool1_t): Add to unsigned_eew*_interpret_ops.
35193 (vbool2_t): Likewise.
35194 (vbool4_t): Likewise.
35195 (vbool8_t): Likewise.
35196 (vbool16_t): Likewise.
35197 (vbool32_t): Likewise.
35198 (vbool64_t): Likewise.
35199 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
35200 New macro for vuint*m1_t.
35201 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
35202 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
35203 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
35204 (required_extensions_p): Add vuint*m1_t interpret case.
35205 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
35206 Add vuint*m1_t interpret to base type.
35207 (unsigned_eew16_lmul1_interpret): Likewise.
35208 (unsigned_eew32_lmul1_interpret): Likewise.
35209 (unsigned_eew64_lmul1_interpret): Likewise.
35211 2023-05-24 Pan Li <pan2.li@intel.com>
35213 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
35214 for the eew size list.
35215 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
35216 (main): Add signed_eew*_lmul1_interpret for indexer.
35217 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
35218 Register vint*m1_t interpret function.
35219 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
35220 New macro for vint8m1_t.
35221 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
35222 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
35223 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
35224 (vbool1_t): Add to signed_eew*_interpret_ops.
35225 (vbool2_t): Likewise.
35226 (vbool4_t): Likewise.
35227 (vbool8_t): Likewise.
35228 (vbool16_t): Likewise.
35229 (vbool32_t): Likewise.
35230 (vbool64_t): Likewise.
35231 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
35232 New macro for vint*m1_t.
35233 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
35234 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
35235 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
35236 (required_extensions_p): Add vint8m1_t interpret case.
35237 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
35238 Add vint*m1_t interpret to base type.
35239 (signed_eew16_lmul1_interpret): Likewise.
35240 (signed_eew32_lmul1_interpret): Likewise.
35241 (signed_eew64_lmul1_interpret): Likewise.
35243 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35245 * config/riscv/autovec.md: Adjust for new interface.
35246 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
35247 (emit_nonvlmax_insn): Add AVL operand.
35248 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
35249 (emit_nonvlmax_insn): Add AVL operand.
35250 (sew64_scalar_helper): Adjust for new interface.
35251 (expand_tuple_move): Ditto.
35252 * config/riscv/vector.md: Ditto.
35254 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35256 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
35257 (expand_const_vector): Ditto.
35258 (legitimize_move): Ditto.
35259 (sew64_scalar_helper): Ditto.
35260 (expand_tuple_move): Ditto.
35261 (expand_vector_init_insert_elems): Ditto.
35262 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
35264 2023-05-24 liuhongt <hongtao.liu@intel.com>
35267 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
35268 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
35269 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
35270 (ix86_masked_all_ones): Handle 64-bit mask.
35271 * config/i386/i386-builtin.def: Replace icode of related
35272 non-mask simd abs builtins with CODE_FOR_nothing.
35274 2023-05-23 Martin Uecker <uecker@tugraz.at>
35277 * function.cc (gimplify_parm_type): Remove function.
35278 (gimplify_parameters): Call gimplify_type_sizes.
35280 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35282 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
35283 and change to also accept '*subx' pattern.
35286 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35288 * config/xtensa/predicates.md (addsub_operator): New.
35289 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
35290 *extzvsi-1bit_addsubx): New insn_and_split patterns.
35291 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
35292 Add a special case about ifcvt 'noce_try_cmove()' to handle
35293 constant loads that do not fit into signed 12 bits in the
35294 patterns added above.
35296 2023-05-23 Richard Biener <rguenther@suse.de>
35298 PR tree-optimization/109747
35299 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
35300 the SLP node only once to the cost hook.
35302 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
35304 * config/avr/avr.cc (avr_insn_cost): New static function.
35305 (TARGET_INSN_COST): Define to that function.
35307 2023-05-23 Richard Biener <rguenther@suse.de>
35310 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
35311 For vector construction or splats apply GPR->XMM move
35312 costing. QImode memory can be handled directly only
35313 with SSE4.1 pinsrb.
35315 2023-05-23 Richard Biener <rguenther@suse.de>
35317 PR tree-optimization/108752
35318 * tree-vect-stmts.cc (vectorizable_operation): For bit
35319 operations with generic word_mode vectors do not cost
35320 an extra stmt. For plus, minus and negate also cost the
35321 constant materialization.
35323 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
35325 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
35326 Call ix86_expand_vec_shift_qihi_constant for shifts
35327 with constant count operand.
35328 * config/i386/i386.cc (ix86_shift_rotate_cost):
35329 Handle V4QImode and V8QImode.
35330 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
35331 (<insn>v4qi3): Ditto.
35333 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35335 * config/riscv/vector.md: Add mode.
35337 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
35339 PR tree-optimization/109934
35340 * value-range.cc (irange::invert): Remove buggy special case.
35342 2023-05-23 Richard Biener <rguenther@suse.de>
35344 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
35347 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
35350 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
35351 subregs between any scalars that are 64 bits or smaller.
35352 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
35353 (bits_etype): New int attribute.
35354 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
35355 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
35356 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
35358 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
35360 * doc/md.texi: Document that <FOO> can be used to refer to the
35361 numerical value of an int iterator FOO. Tweak other parts of
35362 the int iterator documentation.
35363 * read-rtl.cc (iterator_group::has_self_attr): New field.
35364 (map_attr_string): When has_self_attr is true, make <FOO>
35365 expand to the current value of iterator FOO.
35366 (initialize_iterators): Set has_self_attr for int iterators.
35368 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35370 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
35371 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
35372 (RVV_UNOP_NUM): New macro.
35373 (RVV_BINOP_NUM): Ditto.
35374 (legitimize_move): Refactor the framework of RVV auto-vectorization.
35375 (emit_vlmax_op): Ditto.
35376 (emit_vlmax_reg_op): Ditto.
35377 (emit_len_op): Ditto.
35378 (emit_len_binop): Ditto.
35379 (emit_vlmax_tany_many): Ditto.
35380 (emit_nonvlmax_tany_many): Ditto.
35381 (sew64_scalar_helper): Ditto.
35382 (expand_tuple_move): Ditto.
35383 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
35384 (emit_pred_binop): Ditto.
35385 (emit_vlmax_op): Ditto.
35386 (emit_vlmax_tany_many): New function.
35387 (emit_len_op): Remove.
35388 (emit_nonvlmax_tany_many): New function.
35389 (emit_vlmax_reg_op): Remove.
35390 (emit_len_binop): Ditto.
35391 (emit_index_op): Ditto.
35392 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
35393 (expand_const_vector): Ditto.
35394 (legitimize_move): Ditto.
35395 (sew64_scalar_helper): Ditto.
35396 (expand_tuple_move): Ditto.
35397 (expand_vector_init_insert_elems): Ditto.
35398 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
35399 * config/riscv/vector.md: Ditto.
35401 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35404 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
35405 and constraint for operand 0.
35406 (add_vec_concat_subst_be): Likewise.
35408 2023-05-23 Richard Biener <rguenther@suse.de>
35410 PR tree-optimization/109849
35411 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
35412 and use that to determine what to hoist.
35414 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
35416 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
35417 specific treatment for bit-fields only if they have an integral type
35418 and filter out non-integral bit-fields that do not start and end on
35421 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
35423 PR tree-optimization/109920
35424 * value-range.h (RESIZABLE>::~int_range): Use delete[].
35426 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
35428 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
35429 calcuation of integer vector mode costs to reflect generated
35430 instruction sequences of different integer vector modes and
35431 different target ABIs. Remove "speed" function argument.
35432 (ix86_rtx_costs): Update call for removed function argument.
35433 (ix86_vector_costs::add_stmt_cost): Ditto.
35435 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
35437 * value-range.h (class Value_Range): Implement set_zero,
35438 set_nonzero, and nonzero_p.
35440 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
35442 * config/i386/i386.cc (ix86_multiplication_cost): Add
35443 the cost of a memory read to the cost of V?QImode sequences.
35445 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35447 * config/riscv/riscv-v.cc: Add "m_" prefix.
35449 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35451 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
35452 multiple-rgroup of length.
35453 * tree-vect-stmts.cc (vectorizable_store): Ditto.
35454 (vectorizable_load): Ditto.
35455 * tree-vectorizer.h (vect_get_loop_len): Ditto.
35457 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35459 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
35462 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
35464 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
35465 handling for the case index == count.
35467 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
35470 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
35471 Don't fold to XOR / AND / XOR if just one bit is copied to the
35474 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
35476 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
35477 builtin for bit reversal using brev instruction.
35478 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
35479 NVPTX_BUILTIN_BREVLL.
35480 (nvptx_init_builtins): Define "brev" and "brevll".
35481 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
35482 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
35483 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
35484 section, document __builtin_nvptx_brev{,ll}.
35486 2023-05-21 Jakub Jelinek <jakub@redhat.com>
35488 PR tree-optimization/109505
35489 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
35490 Combine successive equal operations with constants,
35491 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
35492 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
35495 2023-05-21 Andrew Pinski <apinski@marvell.com>
35497 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
35499 2023-05-21 Pan Li <pan2.li@intel.com>
35501 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
35502 rest bool size, aka 2, 4, 8, 16, 32, 64.
35503 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
35504 Register vbool[2|4|8|16|32|64] interpret function.
35505 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
35506 New macro for vbool2_t.
35507 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
35508 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
35509 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
35510 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
35511 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
35512 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
35513 (vint16m1_t): Likewise.
35514 (vint32m1_t): Likewise.
35515 (vint64m1_t): Likewise.
35516 (vuint8m1_t): Likewise.
35517 (vuint16m1_t): Likewise.
35518 (vuint32m1_t): Likewise.
35519 (vuint64m1_t): Likewise.
35520 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
35521 New macro for vbool2_t.
35522 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
35523 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
35524 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
35525 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
35526 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
35527 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
35528 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
35529 vbool2_t interprect to base type.
35530 (bool4_interpret): Likewise.
35531 (bool8_interpret): Likewise.
35532 (bool16_interpret): Likewise.
35533 (bool32_interpret): Likewise.
35534 (bool64_interpret): Likewise.
35536 2023-05-21 Andrew Pinski <apinski@marvell.com>
35538 PR middle-end/109919
35539 * expr.cc (expand_single_bit_test): Don't use the
35540 target for expand_expr.
35542 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
35544 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
35547 2023-05-20 Pan Li <pan2.li@intel.com>
35549 * mode-switching.cc (entity_map): Initialize the array to zero.
35552 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
35555 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
35556 Remove superfluous "parallel" in insn pattern.
35557 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
35558 printing error text to assembly.
35560 2023-05-20 Andrew Pinski <apinski@marvell.com>
35562 * expr.cc (fold_single_bit_test): Rename to ...
35563 (expand_single_bit_test): This and expand directly.
35564 (do_store_flag): Update for the rename function.
35566 2023-05-20 Andrew Pinski <apinski@marvell.com>
35568 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
35569 instead of shift/and.
35571 2023-05-20 Andrew Pinski <apinski@marvell.com>
35573 * expr.cc (fold_single_bit_test): Add an assert
35574 and simplify based on code being NE_EXPR or EQ_EXPR.
35576 2023-05-20 Andrew Pinski <apinski@marvell.com>
35578 * expr.cc (fold_single_bit_test): Take inner and bitnum
35579 instead of arg0 and arg1. Update the code.
35580 (do_store_flag): Don't create a tree when calling
35581 fold_single_bit_test instead just call it with the bitnum
35582 and the inner tree.
35584 2023-05-20 Andrew Pinski <apinski@marvell.com>
35586 * expr.cc (fold_single_bit_test): Use get_def_for_expr
35587 instead of checking the inner's code.
35589 2023-05-20 Andrew Pinski <apinski@marvell.com>
35591 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
35592 (fold_single_bit_test): This and simplify.
35594 2023-05-20 Andrew Pinski <apinski@marvell.com>
35596 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
35598 (fold_single_bit_test): Likewise.
35599 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
35600 (fold_single_bit_test): Likewise and make static.
35601 * fold-const.h (fold_single_bit_test): Remove declaration.
35603 2023-05-20 Die Li <lidie@eswincomputing.com>
35605 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
35608 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
35610 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
35612 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
35615 * config/riscv/bitmanip.md
35616 (<bitmanip_optab>disi2): Match with any_extend.
35617 (<bitmanip_optab>disi2_sext): New pattern to match
35618 with sign extend using an ANDI instruction.
35620 2023-05-19 Nathan Sidwell <nathan@acm.org>
35623 * opts.h (handle_deferred_dump_options): Declare.
35624 * opts-global.cc (handle_common_deferred_options): Do not handle
35626 (handle_deferred_dump_options): New.
35627 * toplev.cc (toplev::main): Call it after plugin init.
35629 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
35631 * config/riscv/constraints.md (DsS, DsD): Restore agreement
35632 with shiftm1 mode attribute.
35634 2023-05-19 Andrew Pinski <apinski@marvell.com>
35637 * gcc.cc (default_compilers["@c-header"]): Add %w
35638 after the --output-pch.
35640 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
35642 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
35643 to hival, ASHIFT the corresponding regs.
35645 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
35647 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
35649 2023-05-19 Jakub Jelinek <jakub@redhat.com>
35651 PR tree-optimization/105776
35652 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
35653 non-NULL, allow division statement to have a cast as single imm use
35654 rather than comparison/condition.
35655 (match_arith_overflow): In that case remove the cast stmt in addition
35656 to the division statement.
35658 2023-05-19 Jakub Jelinek <jakub@redhat.com>
35660 PR tree-optimization/101856
35661 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
35662 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
35663 support it but umul_highpart_optab does.
35665 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
35667 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
35668 of tree_to_shwi on array indices. Minor tweaks.
35670 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
35672 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
35673 * attribs.cc (diag_attr_exclusions): Ditto.
35674 (decl_attributes): Ditto.
35675 (build_type_attribute_qual_variant): Ditto.
35676 * builtins.cc (fold_builtin_carg): Ditto.
35677 (fold_builtin_next_arg): Ditto.
35678 (do_mpc_arg2): Ditto.
35679 * cfgexpand.cc (expand_return): Ditto.
35680 * cgraph.h (decl_in_symtab_p): Ditto.
35681 (symtab_node::get_create): Ditto.
35682 * dwarf2out.cc (base_type_die): Ditto.
35683 (implicit_ptr_descriptor): Ditto.
35684 (gen_array_type_die): Ditto.
35685 (gen_type_die_with_usage): Ditto.
35686 (optimize_location_into_implicit_ptr): Ditto.
35687 * expr.cc (do_store_flag): Ditto.
35688 * fold-const.cc (negate_expr_p): Ditto.
35689 (fold_negate_expr_1): Ditto.
35690 (fold_convert_const): Ditto.
35691 (fold_convert_loc): Ditto.
35692 (constant_boolean_node): Ditto.
35693 (fold_binary_op_with_conditional_arg): Ditto.
35694 (build_fold_addr_expr_with_type_loc): Ditto.
35695 (fold_comparison): Ditto.
35696 (fold_checksum_tree): Ditto.
35697 (tree_unary_nonnegative_warnv_p): Ditto.
35698 (integer_valued_real_unary_p): Ditto.
35699 (fold_read_from_constant_string): Ditto.
35700 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
35701 * gimple-expr.cc (useless_type_conversion_p): Ditto.
35702 (is_gimple_reg): Ditto.
35703 (is_gimple_asm_val): Ditto.
35704 (mark_addressable): Ditto.
35705 * gimple-expr.h (is_gimple_variable): Ditto.
35706 (virtual_operand_p): Ditto.
35707 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
35708 * gimplify.cc (gimplify_bind_expr): Ditto.
35709 (gimplify_return_expr): Ditto.
35710 (gimple_add_padding_init_for_auto_var): Ditto.
35711 (gimplify_addr_expr): Ditto.
35712 (omp_add_variable): Ditto.
35713 (omp_notice_variable): Ditto.
35714 (omp_get_base_pointer): Ditto.
35715 (omp_strip_components_and_deref): Ditto.
35716 (omp_strip_indirections): Ditto.
35717 (omp_accumulate_sibling_list): Ditto.
35718 (omp_build_struct_sibling_lists): Ditto.
35719 (gimplify_adjust_omp_clauses_1): Ditto.
35720 (gimplify_adjust_omp_clauses): Ditto.
35721 (gimplify_omp_for): Ditto.
35722 (goa_lhs_expr_p): Ditto.
35723 (gimplify_one_sizepos): Ditto.
35724 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
35725 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
35726 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
35727 (propagate_controlled_uses): Ditto.
35728 * ipa-sra.cc (type_prevails_p): Ditto.
35729 (scan_expr_access): Ditto.
35730 * optabs-tree.cc (optab_for_tree_code): Ditto.
35731 * toplev.cc (wrapup_global_declaration_1): Ditto.
35732 * trans-mem.cc (transaction_invariant_address_p): Ditto.
35733 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
35734 (verify_gimple_comparison): Ditto.
35735 (verify_gimple_assign_binary): Ditto.
35736 (verify_gimple_assign_single): Ditto.
35737 * tree-complex.cc (get_component_ssa_name): Ditto.
35738 * tree-emutls.cc (lower_emutls_2): Ditto.
35739 * tree-inline.cc (copy_tree_body_r): Ditto.
35740 (estimate_move_cost): Ditto.
35741 (copy_decl_for_dup_finish): Ditto.
35742 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
35743 (note_nonlocal_vla_type): Ditto.
35744 (convert_local_omp_clauses): Ditto.
35745 (remap_vla_decls): Ditto.
35746 (fixup_vla_decls): Ditto.
35747 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
35748 * tree-pretty-print.cc (print_declaration): Ditto.
35749 (print_call_name): Ditto.
35750 * tree-sra.cc (compare_access_positions): Ditto.
35751 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
35752 * tree-ssa-ccp.cc (get_default_value): Ditto.
35753 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
35754 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
35755 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
35756 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
35757 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
35758 * tree-ssa-sink.cc (statement_sink_location): Ditto.
35759 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
35760 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
35761 * tree-ssa-uninit.cc (warn_uninit): Ditto.
35762 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
35763 (non_rewritable_mem_ref_base): Ditto.
35764 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
35765 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
35766 * tree-vect-generic.cc (do_binop): Ditto.
35768 * tree-vect-stmts.cc (vect_init_vector): Ditto.
35769 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
35770 * tree.cc (sign_mask_for): Ditto.
35771 (verify_type_variant): Ditto.
35772 (gimple_canonical_types_compatible_p): Ditto.
35773 (verify_type): Ditto.
35774 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
35775 * var-tracking.cc (prepare_call_arguments): Ditto.
35776 (vt_add_function_parameters): Ditto.
35777 * varasm.cc (decode_addr_const): Ditto.
35779 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
35781 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
35782 (lower_reduction_clauses): Ditto.
35783 (lower_send_clauses): Ditto.
35784 (lower_omp_task_reductions): Ditto.
35785 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
35786 (worker_single_copy): Ditto.
35787 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
35788 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
35790 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
35792 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
35794 (lto_read_body_or_constructor): Ditto.
35795 * lto-streamer-out.cc (tree_is_indexable): Ditto.
35796 (lto_output_var_decl_ref): Ditto.
35797 (DFS::DFS_write_tree_body): Ditto.
35798 (wrap_refs): Ditto.
35799 (write_symbol_extension_info): Ditto.
35801 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
35803 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
35804 defines from tree.h.
35805 (aarch64_mangle_type): Ditto.
35806 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
35807 (alpha_gimplify_va_arg_1): Ditto.
35808 * config/arc/arc.cc (arc_encode_section_info): Ditto.
35809 (arc_is_aux_reg_p): Ditto.
35810 (arc_is_uncached_mem_p): Ditto.
35811 (arc_handle_aux_attribute): Ditto.
35812 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
35813 (arm_handle_cmse_nonsecure_call): Ditto.
35814 (arm_set_default_type_attributes): Ditto.
35815 (arm_is_segment_info_known): Ditto.
35816 (arm_mangle_type): Ditto.
35817 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
35818 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
35819 (avr_decl_absdata_p): Ditto.
35820 (avr_insert_attributes): Ditto.
35821 (avr_section_type_flags): Ditto.
35822 (avr_encode_section_info): Ditto.
35823 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
35824 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
35825 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
35826 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
35827 (csky_mangle_type): Ditto.
35828 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
35829 * config/darwin.cc (is_objc_metadata): Ditto.
35830 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
35831 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
35832 * config/frv/frv.cc (frv_emit_movsi): Ditto.
35833 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
35834 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
35835 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
35836 * config/i386/i386-expand.cc: Ditto.
35837 * config/i386/i386.cc (type_natural_mode): Ditto.
35838 (ix86_function_arg): Ditto.
35839 (ix86_data_alignment): Ditto.
35840 (ix86_local_alignment): Ditto.
35841 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
35842 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
35843 (i386_pe_type_dllexport_p): Ditto.
35844 (i386_pe_adjust_class_at_definition): Ditto.
35845 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
35846 (i386_pe_binds_local_p): Ditto.
35847 (i386_pe_section_type_flags): Ditto.
35848 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
35849 (ia64_gimplify_va_arg): Ditto.
35850 (ia64_in_small_data_p): Ditto.
35851 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
35852 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
35853 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
35854 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
35855 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
35856 (mcore_encode_section_info): Ditto.
35857 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
35858 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
35859 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
35860 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
35861 (pass_in_memory): Ditto.
35862 (nvptx_generate_vector_shuffle): Ditto.
35863 (nvptx_lockless_update): Ditto.
35864 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
35865 (pa_function_value): Ditto.
35866 (pa_function_arg): Ditto.
35867 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
35868 (TEXT_SPACE_P): Ditto.
35869 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
35870 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
35871 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
35872 (riscv_mangle_type): Ditto.
35873 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
35874 (rl78_addsi3_internal): Ditto.
35875 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
35876 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
35877 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
35878 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
35879 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
35880 (rs6000_function_arg_advance_1): Ditto.
35881 (rs6000_function_arg): Ditto.
35882 (rs6000_pass_by_reference): Ditto.
35883 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
35884 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
35885 (rs6000_set_default_type_attributes): Ditto.
35886 (rs6000_elf_in_small_data_p): Ditto.
35887 (IN_NAMED_SECTION): Ditto.
35888 (rs6000_xcoff_encode_section_info): Ditto.
35889 (rs6000_function_value): Ditto.
35890 (invalid_arg_for_unprototyped_fn): Ditto.
35891 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
35892 (s390_vec_n_elem): Ditto.
35893 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
35894 (s390_function_arg_integer): Ditto.
35895 (s390_return_in_memory): Ditto.
35896 (s390_encode_section_info): Ditto.
35897 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
35898 (sh_function_value): Ditto.
35899 * config/sol2.cc (solaris_insert_attributes): Ditto.
35900 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
35901 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
35902 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
35903 (xstormy16_handle_below100_attribute): Ditto.
35904 * config/v850/v850.cc (v850_encode_section_info): Ditto.
35905 (v850_insert_attributes): Ditto.
35906 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
35907 (visium_return_in_memory): Ditto.
35908 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
35910 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
35912 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
35913 (ix86_expand_vecop_qihi): Add op2vec bool variable.
35914 Do not set REG_EQUAL note.
35915 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
35917 * config/i386/i386.cc (ix86_multiplication_cost): Handle
35918 V4QImode and V8QImode.
35919 * config/i386/mmx.md (mulv8qi3): New expander.
35921 * config/i386/sse.md (mulv8qi3): Remove.
35923 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
35925 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
35927 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
35929 PR bootstrap/105831
35930 * config.gcc: Use = operator instead of ==.
35932 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
35934 PR bootstrap/105831
35935 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
35936 * configure.ac: Likewise.
35937 * configure: Regenerate.
35939 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
35941 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
35942 (__ARM_mve_coerce1): Remove.
35943 (__ARM_mve_coerce2): Remove.
35944 (__ARM_mve_coerce3): Remove.
35945 (__ARM_mve_coerce_i_scalar): New.
35946 (__ARM_mve_coerce_s8_ptr): New.
35947 (__ARM_mve_coerce_u8_ptr): New.
35948 (__ARM_mve_coerce_s16_ptr): New.
35949 (__ARM_mve_coerce_u16_ptr): New.
35950 (__ARM_mve_coerce_s32_ptr): New.
35951 (__ARM_mve_coerce_u32_ptr): New.
35952 (__ARM_mve_coerce_s64_ptr): New.
35953 (__ARM_mve_coerce_u64_ptr): New.
35954 (__ARM_mve_coerce_f_scalar): New.
35955 (__ARM_mve_coerce_f16_ptr): New.
35956 (__ARM_mve_coerce_f32_ptr): New.
35957 (__arm_vst4q): Change _coerce_ overloads.
35958 (__arm_vbicq): Change _coerce_ overloads.
35959 (__arm_vld1q): Change _coerce_ overloads.
35960 (__arm_vld1q_z): Change _coerce_ overloads.
35961 (__arm_vld2q): Change _coerce_ overloads.
35962 (__arm_vld4q): Change _coerce_ overloads.
35963 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
35964 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
35965 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
35966 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
35967 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
35968 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
35969 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
35970 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
35971 (__arm_vst1q_p): Change _coerce_ overloads.
35972 (__arm_vst2q): Change _coerce_ overloads.
35973 (__arm_vst1q): Change _coerce_ overloads.
35974 (__arm_vstrhq): Change _coerce_ overloads.
35975 (__arm_vstrhq_p): Change _coerce_ overloads.
35976 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
35977 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
35978 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
35979 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
35980 (__arm_vstrwq_p): Change _coerce_ overloads.
35981 (__arm_vstrwq): Change _coerce_ overloads.
35982 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
35983 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
35984 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
35985 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
35986 (__arm_vsetq_lane): Change _coerce_ overloads.
35987 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
35988 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
35989 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
35990 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
35991 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
35992 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
35993 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
35994 (__arm_vidupq_x_u8): Change _coerce_ overloads.
35995 (__arm_vddupq_x_u8): Change _coerce_ overloads.
35996 (__arm_vidupq_x_u16): Change _coerce_ overloads.
35997 (__arm_vddupq_x_u16): Change _coerce_ overloads.
35998 (__arm_vidupq_x_u32): Change _coerce_ overloads.
35999 (__arm_vddupq_x_u32): Change _coerce_ overloads.
36000 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
36001 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
36002 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
36003 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
36004 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
36005 (__arm_vidupq_u16): Change _coerce_ overloads.
36006 (__arm_vidupq_u32): Change _coerce_ overloads.
36007 (__arm_vidupq_u8): Change _coerce_ overloads.
36008 (__arm_vddupq_u16): Change _coerce_ overloads.
36009 (__arm_vddupq_u32): Change _coerce_ overloads.
36010 (__arm_vddupq_u8): Change _coerce_ overloads.
36011 (__arm_viwdupq_m): Change _coerce_ overloads.
36012 (__arm_viwdupq_u16): Change _coerce_ overloads.
36013 (__arm_viwdupq_u32): Change _coerce_ overloads.
36014 (__arm_viwdupq_u8): Change _coerce_ overloads.
36015 (__arm_vdwdupq_m): Change _coerce_ overloads.
36016 (__arm_vdwdupq_u16): Change _coerce_ overloads.
36017 (__arm_vdwdupq_u32): Change _coerce_ overloads.
36018 (__arm_vdwdupq_u8): Change _coerce_ overloads.
36019 (__arm_vstrbq): Change _coerce_ overloads.
36020 (__arm_vstrbq_p): Change _coerce_ overloads.
36021 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
36022 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
36023 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
36024 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
36025 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
36027 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
36029 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
36032 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
36034 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
36035 (__arm_vadcq_u32): Likewise.
36036 (__arm_vadcq_m_s32): Likewise.
36037 (__arm_vadcq_m_u32): Likewise.
36038 (__arm_vsbcq_s32): Likewise.
36039 (__arm_vsbcq_u32): Likewise.
36040 (__arm_vsbcq_m_s32): Likewise.
36041 (__arm_vsbcq_m_u32): Likewise.
36042 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
36044 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
36046 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
36047 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
36048 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
36049 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
36050 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
36051 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
36052 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
36053 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
36054 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
36055 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
36056 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
36057 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
36058 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
36059 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
36060 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
36061 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
36062 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
36063 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
36064 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
36065 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
36066 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
36067 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
36068 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
36069 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
36070 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
36071 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
36072 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
36073 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
36074 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
36075 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
36076 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
36077 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
36078 (mve_vorrq_m_f<mode>)
36079 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
36080 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
36081 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
36082 capitalization in the emitted asm.
36084 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
36086 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
36088 (Ri): Move constraint definition from predicates.md.
36089 (Rl): Define new constraint.
36090 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
36091 missing constraint.
36092 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
36093 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
36094 op 2. Fix asm output spacing.
36095 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
36096 * config/arm/predicates.md (Ri) Move constraint to constraints.md
36097 (mve_vldrd_immediate): Move it from
36099 (mve_vstrw_immediate): New predicate.
36101 2023-05-18 Pan Li <pan2.li@intel.com>
36102 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36103 Kito Cheng <kito.cheng@sifive.com>
36104 Richard Biener <rguenther@suse.de>
36105 Richard Sandiford <richard.sandiford@arm.com>
36107 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
36108 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
36109 (struct table_elt): Extend machine_mode to 16 bits.
36110 (struct set): Ditto.
36111 * genmodes.cc (emit_mode_wider): Extend type from char to short.
36112 (emit_mode_complex): Ditto.
36113 (emit_mode_inner): Ditto.
36114 (emit_class_narrowest_mode): Ditto.
36115 * genopinit.cc (main): Extend the machine_mode limit.
36116 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
36117 re-ordered the struct fields for padding.
36118 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
36119 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
36120 (get_mode_alignment): Extend type from char to short.
36121 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
36122 removed the ATTRIBUTE_PACKED.
36123 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
36124 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
36125 m_kind to 2 bits and remove m_spare.
36126 * rtl.h (RTX_CODE_BITSIZE): New macro.
36127 (struct rtx_def): Swap both the bit size and location between the
36128 rtx_code and the machine_mode.
36129 (subreg_shape::unique_id): Extend the machine_mode limit.
36130 * rtlanal.h: Extend machine_mode to 16 bits.
36131 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
36132 bits and re-ordered the struct fields for padding.
36133 (struct tree_decl_common): Extend machine_mode to 16 bits.
36135 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
36137 * genrecog.cc (print_nonbool_test): Fix type error of
36138 switch (SUBREG_BYTE (op))'.
36140 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
36142 * common/config/riscv/riscv-common.cc: Remove
36143 trailing spaces on lines.
36144 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
36145 * config/riscv/riscv.h (enum reg_class): Likewise.
36146 * config/riscv/riscv.md: Likewise.
36148 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
36150 * config/pa/pa.md (clear_cache): New.
36152 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
36154 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
36155 parenthesis. Fix misnamed index entry.
36156 <concept>: Fix misnamed index entry.
36158 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
36160 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
36162 (*<optab>si3_mask, *<optab>di3_mask): Here.
36163 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
36164 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
36166 (*<bitmanip_optab>si3_sext_mask): Likewise.
36167 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
36168 and const_di_mask_operand.
36169 (bitmanip_rotate): New iterator.
36170 (bitmanip_optab): Add rotates.
36171 * config/riscv/predicates.md (const_si_mask_operand): Renamed
36172 from const31_operand. Generalize to handle more mask constants.
36173 (const_di_mask_operand): Similarly.
36175 2023-05-17 Jakub Jelinek <jakub@redhat.com>
36178 * config/i386/i386-builtin-types.def (FLOAT128): Use
36179 float128t_type_node rather than float128_type_node.
36181 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
36183 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
36184 FP_CONTRACT_FAST (no functional change).
36186 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
36188 * config/i386/i386.cc (ix86_multiplication_cost): Correct
36189 calcuation of integer vector mode costs to reflect generated
36190 instruction sequences of different integer vector modes and
36191 different target ABIs.
36193 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36195 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
36196 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
36197 (riscv_mode_needed): Ditto.
36198 (riscv_mode_after): Ditto.
36199 (riscv_mode_entry): Ditto.
36200 (riscv_mode_exit): Ditto.
36201 (riscv_mode_priority): Ditto.
36202 (TARGET_MODE_EMIT): New target hook.
36203 (TARGET_MODE_NEEDED): Ditto.
36204 (TARGET_MODE_AFTER): Ditto.
36205 (TARGET_MODE_ENTRY): Ditto.
36206 (TARGET_MODE_EXIT): Ditto.
36207 (TARGET_MODE_PRIORITY): Ditto.
36208 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
36209 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
36210 * config/riscv/riscv.md: Add csrwvxrm.
36211 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
36212 (vxrmsi): New pattern.
36214 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36216 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
36217 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
36218 (struct narrow_alu_def): Ditto.
36219 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
36220 (function_expander::use_exact_insn): Ditto.
36221 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
36222 (function_base::has_rounding_mode_operand_p): New function.
36224 2023-05-17 Andrew Pinski <apinski@marvell.com>
36226 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
36227 against 0 instead of calling integer_zerop.
36229 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36231 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
36232 (DEF_RVV_VXRM_ENUM): New macro.
36233 (handle_pragma_vector): Add vxrm enum register.
36234 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
36240 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
36242 * value-range.h (Value_Range::operator=): New.
36244 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
36246 * value-range.cc (vrange::operator=): Add a stub to copy
36247 unsupported ranges.
36248 * value-range.h (is_a <unsupported_range>): New.
36249 (Value_Range::operator=): Support copying unsupported ranges.
36251 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
36253 * data-streamer-in.cc (streamer_read_real_value): New.
36254 (streamer_read_value_range): New.
36255 * data-streamer-out.cc (streamer_write_real_value): New.
36256 (streamer_write_vrange): New.
36257 * data-streamer.h (streamer_write_vrange): New.
36258 (streamer_read_value_range): New.
36260 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
36263 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
36264 is ignored for a fixed underlying type.
36265 (C++ Dialect Options): Likewise for -fstrict-enums.
36267 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
36269 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
36272 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36274 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
36276 (s390_atomic_align_for_mode): New.
36278 2023-05-17 Jakub Jelinek <jakub@redhat.com>
36280 * wide-int.cc (wi::from_array): Add missing closing paren in function
36283 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
36285 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
36286 suggested unroll factor once the previous analysis fails.
36288 2023-05-17 Pan Li <pan2.li@intel.com>
36290 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
36292 (main): Add bool1 to the type indexer.
36293 * config/riscv/riscv-vector-builtins-functions.def
36294 (vreinterpret): Register vbool1 interpret function.
36295 * config/riscv/riscv-vector-builtins-types.def
36296 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
36297 (vint8m1_t): Add the type to bool1_interpret_ops.
36298 (vint16m1_t): Ditto.
36299 (vint32m1_t): Ditto.
36300 (vint64m1_t): Ditto.
36301 (vuint8m1_t): Ditto.
36302 (vuint16m1_t): Ditto.
36303 (vuint32m1_t): Ditto.
36304 (vuint64m1_t): Ditto.
36305 * config/riscv/riscv-vector-builtins.cc
36306 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
36307 (required_extensions_p): Add bool1 interpret case.
36308 * config/riscv/riscv-vector-builtins.def
36309 (bool1_interpret): Add bool1 interpret to base type.
36310 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
36311 with VB dest for vreinterpret.
36313 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
36316 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
36317 constants through "lis; xoris".
36319 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
36321 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
36322 default rs6000 target pass for O2 and above.
36323 * doc/invoke.texi: Document -free
36325 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
36327 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
36328 Fix wrong select_kind...
36330 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36332 * config/s390/s390-protos.h (s390_expand_setmem): Change
36333 function signature.
36334 * config/s390/s390.cc (s390_expand_setmem): For memset's less
36335 than or equal to 256 byte do not perform a libc call.
36336 * config/s390/s390.md: Change expander into a version which
36339 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36341 * config/s390/s390-protos.h (s390_expand_movmem): New.
36342 * config/s390/s390.cc (s390_expand_movmem): New.
36343 * config/s390/s390.md (movmem<mode>): New.
36347 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36349 * config/s390/s390-protos.h (s390_expand_cpymem): Change
36350 function signature.
36351 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
36352 than or equal to 256 byte do not perform a libc call.
36353 (s390_expand_insv): Adapt new function signature of
36354 s390_expand_cpymem.
36355 * config/s390/s390.md: Change expander into a version which
36358 2023-05-16 Andrew Pinski <apinski@marvell.com>
36360 PR tree-optimization/109424
36361 * match.pd: Add patterns for min/max of zero_one_valued
36364 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36366 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
36367 * config/riscv/riscv-vector-builtins.cc
36368 (function_expander::use_ternop_insn): Add default rounding mode.
36369 (function_expander::use_widen_ternop_insn): Ditto.
36370 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
36371 (riscv_hard_regno_mode_ok): Ditto.
36372 (riscv_conditional_register_usage): Ditto.
36373 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
36374 (FRM_REG_P): Ditto.
36375 (RISCV_DWARF_FRM): Ditto.
36376 * config/riscv/riscv.md: Ditto.
36377 * config/riscv/vector-iterators.md: split no frm and has frm operations.
36378 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
36379 (@pred_<optab><mode>): Ditto.
36381 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
36383 PR tree-optimization/109695
36384 * value-range.cc (irange::operator=): Resize range.
36385 (irange::union_): Same.
36386 (irange::intersect): Same.
36387 (irange::invert): Same.
36388 (int_range_max): Default to 3 sub-ranges and resize as needed.
36389 * value-range.h (irange::maybe_resize): New.
36391 (int_range::int_range): Adjust for resizing.
36392 (int_range::operator=): Same.
36394 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
36396 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
36398 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
36399 when range changed.
36401 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36403 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
36404 * config/riscv/riscv-vector-builtins.cc
36405 (function_expander::use_exact_insn): Add default rounding mode operand.
36406 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
36407 (riscv_hard_regno_mode_ok): Ditto.
36408 (riscv_conditional_register_usage): Ditto.
36409 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
36410 (VXRM_REG_P): Ditto.
36411 (RISCV_DWARF_VXRM): Ditto.
36412 * config/riscv/riscv.md: Ditto.
36413 * config/riscv/vector.md: Ditto
36415 2023-05-15 Pan Li <pan2.li@intel.com>
36417 * optabs.cc (maybe_gen_insn): Add case to generate instruction
36418 that has 11 operands.
36420 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36422 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
36423 logic for vector modes.
36425 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36428 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
36429 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
36430 (aarch64_cmtst<mode>): Rename to...
36431 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
36432 (*aarch64_cmtst_same_<mode>): Rename to...
36433 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
36434 (*aarch64_cmtstdi): Rename to...
36435 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
36436 (aarch64_fac<optab><mode>): Rename to...
36437 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
36439 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36442 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
36443 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
36445 2023-05-15 Pan Li <pan2.li@intel.com>
36446 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36447 kito-cheng <kito.cheng@sifive.com>
36449 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
36450 deciding the mode is constant or not.
36451 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
36453 2023-05-15 Richard Biener <rguenther@suse.de>
36455 PR tree-optimization/109848
36456 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
36457 TARGET_MEM_REF address preparation before the store, not
36460 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36462 * config/riscv/riscv.cc
36463 (riscv_vectorize_preferred_vector_alignment): New function.
36464 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
36466 2023-05-14 Andrew Pinski <apinski@marvell.com>
36468 PR tree-optimization/109829
36469 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
36471 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
36474 * config/i386/i386.cc: Revert the 2023-05-11 change.
36475 (ix86_widen_mult_cost): Return high value instead of
36476 ICEing for unsupported modes.
36478 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
36480 * config/i386/i386.cc (x86_function_profiler): Take
36481 ix86_direct_extern_access into account when generating calls
36484 2023-05-14 Pan Li <pan2.li@intel.com>
36486 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
36487 Refactor the or pattern to switch cases.
36489 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
36491 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
36492 aarch64_expand_vector_init to this, and remove interleaving case.
36493 Recursively call aarch64_expand_vector_init_fallback, instead of
36494 aarch64_expand_vector_init.
36495 (aarch64_unzip_vector_init): New function.
36496 (aarch64_expand_vector_init): Likewise.
36498 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
36500 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
36501 Pull out function call from the gcc_assert.
36503 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
36505 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
36506 (policy_to_str): New.
36507 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
36509 2023-05-13 Andrew Pinski <apinski@marvell.com>
36511 PR tree-optimization/109834
36512 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
36513 (popcount(rotate(x,y))->popcount(x)): Likewise.
36515 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
36517 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
36518 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
36519 gen_extend_insn to generate zero/sign extension instructions.
36521 (ix86_expand_vecop_qihi): Initialize interleave functions
36522 for MULT code only. Fix comments.
36524 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
36527 * config/i386/mmx.md (mulv2si3): Remove expander.
36528 (mulv2si3): Rename insn pattern from *mulv2si.
36530 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
36532 PR libstdc++/109816
36533 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
36534 '!lto_stream_offload_p'.
36536 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
36537 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36540 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
36541 (local_avl_compatible_p): New.
36542 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
36543 for LCM, rewrite as a backward algorithm.
36544 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
36545 interface, handle a BB at once.
36547 2023-05-12 Richard Biener <rguenther@suse.de>
36549 PR tree-optimization/64731
36550 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
36551 handle TARGET_MEM_REF destinations of stores from vector
36554 2023-05-12 Richard Biener <rguenther@suse.de>
36556 PR tree-optimization/109791
36557 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
36559 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
36562 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36564 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
36565 * config/arm/arm-mve-builtins-base.def (vsriq): New.
36566 * config/arm/arm-mve-builtins-base.h (vsriq): New.
36567 * config/arm/arm-mve-builtins.cc
36568 (function_instance::has_inactive_argument): Handle vsriq.
36569 * config/arm/arm_mve.h (vsriq): Remove.
36571 (vsriq_n_u8): Remove.
36572 (vsriq_n_s8): Remove.
36573 (vsriq_n_u16): Remove.
36574 (vsriq_n_s16): Remove.
36575 (vsriq_n_u32): Remove.
36576 (vsriq_n_s32): Remove.
36577 (vsriq_m_n_s8): Remove.
36578 (vsriq_m_n_u8): Remove.
36579 (vsriq_m_n_s16): Remove.
36580 (vsriq_m_n_u16): Remove.
36581 (vsriq_m_n_s32): Remove.
36582 (vsriq_m_n_u32): Remove.
36583 (__arm_vsriq_n_u8): Remove.
36584 (__arm_vsriq_n_s8): Remove.
36585 (__arm_vsriq_n_u16): Remove.
36586 (__arm_vsriq_n_s16): Remove.
36587 (__arm_vsriq_n_u32): Remove.
36588 (__arm_vsriq_n_s32): Remove.
36589 (__arm_vsriq_m_n_s8): Remove.
36590 (__arm_vsriq_m_n_u8): Remove.
36591 (__arm_vsriq_m_n_s16): Remove.
36592 (__arm_vsriq_m_n_u16): Remove.
36593 (__arm_vsriq_m_n_s32): Remove.
36594 (__arm_vsriq_m_n_u32): Remove.
36595 (__arm_vsriq): Remove.
36596 (__arm_vsriq_m): Remove.
36598 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36600 * config/arm/iterators.md (mve_insn): Add vsri.
36601 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
36602 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
36603 (mve_vsriq_m_n_<supf><mode>): Rename into ...
36604 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36606 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36608 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
36609 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
36611 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36613 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
36614 * config/arm/arm-mve-builtins-base.def (vsliq): New.
36615 * config/arm/arm-mve-builtins-base.h (vsliq): New.
36616 * config/arm/arm-mve-builtins.cc
36617 (function_instance::has_inactive_argument): Handle vsliq.
36618 * config/arm/arm_mve.h (vsliq): Remove.
36620 (vsliq_n_u8): Remove.
36621 (vsliq_n_s8): Remove.
36622 (vsliq_n_u16): Remove.
36623 (vsliq_n_s16): Remove.
36624 (vsliq_n_u32): Remove.
36625 (vsliq_n_s32): Remove.
36626 (vsliq_m_n_s8): Remove.
36627 (vsliq_m_n_s32): Remove.
36628 (vsliq_m_n_s16): Remove.
36629 (vsliq_m_n_u8): Remove.
36630 (vsliq_m_n_u32): Remove.
36631 (vsliq_m_n_u16): Remove.
36632 (__arm_vsliq_n_u8): Remove.
36633 (__arm_vsliq_n_s8): Remove.
36634 (__arm_vsliq_n_u16): Remove.
36635 (__arm_vsliq_n_s16): Remove.
36636 (__arm_vsliq_n_u32): Remove.
36637 (__arm_vsliq_n_s32): Remove.
36638 (__arm_vsliq_m_n_s8): Remove.
36639 (__arm_vsliq_m_n_s32): Remove.
36640 (__arm_vsliq_m_n_s16): Remove.
36641 (__arm_vsliq_m_n_u8): Remove.
36642 (__arm_vsliq_m_n_u32): Remove.
36643 (__arm_vsliq_m_n_u16): Remove.
36644 (__arm_vsliq): Remove.
36645 (__arm_vsliq_m): Remove.
36647 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36649 * config/arm/iterators.md (mve_insn>): Add vsli.
36650 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
36651 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
36652 (mve_vsliq_m_n_<supf><mode>): Rename into ...
36653 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36655 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36657 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
36658 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
36660 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36662 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
36663 * config/arm/arm-mve-builtins-base.def (vpselq): New.
36664 * config/arm/arm-mve-builtins-base.h (vpselq): New.
36665 * config/arm/arm_mve.h (vpselq): Remove.
36666 (vpselq_u8): Remove.
36667 (vpselq_s8): Remove.
36668 (vpselq_u16): Remove.
36669 (vpselq_s16): Remove.
36670 (vpselq_u32): Remove.
36671 (vpselq_s32): Remove.
36672 (vpselq_u64): Remove.
36673 (vpselq_s64): Remove.
36674 (vpselq_f16): Remove.
36675 (vpselq_f32): Remove.
36676 (__arm_vpselq_u8): Remove.
36677 (__arm_vpselq_s8): Remove.
36678 (__arm_vpselq_u16): Remove.
36679 (__arm_vpselq_s16): Remove.
36680 (__arm_vpselq_u32): Remove.
36681 (__arm_vpselq_s32): Remove.
36682 (__arm_vpselq_u64): Remove.
36683 (__arm_vpselq_s64): Remove.
36684 (__arm_vpselq_f16): Remove.
36685 (__arm_vpselq_f32): Remove.
36686 (__arm_vpselq): Remove.
36688 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36690 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
36691 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
36693 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36695 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
36697 * config/arm/iterators.md (MVE_VPSELQ_F): New.
36698 (mve_insn): Add vpsel.
36699 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
36700 (@mve_<mve_insn>q_<supf><mode>): ... this.
36701 (@mve_vpselq_f<mode>): Rename into ...
36702 (@mve_<mve_insn>q_f<mode>): ... this.
36704 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36706 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
36707 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
36708 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
36709 * config/arm/arm-mve-builtins.cc
36710 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
36712 * config/arm/arm_mve.h (vfmaq): Remove.
36716 (vfmasq_m): Remove.
36718 (vfmaq_f16): Remove.
36719 (vfmaq_n_f16): Remove.
36720 (vfmasq_n_f16): Remove.
36721 (vfmsq_f16): Remove.
36722 (vfmaq_f32): Remove.
36723 (vfmaq_n_f32): Remove.
36724 (vfmasq_n_f32): Remove.
36725 (vfmsq_f32): Remove.
36726 (vfmaq_m_f32): Remove.
36727 (vfmaq_m_f16): Remove.
36728 (vfmaq_m_n_f32): Remove.
36729 (vfmaq_m_n_f16): Remove.
36730 (vfmasq_m_n_f32): Remove.
36731 (vfmasq_m_n_f16): Remove.
36732 (vfmsq_m_f32): Remove.
36733 (vfmsq_m_f16): Remove.
36734 (__arm_vfmaq_f16): Remove.
36735 (__arm_vfmaq_n_f16): Remove.
36736 (__arm_vfmasq_n_f16): Remove.
36737 (__arm_vfmsq_f16): Remove.
36738 (__arm_vfmaq_f32): Remove.
36739 (__arm_vfmaq_n_f32): Remove.
36740 (__arm_vfmasq_n_f32): Remove.
36741 (__arm_vfmsq_f32): Remove.
36742 (__arm_vfmaq_m_f32): Remove.
36743 (__arm_vfmaq_m_f16): Remove.
36744 (__arm_vfmaq_m_n_f32): Remove.
36745 (__arm_vfmaq_m_n_f16): Remove.
36746 (__arm_vfmasq_m_n_f32): Remove.
36747 (__arm_vfmasq_m_n_f16): Remove.
36748 (__arm_vfmsq_m_f32): Remove.
36749 (__arm_vfmsq_m_f16): Remove.
36750 (__arm_vfmaq): Remove.
36751 (__arm_vfmasq): Remove.
36752 (__arm_vfmsq): Remove.
36753 (__arm_vfmaq_m): Remove.
36754 (__arm_vfmasq_m): Remove.
36755 (__arm_vfmsq_m): Remove.
36757 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36759 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
36761 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
36762 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
36763 (mve_insn): Add vfma, vfmas, vfms.
36764 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
36766 (@mve_<mve_insn>q_f<mode>): ... this.
36767 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
36768 (@mve_<mve_insn>q_n_f<mode>): ... this.
36769 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
36770 @mve_<mve_insn>q_m_f<mode>.
36771 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
36772 @mve_<mve_insn>q_m_n_f<mode>.
36774 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36776 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
36777 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
36779 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36781 * config/arm/arm-mve-builtins-base.cc
36782 (FUNCTION_WITH_RTX_M_N_NO_F): New.
36784 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
36785 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
36786 * config/arm/arm_mve.h (vmvnq): Remove.
36789 (vmvnq_s8): Remove.
36790 (vmvnq_s16): Remove.
36791 (vmvnq_s32): Remove.
36792 (vmvnq_n_s16): Remove.
36793 (vmvnq_n_s32): Remove.
36794 (vmvnq_u8): Remove.
36795 (vmvnq_u16): Remove.
36796 (vmvnq_u32): Remove.
36797 (vmvnq_n_u16): Remove.
36798 (vmvnq_n_u32): Remove.
36799 (vmvnq_m_u8): Remove.
36800 (vmvnq_m_s8): Remove.
36801 (vmvnq_m_u16): Remove.
36802 (vmvnq_m_s16): Remove.
36803 (vmvnq_m_u32): Remove.
36804 (vmvnq_m_s32): Remove.
36805 (vmvnq_m_n_s16): Remove.
36806 (vmvnq_m_n_u16): Remove.
36807 (vmvnq_m_n_s32): Remove.
36808 (vmvnq_m_n_u32): Remove.
36809 (vmvnq_x_s8): Remove.
36810 (vmvnq_x_s16): Remove.
36811 (vmvnq_x_s32): Remove.
36812 (vmvnq_x_u8): Remove.
36813 (vmvnq_x_u16): Remove.
36814 (vmvnq_x_u32): Remove.
36815 (vmvnq_x_n_s16): Remove.
36816 (vmvnq_x_n_s32): Remove.
36817 (vmvnq_x_n_u16): Remove.
36818 (vmvnq_x_n_u32): Remove.
36819 (__arm_vmvnq_s8): Remove.
36820 (__arm_vmvnq_s16): Remove.
36821 (__arm_vmvnq_s32): Remove.
36822 (__arm_vmvnq_n_s16): Remove.
36823 (__arm_vmvnq_n_s32): Remove.
36824 (__arm_vmvnq_u8): Remove.
36825 (__arm_vmvnq_u16): Remove.
36826 (__arm_vmvnq_u32): Remove.
36827 (__arm_vmvnq_n_u16): Remove.
36828 (__arm_vmvnq_n_u32): Remove.
36829 (__arm_vmvnq_m_u8): Remove.
36830 (__arm_vmvnq_m_s8): Remove.
36831 (__arm_vmvnq_m_u16): Remove.
36832 (__arm_vmvnq_m_s16): Remove.
36833 (__arm_vmvnq_m_u32): Remove.
36834 (__arm_vmvnq_m_s32): Remove.
36835 (__arm_vmvnq_m_n_s16): Remove.
36836 (__arm_vmvnq_m_n_u16): Remove.
36837 (__arm_vmvnq_m_n_s32): Remove.
36838 (__arm_vmvnq_m_n_u32): Remove.
36839 (__arm_vmvnq_x_s8): Remove.
36840 (__arm_vmvnq_x_s16): Remove.
36841 (__arm_vmvnq_x_s32): Remove.
36842 (__arm_vmvnq_x_u8): Remove.
36843 (__arm_vmvnq_x_u16): Remove.
36844 (__arm_vmvnq_x_u32): Remove.
36845 (__arm_vmvnq_x_n_s16): Remove.
36846 (__arm_vmvnq_x_n_s32): Remove.
36847 (__arm_vmvnq_x_n_u16): Remove.
36848 (__arm_vmvnq_x_n_u32): Remove.
36849 (__arm_vmvnq): Remove.
36850 (__arm_vmvnq_m): Remove.
36851 (__arm_vmvnq_x): Remove.
36853 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36855 * config/arm/iterators.md (mve_insn): Add vmvn.
36856 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
36857 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
36858 (mve_vmvnq_m_<supf><mode>): Rename into ...
36859 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
36860 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
36861 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36863 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36865 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
36866 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
36868 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36870 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
36871 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
36872 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
36873 * config/arm/arm_mve.h (vbrsrq): Remove.
36874 (vbrsrq_m): Remove.
36875 (vbrsrq_x): Remove.
36876 (vbrsrq_n_f16): Remove.
36877 (vbrsrq_n_f32): Remove.
36878 (vbrsrq_n_u8): Remove.
36879 (vbrsrq_n_s8): Remove.
36880 (vbrsrq_n_u16): Remove.
36881 (vbrsrq_n_s16): Remove.
36882 (vbrsrq_n_u32): Remove.
36883 (vbrsrq_n_s32): Remove.
36884 (vbrsrq_m_n_s8): Remove.
36885 (vbrsrq_m_n_s32): Remove.
36886 (vbrsrq_m_n_s16): Remove.
36887 (vbrsrq_m_n_u8): Remove.
36888 (vbrsrq_m_n_u32): Remove.
36889 (vbrsrq_m_n_u16): Remove.
36890 (vbrsrq_m_n_f32): Remove.
36891 (vbrsrq_m_n_f16): Remove.
36892 (vbrsrq_x_n_s8): Remove.
36893 (vbrsrq_x_n_s16): Remove.
36894 (vbrsrq_x_n_s32): Remove.
36895 (vbrsrq_x_n_u8): Remove.
36896 (vbrsrq_x_n_u16): Remove.
36897 (vbrsrq_x_n_u32): Remove.
36898 (vbrsrq_x_n_f16): Remove.
36899 (vbrsrq_x_n_f32): Remove.
36900 (__arm_vbrsrq_n_u8): Remove.
36901 (__arm_vbrsrq_n_s8): Remove.
36902 (__arm_vbrsrq_n_u16): Remove.
36903 (__arm_vbrsrq_n_s16): Remove.
36904 (__arm_vbrsrq_n_u32): Remove.
36905 (__arm_vbrsrq_n_s32): Remove.
36906 (__arm_vbrsrq_m_n_s8): Remove.
36907 (__arm_vbrsrq_m_n_s32): Remove.
36908 (__arm_vbrsrq_m_n_s16): Remove.
36909 (__arm_vbrsrq_m_n_u8): Remove.
36910 (__arm_vbrsrq_m_n_u32): Remove.
36911 (__arm_vbrsrq_m_n_u16): Remove.
36912 (__arm_vbrsrq_x_n_s8): Remove.
36913 (__arm_vbrsrq_x_n_s16): Remove.
36914 (__arm_vbrsrq_x_n_s32): Remove.
36915 (__arm_vbrsrq_x_n_u8): Remove.
36916 (__arm_vbrsrq_x_n_u16): Remove.
36917 (__arm_vbrsrq_x_n_u32): Remove.
36918 (__arm_vbrsrq_n_f16): Remove.
36919 (__arm_vbrsrq_n_f32): Remove.
36920 (__arm_vbrsrq_m_n_f32): Remove.
36921 (__arm_vbrsrq_m_n_f16): Remove.
36922 (__arm_vbrsrq_x_n_f16): Remove.
36923 (__arm_vbrsrq_x_n_f32): Remove.
36924 (__arm_vbrsrq): Remove.
36925 (__arm_vbrsrq_m): Remove.
36926 (__arm_vbrsrq_x): Remove.
36928 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36930 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
36931 (mve_insn): Add vbrsr.
36932 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
36933 (@mve_<mve_insn>q_n_f<mode>): ... this.
36934 (mve_vbrsrq_n_<supf><mode>): Rename into ...
36935 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
36936 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
36937 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36938 (mve_vbrsrq_m_n_f<mode>): Rename into ...
36939 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
36941 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36943 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
36944 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
36946 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36948 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
36949 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
36950 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
36951 * config/arm/arm_mve.h (vqshluq): Remove.
36952 (vqshluq_m): Remove.
36953 (vqshluq_n_s8): Remove.
36954 (vqshluq_n_s16): Remove.
36955 (vqshluq_n_s32): Remove.
36956 (vqshluq_m_n_s8): Remove.
36957 (vqshluq_m_n_s16): Remove.
36958 (vqshluq_m_n_s32): Remove.
36959 (__arm_vqshluq_n_s8): Remove.
36960 (__arm_vqshluq_n_s16): Remove.
36961 (__arm_vqshluq_n_s32): Remove.
36962 (__arm_vqshluq_m_n_s8): Remove.
36963 (__arm_vqshluq_m_n_s16): Remove.
36964 (__arm_vqshluq_m_n_s32): Remove.
36965 (__arm_vqshluq): Remove.
36966 (__arm_vqshluq_m): Remove.
36968 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36970 * config/arm/iterators.md (mve_insn): Add vqshlu.
36971 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
36972 (VQSHLUQ_M_N, VQSHLUQ_N): New.
36973 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
36974 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
36975 (mve_vqshluq_m_n_s<mode>): Change name into ...
36976 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36978 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36980 * config/arm/arm-mve-builtins-shapes.cc
36981 (binary_lshift_unsigned): New.
36982 * config/arm/arm-mve-builtins-shapes.h
36983 (binary_lshift_unsigned): New.
36985 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36987 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
36988 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
36989 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
36990 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
36991 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
36992 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
36993 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
36994 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
36995 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
36996 (vrmlaldavhaxq): Remove.
36997 (vrmlsldavhaq): Remove.
36998 (vrmlsldavhaxq): Remove.
36999 (vrmlaldavhaq_p): Remove.
37000 (vrmlaldavhaxq_p): Remove.
37001 (vrmlsldavhaq_p): Remove.
37002 (vrmlsldavhaxq_p): Remove.
37003 (vrmlaldavhaq_s32): Remove.
37004 (vrmlaldavhaq_u32): Remove.
37005 (vrmlaldavhaxq_s32): Remove.
37006 (vrmlsldavhaq_s32): Remove.
37007 (vrmlsldavhaxq_s32): Remove.
37008 (vrmlaldavhaq_p_s32): Remove.
37009 (vrmlaldavhaq_p_u32): Remove.
37010 (vrmlaldavhaxq_p_s32): Remove.
37011 (vrmlsldavhaq_p_s32): Remove.
37012 (vrmlsldavhaxq_p_s32): Remove.
37013 (__arm_vrmlaldavhaq_s32): Remove.
37014 (__arm_vrmlaldavhaq_u32): Remove.
37015 (__arm_vrmlaldavhaxq_s32): Remove.
37016 (__arm_vrmlsldavhaq_s32): Remove.
37017 (__arm_vrmlsldavhaxq_s32): Remove.
37018 (__arm_vrmlaldavhaq_p_s32): Remove.
37019 (__arm_vrmlaldavhaq_p_u32): Remove.
37020 (__arm_vrmlaldavhaxq_p_s32): Remove.
37021 (__arm_vrmlsldavhaq_p_s32): Remove.
37022 (__arm_vrmlsldavhaxq_p_s32): Remove.
37023 (__arm_vrmlaldavhaq): Remove.
37024 (__arm_vrmlaldavhaxq): Remove.
37025 (__arm_vrmlsldavhaq): Remove.
37026 (__arm_vrmlsldavhaxq): Remove.
37027 (__arm_vrmlaldavhaq_p): Remove.
37028 (__arm_vrmlaldavhaxq_p): Remove.
37029 (__arm_vrmlsldavhaq_p): Remove.
37030 (__arm_vrmlsldavhaxq_p): Remove.
37032 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37034 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
37035 (MVE_VRMLxLDAVHAxQ_P): New.
37036 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
37038 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
37039 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
37041 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
37042 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
37043 (mve_vrmlsldavhaq_sv4si): Merge into ...
37044 (@mve_<mve_insn>q_<supf>v4si): ... this.
37045 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
37046 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
37047 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
37048 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
37050 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37052 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
37053 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
37055 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
37056 * config/arm/arm_mve.h (vqdmulltq): Remove.
37057 (vqdmullbq): Remove.
37058 (vqdmullbq_m): Remove.
37059 (vqdmulltq_m): Remove.
37060 (vqdmulltq_s16): Remove.
37061 (vqdmulltq_n_s16): Remove.
37062 (vqdmullbq_s16): Remove.
37063 (vqdmullbq_n_s16): Remove.
37064 (vqdmulltq_s32): Remove.
37065 (vqdmulltq_n_s32): Remove.
37066 (vqdmullbq_s32): Remove.
37067 (vqdmullbq_n_s32): Remove.
37068 (vqdmullbq_m_n_s32): Remove.
37069 (vqdmullbq_m_n_s16): Remove.
37070 (vqdmullbq_m_s32): Remove.
37071 (vqdmullbq_m_s16): Remove.
37072 (vqdmulltq_m_n_s32): Remove.
37073 (vqdmulltq_m_n_s16): Remove.
37074 (vqdmulltq_m_s32): Remove.
37075 (vqdmulltq_m_s16): Remove.
37076 (__arm_vqdmulltq_s16): Remove.
37077 (__arm_vqdmulltq_n_s16): Remove.
37078 (__arm_vqdmullbq_s16): Remove.
37079 (__arm_vqdmullbq_n_s16): Remove.
37080 (__arm_vqdmulltq_s32): Remove.
37081 (__arm_vqdmulltq_n_s32): Remove.
37082 (__arm_vqdmullbq_s32): Remove.
37083 (__arm_vqdmullbq_n_s32): Remove.
37084 (__arm_vqdmullbq_m_n_s32): Remove.
37085 (__arm_vqdmullbq_m_n_s16): Remove.
37086 (__arm_vqdmullbq_m_s32): Remove.
37087 (__arm_vqdmullbq_m_s16): Remove.
37088 (__arm_vqdmulltq_m_n_s32): Remove.
37089 (__arm_vqdmulltq_m_n_s16): Remove.
37090 (__arm_vqdmulltq_m_s32): Remove.
37091 (__arm_vqdmulltq_m_s16): Remove.
37092 (__arm_vqdmulltq): Remove.
37093 (__arm_vqdmullbq): Remove.
37094 (__arm_vqdmullbq_m): Remove.
37095 (__arm_vqdmulltq_m): Remove.
37097 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37099 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
37100 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
37101 (mve_insn): Add vqdmullb, vqdmullt.
37102 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
37103 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
37105 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
37106 (mve_vqdmulltq_n_s<mode>): Merge into ...
37107 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
37108 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
37109 (@mve_<mve_insn>q_<supf><mode>): ... this.
37110 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
37112 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
37113 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
37114 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
37116 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37118 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
37119 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
37121 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
37123 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
37124 Drop unused parameter.
37125 (riscv_select_multilib): Ditto.
37126 (riscv_compute_multilib): Update call site of
37127 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
37129 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
37131 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
37132 * config/riscv/riscv-protos.h (expand_vec_init): New function.
37133 * config/riscv/riscv-v.cc (class rvv_builder): New class.
37134 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
37135 (rvv_builder::get_merged_repeating_sequence): Ditto.
37136 (expand_vector_init_insert_elems): Ditto.
37137 (expand_vec_init): Ditto.
37138 * config/riscv/vector-iterators.md: New attribute.
37140 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
37142 * config/rs6000/rs6000-builtins.def
37143 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
37145 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
37146 xsiexpdpf to xsiexpdpf_di.
37147 * config/rs6000/vsx.md (xsiexpdp): Rename to...
37148 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
37149 replace TARGET_64BIT with TARGET_POWERPC64.
37150 (xsiexpdpf): Rename to...
37151 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
37152 replace TARGET_64BIT with TARGET_POWERPC64.
37154 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
37156 * config/rs6000/rs6000-builtins.def
37157 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
37159 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
37162 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
37164 * config/rs6000/rs6000-builtins.def
37165 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
37166 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
37168 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
37169 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
37170 TARGET_64BIT check.
37171 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
37172 requirement when it has a 64-bit argument.
37174 2023-05-12 Pan Li <pan2.li@intel.com>
37175 Richard Sandiford <richard.sandiford@arm.com>
37176 Richard Biener <rguenther@suse.de>
37177 Jakub Jelinek <jakub@redhat.com>
37179 * mux-utils.h: Add overload operator == and != for pointer_mux.
37180 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
37181 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
37182 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
37183 (dv_as_decl): Ditto.
37184 (dv_as_opaque): Removed due to unnecessary.
37185 (struct variable_hasher): Take decl_or_value as compare_type.
37186 (variable_hasher::equal): Diito.
37187 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
37188 (dv_from_value): Ditto.
37189 (attrs_list_member): Ditto.
37190 (vars_copy): Ditto.
37191 (var_reg_decl_set): Ditto.
37192 (var_reg_delete_and_set): Ditto.
37193 (find_loc_in_1pdv): Ditto.
37194 (canonicalize_values_star): Ditto.
37195 (variable_post_merge_new_vals): Ditto.
37196 (dump_onepart_variable_differences): Ditto.
37197 (variable_different_p): Ditto.
37198 (set_slot_part): Ditto.
37199 (clobber_slot_part): Ditto.
37200 (clobber_variable_part): Ditto.
37202 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
37204 * match.pd: simplify vector shift + bit_and + multiply.
37206 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37208 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
37209 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
37210 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
37211 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
37212 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
37213 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
37214 * config/arm/arm-mve-builtins.cc
37215 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
37216 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
37217 * config/arm/arm_mve.h (vqrdmlashq): Remove.
37218 (vqrdmlahq): Remove.
37219 (vqdmlashq): Remove.
37220 (vqdmlahq): Remove.
37224 (vmlasq_m): Remove.
37225 (vqdmlashq_m): Remove.
37226 (vqdmlahq_m): Remove.
37227 (vqrdmlahq_m): Remove.
37228 (vqrdmlashq_m): Remove.
37229 (vmlasq_n_u8): Remove.
37230 (vmlaq_n_u8): Remove.
37231 (vqrdmlashq_n_s8): Remove.
37232 (vqrdmlahq_n_s8): Remove.
37233 (vqdmlahq_n_s8): Remove.
37234 (vqdmlashq_n_s8): Remove.
37235 (vmlasq_n_s8): Remove.
37236 (vmlaq_n_s8): Remove.
37237 (vmlasq_n_u16): Remove.
37238 (vmlaq_n_u16): Remove.
37239 (vqrdmlashq_n_s16): Remove.
37240 (vqrdmlahq_n_s16): Remove.
37241 (vqdmlashq_n_s16): Remove.
37242 (vqdmlahq_n_s16): Remove.
37243 (vmlasq_n_s16): Remove.
37244 (vmlaq_n_s16): Remove.
37245 (vmlasq_n_u32): Remove.
37246 (vmlaq_n_u32): Remove.
37247 (vqrdmlashq_n_s32): Remove.
37248 (vqrdmlahq_n_s32): Remove.
37249 (vqdmlashq_n_s32): Remove.
37250 (vqdmlahq_n_s32): Remove.
37251 (vmlasq_n_s32): Remove.
37252 (vmlaq_n_s32): Remove.
37253 (vmlaq_m_n_s8): Remove.
37254 (vmlaq_m_n_s32): Remove.
37255 (vmlaq_m_n_s16): Remove.
37256 (vmlaq_m_n_u8): Remove.
37257 (vmlaq_m_n_u32): Remove.
37258 (vmlaq_m_n_u16): Remove.
37259 (vmlasq_m_n_s8): Remove.
37260 (vmlasq_m_n_s32): Remove.
37261 (vmlasq_m_n_s16): Remove.
37262 (vmlasq_m_n_u8): Remove.
37263 (vmlasq_m_n_u32): Remove.
37264 (vmlasq_m_n_u16): Remove.
37265 (vqdmlashq_m_n_s8): Remove.
37266 (vqdmlashq_m_n_s32): Remove.
37267 (vqdmlashq_m_n_s16): Remove.
37268 (vqdmlahq_m_n_s8): Remove.
37269 (vqdmlahq_m_n_s32): Remove.
37270 (vqdmlahq_m_n_s16): Remove.
37271 (vqrdmlahq_m_n_s8): Remove.
37272 (vqrdmlahq_m_n_s32): Remove.
37273 (vqrdmlahq_m_n_s16): Remove.
37274 (vqrdmlashq_m_n_s8): Remove.
37275 (vqrdmlashq_m_n_s32): Remove.
37276 (vqrdmlashq_m_n_s16): Remove.
37277 (__arm_vmlasq_n_u8): Remove.
37278 (__arm_vmlaq_n_u8): Remove.
37279 (__arm_vqrdmlashq_n_s8): Remove.
37280 (__arm_vqdmlashq_n_s8): Remove.
37281 (__arm_vqrdmlahq_n_s8): Remove.
37282 (__arm_vqdmlahq_n_s8): Remove.
37283 (__arm_vmlasq_n_s8): Remove.
37284 (__arm_vmlaq_n_s8): Remove.
37285 (__arm_vmlasq_n_u16): Remove.
37286 (__arm_vmlaq_n_u16): Remove.
37287 (__arm_vqrdmlashq_n_s16): Remove.
37288 (__arm_vqdmlashq_n_s16): Remove.
37289 (__arm_vqrdmlahq_n_s16): Remove.
37290 (__arm_vqdmlahq_n_s16): Remove.
37291 (__arm_vmlasq_n_s16): Remove.
37292 (__arm_vmlaq_n_s16): Remove.
37293 (__arm_vmlasq_n_u32): Remove.
37294 (__arm_vmlaq_n_u32): Remove.
37295 (__arm_vqrdmlashq_n_s32): Remove.
37296 (__arm_vqdmlashq_n_s32): Remove.
37297 (__arm_vqrdmlahq_n_s32): Remove.
37298 (__arm_vqdmlahq_n_s32): Remove.
37299 (__arm_vmlasq_n_s32): Remove.
37300 (__arm_vmlaq_n_s32): Remove.
37301 (__arm_vmlaq_m_n_s8): Remove.
37302 (__arm_vmlaq_m_n_s32): Remove.
37303 (__arm_vmlaq_m_n_s16): Remove.
37304 (__arm_vmlaq_m_n_u8): Remove.
37305 (__arm_vmlaq_m_n_u32): Remove.
37306 (__arm_vmlaq_m_n_u16): Remove.
37307 (__arm_vmlasq_m_n_s8): Remove.
37308 (__arm_vmlasq_m_n_s32): Remove.
37309 (__arm_vmlasq_m_n_s16): Remove.
37310 (__arm_vmlasq_m_n_u8): Remove.
37311 (__arm_vmlasq_m_n_u32): Remove.
37312 (__arm_vmlasq_m_n_u16): Remove.
37313 (__arm_vqdmlahq_m_n_s8): Remove.
37314 (__arm_vqdmlahq_m_n_s32): Remove.
37315 (__arm_vqdmlahq_m_n_s16): Remove.
37316 (__arm_vqrdmlahq_m_n_s8): Remove.
37317 (__arm_vqrdmlahq_m_n_s32): Remove.
37318 (__arm_vqrdmlahq_m_n_s16): Remove.
37319 (__arm_vqrdmlashq_m_n_s8): Remove.
37320 (__arm_vqrdmlashq_m_n_s32): Remove.
37321 (__arm_vqrdmlashq_m_n_s16): Remove.
37322 (__arm_vqdmlashq_m_n_s8): Remove.
37323 (__arm_vqdmlashq_m_n_s16): Remove.
37324 (__arm_vqdmlashq_m_n_s32): Remove.
37325 (__arm_vmlasq): Remove.
37326 (__arm_vmlaq): Remove.
37327 (__arm_vqrdmlashq): Remove.
37328 (__arm_vqdmlashq): Remove.
37329 (__arm_vqrdmlahq): Remove.
37330 (__arm_vqdmlahq): Remove.
37331 (__arm_vmlaq_m): Remove.
37332 (__arm_vmlasq_m): Remove.
37333 (__arm_vqdmlahq_m): Remove.
37334 (__arm_vqrdmlahq_m): Remove.
37335 (__arm_vqrdmlashq_m): Remove.
37336 (__arm_vqdmlashq_m): Remove.
37338 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37340 * config/arm/iterators.md (MVE_VMLxQ_N): New.
37341 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
37343 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
37345 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
37346 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
37347 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
37348 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
37349 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
37351 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37353 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
37354 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
37356 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37358 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
37359 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
37360 (vqrdmlsdhxq): New.
37361 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
37362 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
37363 (vqrdmlsdhxq): New.
37364 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
37365 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
37366 (vqrdmlsdhxq): New.
37367 * config/arm/arm-mve-builtins.cc
37368 (function_instance::has_inactive_argument): Handle vqrdmladhq,
37369 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
37370 vqdmlsdhq, vqdmlsdhxq.
37371 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
37372 (vqrdmlsdhq): Remove.
37373 (vqrdmladhxq): Remove.
37374 (vqrdmladhq): Remove.
37375 (vqdmlsdhxq): Remove.
37376 (vqdmlsdhq): Remove.
37377 (vqdmladhxq): Remove.
37378 (vqdmladhq): Remove.
37379 (vqdmladhq_m): Remove.
37380 (vqdmladhxq_m): Remove.
37381 (vqdmlsdhq_m): Remove.
37382 (vqdmlsdhxq_m): Remove.
37383 (vqrdmladhq_m): Remove.
37384 (vqrdmladhxq_m): Remove.
37385 (vqrdmlsdhq_m): Remove.
37386 (vqrdmlsdhxq_m): Remove.
37387 (vqrdmlsdhxq_s8): Remove.
37388 (vqrdmlsdhq_s8): Remove.
37389 (vqrdmladhxq_s8): Remove.
37390 (vqrdmladhq_s8): Remove.
37391 (vqdmlsdhxq_s8): Remove.
37392 (vqdmlsdhq_s8): Remove.
37393 (vqdmladhxq_s8): Remove.
37394 (vqdmladhq_s8): Remove.
37395 (vqrdmlsdhxq_s16): Remove.
37396 (vqrdmlsdhq_s16): Remove.
37397 (vqrdmladhxq_s16): Remove.
37398 (vqrdmladhq_s16): Remove.
37399 (vqdmlsdhxq_s16): Remove.
37400 (vqdmlsdhq_s16): Remove.
37401 (vqdmladhxq_s16): Remove.
37402 (vqdmladhq_s16): Remove.
37403 (vqrdmlsdhxq_s32): Remove.
37404 (vqrdmlsdhq_s32): Remove.
37405 (vqrdmladhxq_s32): Remove.
37406 (vqrdmladhq_s32): Remove.
37407 (vqdmlsdhxq_s32): Remove.
37408 (vqdmlsdhq_s32): Remove.
37409 (vqdmladhxq_s32): Remove.
37410 (vqdmladhq_s32): Remove.
37411 (vqdmladhq_m_s8): Remove.
37412 (vqdmladhq_m_s32): Remove.
37413 (vqdmladhq_m_s16): Remove.
37414 (vqdmladhxq_m_s8): Remove.
37415 (vqdmladhxq_m_s32): Remove.
37416 (vqdmladhxq_m_s16): Remove.
37417 (vqdmlsdhq_m_s8): Remove.
37418 (vqdmlsdhq_m_s32): Remove.
37419 (vqdmlsdhq_m_s16): Remove.
37420 (vqdmlsdhxq_m_s8): Remove.
37421 (vqdmlsdhxq_m_s32): Remove.
37422 (vqdmlsdhxq_m_s16): Remove.
37423 (vqrdmladhq_m_s8): Remove.
37424 (vqrdmladhq_m_s32): Remove.
37425 (vqrdmladhq_m_s16): Remove.
37426 (vqrdmladhxq_m_s8): Remove.
37427 (vqrdmladhxq_m_s32): Remove.
37428 (vqrdmladhxq_m_s16): Remove.
37429 (vqrdmlsdhq_m_s8): Remove.
37430 (vqrdmlsdhq_m_s32): Remove.
37431 (vqrdmlsdhq_m_s16): Remove.
37432 (vqrdmlsdhxq_m_s8): Remove.
37433 (vqrdmlsdhxq_m_s32): Remove.
37434 (vqrdmlsdhxq_m_s16): Remove.
37435 (__arm_vqrdmlsdhxq_s8): Remove.
37436 (__arm_vqrdmlsdhq_s8): Remove.
37437 (__arm_vqrdmladhxq_s8): Remove.
37438 (__arm_vqrdmladhq_s8): Remove.
37439 (__arm_vqdmlsdhxq_s8): Remove.
37440 (__arm_vqdmlsdhq_s8): Remove.
37441 (__arm_vqdmladhxq_s8): Remove.
37442 (__arm_vqdmladhq_s8): Remove.
37443 (__arm_vqrdmlsdhxq_s16): Remove.
37444 (__arm_vqrdmlsdhq_s16): Remove.
37445 (__arm_vqrdmladhxq_s16): Remove.
37446 (__arm_vqrdmladhq_s16): Remove.
37447 (__arm_vqdmlsdhxq_s16): Remove.
37448 (__arm_vqdmlsdhq_s16): Remove.
37449 (__arm_vqdmladhxq_s16): Remove.
37450 (__arm_vqdmladhq_s16): Remove.
37451 (__arm_vqrdmlsdhxq_s32): Remove.
37452 (__arm_vqrdmlsdhq_s32): Remove.
37453 (__arm_vqrdmladhxq_s32): Remove.
37454 (__arm_vqrdmladhq_s32): Remove.
37455 (__arm_vqdmlsdhxq_s32): Remove.
37456 (__arm_vqdmlsdhq_s32): Remove.
37457 (__arm_vqdmladhxq_s32): Remove.
37458 (__arm_vqdmladhq_s32): Remove.
37459 (__arm_vqdmladhq_m_s8): Remove.
37460 (__arm_vqdmladhq_m_s32): Remove.
37461 (__arm_vqdmladhq_m_s16): Remove.
37462 (__arm_vqdmladhxq_m_s8): Remove.
37463 (__arm_vqdmladhxq_m_s32): Remove.
37464 (__arm_vqdmladhxq_m_s16): Remove.
37465 (__arm_vqdmlsdhq_m_s8): Remove.
37466 (__arm_vqdmlsdhq_m_s32): Remove.
37467 (__arm_vqdmlsdhq_m_s16): Remove.
37468 (__arm_vqdmlsdhxq_m_s8): Remove.
37469 (__arm_vqdmlsdhxq_m_s32): Remove.
37470 (__arm_vqdmlsdhxq_m_s16): Remove.
37471 (__arm_vqrdmladhq_m_s8): Remove.
37472 (__arm_vqrdmladhq_m_s32): Remove.
37473 (__arm_vqrdmladhq_m_s16): Remove.
37474 (__arm_vqrdmladhxq_m_s8): Remove.
37475 (__arm_vqrdmladhxq_m_s32): Remove.
37476 (__arm_vqrdmladhxq_m_s16): Remove.
37477 (__arm_vqrdmlsdhq_m_s8): Remove.
37478 (__arm_vqrdmlsdhq_m_s32): Remove.
37479 (__arm_vqrdmlsdhq_m_s16): Remove.
37480 (__arm_vqrdmlsdhxq_m_s8): Remove.
37481 (__arm_vqrdmlsdhxq_m_s32): Remove.
37482 (__arm_vqrdmlsdhxq_m_s16): Remove.
37483 (__arm_vqrdmlsdhxq): Remove.
37484 (__arm_vqrdmlsdhq): Remove.
37485 (__arm_vqrdmladhxq): Remove.
37486 (__arm_vqrdmladhq): Remove.
37487 (__arm_vqdmlsdhxq): Remove.
37488 (__arm_vqdmlsdhq): Remove.
37489 (__arm_vqdmladhxq): Remove.
37490 (__arm_vqdmladhq): Remove.
37491 (__arm_vqdmladhq_m): Remove.
37492 (__arm_vqdmladhxq_m): Remove.
37493 (__arm_vqdmlsdhq_m): Remove.
37494 (__arm_vqdmlsdhxq_m): Remove.
37495 (__arm_vqrdmladhq_m): Remove.
37496 (__arm_vqrdmladhxq_m): Remove.
37497 (__arm_vqrdmlsdhq_m): Remove.
37498 (__arm_vqrdmlsdhxq_m): Remove.
37500 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37502 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
37503 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
37504 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
37505 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
37506 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
37507 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
37508 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
37509 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
37510 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
37511 (mve_vqdmladhq_s<mode>): Merge into ...
37512 (@mve_<mve_insn>q_<supf><mode>): ... this.
37514 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37516 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
37517 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
37519 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37521 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
37522 (vmlsldavaq, vmlsldavaxq): New.
37523 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
37524 (vmlsldavaq, vmlsldavaxq): New.
37525 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
37526 (vmlsldavaq, vmlsldavaxq): New.
37527 * config/arm/arm_mve.h (vmlaldavaq): Remove.
37528 (vmlaldavaxq): Remove.
37529 (vmlsldavaq): Remove.
37530 (vmlsldavaxq): Remove.
37531 (vmlaldavaq_p): Remove.
37532 (vmlaldavaxq_p): Remove.
37533 (vmlsldavaq_p): Remove.
37534 (vmlsldavaxq_p): Remove.
37535 (vmlaldavaq_s16): Remove.
37536 (vmlaldavaxq_s16): Remove.
37537 (vmlsldavaq_s16): Remove.
37538 (vmlsldavaxq_s16): Remove.
37539 (vmlaldavaq_u16): Remove.
37540 (vmlaldavaq_s32): Remove.
37541 (vmlaldavaxq_s32): Remove.
37542 (vmlsldavaq_s32): Remove.
37543 (vmlsldavaxq_s32): Remove.
37544 (vmlaldavaq_u32): Remove.
37545 (vmlaldavaq_p_s32): Remove.
37546 (vmlaldavaq_p_s16): Remove.
37547 (vmlaldavaq_p_u32): Remove.
37548 (vmlaldavaq_p_u16): Remove.
37549 (vmlaldavaxq_p_s32): Remove.
37550 (vmlaldavaxq_p_s16): Remove.
37551 (vmlsldavaq_p_s32): Remove.
37552 (vmlsldavaq_p_s16): Remove.
37553 (vmlsldavaxq_p_s32): Remove.
37554 (vmlsldavaxq_p_s16): Remove.
37555 (__arm_vmlaldavaq_s16): Remove.
37556 (__arm_vmlaldavaxq_s16): Remove.
37557 (__arm_vmlsldavaq_s16): Remove.
37558 (__arm_vmlsldavaxq_s16): Remove.
37559 (__arm_vmlaldavaq_u16): Remove.
37560 (__arm_vmlaldavaq_s32): Remove.
37561 (__arm_vmlaldavaxq_s32): Remove.
37562 (__arm_vmlsldavaq_s32): Remove.
37563 (__arm_vmlsldavaxq_s32): Remove.
37564 (__arm_vmlaldavaq_u32): Remove.
37565 (__arm_vmlaldavaq_p_s32): Remove.
37566 (__arm_vmlaldavaq_p_s16): Remove.
37567 (__arm_vmlaldavaq_p_u32): Remove.
37568 (__arm_vmlaldavaq_p_u16): Remove.
37569 (__arm_vmlaldavaxq_p_s32): Remove.
37570 (__arm_vmlaldavaxq_p_s16): Remove.
37571 (__arm_vmlsldavaq_p_s32): Remove.
37572 (__arm_vmlsldavaq_p_s16): Remove.
37573 (__arm_vmlsldavaxq_p_s32): Remove.
37574 (__arm_vmlsldavaxq_p_s16): Remove.
37575 (__arm_vmlaldavaq): Remove.
37576 (__arm_vmlaldavaxq): Remove.
37577 (__arm_vmlsldavaq): Remove.
37578 (__arm_vmlsldavaxq): Remove.
37579 (__arm_vmlaldavaq_p): Remove.
37580 (__arm_vmlaldavaxq_p): Remove.
37581 (__arm_vmlsldavaq_p): Remove.
37582 (__arm_vmlsldavaxq_p): Remove.
37584 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37586 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
37588 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
37589 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
37590 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
37591 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
37592 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
37593 (mve_vmlaldavaxq_s<mode>): Merge into ...
37594 (@mve_<mve_insn>q_<supf><mode>): ... this.
37595 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
37596 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
37598 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
37600 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37602 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
37603 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
37605 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37607 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
37608 (vrmlsldavhq, vrmlsldavhxq): New.
37609 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
37610 (vrmlsldavhq, vrmlsldavhxq): New.
37611 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
37612 (vrmlsldavhq, vrmlsldavhxq): New.
37613 * config/arm/arm-mve-builtins-functions.h
37614 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
37615 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
37616 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
37617 (vrmlsldavhxq): Remove.
37618 (vrmlsldavhq): Remove.
37619 (vrmlaldavhxq): Remove.
37620 (vrmlaldavhq_p): Remove.
37621 (vrmlaldavhxq_p): Remove.
37622 (vrmlsldavhq_p): Remove.
37623 (vrmlsldavhxq_p): Remove.
37624 (vrmlaldavhq_u32): Remove.
37625 (vrmlsldavhxq_s32): Remove.
37626 (vrmlsldavhq_s32): Remove.
37627 (vrmlaldavhxq_s32): Remove.
37628 (vrmlaldavhq_s32): Remove.
37629 (vrmlaldavhq_p_s32): Remove.
37630 (vrmlaldavhxq_p_s32): Remove.
37631 (vrmlsldavhq_p_s32): Remove.
37632 (vrmlsldavhxq_p_s32): Remove.
37633 (vrmlaldavhq_p_u32): Remove.
37634 (__arm_vrmlaldavhq_u32): Remove.
37635 (__arm_vrmlsldavhxq_s32): Remove.
37636 (__arm_vrmlsldavhq_s32): Remove.
37637 (__arm_vrmlaldavhxq_s32): Remove.
37638 (__arm_vrmlaldavhq_s32): Remove.
37639 (__arm_vrmlaldavhq_p_s32): Remove.
37640 (__arm_vrmlaldavhxq_p_s32): Remove.
37641 (__arm_vrmlsldavhq_p_s32): Remove.
37642 (__arm_vrmlsldavhxq_p_s32): Remove.
37643 (__arm_vrmlaldavhq_p_u32): Remove.
37644 (__arm_vrmlaldavhq): Remove.
37645 (__arm_vrmlsldavhxq): Remove.
37646 (__arm_vrmlsldavhq): Remove.
37647 (__arm_vrmlaldavhxq): Remove.
37648 (__arm_vrmlaldavhq_p): Remove.
37649 (__arm_vrmlaldavhxq_p): Remove.
37650 (__arm_vrmlsldavhq_p): Remove.
37651 (__arm_vrmlsldavhxq_p): Remove.
37653 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37655 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
37657 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
37658 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
37659 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
37660 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
37661 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
37662 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
37663 (@mve_<mve_insn>q_<supf>v4si): ... this.
37664 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
37665 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
37667 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
37669 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37671 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
37672 (vmlsldavq, vmlsldavxq): New.
37673 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
37674 (vmlsldavq, vmlsldavxq): New.
37675 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
37676 (vmlsldavq, vmlsldavxq): New.
37677 * config/arm/arm_mve.h (vmlaldavq): Remove.
37678 (vmlsldavxq): Remove.
37679 (vmlsldavq): Remove.
37680 (vmlaldavxq): Remove.
37681 (vmlaldavq_p): Remove.
37682 (vmlaldavxq_p): Remove.
37683 (vmlsldavq_p): Remove.
37684 (vmlsldavxq_p): Remove.
37685 (vmlaldavq_u16): Remove.
37686 (vmlsldavxq_s16): Remove.
37687 (vmlsldavq_s16): Remove.
37688 (vmlaldavxq_s16): Remove.
37689 (vmlaldavq_s16): Remove.
37690 (vmlaldavq_u32): Remove.
37691 (vmlsldavxq_s32): Remove.
37692 (vmlsldavq_s32): Remove.
37693 (vmlaldavxq_s32): Remove.
37694 (vmlaldavq_s32): Remove.
37695 (vmlaldavq_p_s16): Remove.
37696 (vmlaldavxq_p_s16): Remove.
37697 (vmlsldavq_p_s16): Remove.
37698 (vmlsldavxq_p_s16): Remove.
37699 (vmlaldavq_p_u16): Remove.
37700 (vmlaldavq_p_s32): Remove.
37701 (vmlaldavxq_p_s32): Remove.
37702 (vmlsldavq_p_s32): Remove.
37703 (vmlsldavxq_p_s32): Remove.
37704 (vmlaldavq_p_u32): Remove.
37705 (__arm_vmlaldavq_u16): Remove.
37706 (__arm_vmlsldavxq_s16): Remove.
37707 (__arm_vmlsldavq_s16): Remove.
37708 (__arm_vmlaldavxq_s16): Remove.
37709 (__arm_vmlaldavq_s16): Remove.
37710 (__arm_vmlaldavq_u32): Remove.
37711 (__arm_vmlsldavxq_s32): Remove.
37712 (__arm_vmlsldavq_s32): Remove.
37713 (__arm_vmlaldavxq_s32): Remove.
37714 (__arm_vmlaldavq_s32): Remove.
37715 (__arm_vmlaldavq_p_s16): Remove.
37716 (__arm_vmlaldavxq_p_s16): Remove.
37717 (__arm_vmlsldavq_p_s16): Remove.
37718 (__arm_vmlsldavxq_p_s16): Remove.
37719 (__arm_vmlaldavq_p_u16): Remove.
37720 (__arm_vmlaldavq_p_s32): Remove.
37721 (__arm_vmlaldavxq_p_s32): Remove.
37722 (__arm_vmlsldavq_p_s32): Remove.
37723 (__arm_vmlsldavxq_p_s32): Remove.
37724 (__arm_vmlaldavq_p_u32): Remove.
37725 (__arm_vmlaldavq): Remove.
37726 (__arm_vmlsldavxq): Remove.
37727 (__arm_vmlsldavq): Remove.
37728 (__arm_vmlaldavxq): Remove.
37729 (__arm_vmlaldavq_p): Remove.
37730 (__arm_vmlaldavxq_p): Remove.
37731 (__arm_vmlsldavq_p): Remove.
37732 (__arm_vmlsldavxq_p): Remove.
37734 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37736 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
37737 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
37738 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
37739 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
37740 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
37741 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
37742 (mve_vmlsldavxq_s<mode>): Merge into ...
37743 (@mve_<mve_insn>q_<supf><mode>): ... this.
37744 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
37745 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
37747 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
37749 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37751 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
37752 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
37754 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37756 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
37757 * config/arm/arm-mve-builtins-base.def (vabavq): New.
37758 * config/arm/arm-mve-builtins-base.h (vabavq): New.
37759 * config/arm/arm_mve.h (vabavq): Remove.
37760 (vabavq_p): Remove.
37761 (vabavq_s8): Remove.
37762 (vabavq_s16): Remove.
37763 (vabavq_s32): Remove.
37764 (vabavq_u8): Remove.
37765 (vabavq_u16): Remove.
37766 (vabavq_u32): Remove.
37767 (vabavq_p_s8): Remove.
37768 (vabavq_p_u8): Remove.
37769 (vabavq_p_s16): Remove.
37770 (vabavq_p_u16): Remove.
37771 (vabavq_p_s32): Remove.
37772 (vabavq_p_u32): Remove.
37773 (__arm_vabavq_s8): Remove.
37774 (__arm_vabavq_s16): Remove.
37775 (__arm_vabavq_s32): Remove.
37776 (__arm_vabavq_u8): Remove.
37777 (__arm_vabavq_u16): Remove.
37778 (__arm_vabavq_u32): Remove.
37779 (__arm_vabavq_p_s8): Remove.
37780 (__arm_vabavq_p_u8): Remove.
37781 (__arm_vabavq_p_s16): Remove.
37782 (__arm_vabavq_p_u16): Remove.
37783 (__arm_vabavq_p_s32): Remove.
37784 (__arm_vabavq_p_u32): Remove.
37785 (__arm_vabavq): Remove.
37786 (__arm_vabavq_p): Remove.
37788 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37790 * config/arm/iterators.md (mve_insn): Add vabav.
37791 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
37792 (@mve_<mve_insn>q_<supf><mode>): ... this,.
37793 (mve_vabavq_p_<supf><mode>): Rename into ...
37794 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
37796 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37798 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
37799 (vmlsdavaq, vmlsdavaxq): New.
37800 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
37801 (vmlsdavaq, vmlsdavaxq): New.
37802 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
37803 (vmlsdavaq, vmlsdavaxq): New.
37804 * config/arm/arm_mve.h (vmladavaq): Remove.
37805 (vmlsdavaxq): Remove.
37806 (vmlsdavaq): Remove.
37807 (vmladavaxq): Remove.
37808 (vmladavaq_p): Remove.
37809 (vmladavaxq_p): Remove.
37810 (vmlsdavaq_p): Remove.
37811 (vmlsdavaxq_p): Remove.
37812 (vmladavaq_u8): Remove.
37813 (vmlsdavaxq_s8): Remove.
37814 (vmlsdavaq_s8): Remove.
37815 (vmladavaxq_s8): Remove.
37816 (vmladavaq_s8): Remove.
37817 (vmladavaq_u16): Remove.
37818 (vmlsdavaxq_s16): Remove.
37819 (vmlsdavaq_s16): Remove.
37820 (vmladavaxq_s16): Remove.
37821 (vmladavaq_s16): Remove.
37822 (vmladavaq_u32): Remove.
37823 (vmlsdavaxq_s32): Remove.
37824 (vmlsdavaq_s32): Remove.
37825 (vmladavaxq_s32): Remove.
37826 (vmladavaq_s32): Remove.
37827 (vmladavaq_p_s8): Remove.
37828 (vmladavaq_p_s32): Remove.
37829 (vmladavaq_p_s16): Remove.
37830 (vmladavaq_p_u8): Remove.
37831 (vmladavaq_p_u32): Remove.
37832 (vmladavaq_p_u16): Remove.
37833 (vmladavaxq_p_s8): Remove.
37834 (vmladavaxq_p_s32): Remove.
37835 (vmladavaxq_p_s16): Remove.
37836 (vmlsdavaq_p_s8): Remove.
37837 (vmlsdavaq_p_s32): Remove.
37838 (vmlsdavaq_p_s16): Remove.
37839 (vmlsdavaxq_p_s8): Remove.
37840 (vmlsdavaxq_p_s32): Remove.
37841 (vmlsdavaxq_p_s16): Remove.
37842 (__arm_vmladavaq_u8): Remove.
37843 (__arm_vmlsdavaxq_s8): Remove.
37844 (__arm_vmlsdavaq_s8): Remove.
37845 (__arm_vmladavaxq_s8): Remove.
37846 (__arm_vmladavaq_s8): Remove.
37847 (__arm_vmladavaq_u16): Remove.
37848 (__arm_vmlsdavaxq_s16): Remove.
37849 (__arm_vmlsdavaq_s16): Remove.
37850 (__arm_vmladavaxq_s16): Remove.
37851 (__arm_vmladavaq_s16): Remove.
37852 (__arm_vmladavaq_u32): Remove.
37853 (__arm_vmlsdavaxq_s32): Remove.
37854 (__arm_vmlsdavaq_s32): Remove.
37855 (__arm_vmladavaxq_s32): Remove.
37856 (__arm_vmladavaq_s32): Remove.
37857 (__arm_vmladavaq_p_s8): Remove.
37858 (__arm_vmladavaq_p_s32): Remove.
37859 (__arm_vmladavaq_p_s16): Remove.
37860 (__arm_vmladavaq_p_u8): Remove.
37861 (__arm_vmladavaq_p_u32): Remove.
37862 (__arm_vmladavaq_p_u16): Remove.
37863 (__arm_vmladavaxq_p_s8): Remove.
37864 (__arm_vmladavaxq_p_s32): Remove.
37865 (__arm_vmladavaxq_p_s16): Remove.
37866 (__arm_vmlsdavaq_p_s8): Remove.
37867 (__arm_vmlsdavaq_p_s32): Remove.
37868 (__arm_vmlsdavaq_p_s16): Remove.
37869 (__arm_vmlsdavaxq_p_s8): Remove.
37870 (__arm_vmlsdavaxq_p_s32): Remove.
37871 (__arm_vmlsdavaxq_p_s16): Remove.
37872 (__arm_vmladavaq): Remove.
37873 (__arm_vmlsdavaxq): Remove.
37874 (__arm_vmlsdavaq): Remove.
37875 (__arm_vmladavaxq): Remove.
37876 (__arm_vmladavaq_p): Remove.
37877 (__arm_vmladavaxq_p): Remove.
37878 (__arm_vmlsdavaq_p): Remove.
37879 (__arm_vmlsdavaxq_p): Remove.
37881 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37883 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
37884 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
37886 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37888 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
37889 (vmlsdavq, vmlsdavxq): New.
37890 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
37891 (vmlsdavq, vmlsdavxq): New.
37892 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
37893 (vmlsdavq, vmlsdavxq): New.
37894 * config/arm/arm_mve.h (vmladavq): Remove.
37895 (vmlsdavxq): Remove.
37896 (vmlsdavq): Remove.
37897 (vmladavxq): Remove.
37898 (vmladavq_p): Remove.
37899 (vmlsdavxq_p): Remove.
37900 (vmlsdavq_p): Remove.
37901 (vmladavxq_p): Remove.
37902 (vmladavq_u8): Remove.
37903 (vmlsdavxq_s8): Remove.
37904 (vmlsdavq_s8): Remove.
37905 (vmladavxq_s8): Remove.
37906 (vmladavq_s8): Remove.
37907 (vmladavq_u16): Remove.
37908 (vmlsdavxq_s16): Remove.
37909 (vmlsdavq_s16): Remove.
37910 (vmladavxq_s16): Remove.
37911 (vmladavq_s16): Remove.
37912 (vmladavq_u32): Remove.
37913 (vmlsdavxq_s32): Remove.
37914 (vmlsdavq_s32): Remove.
37915 (vmladavxq_s32): Remove.
37916 (vmladavq_s32): Remove.
37917 (vmladavq_p_u8): Remove.
37918 (vmlsdavxq_p_s8): Remove.
37919 (vmlsdavq_p_s8): Remove.
37920 (vmladavxq_p_s8): Remove.
37921 (vmladavq_p_s8): Remove.
37922 (vmladavq_p_u16): Remove.
37923 (vmlsdavxq_p_s16): Remove.
37924 (vmlsdavq_p_s16): Remove.
37925 (vmladavxq_p_s16): Remove.
37926 (vmladavq_p_s16): Remove.
37927 (vmladavq_p_u32): Remove.
37928 (vmlsdavxq_p_s32): Remove.
37929 (vmlsdavq_p_s32): Remove.
37930 (vmladavxq_p_s32): Remove.
37931 (vmladavq_p_s32): Remove.
37932 (__arm_vmladavq_u8): Remove.
37933 (__arm_vmlsdavxq_s8): Remove.
37934 (__arm_vmlsdavq_s8): Remove.
37935 (__arm_vmladavxq_s8): Remove.
37936 (__arm_vmladavq_s8): Remove.
37937 (__arm_vmladavq_u16): Remove.
37938 (__arm_vmlsdavxq_s16): Remove.
37939 (__arm_vmlsdavq_s16): Remove.
37940 (__arm_vmladavxq_s16): Remove.
37941 (__arm_vmladavq_s16): Remove.
37942 (__arm_vmladavq_u32): Remove.
37943 (__arm_vmlsdavxq_s32): Remove.
37944 (__arm_vmlsdavq_s32): Remove.
37945 (__arm_vmladavxq_s32): Remove.
37946 (__arm_vmladavq_s32): Remove.
37947 (__arm_vmladavq_p_u8): Remove.
37948 (__arm_vmlsdavxq_p_s8): Remove.
37949 (__arm_vmlsdavq_p_s8): Remove.
37950 (__arm_vmladavxq_p_s8): Remove.
37951 (__arm_vmladavq_p_s8): Remove.
37952 (__arm_vmladavq_p_u16): Remove.
37953 (__arm_vmlsdavxq_p_s16): Remove.
37954 (__arm_vmlsdavq_p_s16): Remove.
37955 (__arm_vmladavxq_p_s16): Remove.
37956 (__arm_vmladavq_p_s16): Remove.
37957 (__arm_vmladavq_p_u32): Remove.
37958 (__arm_vmlsdavxq_p_s32): Remove.
37959 (__arm_vmlsdavq_p_s32): Remove.
37960 (__arm_vmladavxq_p_s32): Remove.
37961 (__arm_vmladavq_p_s32): Remove.
37962 (__arm_vmladavq): Remove.
37963 (__arm_vmlsdavxq): Remove.
37964 (__arm_vmlsdavq): Remove.
37965 (__arm_vmladavxq): Remove.
37966 (__arm_vmladavq_p): Remove.
37967 (__arm_vmlsdavxq_p): Remove.
37968 (__arm_vmlsdavq_p): Remove.
37969 (__arm_vmladavxq_p): Remove.
37971 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37973 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
37974 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
37975 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
37976 vmlsdavax, vmlsdav, vmlsdavx.
37977 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
37978 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
37979 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
37981 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
37982 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
37983 (mve_vmlsdavxq_s<mode>): Merge into ...
37984 (@mve_<mve_insn>q_<supf><mode>): ... this.
37985 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
37986 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
37988 (@mve_<mve_insn>q_<supf><mode>): ... this.
37989 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
37990 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
37991 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
37992 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
37993 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
37995 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
37997 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37999 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
38000 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
38002 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38004 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
38005 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
38006 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
38007 * config/arm/arm_mve.h (vaddlvaq): Remove.
38008 (vaddlvaq_p): Remove.
38009 (vaddlvaq_u32): Remove.
38010 (vaddlvaq_s32): Remove.
38011 (vaddlvaq_p_s32): Remove.
38012 (vaddlvaq_p_u32): Remove.
38013 (__arm_vaddlvaq_u32): Remove.
38014 (__arm_vaddlvaq_s32): Remove.
38015 (__arm_vaddlvaq_p_s32): Remove.
38016 (__arm_vaddlvaq_p_u32): Remove.
38017 (__arm_vaddlvaq): Remove.
38018 (__arm_vaddlvaq_p): Remove.
38020 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38022 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
38023 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
38025 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38027 * config/arm/iterators.md (mve_insn): Add vaddlva.
38028 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
38029 (@mve_<mve_insn>q_<supf>v4si): ... this.
38030 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
38031 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
38033 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
38036 * config/i386/i386.cc (ix86_widen_mult_cost):
38037 Handle V4HImode and V2SImode.
38039 2023-05-11 Andrew Pinski <apinski@marvell.com>
38041 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
38042 defined by a phi node with more than one uses, allow for the
38043 only uses are in that same defining statement.
38045 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
38047 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
38050 2023-05-11 Pan Li <pan2.li@intel.com>
38052 * config/riscv/vector.md: Add comments for simplifying to vmset.
38054 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
38056 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
38058 (v<optab><mode>3): Add vector shift pattern.
38059 * config/riscv/vector-iterators.md: New iterator.
38061 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
38063 * config/riscv/autovec.md: Use renamed functions.
38064 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
38065 (emit_vlmax_reg_op): To this.
38066 (emit_nonvlmax_op): Rename.
38067 (emit_len_op): To this.
38068 (emit_nonvlmax_binop): Rename.
38069 (emit_len_binop): To this.
38070 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
38071 (emit_pred_binop): Remove vlmax_p.
38072 (emit_vlmax_op): Rename.
38073 (emit_vlmax_reg_op): To this.
38074 (emit_nonvlmax_op): Rename.
38075 (emit_len_op): To this.
38076 (emit_nonvlmax_binop): Rename.
38077 (emit_len_binop): To this.
38078 (sew64_scalar_helper): Use renamed functions.
38079 (expand_tuple_move): Use renamed functions.
38080 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
38082 * config/riscv/vector.md: Use renamed functions.
38084 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
38085 Michael Collison <collison@rivosinc.com>
38087 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
38088 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
38089 * config/riscv/riscv-v.cc (emit_pred_op): New function.
38090 (set_expander_dest_and_mask): New function.
38091 (emit_pred_binop): New function.
38092 (emit_nonvlmax_binop): New function.
38094 2023-05-11 Pan Li <pan2.li@intel.com>
38096 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
38097 * gimple-loop-interchange.cc
38098 (tree_loop_interchange::map_inductions_to_loop): Ditto.
38099 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
38100 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
38101 * tree-ssa-loop-manip.cc (create_iv): Ditto.
38102 (tree_transform_and_unroll_loop): Ditto.
38103 (canonicalize_loop_ivs): Ditto.
38104 * tree-ssa-loop-manip.h (create_iv): Ditto.
38105 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
38106 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
38108 (vect_set_loop_condition_normal): Ditto.
38109 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
38110 * tree-vect-stmts.cc (vectorizable_store): Ditto.
38111 (vectorizable_load): Ditto.
38113 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38115 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
38116 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
38117 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
38118 * config/arm/arm_mve.h (vmovlbq): Remove.
38120 (vmovlbq_m): Remove.
38121 (vmovltq_m): Remove.
38122 (vmovlbq_x): Remove.
38123 (vmovltq_x): Remove.
38124 (vmovlbq_s8): Remove.
38125 (vmovlbq_s16): Remove.
38126 (vmovltq_s8): Remove.
38127 (vmovltq_s16): Remove.
38128 (vmovltq_u8): Remove.
38129 (vmovltq_u16): Remove.
38130 (vmovlbq_u8): Remove.
38131 (vmovlbq_u16): Remove.
38132 (vmovlbq_m_s8): Remove.
38133 (vmovltq_m_s8): Remove.
38134 (vmovlbq_m_u8): Remove.
38135 (vmovltq_m_u8): Remove.
38136 (vmovlbq_m_s16): Remove.
38137 (vmovltq_m_s16): Remove.
38138 (vmovlbq_m_u16): Remove.
38139 (vmovltq_m_u16): Remove.
38140 (vmovlbq_x_s8): Remove.
38141 (vmovlbq_x_s16): Remove.
38142 (vmovlbq_x_u8): Remove.
38143 (vmovlbq_x_u16): Remove.
38144 (vmovltq_x_s8): Remove.
38145 (vmovltq_x_s16): Remove.
38146 (vmovltq_x_u8): Remove.
38147 (vmovltq_x_u16): Remove.
38148 (__arm_vmovlbq_s8): Remove.
38149 (__arm_vmovlbq_s16): Remove.
38150 (__arm_vmovltq_s8): Remove.
38151 (__arm_vmovltq_s16): Remove.
38152 (__arm_vmovltq_u8): Remove.
38153 (__arm_vmovltq_u16): Remove.
38154 (__arm_vmovlbq_u8): Remove.
38155 (__arm_vmovlbq_u16): Remove.
38156 (__arm_vmovlbq_m_s8): Remove.
38157 (__arm_vmovltq_m_s8): Remove.
38158 (__arm_vmovlbq_m_u8): Remove.
38159 (__arm_vmovltq_m_u8): Remove.
38160 (__arm_vmovlbq_m_s16): Remove.
38161 (__arm_vmovltq_m_s16): Remove.
38162 (__arm_vmovlbq_m_u16): Remove.
38163 (__arm_vmovltq_m_u16): Remove.
38164 (__arm_vmovlbq_x_s8): Remove.
38165 (__arm_vmovlbq_x_s16): Remove.
38166 (__arm_vmovlbq_x_u8): Remove.
38167 (__arm_vmovlbq_x_u16): Remove.
38168 (__arm_vmovltq_x_s8): Remove.
38169 (__arm_vmovltq_x_s16): Remove.
38170 (__arm_vmovltq_x_u8): Remove.
38171 (__arm_vmovltq_x_u16): Remove.
38172 (__arm_vmovlbq): Remove.
38173 (__arm_vmovltq): Remove.
38174 (__arm_vmovlbq_m): Remove.
38175 (__arm_vmovltq_m): Remove.
38176 (__arm_vmovlbq_x): Remove.
38177 (__arm_vmovltq_x): Remove.
38179 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38181 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
38182 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
38184 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38186 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
38187 (VMOVLBQ, VMOVLTQ): Merge into ...
38188 (VMOVLxQ): ... this.
38189 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
38190 (VMOVLxQ_M): ... this.
38191 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
38192 (mve_vmovlbq_<supf><mode>): Merge into ...
38193 (@mve_<mve_insn>q_<supf><mode>): ... this.
38194 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
38196 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
38198 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38200 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
38201 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
38202 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
38203 * config/arm/arm-mve-builtins-functions.h
38204 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
38205 * config/arm/arm_mve.h (vaddlvq): Remove.
38206 (vaddlvq_p): Remove.
38207 (vaddlvq_s32): Remove.
38208 (vaddlvq_u32): Remove.
38209 (vaddlvq_p_s32): Remove.
38210 (vaddlvq_p_u32): Remove.
38211 (__arm_vaddlvq_s32): Remove.
38212 (__arm_vaddlvq_u32): Remove.
38213 (__arm_vaddlvq_p_s32): Remove.
38214 (__arm_vaddlvq_p_u32): Remove.
38215 (__arm_vaddlvq): Remove.
38216 (__arm_vaddlvq_p): Remove.
38218 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38220 * config/arm/iterators.md (mve_insn): Add vaddlv.
38221 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
38222 (@mve_<mve_insn>q_<supf>v4si): ... this.
38223 (mve_vaddlvq_p_<supf>v4si): Rename into ...
38224 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
38226 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38228 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
38229 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
38231 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38233 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
38234 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
38235 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
38236 * config/arm/arm_mve.h (vaddvaq): Remove.
38237 (vaddvaq_p): Remove.
38238 (vaddvaq_u8): Remove.
38239 (vaddvaq_s8): Remove.
38240 (vaddvaq_u16): Remove.
38241 (vaddvaq_s16): Remove.
38242 (vaddvaq_u32): Remove.
38243 (vaddvaq_s32): Remove.
38244 (vaddvaq_p_u8): Remove.
38245 (vaddvaq_p_s8): Remove.
38246 (vaddvaq_p_u16): Remove.
38247 (vaddvaq_p_s16): Remove.
38248 (vaddvaq_p_u32): Remove.
38249 (vaddvaq_p_s32): Remove.
38250 (__arm_vaddvaq_u8): Remove.
38251 (__arm_vaddvaq_s8): Remove.
38252 (__arm_vaddvaq_u16): Remove.
38253 (__arm_vaddvaq_s16): Remove.
38254 (__arm_vaddvaq_u32): Remove.
38255 (__arm_vaddvaq_s32): Remove.
38256 (__arm_vaddvaq_p_u8): Remove.
38257 (__arm_vaddvaq_p_s8): Remove.
38258 (__arm_vaddvaq_p_u16): Remove.
38259 (__arm_vaddvaq_p_s16): Remove.
38260 (__arm_vaddvaq_p_u32): Remove.
38261 (__arm_vaddvaq_p_s32): Remove.
38262 (__arm_vaddvaq): Remove.
38263 (__arm_vaddvaq_p): Remove.
38265 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38267 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
38268 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
38270 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38272 * config/arm/iterators.md (mve_insn): Add vaddva.
38273 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
38274 (@mve_<mve_insn>q_<supf><mode>): ... this.
38275 (mve_vaddvaq_p_<supf><mode>): Rename into ...
38276 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
38278 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38280 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
38281 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
38282 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
38283 * config/arm/arm_mve.h (vaddvq): Remove.
38284 (vaddvq_p): Remove.
38285 (vaddvq_s8): Remove.
38286 (vaddvq_s16): Remove.
38287 (vaddvq_s32): Remove.
38288 (vaddvq_u8): Remove.
38289 (vaddvq_u16): Remove.
38290 (vaddvq_u32): Remove.
38291 (vaddvq_p_u8): Remove.
38292 (vaddvq_p_s8): Remove.
38293 (vaddvq_p_u16): Remove.
38294 (vaddvq_p_s16): Remove.
38295 (vaddvq_p_u32): Remove.
38296 (vaddvq_p_s32): Remove.
38297 (__arm_vaddvq_s8): Remove.
38298 (__arm_vaddvq_s16): Remove.
38299 (__arm_vaddvq_s32): Remove.
38300 (__arm_vaddvq_u8): Remove.
38301 (__arm_vaddvq_u16): Remove.
38302 (__arm_vaddvq_u32): Remove.
38303 (__arm_vaddvq_p_u8): Remove.
38304 (__arm_vaddvq_p_s8): Remove.
38305 (__arm_vaddvq_p_u16): Remove.
38306 (__arm_vaddvq_p_s16): Remove.
38307 (__arm_vaddvq_p_u32): Remove.
38308 (__arm_vaddvq_p_s32): Remove.
38309 (__arm_vaddvq): Remove.
38310 (__arm_vaddvq_p): Remove.
38312 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38314 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
38315 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
38317 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38319 * config/arm/iterators.md (mve_insn): Add vaddv.
38320 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
38321 (@mve_<mve_insn>q_<supf><mode>): ... this.
38322 (mve_vaddvq_p_<supf><mode>): Rename into ...
38323 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
38324 * config/arm/vec-common.md: Use gen_mve_q instead of
38327 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38329 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
38331 * config/arm/arm-mve-builtins-base.def (vdupq): New.
38332 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
38333 * config/arm/arm_mve.h (vdupq_n): Remove.
38335 (vdupq_n_f16): Remove.
38336 (vdupq_n_f32): Remove.
38337 (vdupq_n_s8): Remove.
38338 (vdupq_n_s16): Remove.
38339 (vdupq_n_s32): Remove.
38340 (vdupq_n_u8): Remove.
38341 (vdupq_n_u16): Remove.
38342 (vdupq_n_u32): Remove.
38343 (vdupq_m_n_u8): Remove.
38344 (vdupq_m_n_s8): Remove.
38345 (vdupq_m_n_u16): Remove.
38346 (vdupq_m_n_s16): Remove.
38347 (vdupq_m_n_u32): Remove.
38348 (vdupq_m_n_s32): Remove.
38349 (vdupq_m_n_f16): Remove.
38350 (vdupq_m_n_f32): Remove.
38351 (vdupq_x_n_s8): Remove.
38352 (vdupq_x_n_s16): Remove.
38353 (vdupq_x_n_s32): Remove.
38354 (vdupq_x_n_u8): Remove.
38355 (vdupq_x_n_u16): Remove.
38356 (vdupq_x_n_u32): Remove.
38357 (vdupq_x_n_f16): Remove.
38358 (vdupq_x_n_f32): Remove.
38359 (__arm_vdupq_n_s8): Remove.
38360 (__arm_vdupq_n_s16): Remove.
38361 (__arm_vdupq_n_s32): Remove.
38362 (__arm_vdupq_n_u8): Remove.
38363 (__arm_vdupq_n_u16): Remove.
38364 (__arm_vdupq_n_u32): Remove.
38365 (__arm_vdupq_m_n_u8): Remove.
38366 (__arm_vdupq_m_n_s8): Remove.
38367 (__arm_vdupq_m_n_u16): Remove.
38368 (__arm_vdupq_m_n_s16): Remove.
38369 (__arm_vdupq_m_n_u32): Remove.
38370 (__arm_vdupq_m_n_s32): Remove.
38371 (__arm_vdupq_x_n_s8): Remove.
38372 (__arm_vdupq_x_n_s16): Remove.
38373 (__arm_vdupq_x_n_s32): Remove.
38374 (__arm_vdupq_x_n_u8): Remove.
38375 (__arm_vdupq_x_n_u16): Remove.
38376 (__arm_vdupq_x_n_u32): Remove.
38377 (__arm_vdupq_n_f16): Remove.
38378 (__arm_vdupq_n_f32): Remove.
38379 (__arm_vdupq_m_n_f16): Remove.
38380 (__arm_vdupq_m_n_f32): Remove.
38381 (__arm_vdupq_x_n_f16): Remove.
38382 (__arm_vdupq_x_n_f32): Remove.
38383 (__arm_vdupq_n): Remove.
38384 (__arm_vdupq_m): Remove.
38386 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38388 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
38389 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
38391 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38393 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
38394 (MVE_FP_N_VDUPQ_ONLY): New.
38395 (mve_insn): Add vdupq.
38396 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
38397 (@mve_<mve_insn>q_n_f<mode>): ... this.
38398 (mve_vdupq_n_<supf><mode>): Rename into ...
38399 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
38400 (mve_vdupq_m_n_<supf><mode>): Rename into ...
38401 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
38402 (mve_vdupq_m_n_f<mode>): Rename into ...
38403 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
38405 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38407 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
38409 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
38411 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
38413 * config/arm/arm_mve.h (vrev16q): Remove.
38416 (vrev64q_m): Remove.
38417 (vrev16q_m): Remove.
38418 (vrev32q_m): Remove.
38419 (vrev16q_x): Remove.
38420 (vrev32q_x): Remove.
38421 (vrev64q_x): Remove.
38422 (vrev64q_f16): Remove.
38423 (vrev64q_f32): Remove.
38424 (vrev32q_f16): Remove.
38425 (vrev16q_s8): Remove.
38426 (vrev32q_s8): Remove.
38427 (vrev32q_s16): Remove.
38428 (vrev64q_s8): Remove.
38429 (vrev64q_s16): Remove.
38430 (vrev64q_s32): Remove.
38431 (vrev64q_u8): Remove.
38432 (vrev64q_u16): Remove.
38433 (vrev64q_u32): Remove.
38434 (vrev32q_u8): Remove.
38435 (vrev32q_u16): Remove.
38436 (vrev16q_u8): Remove.
38437 (vrev64q_m_u8): Remove.
38438 (vrev64q_m_s8): Remove.
38439 (vrev64q_m_u16): Remove.
38440 (vrev64q_m_s16): Remove.
38441 (vrev64q_m_u32): Remove.
38442 (vrev64q_m_s32): Remove.
38443 (vrev16q_m_s8): Remove.
38444 (vrev32q_m_f16): Remove.
38445 (vrev16q_m_u8): Remove.
38446 (vrev32q_m_s8): Remove.
38447 (vrev64q_m_f16): Remove.
38448 (vrev32q_m_u8): Remove.
38449 (vrev32q_m_s16): Remove.
38450 (vrev64q_m_f32): Remove.
38451 (vrev32q_m_u16): Remove.
38452 (vrev16q_x_s8): Remove.
38453 (vrev16q_x_u8): Remove.
38454 (vrev32q_x_s8): Remove.
38455 (vrev32q_x_s16): Remove.
38456 (vrev32q_x_u8): Remove.
38457 (vrev32q_x_u16): Remove.
38458 (vrev64q_x_s8): Remove.
38459 (vrev64q_x_s16): Remove.
38460 (vrev64q_x_s32): Remove.
38461 (vrev64q_x_u8): Remove.
38462 (vrev64q_x_u16): Remove.
38463 (vrev64q_x_u32): Remove.
38464 (vrev32q_x_f16): Remove.
38465 (vrev64q_x_f16): Remove.
38466 (vrev64q_x_f32): Remove.
38467 (__arm_vrev16q_s8): Remove.
38468 (__arm_vrev32q_s8): Remove.
38469 (__arm_vrev32q_s16): Remove.
38470 (__arm_vrev64q_s8): Remove.
38471 (__arm_vrev64q_s16): Remove.
38472 (__arm_vrev64q_s32): Remove.
38473 (__arm_vrev64q_u8): Remove.
38474 (__arm_vrev64q_u16): Remove.
38475 (__arm_vrev64q_u32): Remove.
38476 (__arm_vrev32q_u8): Remove.
38477 (__arm_vrev32q_u16): Remove.
38478 (__arm_vrev16q_u8): Remove.
38479 (__arm_vrev64q_m_u8): Remove.
38480 (__arm_vrev64q_m_s8): Remove.
38481 (__arm_vrev64q_m_u16): Remove.
38482 (__arm_vrev64q_m_s16): Remove.
38483 (__arm_vrev64q_m_u32): Remove.
38484 (__arm_vrev64q_m_s32): Remove.
38485 (__arm_vrev16q_m_s8): Remove.
38486 (__arm_vrev16q_m_u8): Remove.
38487 (__arm_vrev32q_m_s8): Remove.
38488 (__arm_vrev32q_m_u8): Remove.
38489 (__arm_vrev32q_m_s16): Remove.
38490 (__arm_vrev32q_m_u16): Remove.
38491 (__arm_vrev16q_x_s8): Remove.
38492 (__arm_vrev16q_x_u8): Remove.
38493 (__arm_vrev32q_x_s8): Remove.
38494 (__arm_vrev32q_x_s16): Remove.
38495 (__arm_vrev32q_x_u8): Remove.
38496 (__arm_vrev32q_x_u16): Remove.
38497 (__arm_vrev64q_x_s8): Remove.
38498 (__arm_vrev64q_x_s16): Remove.
38499 (__arm_vrev64q_x_s32): Remove.
38500 (__arm_vrev64q_x_u8): Remove.
38501 (__arm_vrev64q_x_u16): Remove.
38502 (__arm_vrev64q_x_u32): Remove.
38503 (__arm_vrev64q_f16): Remove.
38504 (__arm_vrev64q_f32): Remove.
38505 (__arm_vrev32q_f16): Remove.
38506 (__arm_vrev32q_m_f16): Remove.
38507 (__arm_vrev64q_m_f16): Remove.
38508 (__arm_vrev64q_m_f32): Remove.
38509 (__arm_vrev32q_x_f16): Remove.
38510 (__arm_vrev64q_x_f16): Remove.
38511 (__arm_vrev64q_x_f32): Remove.
38512 (__arm_vrev16q): Remove.
38513 (__arm_vrev32q): Remove.
38514 (__arm_vrev64q): Remove.
38515 (__arm_vrev64q_m): Remove.
38516 (__arm_vrev16q_m): Remove.
38517 (__arm_vrev32q_m): Remove.
38518 (__arm_vrev16q_x): Remove.
38519 (__arm_vrev32q_x): Remove.
38520 (__arm_vrev64q_x): Remove.
38522 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38524 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
38525 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
38526 (MVE_FP_M_VREV32Q_ONLY): New iterators.
38527 (mve_insn): Add vrev16q, vrev32q, vrev64q.
38528 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
38529 (@mve_<mve_insn>q_f<mode>): ... this
38530 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
38531 (mve_vrev64q_<supf><mode>): Rename into ...
38532 (@mve_<mve_insn>q_<supf><mode>): ... this.
38533 (mve_vrev32q_<supf><mode>): Rename into
38534 @mve_<mve_insn>q_<supf><mode>.
38535 (mve_vrev16q_<supf>v16qi): Rename into
38536 @mve_<mve_insn>q_<supf><mode>.
38537 (mve_vrev64q_m_<supf><mode>): Rename into
38538 @mve_<mve_insn>q_m_<supf><mode>.
38539 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
38540 (mve_vrev32q_m_<supf><mode>): Rename into
38541 @mve_<mve_insn>q_m_<supf><mode>.
38542 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
38543 (mve_vrev16q_m_<supf>v16qi): Rename into
38544 @mve_<mve_insn>q_m_<supf><mode>.
38546 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38548 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
38549 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
38550 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
38551 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
38552 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
38553 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
38554 * config/arm/arm-mve-builtins-functions.h (class
38555 unspec_based_mve_function_exact_insn_vcmp): New.
38556 * config/arm/arm-mve-builtins.cc
38557 (function_instance::has_inactive_argument): Handle vcmp.
38558 * config/arm/arm_mve.h (vcmpneq): Remove.
38566 (vcmpneq_m): Remove.
38567 (vcmphiq_m): Remove.
38568 (vcmpeqq_m): Remove.
38569 (vcmpcsq_m): Remove.
38570 (vcmpcsq_m_n): Remove.
38571 (vcmpltq_m): Remove.
38572 (vcmpleq_m): Remove.
38573 (vcmpgtq_m): Remove.
38574 (vcmpgeq_m): Remove.
38575 (vcmpneq_s8): Remove.
38576 (vcmpneq_s16): Remove.
38577 (vcmpneq_s32): Remove.
38578 (vcmpneq_u8): Remove.
38579 (vcmpneq_u16): Remove.
38580 (vcmpneq_u32): Remove.
38581 (vcmpneq_n_u8): Remove.
38582 (vcmphiq_u8): Remove.
38583 (vcmphiq_n_u8): Remove.
38584 (vcmpeqq_u8): Remove.
38585 (vcmpeqq_n_u8): Remove.
38586 (vcmpcsq_u8): Remove.
38587 (vcmpcsq_n_u8): Remove.
38588 (vcmpneq_n_s8): Remove.
38589 (vcmpltq_s8): Remove.
38590 (vcmpltq_n_s8): Remove.
38591 (vcmpleq_s8): Remove.
38592 (vcmpleq_n_s8): Remove.
38593 (vcmpgtq_s8): Remove.
38594 (vcmpgtq_n_s8): Remove.
38595 (vcmpgeq_s8): Remove.
38596 (vcmpgeq_n_s8): Remove.
38597 (vcmpeqq_s8): Remove.
38598 (vcmpeqq_n_s8): Remove.
38599 (vcmpneq_n_u16): Remove.
38600 (vcmphiq_u16): Remove.
38601 (vcmphiq_n_u16): Remove.
38602 (vcmpeqq_u16): Remove.
38603 (vcmpeqq_n_u16): Remove.
38604 (vcmpcsq_u16): Remove.
38605 (vcmpcsq_n_u16): Remove.
38606 (vcmpneq_n_s16): Remove.
38607 (vcmpltq_s16): Remove.
38608 (vcmpltq_n_s16): Remove.
38609 (vcmpleq_s16): Remove.
38610 (vcmpleq_n_s16): Remove.
38611 (vcmpgtq_s16): Remove.
38612 (vcmpgtq_n_s16): Remove.
38613 (vcmpgeq_s16): Remove.
38614 (vcmpgeq_n_s16): Remove.
38615 (vcmpeqq_s16): Remove.
38616 (vcmpeqq_n_s16): Remove.
38617 (vcmpneq_n_u32): Remove.
38618 (vcmphiq_u32): Remove.
38619 (vcmphiq_n_u32): Remove.
38620 (vcmpeqq_u32): Remove.
38621 (vcmpeqq_n_u32): Remove.
38622 (vcmpcsq_u32): Remove.
38623 (vcmpcsq_n_u32): Remove.
38624 (vcmpneq_n_s32): Remove.
38625 (vcmpltq_s32): Remove.
38626 (vcmpltq_n_s32): Remove.
38627 (vcmpleq_s32): Remove.
38628 (vcmpleq_n_s32): Remove.
38629 (vcmpgtq_s32): Remove.
38630 (vcmpgtq_n_s32): Remove.
38631 (vcmpgeq_s32): Remove.
38632 (vcmpgeq_n_s32): Remove.
38633 (vcmpeqq_s32): Remove.
38634 (vcmpeqq_n_s32): Remove.
38635 (vcmpneq_n_f16): Remove.
38636 (vcmpneq_f16): Remove.
38637 (vcmpltq_n_f16): Remove.
38638 (vcmpltq_f16): Remove.
38639 (vcmpleq_n_f16): Remove.
38640 (vcmpleq_f16): Remove.
38641 (vcmpgtq_n_f16): Remove.
38642 (vcmpgtq_f16): Remove.
38643 (vcmpgeq_n_f16): Remove.
38644 (vcmpgeq_f16): Remove.
38645 (vcmpeqq_n_f16): Remove.
38646 (vcmpeqq_f16): Remove.
38647 (vcmpneq_n_f32): Remove.
38648 (vcmpneq_f32): Remove.
38649 (vcmpltq_n_f32): Remove.
38650 (vcmpltq_f32): Remove.
38651 (vcmpleq_n_f32): Remove.
38652 (vcmpleq_f32): Remove.
38653 (vcmpgtq_n_f32): Remove.
38654 (vcmpgtq_f32): Remove.
38655 (vcmpgeq_n_f32): Remove.
38656 (vcmpgeq_f32): Remove.
38657 (vcmpeqq_n_f32): Remove.
38658 (vcmpeqq_f32): Remove.
38659 (vcmpeqq_m_f16): Remove.
38660 (vcmpeqq_m_f32): Remove.
38661 (vcmpneq_m_u8): Remove.
38662 (vcmpneq_m_n_u8): Remove.
38663 (vcmphiq_m_u8): Remove.
38664 (vcmphiq_m_n_u8): Remove.
38665 (vcmpeqq_m_u8): Remove.
38666 (vcmpeqq_m_n_u8): Remove.
38667 (vcmpcsq_m_u8): Remove.
38668 (vcmpcsq_m_n_u8): Remove.
38669 (vcmpneq_m_s8): Remove.
38670 (vcmpneq_m_n_s8): Remove.
38671 (vcmpltq_m_s8): Remove.
38672 (vcmpltq_m_n_s8): Remove.
38673 (vcmpleq_m_s8): Remove.
38674 (vcmpleq_m_n_s8): Remove.
38675 (vcmpgtq_m_s8): Remove.
38676 (vcmpgtq_m_n_s8): Remove.
38677 (vcmpgeq_m_s8): Remove.
38678 (vcmpgeq_m_n_s8): Remove.
38679 (vcmpeqq_m_s8): Remove.
38680 (vcmpeqq_m_n_s8): Remove.
38681 (vcmpneq_m_u16): Remove.
38682 (vcmpneq_m_n_u16): Remove.
38683 (vcmphiq_m_u16): Remove.
38684 (vcmphiq_m_n_u16): Remove.
38685 (vcmpeqq_m_u16): Remove.
38686 (vcmpeqq_m_n_u16): Remove.
38687 (vcmpcsq_m_u16): Remove.
38688 (vcmpcsq_m_n_u16): Remove.
38689 (vcmpneq_m_s16): Remove.
38690 (vcmpneq_m_n_s16): Remove.
38691 (vcmpltq_m_s16): Remove.
38692 (vcmpltq_m_n_s16): Remove.
38693 (vcmpleq_m_s16): Remove.
38694 (vcmpleq_m_n_s16): Remove.
38695 (vcmpgtq_m_s16): Remove.
38696 (vcmpgtq_m_n_s16): Remove.
38697 (vcmpgeq_m_s16): Remove.
38698 (vcmpgeq_m_n_s16): Remove.
38699 (vcmpeqq_m_s16): Remove.
38700 (vcmpeqq_m_n_s16): Remove.
38701 (vcmpneq_m_u32): Remove.
38702 (vcmpneq_m_n_u32): Remove.
38703 (vcmphiq_m_u32): Remove.
38704 (vcmphiq_m_n_u32): Remove.
38705 (vcmpeqq_m_u32): Remove.
38706 (vcmpeqq_m_n_u32): Remove.
38707 (vcmpcsq_m_u32): Remove.
38708 (vcmpcsq_m_n_u32): Remove.
38709 (vcmpneq_m_s32): Remove.
38710 (vcmpneq_m_n_s32): Remove.
38711 (vcmpltq_m_s32): Remove.
38712 (vcmpltq_m_n_s32): Remove.
38713 (vcmpleq_m_s32): Remove.
38714 (vcmpleq_m_n_s32): Remove.
38715 (vcmpgtq_m_s32): Remove.
38716 (vcmpgtq_m_n_s32): Remove.
38717 (vcmpgeq_m_s32): Remove.
38718 (vcmpgeq_m_n_s32): Remove.
38719 (vcmpeqq_m_s32): Remove.
38720 (vcmpeqq_m_n_s32): Remove.
38721 (vcmpeqq_m_n_f16): Remove.
38722 (vcmpgeq_m_f16): Remove.
38723 (vcmpgeq_m_n_f16): Remove.
38724 (vcmpgtq_m_f16): Remove.
38725 (vcmpgtq_m_n_f16): Remove.
38726 (vcmpleq_m_f16): Remove.
38727 (vcmpleq_m_n_f16): Remove.
38728 (vcmpltq_m_f16): Remove.
38729 (vcmpltq_m_n_f16): Remove.
38730 (vcmpneq_m_f16): Remove.
38731 (vcmpneq_m_n_f16): Remove.
38732 (vcmpeqq_m_n_f32): Remove.
38733 (vcmpgeq_m_f32): Remove.
38734 (vcmpgeq_m_n_f32): Remove.
38735 (vcmpgtq_m_f32): Remove.
38736 (vcmpgtq_m_n_f32): Remove.
38737 (vcmpleq_m_f32): Remove.
38738 (vcmpleq_m_n_f32): Remove.
38739 (vcmpltq_m_f32): Remove.
38740 (vcmpltq_m_n_f32): Remove.
38741 (vcmpneq_m_f32): Remove.
38742 (vcmpneq_m_n_f32): Remove.
38743 (__arm_vcmpneq_s8): Remove.
38744 (__arm_vcmpneq_s16): Remove.
38745 (__arm_vcmpneq_s32): Remove.
38746 (__arm_vcmpneq_u8): Remove.
38747 (__arm_vcmpneq_u16): Remove.
38748 (__arm_vcmpneq_u32): Remove.
38749 (__arm_vcmpneq_n_u8): Remove.
38750 (__arm_vcmphiq_u8): Remove.
38751 (__arm_vcmphiq_n_u8): Remove.
38752 (__arm_vcmpeqq_u8): Remove.
38753 (__arm_vcmpeqq_n_u8): Remove.
38754 (__arm_vcmpcsq_u8): Remove.
38755 (__arm_vcmpcsq_n_u8): Remove.
38756 (__arm_vcmpneq_n_s8): Remove.
38757 (__arm_vcmpltq_s8): Remove.
38758 (__arm_vcmpltq_n_s8): Remove.
38759 (__arm_vcmpleq_s8): Remove.
38760 (__arm_vcmpleq_n_s8): Remove.
38761 (__arm_vcmpgtq_s8): Remove.
38762 (__arm_vcmpgtq_n_s8): Remove.
38763 (__arm_vcmpgeq_s8): Remove.
38764 (__arm_vcmpgeq_n_s8): Remove.
38765 (__arm_vcmpeqq_s8): Remove.
38766 (__arm_vcmpeqq_n_s8): Remove.
38767 (__arm_vcmpneq_n_u16): Remove.
38768 (__arm_vcmphiq_u16): Remove.
38769 (__arm_vcmphiq_n_u16): Remove.
38770 (__arm_vcmpeqq_u16): Remove.
38771 (__arm_vcmpeqq_n_u16): Remove.
38772 (__arm_vcmpcsq_u16): Remove.
38773 (__arm_vcmpcsq_n_u16): Remove.
38774 (__arm_vcmpneq_n_s16): Remove.
38775 (__arm_vcmpltq_s16): Remove.
38776 (__arm_vcmpltq_n_s16): Remove.
38777 (__arm_vcmpleq_s16): Remove.
38778 (__arm_vcmpleq_n_s16): Remove.
38779 (__arm_vcmpgtq_s16): Remove.
38780 (__arm_vcmpgtq_n_s16): Remove.
38781 (__arm_vcmpgeq_s16): Remove.
38782 (__arm_vcmpgeq_n_s16): Remove.
38783 (__arm_vcmpeqq_s16): Remove.
38784 (__arm_vcmpeqq_n_s16): Remove.
38785 (__arm_vcmpneq_n_u32): Remove.
38786 (__arm_vcmphiq_u32): Remove.
38787 (__arm_vcmphiq_n_u32): Remove.
38788 (__arm_vcmpeqq_u32): Remove.
38789 (__arm_vcmpeqq_n_u32): Remove.
38790 (__arm_vcmpcsq_u32): Remove.
38791 (__arm_vcmpcsq_n_u32): Remove.
38792 (__arm_vcmpneq_n_s32): Remove.
38793 (__arm_vcmpltq_s32): Remove.
38794 (__arm_vcmpltq_n_s32): Remove.
38795 (__arm_vcmpleq_s32): Remove.
38796 (__arm_vcmpleq_n_s32): Remove.
38797 (__arm_vcmpgtq_s32): Remove.
38798 (__arm_vcmpgtq_n_s32): Remove.
38799 (__arm_vcmpgeq_s32): Remove.
38800 (__arm_vcmpgeq_n_s32): Remove.
38801 (__arm_vcmpeqq_s32): Remove.
38802 (__arm_vcmpeqq_n_s32): Remove.
38803 (__arm_vcmpneq_m_u8): Remove.
38804 (__arm_vcmpneq_m_n_u8): Remove.
38805 (__arm_vcmphiq_m_u8): Remove.
38806 (__arm_vcmphiq_m_n_u8): Remove.
38807 (__arm_vcmpeqq_m_u8): Remove.
38808 (__arm_vcmpeqq_m_n_u8): Remove.
38809 (__arm_vcmpcsq_m_u8): Remove.
38810 (__arm_vcmpcsq_m_n_u8): Remove.
38811 (__arm_vcmpneq_m_s8): Remove.
38812 (__arm_vcmpneq_m_n_s8): Remove.
38813 (__arm_vcmpltq_m_s8): Remove.
38814 (__arm_vcmpltq_m_n_s8): Remove.
38815 (__arm_vcmpleq_m_s8): Remove.
38816 (__arm_vcmpleq_m_n_s8): Remove.
38817 (__arm_vcmpgtq_m_s8): Remove.
38818 (__arm_vcmpgtq_m_n_s8): Remove.
38819 (__arm_vcmpgeq_m_s8): Remove.
38820 (__arm_vcmpgeq_m_n_s8): Remove.
38821 (__arm_vcmpeqq_m_s8): Remove.
38822 (__arm_vcmpeqq_m_n_s8): Remove.
38823 (__arm_vcmpneq_m_u16): Remove.
38824 (__arm_vcmpneq_m_n_u16): Remove.
38825 (__arm_vcmphiq_m_u16): Remove.
38826 (__arm_vcmphiq_m_n_u16): Remove.
38827 (__arm_vcmpeqq_m_u16): Remove.
38828 (__arm_vcmpeqq_m_n_u16): Remove.
38829 (__arm_vcmpcsq_m_u16): Remove.
38830 (__arm_vcmpcsq_m_n_u16): Remove.
38831 (__arm_vcmpneq_m_s16): Remove.
38832 (__arm_vcmpneq_m_n_s16): Remove.
38833 (__arm_vcmpltq_m_s16): Remove.
38834 (__arm_vcmpltq_m_n_s16): Remove.
38835 (__arm_vcmpleq_m_s16): Remove.
38836 (__arm_vcmpleq_m_n_s16): Remove.
38837 (__arm_vcmpgtq_m_s16): Remove.
38838 (__arm_vcmpgtq_m_n_s16): Remove.
38839 (__arm_vcmpgeq_m_s16): Remove.
38840 (__arm_vcmpgeq_m_n_s16): Remove.
38841 (__arm_vcmpeqq_m_s16): Remove.
38842 (__arm_vcmpeqq_m_n_s16): Remove.
38843 (__arm_vcmpneq_m_u32): Remove.
38844 (__arm_vcmpneq_m_n_u32): Remove.
38845 (__arm_vcmphiq_m_u32): Remove.
38846 (__arm_vcmphiq_m_n_u32): Remove.
38847 (__arm_vcmpeqq_m_u32): Remove.
38848 (__arm_vcmpeqq_m_n_u32): Remove.
38849 (__arm_vcmpcsq_m_u32): Remove.
38850 (__arm_vcmpcsq_m_n_u32): Remove.
38851 (__arm_vcmpneq_m_s32): Remove.
38852 (__arm_vcmpneq_m_n_s32): Remove.
38853 (__arm_vcmpltq_m_s32): Remove.
38854 (__arm_vcmpltq_m_n_s32): Remove.
38855 (__arm_vcmpleq_m_s32): Remove.
38856 (__arm_vcmpleq_m_n_s32): Remove.
38857 (__arm_vcmpgtq_m_s32): Remove.
38858 (__arm_vcmpgtq_m_n_s32): Remove.
38859 (__arm_vcmpgeq_m_s32): Remove.
38860 (__arm_vcmpgeq_m_n_s32): Remove.
38861 (__arm_vcmpeqq_m_s32): Remove.
38862 (__arm_vcmpeqq_m_n_s32): Remove.
38863 (__arm_vcmpneq_n_f16): Remove.
38864 (__arm_vcmpneq_f16): Remove.
38865 (__arm_vcmpltq_n_f16): Remove.
38866 (__arm_vcmpltq_f16): Remove.
38867 (__arm_vcmpleq_n_f16): Remove.
38868 (__arm_vcmpleq_f16): Remove.
38869 (__arm_vcmpgtq_n_f16): Remove.
38870 (__arm_vcmpgtq_f16): Remove.
38871 (__arm_vcmpgeq_n_f16): Remove.
38872 (__arm_vcmpgeq_f16): Remove.
38873 (__arm_vcmpeqq_n_f16): Remove.
38874 (__arm_vcmpeqq_f16): Remove.
38875 (__arm_vcmpneq_n_f32): Remove.
38876 (__arm_vcmpneq_f32): Remove.
38877 (__arm_vcmpltq_n_f32): Remove.
38878 (__arm_vcmpltq_f32): Remove.
38879 (__arm_vcmpleq_n_f32): Remove.
38880 (__arm_vcmpleq_f32): Remove.
38881 (__arm_vcmpgtq_n_f32): Remove.
38882 (__arm_vcmpgtq_f32): Remove.
38883 (__arm_vcmpgeq_n_f32): Remove.
38884 (__arm_vcmpgeq_f32): Remove.
38885 (__arm_vcmpeqq_n_f32): Remove.
38886 (__arm_vcmpeqq_f32): Remove.
38887 (__arm_vcmpeqq_m_f16): Remove.
38888 (__arm_vcmpeqq_m_f32): Remove.
38889 (__arm_vcmpeqq_m_n_f16): Remove.
38890 (__arm_vcmpgeq_m_f16): Remove.
38891 (__arm_vcmpgeq_m_n_f16): Remove.
38892 (__arm_vcmpgtq_m_f16): Remove.
38893 (__arm_vcmpgtq_m_n_f16): Remove.
38894 (__arm_vcmpleq_m_f16): Remove.
38895 (__arm_vcmpleq_m_n_f16): Remove.
38896 (__arm_vcmpltq_m_f16): Remove.
38897 (__arm_vcmpltq_m_n_f16): Remove.
38898 (__arm_vcmpneq_m_f16): Remove.
38899 (__arm_vcmpneq_m_n_f16): Remove.
38900 (__arm_vcmpeqq_m_n_f32): Remove.
38901 (__arm_vcmpgeq_m_f32): Remove.
38902 (__arm_vcmpgeq_m_n_f32): Remove.
38903 (__arm_vcmpgtq_m_f32): Remove.
38904 (__arm_vcmpgtq_m_n_f32): Remove.
38905 (__arm_vcmpleq_m_f32): Remove.
38906 (__arm_vcmpleq_m_n_f32): Remove.
38907 (__arm_vcmpltq_m_f32): Remove.
38908 (__arm_vcmpltq_m_n_f32): Remove.
38909 (__arm_vcmpneq_m_f32): Remove.
38910 (__arm_vcmpneq_m_n_f32): Remove.
38911 (__arm_vcmpneq): Remove.
38912 (__arm_vcmphiq): Remove.
38913 (__arm_vcmpeqq): Remove.
38914 (__arm_vcmpcsq): Remove.
38915 (__arm_vcmpltq): Remove.
38916 (__arm_vcmpleq): Remove.
38917 (__arm_vcmpgtq): Remove.
38918 (__arm_vcmpgeq): Remove.
38919 (__arm_vcmpneq_m): Remove.
38920 (__arm_vcmphiq_m): Remove.
38921 (__arm_vcmpeqq_m): Remove.
38922 (__arm_vcmpcsq_m): Remove.
38923 (__arm_vcmpltq_m): Remove.
38924 (__arm_vcmpleq_m): Remove.
38925 (__arm_vcmpgtq_m): Remove.
38926 (__arm_vcmpgeq_m): Remove.
38928 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38930 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
38931 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
38933 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38935 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
38936 (MVE_CMP_M_N_F, mve_cmp_op1): New.
38939 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
38940 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
38941 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
38942 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
38943 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
38944 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
38945 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
38946 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
38947 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
38948 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
38950 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
38951 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
38952 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
38953 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
38954 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
38956 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
38957 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
38958 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
38959 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
38960 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
38962 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
38964 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
38965 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
38966 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
38969 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
38971 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
38972 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
38973 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
38974 Simplify parity(rotate(x,y)) as parity(x).
38976 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38978 * config/riscv/autovec.md (@vec_series<mode>): New pattern
38979 * config/riscv/riscv-protos.h (expand_vec_series): New function.
38980 * config/riscv/riscv-v.cc (emit_binop): Ditto.
38981 (emit_index_op): Ditto.
38982 (expand_vec_series): Ditto.
38983 (expand_const_vector): Add series vector handling.
38984 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
38986 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
38988 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
38989 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
38990 (*concat<mode><dwi>3_2): Likewise.
38991 (*concat<mode><dwi>3_3): Likewise.
38992 (*concat<mode><dwi>3_4): Likewise.
38993 (*concat<mode><dwi>3_5): Likewise.
38994 (*concat<mode><dwi>3_6): Likewise.
38995 (*concat<mode><dwi>3_7): Likewise.
38997 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
39000 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
39001 (<insn>v4qiv4hi2): New expander.
39002 (<insn>v2hiv2si2): Ditto.
39003 (<insn>v2qiv2si2): Ditto.
39004 (<insn>v2qiv2hi2): Ditto.
39006 2023-05-10 Jeff Law <jlaw@ventanamicro>
39008 * config/h8300/constraints.md (Q): Make this a special memory
39012 2023-05-10 Jakub Jelinek <jakub@redhat.com>
39015 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
39016 if t is void_list_node.
39018 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39020 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
39021 (aarch64_sqmovun<mode>_insn_be): Delete.
39022 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
39023 (aarch64_sqmovun<mode>): Delete expander.
39025 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39028 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
39030 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
39031 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
39032 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
39034 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39037 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
39039 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
39040 (aarch64_<sur>qadd<mode>): Rename to...
39041 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
39043 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39045 * config/aarch64/aarch64-simd.md
39046 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
39047 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
39048 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
39049 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
39051 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39054 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
39055 (aarch64_xtn<mode>_insn_be): Likewise.
39056 (trunc<mode><Vnarrowq>2): Rename to...
39057 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
39058 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
39059 (aarch64_<su>qmovn<mode>): Likewise.
39060 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
39061 (aarch64_<su>qmovn<mode>_insn_le): Delete.
39062 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
39064 2023-05-10 Li Xu <xuli1@eswincomputing.com>
39066 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
39067 intruction replace null avl with (const_int 0).
39069 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39071 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
39074 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39077 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
39078 (source_equal_p): Fix dead loop in vsetvl avl checking.
39080 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
39082 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
39083 of modeadjusted_dccr.
39085 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39087 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
39088 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
39089 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
39090 * config/arm/arm-mve-builtins.cc
39091 (function_instance::has_inactive_argument): Handle vmaxaq and
39093 * config/arm/arm_mve.h (vminaq): Remove.
39095 (vminaq_m): Remove.
39096 (vmaxaq_m): Remove.
39097 (vminaq_s8): Remove.
39098 (vmaxaq_s8): Remove.
39099 (vminaq_s16): Remove.
39100 (vmaxaq_s16): Remove.
39101 (vminaq_s32): Remove.
39102 (vmaxaq_s32): Remove.
39103 (vminaq_m_s8): Remove.
39104 (vmaxaq_m_s8): Remove.
39105 (vminaq_m_s16): Remove.
39106 (vmaxaq_m_s16): Remove.
39107 (vminaq_m_s32): Remove.
39108 (vmaxaq_m_s32): Remove.
39109 (__arm_vminaq_s8): Remove.
39110 (__arm_vmaxaq_s8): Remove.
39111 (__arm_vminaq_s16): Remove.
39112 (__arm_vmaxaq_s16): Remove.
39113 (__arm_vminaq_s32): Remove.
39114 (__arm_vmaxaq_s32): Remove.
39115 (__arm_vminaq_m_s8): Remove.
39116 (__arm_vmaxaq_m_s8): Remove.
39117 (__arm_vminaq_m_s16): Remove.
39118 (__arm_vmaxaq_m_s16): Remove.
39119 (__arm_vminaq_m_s32): Remove.
39120 (__arm_vmaxaq_m_s32): Remove.
39121 (__arm_vminaq): Remove.
39122 (__arm_vmaxaq): Remove.
39123 (__arm_vminaq_m): Remove.
39124 (__arm_vmaxaq_m): Remove.
39126 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39128 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
39130 (mve_insn): Add vmaxa, vmina.
39131 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
39132 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
39134 (@mve_<mve_insn>q_<supf><mode>): ... this.
39135 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
39136 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
39138 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39140 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
39141 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
39143 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39145 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
39146 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
39147 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
39148 * config/arm/arm-mve-builtins.cc
39149 (function_instance::has_inactive_argument): Handle vmaxnmaq and
39151 * config/arm/arm_mve.h (vminnmaq): Remove.
39152 (vmaxnmaq): Remove.
39153 (vmaxnmaq_m): Remove.
39154 (vminnmaq_m): Remove.
39155 (vminnmaq_f16): Remove.
39156 (vmaxnmaq_f16): Remove.
39157 (vminnmaq_f32): Remove.
39158 (vmaxnmaq_f32): Remove.
39159 (vmaxnmaq_m_f16): Remove.
39160 (vminnmaq_m_f16): Remove.
39161 (vmaxnmaq_m_f32): Remove.
39162 (vminnmaq_m_f32): Remove.
39163 (__arm_vminnmaq_f16): Remove.
39164 (__arm_vmaxnmaq_f16): Remove.
39165 (__arm_vminnmaq_f32): Remove.
39166 (__arm_vmaxnmaq_f32): Remove.
39167 (__arm_vmaxnmaq_m_f16): Remove.
39168 (__arm_vminnmaq_m_f16): Remove.
39169 (__arm_vmaxnmaq_m_f32): Remove.
39170 (__arm_vminnmaq_m_f32): Remove.
39171 (__arm_vminnmaq): Remove.
39172 (__arm_vmaxnmaq): Remove.
39173 (__arm_vmaxnmaq_m): Remove.
39174 (__arm_vminnmaq_m): Remove.
39176 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39178 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
39179 (MVE_VMAXNMA_VMINNMAQ_M): New.
39180 (mve_insn): Add vmaxnma, vminnma.
39181 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
39183 (@mve_<mve_insn>q_f<mode>): ... this.
39184 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
39185 (@mve_<mve_insn>q_m_f<mode>): ... this.
39187 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39189 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
39190 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
39191 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
39192 (vminnmavq, vminnmvq): New.
39193 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
39194 (vminnmavq, vminnmvq): New.
39195 * config/arm/arm_mve.h (vminnmvq): Remove.
39196 (vminnmavq): Remove.
39197 (vmaxnmvq): Remove.
39198 (vmaxnmavq): Remove.
39199 (vmaxnmavq_p): Remove.
39200 (vmaxnmvq_p): Remove.
39201 (vminnmavq_p): Remove.
39202 (vminnmvq_p): Remove.
39203 (vminnmvq_f16): Remove.
39204 (vminnmavq_f16): Remove.
39205 (vmaxnmvq_f16): Remove.
39206 (vmaxnmavq_f16): Remove.
39207 (vminnmvq_f32): Remove.
39208 (vminnmavq_f32): Remove.
39209 (vmaxnmvq_f32): Remove.
39210 (vmaxnmavq_f32): Remove.
39211 (vmaxnmavq_p_f16): Remove.
39212 (vmaxnmvq_p_f16): Remove.
39213 (vminnmavq_p_f16): Remove.
39214 (vminnmvq_p_f16): Remove.
39215 (vmaxnmavq_p_f32): Remove.
39216 (vmaxnmvq_p_f32): Remove.
39217 (vminnmavq_p_f32): Remove.
39218 (vminnmvq_p_f32): Remove.
39219 (__arm_vminnmvq_f16): Remove.
39220 (__arm_vminnmavq_f16): Remove.
39221 (__arm_vmaxnmvq_f16): Remove.
39222 (__arm_vmaxnmavq_f16): Remove.
39223 (__arm_vminnmvq_f32): Remove.
39224 (__arm_vminnmavq_f32): Remove.
39225 (__arm_vmaxnmvq_f32): Remove.
39226 (__arm_vmaxnmavq_f32): Remove.
39227 (__arm_vmaxnmavq_p_f16): Remove.
39228 (__arm_vmaxnmvq_p_f16): Remove.
39229 (__arm_vminnmavq_p_f16): Remove.
39230 (__arm_vminnmvq_p_f16): Remove.
39231 (__arm_vmaxnmavq_p_f32): Remove.
39232 (__arm_vmaxnmvq_p_f32): Remove.
39233 (__arm_vminnmavq_p_f32): Remove.
39234 (__arm_vminnmvq_p_f32): Remove.
39235 (__arm_vminnmvq): Remove.
39236 (__arm_vminnmavq): Remove.
39237 (__arm_vmaxnmvq): Remove.
39238 (__arm_vmaxnmavq): Remove.
39239 (__arm_vmaxnmavq_p): Remove.
39240 (__arm_vmaxnmvq_p): Remove.
39241 (__arm_vminnmavq_p): Remove.
39242 (__arm_vminnmvq_p): Remove.
39243 (__arm_vmaxnmavq_m): Remove.
39244 (__arm_vmaxnmvq_m): Remove.
39246 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39248 * config/arm/arm-mve-builtins-functions.h
39249 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
39251 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39253 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
39254 (MVE_VMAXNMxV_MINNMxVQ_P): New.
39255 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
39256 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
39257 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
39258 (@mve_<mve_insn>q_f<mode>): ... this.
39259 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
39260 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
39261 (@mve_<mve_insn>q_p_f<mode>): ... this.
39263 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39265 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
39266 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
39267 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
39268 * config/arm/arm_mve.h (vminnmq): Remove.
39270 (vmaxnmq_m): Remove.
39271 (vminnmq_m): Remove.
39272 (vminnmq_x): Remove.
39273 (vmaxnmq_x): Remove.
39274 (vminnmq_f16): Remove.
39275 (vmaxnmq_f16): Remove.
39276 (vminnmq_f32): Remove.
39277 (vmaxnmq_f32): Remove.
39278 (vmaxnmq_m_f32): Remove.
39279 (vmaxnmq_m_f16): Remove.
39280 (vminnmq_m_f32): Remove.
39281 (vminnmq_m_f16): Remove.
39282 (vminnmq_x_f16): Remove.
39283 (vminnmq_x_f32): Remove.
39284 (vmaxnmq_x_f16): Remove.
39285 (vmaxnmq_x_f32): Remove.
39286 (__arm_vminnmq_f16): Remove.
39287 (__arm_vmaxnmq_f16): Remove.
39288 (__arm_vminnmq_f32): Remove.
39289 (__arm_vmaxnmq_f32): Remove.
39290 (__arm_vmaxnmq_m_f32): Remove.
39291 (__arm_vmaxnmq_m_f16): Remove.
39292 (__arm_vminnmq_m_f32): Remove.
39293 (__arm_vminnmq_m_f16): Remove.
39294 (__arm_vminnmq_x_f16): Remove.
39295 (__arm_vminnmq_x_f32): Remove.
39296 (__arm_vmaxnmq_x_f16): Remove.
39297 (__arm_vmaxnmq_x_f32): Remove.
39298 (__arm_vminnmq): Remove.
39299 (__arm_vmaxnmq): Remove.
39300 (__arm_vmaxnmq_m): Remove.
39301 (__arm_vminnmq_m): Remove.
39302 (__arm_vminnmq_x): Remove.
39303 (__arm_vmaxnmq_x): Remove.
39305 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39307 * config/arm/iterators.md (MAX_MIN_F): New.
39308 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
39309 (mve_insn): Add vmaxnm, vminnm.
39310 (max_min_f_str): New.
39311 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
39313 (@mve_<max_min_f_str>q_f<mode>): ... this.
39314 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
39315 (@mve_<mve_insn>q_m_f<mode>): ... this.
39317 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39319 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
39320 (smax<mode>3): Likewise.
39322 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39324 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
39325 (FUNCTION_PRED_P_S): New.
39326 (vmaxavq, vminavq, vmaxvq, vminvq): New.
39327 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
39329 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
39331 * config/arm/arm_mve.h (vminvq): Remove.
39333 (vminvq_p): Remove.
39334 (vmaxvq_p): Remove.
39335 (vminvq_u8): Remove.
39336 (vmaxvq_u8): Remove.
39337 (vminvq_s8): Remove.
39338 (vmaxvq_s8): Remove.
39339 (vminvq_u16): Remove.
39340 (vmaxvq_u16): Remove.
39341 (vminvq_s16): Remove.
39342 (vmaxvq_s16): Remove.
39343 (vminvq_u32): Remove.
39344 (vmaxvq_u32): Remove.
39345 (vminvq_s32): Remove.
39346 (vmaxvq_s32): Remove.
39347 (vminvq_p_u8): Remove.
39348 (vmaxvq_p_u8): Remove.
39349 (vminvq_p_s8): Remove.
39350 (vmaxvq_p_s8): Remove.
39351 (vminvq_p_u16): Remove.
39352 (vmaxvq_p_u16): Remove.
39353 (vminvq_p_s16): Remove.
39354 (vmaxvq_p_s16): Remove.
39355 (vminvq_p_u32): Remove.
39356 (vmaxvq_p_u32): Remove.
39357 (vminvq_p_s32): Remove.
39358 (vmaxvq_p_s32): Remove.
39359 (__arm_vminvq_u8): Remove.
39360 (__arm_vmaxvq_u8): Remove.
39361 (__arm_vminvq_s8): Remove.
39362 (__arm_vmaxvq_s8): Remove.
39363 (__arm_vminvq_u16): Remove.
39364 (__arm_vmaxvq_u16): Remove.
39365 (__arm_vminvq_s16): Remove.
39366 (__arm_vmaxvq_s16): Remove.
39367 (__arm_vminvq_u32): Remove.
39368 (__arm_vmaxvq_u32): Remove.
39369 (__arm_vminvq_s32): Remove.
39370 (__arm_vmaxvq_s32): Remove.
39371 (__arm_vminvq_p_u8): Remove.
39372 (__arm_vmaxvq_p_u8): Remove.
39373 (__arm_vminvq_p_s8): Remove.
39374 (__arm_vmaxvq_p_s8): Remove.
39375 (__arm_vminvq_p_u16): Remove.
39376 (__arm_vmaxvq_p_u16): Remove.
39377 (__arm_vminvq_p_s16): Remove.
39378 (__arm_vmaxvq_p_s16): Remove.
39379 (__arm_vminvq_p_u32): Remove.
39380 (__arm_vmaxvq_p_u32): Remove.
39381 (__arm_vminvq_p_s32): Remove.
39382 (__arm_vmaxvq_p_s32): Remove.
39383 (__arm_vminvq): Remove.
39384 (__arm_vmaxvq): Remove.
39385 (__arm_vminvq_p): Remove.
39386 (__arm_vmaxvq_p): Remove.
39389 (vminavq_p): Remove.
39390 (vmaxavq_p): Remove.
39391 (vminavq_s8): Remove.
39392 (vmaxavq_s8): Remove.
39393 (vminavq_s16): Remove.
39394 (vmaxavq_s16): Remove.
39395 (vminavq_s32): Remove.
39396 (vmaxavq_s32): Remove.
39397 (vminavq_p_s8): Remove.
39398 (vmaxavq_p_s8): Remove.
39399 (vminavq_p_s16): Remove.
39400 (vmaxavq_p_s16): Remove.
39401 (vminavq_p_s32): Remove.
39402 (vmaxavq_p_s32): Remove.
39403 (__arm_vminavq_s8): Remove.
39404 (__arm_vmaxavq_s8): Remove.
39405 (__arm_vminavq_s16): Remove.
39406 (__arm_vmaxavq_s16): Remove.
39407 (__arm_vminavq_s32): Remove.
39408 (__arm_vmaxavq_s32): Remove.
39409 (__arm_vminavq_p_s8): Remove.
39410 (__arm_vmaxavq_p_s8): Remove.
39411 (__arm_vminavq_p_s16): Remove.
39412 (__arm_vmaxavq_p_s16): Remove.
39413 (__arm_vminavq_p_s32): Remove.
39414 (__arm_vmaxavq_p_s32): Remove.
39415 (__arm_vminavq): Remove.
39416 (__arm_vmaxavq): Remove.
39417 (__arm_vminavq_p): Remove.
39418 (__arm_vmaxavq_p): Remove.
39420 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39422 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
39423 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
39424 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
39425 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
39426 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
39427 (@mve_<mve_insn>q_<supf><mode>): ... this.
39428 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
39429 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
39430 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
39432 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39434 * config/arm/arm-mve-builtins-functions.h (class
39435 unspec_mve_function_exact_insn_pred_p): New.
39437 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39439 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
39440 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
39442 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39444 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
39445 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
39447 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
39449 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
39451 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
39452 (ADJUST_REG_ALLOC_ORDER): Likewise.
39453 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
39455 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
39456 Upa rather than Upl for unpredicated movprfx alternatives.
39458 2023-05-09 Jeff Law <jlaw@ventanamicro>
39460 * config/h8300/testcompare.md: Add peephole2 which uses a memory
39461 load to set flags, thus eliminating a compare against zero.
39463 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39465 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
39466 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
39467 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
39468 * config/arm/arm_mve.h (vshlltq): Remove.
39470 (vshllbq_m): Remove.
39471 (vshlltq_m): Remove.
39472 (vshllbq_x): Remove.
39473 (vshlltq_x): Remove.
39474 (vshlltq_n_u8): Remove.
39475 (vshllbq_n_u8): Remove.
39476 (vshlltq_n_s8): Remove.
39477 (vshllbq_n_s8): Remove.
39478 (vshlltq_n_u16): Remove.
39479 (vshllbq_n_u16): Remove.
39480 (vshlltq_n_s16): Remove.
39481 (vshllbq_n_s16): Remove.
39482 (vshllbq_m_n_s8): Remove.
39483 (vshllbq_m_n_s16): Remove.
39484 (vshllbq_m_n_u8): Remove.
39485 (vshllbq_m_n_u16): Remove.
39486 (vshlltq_m_n_s8): Remove.
39487 (vshlltq_m_n_s16): Remove.
39488 (vshlltq_m_n_u8): Remove.
39489 (vshlltq_m_n_u16): Remove.
39490 (vshllbq_x_n_s8): Remove.
39491 (vshllbq_x_n_s16): Remove.
39492 (vshllbq_x_n_u8): Remove.
39493 (vshllbq_x_n_u16): Remove.
39494 (vshlltq_x_n_s8): Remove.
39495 (vshlltq_x_n_s16): Remove.
39496 (vshlltq_x_n_u8): Remove.
39497 (vshlltq_x_n_u16): Remove.
39498 (__arm_vshlltq_n_u8): Remove.
39499 (__arm_vshllbq_n_u8): Remove.
39500 (__arm_vshlltq_n_s8): Remove.
39501 (__arm_vshllbq_n_s8): Remove.
39502 (__arm_vshlltq_n_u16): Remove.
39503 (__arm_vshllbq_n_u16): Remove.
39504 (__arm_vshlltq_n_s16): Remove.
39505 (__arm_vshllbq_n_s16): Remove.
39506 (__arm_vshllbq_m_n_s8): Remove.
39507 (__arm_vshllbq_m_n_s16): Remove.
39508 (__arm_vshllbq_m_n_u8): Remove.
39509 (__arm_vshllbq_m_n_u16): Remove.
39510 (__arm_vshlltq_m_n_s8): Remove.
39511 (__arm_vshlltq_m_n_s16): Remove.
39512 (__arm_vshlltq_m_n_u8): Remove.
39513 (__arm_vshlltq_m_n_u16): Remove.
39514 (__arm_vshllbq_x_n_s8): Remove.
39515 (__arm_vshllbq_x_n_s16): Remove.
39516 (__arm_vshllbq_x_n_u8): Remove.
39517 (__arm_vshllbq_x_n_u16): Remove.
39518 (__arm_vshlltq_x_n_s8): Remove.
39519 (__arm_vshlltq_x_n_s16): Remove.
39520 (__arm_vshlltq_x_n_u8): Remove.
39521 (__arm_vshlltq_x_n_u16): Remove.
39522 (__arm_vshlltq): Remove.
39523 (__arm_vshllbq): Remove.
39524 (__arm_vshllbq_m): Remove.
39525 (__arm_vshlltq_m): Remove.
39526 (__arm_vshllbq_x): Remove.
39527 (__arm_vshlltq_x): Remove.
39529 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39531 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
39532 (VSHLLBQ_N, VSHLLTQ_N): Remove.
39534 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
39535 (VSHLLxQ_M_N): New.
39536 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
39537 (mve_vshlltq_n_<supf><mode>): Merge into ...
39538 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
39539 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
39541 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
39543 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39545 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
39546 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
39548 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39550 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
39551 (vqmovntq, vqmovunbq, vqmovuntq): New.
39552 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
39553 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
39554 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
39555 (vqmovntq, vqmovunbq, vqmovuntq): New.
39556 * config/arm/arm-mve-builtins.cc
39557 (function_instance::has_inactive_argument): Handle vmovnbq,
39558 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
39559 * config/arm/arm_mve.h (vqmovntq): Remove.
39560 (vqmovnbq): Remove.
39561 (vqmovnbq_m): Remove.
39562 (vqmovntq_m): Remove.
39563 (vqmovntq_u16): Remove.
39564 (vqmovnbq_u16): Remove.
39565 (vqmovntq_s16): Remove.
39566 (vqmovnbq_s16): Remove.
39567 (vqmovntq_u32): Remove.
39568 (vqmovnbq_u32): Remove.
39569 (vqmovntq_s32): Remove.
39570 (vqmovnbq_s32): Remove.
39571 (vqmovnbq_m_s16): Remove.
39572 (vqmovntq_m_s16): Remove.
39573 (vqmovnbq_m_u16): Remove.
39574 (vqmovntq_m_u16): Remove.
39575 (vqmovnbq_m_s32): Remove.
39576 (vqmovntq_m_s32): Remove.
39577 (vqmovnbq_m_u32): Remove.
39578 (vqmovntq_m_u32): Remove.
39579 (__arm_vqmovntq_u16): Remove.
39580 (__arm_vqmovnbq_u16): Remove.
39581 (__arm_vqmovntq_s16): Remove.
39582 (__arm_vqmovnbq_s16): Remove.
39583 (__arm_vqmovntq_u32): Remove.
39584 (__arm_vqmovnbq_u32): Remove.
39585 (__arm_vqmovntq_s32): Remove.
39586 (__arm_vqmovnbq_s32): Remove.
39587 (__arm_vqmovnbq_m_s16): Remove.
39588 (__arm_vqmovntq_m_s16): Remove.
39589 (__arm_vqmovnbq_m_u16): Remove.
39590 (__arm_vqmovntq_m_u16): Remove.
39591 (__arm_vqmovnbq_m_s32): Remove.
39592 (__arm_vqmovntq_m_s32): Remove.
39593 (__arm_vqmovnbq_m_u32): Remove.
39594 (__arm_vqmovntq_m_u32): Remove.
39595 (__arm_vqmovntq): Remove.
39596 (__arm_vqmovnbq): Remove.
39597 (__arm_vqmovnbq_m): Remove.
39598 (__arm_vqmovntq_m): Remove.
39601 (vmovnbq_m): Remove.
39602 (vmovntq_m): Remove.
39603 (vmovntq_u16): Remove.
39604 (vmovnbq_u16): Remove.
39605 (vmovntq_s16): Remove.
39606 (vmovnbq_s16): Remove.
39607 (vmovntq_u32): Remove.
39608 (vmovnbq_u32): Remove.
39609 (vmovntq_s32): Remove.
39610 (vmovnbq_s32): Remove.
39611 (vmovnbq_m_s16): Remove.
39612 (vmovntq_m_s16): Remove.
39613 (vmovnbq_m_u16): Remove.
39614 (vmovntq_m_u16): Remove.
39615 (vmovnbq_m_s32): Remove.
39616 (vmovntq_m_s32): Remove.
39617 (vmovnbq_m_u32): Remove.
39618 (vmovntq_m_u32): Remove.
39619 (__arm_vmovntq_u16): Remove.
39620 (__arm_vmovnbq_u16): Remove.
39621 (__arm_vmovntq_s16): Remove.
39622 (__arm_vmovnbq_s16): Remove.
39623 (__arm_vmovntq_u32): Remove.
39624 (__arm_vmovnbq_u32): Remove.
39625 (__arm_vmovntq_s32): Remove.
39626 (__arm_vmovnbq_s32): Remove.
39627 (__arm_vmovnbq_m_s16): Remove.
39628 (__arm_vmovntq_m_s16): Remove.
39629 (__arm_vmovnbq_m_u16): Remove.
39630 (__arm_vmovntq_m_u16): Remove.
39631 (__arm_vmovnbq_m_s32): Remove.
39632 (__arm_vmovntq_m_s32): Remove.
39633 (__arm_vmovnbq_m_u32): Remove.
39634 (__arm_vmovntq_m_u32): Remove.
39635 (__arm_vmovntq): Remove.
39636 (__arm_vmovnbq): Remove.
39637 (__arm_vmovnbq_m): Remove.
39638 (__arm_vmovntq_m): Remove.
39639 (vqmovuntq): Remove.
39640 (vqmovunbq): Remove.
39641 (vqmovunbq_m): Remove.
39642 (vqmovuntq_m): Remove.
39643 (vqmovuntq_s16): Remove.
39644 (vqmovunbq_s16): Remove.
39645 (vqmovuntq_s32): Remove.
39646 (vqmovunbq_s32): Remove.
39647 (vqmovunbq_m_s16): Remove.
39648 (vqmovuntq_m_s16): Remove.
39649 (vqmovunbq_m_s32): Remove.
39650 (vqmovuntq_m_s32): Remove.
39651 (__arm_vqmovuntq_s16): Remove.
39652 (__arm_vqmovunbq_s16): Remove.
39653 (__arm_vqmovuntq_s32): Remove.
39654 (__arm_vqmovunbq_s32): Remove.
39655 (__arm_vqmovunbq_m_s16): Remove.
39656 (__arm_vqmovuntq_m_s16): Remove.
39657 (__arm_vqmovunbq_m_s32): Remove.
39658 (__arm_vqmovuntq_m_s32): Remove.
39659 (__arm_vqmovuntq): Remove.
39660 (__arm_vqmovunbq): Remove.
39661 (__arm_vqmovunbq_m): Remove.
39662 (__arm_vqmovuntq_m): Remove.
39664 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39666 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
39667 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
39670 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
39672 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
39673 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
39674 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
39675 (mve_vqmovuntq_s<mode>): Merge into ...
39676 (@mve_<mve_insn>q_<supf><mode>): ... this.
39677 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
39678 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
39679 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
39680 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
39682 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39684 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
39685 (binary_move_narrow_unsigned): New.
39686 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
39687 (binary_move_narrow_unsigned): New.
39689 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39691 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
39692 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
39693 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
39694 (vrndpq, vrndq, vrndxq): New.
39695 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
39696 (vrndpq, vrndq, vrndxq): New.
39697 * config/arm/arm_mve.h (vrndxq): Remove.
39703 (vrndaq_m): Remove.
39704 (vrndmq_m): Remove.
39705 (vrndnq_m): Remove.
39706 (vrndpq_m): Remove.
39708 (vrndxq_m): Remove.
39710 (vrndnq_x): Remove.
39711 (vrndmq_x): Remove.
39712 (vrndpq_x): Remove.
39713 (vrndaq_x): Remove.
39714 (vrndxq_x): Remove.
39715 (vrndxq_f16): Remove.
39716 (vrndxq_f32): Remove.
39717 (vrndq_f16): Remove.
39718 (vrndq_f32): Remove.
39719 (vrndpq_f16): Remove.
39720 (vrndpq_f32): Remove.
39721 (vrndnq_f16): Remove.
39722 (vrndnq_f32): Remove.
39723 (vrndmq_f16): Remove.
39724 (vrndmq_f32): Remove.
39725 (vrndaq_f16): Remove.
39726 (vrndaq_f32): Remove.
39727 (vrndaq_m_f16): Remove.
39728 (vrndmq_m_f16): Remove.
39729 (vrndnq_m_f16): Remove.
39730 (vrndpq_m_f16): Remove.
39731 (vrndq_m_f16): Remove.
39732 (vrndxq_m_f16): Remove.
39733 (vrndaq_m_f32): Remove.
39734 (vrndmq_m_f32): Remove.
39735 (vrndnq_m_f32): Remove.
39736 (vrndpq_m_f32): Remove.
39737 (vrndq_m_f32): Remove.
39738 (vrndxq_m_f32): Remove.
39739 (vrndq_x_f16): Remove.
39740 (vrndq_x_f32): Remove.
39741 (vrndnq_x_f16): Remove.
39742 (vrndnq_x_f32): Remove.
39743 (vrndmq_x_f16): Remove.
39744 (vrndmq_x_f32): Remove.
39745 (vrndpq_x_f16): Remove.
39746 (vrndpq_x_f32): Remove.
39747 (vrndaq_x_f16): Remove.
39748 (vrndaq_x_f32): Remove.
39749 (vrndxq_x_f16): Remove.
39750 (vrndxq_x_f32): Remove.
39751 (__arm_vrndxq_f16): Remove.
39752 (__arm_vrndxq_f32): Remove.
39753 (__arm_vrndq_f16): Remove.
39754 (__arm_vrndq_f32): Remove.
39755 (__arm_vrndpq_f16): Remove.
39756 (__arm_vrndpq_f32): Remove.
39757 (__arm_vrndnq_f16): Remove.
39758 (__arm_vrndnq_f32): Remove.
39759 (__arm_vrndmq_f16): Remove.
39760 (__arm_vrndmq_f32): Remove.
39761 (__arm_vrndaq_f16): Remove.
39762 (__arm_vrndaq_f32): Remove.
39763 (__arm_vrndaq_m_f16): Remove.
39764 (__arm_vrndmq_m_f16): Remove.
39765 (__arm_vrndnq_m_f16): Remove.
39766 (__arm_vrndpq_m_f16): Remove.
39767 (__arm_vrndq_m_f16): Remove.
39768 (__arm_vrndxq_m_f16): Remove.
39769 (__arm_vrndaq_m_f32): Remove.
39770 (__arm_vrndmq_m_f32): Remove.
39771 (__arm_vrndnq_m_f32): Remove.
39772 (__arm_vrndpq_m_f32): Remove.
39773 (__arm_vrndq_m_f32): Remove.
39774 (__arm_vrndxq_m_f32): Remove.
39775 (__arm_vrndq_x_f16): Remove.
39776 (__arm_vrndq_x_f32): Remove.
39777 (__arm_vrndnq_x_f16): Remove.
39778 (__arm_vrndnq_x_f32): Remove.
39779 (__arm_vrndmq_x_f16): Remove.
39780 (__arm_vrndmq_x_f32): Remove.
39781 (__arm_vrndpq_x_f16): Remove.
39782 (__arm_vrndpq_x_f32): Remove.
39783 (__arm_vrndaq_x_f16): Remove.
39784 (__arm_vrndaq_x_f32): Remove.
39785 (__arm_vrndxq_x_f16): Remove.
39786 (__arm_vrndxq_x_f32): Remove.
39787 (__arm_vrndxq): Remove.
39788 (__arm_vrndq): Remove.
39789 (__arm_vrndpq): Remove.
39790 (__arm_vrndnq): Remove.
39791 (__arm_vrndmq): Remove.
39792 (__arm_vrndaq): Remove.
39793 (__arm_vrndaq_m): Remove.
39794 (__arm_vrndmq_m): Remove.
39795 (__arm_vrndnq_m): Remove.
39796 (__arm_vrndpq_m): Remove.
39797 (__arm_vrndq_m): Remove.
39798 (__arm_vrndxq_m): Remove.
39799 (__arm_vrndq_x): Remove.
39800 (__arm_vrndnq_x): Remove.
39801 (__arm_vrndmq_x): Remove.
39802 (__arm_vrndpq_x): Remove.
39803 (__arm_vrndaq_x): Remove.
39804 (__arm_vrndxq_x): Remove.
39806 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39808 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
39809 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
39810 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
39811 (vclzq, vqabsq, vqnegq): New.
39812 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
39813 (vqabsq, vqnegq): New.
39814 * config/arm/arm_mve.h (vabsq): Remove.
39817 (vabsq_f16): Remove.
39818 (vabsq_f32): Remove.
39819 (vabsq_s8): Remove.
39820 (vabsq_s16): Remove.
39821 (vabsq_s32): Remove.
39822 (vabsq_m_s8): Remove.
39823 (vabsq_m_s16): Remove.
39824 (vabsq_m_s32): Remove.
39825 (vabsq_m_f16): Remove.
39826 (vabsq_m_f32): Remove.
39827 (vabsq_x_s8): Remove.
39828 (vabsq_x_s16): Remove.
39829 (vabsq_x_s32): Remove.
39830 (vabsq_x_f16): Remove.
39831 (vabsq_x_f32): Remove.
39832 (__arm_vabsq_s8): Remove.
39833 (__arm_vabsq_s16): Remove.
39834 (__arm_vabsq_s32): Remove.
39835 (__arm_vabsq_m_s8): Remove.
39836 (__arm_vabsq_m_s16): Remove.
39837 (__arm_vabsq_m_s32): Remove.
39838 (__arm_vabsq_x_s8): Remove.
39839 (__arm_vabsq_x_s16): Remove.
39840 (__arm_vabsq_x_s32): Remove.
39841 (__arm_vabsq_f16): Remove.
39842 (__arm_vabsq_f32): Remove.
39843 (__arm_vabsq_m_f16): Remove.
39844 (__arm_vabsq_m_f32): Remove.
39845 (__arm_vabsq_x_f16): Remove.
39846 (__arm_vabsq_x_f32): Remove.
39847 (__arm_vabsq): Remove.
39848 (__arm_vabsq_m): Remove.
39849 (__arm_vabsq_x): Remove.
39853 (vnegq_f16): Remove.
39854 (vnegq_f32): Remove.
39855 (vnegq_s8): Remove.
39856 (vnegq_s16): Remove.
39857 (vnegq_s32): Remove.
39858 (vnegq_m_s8): Remove.
39859 (vnegq_m_s16): Remove.
39860 (vnegq_m_s32): Remove.
39861 (vnegq_m_f16): Remove.
39862 (vnegq_m_f32): Remove.
39863 (vnegq_x_s8): Remove.
39864 (vnegq_x_s16): Remove.
39865 (vnegq_x_s32): Remove.
39866 (vnegq_x_f16): Remove.
39867 (vnegq_x_f32): Remove.
39868 (__arm_vnegq_s8): Remove.
39869 (__arm_vnegq_s16): Remove.
39870 (__arm_vnegq_s32): Remove.
39871 (__arm_vnegq_m_s8): Remove.
39872 (__arm_vnegq_m_s16): Remove.
39873 (__arm_vnegq_m_s32): Remove.
39874 (__arm_vnegq_x_s8): Remove.
39875 (__arm_vnegq_x_s16): Remove.
39876 (__arm_vnegq_x_s32): Remove.
39877 (__arm_vnegq_f16): Remove.
39878 (__arm_vnegq_f32): Remove.
39879 (__arm_vnegq_m_f16): Remove.
39880 (__arm_vnegq_m_f32): Remove.
39881 (__arm_vnegq_x_f16): Remove.
39882 (__arm_vnegq_x_f32): Remove.
39883 (__arm_vnegq): Remove.
39884 (__arm_vnegq_m): Remove.
39885 (__arm_vnegq_x): Remove.
39889 (vclsq_s8): Remove.
39890 (vclsq_s16): Remove.
39891 (vclsq_s32): Remove.
39892 (vclsq_m_s8): Remove.
39893 (vclsq_m_s16): Remove.
39894 (vclsq_m_s32): Remove.
39895 (vclsq_x_s8): Remove.
39896 (vclsq_x_s16): Remove.
39897 (vclsq_x_s32): Remove.
39898 (__arm_vclsq_s8): Remove.
39899 (__arm_vclsq_s16): Remove.
39900 (__arm_vclsq_s32): Remove.
39901 (__arm_vclsq_m_s8): Remove.
39902 (__arm_vclsq_m_s16): Remove.
39903 (__arm_vclsq_m_s32): Remove.
39904 (__arm_vclsq_x_s8): Remove.
39905 (__arm_vclsq_x_s16): Remove.
39906 (__arm_vclsq_x_s32): Remove.
39907 (__arm_vclsq): Remove.
39908 (__arm_vclsq_m): Remove.
39909 (__arm_vclsq_x): Remove.
39913 (vclzq_s8): Remove.
39914 (vclzq_s16): Remove.
39915 (vclzq_s32): Remove.
39916 (vclzq_u8): Remove.
39917 (vclzq_u16): Remove.
39918 (vclzq_u32): Remove.
39919 (vclzq_m_u8): Remove.
39920 (vclzq_m_s8): Remove.
39921 (vclzq_m_u16): Remove.
39922 (vclzq_m_s16): Remove.
39923 (vclzq_m_u32): Remove.
39924 (vclzq_m_s32): Remove.
39925 (vclzq_x_s8): Remove.
39926 (vclzq_x_s16): Remove.
39927 (vclzq_x_s32): Remove.
39928 (vclzq_x_u8): Remove.
39929 (vclzq_x_u16): Remove.
39930 (vclzq_x_u32): Remove.
39931 (__arm_vclzq_s8): Remove.
39932 (__arm_vclzq_s16): Remove.
39933 (__arm_vclzq_s32): Remove.
39934 (__arm_vclzq_u8): Remove.
39935 (__arm_vclzq_u16): Remove.
39936 (__arm_vclzq_u32): Remove.
39937 (__arm_vclzq_m_u8): Remove.
39938 (__arm_vclzq_m_s8): Remove.
39939 (__arm_vclzq_m_u16): Remove.
39940 (__arm_vclzq_m_s16): Remove.
39941 (__arm_vclzq_m_u32): Remove.
39942 (__arm_vclzq_m_s32): Remove.
39943 (__arm_vclzq_x_s8): Remove.
39944 (__arm_vclzq_x_s16): Remove.
39945 (__arm_vclzq_x_s32): Remove.
39946 (__arm_vclzq_x_u8): Remove.
39947 (__arm_vclzq_x_u16): Remove.
39948 (__arm_vclzq_x_u32): Remove.
39949 (__arm_vclzq): Remove.
39950 (__arm_vclzq_m): Remove.
39951 (__arm_vclzq_x): Remove.
39954 (vqnegq_m): Remove.
39955 (vqabsq_m): Remove.
39956 (vqabsq_s8): Remove.
39957 (vqabsq_s16): Remove.
39958 (vqabsq_s32): Remove.
39959 (vqnegq_s8): Remove.
39960 (vqnegq_s16): Remove.
39961 (vqnegq_s32): Remove.
39962 (vqnegq_m_s8): Remove.
39963 (vqabsq_m_s8): Remove.
39964 (vqnegq_m_s16): Remove.
39965 (vqabsq_m_s16): Remove.
39966 (vqnegq_m_s32): Remove.
39967 (vqabsq_m_s32): Remove.
39968 (__arm_vqabsq_s8): Remove.
39969 (__arm_vqabsq_s16): Remove.
39970 (__arm_vqabsq_s32): Remove.
39971 (__arm_vqnegq_s8): Remove.
39972 (__arm_vqnegq_s16): Remove.
39973 (__arm_vqnegq_s32): Remove.
39974 (__arm_vqnegq_m_s8): Remove.
39975 (__arm_vqabsq_m_s8): Remove.
39976 (__arm_vqnegq_m_s16): Remove.
39977 (__arm_vqabsq_m_s16): Remove.
39978 (__arm_vqnegq_m_s32): Remove.
39979 (__arm_vqabsq_m_s32): Remove.
39980 (__arm_vqabsq): Remove.
39981 (__arm_vqnegq): Remove.
39982 (__arm_vqnegq_m): Remove.
39983 (__arm_vqabsq_m): Remove.
39985 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39987 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
39988 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
39989 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
39990 vrndm, vrndn, vrndp, vrnd, vrndx.
39991 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
39992 VQABSQ_M_S, VQNEGQ_M_S.
39994 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
39995 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
39996 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
39997 (@mve_<mve_insn>q_f<mode>): ... this.
39998 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
39999 (mve_v<absneg_str>q_f<mode>): ... this.
40000 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
40001 (mve_v<absneg_str>q_s<mode>): ... this.
40002 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
40003 (@mve_<mve_insn>q_<supf><mode>): ... this.
40004 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
40005 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
40006 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
40007 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
40008 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
40009 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
40010 (mve_vrndxq_m_f<mode>): Merge into ...
40011 (@mve_<mve_insn>q_m_f<mode>): ... this.
40013 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
40015 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
40016 * config/arm/arm-mve-builtins-shapes.h (unary): New.
40018 2023-05-09 Jakub Jelinek <jakub@redhat.com>
40020 * mux-utils.h: Fix comment typo, avoides -> avoids.
40022 2023-05-09 Jakub Jelinek <jakub@redhat.com>
40024 PR tree-optimization/109778
40025 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
40026 wi::zext (x, width) rather than x if width != precision, rather
40027 than using wi::zext (right, width) after the shift.
40028 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
40029 of wi::lrotate or wi::rrotate.
40031 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
40033 * genmatch.cc (get_out_file): Make static and rename to ...
40034 (choose_output): ... this. Reimplement. Update all uses ...
40035 (decision_tree::gen): ... here and ...
40038 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
40040 * genmatch.cc (showUsage): Reimplement as ...
40041 (usage): ...this. Adjust all uses.
40042 (main): Print usage when no arguments. Add missing 'return 1'.
40044 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
40046 * genmatch.cc (header_file): Make static.
40047 (emit_func): Rename to...
40048 (fp_decl): ... this. Adjust all uses.
40049 (fp_decl_done): New function. Use it...
40050 (decision_tree::gen): ... here and...
40051 (write_predicate): ... here.
40054 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
40056 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
40059 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
40060 Uros Bizjak <ubizjak@gmail.com>
40062 * config/i386/i386.md (any_or_plus): Move definition earlier.
40063 (*insvti_highpart_1): New define_insn_and_split to overwrite
40064 (insv) the highpart of a TImode register/memory.
40066 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
40068 * auto-profile.cc (auto_profile): Check todo from early_inline
40069 to see if cleanup_tree_vfg needs to be called.
40070 (early_inline): Return todo from early_inliner.
40072 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
40074 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
40076 (pass_vsetvl::get_block_info): New.
40077 (pass_vsetvl::update_vector_info): New.
40078 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
40079 (pass_vsetvl::compute_local_backward_infos): Ditto.
40080 (pass_vsetvl::transfer_before): Ditto.
40081 (pass_vsetvl::transfer_after): Ditto.
40082 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
40083 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
40084 (pass_vsetvl::cleanup_insns): Ditto.
40085 (pass_vsetvl::compute_local_backward_infos): Use
40086 update_vector_info.
40088 2023-05-08 Jeff Law <jlaw@ventanamicro>
40090 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
40092 2023-05-08 Richard Biener <rguenther@suse.de>
40093 Michael Meissner <meissner@linux.ibm.com>
40095 PR middle-end/108623
40096 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
40097 Align bit fields > 1 bit to at least an 8-bit boundary.
40099 2023-05-08 Andrew Pinski <apinski@marvell.com>
40101 PR tree-optimization/109424
40102 PR tree-optimization/59424
40103 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
40104 (factor_out_conditional_operation): This and add support for all unary
40106 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
40107 to call factor_out_conditional_operation instead.
40109 2023-05-08 Andrew Pinski <apinski@marvell.com>
40111 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
40112 over factor_out_conditional_conversion.
40114 2023-05-08 Andrew Pinski <apinski@marvell.com>
40116 PR tree-optimization/49959
40117 PR tree-optimization/103771
40118 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
40119 Diamond shapped bb form for factor_out_conditional_conversion.
40121 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40123 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
40124 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
40125 (riscv_vector_get_mask_mode): Ditto.
40126 (get_mask_policy_no_pred): Ditto.
40127 (get_tail_policy_no_pred): Ditto.
40128 (get_mask_mode): New function.
40129 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
40130 (get_tail_policy_no_pred): Ditto.
40131 (riscv_vector_mask_mode_p): Ditto.
40132 (riscv_vector_get_mask_mode): Ditto.
40133 (get_mask_mode): New function.
40134 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
40136 (get_tail_policy_for_pred): Ditto.
40137 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
40138 (get_mask_policy_for_pred): Ditto
40139 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
40141 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
40143 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
40144 (riscv_select_multilib): New.
40145 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
40146 also handle select_by_abi.
40147 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
40148 to select_by_abi_arch_cmodel from 1.
40149 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
40150 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
40152 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
40154 * Makefile.in: (gimple-match-head.o-warn): Remove.
40155 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
40156 gimple-match-exports.cc.
40157 (gimple-match-auto.h): Only depend on s-gimple-match.
40158 (generic-match-auto.h): Likewise.
40160 2023-05-08 Andrew Pinski <apinski@marvell.com>
40162 PR tree-optimization/109691
40163 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
40165 If the removed statement can throw, have need_eh_cleanup
40166 include the bb of that statement.
40167 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
40168 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
40170 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
40171 Initialize dceworklist instead of stmts_to_remove.
40172 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
40173 Destore dceworklist instead of stmts_to_remove.
40174 (substitute_and_fold_dom_walker::before_dom_children):
40175 Set dceworklist instead of adding to stmts_to_remove.
40176 (substitute_and_fold_engine::substitute_and_fold):
40177 Call simple_dce_from_worklist instead of poping
40179 Don't update the stat on removal statements.
40181 2023-05-07 Andrew Pinski <apinski@marvell.com>
40184 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
40185 Change argument type to aarch64_feature_flags.
40186 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
40187 constructor argument type to aarch64_feature_flags.
40188 Change m_old_asm_isa_flags to be aarch64_feature_flags.
40190 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
40192 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
40193 more parallel code if can_create_pseudo_p.
40195 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
40198 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
40199 immediately before moving a multi-word register by parts.
40201 2023-05-06 Jeff Law <jlaw@ventanamicro>
40203 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
40205 2023-05-06 Michael Collison <collison@rivosinc.com>
40207 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
40208 Check that GET_MODE_NUNITS is a multiple of 2.
40210 2023-05-06 Michael Collison <collison@rivosinc.com>
40212 * config/riscv/riscv.cc
40213 (riscv_estimated_poly_value): Implement
40214 TARGET_ESTIMATED_POLY_VALUE.
40215 (riscv_preferred_simd_mode): Implement
40216 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
40217 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
40218 (riscv_empty_mask_is_expensive): Implement
40219 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
40220 (riscv_vectorize_create_costs): Implement
40221 TARGET_VECTORIZE_CREATE_COSTS.
40222 (riscv_support_vector_misalignment): Implement
40223 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
40224 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
40225 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
40226 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
40227 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
40229 2023-05-06 Jeff Law <jlaw@ventanamicro>
40231 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
40232 duplicate definition.
40234 2023-05-06 Michael Collison <collison@rivosinc.com>
40236 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
40237 (riscv_vector_preferred_simd_mode): Ditto.
40238 (get_mask_policy_no_pred): Ditto.
40239 (get_tail_policy_no_pred): Ditto.
40240 (riscv_vector_mask_mode_p): Ditto.
40241 (riscv_vector_get_mask_mode): Ditto.
40243 2023-05-06 Michael Collison <collison@rivosinc.com>
40245 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
40246 Remove static declaration to to make externally visible.
40247 (get_mask_policy_for_pred): Ditto.
40248 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
40249 New external declaration.
40250 (get_mask_policy_for_pred): Ditto.
40252 2023-05-06 Michael Collison <collison@rivosinc.com>
40254 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
40255 (riscv_vector_get_mask_mode): Ditto.
40256 (get_mask_policy_no_pred): Ditto.
40257 (get_tail_policy_no_pred): Ditto.
40259 2023-05-06 Xi Ruoyao <xry111@xry111.site>
40261 * config/loongarch/loongarch.h (struct machine_function): Add
40262 reg_is_wrapped_separately array for register wrapping
40264 * config/loongarch/loongarch.cc
40265 (loongarch_get_separate_components): New function.
40266 (loongarch_components_for_bb): Likewise.
40267 (loongarch_disqualify_components): Likewise.
40268 (loongarch_process_components): Likewise.
40269 (loongarch_emit_prologue_components): Likewise.
40270 (loongarch_emit_epilogue_components): Likewise.
40271 (loongarch_set_handled_components): Likewise.
40272 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
40273 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
40274 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
40275 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
40276 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
40277 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
40278 (loongarch_for_each_saved_reg): Skip registers that are wrapped
40281 2023-05-06 Xi Ruoyao <xry111@xry111.site>
40284 * Makefile.in (s-macro_list): Pass -nostdinc to
40287 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40289 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
40290 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
40291 (preferred_simd_mode): Ditto.
40292 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
40293 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
40294 (riscv_preferred_simd_mode): New function.
40295 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
40296 * config/riscv/vector.md: Add autovec.md.
40297 * config/riscv/autovec.md: New file.
40299 2023-05-06 Jakub Jelinek <jakub@redhat.com>
40301 * real.h (dconst_pi): Define.
40302 (dconst_e_ptr): Formatting fix.
40303 (dconst_pi_ptr): Declare.
40304 * real.cc (dconst_pi_ptr): New function.
40305 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
40306 boundaries range with range computed from sin/cos of the particular
40307 bounds if the argument range is shorter than 2*pi.
40308 (cfn_sincos::op1_range): Take bulps into account when determining
40309 which result ranges are always invalid or behave like known NAN.
40311 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
40313 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
40314 pass type to vrange_storage::equal_p.
40315 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
40316 (irange_storage::equal_p): Same.
40317 (frange_storage::equal_p): Same.
40318 * value-range-storage.h (class frange_storage): Same.
40320 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40323 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
40324 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
40326 2023-05-06 liuhongt <hongtao.liu@intel.com>
40328 * combine.cc (maybe_swap_commutative_operands): Canonicalize
40329 vec_merge when mask is constant.
40330 * doc/md.texi: Document vec_merge canonicalization.
40332 2023-05-06 Jakub Jelinek <jakub@redhat.com>
40334 * value-range.h (frange_arithmetic): Declare.
40335 * range-op-float.cc (frange_arithmetic): No longer static.
40336 * gimple-range-op.cc (frange_mpfr_arg1): New function.
40337 (cfn_sqrt::fold_range): Intersect the generic boundaries range
40338 with range computed from sqrt of the particular bounds.
40339 (cfn_sqrt::op1_range): Intersect the generic boundaries range
40340 with range computed from squared particular bounds.
40342 2023-05-06 Jakub Jelinek <jakub@redhat.com>
40344 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
40345 earlier with helper variables also renamed.
40346 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
40347 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
40348 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
40350 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
40352 * config/cris/cris.md (splitop): Add PLUS.
40353 * config/cris/cris.cc (cris_split_constant): Also handle
40354 PLUS when a split into two insns may be useful.
40356 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
40358 * config/cris/cris.md (movandsplit1): New define_peephole2.
40360 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
40362 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
40364 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
40366 * doc/md.texi (define_peephole2): Document order of scanning.
40368 2023-05-05 Pan Li <pan2.li@intel.com>
40369 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40371 * config/riscv/vector.md: Allow const as the operand of RVV
40372 indexed load/store.
40374 2023-05-05 Pan Li <pan2.li@intel.com>
40376 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
40377 consumed by simplify_rtx.
40379 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40381 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
40382 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
40383 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
40384 * config/arm/arm_mve.h (vshrq): Remove.
40386 (vrshrq_m): Remove.
40388 (vrshrq_x): Remove.
40390 (vshrq_n_s8): Remove.
40391 (vshrq_n_s16): Remove.
40392 (vshrq_n_s32): Remove.
40393 (vshrq_n_u8): Remove.
40394 (vshrq_n_u16): Remove.
40395 (vshrq_n_u32): Remove.
40396 (vrshrq_n_u8): Remove.
40397 (vrshrq_n_s8): Remove.
40398 (vrshrq_n_u16): Remove.
40399 (vrshrq_n_s16): Remove.
40400 (vrshrq_n_u32): Remove.
40401 (vrshrq_n_s32): Remove.
40402 (vrshrq_m_n_s8): Remove.
40403 (vrshrq_m_n_s32): Remove.
40404 (vrshrq_m_n_s16): Remove.
40405 (vrshrq_m_n_u8): Remove.
40406 (vrshrq_m_n_u32): Remove.
40407 (vrshrq_m_n_u16): Remove.
40408 (vshrq_m_n_s8): Remove.
40409 (vshrq_m_n_s32): Remove.
40410 (vshrq_m_n_s16): Remove.
40411 (vshrq_m_n_u8): Remove.
40412 (vshrq_m_n_u32): Remove.
40413 (vshrq_m_n_u16): Remove.
40414 (vrshrq_x_n_s8): Remove.
40415 (vrshrq_x_n_s16): Remove.
40416 (vrshrq_x_n_s32): Remove.
40417 (vrshrq_x_n_u8): Remove.
40418 (vrshrq_x_n_u16): Remove.
40419 (vrshrq_x_n_u32): Remove.
40420 (vshrq_x_n_s8): Remove.
40421 (vshrq_x_n_s16): Remove.
40422 (vshrq_x_n_s32): Remove.
40423 (vshrq_x_n_u8): Remove.
40424 (vshrq_x_n_u16): Remove.
40425 (vshrq_x_n_u32): Remove.
40426 (__arm_vshrq_n_s8): Remove.
40427 (__arm_vshrq_n_s16): Remove.
40428 (__arm_vshrq_n_s32): Remove.
40429 (__arm_vshrq_n_u8): Remove.
40430 (__arm_vshrq_n_u16): Remove.
40431 (__arm_vshrq_n_u32): Remove.
40432 (__arm_vrshrq_n_u8): Remove.
40433 (__arm_vrshrq_n_s8): Remove.
40434 (__arm_vrshrq_n_u16): Remove.
40435 (__arm_vrshrq_n_s16): Remove.
40436 (__arm_vrshrq_n_u32): Remove.
40437 (__arm_vrshrq_n_s32): Remove.
40438 (__arm_vrshrq_m_n_s8): Remove.
40439 (__arm_vrshrq_m_n_s32): Remove.
40440 (__arm_vrshrq_m_n_s16): Remove.
40441 (__arm_vrshrq_m_n_u8): Remove.
40442 (__arm_vrshrq_m_n_u32): Remove.
40443 (__arm_vrshrq_m_n_u16): Remove.
40444 (__arm_vshrq_m_n_s8): Remove.
40445 (__arm_vshrq_m_n_s32): Remove.
40446 (__arm_vshrq_m_n_s16): Remove.
40447 (__arm_vshrq_m_n_u8): Remove.
40448 (__arm_vshrq_m_n_u32): Remove.
40449 (__arm_vshrq_m_n_u16): Remove.
40450 (__arm_vrshrq_x_n_s8): Remove.
40451 (__arm_vrshrq_x_n_s16): Remove.
40452 (__arm_vrshrq_x_n_s32): Remove.
40453 (__arm_vrshrq_x_n_u8): Remove.
40454 (__arm_vrshrq_x_n_u16): Remove.
40455 (__arm_vrshrq_x_n_u32): Remove.
40456 (__arm_vshrq_x_n_s8): Remove.
40457 (__arm_vshrq_x_n_s16): Remove.
40458 (__arm_vshrq_x_n_s32): Remove.
40459 (__arm_vshrq_x_n_u8): Remove.
40460 (__arm_vshrq_x_n_u16): Remove.
40461 (__arm_vshrq_x_n_u32): Remove.
40462 (__arm_vshrq): Remove.
40463 (__arm_vrshrq): Remove.
40464 (__arm_vrshrq_m): Remove.
40465 (__arm_vshrq_m): Remove.
40466 (__arm_vrshrq_x): Remove.
40467 (__arm_vshrq_x): Remove.
40469 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40471 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
40472 (mve_insn): Add vrshr, vshr.
40473 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
40474 (mve_vrshrq_n_<supf><mode>): Merge into ...
40475 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
40476 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
40478 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
40480 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40482 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
40483 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
40485 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40487 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
40488 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
40489 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
40490 (vqrshrunbq, vqrshruntq): New.
40491 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
40492 (vqrshrunbq, vqrshruntq): New.
40493 * config/arm/arm-mve-builtins.cc
40494 (function_instance::has_inactive_argument): Handle vqshrunbq,
40495 vqshruntq, vqrshrunbq, vqrshruntq.
40496 * config/arm/arm_mve.h (vqrshrunbq): Remove.
40497 (vqrshruntq): Remove.
40498 (vqrshrunbq_m): Remove.
40499 (vqrshruntq_m): Remove.
40500 (vqrshrunbq_n_s16): Remove.
40501 (vqrshrunbq_n_s32): Remove.
40502 (vqrshruntq_n_s16): Remove.
40503 (vqrshruntq_n_s32): Remove.
40504 (vqrshrunbq_m_n_s32): Remove.
40505 (vqrshrunbq_m_n_s16): Remove.
40506 (vqrshruntq_m_n_s32): Remove.
40507 (vqrshruntq_m_n_s16): Remove.
40508 (__arm_vqrshrunbq_n_s16): Remove.
40509 (__arm_vqrshrunbq_n_s32): Remove.
40510 (__arm_vqrshruntq_n_s16): Remove.
40511 (__arm_vqrshruntq_n_s32): Remove.
40512 (__arm_vqrshrunbq_m_n_s32): Remove.
40513 (__arm_vqrshrunbq_m_n_s16): Remove.
40514 (__arm_vqrshruntq_m_n_s32): Remove.
40515 (__arm_vqrshruntq_m_n_s16): Remove.
40516 (__arm_vqrshrunbq): Remove.
40517 (__arm_vqrshruntq): Remove.
40518 (__arm_vqrshrunbq_m): Remove.
40519 (__arm_vqrshruntq_m): Remove.
40520 (vqshrunbq): Remove.
40521 (vqshruntq): Remove.
40522 (vqshrunbq_m): Remove.
40523 (vqshruntq_m): Remove.
40524 (vqshrunbq_n_s16): Remove.
40525 (vqshruntq_n_s16): Remove.
40526 (vqshrunbq_n_s32): Remove.
40527 (vqshruntq_n_s32): Remove.
40528 (vqshrunbq_m_n_s32): Remove.
40529 (vqshrunbq_m_n_s16): Remove.
40530 (vqshruntq_m_n_s32): Remove.
40531 (vqshruntq_m_n_s16): Remove.
40532 (__arm_vqshrunbq_n_s16): Remove.
40533 (__arm_vqshruntq_n_s16): Remove.
40534 (__arm_vqshrunbq_n_s32): Remove.
40535 (__arm_vqshruntq_n_s32): Remove.
40536 (__arm_vqshrunbq_m_n_s32): Remove.
40537 (__arm_vqshrunbq_m_n_s16): Remove.
40538 (__arm_vqshruntq_m_n_s32): Remove.
40539 (__arm_vqshruntq_m_n_s16): Remove.
40540 (__arm_vqshrunbq): Remove.
40541 (__arm_vqshruntq): Remove.
40542 (__arm_vqshrunbq_m): Remove.
40543 (__arm_vqshruntq_m): Remove.
40545 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40547 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
40548 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
40549 (MVE_SHRN_M_N): Likewise.
40550 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
40551 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
40553 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
40554 (mve_vqrshruntq_n_s<mode>): Remove.
40555 (mve_vqshrunbq_n_s<mode>): Remove.
40556 (mve_vqshruntq_n_s<mode>): Remove.
40557 (mve_vqrshrunbq_m_n_s<mode>): Remove.
40558 (mve_vqrshruntq_m_n_s<mode>): Remove.
40559 (mve_vqshrunbq_m_n_s<mode>): Remove.
40560 (mve_vqshruntq_m_n_s<mode>): Remove.
40562 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40564 * config/arm/arm-mve-builtins-shapes.cc
40565 (binary_rshift_narrow_unsigned): New.
40566 * config/arm/arm-mve-builtins-shapes.h
40567 (binary_rshift_narrow_unsigned): New.
40569 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40571 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
40572 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
40573 (vqrshrnbq, vqrshrntq): New.
40574 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
40575 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
40577 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
40578 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
40579 * config/arm/arm-mve-builtins.cc
40580 (function_instance::has_inactive_argument): Handle vshrnbq,
40581 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
40583 * config/arm/arm_mve.h (vshrnbq): Remove.
40585 (vshrnbq_m): Remove.
40586 (vshrntq_m): Remove.
40587 (vshrnbq_n_s16): Remove.
40588 (vshrntq_n_s16): Remove.
40589 (vshrnbq_n_u16): Remove.
40590 (vshrntq_n_u16): Remove.
40591 (vshrnbq_n_s32): Remove.
40592 (vshrntq_n_s32): Remove.
40593 (vshrnbq_n_u32): Remove.
40594 (vshrntq_n_u32): Remove.
40595 (vshrnbq_m_n_s32): Remove.
40596 (vshrnbq_m_n_s16): Remove.
40597 (vshrnbq_m_n_u32): Remove.
40598 (vshrnbq_m_n_u16): Remove.
40599 (vshrntq_m_n_s32): Remove.
40600 (vshrntq_m_n_s16): Remove.
40601 (vshrntq_m_n_u32): Remove.
40602 (vshrntq_m_n_u16): Remove.
40603 (__arm_vshrnbq_n_s16): Remove.
40604 (__arm_vshrntq_n_s16): Remove.
40605 (__arm_vshrnbq_n_u16): Remove.
40606 (__arm_vshrntq_n_u16): Remove.
40607 (__arm_vshrnbq_n_s32): Remove.
40608 (__arm_vshrntq_n_s32): Remove.
40609 (__arm_vshrnbq_n_u32): Remove.
40610 (__arm_vshrntq_n_u32): Remove.
40611 (__arm_vshrnbq_m_n_s32): Remove.
40612 (__arm_vshrnbq_m_n_s16): Remove.
40613 (__arm_vshrnbq_m_n_u32): Remove.
40614 (__arm_vshrnbq_m_n_u16): Remove.
40615 (__arm_vshrntq_m_n_s32): Remove.
40616 (__arm_vshrntq_m_n_s16): Remove.
40617 (__arm_vshrntq_m_n_u32): Remove.
40618 (__arm_vshrntq_m_n_u16): Remove.
40619 (__arm_vshrnbq): Remove.
40620 (__arm_vshrntq): Remove.
40621 (__arm_vshrnbq_m): Remove.
40622 (__arm_vshrntq_m): Remove.
40623 (vrshrnbq): Remove.
40624 (vrshrntq): Remove.
40625 (vrshrnbq_m): Remove.
40626 (vrshrntq_m): Remove.
40627 (vrshrnbq_n_s16): Remove.
40628 (vrshrntq_n_s16): Remove.
40629 (vrshrnbq_n_u16): Remove.
40630 (vrshrntq_n_u16): Remove.
40631 (vrshrnbq_n_s32): Remove.
40632 (vrshrntq_n_s32): Remove.
40633 (vrshrnbq_n_u32): Remove.
40634 (vrshrntq_n_u32): Remove.
40635 (vrshrnbq_m_n_s32): Remove.
40636 (vrshrnbq_m_n_s16): Remove.
40637 (vrshrnbq_m_n_u32): Remove.
40638 (vrshrnbq_m_n_u16): Remove.
40639 (vrshrntq_m_n_s32): Remove.
40640 (vrshrntq_m_n_s16): Remove.
40641 (vrshrntq_m_n_u32): Remove.
40642 (vrshrntq_m_n_u16): Remove.
40643 (__arm_vrshrnbq_n_s16): Remove.
40644 (__arm_vrshrntq_n_s16): Remove.
40645 (__arm_vrshrnbq_n_u16): Remove.
40646 (__arm_vrshrntq_n_u16): Remove.
40647 (__arm_vrshrnbq_n_s32): Remove.
40648 (__arm_vrshrntq_n_s32): Remove.
40649 (__arm_vrshrnbq_n_u32): Remove.
40650 (__arm_vrshrntq_n_u32): Remove.
40651 (__arm_vrshrnbq_m_n_s32): Remove.
40652 (__arm_vrshrnbq_m_n_s16): Remove.
40653 (__arm_vrshrnbq_m_n_u32): Remove.
40654 (__arm_vrshrnbq_m_n_u16): Remove.
40655 (__arm_vrshrntq_m_n_s32): Remove.
40656 (__arm_vrshrntq_m_n_s16): Remove.
40657 (__arm_vrshrntq_m_n_u32): Remove.
40658 (__arm_vrshrntq_m_n_u16): Remove.
40659 (__arm_vrshrnbq): Remove.
40660 (__arm_vrshrntq): Remove.
40661 (__arm_vrshrnbq_m): Remove.
40662 (__arm_vrshrntq_m): Remove.
40663 (vqshrnbq): Remove.
40664 (vqshrntq): Remove.
40665 (vqshrnbq_m): Remove.
40666 (vqshrntq_m): Remove.
40667 (vqshrnbq_n_s16): Remove.
40668 (vqshrntq_n_s16): Remove.
40669 (vqshrnbq_n_u16): Remove.
40670 (vqshrntq_n_u16): Remove.
40671 (vqshrnbq_n_s32): Remove.
40672 (vqshrntq_n_s32): Remove.
40673 (vqshrnbq_n_u32): Remove.
40674 (vqshrntq_n_u32): Remove.
40675 (vqshrnbq_m_n_s32): Remove.
40676 (vqshrnbq_m_n_s16): Remove.
40677 (vqshrnbq_m_n_u32): Remove.
40678 (vqshrnbq_m_n_u16): Remove.
40679 (vqshrntq_m_n_s32): Remove.
40680 (vqshrntq_m_n_s16): Remove.
40681 (vqshrntq_m_n_u32): Remove.
40682 (vqshrntq_m_n_u16): Remove.
40683 (__arm_vqshrnbq_n_s16): Remove.
40684 (__arm_vqshrntq_n_s16): Remove.
40685 (__arm_vqshrnbq_n_u16): Remove.
40686 (__arm_vqshrntq_n_u16): Remove.
40687 (__arm_vqshrnbq_n_s32): Remove.
40688 (__arm_vqshrntq_n_s32): Remove.
40689 (__arm_vqshrnbq_n_u32): Remove.
40690 (__arm_vqshrntq_n_u32): Remove.
40691 (__arm_vqshrnbq_m_n_s32): Remove.
40692 (__arm_vqshrnbq_m_n_s16): Remove.
40693 (__arm_vqshrnbq_m_n_u32): Remove.
40694 (__arm_vqshrnbq_m_n_u16): Remove.
40695 (__arm_vqshrntq_m_n_s32): Remove.
40696 (__arm_vqshrntq_m_n_s16): Remove.
40697 (__arm_vqshrntq_m_n_u32): Remove.
40698 (__arm_vqshrntq_m_n_u16): Remove.
40699 (__arm_vqshrnbq): Remove.
40700 (__arm_vqshrntq): Remove.
40701 (__arm_vqshrnbq_m): Remove.
40702 (__arm_vqshrntq_m): Remove.
40703 (vqrshrnbq): Remove.
40704 (vqrshrntq): Remove.
40705 (vqrshrnbq_m): Remove.
40706 (vqrshrntq_m): Remove.
40707 (vqrshrnbq_n_s16): Remove.
40708 (vqrshrnbq_n_u16): Remove.
40709 (vqrshrnbq_n_s32): Remove.
40710 (vqrshrnbq_n_u32): Remove.
40711 (vqrshrntq_n_s16): Remove.
40712 (vqrshrntq_n_u16): Remove.
40713 (vqrshrntq_n_s32): Remove.
40714 (vqrshrntq_n_u32): Remove.
40715 (vqrshrnbq_m_n_s32): Remove.
40716 (vqrshrnbq_m_n_s16): Remove.
40717 (vqrshrnbq_m_n_u32): Remove.
40718 (vqrshrnbq_m_n_u16): Remove.
40719 (vqrshrntq_m_n_s32): Remove.
40720 (vqrshrntq_m_n_s16): Remove.
40721 (vqrshrntq_m_n_u32): Remove.
40722 (vqrshrntq_m_n_u16): Remove.
40723 (__arm_vqrshrnbq_n_s16): Remove.
40724 (__arm_vqrshrnbq_n_u16): Remove.
40725 (__arm_vqrshrnbq_n_s32): Remove.
40726 (__arm_vqrshrnbq_n_u32): Remove.
40727 (__arm_vqrshrntq_n_s16): Remove.
40728 (__arm_vqrshrntq_n_u16): Remove.
40729 (__arm_vqrshrntq_n_s32): Remove.
40730 (__arm_vqrshrntq_n_u32): Remove.
40731 (__arm_vqrshrnbq_m_n_s32): Remove.
40732 (__arm_vqrshrnbq_m_n_s16): Remove.
40733 (__arm_vqrshrnbq_m_n_u32): Remove.
40734 (__arm_vqrshrnbq_m_n_u16): Remove.
40735 (__arm_vqrshrntq_m_n_s32): Remove.
40736 (__arm_vqrshrntq_m_n_s16): Remove.
40737 (__arm_vqrshrntq_m_n_u32): Remove.
40738 (__arm_vqrshrntq_m_n_u16): Remove.
40739 (__arm_vqrshrnbq): Remove.
40740 (__arm_vqrshrntq): Remove.
40741 (__arm_vqrshrnbq_m): Remove.
40742 (__arm_vqrshrntq_m): Remove.
40744 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40746 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
40747 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
40748 vrshrnt, vshrnb, vshrnt.
40750 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
40751 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
40752 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
40753 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
40754 (mve_vshrntq_n_<supf><mode>): Merge into ...
40755 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
40756 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
40757 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
40758 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
40759 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
40761 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
40763 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40765 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
40767 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
40769 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40771 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
40772 (vmaxq, vminq): New.
40773 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
40774 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
40775 * config/arm/arm_mve.h (vminq): Remove.
40781 (vminq_u8): Remove.
40782 (vmaxq_u8): Remove.
40783 (vminq_s8): Remove.
40784 (vmaxq_s8): Remove.
40785 (vminq_u16): Remove.
40786 (vmaxq_u16): Remove.
40787 (vminq_s16): Remove.
40788 (vmaxq_s16): Remove.
40789 (vminq_u32): Remove.
40790 (vmaxq_u32): Remove.
40791 (vminq_s32): Remove.
40792 (vmaxq_s32): Remove.
40793 (vmaxq_m_s8): Remove.
40794 (vmaxq_m_s32): Remove.
40795 (vmaxq_m_s16): Remove.
40796 (vmaxq_m_u8): Remove.
40797 (vmaxq_m_u32): Remove.
40798 (vmaxq_m_u16): Remove.
40799 (vminq_m_s8): Remove.
40800 (vminq_m_s32): Remove.
40801 (vminq_m_s16): Remove.
40802 (vminq_m_u8): Remove.
40803 (vminq_m_u32): Remove.
40804 (vminq_m_u16): Remove.
40805 (vminq_x_s8): Remove.
40806 (vminq_x_s16): Remove.
40807 (vminq_x_s32): Remove.
40808 (vminq_x_u8): Remove.
40809 (vminq_x_u16): Remove.
40810 (vminq_x_u32): Remove.
40811 (vmaxq_x_s8): Remove.
40812 (vmaxq_x_s16): Remove.
40813 (vmaxq_x_s32): Remove.
40814 (vmaxq_x_u8): Remove.
40815 (vmaxq_x_u16): Remove.
40816 (vmaxq_x_u32): Remove.
40817 (__arm_vminq_u8): Remove.
40818 (__arm_vmaxq_u8): Remove.
40819 (__arm_vminq_s8): Remove.
40820 (__arm_vmaxq_s8): Remove.
40821 (__arm_vminq_u16): Remove.
40822 (__arm_vmaxq_u16): Remove.
40823 (__arm_vminq_s16): Remove.
40824 (__arm_vmaxq_s16): Remove.
40825 (__arm_vminq_u32): Remove.
40826 (__arm_vmaxq_u32): Remove.
40827 (__arm_vminq_s32): Remove.
40828 (__arm_vmaxq_s32): Remove.
40829 (__arm_vmaxq_m_s8): Remove.
40830 (__arm_vmaxq_m_s32): Remove.
40831 (__arm_vmaxq_m_s16): Remove.
40832 (__arm_vmaxq_m_u8): Remove.
40833 (__arm_vmaxq_m_u32): Remove.
40834 (__arm_vmaxq_m_u16): Remove.
40835 (__arm_vminq_m_s8): Remove.
40836 (__arm_vminq_m_s32): Remove.
40837 (__arm_vminq_m_s16): Remove.
40838 (__arm_vminq_m_u8): Remove.
40839 (__arm_vminq_m_u32): Remove.
40840 (__arm_vminq_m_u16): Remove.
40841 (__arm_vminq_x_s8): Remove.
40842 (__arm_vminq_x_s16): Remove.
40843 (__arm_vminq_x_s32): Remove.
40844 (__arm_vminq_x_u8): Remove.
40845 (__arm_vminq_x_u16): Remove.
40846 (__arm_vminq_x_u32): Remove.
40847 (__arm_vmaxq_x_s8): Remove.
40848 (__arm_vmaxq_x_s16): Remove.
40849 (__arm_vmaxq_x_s32): Remove.
40850 (__arm_vmaxq_x_u8): Remove.
40851 (__arm_vmaxq_x_u16): Remove.
40852 (__arm_vmaxq_x_u32): Remove.
40853 (__arm_vminq): Remove.
40854 (__arm_vmaxq): Remove.
40855 (__arm_vmaxq_m): Remove.
40856 (__arm_vminq_m): Remove.
40857 (__arm_vminq_x): Remove.
40858 (__arm_vmaxq_x): Remove.
40860 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40862 * config/arm/iterators.md (MAX_MIN_SU): New.
40863 (max_min_su_str): New.
40864 (max_min_supf): New.
40865 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
40866 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
40867 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
40869 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40871 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
40872 (vqshlq, vshlq): New.
40873 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
40874 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
40875 * config/arm/arm_mve.h (vshlq): Remove.
40878 (vshlq_m_r): Remove.
40880 (vshlq_m_n): Remove.
40882 (vshlq_x_n): Remove.
40883 (vshlq_s8): Remove.
40884 (vshlq_s16): Remove.
40885 (vshlq_s32): Remove.
40886 (vshlq_u8): Remove.
40887 (vshlq_u16): Remove.
40888 (vshlq_u32): Remove.
40889 (vshlq_r_u8): Remove.
40890 (vshlq_n_u8): Remove.
40891 (vshlq_r_s8): Remove.
40892 (vshlq_n_s8): Remove.
40893 (vshlq_r_u16): Remove.
40894 (vshlq_n_u16): Remove.
40895 (vshlq_r_s16): Remove.
40896 (vshlq_n_s16): Remove.
40897 (vshlq_r_u32): Remove.
40898 (vshlq_n_u32): Remove.
40899 (vshlq_r_s32): Remove.
40900 (vshlq_n_s32): Remove.
40901 (vshlq_m_r_u8): Remove.
40902 (vshlq_m_r_s8): Remove.
40903 (vshlq_m_r_u16): Remove.
40904 (vshlq_m_r_s16): Remove.
40905 (vshlq_m_r_u32): Remove.
40906 (vshlq_m_r_s32): Remove.
40907 (vshlq_m_u8): Remove.
40908 (vshlq_m_s8): Remove.
40909 (vshlq_m_u16): Remove.
40910 (vshlq_m_s16): Remove.
40911 (vshlq_m_u32): Remove.
40912 (vshlq_m_s32): Remove.
40913 (vshlq_m_n_s8): Remove.
40914 (vshlq_m_n_s32): Remove.
40915 (vshlq_m_n_s16): Remove.
40916 (vshlq_m_n_u8): Remove.
40917 (vshlq_m_n_u32): Remove.
40918 (vshlq_m_n_u16): Remove.
40919 (vshlq_x_s8): Remove.
40920 (vshlq_x_s16): Remove.
40921 (vshlq_x_s32): Remove.
40922 (vshlq_x_u8): Remove.
40923 (vshlq_x_u16): Remove.
40924 (vshlq_x_u32): Remove.
40925 (vshlq_x_n_s8): Remove.
40926 (vshlq_x_n_s16): Remove.
40927 (vshlq_x_n_s32): Remove.
40928 (vshlq_x_n_u8): Remove.
40929 (vshlq_x_n_u16): Remove.
40930 (vshlq_x_n_u32): Remove.
40931 (__arm_vshlq_s8): Remove.
40932 (__arm_vshlq_s16): Remove.
40933 (__arm_vshlq_s32): Remove.
40934 (__arm_vshlq_u8): Remove.
40935 (__arm_vshlq_u16): Remove.
40936 (__arm_vshlq_u32): Remove.
40937 (__arm_vshlq_r_u8): Remove.
40938 (__arm_vshlq_n_u8): Remove.
40939 (__arm_vshlq_r_s8): Remove.
40940 (__arm_vshlq_n_s8): Remove.
40941 (__arm_vshlq_r_u16): Remove.
40942 (__arm_vshlq_n_u16): Remove.
40943 (__arm_vshlq_r_s16): Remove.
40944 (__arm_vshlq_n_s16): Remove.
40945 (__arm_vshlq_r_u32): Remove.
40946 (__arm_vshlq_n_u32): Remove.
40947 (__arm_vshlq_r_s32): Remove.
40948 (__arm_vshlq_n_s32): Remove.
40949 (__arm_vshlq_m_r_u8): Remove.
40950 (__arm_vshlq_m_r_s8): Remove.
40951 (__arm_vshlq_m_r_u16): Remove.
40952 (__arm_vshlq_m_r_s16): Remove.
40953 (__arm_vshlq_m_r_u32): Remove.
40954 (__arm_vshlq_m_r_s32): Remove.
40955 (__arm_vshlq_m_u8): Remove.
40956 (__arm_vshlq_m_s8): Remove.
40957 (__arm_vshlq_m_u16): Remove.
40958 (__arm_vshlq_m_s16): Remove.
40959 (__arm_vshlq_m_u32): Remove.
40960 (__arm_vshlq_m_s32): Remove.
40961 (__arm_vshlq_m_n_s8): Remove.
40962 (__arm_vshlq_m_n_s32): Remove.
40963 (__arm_vshlq_m_n_s16): Remove.
40964 (__arm_vshlq_m_n_u8): Remove.
40965 (__arm_vshlq_m_n_u32): Remove.
40966 (__arm_vshlq_m_n_u16): Remove.
40967 (__arm_vshlq_x_s8): Remove.
40968 (__arm_vshlq_x_s16): Remove.
40969 (__arm_vshlq_x_s32): Remove.
40970 (__arm_vshlq_x_u8): Remove.
40971 (__arm_vshlq_x_u16): Remove.
40972 (__arm_vshlq_x_u32): Remove.
40973 (__arm_vshlq_x_n_s8): Remove.
40974 (__arm_vshlq_x_n_s16): Remove.
40975 (__arm_vshlq_x_n_s32): Remove.
40976 (__arm_vshlq_x_n_u8): Remove.
40977 (__arm_vshlq_x_n_u16): Remove.
40978 (__arm_vshlq_x_n_u32): Remove.
40979 (__arm_vshlq): Remove.
40980 (__arm_vshlq_r): Remove.
40981 (__arm_vshlq_n): Remove.
40982 (__arm_vshlq_m_r): Remove.
40983 (__arm_vshlq_m): Remove.
40984 (__arm_vshlq_m_n): Remove.
40985 (__arm_vshlq_x): Remove.
40986 (__arm_vshlq_x_n): Remove.
40988 (vqshlq_r): Remove.
40989 (vqshlq_n): Remove.
40990 (vqshlq_m_r): Remove.
40991 (vqshlq_m_n): Remove.
40992 (vqshlq_m): Remove.
40993 (vqshlq_u8): Remove.
40994 (vqshlq_r_u8): Remove.
40995 (vqshlq_n_u8): Remove.
40996 (vqshlq_s8): Remove.
40997 (vqshlq_r_s8): Remove.
40998 (vqshlq_n_s8): Remove.
40999 (vqshlq_u16): Remove.
41000 (vqshlq_r_u16): Remove.
41001 (vqshlq_n_u16): Remove.
41002 (vqshlq_s16): Remove.
41003 (vqshlq_r_s16): Remove.
41004 (vqshlq_n_s16): Remove.
41005 (vqshlq_u32): Remove.
41006 (vqshlq_r_u32): Remove.
41007 (vqshlq_n_u32): Remove.
41008 (vqshlq_s32): Remove.
41009 (vqshlq_r_s32): Remove.
41010 (vqshlq_n_s32): Remove.
41011 (vqshlq_m_r_u8): Remove.
41012 (vqshlq_m_r_s8): Remove.
41013 (vqshlq_m_r_u16): Remove.
41014 (vqshlq_m_r_s16): Remove.
41015 (vqshlq_m_r_u32): Remove.
41016 (vqshlq_m_r_s32): Remove.
41017 (vqshlq_m_n_s8): Remove.
41018 (vqshlq_m_n_s32): Remove.
41019 (vqshlq_m_n_s16): Remove.
41020 (vqshlq_m_n_u8): Remove.
41021 (vqshlq_m_n_u32): Remove.
41022 (vqshlq_m_n_u16): Remove.
41023 (vqshlq_m_s8): Remove.
41024 (vqshlq_m_s32): Remove.
41025 (vqshlq_m_s16): Remove.
41026 (vqshlq_m_u8): Remove.
41027 (vqshlq_m_u32): Remove.
41028 (vqshlq_m_u16): Remove.
41029 (__arm_vqshlq_u8): Remove.
41030 (__arm_vqshlq_r_u8): Remove.
41031 (__arm_vqshlq_n_u8): Remove.
41032 (__arm_vqshlq_s8): Remove.
41033 (__arm_vqshlq_r_s8): Remove.
41034 (__arm_vqshlq_n_s8): Remove.
41035 (__arm_vqshlq_u16): Remove.
41036 (__arm_vqshlq_r_u16): Remove.
41037 (__arm_vqshlq_n_u16): Remove.
41038 (__arm_vqshlq_s16): Remove.
41039 (__arm_vqshlq_r_s16): Remove.
41040 (__arm_vqshlq_n_s16): Remove.
41041 (__arm_vqshlq_u32): Remove.
41042 (__arm_vqshlq_r_u32): Remove.
41043 (__arm_vqshlq_n_u32): Remove.
41044 (__arm_vqshlq_s32): Remove.
41045 (__arm_vqshlq_r_s32): Remove.
41046 (__arm_vqshlq_n_s32): Remove.
41047 (__arm_vqshlq_m_r_u8): Remove.
41048 (__arm_vqshlq_m_r_s8): Remove.
41049 (__arm_vqshlq_m_r_u16): Remove.
41050 (__arm_vqshlq_m_r_s16): Remove.
41051 (__arm_vqshlq_m_r_u32): Remove.
41052 (__arm_vqshlq_m_r_s32): Remove.
41053 (__arm_vqshlq_m_n_s8): Remove.
41054 (__arm_vqshlq_m_n_s32): Remove.
41055 (__arm_vqshlq_m_n_s16): Remove.
41056 (__arm_vqshlq_m_n_u8): Remove.
41057 (__arm_vqshlq_m_n_u32): Remove.
41058 (__arm_vqshlq_m_n_u16): Remove.
41059 (__arm_vqshlq_m_s8): Remove.
41060 (__arm_vqshlq_m_s32): Remove.
41061 (__arm_vqshlq_m_s16): Remove.
41062 (__arm_vqshlq_m_u8): Remove.
41063 (__arm_vqshlq_m_u32): Remove.
41064 (__arm_vqshlq_m_u16): Remove.
41065 (__arm_vqshlq): Remove.
41066 (__arm_vqshlq_r): Remove.
41067 (__arm_vqshlq_n): Remove.
41068 (__arm_vqshlq_m_r): Remove.
41069 (__arm_vqshlq_m_n): Remove.
41070 (__arm_vqshlq_m): Remove.
41072 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41074 * config/arm/arm-mve-builtins-functions.h (class
41075 unspec_mve_function_exact_insn_vshl): New.
41077 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41079 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
41080 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
41082 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41084 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
41085 (finish_opt_n_resolution): Handle MODE_r.
41086 * config/arm/arm-mve-builtins.def (r): New mode.
41088 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41090 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
41091 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
41093 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41095 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
41097 * config/arm/arm-mve-builtins-base.def (vabdq): New.
41098 * config/arm/arm-mve-builtins-base.h (vabdq): New.
41099 * config/arm/arm_mve.h (vabdq): Remove.
41102 (vabdq_u8): Remove.
41103 (vabdq_s8): Remove.
41104 (vabdq_u16): Remove.
41105 (vabdq_s16): Remove.
41106 (vabdq_u32): Remove.
41107 (vabdq_s32): Remove.
41108 (vabdq_f16): Remove.
41109 (vabdq_f32): Remove.
41110 (vabdq_m_s8): Remove.
41111 (vabdq_m_s32): Remove.
41112 (vabdq_m_s16): Remove.
41113 (vabdq_m_u8): Remove.
41114 (vabdq_m_u32): Remove.
41115 (vabdq_m_u16): Remove.
41116 (vabdq_m_f32): Remove.
41117 (vabdq_m_f16): Remove.
41118 (vabdq_x_s8): Remove.
41119 (vabdq_x_s16): Remove.
41120 (vabdq_x_s32): Remove.
41121 (vabdq_x_u8): Remove.
41122 (vabdq_x_u16): Remove.
41123 (vabdq_x_u32): Remove.
41124 (vabdq_x_f16): Remove.
41125 (vabdq_x_f32): Remove.
41126 (__arm_vabdq_u8): Remove.
41127 (__arm_vabdq_s8): Remove.
41128 (__arm_vabdq_u16): Remove.
41129 (__arm_vabdq_s16): Remove.
41130 (__arm_vabdq_u32): Remove.
41131 (__arm_vabdq_s32): Remove.
41132 (__arm_vabdq_m_s8): Remove.
41133 (__arm_vabdq_m_s32): Remove.
41134 (__arm_vabdq_m_s16): Remove.
41135 (__arm_vabdq_m_u8): Remove.
41136 (__arm_vabdq_m_u32): Remove.
41137 (__arm_vabdq_m_u16): Remove.
41138 (__arm_vabdq_x_s8): Remove.
41139 (__arm_vabdq_x_s16): Remove.
41140 (__arm_vabdq_x_s32): Remove.
41141 (__arm_vabdq_x_u8): Remove.
41142 (__arm_vabdq_x_u16): Remove.
41143 (__arm_vabdq_x_u32): Remove.
41144 (__arm_vabdq_f16): Remove.
41145 (__arm_vabdq_f32): Remove.
41146 (__arm_vabdq_m_f32): Remove.
41147 (__arm_vabdq_m_f16): Remove.
41148 (__arm_vabdq_x_f16): Remove.
41149 (__arm_vabdq_x_f32): Remove.
41150 (__arm_vabdq): Remove.
41151 (__arm_vabdq_m): Remove.
41152 (__arm_vabdq_x): Remove.
41154 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41156 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
41157 (MVE_FP_VABDQ_ONLY): New.
41158 (mve_insn): Add vabd.
41159 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
41160 (@mve_<mve_insn>q_f<mode>): ... this.
41161 (mve_vabdq_m_f<mode>): Remove.
41163 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41165 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
41166 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
41167 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
41168 * config/arm/arm_mve.h (vqrdmulhq): Remove.
41169 (vqrdmulhq_m): Remove.
41170 (vqrdmulhq_s8): Remove.
41171 (vqrdmulhq_n_s8): Remove.
41172 (vqrdmulhq_s16): Remove.
41173 (vqrdmulhq_n_s16): Remove.
41174 (vqrdmulhq_s32): Remove.
41175 (vqrdmulhq_n_s32): Remove.
41176 (vqrdmulhq_m_n_s8): Remove.
41177 (vqrdmulhq_m_n_s32): Remove.
41178 (vqrdmulhq_m_n_s16): Remove.
41179 (vqrdmulhq_m_s8): Remove.
41180 (vqrdmulhq_m_s32): Remove.
41181 (vqrdmulhq_m_s16): Remove.
41182 (__arm_vqrdmulhq_s8): Remove.
41183 (__arm_vqrdmulhq_n_s8): Remove.
41184 (__arm_vqrdmulhq_s16): Remove.
41185 (__arm_vqrdmulhq_n_s16): Remove.
41186 (__arm_vqrdmulhq_s32): Remove.
41187 (__arm_vqrdmulhq_n_s32): Remove.
41188 (__arm_vqrdmulhq_m_n_s8): Remove.
41189 (__arm_vqrdmulhq_m_n_s32): Remove.
41190 (__arm_vqrdmulhq_m_n_s16): Remove.
41191 (__arm_vqrdmulhq_m_s8): Remove.
41192 (__arm_vqrdmulhq_m_s32): Remove.
41193 (__arm_vqrdmulhq_m_s16): Remove.
41194 (__arm_vqrdmulhq): Remove.
41195 (__arm_vqrdmulhq_m): Remove.
41197 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41199 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
41200 (MVE_SHIFT_N, MVE_SHIFT_R): New.
41201 (mve_insn): Add vqshl, vshl.
41202 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
41203 (mve_vshlq_n_<supf><mode>): Merge into ...
41204 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
41205 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
41207 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
41208 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
41210 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
41211 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
41213 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
41214 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
41216 (@mve_<mve_insn>q_<supf><mode>): ... this.
41218 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41220 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
41221 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
41222 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
41223 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
41225 * config/arm/arm_mve.h (vrshlq): Remove.
41226 (vrshlq_m_n): Remove.
41227 (vrshlq_m): Remove.
41228 (vrshlq_x): Remove.
41229 (vrshlq_u8): Remove.
41230 (vrshlq_n_u8): Remove.
41231 (vrshlq_s8): Remove.
41232 (vrshlq_n_s8): Remove.
41233 (vrshlq_u16): Remove.
41234 (vrshlq_n_u16): Remove.
41235 (vrshlq_s16): Remove.
41236 (vrshlq_n_s16): Remove.
41237 (vrshlq_u32): Remove.
41238 (vrshlq_n_u32): Remove.
41239 (vrshlq_s32): Remove.
41240 (vrshlq_n_s32): Remove.
41241 (vrshlq_m_n_u8): Remove.
41242 (vrshlq_m_n_s8): Remove.
41243 (vrshlq_m_n_u16): Remove.
41244 (vrshlq_m_n_s16): Remove.
41245 (vrshlq_m_n_u32): Remove.
41246 (vrshlq_m_n_s32): Remove.
41247 (vrshlq_m_s8): Remove.
41248 (vrshlq_m_s32): Remove.
41249 (vrshlq_m_s16): Remove.
41250 (vrshlq_m_u8): Remove.
41251 (vrshlq_m_u32): Remove.
41252 (vrshlq_m_u16): Remove.
41253 (vrshlq_x_s8): Remove.
41254 (vrshlq_x_s16): Remove.
41255 (vrshlq_x_s32): Remove.
41256 (vrshlq_x_u8): Remove.
41257 (vrshlq_x_u16): Remove.
41258 (vrshlq_x_u32): Remove.
41259 (__arm_vrshlq_u8): Remove.
41260 (__arm_vrshlq_n_u8): Remove.
41261 (__arm_vrshlq_s8): Remove.
41262 (__arm_vrshlq_n_s8): Remove.
41263 (__arm_vrshlq_u16): Remove.
41264 (__arm_vrshlq_n_u16): Remove.
41265 (__arm_vrshlq_s16): Remove.
41266 (__arm_vrshlq_n_s16): Remove.
41267 (__arm_vrshlq_u32): Remove.
41268 (__arm_vrshlq_n_u32): Remove.
41269 (__arm_vrshlq_s32): Remove.
41270 (__arm_vrshlq_n_s32): Remove.
41271 (__arm_vrshlq_m_n_u8): Remove.
41272 (__arm_vrshlq_m_n_s8): Remove.
41273 (__arm_vrshlq_m_n_u16): Remove.
41274 (__arm_vrshlq_m_n_s16): Remove.
41275 (__arm_vrshlq_m_n_u32): Remove.
41276 (__arm_vrshlq_m_n_s32): Remove.
41277 (__arm_vrshlq_m_s8): Remove.
41278 (__arm_vrshlq_m_s32): Remove.
41279 (__arm_vrshlq_m_s16): Remove.
41280 (__arm_vrshlq_m_u8): Remove.
41281 (__arm_vrshlq_m_u32): Remove.
41282 (__arm_vrshlq_m_u16): Remove.
41283 (__arm_vrshlq_x_s8): Remove.
41284 (__arm_vrshlq_x_s16): Remove.
41285 (__arm_vrshlq_x_s32): Remove.
41286 (__arm_vrshlq_x_u8): Remove.
41287 (__arm_vrshlq_x_u16): Remove.
41288 (__arm_vrshlq_x_u32): Remove.
41289 (__arm_vrshlq): Remove.
41290 (__arm_vrshlq_m_n): Remove.
41291 (__arm_vrshlq_m): Remove.
41292 (__arm_vrshlq_x): Remove.
41294 (vqrshlq_m_n): Remove.
41295 (vqrshlq_m): Remove.
41296 (vqrshlq_u8): Remove.
41297 (vqrshlq_n_u8): Remove.
41298 (vqrshlq_s8): Remove.
41299 (vqrshlq_n_s8): Remove.
41300 (vqrshlq_u16): Remove.
41301 (vqrshlq_n_u16): Remove.
41302 (vqrshlq_s16): Remove.
41303 (vqrshlq_n_s16): Remove.
41304 (vqrshlq_u32): Remove.
41305 (vqrshlq_n_u32): Remove.
41306 (vqrshlq_s32): Remove.
41307 (vqrshlq_n_s32): Remove.
41308 (vqrshlq_m_n_u8): Remove.
41309 (vqrshlq_m_n_s8): Remove.
41310 (vqrshlq_m_n_u16): Remove.
41311 (vqrshlq_m_n_s16): Remove.
41312 (vqrshlq_m_n_u32): Remove.
41313 (vqrshlq_m_n_s32): Remove.
41314 (vqrshlq_m_s8): Remove.
41315 (vqrshlq_m_s32): Remove.
41316 (vqrshlq_m_s16): Remove.
41317 (vqrshlq_m_u8): Remove.
41318 (vqrshlq_m_u32): Remove.
41319 (vqrshlq_m_u16): Remove.
41320 (__arm_vqrshlq_u8): Remove.
41321 (__arm_vqrshlq_n_u8): Remove.
41322 (__arm_vqrshlq_s8): Remove.
41323 (__arm_vqrshlq_n_s8): Remove.
41324 (__arm_vqrshlq_u16): Remove.
41325 (__arm_vqrshlq_n_u16): Remove.
41326 (__arm_vqrshlq_s16): Remove.
41327 (__arm_vqrshlq_n_s16): Remove.
41328 (__arm_vqrshlq_u32): Remove.
41329 (__arm_vqrshlq_n_u32): Remove.
41330 (__arm_vqrshlq_s32): Remove.
41331 (__arm_vqrshlq_n_s32): Remove.
41332 (__arm_vqrshlq_m_n_u8): Remove.
41333 (__arm_vqrshlq_m_n_s8): Remove.
41334 (__arm_vqrshlq_m_n_u16): Remove.
41335 (__arm_vqrshlq_m_n_s16): Remove.
41336 (__arm_vqrshlq_m_n_u32): Remove.
41337 (__arm_vqrshlq_m_n_s32): Remove.
41338 (__arm_vqrshlq_m_s8): Remove.
41339 (__arm_vqrshlq_m_s32): Remove.
41340 (__arm_vqrshlq_m_s16): Remove.
41341 (__arm_vqrshlq_m_u8): Remove.
41342 (__arm_vqrshlq_m_u32): Remove.
41343 (__arm_vqrshlq_m_u16): Remove.
41344 (__arm_vqrshlq): Remove.
41345 (__arm_vqrshlq_m_n): Remove.
41346 (__arm_vqrshlq_m): Remove.
41348 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41350 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
41351 (mve_insn): Add vqrshl, vrshl.
41352 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
41353 (mve_vrshlq_n_<supf><mode>): Merge into ...
41354 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
41355 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
41357 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
41359 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41361 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
41362 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
41364 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
41367 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
41368 denegrate PHI optmization.
41370 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
41372 * config/i386/predicates.md (register_no_SP_operand):
41373 Rename from index_register_operand.
41374 (call_register_operand): Update for rename.
41375 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
41377 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41380 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
41381 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
41382 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
41383 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
41384 (s-match): Split into s-generic-match and s-gimple-match.
41385 * configure.ac (with-matchpd-partitions,
41386 DEFAULT_MATCHPD_PARTITIONS): New.
41387 * configure: Regenerate.
41389 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41392 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
41393 (decision_tree::gen): Accept list of files instead of single and update
41394 to write function definition to header and main file.
41395 (write_predicate): Likewise.
41396 (write_header): Emit pragmas and new includes.
41397 (main): Create file buffers and cleanup.
41398 (showUsage, write_header_includes): New.
41400 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41403 * Makefile.in (OBJS): Add gimple-match-exports.o.
41404 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
41405 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
41406 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
41407 gimple_resimplify5, constant_for_folding, convert_conditional_op,
41408 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
41409 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
41410 do_valueize, try_conditional_simplification, gimple_extract,
41411 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
41412 commutative_ternary_op_p, first_commutative_argument,
41413 associative_binary_op_p, directly_supported_p,
41414 get_conditional_internal_fn): Moved to gimple-match-exports.cc
41415 * gimple-match-exports.cc: New file.
41417 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41420 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
41422 (dt_simplify::gen_1): Use it.
41424 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41427 * genmatch.cc (output_line_directive): Only emit commented directive
41430 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41433 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
41435 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
41437 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
41438 unused in_mode/in_n variables.
41440 2023-05-05 Richard Biener <rguenther@suse.de>
41442 PR tree-optimization/109735
41443 * tree-vect-stmts.cc (vectorizable_operation): Perform
41444 conversion for POINTER_DIFF_EXPR unconditionally.
41446 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
41448 * config/i386/mmx.md (mulv2si3): New expander.
41449 (*mulv2si3): New insn pattern.
41451 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
41452 Thomas Schwinge <thomas@codesourcery.com>
41455 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
41456 alongside reverse-offload function table to prevent NULL values
41457 of the function addresses.
41459 2023-05-05 Jakub Jelinek <jakub@redhat.com>
41461 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
41463 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
41465 2023-05-05 Andrew Pinski <apinski@marvell.com>
41467 PR tree-optimization/109732
41468 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
41469 of the argtrue/argfalse.
41471 2023-05-05 Andrew Pinski <apinski@marvell.com>
41473 PR tree-optimization/109722
41474 * match.pd: Extend the `ABS<a> == 0` pattern
41475 to cover `ABSU<a> == 0` too.
41477 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
41480 * config/i386/predicates.md (index_reg_operand): New predicate.
41481 * config/i386/i386.md (ashift to lea spliter): Use
41482 general_reg_operand and index_reg_operand predicates.
41484 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41486 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
41487 Rename and reimplement with RTL codes to...
41488 (aarch64_<optab>hn2<mode>_insn_le): .. This.
41489 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
41490 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
41492 (aarch64_<optab>hn2<mode>_insn_be): ... This.
41493 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
41494 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
41495 (aarch64_<optab>hn2<mode>): ... This.
41496 (aarch64_r<optab>hn2<mode>): New expander.
41497 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
41498 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
41499 (ADDSUBHN): Delete.
41500 (sur): Remove handling of the above.
41501 (addsub): Likewise.
41503 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41505 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
41507 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
41508 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
41509 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
41510 (aarch64_<sur><addsub>hn<mode>): Delete.
41511 (aarch64_<optab>hn<mode>): New define_expand.
41512 (aarch64_r<optab>hn<mode>): Likewise.
41513 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
41516 2023-05-04 Andrew Pinski <apinski@marvell.com>
41518 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
41519 diamond form bb with forwarder only empty blocks better.
41521 2023-05-04 Andrew Pinski <apinski@marvell.com>
41523 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
41524 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
41525 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
41526 of an inline version of it.
41527 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
41528 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
41530 2023-05-04 Andrew Pinski <apinski@marvell.com>
41532 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
41533 the default argument value for dce_ssa_names to nullptr.
41534 Check to make sure dce_ssa_names is a non-nullptr before
41535 calling simple_dce_from_worklist.
41537 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
41539 * config/i386/predicates.md (index_register_operand): Reject
41540 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
41541 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
41542 (call_register_no_elim_operand): Rewrite as ...
41543 (call_register_operand): ... this.
41544 (call_insn_operand): Use call_register_operand predicate.
41546 2023-05-04 Richard Biener <rguenther@suse.de>
41548 PR tree-optimization/109721
41549 * tree-vect-stmts.cc (vectorizable_operation): Make sure
41550 to test word_mode for all !target_support_p operations.
41552 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41555 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
41556 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
41557 (aarch64_mla<mode>): Rename to...
41558 (aarch64_mla<mode><vczle><vczbe>): ... This.
41559 (*aarch64_mla_elt<mode>): Rename to...
41560 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
41561 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
41562 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
41563 (aarch64_mla_n<mode>): Rename to...
41564 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
41565 (aarch64_mls<mode>): Rename to...
41566 (aarch64_mls<mode><vczle><vczbe>): ... This.
41567 (*aarch64_mls_elt<mode>): Rename to...
41568 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
41569 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
41570 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
41571 (aarch64_mls_n<mode>): Rename to...
41572 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
41573 (fma<mode>4): Rename to...
41574 (fma<mode>4<vczle><vczbe>): ... This.
41575 (*aarch64_fma4_elt<mode>): Rename to...
41576 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
41577 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
41578 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
41579 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
41580 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
41581 (fnma<mode>4): Rename to...
41582 (fnma<mode>4<vczle><vczbe>): ... This.
41583 (*aarch64_fnma4_elt<mode>): Rename to...
41584 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
41585 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
41586 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
41587 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
41588 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
41589 (aarch64_simd_bsl<mode>_internal): Rename to...
41590 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
41591 (*aarch64_simd_bsl<mode>_alt): Rename to...
41592 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
41594 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41597 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
41598 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
41599 (fabd<mode>3): Rename to...
41600 (fabd<mode>3<vczle><vczbe>): ... This.
41601 (aarch64_<optab>p<mode>): Rename to...
41602 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
41603 (aarch64_faddp<mode>): Rename to...
41604 (aarch64_faddp<mode><vczle><vczbe>): ... This.
41606 2023-05-04 Martin Liska <mliska@suse.cz>
41608 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
41609 (print_version): Use it.
41610 (generate_results): Likewise.
41612 2023-05-04 Richard Biener <rguenther@suse.de>
41614 * tree-cfg.h (last_stmt): Rename to ...
41615 (last_nondebug_stmt): ... this.
41616 * tree-cfg.cc (last_stmt): Rename to ...
41617 (last_nondebug_stmt): ... this.
41618 (assign_discriminators): Adjust.
41619 (group_case_labels_stmt): Likewise.
41620 (gimple_can_duplicate_bb_p): Likewise.
41621 (execute_fixup_cfg): Likewise.
41622 * auto-profile.cc (afdo_propagate_circuit): Likewise.
41623 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
41624 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
41625 (determine_parallel_type): Likewise.
41626 (adjust_context_and_scope): Likewise.
41627 (expand_task_call): Likewise.
41628 (remove_exit_barrier): Likewise.
41629 (expand_omp_taskreg): Likewise.
41630 (expand_omp_for_init_counts): Likewise.
41631 (expand_omp_for_init_vars): Likewise.
41632 (expand_omp_for_static_chunk): Likewise.
41633 (expand_omp_simd): Likewise.
41634 (expand_oacc_for): Likewise.
41635 (expand_omp_for): Likewise.
41636 (expand_omp_sections): Likewise.
41637 (expand_omp_atomic_fetch_op): Likewise.
41638 (expand_omp_atomic_cas): Likewise.
41639 (expand_omp_atomic): Likewise.
41640 (expand_omp_target): Likewise.
41641 (expand_omp): Likewise.
41642 (omp_make_gimple_edges): Likewise.
41643 * trans-mem.cc (tm_region_init): Likewise.
41644 * tree-inline.cc (redirect_all_calls): Likewise.
41645 * tree-parloops.cc (gen_parallel_loop): Likewise.
41646 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
41647 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
41649 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
41650 (may_eliminate_iv): Likewise.
41651 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
41652 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
41654 (estimate_numbers_of_iterations): Likewise.
41655 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
41656 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
41657 (set_predicates_for_bb): Likewise.
41658 (init_loop_unswitch_info): Likewise.
41659 (hoist_guard): Likewise.
41660 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
41661 (minmax_replacement): Likewise.
41662 * tree-ssa-reassoc.cc (update_range_test): Likewise.
41663 (optimize_range_tests_to_bit_test): Likewise.
41664 (optimize_range_tests_var_bound): Likewise.
41665 (optimize_range_tests): Likewise.
41666 (no_side_effect_bb): Likewise.
41667 (suitable_cond_bb): Likewise.
41668 (maybe_optimize_range_tests): Likewise.
41669 (reassociate_bb): Likewise.
41670 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
41672 2023-05-04 Jakub Jelinek <jakub@redhat.com>
41675 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
41676 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
41677 for it only if it still has TImode. Don't decide whether to call
41678 fix_debug_reg_uses based on whether SRC is ever set or not.
41680 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
41682 * config/cris/cris.cc (cris_split_constant): New function.
41683 * config/cris/cris.md (splitop): New iterator.
41684 (opsplit1): New define_peephole2.
41685 * config/cris/cris-protos.h (cris_split_constant): Declare.
41686 (cris_splittable_constant_p): New macro.
41688 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
41690 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
41693 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
41695 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
41696 lra_in_progress, not reload_in_progress.
41697 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
41698 * config/cris/constraints.md ("Q"): Ditto.
41700 2023-05-03 Andrew Pinski <apinski@marvell.com>
41702 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
41703 stats on removed number of statements and phis.
41705 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
41707 PR tree-optimization/109711
41708 * value-range.cc (irange::verify_range): Allow types of
41711 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
41714 * calls.cc (can_implement_as_sibling_call_p): Reject calls
41715 to __sanitizer_cov_trace_pc.
41717 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
41720 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
41721 a new ABI break parameter for GCC 14. Set it to the alignment
41722 of enums that have an underlying type. Take the true alignment
41723 of such enums from the TYPE_ALIGN of the underlying type's
41725 (aarch64_function_arg_boundary): Update accordingly.
41726 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
41727 Warn about ABI differences.
41729 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
41732 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
41733 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
41734 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
41735 (aarch64_gimplify_va_arg_expr): Likewise.
41737 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
41739 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
41740 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
41741 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
41743 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
41744 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
41745 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
41746 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
41747 * config/arm/arm_mve.h (vhsubq): Remove.
41749 (vhaddq_m): Remove.
41750 (vhsubq_m): Remove.
41751 (vhaddq_x): Remove.
41752 (vhsubq_x): Remove.
41753 (vhsubq_u8): Remove.
41754 (vhsubq_n_u8): Remove.
41755 (vhaddq_u8): Remove.
41756 (vhaddq_n_u8): Remove.
41757 (vhsubq_s8): Remove.
41758 (vhsubq_n_s8): Remove.
41759 (vhaddq_s8): Remove.
41760 (vhaddq_n_s8): Remove.
41761 (vhsubq_u16): Remove.
41762 (vhsubq_n_u16): Remove.
41763 (vhaddq_u16): Remove.
41764 (vhaddq_n_u16): Remove.
41765 (vhsubq_s16): Remove.
41766 (vhsubq_n_s16): Remove.
41767 (vhaddq_s16): Remove.
41768 (vhaddq_n_s16): Remove.
41769 (vhsubq_u32): Remove.
41770 (vhsubq_n_u32): Remove.
41771 (vhaddq_u32): Remove.
41772 (vhaddq_n_u32): Remove.
41773 (vhsubq_s32): Remove.
41774 (vhsubq_n_s32): Remove.
41775 (vhaddq_s32): Remove.
41776 (vhaddq_n_s32): Remove.
41777 (vhaddq_m_n_s8): Remove.
41778 (vhaddq_m_n_s32): Remove.
41779 (vhaddq_m_n_s16): Remove.
41780 (vhaddq_m_n_u8): Remove.
41781 (vhaddq_m_n_u32): Remove.
41782 (vhaddq_m_n_u16): Remove.
41783 (vhaddq_m_s8): Remove.
41784 (vhaddq_m_s32): Remove.
41785 (vhaddq_m_s16): Remove.
41786 (vhaddq_m_u8): Remove.
41787 (vhaddq_m_u32): Remove.
41788 (vhaddq_m_u16): Remove.
41789 (vhsubq_m_n_s8): Remove.
41790 (vhsubq_m_n_s32): Remove.
41791 (vhsubq_m_n_s16): Remove.
41792 (vhsubq_m_n_u8): Remove.
41793 (vhsubq_m_n_u32): Remove.
41794 (vhsubq_m_n_u16): Remove.
41795 (vhsubq_m_s8): Remove.
41796 (vhsubq_m_s32): Remove.
41797 (vhsubq_m_s16): Remove.
41798 (vhsubq_m_u8): Remove.
41799 (vhsubq_m_u32): Remove.
41800 (vhsubq_m_u16): Remove.
41801 (vhaddq_x_n_s8): Remove.
41802 (vhaddq_x_n_s16): Remove.
41803 (vhaddq_x_n_s32): Remove.
41804 (vhaddq_x_n_u8): Remove.
41805 (vhaddq_x_n_u16): Remove.
41806 (vhaddq_x_n_u32): Remove.
41807 (vhaddq_x_s8): Remove.
41808 (vhaddq_x_s16): Remove.
41809 (vhaddq_x_s32): Remove.
41810 (vhaddq_x_u8): Remove.
41811 (vhaddq_x_u16): Remove.
41812 (vhaddq_x_u32): Remove.
41813 (vhsubq_x_n_s8): Remove.
41814 (vhsubq_x_n_s16): Remove.
41815 (vhsubq_x_n_s32): Remove.
41816 (vhsubq_x_n_u8): Remove.
41817 (vhsubq_x_n_u16): Remove.
41818 (vhsubq_x_n_u32): Remove.
41819 (vhsubq_x_s8): Remove.
41820 (vhsubq_x_s16): Remove.
41821 (vhsubq_x_s32): Remove.
41822 (vhsubq_x_u8): Remove.
41823 (vhsubq_x_u16): Remove.
41824 (vhsubq_x_u32): Remove.
41825 (__arm_vhsubq_u8): Remove.
41826 (__arm_vhsubq_n_u8): Remove.
41827 (__arm_vhaddq_u8): Remove.
41828 (__arm_vhaddq_n_u8): Remove.
41829 (__arm_vhsubq_s8): Remove.
41830 (__arm_vhsubq_n_s8): Remove.
41831 (__arm_vhaddq_s8): Remove.
41832 (__arm_vhaddq_n_s8): Remove.
41833 (__arm_vhsubq_u16): Remove.
41834 (__arm_vhsubq_n_u16): Remove.
41835 (__arm_vhaddq_u16): Remove.
41836 (__arm_vhaddq_n_u16): Remove.
41837 (__arm_vhsubq_s16): Remove.
41838 (__arm_vhsubq_n_s16): Remove.
41839 (__arm_vhaddq_s16): Remove.
41840 (__arm_vhaddq_n_s16): Remove.
41841 (__arm_vhsubq_u32): Remove.
41842 (__arm_vhsubq_n_u32): Remove.
41843 (__arm_vhaddq_u32): Remove.
41844 (__arm_vhaddq_n_u32): Remove.
41845 (__arm_vhsubq_s32): Remove.
41846 (__arm_vhsubq_n_s32): Remove.
41847 (__arm_vhaddq_s32): Remove.
41848 (__arm_vhaddq_n_s32): Remove.
41849 (__arm_vhaddq_m_n_s8): Remove.
41850 (__arm_vhaddq_m_n_s32): Remove.
41851 (__arm_vhaddq_m_n_s16): Remove.
41852 (__arm_vhaddq_m_n_u8): Remove.
41853 (__arm_vhaddq_m_n_u32): Remove.
41854 (__arm_vhaddq_m_n_u16): Remove.
41855 (__arm_vhaddq_m_s8): Remove.
41856 (__arm_vhaddq_m_s32): Remove.
41857 (__arm_vhaddq_m_s16): Remove.
41858 (__arm_vhaddq_m_u8): Remove.
41859 (__arm_vhaddq_m_u32): Remove.
41860 (__arm_vhaddq_m_u16): Remove.
41861 (__arm_vhsubq_m_n_s8): Remove.
41862 (__arm_vhsubq_m_n_s32): Remove.
41863 (__arm_vhsubq_m_n_s16): Remove.
41864 (__arm_vhsubq_m_n_u8): Remove.
41865 (__arm_vhsubq_m_n_u32): Remove.
41866 (__arm_vhsubq_m_n_u16): Remove.
41867 (__arm_vhsubq_m_s8): Remove.
41868 (__arm_vhsubq_m_s32): Remove.
41869 (__arm_vhsubq_m_s16): Remove.
41870 (__arm_vhsubq_m_u8): Remove.
41871 (__arm_vhsubq_m_u32): Remove.
41872 (__arm_vhsubq_m_u16): Remove.
41873 (__arm_vhaddq_x_n_s8): Remove.
41874 (__arm_vhaddq_x_n_s16): Remove.
41875 (__arm_vhaddq_x_n_s32): Remove.
41876 (__arm_vhaddq_x_n_u8): Remove.
41877 (__arm_vhaddq_x_n_u16): Remove.
41878 (__arm_vhaddq_x_n_u32): Remove.
41879 (__arm_vhaddq_x_s8): Remove.
41880 (__arm_vhaddq_x_s16): Remove.
41881 (__arm_vhaddq_x_s32): Remove.
41882 (__arm_vhaddq_x_u8): Remove.
41883 (__arm_vhaddq_x_u16): Remove.
41884 (__arm_vhaddq_x_u32): Remove.
41885 (__arm_vhsubq_x_n_s8): Remove.
41886 (__arm_vhsubq_x_n_s16): Remove.
41887 (__arm_vhsubq_x_n_s32): Remove.
41888 (__arm_vhsubq_x_n_u8): Remove.
41889 (__arm_vhsubq_x_n_u16): Remove.
41890 (__arm_vhsubq_x_n_u32): Remove.
41891 (__arm_vhsubq_x_s8): Remove.
41892 (__arm_vhsubq_x_s16): Remove.
41893 (__arm_vhsubq_x_s32): Remove.
41894 (__arm_vhsubq_x_u8): Remove.
41895 (__arm_vhsubq_x_u16): Remove.
41896 (__arm_vhsubq_x_u32): Remove.
41897 (__arm_vhsubq): Remove.
41898 (__arm_vhaddq): Remove.
41899 (__arm_vhaddq_m): Remove.
41900 (__arm_vhsubq_m): Remove.
41901 (__arm_vhaddq_x): Remove.
41902 (__arm_vhsubq_x): Remove.
41904 (vmulhq_m): Remove.
41905 (vmulhq_x): Remove.
41906 (vmulhq_u8): Remove.
41907 (vmulhq_s8): Remove.
41908 (vmulhq_u16): Remove.
41909 (vmulhq_s16): Remove.
41910 (vmulhq_u32): Remove.
41911 (vmulhq_s32): Remove.
41912 (vmulhq_m_s8): Remove.
41913 (vmulhq_m_s32): Remove.
41914 (vmulhq_m_s16): Remove.
41915 (vmulhq_m_u8): Remove.
41916 (vmulhq_m_u32): Remove.
41917 (vmulhq_m_u16): Remove.
41918 (vmulhq_x_s8): Remove.
41919 (vmulhq_x_s16): Remove.
41920 (vmulhq_x_s32): Remove.
41921 (vmulhq_x_u8): Remove.
41922 (vmulhq_x_u16): Remove.
41923 (vmulhq_x_u32): Remove.
41924 (__arm_vmulhq_u8): Remove.
41925 (__arm_vmulhq_s8): Remove.
41926 (__arm_vmulhq_u16): Remove.
41927 (__arm_vmulhq_s16): Remove.
41928 (__arm_vmulhq_u32): Remove.
41929 (__arm_vmulhq_s32): Remove.
41930 (__arm_vmulhq_m_s8): Remove.
41931 (__arm_vmulhq_m_s32): Remove.
41932 (__arm_vmulhq_m_s16): Remove.
41933 (__arm_vmulhq_m_u8): Remove.
41934 (__arm_vmulhq_m_u32): Remove.
41935 (__arm_vmulhq_m_u16): Remove.
41936 (__arm_vmulhq_x_s8): Remove.
41937 (__arm_vmulhq_x_s16): Remove.
41938 (__arm_vmulhq_x_s32): Remove.
41939 (__arm_vmulhq_x_u8): Remove.
41940 (__arm_vmulhq_x_u16): Remove.
41941 (__arm_vmulhq_x_u32): Remove.
41942 (__arm_vmulhq): Remove.
41943 (__arm_vmulhq_m): Remove.
41944 (__arm_vmulhq_x): Remove.
41947 (vqaddq_m): Remove.
41948 (vqsubq_m): Remove.
41949 (vqsubq_u8): Remove.
41950 (vqsubq_n_u8): Remove.
41951 (vqaddq_u8): Remove.
41952 (vqaddq_n_u8): Remove.
41953 (vqsubq_s8): Remove.
41954 (vqsubq_n_s8): Remove.
41955 (vqaddq_s8): Remove.
41956 (vqaddq_n_s8): Remove.
41957 (vqsubq_u16): Remove.
41958 (vqsubq_n_u16): Remove.
41959 (vqaddq_u16): Remove.
41960 (vqaddq_n_u16): Remove.
41961 (vqsubq_s16): Remove.
41962 (vqsubq_n_s16): Remove.
41963 (vqaddq_s16): Remove.
41964 (vqaddq_n_s16): Remove.
41965 (vqsubq_u32): Remove.
41966 (vqsubq_n_u32): Remove.
41967 (vqaddq_u32): Remove.
41968 (vqaddq_n_u32): Remove.
41969 (vqsubq_s32): Remove.
41970 (vqsubq_n_s32): Remove.
41971 (vqaddq_s32): Remove.
41972 (vqaddq_n_s32): Remove.
41973 (vqaddq_m_n_s8): Remove.
41974 (vqaddq_m_n_s32): Remove.
41975 (vqaddq_m_n_s16): Remove.
41976 (vqaddq_m_n_u8): Remove.
41977 (vqaddq_m_n_u32): Remove.
41978 (vqaddq_m_n_u16): Remove.
41979 (vqaddq_m_s8): Remove.
41980 (vqaddq_m_s32): Remove.
41981 (vqaddq_m_s16): Remove.
41982 (vqaddq_m_u8): Remove.
41983 (vqaddq_m_u32): Remove.
41984 (vqaddq_m_u16): Remove.
41985 (vqsubq_m_n_s8): Remove.
41986 (vqsubq_m_n_s32): Remove.
41987 (vqsubq_m_n_s16): Remove.
41988 (vqsubq_m_n_u8): Remove.
41989 (vqsubq_m_n_u32): Remove.
41990 (vqsubq_m_n_u16): Remove.
41991 (vqsubq_m_s8): Remove.
41992 (vqsubq_m_s32): Remove.
41993 (vqsubq_m_s16): Remove.
41994 (vqsubq_m_u8): Remove.
41995 (vqsubq_m_u32): Remove.
41996 (vqsubq_m_u16): Remove.
41997 (__arm_vqsubq_u8): Remove.
41998 (__arm_vqsubq_n_u8): Remove.
41999 (__arm_vqaddq_u8): Remove.
42000 (__arm_vqaddq_n_u8): Remove.
42001 (__arm_vqsubq_s8): Remove.
42002 (__arm_vqsubq_n_s8): Remove.
42003 (__arm_vqaddq_s8): Remove.
42004 (__arm_vqaddq_n_s8): Remove.
42005 (__arm_vqsubq_u16): Remove.
42006 (__arm_vqsubq_n_u16): Remove.
42007 (__arm_vqaddq_u16): Remove.
42008 (__arm_vqaddq_n_u16): Remove.
42009 (__arm_vqsubq_s16): Remove.
42010 (__arm_vqsubq_n_s16): Remove.
42011 (__arm_vqaddq_s16): Remove.
42012 (__arm_vqaddq_n_s16): Remove.
42013 (__arm_vqsubq_u32): Remove.
42014 (__arm_vqsubq_n_u32): Remove.
42015 (__arm_vqaddq_u32): Remove.
42016 (__arm_vqaddq_n_u32): Remove.
42017 (__arm_vqsubq_s32): Remove.
42018 (__arm_vqsubq_n_s32): Remove.
42019 (__arm_vqaddq_s32): Remove.
42020 (__arm_vqaddq_n_s32): Remove.
42021 (__arm_vqaddq_m_n_s8): Remove.
42022 (__arm_vqaddq_m_n_s32): Remove.
42023 (__arm_vqaddq_m_n_s16): Remove.
42024 (__arm_vqaddq_m_n_u8): Remove.
42025 (__arm_vqaddq_m_n_u32): Remove.
42026 (__arm_vqaddq_m_n_u16): Remove.
42027 (__arm_vqaddq_m_s8): Remove.
42028 (__arm_vqaddq_m_s32): Remove.
42029 (__arm_vqaddq_m_s16): Remove.
42030 (__arm_vqaddq_m_u8): Remove.
42031 (__arm_vqaddq_m_u32): Remove.
42032 (__arm_vqaddq_m_u16): Remove.
42033 (__arm_vqsubq_m_n_s8): Remove.
42034 (__arm_vqsubq_m_n_s32): Remove.
42035 (__arm_vqsubq_m_n_s16): Remove.
42036 (__arm_vqsubq_m_n_u8): Remove.
42037 (__arm_vqsubq_m_n_u32): Remove.
42038 (__arm_vqsubq_m_n_u16): Remove.
42039 (__arm_vqsubq_m_s8): Remove.
42040 (__arm_vqsubq_m_s32): Remove.
42041 (__arm_vqsubq_m_s16): Remove.
42042 (__arm_vqsubq_m_u8): Remove.
42043 (__arm_vqsubq_m_u32): Remove.
42044 (__arm_vqsubq_m_u16): Remove.
42045 (__arm_vqsubq): Remove.
42046 (__arm_vqaddq): Remove.
42047 (__arm_vqaddq_m): Remove.
42048 (__arm_vqsubq_m): Remove.
42049 (vqdmulhq): Remove.
42050 (vqdmulhq_m): Remove.
42051 (vqdmulhq_s8): Remove.
42052 (vqdmulhq_n_s8): Remove.
42053 (vqdmulhq_s16): Remove.
42054 (vqdmulhq_n_s16): Remove.
42055 (vqdmulhq_s32): Remove.
42056 (vqdmulhq_n_s32): Remove.
42057 (vqdmulhq_m_n_s8): Remove.
42058 (vqdmulhq_m_n_s32): Remove.
42059 (vqdmulhq_m_n_s16): Remove.
42060 (vqdmulhq_m_s8): Remove.
42061 (vqdmulhq_m_s32): Remove.
42062 (vqdmulhq_m_s16): Remove.
42063 (__arm_vqdmulhq_s8): Remove.
42064 (__arm_vqdmulhq_n_s8): Remove.
42065 (__arm_vqdmulhq_s16): Remove.
42066 (__arm_vqdmulhq_n_s16): Remove.
42067 (__arm_vqdmulhq_s32): Remove.
42068 (__arm_vqdmulhq_n_s32): Remove.
42069 (__arm_vqdmulhq_m_n_s8): Remove.
42070 (__arm_vqdmulhq_m_n_s32): Remove.
42071 (__arm_vqdmulhq_m_n_s16): Remove.
42072 (__arm_vqdmulhq_m_s8): Remove.
42073 (__arm_vqdmulhq_m_s32): Remove.
42074 (__arm_vqdmulhq_m_s16): Remove.
42075 (__arm_vqdmulhq): Remove.
42076 (__arm_vqdmulhq_m): Remove.
42078 (vrhaddq_m): Remove.
42079 (vrhaddq_x): Remove.
42080 (vrhaddq_u8): Remove.
42081 (vrhaddq_s8): Remove.
42082 (vrhaddq_u16): Remove.
42083 (vrhaddq_s16): Remove.
42084 (vrhaddq_u32): Remove.
42085 (vrhaddq_s32): Remove.
42086 (vrhaddq_m_s8): Remove.
42087 (vrhaddq_m_s32): Remove.
42088 (vrhaddq_m_s16): Remove.
42089 (vrhaddq_m_u8): Remove.
42090 (vrhaddq_m_u32): Remove.
42091 (vrhaddq_m_u16): Remove.
42092 (vrhaddq_x_s8): Remove.
42093 (vrhaddq_x_s16): Remove.
42094 (vrhaddq_x_s32): Remove.
42095 (vrhaddq_x_u8): Remove.
42096 (vrhaddq_x_u16): Remove.
42097 (vrhaddq_x_u32): Remove.
42098 (__arm_vrhaddq_u8): Remove.
42099 (__arm_vrhaddq_s8): Remove.
42100 (__arm_vrhaddq_u16): Remove.
42101 (__arm_vrhaddq_s16): Remove.
42102 (__arm_vrhaddq_u32): Remove.
42103 (__arm_vrhaddq_s32): Remove.
42104 (__arm_vrhaddq_m_s8): Remove.
42105 (__arm_vrhaddq_m_s32): Remove.
42106 (__arm_vrhaddq_m_s16): Remove.
42107 (__arm_vrhaddq_m_u8): Remove.
42108 (__arm_vrhaddq_m_u32): Remove.
42109 (__arm_vrhaddq_m_u16): Remove.
42110 (__arm_vrhaddq_x_s8): Remove.
42111 (__arm_vrhaddq_x_s16): Remove.
42112 (__arm_vrhaddq_x_s32): Remove.
42113 (__arm_vrhaddq_x_u8): Remove.
42114 (__arm_vrhaddq_x_u16): Remove.
42115 (__arm_vrhaddq_x_u32): Remove.
42116 (__arm_vrhaddq): Remove.
42117 (__arm_vrhaddq_m): Remove.
42118 (__arm_vrhaddq_x): Remove.
42120 (vrmulhq_m): Remove.
42121 (vrmulhq_x): Remove.
42122 (vrmulhq_u8): Remove.
42123 (vrmulhq_s8): Remove.
42124 (vrmulhq_u16): Remove.
42125 (vrmulhq_s16): Remove.
42126 (vrmulhq_u32): Remove.
42127 (vrmulhq_s32): Remove.
42128 (vrmulhq_m_s8): Remove.
42129 (vrmulhq_m_s32): Remove.
42130 (vrmulhq_m_s16): Remove.
42131 (vrmulhq_m_u8): Remove.
42132 (vrmulhq_m_u32): Remove.
42133 (vrmulhq_m_u16): Remove.
42134 (vrmulhq_x_s8): Remove.
42135 (vrmulhq_x_s16): Remove.
42136 (vrmulhq_x_s32): Remove.
42137 (vrmulhq_x_u8): Remove.
42138 (vrmulhq_x_u16): Remove.
42139 (vrmulhq_x_u32): Remove.
42140 (__arm_vrmulhq_u8): Remove.
42141 (__arm_vrmulhq_s8): Remove.
42142 (__arm_vrmulhq_u16): Remove.
42143 (__arm_vrmulhq_s16): Remove.
42144 (__arm_vrmulhq_u32): Remove.
42145 (__arm_vrmulhq_s32): Remove.
42146 (__arm_vrmulhq_m_s8): Remove.
42147 (__arm_vrmulhq_m_s32): Remove.
42148 (__arm_vrmulhq_m_s16): Remove.
42149 (__arm_vrmulhq_m_u8): Remove.
42150 (__arm_vrmulhq_m_u32): Remove.
42151 (__arm_vrmulhq_m_u16): Remove.
42152 (__arm_vrmulhq_x_s8): Remove.
42153 (__arm_vrmulhq_x_s16): Remove.
42154 (__arm_vrmulhq_x_s32): Remove.
42155 (__arm_vrmulhq_x_u8): Remove.
42156 (__arm_vrmulhq_x_u16): Remove.
42157 (__arm_vrmulhq_x_u32): Remove.
42158 (__arm_vrmulhq): Remove.
42159 (__arm_vrmulhq_m): Remove.
42160 (__arm_vrmulhq_x): Remove.
42162 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42164 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
42165 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
42166 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
42167 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
42168 * config/arm/mve.md (mve_vabdq_<supf><mode>)
42169 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
42170 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
42171 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
42172 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
42173 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
42174 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
42176 (@mve_<mve_insn>q_<supf><mode>): ... this.
42177 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
42178 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
42179 gen_mve_vhaddq / gen_mve_vrhaddq.
42181 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42183 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
42184 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
42185 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
42186 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
42187 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
42188 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
42189 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
42190 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
42191 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
42192 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
42193 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
42194 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
42195 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
42197 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42199 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
42200 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
42202 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
42203 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
42204 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
42205 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
42206 (mve_vqsubq_n_<supf><mode>): Merge into ...
42207 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
42209 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42211 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
42212 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
42213 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
42214 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
42215 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
42216 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
42217 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
42218 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
42219 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
42220 (mve_vshlq_m_<supf><mode>): Merged into
42221 @mve_<mve_insn>q_m_<supf><mode>.
42222 (mve_vabdq_m_<supf><mode>): Likewise.
42223 (mve_vhaddq_m_<supf><mode>): Likewise.
42224 (mve_vhsubq_m_<supf><mode>): Likewise.
42225 (mve_vmaxq_m_<supf><mode>): Likewise.
42226 (mve_vminq_m_<supf><mode>): Likewise.
42227 (mve_vmulhq_m_<supf><mode>): Likewise.
42228 (mve_vqaddq_m_<supf><mode>): Likewise.
42229 (mve_vqrshlq_m_<supf><mode>): Likewise.
42230 (mve_vqshlq_m_<supf><mode>): Likewise.
42231 (mve_vqsubq_m_<supf><mode>): Likewise.
42232 (mve_vrhaddq_m_<supf><mode>): Likewise.
42233 (mve_vrmulhq_m_<supf><mode>): Likewise.
42234 (mve_vrshlq_m_<supf><mode>): Likewise.
42235 (mve_vqdmladhq_m_s<mode>): Likewise.
42236 (mve_vqdmladhxq_m_s<mode>): Likewise.
42237 (mve_vqdmlsdhq_m_s<mode>): Likewise.
42238 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
42239 (mve_vqdmulhq_m_s<mode>): Likewise.
42240 (mve_vqrdmladhq_m_s<mode>): Likewise.
42241 (mve_vqrdmladhxq_m_s<mode>): Likewise.
42242 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
42243 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
42244 (mve_vqrdmulhq_m_s<mode>): Likewise.
42246 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42248 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
42249 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
42250 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
42251 * config/arm/arm_mve.h (vcreateq_f16): Remove.
42252 (vcreateq_f32): Remove.
42253 (vcreateq_u8): Remove.
42254 (vcreateq_u16): Remove.
42255 (vcreateq_u32): Remove.
42256 (vcreateq_u64): Remove.
42257 (vcreateq_s8): Remove.
42258 (vcreateq_s16): Remove.
42259 (vcreateq_s32): Remove.
42260 (vcreateq_s64): Remove.
42261 (__arm_vcreateq_u8): Remove.
42262 (__arm_vcreateq_u16): Remove.
42263 (__arm_vcreateq_u32): Remove.
42264 (__arm_vcreateq_u64): Remove.
42265 (__arm_vcreateq_s8): Remove.
42266 (__arm_vcreateq_s16): Remove.
42267 (__arm_vcreateq_s32): Remove.
42268 (__arm_vcreateq_s64): Remove.
42269 (__arm_vcreateq_f16): Remove.
42270 (__arm_vcreateq_f32): Remove.
42272 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42274 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
42275 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
42276 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
42277 (@mve_<mve_insn>q_f<mode>): ... this.
42278 (mve_vcreateq_<supf><mode>): Rename into ...
42279 (@mve_<mve_insn>q_<supf><mode>): ... this.
42281 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42283 * config/arm/arm-mve-builtins-shapes.cc (create): New.
42284 * config/arm/arm-mve-builtins-shapes.h: (create): New.
42286 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42288 * config/arm/arm-mve-builtins-functions.h (class
42289 unspec_mve_function_exact_insn): New.
42291 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42293 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
42295 * config/arm/arm-mve-builtins-base.def (vorrq): New.
42296 * config/arm/arm-mve-builtins-base.h (vorrq): New.
42297 * config/arm/arm-mve-builtins.cc
42298 (function_instance::has_inactive_argument): Handle vorrq.
42299 * config/arm/arm_mve.h (vorrq): Remove.
42300 (vorrq_m_n): Remove.
42303 (vorrq_u8): Remove.
42304 (vorrq_s8): Remove.
42305 (vorrq_u16): Remove.
42306 (vorrq_s16): Remove.
42307 (vorrq_u32): Remove.
42308 (vorrq_s32): Remove.
42309 (vorrq_n_u16): Remove.
42310 (vorrq_f16): Remove.
42311 (vorrq_n_s16): Remove.
42312 (vorrq_n_u32): Remove.
42313 (vorrq_f32): Remove.
42314 (vorrq_n_s32): Remove.
42315 (vorrq_m_n_s16): Remove.
42316 (vorrq_m_n_u16): Remove.
42317 (vorrq_m_n_s32): Remove.
42318 (vorrq_m_n_u32): Remove.
42319 (vorrq_m_s8): Remove.
42320 (vorrq_m_s32): Remove.
42321 (vorrq_m_s16): Remove.
42322 (vorrq_m_u8): Remove.
42323 (vorrq_m_u32): Remove.
42324 (vorrq_m_u16): Remove.
42325 (vorrq_m_f32): Remove.
42326 (vorrq_m_f16): Remove.
42327 (vorrq_x_s8): Remove.
42328 (vorrq_x_s16): Remove.
42329 (vorrq_x_s32): Remove.
42330 (vorrq_x_u8): Remove.
42331 (vorrq_x_u16): Remove.
42332 (vorrq_x_u32): Remove.
42333 (vorrq_x_f16): Remove.
42334 (vorrq_x_f32): Remove.
42335 (__arm_vorrq_u8): Remove.
42336 (__arm_vorrq_s8): Remove.
42337 (__arm_vorrq_u16): Remove.
42338 (__arm_vorrq_s16): Remove.
42339 (__arm_vorrq_u32): Remove.
42340 (__arm_vorrq_s32): Remove.
42341 (__arm_vorrq_n_u16): Remove.
42342 (__arm_vorrq_n_s16): Remove.
42343 (__arm_vorrq_n_u32): Remove.
42344 (__arm_vorrq_n_s32): Remove.
42345 (__arm_vorrq_m_n_s16): Remove.
42346 (__arm_vorrq_m_n_u16): Remove.
42347 (__arm_vorrq_m_n_s32): Remove.
42348 (__arm_vorrq_m_n_u32): Remove.
42349 (__arm_vorrq_m_s8): Remove.
42350 (__arm_vorrq_m_s32): Remove.
42351 (__arm_vorrq_m_s16): Remove.
42352 (__arm_vorrq_m_u8): Remove.
42353 (__arm_vorrq_m_u32): Remove.
42354 (__arm_vorrq_m_u16): Remove.
42355 (__arm_vorrq_x_s8): Remove.
42356 (__arm_vorrq_x_s16): Remove.
42357 (__arm_vorrq_x_s32): Remove.
42358 (__arm_vorrq_x_u8): Remove.
42359 (__arm_vorrq_x_u16): Remove.
42360 (__arm_vorrq_x_u32): Remove.
42361 (__arm_vorrq_f16): Remove.
42362 (__arm_vorrq_f32): Remove.
42363 (__arm_vorrq_m_f32): Remove.
42364 (__arm_vorrq_m_f16): Remove.
42365 (__arm_vorrq_x_f16): Remove.
42366 (__arm_vorrq_x_f32): Remove.
42367 (__arm_vorrq): Remove.
42368 (__arm_vorrq_m_n): Remove.
42369 (__arm_vorrq_m): Remove.
42370 (__arm_vorrq_x): Remove.
42372 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42374 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
42375 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
42376 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
42377 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
42379 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42381 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
42382 (vandq,veorq): New.
42383 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
42384 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
42385 * config/arm/arm_mve.h (vandq): Remove.
42388 (vandq_u8): Remove.
42389 (vandq_s8): Remove.
42390 (vandq_u16): Remove.
42391 (vandq_s16): Remove.
42392 (vandq_u32): Remove.
42393 (vandq_s32): Remove.
42394 (vandq_f16): Remove.
42395 (vandq_f32): Remove.
42396 (vandq_m_s8): Remove.
42397 (vandq_m_s32): Remove.
42398 (vandq_m_s16): Remove.
42399 (vandq_m_u8): Remove.
42400 (vandq_m_u32): Remove.
42401 (vandq_m_u16): Remove.
42402 (vandq_m_f32): Remove.
42403 (vandq_m_f16): Remove.
42404 (vandq_x_s8): Remove.
42405 (vandq_x_s16): Remove.
42406 (vandq_x_s32): Remove.
42407 (vandq_x_u8): Remove.
42408 (vandq_x_u16): Remove.
42409 (vandq_x_u32): Remove.
42410 (vandq_x_f16): Remove.
42411 (vandq_x_f32): Remove.
42412 (__arm_vandq_u8): Remove.
42413 (__arm_vandq_s8): Remove.
42414 (__arm_vandq_u16): Remove.
42415 (__arm_vandq_s16): Remove.
42416 (__arm_vandq_u32): Remove.
42417 (__arm_vandq_s32): Remove.
42418 (__arm_vandq_m_s8): Remove.
42419 (__arm_vandq_m_s32): Remove.
42420 (__arm_vandq_m_s16): Remove.
42421 (__arm_vandq_m_u8): Remove.
42422 (__arm_vandq_m_u32): Remove.
42423 (__arm_vandq_m_u16): Remove.
42424 (__arm_vandq_x_s8): Remove.
42425 (__arm_vandq_x_s16): Remove.
42426 (__arm_vandq_x_s32): Remove.
42427 (__arm_vandq_x_u8): Remove.
42428 (__arm_vandq_x_u16): Remove.
42429 (__arm_vandq_x_u32): Remove.
42430 (__arm_vandq_f16): Remove.
42431 (__arm_vandq_f32): Remove.
42432 (__arm_vandq_m_f32): Remove.
42433 (__arm_vandq_m_f16): Remove.
42434 (__arm_vandq_x_f16): Remove.
42435 (__arm_vandq_x_f32): Remove.
42436 (__arm_vandq): Remove.
42437 (__arm_vandq_m): Remove.
42438 (__arm_vandq_x): Remove.
42441 (veorq_u8): Remove.
42442 (veorq_s8): Remove.
42443 (veorq_u16): Remove.
42444 (veorq_s16): Remove.
42445 (veorq_u32): Remove.
42446 (veorq_s32): Remove.
42447 (veorq_f16): Remove.
42448 (veorq_f32): Remove.
42449 (veorq_m_s8): Remove.
42450 (veorq_m_s32): Remove.
42451 (veorq_m_s16): Remove.
42452 (veorq_m_u8): Remove.
42453 (veorq_m_u32): Remove.
42454 (veorq_m_u16): Remove.
42455 (veorq_m_f32): Remove.
42456 (veorq_m_f16): Remove.
42457 (veorq_x_s8): Remove.
42458 (veorq_x_s16): Remove.
42459 (veorq_x_s32): Remove.
42460 (veorq_x_u8): Remove.
42461 (veorq_x_u16): Remove.
42462 (veorq_x_u32): Remove.
42463 (veorq_x_f16): Remove.
42464 (veorq_x_f32): Remove.
42465 (__arm_veorq_u8): Remove.
42466 (__arm_veorq_s8): Remove.
42467 (__arm_veorq_u16): Remove.
42468 (__arm_veorq_s16): Remove.
42469 (__arm_veorq_u32): Remove.
42470 (__arm_veorq_s32): Remove.
42471 (__arm_veorq_m_s8): Remove.
42472 (__arm_veorq_m_s32): Remove.
42473 (__arm_veorq_m_s16): Remove.
42474 (__arm_veorq_m_u8): Remove.
42475 (__arm_veorq_m_u32): Remove.
42476 (__arm_veorq_m_u16): Remove.
42477 (__arm_veorq_x_s8): Remove.
42478 (__arm_veorq_x_s16): Remove.
42479 (__arm_veorq_x_s32): Remove.
42480 (__arm_veorq_x_u8): Remove.
42481 (__arm_veorq_x_u16): Remove.
42482 (__arm_veorq_x_u32): Remove.
42483 (__arm_veorq_f16): Remove.
42484 (__arm_veorq_f32): Remove.
42485 (__arm_veorq_m_f32): Remove.
42486 (__arm_veorq_m_f16): Remove.
42487 (__arm_veorq_x_f16): Remove.
42488 (__arm_veorq_x_f32): Remove.
42489 (__arm_veorq): Remove.
42490 (__arm_veorq_m): Remove.
42491 (__arm_veorq_x): Remove.
42493 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42495 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
42496 (MVE_FP_M_BINARY_LOGIC): New.
42497 (MVE_INT_M_N_BINARY_LOGIC): New.
42498 (MVE_INT_N_BINARY_LOGIC): New.
42499 (mve_insn): Add vand, veor, vorr, vbic.
42500 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
42501 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
42502 (mve_vbicq_m_<supf><mode>): Merge into ...
42503 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
42504 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
42505 (mve_vbicq_m_f<mode>): Merge into ...
42506 (@mve_<mve_insn>q_m_f<mode>): ... this.
42507 (mve_vorrq_n_<supf><mode>)
42508 (mve_vbicq_n_<supf><mode>): Merge into ...
42509 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
42510 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
42512 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
42514 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42516 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
42517 * config/arm/arm-mve-builtins-shapes.h (binary): New.
42519 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42521 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
42523 (vaddq, vmulq, vsubq): New.
42524 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
42525 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
42526 * config/arm/arm_mve.h (vaddq): Remove.
42529 (vaddq_n_u8): Remove.
42530 (vaddq_n_s8): Remove.
42531 (vaddq_n_u16): Remove.
42532 (vaddq_n_s16): Remove.
42533 (vaddq_n_u32): Remove.
42534 (vaddq_n_s32): Remove.
42535 (vaddq_n_f16): Remove.
42536 (vaddq_n_f32): Remove.
42537 (vaddq_m_n_s8): Remove.
42538 (vaddq_m_n_s32): Remove.
42539 (vaddq_m_n_s16): Remove.
42540 (vaddq_m_n_u8): Remove.
42541 (vaddq_m_n_u32): Remove.
42542 (vaddq_m_n_u16): Remove.
42543 (vaddq_m_s8): Remove.
42544 (vaddq_m_s32): Remove.
42545 (vaddq_m_s16): Remove.
42546 (vaddq_m_u8): Remove.
42547 (vaddq_m_u32): Remove.
42548 (vaddq_m_u16): Remove.
42549 (vaddq_m_f32): Remove.
42550 (vaddq_m_f16): Remove.
42551 (vaddq_m_n_f32): Remove.
42552 (vaddq_m_n_f16): Remove.
42553 (vaddq_s8): Remove.
42554 (vaddq_s16): Remove.
42555 (vaddq_s32): Remove.
42556 (vaddq_u8): Remove.
42557 (vaddq_u16): Remove.
42558 (vaddq_u32): Remove.
42559 (vaddq_f16): Remove.
42560 (vaddq_f32): Remove.
42561 (vaddq_x_s8): Remove.
42562 (vaddq_x_s16): Remove.
42563 (vaddq_x_s32): Remove.
42564 (vaddq_x_n_s8): Remove.
42565 (vaddq_x_n_s16): Remove.
42566 (vaddq_x_n_s32): Remove.
42567 (vaddq_x_u8): Remove.
42568 (vaddq_x_u16): Remove.
42569 (vaddq_x_u32): Remove.
42570 (vaddq_x_n_u8): Remove.
42571 (vaddq_x_n_u16): Remove.
42572 (vaddq_x_n_u32): Remove.
42573 (vaddq_x_f16): Remove.
42574 (vaddq_x_f32): Remove.
42575 (vaddq_x_n_f16): Remove.
42576 (vaddq_x_n_f32): Remove.
42577 (__arm_vaddq_n_u8): Remove.
42578 (__arm_vaddq_n_s8): Remove.
42579 (__arm_vaddq_n_u16): Remove.
42580 (__arm_vaddq_n_s16): Remove.
42581 (__arm_vaddq_n_u32): Remove.
42582 (__arm_vaddq_n_s32): Remove.
42583 (__arm_vaddq_m_n_s8): Remove.
42584 (__arm_vaddq_m_n_s32): Remove.
42585 (__arm_vaddq_m_n_s16): Remove.
42586 (__arm_vaddq_m_n_u8): Remove.
42587 (__arm_vaddq_m_n_u32): Remove.
42588 (__arm_vaddq_m_n_u16): Remove.
42589 (__arm_vaddq_m_s8): Remove.
42590 (__arm_vaddq_m_s32): Remove.
42591 (__arm_vaddq_m_s16): Remove.
42592 (__arm_vaddq_m_u8): Remove.
42593 (__arm_vaddq_m_u32): Remove.
42594 (__arm_vaddq_m_u16): Remove.
42595 (__arm_vaddq_s8): Remove.
42596 (__arm_vaddq_s16): Remove.
42597 (__arm_vaddq_s32): Remove.
42598 (__arm_vaddq_u8): Remove.
42599 (__arm_vaddq_u16): Remove.
42600 (__arm_vaddq_u32): Remove.
42601 (__arm_vaddq_x_s8): Remove.
42602 (__arm_vaddq_x_s16): Remove.
42603 (__arm_vaddq_x_s32): Remove.
42604 (__arm_vaddq_x_n_s8): Remove.
42605 (__arm_vaddq_x_n_s16): Remove.
42606 (__arm_vaddq_x_n_s32): Remove.
42607 (__arm_vaddq_x_u8): Remove.
42608 (__arm_vaddq_x_u16): Remove.
42609 (__arm_vaddq_x_u32): Remove.
42610 (__arm_vaddq_x_n_u8): Remove.
42611 (__arm_vaddq_x_n_u16): Remove.
42612 (__arm_vaddq_x_n_u32): Remove.
42613 (__arm_vaddq_n_f16): Remove.
42614 (__arm_vaddq_n_f32): Remove.
42615 (__arm_vaddq_m_f32): Remove.
42616 (__arm_vaddq_m_f16): Remove.
42617 (__arm_vaddq_m_n_f32): Remove.
42618 (__arm_vaddq_m_n_f16): Remove.
42619 (__arm_vaddq_f16): Remove.
42620 (__arm_vaddq_f32): Remove.
42621 (__arm_vaddq_x_f16): Remove.
42622 (__arm_vaddq_x_f32): Remove.
42623 (__arm_vaddq_x_n_f16): Remove.
42624 (__arm_vaddq_x_n_f32): Remove.
42625 (__arm_vaddq): Remove.
42626 (__arm_vaddq_m): Remove.
42627 (__arm_vaddq_x): Remove.
42631 (vmulq_u8): Remove.
42632 (vmulq_n_u8): Remove.
42633 (vmulq_s8): Remove.
42634 (vmulq_n_s8): Remove.
42635 (vmulq_u16): Remove.
42636 (vmulq_n_u16): Remove.
42637 (vmulq_s16): Remove.
42638 (vmulq_n_s16): Remove.
42639 (vmulq_u32): Remove.
42640 (vmulq_n_u32): Remove.
42641 (vmulq_s32): Remove.
42642 (vmulq_n_s32): Remove.
42643 (vmulq_n_f16): Remove.
42644 (vmulq_f16): Remove.
42645 (vmulq_n_f32): Remove.
42646 (vmulq_f32): Remove.
42647 (vmulq_m_n_s8): Remove.
42648 (vmulq_m_n_s32): Remove.
42649 (vmulq_m_n_s16): Remove.
42650 (vmulq_m_n_u8): Remove.
42651 (vmulq_m_n_u32): Remove.
42652 (vmulq_m_n_u16): Remove.
42653 (vmulq_m_s8): Remove.
42654 (vmulq_m_s32): Remove.
42655 (vmulq_m_s16): Remove.
42656 (vmulq_m_u8): Remove.
42657 (vmulq_m_u32): Remove.
42658 (vmulq_m_u16): Remove.
42659 (vmulq_m_f32): Remove.
42660 (vmulq_m_f16): Remove.
42661 (vmulq_m_n_f32): Remove.
42662 (vmulq_m_n_f16): Remove.
42663 (vmulq_x_s8): Remove.
42664 (vmulq_x_s16): Remove.
42665 (vmulq_x_s32): Remove.
42666 (vmulq_x_n_s8): Remove.
42667 (vmulq_x_n_s16): Remove.
42668 (vmulq_x_n_s32): Remove.
42669 (vmulq_x_u8): Remove.
42670 (vmulq_x_u16): Remove.
42671 (vmulq_x_u32): Remove.
42672 (vmulq_x_n_u8): Remove.
42673 (vmulq_x_n_u16): Remove.
42674 (vmulq_x_n_u32): Remove.
42675 (vmulq_x_f16): Remove.
42676 (vmulq_x_f32): Remove.
42677 (vmulq_x_n_f16): Remove.
42678 (vmulq_x_n_f32): Remove.
42679 (__arm_vmulq_u8): Remove.
42680 (__arm_vmulq_n_u8): Remove.
42681 (__arm_vmulq_s8): Remove.
42682 (__arm_vmulq_n_s8): Remove.
42683 (__arm_vmulq_u16): Remove.
42684 (__arm_vmulq_n_u16): Remove.
42685 (__arm_vmulq_s16): Remove.
42686 (__arm_vmulq_n_s16): Remove.
42687 (__arm_vmulq_u32): Remove.
42688 (__arm_vmulq_n_u32): Remove.
42689 (__arm_vmulq_s32): Remove.
42690 (__arm_vmulq_n_s32): Remove.
42691 (__arm_vmulq_m_n_s8): Remove.
42692 (__arm_vmulq_m_n_s32): Remove.
42693 (__arm_vmulq_m_n_s16): Remove.
42694 (__arm_vmulq_m_n_u8): Remove.
42695 (__arm_vmulq_m_n_u32): Remove.
42696 (__arm_vmulq_m_n_u16): Remove.
42697 (__arm_vmulq_m_s8): Remove.
42698 (__arm_vmulq_m_s32): Remove.
42699 (__arm_vmulq_m_s16): Remove.
42700 (__arm_vmulq_m_u8): Remove.
42701 (__arm_vmulq_m_u32): Remove.
42702 (__arm_vmulq_m_u16): Remove.
42703 (__arm_vmulq_x_s8): Remove.
42704 (__arm_vmulq_x_s16): Remove.
42705 (__arm_vmulq_x_s32): Remove.
42706 (__arm_vmulq_x_n_s8): Remove.
42707 (__arm_vmulq_x_n_s16): Remove.
42708 (__arm_vmulq_x_n_s32): Remove.
42709 (__arm_vmulq_x_u8): Remove.
42710 (__arm_vmulq_x_u16): Remove.
42711 (__arm_vmulq_x_u32): Remove.
42712 (__arm_vmulq_x_n_u8): Remove.
42713 (__arm_vmulq_x_n_u16): Remove.
42714 (__arm_vmulq_x_n_u32): Remove.
42715 (__arm_vmulq_n_f16): Remove.
42716 (__arm_vmulq_f16): Remove.
42717 (__arm_vmulq_n_f32): Remove.
42718 (__arm_vmulq_f32): Remove.
42719 (__arm_vmulq_m_f32): Remove.
42720 (__arm_vmulq_m_f16): Remove.
42721 (__arm_vmulq_m_n_f32): Remove.
42722 (__arm_vmulq_m_n_f16): Remove.
42723 (__arm_vmulq_x_f16): Remove.
42724 (__arm_vmulq_x_f32): Remove.
42725 (__arm_vmulq_x_n_f16): Remove.
42726 (__arm_vmulq_x_n_f32): Remove.
42727 (__arm_vmulq): Remove.
42728 (__arm_vmulq_m): Remove.
42729 (__arm_vmulq_x): Remove.
42733 (vsubq_n_f16): Remove.
42734 (vsubq_n_f32): Remove.
42735 (vsubq_u8): Remove.
42736 (vsubq_n_u8): Remove.
42737 (vsubq_s8): Remove.
42738 (vsubq_n_s8): Remove.
42739 (vsubq_u16): Remove.
42740 (vsubq_n_u16): Remove.
42741 (vsubq_s16): Remove.
42742 (vsubq_n_s16): Remove.
42743 (vsubq_u32): Remove.
42744 (vsubq_n_u32): Remove.
42745 (vsubq_s32): Remove.
42746 (vsubq_n_s32): Remove.
42747 (vsubq_f16): Remove.
42748 (vsubq_f32): Remove.
42749 (vsubq_m_s8): Remove.
42750 (vsubq_m_u8): Remove.
42751 (vsubq_m_s16): Remove.
42752 (vsubq_m_u16): Remove.
42753 (vsubq_m_s32): Remove.
42754 (vsubq_m_u32): Remove.
42755 (vsubq_m_n_s8): Remove.
42756 (vsubq_m_n_s32): Remove.
42757 (vsubq_m_n_s16): Remove.
42758 (vsubq_m_n_u8): Remove.
42759 (vsubq_m_n_u32): Remove.
42760 (vsubq_m_n_u16): Remove.
42761 (vsubq_m_f32): Remove.
42762 (vsubq_m_f16): Remove.
42763 (vsubq_m_n_f32): Remove.
42764 (vsubq_m_n_f16): Remove.
42765 (vsubq_x_s8): Remove.
42766 (vsubq_x_s16): Remove.
42767 (vsubq_x_s32): Remove.
42768 (vsubq_x_n_s8): Remove.
42769 (vsubq_x_n_s16): Remove.
42770 (vsubq_x_n_s32): Remove.
42771 (vsubq_x_u8): Remove.
42772 (vsubq_x_u16): Remove.
42773 (vsubq_x_u32): Remove.
42774 (vsubq_x_n_u8): Remove.
42775 (vsubq_x_n_u16): Remove.
42776 (vsubq_x_n_u32): Remove.
42777 (vsubq_x_f16): Remove.
42778 (vsubq_x_f32): Remove.
42779 (vsubq_x_n_f16): Remove.
42780 (vsubq_x_n_f32): Remove.
42781 (__arm_vsubq_u8): Remove.
42782 (__arm_vsubq_n_u8): Remove.
42783 (__arm_vsubq_s8): Remove.
42784 (__arm_vsubq_n_s8): Remove.
42785 (__arm_vsubq_u16): Remove.
42786 (__arm_vsubq_n_u16): Remove.
42787 (__arm_vsubq_s16): Remove.
42788 (__arm_vsubq_n_s16): Remove.
42789 (__arm_vsubq_u32): Remove.
42790 (__arm_vsubq_n_u32): Remove.
42791 (__arm_vsubq_s32): Remove.
42792 (__arm_vsubq_n_s32): Remove.
42793 (__arm_vsubq_m_s8): Remove.
42794 (__arm_vsubq_m_u8): Remove.
42795 (__arm_vsubq_m_s16): Remove.
42796 (__arm_vsubq_m_u16): Remove.
42797 (__arm_vsubq_m_s32): Remove.
42798 (__arm_vsubq_m_u32): Remove.
42799 (__arm_vsubq_m_n_s8): Remove.
42800 (__arm_vsubq_m_n_s32): Remove.
42801 (__arm_vsubq_m_n_s16): Remove.
42802 (__arm_vsubq_m_n_u8): Remove.
42803 (__arm_vsubq_m_n_u32): Remove.
42804 (__arm_vsubq_m_n_u16): Remove.
42805 (__arm_vsubq_x_s8): Remove.
42806 (__arm_vsubq_x_s16): Remove.
42807 (__arm_vsubq_x_s32): Remove.
42808 (__arm_vsubq_x_n_s8): Remove.
42809 (__arm_vsubq_x_n_s16): Remove.
42810 (__arm_vsubq_x_n_s32): Remove.
42811 (__arm_vsubq_x_u8): Remove.
42812 (__arm_vsubq_x_u16): Remove.
42813 (__arm_vsubq_x_u32): Remove.
42814 (__arm_vsubq_x_n_u8): Remove.
42815 (__arm_vsubq_x_n_u16): Remove.
42816 (__arm_vsubq_x_n_u32): Remove.
42817 (__arm_vsubq_n_f16): Remove.
42818 (__arm_vsubq_n_f32): Remove.
42819 (__arm_vsubq_f16): Remove.
42820 (__arm_vsubq_f32): Remove.
42821 (__arm_vsubq_m_f32): Remove.
42822 (__arm_vsubq_m_f16): Remove.
42823 (__arm_vsubq_m_n_f32): Remove.
42824 (__arm_vsubq_m_n_f16): Remove.
42825 (__arm_vsubq_x_f16): Remove.
42826 (__arm_vsubq_x_f32): Remove.
42827 (__arm_vsubq_x_n_f16): Remove.
42828 (__arm_vsubq_x_n_f32): Remove.
42829 (__arm_vsubq): Remove.
42830 (__arm_vsubq_m): Remove.
42831 (__arm_vsubq_x): Remove.
42832 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
42834 (vmulq_u, vmulq_s, vmulq_f): Remove.
42835 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
42836 (mve_vmulq_<supf><mode>): Remove.
42838 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42840 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
42841 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
42842 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
42844 * config/arm/mve.md
42845 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
42847 (@mve_<mve_insn>q_n_f<mode>): ... this.
42848 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
42849 (mve_vsubq_n_<supf><mode>): Factorize into ...
42850 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
42851 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
42853 (mve_<mve_addsubmul>q<mode>): ... this.
42854 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
42856 (mve_<mve_addsubmul>q_f<mode>): ... this.
42857 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
42858 (mve_vsubq_m_<supf><mode>): Factorize into ...
42859 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
42860 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
42861 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
42862 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
42863 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
42865 (@mve_<mve_insn>q_m_f<mode>): ... this.
42866 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
42867 (mve_vsubq_m_n_f<mode>): Factorize into ...
42868 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
42870 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42872 * config/arm/arm-mve-builtins-functions.h (class
42873 unspec_based_mve_function_base): New.
42874 (class unspec_based_mve_function_exact_insn): New.
42876 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42878 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
42879 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
42881 2023-05-03 Murray Steele <murray.steele@arm.com>
42882 Christophe Lyon <christophe.lyon@arm.com>
42884 * config/arm/arm-mve-builtins-base.cc (class
42885 vuninitializedq_impl): New.
42886 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
42887 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
42889 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
42890 * config/arm/arm-mve-builtins-shapes.h (inherent): New
42892 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
42893 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
42894 (__arm_vuninitializedq_u8): Remove.
42895 (__arm_vuninitializedq_u16): Remove.
42896 (__arm_vuninitializedq_u32): Remove.
42897 (__arm_vuninitializedq_u64): Remove.
42898 (__arm_vuninitializedq_s8): Remove.
42899 (__arm_vuninitializedq_s16): Remove.
42900 (__arm_vuninitializedq_s32): Remove.
42901 (__arm_vuninitializedq_s64): Remove.
42902 (__arm_vuninitializedq_f16): Remove.
42903 (__arm_vuninitializedq_f32): Remove.
42905 2023-05-03 Murray Steele <murray.steele@arm.com>
42906 Christophe Lyon <christophe.lyon@arm.com>
42908 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
42909 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
42910 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
42911 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
42912 (parse_type): Likewise.
42913 (parse_signature): Likewise.
42914 (build_one): Likewise.
42915 (build_all): Likewise.
42916 (overloaded_base): New struct.
42917 (unary_convert_def): Likewise.
42918 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
42919 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
42921 (TYPES_reinterpret_unsigned1): Likewise.
42922 (TYPES_reinterpret_integer): Likewise.
42923 (TYPES_reinterpret_integer1): Likewise.
42924 (TYPES_reinterpret_float1): Likewise.
42925 (TYPES_reinterpret_float): Likewise.
42926 (reinterpret_integer): New.
42927 (reinterpret_float): New.
42928 (handle_arm_mve_h): Register builtins.
42929 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
42930 (vreinterpretq_s32): Likewise.
42931 (vreinterpretq_s64): Likewise.
42932 (vreinterpretq_s8): Likewise.
42933 (vreinterpretq_u16): Likewise.
42934 (vreinterpretq_u32): Likewise.
42935 (vreinterpretq_u64): Likewise.
42936 (vreinterpretq_u8): Likewise.
42937 (vreinterpretq_f16): Likewise.
42938 (vreinterpretq_f32): Likewise.
42939 (vreinterpretq_s16_s32): Likewise.
42940 (vreinterpretq_s16_s64): Likewise.
42941 (vreinterpretq_s16_s8): Likewise.
42942 (vreinterpretq_s16_u16): Likewise.
42943 (vreinterpretq_s16_u32): Likewise.
42944 (vreinterpretq_s16_u64): Likewise.
42945 (vreinterpretq_s16_u8): Likewise.
42946 (vreinterpretq_s32_s16): Likewise.
42947 (vreinterpretq_s32_s64): Likewise.
42948 (vreinterpretq_s32_s8): Likewise.
42949 (vreinterpretq_s32_u16): Likewise.
42950 (vreinterpretq_s32_u32): Likewise.
42951 (vreinterpretq_s32_u64): Likewise.
42952 (vreinterpretq_s32_u8): Likewise.
42953 (vreinterpretq_s64_s16): Likewise.
42954 (vreinterpretq_s64_s32): Likewise.
42955 (vreinterpretq_s64_s8): Likewise.
42956 (vreinterpretq_s64_u16): Likewise.
42957 (vreinterpretq_s64_u32): Likewise.
42958 (vreinterpretq_s64_u64): Likewise.
42959 (vreinterpretq_s64_u8): Likewise.
42960 (vreinterpretq_s8_s16): Likewise.
42961 (vreinterpretq_s8_s32): Likewise.
42962 (vreinterpretq_s8_s64): Likewise.
42963 (vreinterpretq_s8_u16): Likewise.
42964 (vreinterpretq_s8_u32): Likewise.
42965 (vreinterpretq_s8_u64): Likewise.
42966 (vreinterpretq_s8_u8): Likewise.
42967 (vreinterpretq_u16_s16): Likewise.
42968 (vreinterpretq_u16_s32): Likewise.
42969 (vreinterpretq_u16_s64): Likewise.
42970 (vreinterpretq_u16_s8): Likewise.
42971 (vreinterpretq_u16_u32): Likewise.
42972 (vreinterpretq_u16_u64): Likewise.
42973 (vreinterpretq_u16_u8): Likewise.
42974 (vreinterpretq_u32_s16): Likewise.
42975 (vreinterpretq_u32_s32): Likewise.
42976 (vreinterpretq_u32_s64): Likewise.
42977 (vreinterpretq_u32_s8): Likewise.
42978 (vreinterpretq_u32_u16): Likewise.
42979 (vreinterpretq_u32_u64): Likewise.
42980 (vreinterpretq_u32_u8): Likewise.
42981 (vreinterpretq_u64_s16): Likewise.
42982 (vreinterpretq_u64_s32): Likewise.
42983 (vreinterpretq_u64_s64): Likewise.
42984 (vreinterpretq_u64_s8): Likewise.
42985 (vreinterpretq_u64_u16): Likewise.
42986 (vreinterpretq_u64_u32): Likewise.
42987 (vreinterpretq_u64_u8): Likewise.
42988 (vreinterpretq_u8_s16): Likewise.
42989 (vreinterpretq_u8_s32): Likewise.
42990 (vreinterpretq_u8_s64): Likewise.
42991 (vreinterpretq_u8_s8): Likewise.
42992 (vreinterpretq_u8_u16): Likewise.
42993 (vreinterpretq_u8_u32): Likewise.
42994 (vreinterpretq_u8_u64): Likewise.
42995 (vreinterpretq_s32_f16): Likewise.
42996 (vreinterpretq_s32_f32): Likewise.
42997 (vreinterpretq_u16_f16): Likewise.
42998 (vreinterpretq_u16_f32): Likewise.
42999 (vreinterpretq_u32_f16): Likewise.
43000 (vreinterpretq_u32_f32): Likewise.
43001 (vreinterpretq_u64_f16): Likewise.
43002 (vreinterpretq_u64_f32): Likewise.
43003 (vreinterpretq_u8_f16): Likewise.
43004 (vreinterpretq_u8_f32): Likewise.
43005 (vreinterpretq_f16_f32): Likewise.
43006 (vreinterpretq_f16_s16): Likewise.
43007 (vreinterpretq_f16_s32): Likewise.
43008 (vreinterpretq_f16_s64): Likewise.
43009 (vreinterpretq_f16_s8): Likewise.
43010 (vreinterpretq_f16_u16): Likewise.
43011 (vreinterpretq_f16_u32): Likewise.
43012 (vreinterpretq_f16_u64): Likewise.
43013 (vreinterpretq_f16_u8): Likewise.
43014 (vreinterpretq_f32_f16): Likewise.
43015 (vreinterpretq_f32_s16): Likewise.
43016 (vreinterpretq_f32_s32): Likewise.
43017 (vreinterpretq_f32_s64): Likewise.
43018 (vreinterpretq_f32_s8): Likewise.
43019 (vreinterpretq_f32_u16): Likewise.
43020 (vreinterpretq_f32_u32): Likewise.
43021 (vreinterpretq_f32_u64): Likewise.
43022 (vreinterpretq_f32_u8): Likewise.
43023 (vreinterpretq_s16_f16): Likewise.
43024 (vreinterpretq_s16_f32): Likewise.
43025 (vreinterpretq_s64_f16): Likewise.
43026 (vreinterpretq_s64_f32): Likewise.
43027 (vreinterpretq_s8_f16): Likewise.
43028 (vreinterpretq_s8_f32): Likewise.
43029 (__arm_vreinterpretq_f16): Likewise.
43030 (__arm_vreinterpretq_f32): Likewise.
43031 (__arm_vreinterpretq_s16): Likewise.
43032 (__arm_vreinterpretq_s32): Likewise.
43033 (__arm_vreinterpretq_s64): Likewise.
43034 (__arm_vreinterpretq_s8): Likewise.
43035 (__arm_vreinterpretq_u16): Likewise.
43036 (__arm_vreinterpretq_u32): Likewise.
43037 (__arm_vreinterpretq_u64): Likewise.
43038 (__arm_vreinterpretq_u8): Likewise.
43039 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
43040 (__arm_vreinterpretq_s16_s64): Likewise.
43041 (__arm_vreinterpretq_s16_s8): Likewise.
43042 (__arm_vreinterpretq_s16_u16): Likewise.
43043 (__arm_vreinterpretq_s16_u32): Likewise.
43044 (__arm_vreinterpretq_s16_u64): Likewise.
43045 (__arm_vreinterpretq_s16_u8): Likewise.
43046 (__arm_vreinterpretq_s32_s16): Likewise.
43047 (__arm_vreinterpretq_s32_s64): Likewise.
43048 (__arm_vreinterpretq_s32_s8): Likewise.
43049 (__arm_vreinterpretq_s32_u16): Likewise.
43050 (__arm_vreinterpretq_s32_u32): Likewise.
43051 (__arm_vreinterpretq_s32_u64): Likewise.
43052 (__arm_vreinterpretq_s32_u8): Likewise.
43053 (__arm_vreinterpretq_s64_s16): Likewise.
43054 (__arm_vreinterpretq_s64_s32): Likewise.
43055 (__arm_vreinterpretq_s64_s8): Likewise.
43056 (__arm_vreinterpretq_s64_u16): Likewise.
43057 (__arm_vreinterpretq_s64_u32): Likewise.
43058 (__arm_vreinterpretq_s64_u64): Likewise.
43059 (__arm_vreinterpretq_s64_u8): Likewise.
43060 (__arm_vreinterpretq_s8_s16): Likewise.
43061 (__arm_vreinterpretq_s8_s32): Likewise.
43062 (__arm_vreinterpretq_s8_s64): Likewise.
43063 (__arm_vreinterpretq_s8_u16): Likewise.
43064 (__arm_vreinterpretq_s8_u32): Likewise.
43065 (__arm_vreinterpretq_s8_u64): Likewise.
43066 (__arm_vreinterpretq_s8_u8): Likewise.
43067 (__arm_vreinterpretq_u16_s16): Likewise.
43068 (__arm_vreinterpretq_u16_s32): Likewise.
43069 (__arm_vreinterpretq_u16_s64): Likewise.
43070 (__arm_vreinterpretq_u16_s8): Likewise.
43071 (__arm_vreinterpretq_u16_u32): Likewise.
43072 (__arm_vreinterpretq_u16_u64): Likewise.
43073 (__arm_vreinterpretq_u16_u8): Likewise.
43074 (__arm_vreinterpretq_u32_s16): Likewise.
43075 (__arm_vreinterpretq_u32_s32): Likewise.
43076 (__arm_vreinterpretq_u32_s64): Likewise.
43077 (__arm_vreinterpretq_u32_s8): Likewise.
43078 (__arm_vreinterpretq_u32_u16): Likewise.
43079 (__arm_vreinterpretq_u32_u64): Likewise.
43080 (__arm_vreinterpretq_u32_u8): Likewise.
43081 (__arm_vreinterpretq_u64_s16): Likewise.
43082 (__arm_vreinterpretq_u64_s32): Likewise.
43083 (__arm_vreinterpretq_u64_s64): Likewise.
43084 (__arm_vreinterpretq_u64_s8): Likewise.
43085 (__arm_vreinterpretq_u64_u16): Likewise.
43086 (__arm_vreinterpretq_u64_u32): Likewise.
43087 (__arm_vreinterpretq_u64_u8): Likewise.
43088 (__arm_vreinterpretq_u8_s16): Likewise.
43089 (__arm_vreinterpretq_u8_s32): Likewise.
43090 (__arm_vreinterpretq_u8_s64): Likewise.
43091 (__arm_vreinterpretq_u8_s8): Likewise.
43092 (__arm_vreinterpretq_u8_u16): Likewise.
43093 (__arm_vreinterpretq_u8_u32): Likewise.
43094 (__arm_vreinterpretq_u8_u64): Likewise.
43095 (__arm_vreinterpretq_s32_f16): Likewise.
43096 (__arm_vreinterpretq_s32_f32): Likewise.
43097 (__arm_vreinterpretq_s16_f16): Likewise.
43098 (__arm_vreinterpretq_s16_f32): Likewise.
43099 (__arm_vreinterpretq_s64_f16): Likewise.
43100 (__arm_vreinterpretq_s64_f32): Likewise.
43101 (__arm_vreinterpretq_s8_f16): Likewise.
43102 (__arm_vreinterpretq_s8_f32): Likewise.
43103 (__arm_vreinterpretq_u16_f16): Likewise.
43104 (__arm_vreinterpretq_u16_f32): Likewise.
43105 (__arm_vreinterpretq_u32_f16): Likewise.
43106 (__arm_vreinterpretq_u32_f32): Likewise.
43107 (__arm_vreinterpretq_u64_f16): Likewise.
43108 (__arm_vreinterpretq_u64_f32): Likewise.
43109 (__arm_vreinterpretq_u8_f16): Likewise.
43110 (__arm_vreinterpretq_u8_f32): Likewise.
43111 (__arm_vreinterpretq_f16_f32): Likewise.
43112 (__arm_vreinterpretq_f16_s16): Likewise.
43113 (__arm_vreinterpretq_f16_s32): Likewise.
43114 (__arm_vreinterpretq_f16_s64): Likewise.
43115 (__arm_vreinterpretq_f16_s8): Likewise.
43116 (__arm_vreinterpretq_f16_u16): Likewise.
43117 (__arm_vreinterpretq_f16_u32): Likewise.
43118 (__arm_vreinterpretq_f16_u64): Likewise.
43119 (__arm_vreinterpretq_f16_u8): Likewise.
43120 (__arm_vreinterpretq_f32_f16): Likewise.
43121 (__arm_vreinterpretq_f32_s16): Likewise.
43122 (__arm_vreinterpretq_f32_s32): Likewise.
43123 (__arm_vreinterpretq_f32_s64): Likewise.
43124 (__arm_vreinterpretq_f32_s8): Likewise.
43125 (__arm_vreinterpretq_f32_u16): Likewise.
43126 (__arm_vreinterpretq_f32_u32): Likewise.
43127 (__arm_vreinterpretq_f32_u64): Likewise.
43128 (__arm_vreinterpretq_f32_u8): Likewise.
43129 (__arm_vreinterpretq_s16): Likewise.
43130 (__arm_vreinterpretq_s32): Likewise.
43131 (__arm_vreinterpretq_s64): Likewise.
43132 (__arm_vreinterpretq_s8): Likewise.
43133 (__arm_vreinterpretq_u16): Likewise.
43134 (__arm_vreinterpretq_u32): Likewise.
43135 (__arm_vreinterpretq_u64): Likewise.
43136 (__arm_vreinterpretq_u8): Likewise.
43137 (__arm_vreinterpretq_f16): Likewise.
43138 (__arm_vreinterpretq_f32): Likewise.
43139 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
43140 * config/arm/unspecs.md: (REINTERPRET): New unspec.
43142 2023-05-03 Murray Steele <murray.steele@arm.com>
43143 Christophe Lyon <christophe.lyon@arm.com>
43144 Christophe Lyon <christophe.lyon@arm.com
43146 * config.gcc: Add arm-mve-builtins-base.o and
43147 arm-mve-builtins-shapes.o to extra_objs.
43148 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
43150 (arm_expand_builtin): Likewise
43151 (arm_check_builtin_call): Likewise
43152 (arm_describe_resolver): Likewise.
43153 * config/arm/arm-builtins.h (enum resolver_ident): Add
43155 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
43156 (arm_resolve_overloaded_builtin): Handle MVE builtins.
43157 (arm_register_target_pragmas): Register arm_check_builtin_call.
43158 * config/arm/arm-mve-builtins.cc (class registered_function): New
43160 (struct registered_function_hasher): New struct.
43161 (pred_suffixes): New table.
43162 (mode_suffixes): New table.
43163 (type_suffix_info): New table.
43164 (TYPES_float16): New.
43165 (TYPES_all_float): New.
43166 (TYPES_integer_8): New.
43167 (TYPES_integer_8_16): New.
43168 (TYPES_integer_16_32): New.
43169 (TYPES_integer_32): New.
43170 (TYPES_signed_16_32): New.
43171 (TYPES_signed_32): New.
43172 (TYPES_all_signed): New.
43173 (TYPES_all_unsigned): New.
43174 (TYPES_all_integer): New.
43175 (TYPES_all_integer_with_64): New.
43176 (DEF_VECTOR_TYPE): New.
43177 (DEF_DOUBLE_TYPE): New.
43178 (DEF_MVE_TYPES_ARRAY): New.
43179 (all_integer): New.
43180 (all_integer_with_64): New.
43184 (all_unsigned): New.
43186 (integer_8_16): New.
43187 (integer_16_32): New.
43189 (signed_16_32): New.
43191 (register_vector_type): Use void_type_node for mve.fp-only types when
43192 mve.fp is not enabled.
43193 (register_builtin_tuple_types): Likewise.
43194 (handle_arm_mve_h): New function..
43195 (matches_type_p): Likewise..
43196 (report_out_of_range): Likewise.
43197 (report_not_enum): Likewise.
43198 (report_missing_float): Likewise.
43199 (report_non_ice): Likewise.
43200 (check_requires_float): Likewise.
43201 (function_instance::hash): Likewise
43202 (function_instance::call_properties): Likewise.
43203 (function_instance::reads_global_state_p): Likewise.
43204 (function_instance::modifies_global_state_p): Likewise.
43205 (function_instance::could_trap_p): Likewise.
43206 (function_instance::has_inactive_argument): Likewise.
43207 (registered_function_hasher::hash): Likewise.
43208 (registered_function_hasher::equal): Likewise.
43209 (function_builder::function_builder): Likewise.
43210 (function_builder::~function_builder): Likewise.
43211 (function_builder::append_name): Likewise.
43212 (function_builder::finish_name): Likewise.
43213 (function_builder::get_name): Likewise.
43214 (add_attribute): Likewise.
43215 (function_builder::get_attributes): Likewise.
43216 (function_builder::add_function): Likewise.
43217 (function_builder::add_unique_function): Likewise.
43218 (function_builder::add_overloaded_function): Likewise.
43219 (function_builder::add_overloaded_functions): Likewise.
43220 (function_builder::register_function_group): Likewise.
43221 (function_call_info::function_call_info): Likewise.
43222 (function_resolver::function_resolver): Likewise.
43223 (function_resolver::get_vector_type): Likewise.
43224 (function_resolver::get_scalar_type_name): Likewise.
43225 (function_resolver::get_argument_type): Likewise.
43226 (function_resolver::scalar_argument_p): Likewise.
43227 (function_resolver::report_no_such_form): Likewise.
43228 (function_resolver::lookup_form): Likewise.
43229 (function_resolver::resolve_to): Likewise.
43230 (function_resolver::infer_vector_or_tuple_type): Likewise.
43231 (function_resolver::infer_vector_type): Likewise.
43232 (function_resolver::require_vector_or_scalar_type): Likewise.
43233 (function_resolver::require_vector_type): Likewise.
43234 (function_resolver::require_matching_vector_type): Likewise.
43235 (function_resolver::require_derived_vector_type): Likewise.
43236 (function_resolver::require_derived_scalar_type): Likewise.
43237 (function_resolver::require_integer_immediate): Likewise.
43238 (function_resolver::require_scalar_type): Likewise.
43239 (function_resolver::check_num_arguments): Likewise.
43240 (function_resolver::check_gp_argument): Likewise.
43241 (function_resolver::finish_opt_n_resolution): Likewise.
43242 (function_resolver::resolve_unary): Likewise.
43243 (function_resolver::resolve_unary_n): Likewise.
43244 (function_resolver::resolve_uniform): Likewise.
43245 (function_resolver::resolve_uniform_opt_n): Likewise.
43246 (function_resolver::resolve): Likewise.
43247 (function_checker::function_checker): Likewise.
43248 (function_checker::argument_exists_p): Likewise.
43249 (function_checker::require_immediate): Likewise.
43250 (function_checker::require_immediate_enum): Likewise.
43251 (function_checker::require_immediate_range): Likewise.
43252 (function_checker::check): Likewise.
43253 (gimple_folder::gimple_folder): Likewise.
43254 (gimple_folder::fold): Likewise.
43255 (function_expander::function_expander): Likewise.
43256 (function_expander::direct_optab_handler): Likewise.
43257 (function_expander::get_fallback_value): Likewise.
43258 (function_expander::get_reg_target): Likewise.
43259 (function_expander::add_output_operand): Likewise.
43260 (function_expander::add_input_operand): Likewise.
43261 (function_expander::add_integer_operand): Likewise.
43262 (function_expander::generate_insn): Likewise.
43263 (function_expander::use_exact_insn): Likewise.
43264 (function_expander::use_unpred_insn): Likewise.
43265 (function_expander::use_pred_x_insn): Likewise.
43266 (function_expander::use_cond_insn): Likewise.
43267 (function_expander::map_to_rtx_codes): Likewise.
43268 (function_expander::expand): Likewise.
43269 (resolve_overloaded_builtin): Likewise.
43270 (check_builtin_call): Likewise.
43271 (gimple_fold_builtin): Likewise.
43272 (expand_builtin): Likewise.
43273 (gt_ggc_mx): Likewise.
43274 (gt_pch_nx): Likewise.
43275 (gt_pch_nx): Likewise.
43276 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
43287 (offset): New mode.
43288 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
43289 (CP_READ_FPCR): Likewise.
43290 (CP_RAISE_FP_EXCEPTIONS): Likewise.
43291 (CP_READ_MEMORY): Likewise.
43292 (CP_WRITE_MEMORY): Likewise.
43293 (enum units_index): New enum.
43294 (enum predication_index): New.
43295 (enum type_class_index): New.
43296 (enum mode_suffix_index): New enum.
43297 (enum type_suffix_index): New.
43298 (struct mode_suffix_info): New struct.
43299 (struct type_suffix_info): New.
43300 (struct function_group_info): Likewise.
43301 (class function_instance): Likewise.
43302 (class registered_function): Likewise.
43303 (class function_builder): Likewise.
43304 (class function_call_info): Likewise.
43305 (class function_resolver): Likewise.
43306 (class function_checker): Likewise.
43307 (class gimple_folder): Likewise.
43308 (class function_expander): Likewise.
43309 (get_mve_pred16_t): Likewise.
43310 (find_mode_suffix): New function.
43311 (class function_base): Likewise.
43312 (class function_shape): Likewise.
43313 (function_instance::operator==): New function.
43314 (function_instance::operator!=): Likewise.
43315 (function_instance::vectors_per_tuple): Likewise.
43316 (function_instance::mode_suffix): Likewise.
43317 (function_instance::type_suffix): Likewise.
43318 (function_instance::scalar_type): Likewise.
43319 (function_instance::vector_type): Likewise.
43320 (function_instance::tuple_type): Likewise.
43321 (function_instance::vector_mode): Likewise.
43322 (function_call_info::function_returns_void_p): Likewise.
43323 (function_base::call_properties): Likewise.
43324 * config/arm/arm-protos.h (enum arm_builtin_class): Add
43326 (handle_arm_mve_h): New.
43327 (resolve_overloaded_builtin): New.
43328 (check_builtin_call): New.
43329 (gimple_fold_builtin): New.
43330 (expand_builtin): New.
43331 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
43332 arm_gimple_fold_builtin.
43333 (arm_gimple_fold_builtin): New function.
43334 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
43335 * config/arm/predicates.md (arm_any_register_operand): New predicate.
43336 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
43337 (arm-mve-builtins-shapes.o): New target.
43338 (arm-mve-builtins-base.o): New target.
43339 * config/arm/arm-mve-builtins-base.cc: New file.
43340 * config/arm/arm-mve-builtins-base.def: New file.
43341 * config/arm/arm-mve-builtins-base.h: New file.
43342 * config/arm/arm-mve-builtins-functions.h: New file.
43343 * config/arm/arm-mve-builtins-shapes.cc: New file.
43344 * config/arm/arm-mve-builtins-shapes.h: New file.
43346 2023-05-03 Murray Steele <murray.steele@arm.com>
43347 Christophe Lyon <christophe.lyon@arm.com>
43348 Christophe Lyon <christophe.lyon@arm.com>
43350 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
43352 (arm_init_builtin): Use arm_general_add_builtin_function instead
43353 of arm_add_builtin_function.
43354 (arm_init_acle_builtins): Likewise.
43355 (arm_init_mve_builtins): Likewise.
43356 (arm_init_crypto_builtins): Likewise.
43357 (arm_init_builtins): Likewise.
43358 (arm_general_builtin_decl): New function.
43359 (arm_builtin_decl): Defer to numberspace-specialized functions.
43360 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
43361 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
43362 (arm_general_expand_builtin_1): ... specialize for general builtins.
43363 (arm_expand_acle_builtin): Use arm_general_expand_builtin
43364 instead of arm_expand_builtin.
43365 (arm_expand_mve_builtin): Likewise.
43366 (arm_expand_neon_builtin): Likewise.
43367 (arm_expand_vfp_builtin): Likewise.
43368 (arm_general_expand_builtin): New function.
43369 (arm_expand_builtin): Specialize for general builtins.
43370 (arm_general_check_builtin_call): New function.
43371 (arm_check_builtin_call): Specialize for general builtins.
43372 (arm_describe_resolver): Validate numberspace.
43373 (arm_cde_end_args): Likewise.
43374 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
43375 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
43377 2023-05-03 Martin Liska <mliska@suse.cz>
43380 * config/riscv/sync.md: Add gcc_unreachable to a switch.
43382 2023-05-03 Richard Biener <rguenther@suse.de>
43384 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
43385 (patch_loop_exit): Likewise.
43386 (connect_loops): Likewise.
43387 (split_loop): Likewise.
43388 (control_dep_semi_invariant_p): Likewise.
43389 (do_split_loop_on_cond): Likewise.
43390 (split_loop_on_cond): Likewise.
43391 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
43393 (simplify_loop_version): Likewise.
43394 (evaluate_bbs): Likewise.
43395 (find_loop_guard): Likewise.
43396 (clean_up_after_unswitching): Likewise.
43397 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
43399 (optimize_spaceship): Take a gcond * argument, avoid
43401 (math_opts_dom_walker::after_dom_children): Adjust call to
43402 optimize_spaceship.
43403 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
43404 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
43407 2023-05-03 Andreas Schwab <schwab@suse.de>
43409 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
43411 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43413 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
43415 (class vlseg): New class.
43416 (class vsseg): Ditto.
43417 (class vlsseg): Ditto.
43418 (class vssseg): Ditto.
43419 (class seg_indexed_load): Ditto.
43420 (class seg_indexed_store): Ditto.
43421 (class vlsegff): Ditto.
43423 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43424 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
43434 * config/riscv/riscv-vector-builtins-shapes.cc (struct
43435 seg_loadstore_def): Ditto.
43436 (struct seg_indexed_loadstore_def): Ditto.
43437 (struct seg_fault_load_def): Ditto.
43439 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43440 * config/riscv/riscv-vector-builtins.cc
43441 (function_builder::append_nf): New function.
43442 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
43443 Change ptr from double into float.
43444 (vfloat32m1x3_t): Ditto.
43445 (vfloat32m1x4_t): Ditto.
43446 (vfloat32m1x5_t): Ditto.
43447 (vfloat32m1x6_t): Ditto.
43448 (vfloat32m1x7_t): Ditto.
43449 (vfloat32m1x8_t): Ditto.
43450 (vfloat32m2x2_t): Ditto.
43451 (vfloat32m2x3_t): Ditto.
43452 (vfloat32m2x4_t): Ditto.
43453 (vfloat32m4x2_t): Ditto.
43454 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
43455 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
43457 * config/riscv/riscv.md: Add segment instructions.
43458 * config/riscv/vector-iterators.md: Support segment intrinsics.
43459 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
43461 (@pred_unit_strided_store<mode>): Ditto.
43462 (@pred_strided_load<mode>): Ditto.
43463 (@pred_strided_store<mode>): Ditto.
43464 (@pred_fault_load<mode>): Ditto.
43465 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
43466 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
43467 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
43468 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
43469 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
43470 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
43471 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
43472 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
43473 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
43474 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
43475 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
43476 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
43477 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
43478 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
43480 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43482 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
43483 tuple type support.
43485 (floattype): Ditto.
43487 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
43488 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
43490 (vget): Add tuple type vget.
43491 * config/riscv/riscv-vector-builtins-types.def
43492 (DEF_RVV_TUPLE_OPS): New macro.
43493 (vint8mf8x2_t): Ditto.
43494 (vuint8mf8x2_t): Ditto.
43495 (vint8mf8x3_t): Ditto.
43496 (vuint8mf8x3_t): Ditto.
43497 (vint8mf8x4_t): Ditto.
43498 (vuint8mf8x4_t): Ditto.
43499 (vint8mf8x5_t): Ditto.
43500 (vuint8mf8x5_t): Ditto.
43501 (vint8mf8x6_t): Ditto.
43502 (vuint8mf8x6_t): Ditto.
43503 (vint8mf8x7_t): Ditto.
43504 (vuint8mf8x7_t): Ditto.
43505 (vint8mf8x8_t): Ditto.
43506 (vuint8mf8x8_t): Ditto.
43507 (vint8mf4x2_t): Ditto.
43508 (vuint8mf4x2_t): Ditto.
43509 (vint8mf4x3_t): Ditto.
43510 (vuint8mf4x3_t): Ditto.
43511 (vint8mf4x4_t): Ditto.
43512 (vuint8mf4x4_t): Ditto.
43513 (vint8mf4x5_t): Ditto.
43514 (vuint8mf4x5_t): Ditto.
43515 (vint8mf4x6_t): Ditto.
43516 (vuint8mf4x6_t): Ditto.
43517 (vint8mf4x7_t): Ditto.
43518 (vuint8mf4x7_t): Ditto.
43519 (vint8mf4x8_t): Ditto.
43520 (vuint8mf4x8_t): Ditto.
43521 (vint8mf2x2_t): Ditto.
43522 (vuint8mf2x2_t): Ditto.
43523 (vint8mf2x3_t): Ditto.
43524 (vuint8mf2x3_t): Ditto.
43525 (vint8mf2x4_t): Ditto.
43526 (vuint8mf2x4_t): Ditto.
43527 (vint8mf2x5_t): Ditto.
43528 (vuint8mf2x5_t): Ditto.
43529 (vint8mf2x6_t): Ditto.
43530 (vuint8mf2x6_t): Ditto.
43531 (vint8mf2x7_t): Ditto.
43532 (vuint8mf2x7_t): Ditto.
43533 (vint8mf2x8_t): Ditto.
43534 (vuint8mf2x8_t): Ditto.
43535 (vint8m1x2_t): Ditto.
43536 (vuint8m1x2_t): Ditto.
43537 (vint8m1x3_t): Ditto.
43538 (vuint8m1x3_t): Ditto.
43539 (vint8m1x4_t): Ditto.
43540 (vuint8m1x4_t): Ditto.
43541 (vint8m1x5_t): Ditto.
43542 (vuint8m1x5_t): Ditto.
43543 (vint8m1x6_t): Ditto.
43544 (vuint8m1x6_t): Ditto.
43545 (vint8m1x7_t): Ditto.
43546 (vuint8m1x7_t): Ditto.
43547 (vint8m1x8_t): Ditto.
43548 (vuint8m1x8_t): Ditto.
43549 (vint8m2x2_t): Ditto.
43550 (vuint8m2x2_t): Ditto.
43551 (vint8m2x3_t): Ditto.
43552 (vuint8m2x3_t): Ditto.
43553 (vint8m2x4_t): Ditto.
43554 (vuint8m2x4_t): Ditto.
43555 (vint8m4x2_t): Ditto.
43556 (vuint8m4x2_t): Ditto.
43557 (vint16mf4x2_t): Ditto.
43558 (vuint16mf4x2_t): Ditto.
43559 (vint16mf4x3_t): Ditto.
43560 (vuint16mf4x3_t): Ditto.
43561 (vint16mf4x4_t): Ditto.
43562 (vuint16mf4x4_t): Ditto.
43563 (vint16mf4x5_t): Ditto.
43564 (vuint16mf4x5_t): Ditto.
43565 (vint16mf4x6_t): Ditto.
43566 (vuint16mf4x6_t): Ditto.
43567 (vint16mf4x7_t): Ditto.
43568 (vuint16mf4x7_t): Ditto.
43569 (vint16mf4x8_t): Ditto.
43570 (vuint16mf4x8_t): Ditto.
43571 (vint16mf2x2_t): Ditto.
43572 (vuint16mf2x2_t): Ditto.
43573 (vint16mf2x3_t): Ditto.
43574 (vuint16mf2x3_t): Ditto.
43575 (vint16mf2x4_t): Ditto.
43576 (vuint16mf2x4_t): Ditto.
43577 (vint16mf2x5_t): Ditto.
43578 (vuint16mf2x5_t): Ditto.
43579 (vint16mf2x6_t): Ditto.
43580 (vuint16mf2x6_t): Ditto.
43581 (vint16mf2x7_t): Ditto.
43582 (vuint16mf2x7_t): Ditto.
43583 (vint16mf2x8_t): Ditto.
43584 (vuint16mf2x8_t): Ditto.
43585 (vint16m1x2_t): Ditto.
43586 (vuint16m1x2_t): Ditto.
43587 (vint16m1x3_t): Ditto.
43588 (vuint16m1x3_t): Ditto.
43589 (vint16m1x4_t): Ditto.
43590 (vuint16m1x4_t): Ditto.
43591 (vint16m1x5_t): Ditto.
43592 (vuint16m1x5_t): Ditto.
43593 (vint16m1x6_t): Ditto.
43594 (vuint16m1x6_t): Ditto.
43595 (vint16m1x7_t): Ditto.
43596 (vuint16m1x7_t): Ditto.
43597 (vint16m1x8_t): Ditto.
43598 (vuint16m1x8_t): Ditto.
43599 (vint16m2x2_t): Ditto.
43600 (vuint16m2x2_t): Ditto.
43601 (vint16m2x3_t): Ditto.
43602 (vuint16m2x3_t): Ditto.
43603 (vint16m2x4_t): Ditto.
43604 (vuint16m2x4_t): Ditto.
43605 (vint16m4x2_t): Ditto.
43606 (vuint16m4x2_t): Ditto.
43607 (vint32mf2x2_t): Ditto.
43608 (vuint32mf2x2_t): Ditto.
43609 (vint32mf2x3_t): Ditto.
43610 (vuint32mf2x3_t): Ditto.
43611 (vint32mf2x4_t): Ditto.
43612 (vuint32mf2x4_t): Ditto.
43613 (vint32mf2x5_t): Ditto.
43614 (vuint32mf2x5_t): Ditto.
43615 (vint32mf2x6_t): Ditto.
43616 (vuint32mf2x6_t): Ditto.
43617 (vint32mf2x7_t): Ditto.
43618 (vuint32mf2x7_t): Ditto.
43619 (vint32mf2x8_t): Ditto.
43620 (vuint32mf2x8_t): Ditto.
43621 (vint32m1x2_t): Ditto.
43622 (vuint32m1x2_t): Ditto.
43623 (vint32m1x3_t): Ditto.
43624 (vuint32m1x3_t): Ditto.
43625 (vint32m1x4_t): Ditto.
43626 (vuint32m1x4_t): Ditto.
43627 (vint32m1x5_t): Ditto.
43628 (vuint32m1x5_t): Ditto.
43629 (vint32m1x6_t): Ditto.
43630 (vuint32m1x6_t): Ditto.
43631 (vint32m1x7_t): Ditto.
43632 (vuint32m1x7_t): Ditto.
43633 (vint32m1x8_t): Ditto.
43634 (vuint32m1x8_t): Ditto.
43635 (vint32m2x2_t): Ditto.
43636 (vuint32m2x2_t): Ditto.
43637 (vint32m2x3_t): Ditto.
43638 (vuint32m2x3_t): Ditto.
43639 (vint32m2x4_t): Ditto.
43640 (vuint32m2x4_t): Ditto.
43641 (vint32m4x2_t): Ditto.
43642 (vuint32m4x2_t): Ditto.
43643 (vint64m1x2_t): Ditto.
43644 (vuint64m1x2_t): Ditto.
43645 (vint64m1x3_t): Ditto.
43646 (vuint64m1x3_t): Ditto.
43647 (vint64m1x4_t): Ditto.
43648 (vuint64m1x4_t): Ditto.
43649 (vint64m1x5_t): Ditto.
43650 (vuint64m1x5_t): Ditto.
43651 (vint64m1x6_t): Ditto.
43652 (vuint64m1x6_t): Ditto.
43653 (vint64m1x7_t): Ditto.
43654 (vuint64m1x7_t): Ditto.
43655 (vint64m1x8_t): Ditto.
43656 (vuint64m1x8_t): Ditto.
43657 (vint64m2x2_t): Ditto.
43658 (vuint64m2x2_t): Ditto.
43659 (vint64m2x3_t): Ditto.
43660 (vuint64m2x3_t): Ditto.
43661 (vint64m2x4_t): Ditto.
43662 (vuint64m2x4_t): Ditto.
43663 (vint64m4x2_t): Ditto.
43664 (vuint64m4x2_t): Ditto.
43665 (vfloat32mf2x2_t): Ditto.
43666 (vfloat32mf2x3_t): Ditto.
43667 (vfloat32mf2x4_t): Ditto.
43668 (vfloat32mf2x5_t): Ditto.
43669 (vfloat32mf2x6_t): Ditto.
43670 (vfloat32mf2x7_t): Ditto.
43671 (vfloat32mf2x8_t): Ditto.
43672 (vfloat32m1x2_t): Ditto.
43673 (vfloat32m1x3_t): Ditto.
43674 (vfloat32m1x4_t): Ditto.
43675 (vfloat32m1x5_t): Ditto.
43676 (vfloat32m1x6_t): Ditto.
43677 (vfloat32m1x7_t): Ditto.
43678 (vfloat32m1x8_t): Ditto.
43679 (vfloat32m2x2_t): Ditto.
43680 (vfloat32m2x3_t): Ditto.
43681 (vfloat32m2x4_t): Ditto.
43682 (vfloat32m4x2_t): Ditto.
43683 (vfloat64m1x2_t): Ditto.
43684 (vfloat64m1x3_t): Ditto.
43685 (vfloat64m1x4_t): Ditto.
43686 (vfloat64m1x5_t): Ditto.
43687 (vfloat64m1x6_t): Ditto.
43688 (vfloat64m1x7_t): Ditto.
43689 (vfloat64m1x8_t): Ditto.
43690 (vfloat64m2x2_t): Ditto.
43691 (vfloat64m2x3_t): Ditto.
43692 (vfloat64m2x4_t): Ditto.
43693 (vfloat64m4x2_t): Ditto.
43694 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
43696 (DEF_RVV_TYPE_INDEX): Ditto.
43697 (rvv_arg_type_info::get_tuple_subpart_type): New function.
43698 (DEF_RVV_TUPLE_TYPE): New macro.
43699 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
43700 Adapt for tuple vget/vset support.
43701 (vint8mf4_t): Ditto.
43702 (vuint8mf4_t): Ditto.
43703 (vint8mf2_t): Ditto.
43704 (vuint8mf2_t): Ditto.
43705 (vint8m1_t): Ditto.
43706 (vuint8m1_t): Ditto.
43707 (vint8m2_t): Ditto.
43708 (vuint8m2_t): Ditto.
43709 (vint8m4_t): Ditto.
43710 (vuint8m4_t): Ditto.
43711 (vint8m8_t): Ditto.
43712 (vuint8m8_t): Ditto.
43713 (vint16mf4_t): Ditto.
43714 (vuint16mf4_t): Ditto.
43715 (vint16mf2_t): Ditto.
43716 (vuint16mf2_t): Ditto.
43717 (vint16m1_t): Ditto.
43718 (vuint16m1_t): Ditto.
43719 (vint16m2_t): Ditto.
43720 (vuint16m2_t): Ditto.
43721 (vint16m4_t): Ditto.
43722 (vuint16m4_t): Ditto.
43723 (vint16m8_t): Ditto.
43724 (vuint16m8_t): Ditto.
43725 (vint32mf2_t): Ditto.
43726 (vuint32mf2_t): Ditto.
43727 (vint32m1_t): Ditto.
43728 (vuint32m1_t): Ditto.
43729 (vint32m2_t): Ditto.
43730 (vuint32m2_t): Ditto.
43731 (vint32m4_t): Ditto.
43732 (vuint32m4_t): Ditto.
43733 (vint32m8_t): Ditto.
43734 (vuint32m8_t): Ditto.
43735 (vint64m1_t): Ditto.
43736 (vuint64m1_t): Ditto.
43737 (vint64m2_t): Ditto.
43738 (vuint64m2_t): Ditto.
43739 (vint64m4_t): Ditto.
43740 (vuint64m4_t): Ditto.
43741 (vint64m8_t): Ditto.
43742 (vuint64m8_t): Ditto.
43743 (vfloat32mf2_t): Ditto.
43744 (vfloat32m1_t): Ditto.
43745 (vfloat32m2_t): Ditto.
43746 (vfloat32m4_t): Ditto.
43747 (vfloat32m8_t): Ditto.
43748 (vfloat64m1_t): Ditto.
43749 (vfloat64m2_t): Ditto.
43750 (vfloat64m4_t): Ditto.
43751 (vfloat64m8_t): Ditto.
43752 (tuple_subpart): Add tuple subpart base type.
43753 * config/riscv/riscv-vector-builtins.h (struct
43754 rvv_arg_type_info): Ditto.
43755 (tuple_type_field): New function.
43757 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43759 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
43760 (RVV_TUPLE_PARTIAL_MODES): Ditto.
43761 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
43764 (get_subpart_mode): Ditto.
43765 (get_tuple_mode): Ditto.
43766 (expand_tuple_move): Ditto.
43767 * config/riscv/riscv-v.cc (ENTRY): New macro.
43768 (TUPLE_ENTRY): Ditto.
43769 (get_nf): New function.
43770 (get_subpart_mode): Ditto.
43771 (get_tuple_mode): Ditto.
43772 (expand_tuple_move): Ditto.
43773 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
43775 (register_tuple_type): New function
43776 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
43778 (vint8mf8x2_t): New macro.
43779 (vuint8mf8x2_t): Ditto.
43780 (vint8mf8x3_t): Ditto.
43781 (vuint8mf8x3_t): Ditto.
43782 (vint8mf8x4_t): Ditto.
43783 (vuint8mf8x4_t): Ditto.
43784 (vint8mf8x5_t): Ditto.
43785 (vuint8mf8x5_t): Ditto.
43786 (vint8mf8x6_t): Ditto.
43787 (vuint8mf8x6_t): Ditto.
43788 (vint8mf8x7_t): Ditto.
43789 (vuint8mf8x7_t): Ditto.
43790 (vint8mf8x8_t): Ditto.
43791 (vuint8mf8x8_t): Ditto.
43792 (vint8mf4x2_t): Ditto.
43793 (vuint8mf4x2_t): Ditto.
43794 (vint8mf4x3_t): Ditto.
43795 (vuint8mf4x3_t): Ditto.
43796 (vint8mf4x4_t): Ditto.
43797 (vuint8mf4x4_t): Ditto.
43798 (vint8mf4x5_t): Ditto.
43799 (vuint8mf4x5_t): Ditto.
43800 (vint8mf4x6_t): Ditto.
43801 (vuint8mf4x6_t): Ditto.
43802 (vint8mf4x7_t): Ditto.
43803 (vuint8mf4x7_t): Ditto.
43804 (vint8mf4x8_t): Ditto.
43805 (vuint8mf4x8_t): Ditto.
43806 (vint8mf2x2_t): Ditto.
43807 (vuint8mf2x2_t): Ditto.
43808 (vint8mf2x3_t): Ditto.
43809 (vuint8mf2x3_t): Ditto.
43810 (vint8mf2x4_t): Ditto.
43811 (vuint8mf2x4_t): Ditto.
43812 (vint8mf2x5_t): Ditto.
43813 (vuint8mf2x5_t): Ditto.
43814 (vint8mf2x6_t): Ditto.
43815 (vuint8mf2x6_t): Ditto.
43816 (vint8mf2x7_t): Ditto.
43817 (vuint8mf2x7_t): Ditto.
43818 (vint8mf2x8_t): Ditto.
43819 (vuint8mf2x8_t): Ditto.
43820 (vint8m1x2_t): Ditto.
43821 (vuint8m1x2_t): Ditto.
43822 (vint8m1x3_t): Ditto.
43823 (vuint8m1x3_t): Ditto.
43824 (vint8m1x4_t): Ditto.
43825 (vuint8m1x4_t): Ditto.
43826 (vint8m1x5_t): Ditto.
43827 (vuint8m1x5_t): Ditto.
43828 (vint8m1x6_t): Ditto.
43829 (vuint8m1x6_t): Ditto.
43830 (vint8m1x7_t): Ditto.
43831 (vuint8m1x7_t): Ditto.
43832 (vint8m1x8_t): Ditto.
43833 (vuint8m1x8_t): Ditto.
43834 (vint8m2x2_t): Ditto.
43835 (vuint8m2x2_t): Ditto.
43836 (vint8m2x3_t): Ditto.
43837 (vuint8m2x3_t): Ditto.
43838 (vint8m2x4_t): Ditto.
43839 (vuint8m2x4_t): Ditto.
43840 (vint8m4x2_t): Ditto.
43841 (vuint8m4x2_t): Ditto.
43842 (vint16mf4x2_t): Ditto.
43843 (vuint16mf4x2_t): Ditto.
43844 (vint16mf4x3_t): Ditto.
43845 (vuint16mf4x3_t): Ditto.
43846 (vint16mf4x4_t): Ditto.
43847 (vuint16mf4x4_t): Ditto.
43848 (vint16mf4x5_t): Ditto.
43849 (vuint16mf4x5_t): Ditto.
43850 (vint16mf4x6_t): Ditto.
43851 (vuint16mf4x6_t): Ditto.
43852 (vint16mf4x7_t): Ditto.
43853 (vuint16mf4x7_t): Ditto.
43854 (vint16mf4x8_t): Ditto.
43855 (vuint16mf4x8_t): Ditto.
43856 (vint16mf2x2_t): Ditto.
43857 (vuint16mf2x2_t): Ditto.
43858 (vint16mf2x3_t): Ditto.
43859 (vuint16mf2x3_t): Ditto.
43860 (vint16mf2x4_t): Ditto.
43861 (vuint16mf2x4_t): Ditto.
43862 (vint16mf2x5_t): Ditto.
43863 (vuint16mf2x5_t): Ditto.
43864 (vint16mf2x6_t): Ditto.
43865 (vuint16mf2x6_t): Ditto.
43866 (vint16mf2x7_t): Ditto.
43867 (vuint16mf2x7_t): Ditto.
43868 (vint16mf2x8_t): Ditto.
43869 (vuint16mf2x8_t): Ditto.
43870 (vint16m1x2_t): Ditto.
43871 (vuint16m1x2_t): Ditto.
43872 (vint16m1x3_t): Ditto.
43873 (vuint16m1x3_t): Ditto.
43874 (vint16m1x4_t): Ditto.
43875 (vuint16m1x4_t): Ditto.
43876 (vint16m1x5_t): Ditto.
43877 (vuint16m1x5_t): Ditto.
43878 (vint16m1x6_t): Ditto.
43879 (vuint16m1x6_t): Ditto.
43880 (vint16m1x7_t): Ditto.
43881 (vuint16m1x7_t): Ditto.
43882 (vint16m1x8_t): Ditto.
43883 (vuint16m1x8_t): Ditto.
43884 (vint16m2x2_t): Ditto.
43885 (vuint16m2x2_t): Ditto.
43886 (vint16m2x3_t): Ditto.
43887 (vuint16m2x3_t): Ditto.
43888 (vint16m2x4_t): Ditto.
43889 (vuint16m2x4_t): Ditto.
43890 (vint16m4x2_t): Ditto.
43891 (vuint16m4x2_t): Ditto.
43892 (vint32mf2x2_t): Ditto.
43893 (vuint32mf2x2_t): Ditto.
43894 (vint32mf2x3_t): Ditto.
43895 (vuint32mf2x3_t): Ditto.
43896 (vint32mf2x4_t): Ditto.
43897 (vuint32mf2x4_t): Ditto.
43898 (vint32mf2x5_t): Ditto.
43899 (vuint32mf2x5_t): Ditto.
43900 (vint32mf2x6_t): Ditto.
43901 (vuint32mf2x6_t): Ditto.
43902 (vint32mf2x7_t): Ditto.
43903 (vuint32mf2x7_t): Ditto.
43904 (vint32mf2x8_t): Ditto.
43905 (vuint32mf2x8_t): Ditto.
43906 (vint32m1x2_t): Ditto.
43907 (vuint32m1x2_t): Ditto.
43908 (vint32m1x3_t): Ditto.
43909 (vuint32m1x3_t): Ditto.
43910 (vint32m1x4_t): Ditto.
43911 (vuint32m1x4_t): Ditto.
43912 (vint32m1x5_t): Ditto.
43913 (vuint32m1x5_t): Ditto.
43914 (vint32m1x6_t): Ditto.
43915 (vuint32m1x6_t): Ditto.
43916 (vint32m1x7_t): Ditto.
43917 (vuint32m1x7_t): Ditto.
43918 (vint32m1x8_t): Ditto.
43919 (vuint32m1x8_t): Ditto.
43920 (vint32m2x2_t): Ditto.
43921 (vuint32m2x2_t): Ditto.
43922 (vint32m2x3_t): Ditto.
43923 (vuint32m2x3_t): Ditto.
43924 (vint32m2x4_t): Ditto.
43925 (vuint32m2x4_t): Ditto.
43926 (vint32m4x2_t): Ditto.
43927 (vuint32m4x2_t): Ditto.
43928 (vint64m1x2_t): Ditto.
43929 (vuint64m1x2_t): Ditto.
43930 (vint64m1x3_t): Ditto.
43931 (vuint64m1x3_t): Ditto.
43932 (vint64m1x4_t): Ditto.
43933 (vuint64m1x4_t): Ditto.
43934 (vint64m1x5_t): Ditto.
43935 (vuint64m1x5_t): Ditto.
43936 (vint64m1x6_t): Ditto.
43937 (vuint64m1x6_t): Ditto.
43938 (vint64m1x7_t): Ditto.
43939 (vuint64m1x7_t): Ditto.
43940 (vint64m1x8_t): Ditto.
43941 (vuint64m1x8_t): Ditto.
43942 (vint64m2x2_t): Ditto.
43943 (vuint64m2x2_t): Ditto.
43944 (vint64m2x3_t): Ditto.
43945 (vuint64m2x3_t): Ditto.
43946 (vint64m2x4_t): Ditto.
43947 (vuint64m2x4_t): Ditto.
43948 (vint64m4x2_t): Ditto.
43949 (vuint64m4x2_t): Ditto.
43950 (vfloat32mf2x2_t): Ditto.
43951 (vfloat32mf2x3_t): Ditto.
43952 (vfloat32mf2x4_t): Ditto.
43953 (vfloat32mf2x5_t): Ditto.
43954 (vfloat32mf2x6_t): Ditto.
43955 (vfloat32mf2x7_t): Ditto.
43956 (vfloat32mf2x8_t): Ditto.
43957 (vfloat32m1x2_t): Ditto.
43958 (vfloat32m1x3_t): Ditto.
43959 (vfloat32m1x4_t): Ditto.
43960 (vfloat32m1x5_t): Ditto.
43961 (vfloat32m1x6_t): Ditto.
43962 (vfloat32m1x7_t): Ditto.
43963 (vfloat32m1x8_t): Ditto.
43964 (vfloat32m2x2_t): Ditto.
43965 (vfloat32m2x3_t): Ditto.
43966 (vfloat32m2x4_t): Ditto.
43967 (vfloat32m4x2_t): Ditto.
43968 (vfloat64m1x2_t): Ditto.
43969 (vfloat64m1x3_t): Ditto.
43970 (vfloat64m1x4_t): Ditto.
43971 (vfloat64m1x5_t): Ditto.
43972 (vfloat64m1x6_t): Ditto.
43973 (vfloat64m1x7_t): Ditto.
43974 (vfloat64m1x8_t): Ditto.
43975 (vfloat64m2x2_t): Ditto.
43976 (vfloat64m2x3_t): Ditto.
43977 (vfloat64m2x4_t): Ditto.
43978 (vfloat64m4x2_t): Ditto.
43979 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
43981 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
43982 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
43984 (TUPLE_ENTRY): Ditto.
43985 (riscv_v_ext_mode_p): New function.
43986 (riscv_v_adjust_nunits): Add tuple mode adjustment.
43987 (riscv_classify_address): Ditto.
43988 (riscv_binary_cost): Ditto.
43989 (riscv_rtx_costs): Ditto.
43990 (riscv_secondary_memory_needed): Ditto.
43991 (riscv_hard_regno_nregs): Ditto.
43992 (riscv_hard_regno_mode_ok): Ditto.
43993 (riscv_vector_mode_supported_p): Ditto.
43994 (riscv_regmode_natural_size): Ditto.
43995 (riscv_array_mode): New function.
43996 (TARGET_ARRAY_MODE): New target hook.
43997 * config/riscv/riscv.md: Add tuple modes.
43998 * config/riscv/vector-iterators.md: Ditto.
43999 * config/riscv/vector.md (mov<mode>): Add tuple modes data
44001 (*mov<VT:mode>_<P:mode>): Ditto.
44003 2023-05-03 Richard Biener <rguenther@suse.de>
44005 * cse.cc (cse_insn): Track an equivalence to the destination
44006 separately and delay using src_related for it.
44008 2023-05-03 Richard Biener <rguenther@suse.de>
44010 * cse.cc (HASH): Turn into inline function and mix
44011 in another HASH_SHIFT bits.
44012 (SAFE_HASH): Likewise.
44014 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44017 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
44018 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
44020 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44023 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
44024 (add<mode>3<vczle><vczbe>): ... This.
44025 (sub<mode>3): Rename to...
44026 (sub<mode>3<vczle><vczbe>): ... This.
44027 (mul<mode>3): Rename to...
44028 (mul<mode>3<vczle><vczbe>): ... This.
44029 (*div<mode>3): Rename to...
44030 (*div<mode>3<vczle><vczbe>): ... This.
44031 (neg<mode>2): Rename to...
44032 (neg<mode>2<vczle><vczbe>): ... This.
44033 (abs<mode>2): Rename to...
44034 (abs<mode>2<vczle><vczbe>): ... This.
44035 (<frint_pattern><mode>2): Rename to...
44036 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
44037 (<fmaxmin><mode>3): Rename to...
44038 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
44039 (*sqrt<mode>2): Rename to...
44040 (*sqrt<mode>2<vczle><vczbe>): ... This.
44042 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
44044 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
44046 2023-05-03 Martin Liska <mliska@suse.cz>
44048 PR tree-optimization/109693
44049 * value-range-storage.cc (vrange_allocator::vrange_allocator):
44050 Remove unused field.
44051 * value-range-storage.h: Likewise.
44053 2023-05-02 Andrew Pinski <apinski@marvell.com>
44055 * tree-ssa-phiopt.cc (move_stmt): New function.
44056 (match_simplify_replacement): Use move_stmt instead
44057 of the inlined version.
44059 2023-05-02 Andrew Pinski <apinski@marvell.com>
44061 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
44064 2023-05-02 Andrew Pinski <apinski@marvell.com>
44066 PR tree-optimization/109702
44067 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
44068 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
44070 2023-05-02 Andrew Pinski <apinski@marvell.com>
44073 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
44074 insn_and_split pattern.
44076 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44078 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
44081 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44083 * config/riscv/sync.md (mem_thread_fence_1): Change fence
44084 depending on the given memory model.
44086 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44088 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
44089 riscv_union_memmodels function to sync.md.
44090 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
44091 get the union of two memmodels in sync.md.
44092 (riscv_print_operand): Add %I and %J flags that output the
44093 optimal LR/SC flag bits for a given memory model.
44094 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
44095 bits on SC op and replace with optimized %I, %J flags.
44097 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44099 * config/riscv/riscv.cc
44100 (riscv_memmodel_needs_amo_release): Change function name.
44101 (riscv_print_operand): Remove unneeded %F case.
44102 * config/riscv/sync.md: Remove unneeded fences.
44104 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44107 * config/riscv/sync.md (atomic_store<mode>): Use simple store
44108 instruction in combination with fence(s).
44110 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44112 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
44113 of %A to include release bits.
44115 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44117 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
44118 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
44121 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44123 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
44124 sequentially consistent LR.aqrl/SC.rl pairs.
44126 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44128 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
44129 sanitize memmodel input with memmodel_base.
44131 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
44132 Pan Li <pan2.li@intel.com>
44135 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
44137 2023-05-02 Romain Naour <romain.naour@gmail.com>
44139 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
44142 2023-05-02 Martin Liska <mliska@suse.cz>
44144 * doc/invoke.texi: Update documentation based on param.opt file.
44146 2023-05-02 Richard Biener <rguenther@suse.de>
44148 PR tree-optimization/109672
44149 * tree-vect-stmts.cc (vectorizable_operation): For plus,
44150 minus and negate always check the vector mode is word mode.
44152 2023-05-01 Andrew Pinski <apinski@marvell.com>
44154 * tree-ssa-phiopt.cc: Update comment about
44155 how the transformation are implemented.
44157 2023-05-01 Jeff Law <jlaw@ventanamicro>
44159 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
44161 2023-05-01 Jeff Law <jlaw@ventanamicro>
44163 * config/cris/cris.cc (TARGET_LRA_P): Remove.
44164 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
44165 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
44166 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
44167 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
44168 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
44170 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
44172 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
44173 * print-tree.cc (print_decl_identifier): Implement it.
44174 * toplev.cc (output_stack_usage_1): Use it.
44176 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44178 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
44181 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44183 * value-range.h (irange::set_nonzero): Inline.
44185 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44187 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
44189 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
44190 invalid_range, as it is an inverse range.
44191 * tree-vrp.cc (find_case_label_range): Avoid trees.
44192 * value-range.cc (irange::irange_set): Delete.
44193 (irange::irange_set_1bit_anti_range): Delete.
44194 (irange::irange_set_anti_range): Delete.
44195 (irange::set): Cleanup.
44196 * value-range.h (class irange): Remove irange_set,
44197 irange_set_anti_range, irange_set_1bit_anti_range.
44198 (irange::set_undefined): Remove set to m_type.
44200 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44202 * range-op.cc (update_known_bitmask): Adjust for irange containing
44203 wide_ints internally.
44204 * tree-ssanames.cc (set_nonzero_bits): Same.
44205 * tree-ssanames.h (set_nonzero_bits): Same.
44206 * value-range-storage.cc (irange_storage::set_irange): Same.
44207 (irange_storage::get_irange): Same.
44208 * value-range.cc (irange::operator=): Same.
44209 (irange::irange_set): Same.
44210 (irange::irange_set_1bit_anti_range): Same.
44211 (irange::irange_set_anti_range): Same.
44212 (irange::set): Same.
44213 (irange::verify_range): Same.
44214 (irange::contains_p): Same.
44215 (irange::irange_single_pair_union): Same.
44216 (irange::union_): Same.
44217 (irange::irange_contains_p): Same.
44218 (irange::intersect): Same.
44219 (irange::invert): Same.
44220 (irange::set_range_from_nonzero_bits): Same.
44221 (irange::set_nonzero_bits): Same.
44222 (mask_to_wi): Same.
44223 (irange::intersect_nonzero_bits): Same.
44224 (irange::union_nonzero_bits): Same.
44227 (tree_range): Same.
44228 (range_tests_strict_enum): Same.
44229 (range_tests_misc): Same.
44230 (range_tests_nonzero_bits): Same.
44231 * value-range.h (irange::type): Same.
44232 (irange::varying_compatible_p): Same.
44233 (irange::irange): Same.
44234 (int_range::int_range): Same.
44235 (irange::set_undefined): Same.
44236 (irange::set_varying): Same.
44237 (irange::lower_bound): Same.
44238 (irange::upper_bound): Same.
44240 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44242 * gimple-range-fold.cc (tree_lower_bound): Delete.
44243 (tree_upper_bound): Delete.
44244 (vrp_val_max): Delete.
44245 (vrp_val_min): Delete.
44246 (fold_using_range::range_of_ssa_name_with_loop_info): Call
44247 range_of_var_in_loop.
44248 * vr-values.cc (valid_value_p): Delete.
44249 (fix_overflow): Delete.
44250 (get_scev_info): New.
44251 (bounds_of_var_in_loop): Refactor into...
44252 (induction_variable_may_overflow_p): ...this,
44253 (range_from_loop_direction): ...and this,
44254 (range_of_var_in_loop): ...and this.
44255 * vr-values.h (bounds_of_var_in_loop): Delete.
44256 (range_of_var_in_loop): New.
44258 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44260 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
44262 (vrp_val_max): New.
44263 (vrp_val_min): New.
44264 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
44265 * range-op.cc (max_limit): Same.
44267 (plus_minus_ranges): Same.
44268 (operator_rshift::op1_range): Same.
44269 (operator_cast::inside_domain_p): Same.
44270 * value-range.cc (vrp_val_is_max): Delete.
44271 (vrp_val_is_min): Delete.
44272 (range_tests_misc): Use irange_val_*.
44273 * value-range.h (vrp_val_is_min): Delete.
44274 (vrp_val_is_max): Delete.
44275 (vrp_val_max): Delete.
44276 (irange_val_min): New.
44277 (vrp_val_min): Delete.
44278 (irange_val_max): New.
44279 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
44281 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44283 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
44284 * gimple-fold.cc (size_must_be_zero_p): Same.
44285 * gimple-loop-versioning.cc
44286 (loop_versioning::prune_loop_conditions): Same.
44287 * gimple-range-edge.cc (gcond_edge_range): Same.
44288 (gimple_outgoing_range::calc_switch_ranges): Same.
44289 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
44290 (adjust_realpart_expr): Same.
44291 (fold_using_range::range_of_address): Same.
44292 (fold_using_range::relation_fold_and_or): Same.
44293 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
44294 (range_is_either_true_or_false): Same.
44295 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
44296 (cfn_clz::fold_range): Same.
44297 (cfn_ctz::fold_range): Same.
44298 * gimple-range-tests.cc (class test_expr_eval): Same.
44299 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
44300 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
44301 (propagate_vr_across_jump_function): Same.
44302 (decide_whether_version_node): Same.
44303 * ipa-prop.cc (ipa_get_value_range): Same.
44304 * ipa-prop.h (ipa_range_set_and_normalize): Same.
44305 * range-op.cc (get_shift_range): Same.
44306 (value_range_from_overflowed_bounds): Same.
44307 (value_range_with_overflow): Same.
44308 (create_possibly_reversed_range): Same.
44309 (equal_op1_op2_relation): Same.
44310 (not_equal_op1_op2_relation): Same.
44311 (lt_op1_op2_relation): Same.
44312 (le_op1_op2_relation): Same.
44313 (gt_op1_op2_relation): Same.
44314 (ge_op1_op2_relation): Same.
44315 (operator_mult::op1_range): Same.
44316 (operator_exact_divide::op1_range): Same.
44317 (operator_lshift::op1_range): Same.
44318 (operator_rshift::op1_range): Same.
44319 (operator_cast::op1_range): Same.
44320 (operator_logical_and::fold_range): Same.
44321 (set_nonzero_range_from_mask): Same.
44322 (operator_bitwise_or::op1_range): Same.
44323 (operator_bitwise_xor::op1_range): Same.
44324 (operator_addr_expr::fold_range): Same.
44325 (pointer_plus_operator::wi_fold): Same.
44326 (pointer_or_operator::op1_range): Same.
44333 (range_op_cast_tests): Same.
44334 (range_op_lshift_tests): Same.
44335 (range_op_rshift_tests): Same.
44336 (range_op_bitwise_and_tests): Same.
44337 (range_relational_tests): Same.
44338 * range.cc (range_zero): Same.
44339 (range_nonzero): Same.
44340 * range.h (range_true): Same.
44341 (range_false): Same.
44342 (range_true_and_false): Same.
44343 * tree-data-ref.cc (split_constant_offset_1): Same.
44344 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
44345 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
44346 (find_unswitching_predicates_for_bb): Same.
44347 * tree-ssa-phiopt.cc (value_replacement): Same.
44348 * tree-ssa-threadbackward.cc
44349 (back_threader::find_taken_edge_cond): Same.
44350 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
44351 * tree-vrp.cc (find_case_label_range): Same.
44352 * value-query.cc (range_query::get_tree_range): Same.
44353 * value-range.cc (irange::set_nonnegative): Same.
44354 (frange::contains_p): Same.
44355 (frange::singleton_p): Same.
44356 (frange::internal_singleton_p): Same.
44357 (irange::irange_set): Same.
44358 (irange::irange_set_1bit_anti_range): Same.
44359 (irange::irange_set_anti_range): Same.
44360 (irange::set): Same.
44361 (irange::operator==): Same.
44362 (irange::singleton_p): Same.
44363 (irange::contains_p): Same.
44364 (irange::set_range_from_nonzero_bits): Same.
44365 (DEFINE_INT_RANGE_INSTANCE): Same.
44375 (range_uint128): New.
44376 (range_uchar): New.
44378 (build_range3): Convert to irange wide_int API.
44379 (range_tests_irange3): Same.
44380 (range_tests_int_range_max): Same.
44381 (range_tests_strict_enum): Same.
44382 (range_tests_misc): Same.
44383 (range_tests_nonzero_bits): Same.
44384 (range_tests_nan): Same.
44385 (range_tests_signed_zeros): Same.
44386 * value-range.h (Value_Range::Value_Range): Same.
44387 (irange::set): Same.
44388 (irange::nonzero_p): Same.
44389 (irange::contains_p): Same.
44390 (range_includes_zero_p): Same.
44391 (irange::set_nonzero): Same.
44392 (irange::set_zero): Same.
44393 (contains_zero_p): Same.
44394 (frange::contains_p): Same.
44396 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
44397 (bounds_of_var_in_loop): Same.
44398 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
44400 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44402 * value-range.cc (irange::irange_union): Rename to...
44403 (irange::union_): ...this.
44404 (irange::irange_intersect): Rename to...
44405 (irange::intersect): ...this.
44406 * value-range.h (irange::union_): Delete.
44407 (irange::intersect): Delete.
44409 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44411 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
44413 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44415 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
44417 (compare_ranges): Delete.
44418 (compare_range_with_value): Delete.
44419 (bounds_of_var_in_loop): Tidy up by using ranger API.
44420 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
44421 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
44422 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
44423 strict_overflow_p and only_ranges.
44424 (simplify_using_ranges::legacy_fold_cond): Adjust call to
44425 legacy_fold_cond_overflow.
44426 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
44428 (range_fits_type_p): Rename value_range to irange.
44429 * vr-values.h (range_fits_type_p): Adjust prototype.
44431 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44433 * value-range.cc (irange::irange_set_anti_range): Remove uses of
44434 tree_lower_bound and tree_upper_bound.
44435 (irange::verify_range): Same.
44436 (irange::operator==): Same.
44437 (irange::singleton_p): Same.
44438 * value-range.h (irange::tree_lower_bound): Delete.
44439 (irange::tree_upper_bound): Delete.
44440 (irange::lower_bound): Delete.
44441 (irange::upper_bound): Delete.
44442 (irange::zero_p): Remove uses of tree_lower_bound and
44445 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44447 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
44449 (determine_value_range): Same.
44450 (record_nonwrapping_iv): Same.
44451 (infer_loop_bounds_from_signedness): Same.
44452 (scev_var_range_cant_overflow): Same.
44453 * tree-vrp.cc (operand_less_p): Delete.
44454 * tree-vrp.h (operand_less_p): Delete.
44455 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
44456 (irange::value_inside_range): Delete.
44457 * value-range.h (vrange::kind): Delete.
44458 (irange::num_pairs): Remove check of m_kind.
44459 (irange::min): Delete.
44460 (irange::max): Delete.
44462 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44464 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
44465 for vrange_storage.
44466 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
44467 (sbr_vector::grow): Same.
44468 (sbr_vector::set_bb_range): Same.
44469 (sbr_vector::get_bb_range): Same.
44470 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
44471 (sbr_sparse_bitmap::set_bb_range): Same.
44472 (sbr_sparse_bitmap::get_bb_range): Same.
44473 (block_range_cache::block_range_cache): Same.
44474 (ssa_global_cache::ssa_global_cache): Same.
44475 (ssa_global_cache::get_global_range): Same.
44476 (ssa_global_cache::set_global_range): Same.
44477 * gimple-range-cache.h: Same.
44478 * gimple-range-edge.cc
44479 (gimple_outgoing_range::gimple_outgoing_range): Same.
44480 (gimple_outgoing_range::switch_edge_range): Same.
44481 (gimple_outgoing_range::calc_switch_ranges): Same.
44482 * gimple-range-edge.h: Same.
44483 * gimple-range-infer.cc
44484 (infer_range_manager::infer_range_manager): Same.
44485 (infer_range_manager::get_nonzero): Same.
44486 (infer_range_manager::maybe_adjust_range): Same.
44487 (infer_range_manager::add_range): Same.
44488 * gimple-range-infer.h: Rename obstack_vrange_allocator to
44490 * tree-core.h (struct irange_storage_slot): Remove.
44491 (struct tree_ssa_name): Remove irange_info and frange_info. Make
44492 range_info a pointer to vrange_storage.
44493 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
44494 (range_info_alloc): Same.
44495 (range_info_free): Same.
44496 (range_info_get_range): Same.
44497 (range_info_set_range): Same.
44498 (get_nonzero_bits): Same.
44499 * value-query.cc (get_ssa_name_range_info): Same.
44500 * value-range-storage.cc (class vrange_internal_alloc): New.
44501 (class vrange_obstack_alloc): New.
44502 (class vrange_ggc_alloc): New.
44503 (vrange_allocator::vrange_allocator): New.
44504 (vrange_allocator::~vrange_allocator): New.
44505 (vrange_storage::alloc_slot): New.
44506 (vrange_allocator::alloc): New.
44507 (vrange_allocator::free): New.
44508 (vrange_allocator::clone): New.
44509 (vrange_allocator::clone_varying): New.
44510 (vrange_allocator::clone_undefined): New.
44511 (vrange_storage::alloc): New.
44512 (vrange_storage::set_vrange): Remove slot argument.
44513 (vrange_storage::get_vrange): Same.
44514 (vrange_storage::fits_p): Same.
44515 (vrange_storage::equal_p): New.
44516 (irange_storage::write_lengths_address): New.
44517 (irange_storage::lengths_address): New.
44518 (irange_storage_slot::alloc_slot): Remove.
44519 (irange_storage::alloc): New.
44520 (irange_storage_slot::irange_storage_slot): Remove.
44521 (irange_storage::irange_storage): New.
44522 (write_wide_int): New.
44523 (irange_storage_slot::set_irange): Remove.
44524 (irange_storage::set_irange): New.
44525 (read_wide_int): New.
44526 (irange_storage_slot::get_irange): Remove.
44527 (irange_storage::get_irange): New.
44528 (irange_storage_slot::size): Remove.
44529 (irange_storage::equal_p): New.
44530 (irange_storage_slot::num_wide_ints_needed): Remove.
44531 (irange_storage::size): New.
44532 (irange_storage_slot::fits_p): Remove.
44533 (irange_storage::fits_p): New.
44534 (irange_storage_slot::dump): Remove.
44535 (irange_storage::dump): New.
44536 (frange_storage_slot::alloc_slot): Remove.
44537 (frange_storage::alloc): New.
44538 (frange_storage_slot::set_frange): Remove.
44539 (frange_storage::set_frange): New.
44540 (frange_storage_slot::get_frange): Remove.
44541 (frange_storage::get_frange): New.
44542 (frange_storage_slot::fits_p): Remove.
44543 (frange_storage::equal_p): New.
44544 (frange_storage::fits_p): New.
44545 (ggc_vrange_allocator): New.
44546 (ggc_alloc_vrange_storage): New.
44547 * value-range-storage.h (class vrange_storage): Rewrite.
44548 (class irange_storage): Rewrite.
44549 (class frange_storage): Rewrite.
44550 (class obstack_vrange_allocator): Remove.
44551 (class ggc_vrange_allocator): Remove.
44552 (vrange_allocator::alloc_vrange): Remove.
44553 (vrange_allocator::alloc_irange): Remove.
44554 (vrange_allocator::alloc_frange): Remove.
44555 (ggc_alloc_vrange_storage): New.
44556 * value-range.h (class irange): Rename vrange_allocator to
44558 (class frange): Same.
44560 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
44562 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
44563 inc to avoid clobbering the carry flag.
44565 2023-04-30 Andrew Pinski <apinski@marvell.com>
44567 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
44568 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
44570 2023-04-30 Andrew Pinski <apinski@marvell.com>
44572 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
44573 Allow some builtin/internal function calls which
44574 are known not to trap/throw.
44575 (phiopt_worker::match_simplify_replacement):
44576 Use name instead of getting the lhs again.
44578 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
44580 * configure: Regenerate.
44581 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
44583 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
44585 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
44586 emit_insn_if_valid_for_reload.
44587 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
44588 to be recognized, also try emitting a parallel that clobbers
44589 TARGET_FLAGS_REGNUM, as applicable.
44591 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
44593 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
44595 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
44596 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
44598 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
44600 * config/stormy16/stormy16.md (any_lshift): New code iterator.
44601 (any_or_plus): Likewise.
44602 (any_rotate): Likewise.
44603 (*<any_lshift>_and_internal): New define_insn_and_split to
44604 recognize a logical shift followed by an AND, and split it
44605 again after reload.
44606 (*swpn): New define_insn matching xstormy16's swpn.
44607 (*swpn_zext): New define_insn recognizing swpn followed by
44608 zero_extendqihi2, i.e. with the high byte set to zero.
44609 (*swpn_sext): Likewise, for swpn followed by cbw.
44610 (*swpn_sext_2): Likewise, for an alternate RTL form.
44611 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
44612 sequence is split in the correct place to recognize the *swpn_zext
44613 followed by any_or_plus (ior, xor or plus) instruction.
44615 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
44618 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
44619 (lm32-*-uclinux*): Likewise.
44621 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
44623 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
44624 for riscv_use_save_libcall.
44625 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
44626 (riscv_compute_frame_info): restructure to decouple stack allocation
44627 for rv32e w/o save-restore.
44629 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
44631 * doc/install.texi: Fix documentation typo
44633 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
44635 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
44636 (u): Add div/udiv cases.
44637 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
44638 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
44640 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
44641 (thead_c906_tune_info): Likewise.
44642 (optimize_size_tune_info): Likewise.
44643 (riscv_use_divmod_expander): New function.
44644 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
44646 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
44648 * config/riscv/bitmanip.md: Added clmulr instruction.
44649 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
44650 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
44652 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
44653 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
44654 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
44655 functions to riscv-cmo.def.
44656 * config/riscv/generic.md: Add clmul to list of instructions
44657 using the generic_imul reservation.
44659 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
44661 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
44663 2023-04-28 Andrew Pinski <apinski@marvell.com>
44665 PR tree-optimization/100958
44666 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
44667 (pass_phiopt::execute): Don't call two_value_replacement.
44668 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
44669 handle what two_value_replacement did.
44671 2023-04-28 Andrew Pinski <apinski@marvell.com>
44673 * match.pd: Add patterns for
44674 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
44676 2023-04-28 Andrew Pinski <apinski@marvell.com>
44678 * match.pd: Factor out the deciding the min/max from
44679 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
44681 * fold-const.cc (minmax_from_comparison): this new function.
44682 * fold-const.h (minmax_from_comparison): New prototype.
44684 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
44686 PR rtl-optimization/109476
44687 * lower-subreg.cc: Include explow.h for force_reg.
44688 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
44689 If decomposing a suitable LSHIFTRT and we're not splitting
44690 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
44691 instead of setting a high part SUBREG to zero, which helps combine.
44692 (decompose_multiword_subregs): Update call to resolve_shift_zext.
44694 2023-04-28 Richard Biener <rguenther@suse.de>
44696 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
44698 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
44699 gather-scatter info and cost emulated scatters accordingly.
44700 (get_load_store_type): Support emulated scatters.
44701 (vectorizable_store): Likewise. Emulate them by extracting
44702 scalar offsets and data, doing scalar stores.
44704 2023-04-28 Richard Biener <rguenther@suse.de>
44706 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
44707 Tame down element extracts and scalar loads for gather/scatter
44708 similar to elementwise strided accesses.
44710 2023-04-28 Pan Li <pan2.li@intel.com>
44711 kito-cheng <kito.cheng@sifive.com>
44713 * config/riscv/vector.md: Add new define split to perform
44714 the simplification.
44716 2023-04-28 Richard Biener <rguenther@suse.de>
44719 * ipa-param-manipulation.cc
44720 (ipa_param_body_adjustments::modify_expression): Allow
44721 conversion of a register to a non-register type. Elide
44722 conversions inside BIT_FIELD_REFs.
44724 2023-04-28 Richard Biener <rguenther@suse.de>
44726 PR tree-optimization/109644
44727 * tree-cfg.cc (verify_types_in_gimple_reference): Check
44728 register constraints on the outermost VIEW_CONVERT_EXPR
44729 only. Do not allow register or invariant bases on
44730 multi-level or possibly variable index handled components.
44732 2023-04-28 Richard Biener <rguenther@suse.de>
44734 * gimplify.cc (gimplify_compound_lval): When there's a
44735 non-register type produced by one of the handled component
44736 operations make sure we get a non-register base.
44738 2023-04-28 Richard Biener <rguenther@suse.de>
44740 PR tree-optimization/108752
44741 * tree-vect-generic.cc (build_replicated_const): Rename
44742 to build_replicated_int_cst and move to tree.{h,cc}.
44743 (do_plus_minus): Adjust.
44744 (do_negate): Likewise.
44745 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
44746 arithmetic vector operations in lowered form.
44747 * tree.h (build_replicated_int_cst): Declare.
44748 * tree.cc (build_replicated_int_cst): Moved from
44749 tree-vect-generic.cc build_replicated_const.
44751 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44754 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
44755 (aarch64_rbit<mode><vczle><vczbe>): ... This.
44756 (neg<mode>2): Rename to...
44757 (neg<mode>2<vczle><vczbe>): ... This.
44758 (abs<mode>2): Rename to...
44759 (abs<mode>2<vczle><vczbe>): ... This.
44760 (aarch64_abs<mode>): Rename to...
44761 (aarch64_abs<mode><vczle><vczbe>): ... This.
44762 (one_cmpl<mode>2): Rename to...
44763 (one_cmpl<mode>2<vczle><vczbe>): ... This.
44764 (clrsb<mode>2): Rename to...
44765 (clrsb<mode>2<vczle><vczbe>): ... This.
44766 (clz<mode>2): Rename to...
44767 (clz<mode>2<vczle><vczbe>): ... This.
44768 (popcount<mode>2): Rename to...
44769 (popcount<mode>2<vczle><vczbe>): ... This.
44771 2023-04-28 Jakub Jelinek <jakub@redhat.com>
44773 * gimple-range-op.cc (class cfn_sqrt): New type.
44774 (op_cfn_sqrt): New variable.
44775 (gimple_range_op_handler::maybe_builtin_call): Handle
44776 CASE_CFN_SQRT{,_FN}.
44778 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
44779 Jakub Jelinek <jakub@redhat.com>
44781 * value-range.h (frange_nextafter): Declare.
44782 * gimple-range-op.cc (class cfn_sincos): New.
44783 (op_cfn_sin, op_cfn_cos): New variables.
44784 (gimple_range_op_handler::maybe_builtin_call): Handle
44785 CASE_CFN_{SIN,COS}{,_FN}.
44787 2023-04-28 Jakub Jelinek <jakub@redhat.com>
44789 * target.def (libm_function_max_error): New target hook.
44790 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
44791 * doc/tm.texi: Regenerated.
44792 * targhooks.h (default_libm_function_max_error,
44793 glibc_linux_libm_function_max_error): Declare.
44794 * targhooks.cc: Include case-cfn-macros.h.
44795 (default_libm_function_max_error,
44796 glibc_linux_libm_function_max_error): New functions.
44797 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
44798 * config/linux-protos.h (linux_libm_function_max_error): Declare.
44799 * config/linux.cc: Include target.h and targhooks.h.
44800 (linux_libm_function_max_error): New function.
44801 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
44802 (arc_libm_function_max_error): New function.
44803 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
44804 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
44805 (ix86_libm_function_max_error): New function.
44806 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
44807 * config/rs6000/rs6000-protos.h
44808 (rs6000_linux_libm_function_max_error): Declare.
44809 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
44810 and case-cfn-macros.h.
44811 (rs6000_linux_libm_function_max_error): New function.
44812 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
44813 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
44814 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
44815 (or1k_libm_function_max_error): New function.
44816 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
44818 2023-04-28 Alexandre Oliva <oliva@adacore.com>
44820 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
44821 Move detach value calls...
44822 (pass_harden_conditional_branches::execute): ... here.
44823 (pass_harden_compares::execute): Detach values before
44826 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
44828 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
44829 (cml<addsub_as><mode>4): Likewise.
44830 (vec_addsub<mode>3): Likewise.
44831 (cadd<rot><mode>3): Likewise.
44832 (vec_fmaddsub<mode>4): Likewise.
44833 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
44835 2023-04-27 Andrew Pinski <apinski@marvell.com>
44837 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
44838 up to 2 min/max expressions in the sequence/match code.
44840 2023-04-27 Andrew Pinski <apinski@marvell.com>
44842 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
44844 * tree-eh.cc (operation_could_trap_helper_p): Treate
44845 MIN_EXPR/MAX_EXPR similar as other comparisons.
44847 2023-04-27 Andrew Pinski <apinski@marvell.com>
44849 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
44851 (cond_if_else_store_replacement): Likewise.
44852 (get_non_trapping): Likewise.
44853 (store_elim_worker): Move into ...
44854 (pass_cselim::execute): This.
44856 2023-04-27 Andrew Pinski <apinski@marvell.com>
44858 * tree-ssa-phiopt.cc (two_value_replacement): Remove
44860 (match_simplify_replacement): Likewise.
44861 (factor_out_conditional_conversion): Likewise.
44862 (value_replacement): Likewise.
44863 (minmax_replacement): Likewise.
44864 (spaceship_replacement): Likewise.
44865 (cond_removal_in_builtin_zero_pattern): Likewise.
44866 (hoist_adjacent_loads): Likewise.
44867 (tree_ssa_phiopt_worker): Move into ...
44868 (pass_phiopt::execute): this.
44870 2023-04-27 Andrew Pinski <apinski@marvell.com>
44872 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
44873 do_store_elim argument and split that part out to ...
44874 (store_elim_worker): This new function.
44875 (pass_cselim::execute): Call store_elim_worker.
44876 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
44878 2023-04-27 Jan Hubicka <jh@suse.cz>
44880 * cfgloopmanip.h (unloop_loops): Export.
44881 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
44882 that no longer loop.
44883 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
44884 vectors of loops to unloop.
44885 (canonicalize_induction_variables): Free vectors here.
44886 (tree_unroll_loops_completely): Free vectors here.
44888 2023-04-27 Richard Biener <rguenther@suse.de>
44890 PR tree-optimization/109170
44891 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
44892 Handle __builtin_expect and similar via cfn_pass_through_arg1
44893 and inspecting the calls fnspec.
44894 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
44895 and BUILT_IN_EXPECT_WITH_PROBABILITY.
44897 2023-04-27 Alexandre Oliva <oliva@adacore.com>
44899 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
44901 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
44903 PR tree-optimization/109639
44904 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
44905 (propagate_vr_across_jump_function): Same.
44906 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
44907 * ipa-prop.h (ipa_range_set_and_normalize): New.
44908 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
44910 2023-04-27 Richard Biener <rguenther@suse.de>
44912 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
44913 create a CTOR operand in the result when simplifying GIMPLE.
44915 2023-04-27 Richard Biener <rguenther@suse.de>
44917 * gimplify.cc (gimplify_compound_lval): When the base
44918 gimplified to a register make sure to split up chains
44921 2023-04-27 Richard Biener <rguenther@suse.de>
44924 * ipa-param-manipulation.h
44925 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
44927 * ipa-param-manipulation.cc
44928 (ipa_param_body_adjustments::modify_expression): Likewise.
44929 When we need a conversion and the replacement is a register
44930 split the conversion out.
44931 (ipa_param_body_adjustments::modify_assignment): Pass
44932 extra_stmts to RHS modify_expression.
44934 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
44936 * doc/extend.texi (Zero Length): Describe example.
44938 2023-04-27 Richard Biener <rguenther@suse.de>
44940 PR tree-optimization/109594
44941 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
44942 what we rewrite to a register based on the above.
44944 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
44946 * config/riscv/riscv.cc: Fix whitespace.
44947 * config/riscv/sync.md: Fix whitespace.
44949 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
44951 PR tree-optimization/108697
44952 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
44953 not clear the vector on an out of range query.
44954 (ssa_cache::dump): Use dump_range_query instead of get_range.
44955 (ssa_cache::dump_range_query): New.
44956 (ssa_lazy_cache::dump_range_query): New.
44957 (ssa_lazy_cache::set_range): New.
44958 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
44959 (class ssa_lazy_cache): New.
44960 (ssa_lazy_cache::ssa_lazy_cache): New.
44961 (ssa_lazy_cache::~ssa_lazy_cache): New.
44962 (ssa_lazy_cache::get_range): New.
44963 (ssa_lazy_cache::clear_range): New.
44964 (ssa_lazy_cache::clear): New.
44965 (ssa_lazy_cache::dump): New.
44966 * gimple-range-path.cc (path_range_query::path_range_query): Do
44967 not allocate a ssa_cache object nor has_cache bitmap.
44968 (path_range_query::~path_range_query): Do not free objects.
44969 (path_range_query::clear_cache): Remove.
44970 (path_range_query::get_cache): Adjust.
44971 (path_range_query::set_cache): Remove.
44972 (path_range_query::dump): Don't call through a pointer.
44973 (path_range_query::internal_range_of_expr): Set cache directly.
44974 (path_range_query::reset_path): Clear cache directly.
44975 (path_range_query::ssa_range_in_phi): Fold with globals only.
44976 (path_range_query::compute_ranges_in_phis): Simply set range.
44977 (path_range_query::compute_ranges_in_block): Call cache directly.
44978 * gimple-range-path.h (class path_range_query): Replace bitmap
44979 and cache pointer with lazy cache object.
44980 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
44982 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
44984 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
44985 (ssa_cache::~ssa_cache): Rename.
44986 (ssa_cache::has_range): New.
44987 (ssa_cache::get_range): Rename.
44988 (ssa_cache::set_range): Rename.
44989 (ssa_cache::clear_range): Rename.
44990 (ssa_cache::clear): Rename.
44991 (ssa_cache::dump): Rename and use get_range.
44992 (ranger_cache::get_global_range): Use get_range and set_range.
44993 (ranger_cache::range_of_def): Use get_range.
44994 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
44995 (class ranger_cache): Use ssa_cache.
44996 * gimple-range-path.cc (path_range_query::path_range_query): Use
44998 (path_range_query::get_cache): Use get_range.
44999 (path_range_query::set_cache): Use set_range.
45000 * gimple-range-path.h (class path_range_query): Use ssa_cache.
45001 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
45002 (assume_query::range_of_expr): Use get_range.
45003 (assume_query::assume_query): Use set_range.
45004 (assume_query::calculate_op): Use get_range and set_range.
45005 * gimple-range.h (class assume_query): Use ssa_cache.
45007 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
45009 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
45010 and local to optionally zero memory.
45011 (br_vector::grow): Only zero memory if flag is set.
45012 (class sbr_lazy_vector): New.
45013 (sbr_lazy_vector::sbr_lazy_vector): New.
45014 (sbr_lazy_vector::set_bb_range): New.
45015 (sbr_lazy_vector::get_bb_range): New.
45016 (sbr_lazy_vector::bb_range_p): New.
45017 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
45018 * gimple-range-gori.cc (gori_map::calculate_gori): Use
45019 param_vrp_switch_limit.
45020 (gori_compute::gori_compute): Use param_vrp_switch_limit.
45021 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
45022 (vrp_switch_limit): Rename from evrp_switch_limit.
45023 (vrp_vector_threshold): New.
45025 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
45027 * value-relation.cc (dom_oracle::query_relation): Check early for lack
45029 * value-relation.h (equiv_oracle::has_equiv_p): New.
45031 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
45033 PR tree-optimization/109417
45034 * gimple-range-gori.cc (range_def_chain::register_dependency):
45035 Save the ssa version number, not the pointer.
45036 (gori_compute::may_recompute_p): No need to check if a dependency
45037 is in the free list.
45038 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
45039 fields to be unsigned int instead of trees.
45040 (ange_def_chain::depend1): Adjust.
45041 (ange_def_chain::depend2): Adjust.
45042 * gimple-range.h: Include "ssa.h" to inline ssa_name().
45044 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
45046 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
45047 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
45048 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
45050 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
45053 * config/riscv/riscv-protos.h: Add helper function stubs.
45054 * config/riscv/riscv.cc: Add helper functions for subword masking.
45055 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
45056 -mno-inline-atomics.
45057 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
45058 fetch_and_nand, CAS, and exchange ops.
45059 * doc/invoke.texi: Add blurb regarding new command-line flags
45060 -minline-atomics and -mno-inline-atomics.
45062 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45064 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
45065 Reimplement using standard RTL codes instead of unspec.
45066 (aarch64_rshrn2<mode>_insn_be): Likewise.
45067 (aarch64_rshrn2<mode>): Adjust for the above.
45068 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
45070 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45072 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
45073 with standard RTL codes instead of an UNSPEC.
45074 (aarch64_rshrn<mode>_insn_be): Likewise.
45075 (aarch64_rshrn<mode>): Adjust for the above.
45076 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
45078 2023-04-26 Pan Li <pan2.li@intel.com>
45079 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45081 * config/riscv/riscv.cc (riscv_classify_address): Allow
45082 const0_rtx for the RVV load/store.
45084 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45086 * range-op.cc (range_op_cast_tests): Remove legacy support.
45087 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
45088 * value-range.cc (irange::operator=): Same.
45089 (get_legacy_range): Same.
45090 (irange::copy_legacy_to_multi_range): Delete.
45091 (irange::copy_to_legacy): Delete.
45092 (irange::irange_set_anti_range): Delete.
45093 (irange::set): Remove legacy support.
45094 (irange::verify_range): Same.
45095 (irange::legacy_lower_bound): Delete.
45096 (irange::legacy_upper_bound): Delete.
45097 (irange::legacy_equal_p): Delete.
45098 (irange::operator==): Remove legacy support.
45099 (irange::singleton_p): Same.
45100 (irange::value_inside_range): Same.
45101 (irange::contains_p): Same.
45102 (intersect_ranges): Delete.
45103 (irange::legacy_intersect): Delete.
45104 (union_ranges): Delete.
45105 (irange::legacy_union): Delete.
45106 (irange::legacy_verbose_union_): Delete.
45107 (irange::legacy_verbose_intersect): Delete.
45108 (irange::irange_union): Remove legacy support.
45109 (irange::irange_intersect): Same.
45110 (irange::intersect): Same.
45111 (irange::invert): Same.
45112 (ranges_from_anti_range): Delete.
45113 (gt_pch_nx): Adjust for legacy removal.
45115 (range_tests_legacy): Delete.
45116 (range_tests_misc): Adjust for legacy removal.
45117 (range_tests): Same.
45118 * value-range.h (class irange): Same.
45119 (irange::legacy_mode_p): Delete.
45120 (ranges_from_anti_range): Delete.
45121 (irange::nonzero_p): Adjust for legacy removal.
45122 (irange::lower_bound): Same.
45123 (irange::upper_bound): Same.
45124 (irange::union_): Same.
45125 (irange::intersect): Same.
45126 (irange::set_nonzero): Same.
45127 (irange::set_zero): Same.
45128 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
45130 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45132 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
45133 of range_has_numeric_bounds_p with irange API.
45134 (range_has_numeric_bounds_p): Delete.
45135 * value-range.h (range_has_numeric_bounds_p): Delete.
45137 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45139 * tree-data-ref.cc (compute_distributive_range): Replace uses of
45140 range_int_cst_p with irange API.
45141 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
45142 * tree-vrp.h (range_int_cst_p): Delete.
45143 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
45144 range_int_cst_p with irange API.
45145 (vr_set_zero_nonzero_bits): Same.
45146 (range_fits_type_p): Same.
45147 (simplify_using_ranges::simplify_casted_cond): Same.
45148 * tree-vrp.cc (range_int_cst_p): Remove.
45150 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45152 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
45154 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45156 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
45157 API uses to new API.
45158 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
45159 * internal-fn.cc (get_min_precision): Same.
45161 * tree-affine.cc (expr_to_aff_combination): Same.
45162 * tree-data-ref.cc (dr_step_indicator): Same.
45163 * tree-dfa.cc (get_ref_base_and_extent): Same.
45164 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
45165 * tree-ssa-phiopt.cc (two_value_replacement): Same.
45166 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
45167 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
45168 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
45169 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
45170 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
45171 * tree.cc (get_range_pos_neg): Same.
45173 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45175 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
45176 vrange::dump instead of ad-hoc dumper.
45177 * tree-ssa-strlen.cc (dump_strlen_info): Same.
45178 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
45181 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45183 * range-op.cc (operator_cast::op1_range): Use
45184 create_possibly_reversed_range.
45185 (operator_bitwise_and::simple_op1_range_solver): Same.
45186 * value-range.cc (swap_out_of_order_endpoints): Delete.
45187 (irange::set): Remove call to swap_out_of_order_endpoints.
45189 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45191 * builtins.cc (determine_block_size): Convert use of legacy API to
45193 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
45194 (array_bounds_checker::check_array_ref): Same.
45195 * gimple-ssa-warn-restrict.cc
45196 (builtin_memref::extend_offset_range): Same.
45197 * ipa-cp.cc (ipcp_store_vr_results): Same.
45198 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
45199 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
45200 (ipa_write_jump_function): Same.
45201 * pointer-query.cc (get_size_range): Same.
45202 * tree-data-ref.cc (split_constant_offset): Same.
45203 * tree-ssa-strlen.cc (get_range): Same.
45204 (maybe_diag_stxncpy_trunc): Same.
45205 (strlen_pass::get_len_or_size): Same.
45206 (strlen_pass::count_nonzero_bytes_addr): Same.
45207 * tree-vect-patterns.cc (vect_get_range_info): Same.
45208 * value-range.cc (irange::maybe_anti_range): Remove.
45209 (get_legacy_range): New.
45210 (irange::copy_to_legacy): Use get_legacy_range.
45211 (ranges_from_anti_range): Same.
45212 * value-range.h (class irange): Remove maybe_anti_range.
45213 (get_legacy_range): New.
45214 * vr-values.cc (check_for_binary_op_overflow): Convert use of
45215 legacy API to get_legacy_range.
45216 (compare_ranges): Same.
45217 (compare_range_with_value): Same.
45218 (bounds_of_var_in_loop): Same.
45219 (find_case_label_ranges): Same.
45220 (simplify_using_ranges::simplify_switch_using_ranges): Same.
45222 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45224 * value-range-pretty-print.cc (vrange_printer::visit): Remove
45226 * value-range.cc (irange::constant_p): Remove.
45227 (irange::get_nonzero_bits_from_range): Remove constant_p use.
45228 * value-range.h (class irange): Remove constant_p.
45229 (irange::num_pairs): Remove constant_p use.
45231 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45233 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
45235 (irange::set): Same.
45236 (irange::legacy_lower_bound): Same.
45237 (irange::legacy_upper_bound): Same.
45238 (irange::contains_p): Same.
45239 (range_tests_legacy): Same.
45240 (irange::normalize_addresses): Remove.
45241 (irange::normalize_symbolics): Remove.
45242 (irange::symbolic_p): Remove.
45243 * value-range.h (class irange): Remove symbolic_p,
45244 normalize_symbolics, and normalize_addresses.
45245 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
45246 Remove symbolics support.
45248 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45250 * value-range.cc (irange::may_contain_p): Remove.
45251 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
45252 usage with contains_p.
45253 * vr-values.cc (compare_range_with_value): Same.
45255 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45257 * tree-vrp.cc (supported_types_p): Remove.
45258 (defined_ranges_p): Remove.
45259 (range_fold_binary_expr): Remove.
45260 (range_fold_unary_expr): Remove.
45261 * tree-vrp.h (range_fold_unary_expr): Remove.
45262 (range_fold_binary_expr): Remove.
45264 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45266 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
45267 (ipa_value_range_from_jfunc): Same.
45268 (propagate_vr_across_jump_function): Same.
45269 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
45270 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
45271 * vr-values.cc (bounds_of_var_in_loop): Same.
45273 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45275 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
45276 Add irange argument.
45277 (check_out_of_bounds_and_warn): Remove check for vr.
45278 (array_bounds_checker::check_array_ref): Remove pointer qualifier
45279 for vr and adjust accordingly.
45280 * gimple-array-bounds.h (get_value_range): Add irange argument.
45281 * value-query.cc (class equiv_allocator): Delete.
45282 (range_query::get_value_range): Delete.
45283 (range_query::range_query): Remove allocator access.
45284 (range_query::~range_query): Same.
45285 * value-query.h (get_value_range): Delete.
45287 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
45288 call to get_value_range.
45289 (check_for_binary_op_overflow): Same.
45290 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
45291 (simplify_using_ranges::simplify_abs_using_ranges): Same.
45292 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
45293 (simplify_using_ranges::simplify_casted_cond): Same.
45294 (simplify_using_ranges::simplify_switch_using_ranges): Same.
45295 (simplify_using_ranges::two_valued_val_range_p): Same.
45297 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45300 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
45302 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
45303 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
45304 (simplify_using_ranges::legacy_fold_cond): ...this.
45305 (simplify_using_ranges::fold_cond): Rename
45306 vrp_evaluate_conditional_warnv_with_ops to
45307 legacy_fold_cond_overflow.
45308 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
45309 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
45310 legacy_fold_cond_overflow respectively.
45312 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45314 * vr-values.cc (get_vr_for_comparison): Remove.
45315 (compare_name_with_value): Same.
45316 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
45317 compare_name_with_value.
45318 * vr-values.h: Remove compare_name_with_value.
45319 Remove get_vr_for_comparison.
45321 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
45323 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
45324 (bswapsi2): New define_insn.
45325 (swaphi): New define_insn to exchange two registers (swpw).
45326 (define_peephole2): Recognize exchange of registers as swaphi.
45328 2023-04-26 Richard Biener <rguenther@suse.de>
45330 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
45332 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
45333 * predict.cc (apply_return_prediction): Likewise.
45334 * sese.cc (set_ifsese_condition): Likewise. Simplify.
45335 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
45336 (make_edges_bb): Likewise.
45337 (make_cond_expr_edges): Likewise.
45338 (end_recording_case_labels): Likewise.
45339 (make_gimple_asm_edges): Likewise.
45340 (cleanup_dead_labels): Likewise.
45341 (group_case_labels): Likewise.
45342 (gimple_can_merge_blocks_p): Likewise.
45343 (gimple_merge_blocks): Likewise.
45344 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
45345 (gimple_duplicate_sese_tail): Avoid last_stmt.
45346 (find_loop_dist_alias): Likewise.
45347 (gimple_block_ends_with_condjump_p): Likewise.
45348 (gimple_purge_dead_eh_edges): Likewise.
45349 (gimple_purge_dead_abnormal_call_edges): Likewise.
45350 (pass_warn_function_return::execute): Likewise.
45351 (execute_fixup_cfg): Likewise.
45352 * tree-eh.cc (redirect_eh_edge_1): Likewise.
45353 (pass_lower_resx::execute): Likewise.
45354 (pass_lower_eh_dispatch::execute): Likewise.
45355 (cleanup_empty_eh): Likewise.
45356 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
45357 (predicate_bbs): Likewise.
45358 (ifcvt_split_critical_edges): Likewise.
45359 * tree-loop-distribution.cc (create_edge_for_control_dependence):
45361 (loop_distribution::transform_reduction_loop): Likewise.
45362 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
45363 (try_transform_to_exit_first_loop_alt): Likewise.
45364 (transform_to_exit_first_loop): Likewise.
45365 (create_parallel_loop): Likewise.
45366 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
45367 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
45368 (eliminate_unnecessary_stmts): Likewise.
45370 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
45372 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
45373 (pass_tree_ifcombine::execute): Likewise.
45374 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
45375 (should_duplicate_loop_header_p): Likewise.
45376 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
45377 (tree_estimate_loop_size): Likewise.
45378 (try_unroll_loop_completely): Likewise.
45379 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
45380 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
45381 (canonicalize_loop_ivs): Likewise.
45382 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
45383 (bound_difference): Likewise.
45384 (number_of_iterations_popcount): Likewise.
45385 (number_of_iterations_cltz): Likewise.
45386 (number_of_iterations_cltz_complement): Likewise.
45387 (simplify_using_initial_conditions): Likewise.
45388 (number_of_iterations_exit_assumptions): Likewise.
45389 (loop_niter_by_eval): Likewise.
45390 (estimate_numbers_of_iterations): Likewise.
45392 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45394 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
45396 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
45399 * config/rs6000/rs6000-builtins.def
45400 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
45401 __builtin_vsx_scalar_cmp_exp_qp_lt,
45402 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
45405 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
45408 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
45409 easy_vector_constant with const_vector_each_byte_same, add
45410 handlings in preparation for !easy_vector_constant, and update
45411 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
45412 * config/rs6000/predicates.md (const_vector_each_byte_same): New
45415 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
45417 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
45418 (*pred_ltge<mode>_merge_tie_mask): Ditto.
45419 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
45420 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
45421 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
45422 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
45423 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
45425 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45427 * config/riscv/vector.md: Fix redundant vmv1r.v.
45429 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45431 * config/riscv/vector.md: Fix RA constraint.
45433 2023-04-26 Pan Li <pan2.li@intel.com>
45436 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
45437 check for vn_reference equal.
45439 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45441 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
45442 auto-vectorization preference.
45443 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
45444 auto-vectorization.
45445 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
45447 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
45449 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
45450 and bclridisi_nottwobits patterns.
45451 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
45452 predicate to avoid splitting arith constants.
45453 (const_nottwobits_not_arith_operand): New predicate.
45455 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
45457 * recog.cc (peep2_attempt, peep2_update_life): Correct
45458 head-comment description of parameter match_len.
45460 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
45462 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
45463 riscv_split_symbol() drop in_splitter arg.
45464 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
45465 riscv_split_symbol() drop in_splitter arg.
45466 riscv_force_temporary() drop in_splitter arg.
45467 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
45468 riscv_split_symbol() drop in_splitter arg.
45470 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
45472 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
45473 superfluous debug temporaries for single GIMPLE assignments.
45475 2023-04-25 Richard Biener <rguenther@suse.de>
45477 PR tree-optimization/109609
45478 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
45480 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
45481 the size given by arg_max_access_size_given_by_arg_p as
45482 maximum, not exact, size.
45484 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45487 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
45488 (orn<mode>3<vczle><vczbe>): ... This.
45489 (bic<mode>3): Rename to...
45490 (bic<mode>3<vczle><vczbe>): ... This.
45491 (<su><maxmin><mode>3): Rename to...
45492 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
45494 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45496 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
45497 * config/aarch64/iterators.md (VQDIV): New mode iterator.
45498 (vnx2di): New mode attribute.
45500 2023-04-25 Richard Biener <rguenther@suse.de>
45502 PR rtl-optimization/109585
45503 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
45505 2023-04-25 Jakub Jelinek <jakub@redhat.com>
45508 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
45509 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
45510 is larger than signed int maximum.
45512 2023-04-25 Martin Liska <mliska@suse.cz>
45514 * doc/gcov.texi: Document the new "calls" field and document
45515 the API bump. Mention also "block_ids" for lines.
45516 * gcov.cc (output_intermediate_json_line): Output info about
45517 calls and extend branches as well.
45518 (generate_results): Bump version to 2.
45519 (output_line_details): Use block ID instead of a non-sensual
45522 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
45524 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
45525 length attribute for the first (memory operand) alternative.
45527 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
45529 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
45530 * config/aarch64/constraints.md: Make "Umn" relaxed memory
45532 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
45534 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
45536 * value-range.cc (frange::set): Adjust constructor.
45537 * value-range.h (nan_state::nan_state): Replace default
45538 constructor with one taking an argument.
45540 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
45542 * ipa-cp.cc (ipa_range_contains_p): New.
45543 (decide_whether_version_node): Use it.
45545 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
45547 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
45548 simplify two successive VEC_PERM_EXPRs with same VLA mask,
45549 where mask chooses elements in reverse order.
45551 2023-04-24 Andrew Pinski <apinski@marvell.com>
45553 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
45554 and support diamond shaped basic block form.
45555 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
45557 2023-04-24 Andrew Pinski <apinski@marvell.com>
45559 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
45560 Instead of calling last_and_only_stmt, look for the last statement
45563 2023-04-24 Andrew Pinski <apinski@marvell.com>
45565 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
45567 (match_simplify_replacement): Call
45568 empty_bb_or_one_feeding_into_p instead of doing it inline.
45570 2023-04-24 Andrew Pinski <apinski@marvell.com>
45572 PR tree-optimization/68894
45573 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
45574 continue for the do_hoist_loads diamond case.
45576 2023-04-24 Andrew Pinski <apinski@marvell.com>
45578 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
45579 code for better code readability.
45581 2023-04-24 Andrew Pinski <apinski@marvell.com>
45583 PR tree-optimization/109604
45584 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
45585 diamond form check from ...
45586 (minmax_replacement): Here.
45588 2023-04-24 Patrick Palka <ppalka@redhat.com>
45590 * tree.cc (strip_array_types): Don't define here.
45591 (is_typedef_decl): Don't define here.
45592 (typedef_variant_p): Don't define here.
45593 * tree.h (strip_array_types): Define here.
45594 (is_typedef_decl): Define here.
45595 (typedef_variant_p): Define here.
45597 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
45599 * doc/generic.texi (OpenMP): Add != to allowed
45600 conditions and state that vars can be unsigned.
45601 * tree.def (OMP_FOR): Likewise.
45603 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45605 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
45607 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
45609 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
45610 Remove explicit Solaris 11 references.
45612 (Options specification, --with-gnu-as): as and gas always differ
45614 Remove /usr/ccs/bin reference.
45615 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
45616 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
45617 (*-*-solaris2*): ... here.
45618 Update bundled GCC versions.
45619 Don't refer to pre-built binaries.
45620 Remove /bin/sh warning.
45621 Update assembler, linker recommendations.
45622 Document GNAT bootstrap compiler.
45623 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
45624 (sparc64-*-solaris2*): Move content...
45625 (sparcv9-*-solaris2*): ...here.
45626 Add GDC for 64-bit bootstrap compilers.
45628 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45631 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
45633 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
45636 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45638 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
45639 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
45640 (aarch64_<su>abal2<mode>): New define_expand.
45641 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
45642 (aarch64_rtx_costs): Handle ABD rtxes.
45643 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
45644 * config/aarch64/iterators.md (ABAL2): Delete.
45645 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
45647 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45649 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
45650 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
45651 (<sur>sadv16qi): Rename to...
45652 (<su>sadv16qi): ... This. Adjust for the above.
45653 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
45654 (<su>sad<vsi2qi>): ... This. Adjust for the above.
45655 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
45656 * config/aarch64/iterators.md (ABAL): Delete.
45657 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
45659 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45661 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
45662 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
45663 (aarch64_<su>abdl2<mode>): New define_expand.
45664 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
45665 * config/aarch64/iterators.md (ABDL2): Delete.
45666 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
45668 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45670 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
45671 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
45673 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
45674 * config/aarch64/iterators.md (ABDL): Delete.
45675 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
45677 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45679 * config/aarch64/aarch64-simd.md
45680 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
45682 2023-04-24 Richard Biener <rguenther@suse.de>
45684 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
45686 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
45688 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
45689 (set_switch_stmt_execution_predicate): Likewise.
45690 (phi_result_unknown_predicate): Likewise.
45691 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
45692 (ipa_analyze_indirect_call_uses): Likewise.
45693 * predict.cc (predict_iv_comparison): Likewise.
45694 (predict_extra_loop_exits): Likewise.
45695 (predict_loops): Likewise.
45696 (tree_predict_by_opcode): Likewise.
45697 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
45699 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
45700 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
45701 (replace_phi_edge_with_variable): Likewise.
45702 (two_value_replacement): Likewise.
45703 (value_replacement): Likewise.
45704 (minmax_replacement): Likewise.
45705 (spaceship_replacement): Likewise.
45706 (cond_removal_in_builtin_zero_pattern): Likewise.
45707 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
45708 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
45709 (vn_phi_lookup): Likewise.
45710 (vn_phi_insert): Likewise.
45711 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
45712 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
45714 (back_threader_profitability::possibly_profitable_path_p):
45716 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
45718 * tree-switch-conversion.cc (pass_convert_switch::execute):
45720 (pass_lower_switch<O0>::execute): Likewise.
45721 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
45722 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
45723 * tree-vect-slp.cc (vect_slp_function): Likewise.
45724 * tree-vect-stmts.cc (cfun_returns): Likewise.
45725 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
45726 (vect_loop_dist_alias_call): Likewise.
45728 2023-04-24 Richard Biener <rguenther@suse.de>
45730 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
45732 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
45734 * config/riscv/riscv-vsetvl.cc
45735 (vector_infos_manager::all_avail_in_compatible_p): New function.
45736 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
45737 * config/riscv/riscv-vsetvl.h: New function.
45739 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
45741 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
45742 comment for cleanup_insns.
45744 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
45746 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
45747 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
45748 with the fault first load property.
45750 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45752 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
45753 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
45755 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45758 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
45759 (aarch64_addp<mode><vczle><vczbe>): ... This.
45761 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
45763 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
45764 provide reasonable values for common arithmetic operations and
45765 immediate operands (in several machine modes).
45767 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
45769 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
45770 format specifier to output high_part register name of SImode reg.
45771 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
45772 (zero_extendqihi2): Fix lengths, consistent formatting and add
45773 "and Rx,#255" alternative, for documentation purposes.
45774 (zero_extendhisi2): New define_insn.
45776 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
45778 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
45779 SImode shifts by two by performing a single bit SImode shift twice.
45781 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
45783 PR tree-optimization/109593
45784 * value-range.cc (frange::operator==): Handle NANs.
45786 2023-04-23 liuhongt <hongtao.liu@intel.com>
45788 PR rtl-optimization/108707
45789 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
45790 GENERAL_REGS when preferred reg_class is not known.
45792 2023-04-22 Andrew Pinski <apinski@marvell.com>
45794 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
45795 Change the code around slightly to move diamond
45796 handling for do_store_elim/do_hoist_loads out of
45799 2023-04-22 Andrew Pinski <apinski@marvell.com>
45801 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
45802 Remove check on empty_block_p.
45804 2023-04-22 Jakub Jelinek <jakub@redhat.com>
45806 PR bootstrap/109589
45807 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
45808 * realmpfr.h (class auto_mpfr): Likewise.
45810 2023-04-22 Jakub Jelinek <jakub@redhat.com>
45812 PR tree-optimization/109583
45813 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
45814 if vec_mode is not VECTOR_MODE_P.
45816 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
45817 Ondrej Kubanek <kubanek0ondrej@gmail.com>
45819 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
45820 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
45821 loop profile and bounds after header duplication.
45822 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
45823 Break out from try_peel_loop; fix handling of 0 iterations.
45824 (try_peel_loop): Use adjust_loop_info_after_peeling.
45826 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
45828 PR tree-optimization/109546
45829 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
45830 not fold conditions with ADDR_EXPR early.
45832 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45834 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
45835 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
45837 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
45838 (*aarch64_<optab><mode>3_zero): Define.
45839 (*aarch64_<optab><mode>3_cssc): Likewise.
45840 * config/aarch64/iterators.md (maxminand): New code attribute.
45842 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45845 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
45846 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
45848 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
45849 (aarch64_override_options_internal): Handle the above.
45850 (aarch64_output_load_tp): New function.
45851 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
45852 aarch64_output_load_tp.
45853 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
45854 (mtp=): New option.
45855 * doc/invoke.texi (AArch64 Options): Document -mtp=.
45857 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45860 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
45861 (add_vec_concat_subst_be): Likewise.
45864 (add<mode>3): Rename to...
45865 (add<mode>3<vczle><vczbe>): ... This.
45866 (sub<mode>3): Rename to...
45867 (sub<mode>3<vczle><vczbe>): ... This.
45868 (mul<mode>3): Rename to...
45869 (mul<mode>3<vczle><vczbe>): ... This.
45870 (and<mode>3): Rename to...
45871 (and<mode>3<vczle><vczbe>): ... This.
45872 (ior<mode>3): Rename to...
45873 (ior<mode>3<vczle><vczbe>): ... This.
45874 (xor<mode>3): Rename to...
45875 (xor<mode>3<vczle><vczbe>): ... This.
45876 * config/aarch64/iterators.md (VDZ): Define.
45878 2023-04-21 Patrick Palka <ppalka@redhat.com>
45880 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
45883 2023-04-21 Jan Hubicka <jh@suse.cz>
45885 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
45888 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
45890 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
45891 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
45893 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
45895 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
45896 force_reg instead of copy_to_mode_reg.
45897 (aarch64_expand_vector_init): Likewise.
45899 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
45901 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
45902 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
45903 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
45904 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
45905 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
45906 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
45907 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
45908 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
45909 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
45910 * config/i386/predicates.md (index_register_operand):
45911 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
45912 * config/i386/i386.cc (ix86_legitimate_address_p): Use
45913 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
45914 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
45916 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
45917 Ondrej Kubanek <kubanek0ondrej@gmail.com>
45919 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
45922 2023-04-21 Richard Biener <rguenther@suse.de>
45924 * is-a.h (safe_is_a): New.
45926 2023-04-21 Richard Biener <rguenther@suse.de>
45928 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
45929 (gphi_iterator::operator*): Likewise.
45931 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
45932 Michal Jires <michal@jires.eu>
45934 * ipa-inline.cc (class inline_badness): New class.
45935 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
45937 (update_edge_key): Update.
45938 (lookup_recursive_calls): Likewise.
45939 (recursive_inlining): Likewise.
45940 (add_new_edges_to_heap): Likewise.
45941 (inline_small_functions): Likewise.
45943 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
45945 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
45947 2023-04-21 Richard Biener <rguenther@suse.de>
45949 PR tree-optimization/109573
45950 * tree-vect-loop.cc (vectorizable_live_operation): Allow
45951 unhandled SSA copy as well. Demote assert to checking only.
45953 2023-04-21 Richard Biener <rguenther@suse.de>
45955 * df-core.cc (df_analyze): Compute RPO on the reverse graph
45956 for DF_BACKWARD problems.
45957 (loop_post_order_compute): Rename to ...
45958 (loop_rev_post_order_compute): ... this, compute a RPO.
45959 (loop_inverted_post_order_compute): Rename to ...
45960 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
45961 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
45962 problems, RPO on the inverted graph for DF_BACKWARD.
45964 2023-04-21 Richard Biener <rguenther@suse.de>
45966 * cfganal.h (inverted_rev_post_order_compute): Rename
45968 (inverted_post_order_compute): ... this. Add struct function
45969 argument, change allocation to a C array.
45970 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
45971 * lcm.cc (compute_antinout_edge): Adjust.
45972 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
45973 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
45974 * tree-ssa-pre.cc (compute_antic): Likewise.
45976 2023-04-21 Richard Biener <rguenther@suse.de>
45978 * df.h (df_d::postorder_inverted): Change back to int *,
45980 * df-core.cc (rest_of_handle_df_finish): Adjust.
45981 (df_analyze_1): Likewise.
45982 (df_analyze): For DF_FORWARD problems use RPO on the forward
45984 (loop_inverted_post_order_compute): Adjust API.
45985 (df_analyze_loop): Adjust.
45986 (df_get_n_blocks): Likewise.
45987 (df_get_postorder): Likewise.
45989 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
45992 * config/riscv/riscv-vsetvl.cc
45993 (vector_infos_manager::all_empty_predecessor_p): New function.
45994 (pass_vsetvl::backward_demand_fusion): Ditto.
45995 * config/riscv/riscv-vsetvl.h: Ditto.
45997 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
46000 * config/riscv/generic.md: Change standard names to insn names.
46002 2023-04-21 Richard Biener <rguenther@suse.de>
46004 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
46005 (compute_laterin): Use RPO.
46006 (compute_available): Likewise.
46008 2023-04-21 Peng Fan <fanpeng@loongson.cn>
46010 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
46012 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
46015 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
46016 (vector_insn_info::skip_avl_compatible_p): Ditto.
46017 (vector_insn_info::merge): Remove default value.
46018 (pass_vsetvl::compute_local_backward_infos): Ditto.
46019 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
46020 * config/riscv/riscv-vsetvl.h: Ditto.
46022 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
46024 * doc/extend.texi (Common Function Attributes): Remove duplicate
46027 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
46029 PR tree-optimization/109564
46030 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
46031 UNDEFINED range names when deciding if all PHI arguments are the same,
46033 2023-04-20 Jakub Jelinek <jakub@redhat.com>
46035 PR tree-optimization/109011
46036 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
46037 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
46038 .CTZ (X) = PREC - .POPCOUNT (X | -X).
46040 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
46042 * lra-constraints.cc (match_reload): Exclude some hard regs for
46043 multi-reg inout reload pseudos used in asm in different mode.
46045 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
46047 * config/arm/arm.cc (thumb1_legitimate_address_p):
46048 Use VIRTUAL_REGISTER_P predicate.
46049 (arm_eliminable_register): Ditto.
46050 * config/avr/avr.md (push<mode>_1): Ditto.
46051 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
46052 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
46053 * config/i386/predicates.md (register_no_elim_operand): Ditto.
46054 * config/iq2000/predicates.md (call_insn_operand): Ditto.
46055 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
46057 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
46060 * config/i386/predicates.md (extract_operator): New predicate.
46061 * config/i386/i386.md (any_extract): Remove code iterator.
46062 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
46063 (*cmpqi_ext<mode>_1): Ditto.
46064 (*cmpqi_ext<mode>_2): Ditto.
46065 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
46066 (*cmpqi_ext<mode>_3): Ditto.
46067 (*cmpqi_ext<mode>_4): Ditto.
46068 (*extzvqi_mem_rex64): Ditto.
46070 (*insvqi_2): Ditto.
46071 (*extendqi<SWI24:mode>_ext_1): Ditto.
46072 (*addqi_ext<mode>_0): Ditto.
46073 (*addqi_ext<mode>_1): Ditto.
46074 (*addqi_ext<mode>_2): Ditto.
46075 (*subqi_ext<mode>_0): Ditto.
46076 (*subqi_ext<mode>_2): Ditto.
46077 (*testqi_ext<mode>_1): Ditto.
46078 (*testqi_ext<mode>_2): Ditto.
46079 (*andqi_ext<mode>_0): Ditto.
46080 (*andqi_ext<mode>_1): Ditto.
46081 (*andqi_ext<mode>_1_cc): Ditto.
46082 (*andqi_ext<mode>_2): Ditto.
46083 (*<any_or:code>qi_ext<mode>_0): Ditto.
46084 (*<any_or:code>qi_ext<mode>_1): Ditto.
46085 (*<any_or:code>qi_ext<mode>_2): Ditto.
46086 (*xorqi_ext<mode>_1_cc): Ditto.
46087 (*negqi_ext<mode>_2): Ditto.
46088 (*ashlqi_ext<mode>_2): Ditto.
46089 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
46091 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
46094 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
46095 <bitmanip_insn> as the type to allow for fine grained control of
46096 scheduling these insns.
46097 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
46099 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
46100 pcnt, signed and unsigned min/max.
46102 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
46103 kito-cheng <kito.cheng@sifive.com>
46105 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
46107 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46108 kito-cheng <kito.cheng@sifive.com>
46111 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
46112 (pass_vsetvl::cleanup_insns): Fix bug.
46114 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
46116 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
46117 (ldexp<mode>3): Delete.
46118 (ldexp<mode>3<exec>): Change "B" to "A".
46120 2023-04-20 Jakub Jelinek <jakub@redhat.com>
46121 Jonathan Wakely <jwakely@redhat.com>
46123 * tree.h (built_in_function_equal_p): New helper function.
46124 (fndecl_built_in_p): Turn into variadic template to support
46125 1 or more built_in_function arguments.
46126 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
46127 * gimplify.cc (goa_stabilize_expr): Likewise.
46128 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
46129 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
46130 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
46131 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
46132 cgraph_update_edges_for_call_stmt_node,
46133 cgraph_edge::verify_corresponds_to_fndecl,
46134 cgraph_node::verify_node): Likewise.
46135 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
46136 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
46137 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
46139 2023-04-20 Jakub Jelinek <jakub@redhat.com>
46141 PR tree-optimization/109011
46142 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
46143 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
46144 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
46145 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
46146 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
46148 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
46150 2023-04-20 Richard Biener <rguenther@suse.de>
46152 * df-core.cc (rest_of_handle_df_initialize): Remove
46153 computation of df->postorder, df->postorder_inverted and
46156 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46158 * common/config/i386/i386-common.cc
46159 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
46160 (ix86_handle_option): Set AVX flag for VAES.
46161 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
46162 Add OPTION_MASK_ISA2_VAES_UNSET.
46163 (def_builtin): Share builtin between AES and VAES.
46164 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
46166 * config/i386/i386.md (aes): New isa attribute.
46167 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
46168 (aesenclast): Ditto.
46170 (aesdeclast): Ditto.
46171 * config/i386/vaesintrin.h: Remove redundant avx target push.
46172 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
46173 (_mm_aesdeclast_si128): Ditto.
46174 (_mm_aesenc_si128): Ditto.
46175 (_mm_aesenclast_si128): Ditto.
46177 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
46179 * config/i386/avx2intrin.h
46180 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
46181 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
46182 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
46183 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
46184 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
46185 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
46186 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
46187 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
46188 (_mm_reduce_add_epi16): New instrinsics.
46189 (_mm_reduce_mul_epi16): Ditto.
46190 (_mm_reduce_and_epi16): Ditto.
46191 (_mm_reduce_or_epi16): Ditto.
46192 (_mm_reduce_max_epi16): Ditto.
46193 (_mm_reduce_max_epu16): Ditto.
46194 (_mm_reduce_min_epi16): Ditto.
46195 (_mm_reduce_min_epu16): Ditto.
46196 (_mm256_reduce_add_epi16): Ditto.
46197 (_mm256_reduce_mul_epi16): Ditto.
46198 (_mm256_reduce_and_epi16): Ditto.
46199 (_mm256_reduce_or_epi16): Ditto.
46200 (_mm256_reduce_max_epi16): Ditto.
46201 (_mm256_reduce_max_epu16): Ditto.
46202 (_mm256_reduce_min_epi16): Ditto.
46203 (_mm256_reduce_min_epu16): Ditto.
46204 (_mm_reduce_add_epi8): Ditto.
46205 (_mm_reduce_mul_epi8): Ditto.
46206 (_mm_reduce_and_epi8): Ditto.
46207 (_mm_reduce_or_epi8): Ditto.
46208 (_mm_reduce_max_epi8): Ditto.
46209 (_mm_reduce_max_epu8): Ditto.
46210 (_mm_reduce_min_epi8): Ditto.
46211 (_mm_reduce_min_epu8): Ditto.
46212 (_mm256_reduce_add_epi8): Ditto.
46213 (_mm256_reduce_mul_epi8): Ditto.
46214 (_mm256_reduce_and_epi8): Ditto.
46215 (_mm256_reduce_or_epi8): Ditto.
46216 (_mm256_reduce_max_epi8): Ditto.
46217 (_mm256_reduce_max_epu8): Ditto.
46218 (_mm256_reduce_min_epi8): Ditto.
46219 (_mm256_reduce_min_epu8): Ditto.
46220 * config/i386/avx512vlbwintrin.h:
46221 (_mm_mask_reduce_add_epi16): Ditto.
46222 (_mm_mask_reduce_mul_epi16): Ditto.
46223 (_mm_mask_reduce_and_epi16): Ditto.
46224 (_mm_mask_reduce_or_epi16): Ditto.
46225 (_mm_mask_reduce_max_epi16): Ditto.
46226 (_mm_mask_reduce_max_epu16): Ditto.
46227 (_mm_mask_reduce_min_epi16): Ditto.
46228 (_mm_mask_reduce_min_epu16): Ditto.
46229 (_mm256_mask_reduce_add_epi16): Ditto.
46230 (_mm256_mask_reduce_mul_epi16): Ditto.
46231 (_mm256_mask_reduce_and_epi16): Ditto.
46232 (_mm256_mask_reduce_or_epi16): Ditto.
46233 (_mm256_mask_reduce_max_epi16): Ditto.
46234 (_mm256_mask_reduce_max_epu16): Ditto.
46235 (_mm256_mask_reduce_min_epi16): Ditto.
46236 (_mm256_mask_reduce_min_epu16): Ditto.
46237 (_mm_mask_reduce_add_epi8): Ditto.
46238 (_mm_mask_reduce_mul_epi8): Ditto.
46239 (_mm_mask_reduce_and_epi8): Ditto.
46240 (_mm_mask_reduce_or_epi8): Ditto.
46241 (_mm_mask_reduce_max_epi8): Ditto.
46242 (_mm_mask_reduce_max_epu8): Ditto.
46243 (_mm_mask_reduce_min_epi8): Ditto.
46244 (_mm_mask_reduce_min_epu8): Ditto.
46245 (_mm256_mask_reduce_add_epi8): Ditto.
46246 (_mm256_mask_reduce_mul_epi8): Ditto.
46247 (_mm256_mask_reduce_and_epi8): Ditto.
46248 (_mm256_mask_reduce_or_epi8): Ditto.
46249 (_mm256_mask_reduce_max_epi8): Ditto.
46250 (_mm256_mask_reduce_max_epu8): Ditto.
46251 (_mm256_mask_reduce_min_epi8): Ditto.
46252 (_mm256_mask_reduce_min_epu8): Ditto.
46254 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46256 * common/config/i386/i386-common.cc
46257 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
46258 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
46259 (OPTION_MASK_ISA_AVX_UNSET):
46260 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
46261 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
46262 * config/i386/i386.md (vpclmulqdqvl): New.
46263 * config/i386/sse.md (pclmulqdq): Add evex encoding.
46264 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
46267 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46269 * config/i386/avx512vlbwintrin.h
46270 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
46271 (_mm_mask_blend_epi8): Ditto.
46272 (_mm256_mask_blend_epi16): Ditto.
46273 (_mm256_mask_blend_epi8): Ditto.
46274 * config/i386/avx512vlintrin.h
46275 (_mm256_mask_blend_pd): Ditto.
46276 (_mm256_mask_blend_ps): Ditto.
46277 (_mm256_mask_blend_epi64): Ditto.
46278 (_mm256_mask_blend_epi32): Ditto.
46279 (_mm_mask_blend_pd): Ditto.
46280 (_mm_mask_blend_ps): Ditto.
46281 (_mm_mask_blend_epi64): Ditto.
46282 (_mm_mask_blend_epi32): Ditto.
46283 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
46284 (VF_AVX512HFBFVL): Move it before the first usage.
46285 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
46286 to VF_AVX512HFBFVL.
46288 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46290 * common/config/i386/i386-common.cc
46291 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
46292 to OPTION_MASK_ISA_AVX512BW_SET.
46293 (OPTION_MASK_ISA_AVX512F_UNSET):
46294 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
46295 (OPTION_MASK_ISA_AVX512BW_UNSET):
46296 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
46297 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
46298 * config/i386/avx512vbmi2vlintrin.h: Ditto.
46299 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
46300 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
46301 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
46302 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
46304 (compressstore<mode>_mask): Ditto.
46305 (expand<mode>_mask): Ditto.
46306 (expand<mode>_maskz): Ditto.
46307 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
46308 VI12_VI48F_AVX512VL.
46310 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46312 * common/config/i386/i386-common.cc
46313 (OPTION_MASK_ISA_AVX512BITALG_SET):
46314 Change OPTION_MASK_ISA_AVX512F_SET
46315 to OPTION_MASK_ISA_AVX512BW_SET.
46316 (OPTION_MASK_ISA_AVX512F_UNSET):
46317 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
46318 (OPTION_MASK_ISA_AVX512BW_UNSET):
46319 Add OPTION_MASK_ISA_AVX512BITALG_SET.
46320 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
46321 * config/i386/i386-builtin.def:
46322 Remove redundant OPTION_MASK_ISA_AVX512BW.
46323 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
46324 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
46325 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
46327 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46329 * config/i386/i386-expand.cc
46330 (ix86_check_builtin_isa_match): Correct wrong comments.
46331 Add a new macro SHARE_BUILTIN and refactor the current if
46334 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
46336 * config/i386/cpuid.h: Open a new section for Extended Features
46337 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
46340 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
46342 * config/i386/sse.md: Modify insn vperm{i,f}
46345 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
46347 * config/xtensa/xtensa-opts.h: New header.
46348 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
46349 xtensa_strict_align.
46350 * config/xtensa/xtensa.cc (xtensa_option_override): When
46351 -m[no-]strict-align is not specified in the command line set
46352 xtensa_strict_align to 0 if the hardware supports both unaligned
46353 loads and stores or to 1 otherwise.
46354 * config/xtensa/xtensa.opt (mstrict-align): New option.
46355 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
46357 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
46359 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
46362 2023-04-19 Andrew Pinski <apinski@marvell.com>
46364 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
46366 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
46368 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
46369 (VECTOR_BOOL_MODE): Ditto.
46370 (ADJUST_NUNITS): Ditto.
46371 (ADJUST_ALIGNMENT): Ditto.
46372 (ADJUST_BYTESIZE): Ditto.
46373 (ADJUST_PRECISION): Ditto.
46374 (RVV_MODES): Ditto.
46375 (VECTOR_MODE_WITH_PREFIX): Ditto.
46376 * config/riscv/riscv-v.cc (ENTRY): Ditto.
46377 (get_vlmul): Ditto.
46378 (get_ratio): Ditto.
46379 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
46380 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
46381 (vbool64_t): Ditto.
46382 (vbool32_t): Ditto.
46383 (vbool16_t): Ditto.
46388 (vint8mf8_t): Ditto.
46389 (vuint8mf8_t): Ditto.
46390 (vint8mf4_t): Ditto.
46391 (vuint8mf4_t): Ditto.
46392 (vint8mf2_t): Ditto.
46393 (vuint8mf2_t): Ditto.
46394 (vint8m1_t): Ditto.
46395 (vuint8m1_t): Ditto.
46396 (vint8m2_t): Ditto.
46397 (vuint8m2_t): Ditto.
46398 (vint8m4_t): Ditto.
46399 (vuint8m4_t): Ditto.
46400 (vint8m8_t): Ditto.
46401 (vuint8m8_t): Ditto.
46402 (vint16mf4_t): Ditto.
46403 (vuint16mf4_t): Ditto.
46404 (vint16mf2_t): Ditto.
46405 (vuint16mf2_t): Ditto.
46406 (vint16m1_t): Ditto.
46407 (vuint16m1_t): Ditto.
46408 (vint16m2_t): Ditto.
46409 (vuint16m2_t): Ditto.
46410 (vint16m4_t): Ditto.
46411 (vuint16m4_t): Ditto.
46412 (vint16m8_t): Ditto.
46413 (vuint16m8_t): Ditto.
46414 (vint32mf2_t): Ditto.
46415 (vuint32mf2_t): Ditto.
46416 (vint32m1_t): Ditto.
46417 (vuint32m1_t): Ditto.
46418 (vint32m2_t): Ditto.
46419 (vuint32m2_t): Ditto.
46420 (vint32m4_t): Ditto.
46421 (vuint32m4_t): Ditto.
46422 (vint32m8_t): Ditto.
46423 (vuint32m8_t): Ditto.
46424 (vint64m1_t): Ditto.
46425 (vuint64m1_t): Ditto.
46426 (vint64m2_t): Ditto.
46427 (vuint64m2_t): Ditto.
46428 (vint64m4_t): Ditto.
46429 (vuint64m4_t): Ditto.
46430 (vint64m8_t): Ditto.
46431 (vuint64m8_t): Ditto.
46432 (vfloat32mf2_t): Ditto.
46433 (vfloat32m1_t): Ditto.
46434 (vfloat32m2_t): Ditto.
46435 (vfloat32m4_t): Ditto.
46436 (vfloat32m8_t): Ditto.
46437 (vfloat64m1_t): Ditto.
46438 (vfloat64m2_t): Ditto.
46439 (vfloat64m4_t): Ditto.
46440 (vfloat64m8_t): Ditto.
46441 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
46442 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
46443 (riscv_convert_vector_bits): Ditto.
46444 * config/riscv/riscv.md:
46445 * config/riscv/vector-iterators.md:
46446 * config/riscv/vector.md
46447 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
46448 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
46449 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
46450 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
46451 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
46452 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
46453 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
46454 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
46455 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
46457 2023-04-19 Pan Li <pan2.li@intel.com>
46459 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
46460 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
46462 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
46466 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
46467 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
46468 for operand 0. Use any_extract code iterator.
46469 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
46470 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
46471 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
46472 (*cmpqi_ext<mode>_1): Use general_operand predicate
46473 for operand 1. Use any_extract code iterator.
46474 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
46475 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
46477 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46479 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
46480 (aarch64_uaddw2<mode>): Delete.
46481 (aarch64_ssubw2<mode>): Delete.
46482 (aarch64_usubw2<mode>): Delete.
46483 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
46485 2023-04-19 Richard Biener <rguenther@suse.de>
46487 * tree-ssa-structalias.cc (do_ds_constraint): Use
46488 solve_add_graph_edge.
46490 2023-04-19 Richard Biener <rguenther@suse.de>
46492 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
46494 (do_sd_constraint): ... here.
46496 2023-04-19 Richard Biener <rguenther@suse.de>
46498 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
46499 rejecting the merge when A contains only a non-local label.
46501 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
46503 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
46504 (VIRTUAL_REGISTER_NUM_P): Ditto.
46505 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
46506 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
46507 * function.cc (instantiate_decl_rtl): Ditto.
46508 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
46509 (nonzero_address_p): Ditto.
46510 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
46512 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
46514 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
46516 2023-04-19 Richard Biener <rguenther@suse.de>
46518 * system.h (auto_mpz::operator->()): New.
46519 * realmpfr.h (auto_mpfr::operator->()): New.
46520 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
46521 * real.cc (real_from_string): Likewise.
46522 (dconst_e_ptr): Likewise.
46523 (dconst_sqrt2_ptr): Likewise.
46524 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
46526 (bound_difference_of_offsetted_base): Likewise.
46527 (number_of_iterations_ne): Likewise.
46528 (number_of_iterations_lt_to_ne): Likewise.
46529 * ubsan.cc: Include realmpfr.h.
46530 (ubsan_instrument_float_cast): Use auto_mpfr.
46532 2023-04-19 Richard Biener <rguenther@suse.de>
46534 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
46535 edges, remove edges from escaped after special-casing them.
46537 2023-04-19 Richard Biener <rguenther@suse.de>
46539 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
46542 2023-04-19 Richard Biener <rguenther@suse.de>
46544 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
46545 to the LHS varinfo solution member.
46547 2023-04-19 Richard Biener <rguenther@suse.de>
46549 * tree-ssa-structalias.cc (topo_visit): Look at the real
46550 destination of edges.
46552 2023-04-19 Richard Biener <rguenther@suse.de>
46554 PR tree-optimization/44794
46555 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
46556 If an epilogue loop is required set its iteration upper bound.
46558 2023-04-19 Xi Ruoyao <xry111@xry111.site>
46561 * config/loongarch/loongarch-protos.h
46562 (loongarch_expand_block_move): Add a parameter as alignment RTX.
46563 * config/loongarch/loongarch.h:
46564 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
46565 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
46566 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
46567 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
46568 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
46569 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
46570 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
46571 Take the alignment from the parameter, but set it to
46572 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
46573 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
46574 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
46575 (loongarch_block_move_straight): When there are left-over bytes,
46576 half the mode size instead of falling back to byte mode at once.
46577 (loongarch_block_move_loop): Limit the length of loop body with
46578 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
46579 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
46580 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
46581 to loongarch_expand_block_move.
46583 2023-04-19 Xi Ruoyao <xry111@xry111.site>
46585 * config/loongarch/loongarch.cc
46586 (loongarch_setup_incoming_varargs): Don't save more GARs than
46587 cfun->va_list_gpr_size / UNITS_PER_WORD.
46589 2023-04-19 Richard Biener <rguenther@suse.de>
46591 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
46592 no epilogue condition.
46594 2023-04-19 Richard Biener <rguenther@suse.de>
46596 * gimple.h (gimple_assign_load): Outline...
46597 * gimple.cc (gimple_assign_load): ... here. Avoid
46598 get_base_address and instead just strip the outermost
46599 handled component, treating a remaining handled component
46602 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46604 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
46606 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
46608 2023-04-19 Jakub Jelinek <jakub@redhat.com>
46610 PR tree-optimization/109011
46611 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
46612 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
46613 CLZ, CTZ and FFS. Remove vargs variable, use
46614 gimple_build_call_internal rather than gimple_build_call_internal_vec.
46615 (vect_vect_recog_func_ptrs): Adjust popcount entry.
46617 2023-04-19 Jakub Jelinek <jakub@redhat.com>
46620 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
46621 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
46622 a new REG rather than the SUBREG.
46624 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
46626 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
46629 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46632 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
46633 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
46635 2023-04-19 Richard Biener <rguenther@suse.de>
46637 PR rtl-optimization/109237
46638 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
46639 TREE_VISITED on INSN_VAR_LOCATION_DECL.
46640 (delete_trivially_dead_insns): Maintain TREE_VISITED on
46641 active debug bind INSN_VAR_LOCATION_DECL.
46643 2023-04-19 Richard Biener <rguenther@suse.de>
46645 PR rtl-optimization/109237
46646 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
46648 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
46650 * doc/install.texi (enable-decimal-float): Add AArch64.
46652 2023-04-19 liuhongt <hongtao.liu@intel.com>
46654 PR rtl-optimization/109351
46655 * ira.cc (setup_class_subset_and_memory_move_costs): Check
46656 hard_regno_mode_ok before setting lowest memory move cost for
46657 the mode with different reg classes.
46659 2023-04-18 Jason Merrill <jason@redhat.com>
46661 * doc/invoke.texi: Remove stray @gol.
46663 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
46665 * ifcvt.cc (cond_move_process_if_block): Consider the result of
46666 targetm.noce_conversion_profitable_p() when replacing the original
46667 sequence with the converted one.
46669 2023-04-18 Mark Harmstone <mark@harmstone.com>
46671 * common.opt (gcodeview): Add new option.
46672 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
46673 * opts.cc (command_handle_option): Similarly.
46674 * doc/invoke.texi: Add documentation for -gcodeview.
46676 2023-04-18 Andrew Pinski <apinski@marvell.com>
46678 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
46679 (make_pass_phiopt): Make execute out of line.
46680 (tree_ssa_cs_elim): Move code into ...
46681 (pass_cselim::execute): here.
46683 2023-04-18 Sam James <sam@gentoo.org>
46685 * system.h: Drop unused INCLUDE_PTHREAD_H.
46687 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
46689 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
46692 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
46694 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
46695 (bswapdi2, bswapsi2): Similarly.
46697 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
46700 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
46701 Use CODE_FOR_sse4_1_insertps_v4sf.
46702 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
46703 (expand_vec_perm_1): Call expand_vec_per_insertps.
46704 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
46705 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
46706 (@sse4_1_insertps_<mode>): New insn pattern.
46707 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
46708 pattern from sse4_1_insertps using VI4F_128 mode iterator.
46710 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
46712 * value-range.cc (gt_ggc_mx): New.
46714 * value-range.h (class vrange): Add GTY marker.
46715 (class frange): Same.
46716 (gt_ggc_mx): Remove.
46717 (gt_pch_nx): Remove.
46719 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
46721 * lra-constraints.cc (constraint_unique): New.
46722 (process_address_1): Apply constraint_unique test.
46723 * recog.cc (constrain_operands): Allow relaxed memory
46726 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
46728 * doc/extend.texi (Target Builtins): Add RISC-V Vector
46730 (RISC-V Vector Intrinsics): Document GCC implemented which
46731 version of RISC-V vector intrinsics and its reference.
46733 2023-04-18 Richard Biener <rguenther@suse.de>
46735 PR middle-end/108786
46736 * bitmap.h (bitmap_clear_first_set_bit): New.
46737 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
46738 bitmap_first_set_bit and add optional clearing of the bit.
46739 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
46740 (bitmap_clear_first_set_bit): Likewise.
46741 * df-core.cc (df_worklist_dataflow_doublequeue): Use
46742 bitmap_clear_first_set_bit.
46743 * graphite-scop-detection.cc (scop_detection::merge_sese):
46745 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
46746 (sanitize_asan_mark_poison): Likewise.
46747 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
46748 * tree-into-ssa.cc (rewrite_blocks): Likewise.
46749 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
46750 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
46752 2023-04-18 Richard Biener <rguenther@suse.de>
46754 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
46755 (dump_sa_points_to_info): ... this function.
46756 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
46757 and call dump_sa_stats guarded with TDF_STATS.
46758 (ipa_pta_execute): Likewise.
46759 (compute_may_aliases): Guard dump_alias_info with
46760 TDF_DETAILS|TDF_ALIAS.
46762 2023-04-18 Andrew Pinski <apinski@marvell.com>
46764 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
46765 the expression that is being tried when TDF_FOLDING
46767 (phiopt_worker::match_simplify_replacement): Dump
46768 the sequence which was created by gimple_simplify_phiopt
46769 when TDF_FOLDING is true.
46771 2023-04-18 Andrew Pinski <apinski@marvell.com>
46773 * tree-ssa-phiopt.cc (match_simplify_replacement):
46774 Simplify code that does the movement slightly.
46776 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46778 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
46780 (rev16<mode>2): Rename to...
46781 (aarch64_rev16<mode>2_alt1): ... This.
46782 (rev16<mode>2_alt): Rename to...
46783 (*aarch64_rev16<mode>2_alt2): ... This.
46785 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
46787 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
46788 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
46790 * range-op-float.cc (zero_range): Use dconstm0.
46791 (zero_to_inf_range): Same.
46792 * real.h (dconstm0): New.
46793 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
46794 (frange::set_zero): Do not declare dconstm0.
46796 2023-04-18 Richard Biener <rguenther@suse.de>
46798 * system.h (class auto_mpz): New,
46799 * realmpfr.h (class auto_mpfr): Likewise.
46800 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
46801 (do_mpfr_arg2): Likewise.
46802 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
46804 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46806 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
46807 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
46809 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
46811 * value-range.cc (frange::operator==): Adjust for NAN.
46812 (range_tests_nan): Remove some NAN tests.
46814 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
46816 * inchash.cc (hash::add_real_value): New.
46817 * inchash.h (class hash): Add add_real_value.
46818 * value-range.cc (add_vrange): New.
46819 * value-range.h (inchash::add_vrange): New.
46821 2023-04-18 Richard Biener <rguenther@suse.de>
46823 PR tree-optimization/109539
46824 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
46825 Re-implement pointer relatedness for PHIs.
46827 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
46829 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
46830 (SV_FP): New iterator.
46831 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
46832 (recip<mode>2): Unify the two patterns using SV_FP.
46833 (div_scale<mode><exec_vcc>): New insn.
46834 (div_fmas<mode><exec>): New insn.
46835 (div_fixup<mode><exec>): New insn.
46836 (div<mode>3): Unify the two expanders and rewrite using hardfp.
46837 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
46838 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
46839 and UNSPEC_DIV_FIXUP.
46840 (vccwait): New attribute.
46842 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46844 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
46845 if the argument matches that.
46847 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46849 * config/aarch64/atomics.md
46850 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
46851 Use SD_HSDI for destination mode iterator.
46853 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
46855 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
46856 of z-extensions and s-extensions.
46857 (riscv_subset_list::parse): Likewise.
46859 2023-04-18 Jakub Jelinek <jakub@redhat.com>
46861 PR tree-optimization/109240
46862 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
46863 first vec_perm operand and minus as second using fneg/fadd and
46864 minus as first vec_perm operand and plus as second using fneg/fsub.
46866 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
46868 * data-streamer.cc (bp_pack_real_value): New.
46869 (bp_unpack_real_value): New.
46870 * data-streamer.h (bp_pack_real_value): New.
46871 (bp_unpack_real_value): New.
46872 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
46873 bp_unpack_real_value.
46874 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
46875 bp_pack_real_value.
46877 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
46879 * wide-int.h (WIDE_INT_MAX_HWIS): New.
46880 (class fixed_wide_int_storage): Use it.
46881 (trailing_wide_ints <N>::set_precision): Use it.
46882 (trailing_wide_ints <N>::extra_size): Use it.
46884 2023-04-18 Xi Ruoyao <xry111@xry111.site>
46886 * config/loongarch/loongarch-protos.h
46887 (loongarch_addu16i_imm12_operand_p): New function prototype.
46888 (loongarch_split_plus_constant): Likewise.
46889 * config/loongarch/loongarch.cc
46890 (loongarch_addu16i_imm12_operand_p): New function.
46891 (loongarch_split_plus_constant): Likewise.
46892 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
46893 (DUAL_IMM12_OPERAND): Likewise.
46894 (DUAL_ADDU16I_OPERAND): Likewise.
46895 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
46897 * config/loongarch/predicates.md (const_dual_imm12_operand): New
46899 (const_addu16i_operand): Likewise.
46900 (const_addu16i_imm12_di_operand): Likewise.
46901 (const_addu16i_imm12_si_operand): Likewise.
46902 (plus_di_operand): Likewise.
46903 (plus_si_operand): Likewise.
46904 (plus_si_extend_operand): Likewise.
46905 * config/loongarch/loongarch.md (add<mode>3): Convert to
46906 define_insn_and_split. Use plus_<mode>_operand predicate
46907 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
46908 and Le constraints.
46909 (*addsi3_extended): Convert to define_insn_and_split. Use
46910 plus_si_extend_operand instead of arith_operand. Add
46911 alternatives for La and Le alternatives.
46913 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
46915 * value-range.h (Value_Range::Value_Range): New.
46916 (Value_Range::contains_p): New.
46918 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
46920 * value-range.h (class vrange): Make m_discriminator const.
46921 (class irange): Make m_max_ranges const. Adjust constructors
46923 (class unsupported_range): Construct vrange appropriately.
46924 (class frange): Same.
46926 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
46928 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
46931 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
46933 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
46935 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
46937 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
46939 (riscv_expand_epilogue): Likewise.
46941 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
46943 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
46945 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
46947 2023-04-17 Andrew Pinski <apinski@marvell.com>
46949 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
46952 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
46954 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
46957 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
46959 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
46960 parameter remaining_size.
46961 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
46962 (riscv_expand_prologue): Likewise.
46963 (riscv_expand_epilogue): Likewise.
46965 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
46967 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
46968 roriw for constant counts.
46969 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
46970 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
46971 (simplify_context::simplify_binary_operation_1): Use it.
46972 * expmed.cc (expand_shift_1): Likewise.
46974 2023-04-17 Martin Jambor <mjambor@suse.cz>
46978 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
46979 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
46980 (ipa_zap_jf_refdesc): New function.
46981 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
46982 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
46983 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
46984 the new parameter of find_reference.
46985 (adjust_references_in_caller): Likewise. Make sure the constant jump
46986 function is not used to decrement a refdec counter again. Only
46987 decrement refdesc counters when the pass_through jump function allows
46988 it. Added a detailed dump when decrementing refdesc counters.
46989 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
46990 (ipa_set_jf_simple_pass_through): Initialize the new flag.
46991 (ipa_set_jf_unary_pass_through): Likewise.
46992 (ipa_set_jf_arith_pass_through): Likewise.
46993 (remove_described_reference): Provide a value for the new parameter of
46995 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
46996 the previous pass_through had a flag mandating that we do so.
46997 (propagate_controlled_uses): Likewise. Only decrement refdesc
46998 counters when the pass_through jump function allows it.
46999 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
47000 parameter of find_reference.
47001 (ipa_write_jump_function): Assert the new flag does not have to be
47003 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
47006 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
47007 Di Zhao <di.zhao@amperecomputing.com>
47009 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
47010 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
47011 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
47012 Check for the above tuning option when processing loads.
47014 2023-04-17 Richard Biener <rguenther@suse.de>
47016 PR tree-optimization/109524
47017 * tree-vrp.cc (remove_unreachable::m_list): Change to a
47018 vector of pairs of block indices.
47019 (remove_unreachable::maybe_register_block): Adjust.
47020 (remove_unreachable::remove_and_update_globals): Likewise.
47021 Deal with removed blocks.
47023 2023-04-16 Jeff Law <jlaw@ventanamicro>
47026 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
47027 TARGET_SFB_ALU, force the true arm into a register.
47029 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
47032 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
47033 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
47035 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
47036 (pa_function_arg_size): Change return type to int. Return zero
47037 for arguments larger than 1 GB. Update comments.
47039 2023-04-15 Jakub Jelinek <jakub@redhat.com>
47041 PR tree-optimization/109154
47042 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
47043 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
47045 2023-04-15 Jason Merrill <jason@redhat.com>
47048 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
47049 Overhaul lhs_ref.ref analysis.
47051 2023-04-14 Richard Biener <rguenther@suse.de>
47053 PR tree-optimization/109502
47054 * tree-vect-stmts.cc (vectorizable_assignment): Fix
47055 check for conversion between mask and non-mask types.
47057 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
47058 Jakub Jelinek <jakub@redhat.com>
47062 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
47063 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
47064 smaller than word_mode.
47065 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
47066 <case AND>: Likewise.
47068 2023-04-14 Jakub Jelinek <jakub@redhat.com>
47070 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
47073 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
47075 PR tree-optimization/108139
47076 PR tree-optimization/109462
47077 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
47078 equivalency check for PHI nodes.
47079 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
47080 does not dominate single-arg equivalency edges.
47082 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
47085 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
47086 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
47088 2023-04-13 Richard Biener <rguenther@suse.de>
47090 PR tree-optimization/109491
47091 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
47092 NULL operands test.
47094 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47097 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
47098 (vint16mf4_t): Ditto.
47099 (vint32mf2_t): Ditto.
47100 (vint64m1_t): Ditto.
47101 (vint64m2_t): Ditto.
47102 (vint64m4_t): Ditto.
47103 (vint64m8_t): Ditto.
47104 (vuint8mf8_t): Ditto.
47105 (vuint16mf4_t): Ditto.
47106 (vuint32mf2_t): Ditto.
47107 (vuint64m1_t): Ditto.
47108 (vuint64m2_t): Ditto.
47109 (vuint64m4_t): Ditto.
47110 (vuint64m8_t): Ditto.
47111 (vfloat32mf2_t): Ditto.
47112 (vbool64_t): Ditto.
47113 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
47114 (register_vector_type): Ditto.
47115 (check_required_extensions): Fix condition.
47116 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
47117 (RVV_REQUIRE_ELEN_64): New define.
47118 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
47119 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
47120 (TARGET_VECTOR_FP64): Ditto.
47121 (ENTRY): Fix predicate.
47122 * config/riscv/vector-iterators.md: Fix predicate.
47124 2023-04-12 Jakub Jelinek <jakub@redhat.com>
47126 PR tree-optimization/109410
47127 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
47128 block if first statement of the function is a call to returns_twice
47131 2023-04-12 Jakub Jelinek <jakub@redhat.com>
47134 * config/i386/i386.cc: Include rtl-error.h.
47135 (ix86_print_operand): For z modifier warning, use warning_for_asm
47136 if this_is_asm_operands. For Z modifier errors, use %c and code
47137 instead of hardcoded Z.
47139 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
47141 * config/i386/x-mingw32-utf8: Remove extrataneous $@
47143 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
47145 PR tree-optimization/109462
47146 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
47147 check for equivalences if NAME is a phi node.
47149 2023-04-12 Richard Biener <rguenther@suse.de>
47151 PR tree-optimization/109473
47152 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
47153 Convert scalar result to the computation type before performing
47154 the reduction adjustment.
47156 2023-04-12 Richard Biener <rguenther@suse.de>
47158 PR tree-optimization/109469
47159 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
47160 a returns-twice call.
47162 2023-04-12 Richard Biener <rguenther@suse.de>
47164 PR tree-optimization/109434
47165 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
47166 handle possibly throwing calls when processing the LHS
47167 and may-defs are not OK.
47169 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
47171 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
47172 predicate to avoid splitting arith constants.
47174 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
47175 Pan Li <pan2.li@intel.com>
47176 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47177 Kito Cheng <kito.cheng@sifive.com>
47180 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
47181 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
47182 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
47183 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
47184 (riscv_zero_call_used_regs): New.
47185 (TARGET_ZERO_CALL_USED_REGS): New.
47187 2023-04-11 Martin Liska <mliska@suse.cz>
47190 * opts.cc (finish_options): Drop also
47191 x_flag_var_tracking_assignments.
47193 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
47195 PR tree-optimization/108888
47196 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
47198 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
47201 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
47202 (vsx_sign_extend_v16qi_<mode>): ... this.
47203 (vsx_sign_extend_hi_<mode>): Rename to...
47204 (vsx_sign_extend_v8hi_<mode>): ... this.
47205 (vsx_sign_extend_si_v2di): Rename to...
47206 (vsx_sign_extend_v4si_v2di): ... this.
47207 (vsignextend_qi_<mode>): Remove.
47208 (vsignextend_hi_<mode>): Remove.
47209 (vsignextend_si_v2di): Remove.
47210 (vsignextend_v2di_v1ti): Remove.
47211 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
47212 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
47213 with gen_vsx_sign_extend_v16qi_v4si.
47214 * config/rs6000/rs6000.md (split for DI constant generation):
47215 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
47216 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
47217 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
47218 with gen_vsx_sign_extend_v16qi_si.
47219 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
47220 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
47221 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
47222 vsx_sign_extend_v16qi_v4si.
47223 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
47224 vsx_sign_extend_v8hi_v2di.
47225 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
47226 vsx_sign_extend_v8hi_v4si.
47227 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
47228 vsx_sign_extend_si_v2di.
47229 (__builtin_altivec_vsignext): Set bif-pattern to
47230 vsx_sign_extend_v2di_v1ti.
47231 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
47232 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
47233 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
47234 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
47236 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
47239 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
47240 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
47242 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
47244 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
47246 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
47248 * common/config/i386/cpuinfo.h (get_available_features):
47249 Detect AMX-COMPLEX.
47250 * common/config/i386/i386-common.cc
47251 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
47252 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
47253 (ix86_handle_option): Handle -mamx-complex.
47254 * common/config/i386/i386-cpuinfo.h (enum processor_features):
47255 Add FEATURE_AMX_COMPLEX.
47256 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
47258 * config.gcc: Add amxcomplexintrin.h.
47259 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
47260 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
47262 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
47263 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
47264 Handle amx-complex.
47265 * config/i386/i386.opt: Add option -mamx-complex.
47266 * config/i386/immintrin.h: Include amxcomplexintrin.h.
47267 * doc/extend.texi: Document amx-complex.
47268 * doc/invoke.texi: Document -mamx-complex.
47269 * doc/sourcebuild.texi: Document target amx-complex.
47270 * config/i386/amxcomplexintrin.h: New file.
47272 2023-04-08 Jakub Jelinek <jakub@redhat.com>
47274 PR tree-optimization/109392
47275 * tree-vect-generic.cc (tree_vec_extract): Handle failure
47276 of maybe_push_res_to_seq better.
47278 2023-04-08 Jakub Jelinek <jakub@redhat.com>
47280 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
47282 (SYSTEM_H): Depend on $(HASHTAB_H).
47283 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
47284 dependency on $(RTL_BASE_H), remove redundant dependency on
47287 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
47290 * config/arm/arm.cc (arm_effective_regno): New function.
47291 (mve_vector_mem_operand): Use it.
47293 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
47295 PR tree-optimization/109417
47296 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
47297 dependency is in SSA_NAME_FREE_LIST.
47299 2023-04-06 Andrew Pinski <apinski@marvell.com>
47301 PR tree-optimization/109427
47302 * params.opt (-param=vect-induction-float=):
47303 Fix option attribute typo for IntegerRange.
47305 2023-04-05 Jeff Law <jlaw@ventanamicro>
47308 * combine.cc (combine_instructions): Force re-recognition when
47309 after restoring the body of an insn to its original form.
47311 2023-04-05 Martin Jambor <mjambor@suse.cz>
47314 * ipa-sra.cc (zap_useless_ipcp_results): New function.
47315 (process_isra_node_results): Call it.
47317 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47319 * config/riscv/vector.md: Fix incorrect operand order.
47321 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
47323 * config/riscv/riscv-vsetvl.cc
47324 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
47327 2023-04-05 Li Xu <xuli1@eswincomputing.com>
47329 * config/riscv/riscv-vector-builtins.def: Fix typo.
47330 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
47331 * config/riscv/vector-iterators.md: Ditto.
47333 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
47335 * doc/md.texi (Including Patterns): Fix page break.
47337 2023-04-04 Jakub Jelinek <jakub@redhat.com>
47339 PR tree-optimization/109386
47340 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
47341 foperator_le::op1_range, foperator_le::op2_range,
47342 foperator_gt::op1_range, foperator_gt::op2_range,
47343 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
47344 BRS_FALSE case even if the other op is maybe_isnan, not just
47346 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
47347 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
47348 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
47349 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
47350 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
47351 not just known_isnan.
47353 2023-04-04 Marek Polacek <polacek@redhat.com>
47355 PR sanitizer/109107
47356 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
47358 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
47360 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
47362 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
47363 (mve_vcreateq_f<mode>): Swap operands.
47365 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
47367 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
47369 2023-04-04 Jakub Jelinek <jakub@redhat.com>
47372 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
47373 Reword diagnostics about zfinx conflict with f, formatting fixes.
47375 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
47377 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
47379 2023-04-04 Richard Biener <rguenther@suse.de>
47381 PR tree-optimization/109304
47382 * tree-profile.cc (tree_profiling): Use symtab node
47383 availability to decide whether to skip adjusting calls.
47384 Do not adjust calls to internal functions.
47386 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
47389 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
47390 function for permutation control vector by considering big endianness.
47392 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
47395 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
47396 (rs6000_vprtyb<mode>2): ... this.
47397 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
47398 rs6000_vprtybv2di2.
47399 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
47400 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
47401 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
47402 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
47404 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
47405 Sandra Loosemore <sandra@codesourcery.com>
47407 * doc/md.texi (Insn Splitting): Tweak wording for readability.
47409 2023-04-03 Martin Jambor <mjambor@suse.cz>
47412 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
47413 offset + size will be representable in unsigned int.
47415 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
47417 * configure.ac (ZSTD_LIB): Move before zstd.h check.
47418 Unset gcc_cv_header_zstd_h without libzstd.
47419 * configure: Regenerate.
47421 2023-04-03 Martin Liska <mliska@suse.cz>
47423 * doc/invoke.texi: Document new param.
47425 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
47427 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
47428 new check_effective_target function.
47430 2023-04-03 Li Xu <xuli1@eswincomputing.com>
47432 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
47433 (vfloat32m8_t): Likewise
47435 2023-04-03 liuhongt <hongtao.liu@intel.com>
47437 * doc/md.texi: Document signbitm2.
47439 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
47440 kito-cheng <kito.cheng@sifive.com>
47442 * config/riscv/vector.md: Fix RA constraint.
47444 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
47446 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
47447 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
47448 * config/riscv/vector.md: Fix scalar move bug.
47450 2023-04-01 Jakub Jelinek <jakub@redhat.com>
47452 * range-op-float.cc (foperator_equal::fold_range): If at least
47453 one of the op ranges is not singleton and neither is NaN and all
47454 4 bounds are zero, return [1, 1].
47455 (foperator_not_equal::fold_range): In the same case return [0, 0].
47457 2023-04-01 Jakub Jelinek <jakub@redhat.com>
47459 * range-op-float.cc (foperator_equal::fold_range): Perform the
47460 non-singleton handling regardless of maybe_isnan (op1, op2).
47461 (foperator_not_equal::fold_range): Likewise.
47462 (foperator_lt::fold_range, foperator_le::fold_range,
47463 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
47464 real_* comparison check which results in range_false (type)
47465 even if maybe_isnan (op1, op2). Simplify.
47466 (foperator_ltgt): New class.
47467 (fop_ltgt): New variable.
47468 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
47471 2023-04-01 Jakub Jelinek <jakub@redhat.com>
47474 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
47475 returns VOIDmode, handle it like if the register isn't used for
47476 passing arguments at all.
47477 (apply_result_size): If targetm.calls.get_raw_result_mode returns
47478 VOIDmode, handle it like if the register isn't used for returning
47480 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
47481 means to return VOIDmode.
47482 * doc/tm.texi: Regenerated.
47483 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
47484 TARGET_SVE for P0_REGNUM.
47485 (aarch64_function_arg_regno_p): Also return true for p0-p3.
47486 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
47488 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
47490 * lra-constraints.cc: (combine_reload_insn): New function.
47492 2023-03-31 Jakub Jelinek <jakub@redhat.com>
47494 PR tree-optimization/91645
47495 * range-op-float.cc (foperator_unordered_lt::fold_range,
47496 foperator_unordered_le::fold_range,
47497 foperator_unordered_gt::fold_range,
47498 foperator_unordered_ge::fold_range,
47499 foperator_unordered_equal::fold_range): Call the ordered
47500 fold_range on ranges with cleared NaNs.
47501 * value-query.cc (range_query::get_tree_range): Handle also
47502 COMPARISON_CLASS_P trees.
47504 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
47505 Andrew Pinski <pinskia@gmail.com>
47508 * config/riscv/t-riscv: Add missing dependencies.
47510 2023-03-31 liuhongt <hongtao.liu@intel.com>
47512 * config/i386/i386.cc (inline_memory_move_cost): Return 100
47513 for MASK_REGS when MODE_SIZE > 8.
47515 2023-03-31 liuhongt <hongtao.liu@intel.com>
47518 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
47519 ufloat/ufix to floatuns/fixuns.
47520 * config/i386/i386-expand.cc
47521 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
47522 * config/i386/sse.md
47523 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
47525 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
47526 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
47528 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
47530 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
47532 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
47533 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
47534 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
47535 (ufloatv2siv2df2<mask_name>): Renamed to ..
47536 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
47537 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
47539 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
47541 (ufix_notruncv2dfv2si2): Renamed to ..
47542 (fixuns_notruncv2dfv2si2):.. this.
47543 (ufix_notruncv2dfv2si2_mask): Renamed to ..
47544 (fixuns_notruncv2dfv2si2_mask): .. this.
47545 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
47546 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
47547 (ufix_truncv2dfv2si2): Renamed to ..
47548 (*fixuns_truncv2dfv2si2): .. this.
47549 (ufix_truncv2dfv2si2_mask): Renamed to ..
47550 (fixuns_truncv2dfv2si2_mask): .. this.
47551 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
47552 (*fixuns_truncv2dfv2si2_mask_1): .. this.
47553 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
47554 (fixuns_truncv4dfv4si2<mask_name>): .. this.
47555 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
47557 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
47559 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
47560 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
47563 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
47565 PR tree-optimization/109154
47566 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
47567 * gimple-range-gori.h (may_recompute_p): Add depth param.
47568 * params.opt (ranger-recompute-depth): New param.
47570 2023-03-30 Jason Merrill <jason@redhat.com>
47574 * cgraph.h: Move reset() from cgraph_node to symtab_node.
47575 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
47576 remove_from_same_comdat_group.
47578 2023-03-30 Richard Biener <rguenther@suse.de>
47580 PR tree-optimization/107561
47581 * gimple-ssa-warn-access.cc (get_size_range): Add flags
47582 argument and pass it on.
47583 (check_access): When querying for the size range pass
47584 SR_ALLOW_ZERO when the known destination size is zero.
47586 2023-03-30 Richard Biener <rguenther@suse.de>
47588 PR tree-optimization/109342
47589 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
47590 overload for edge. When that edge is a backedge use
47591 dominated_by_p directly.
47593 2023-03-30 liuhongt <hongtao.liu@intel.com>
47595 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
47596 vpblendd instead of vpblendw for V4SI under avx2.
47598 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
47600 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
47601 for many quick operands, for register-sized modes.
47603 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
47605 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
47608 2023-03-29 Martin Liska <mliska@suse.cz>
47610 PR bootstrap/109310
47611 * configure.ac: Emit a warning for deprecated option
47612 --enable-link-mutex.
47613 * configure: Regenerate.
47615 2023-03-29 Richard Biener <rguenther@suse.de>
47617 PR tree-optimization/109331
47618 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
47619 discover a taken edge make sure to cleanup the CFG.
47621 2023-03-29 Richard Biener <rguenther@suse.de>
47623 PR tree-optimization/109327
47624 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
47625 already removed stmts when draining to_remove.
47627 2023-03-29 Richard Biener <rguenther@suse.de>
47630 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
47631 so we can re-create the DIE for the type if required.
47633 2023-03-29 Jakub Jelinek <jakub@redhat.com>
47634 Richard Biener <rguenther@suse.de>
47636 PR tree-optimization/109301
47637 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
47638 properties_provided from PROP_gimple_opt_math to 0.
47639 (pass_data_expand_powcabs): Change properties_provided from 0 to
47640 PROP_gimple_opt_math.
47642 2023-03-29 Richard Biener <rguenther@suse.de>
47644 PR tree-optimization/109154
47645 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
47646 inverted condition specially by inverting at the caller.
47647 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
47649 2023-03-28 David Malcolm <dmalcolm@redhat.com>
47652 * diagnostic-show-locus.cc (column_range::column_range): Factor
47653 out assertion conditional into...
47654 (column_range::valid_p): ...this new function.
47655 (line_corrections::add_hint): Don't attempt to consolidate hints
47656 if it would lead to invalid column_range instances.
47658 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
47661 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
47662 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
47665 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
47667 PR rtl-optimization/109187
47668 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
47669 subtraction in three-way comparison.
47671 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
47673 PR tree-optimization/109265
47674 PR tree-optimization/109274
47675 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
47676 not create a relation record is op1 and op2 are the same symbol.
47677 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
47678 handler for this stmt, but create a new record only if this statement
47679 generates a relation based on the ranges.
47680 (gori_compute::compute_operand2_range): Ditto.
47681 * value-relation.h (value_relation::set_relation): Always create the
47682 record that is requested.
47684 2023-03-28 Richard Biener <rguenther@suse.de>
47686 PR tree-optimization/107087
47687 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
47688 executable regions to avoid useless work and to better
47689 propagate degenerate PHIs.
47691 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
47693 * config/i386/x-mingw32-utf8: update comments.
47695 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
47698 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
47699 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
47701 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
47703 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
47704 after inlining. Record which decls are loaded from. Fix handling
47705 of vops for loads and stores.
47706 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
47707 (aarch64_accesses_vector_load_decl_p): Likewise.
47708 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
47710 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
47711 that loads from a decl, treat vector stores to those decls as
47713 (aarch64_vector_costs::finish_cost): ...and in that case,
47714 if the vector code does nothing more than a store, give the
47715 prologue a zero cost as well.
47717 2023-03-28 Richard Biener <rguenther@suse.de>
47720 PR tree-optimization/108129
47721 * genmatch.cc (lower_for): For (match ...) delay
47722 substituting into the match operator if possible.
47723 (dt_operand::gen_gimple_expr): For user_id look at the
47724 first substitute for determining how to access operands.
47725 (dt_operand::gen_generic_expr): Likewise.
47726 (dt_node::gen_kids): Properly sort user_ids according
47727 to their substitutes.
47728 (dt_node::gen_kids_1): Code-generate user_id matching.
47730 2023-03-28 Jakub Jelinek <jakub@redhat.com>
47731 Jonathan Wakely <jwakely@redhat.com>
47733 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
47734 Use subcommand rather than sub-command in function comments.
47736 2023-03-28 Jakub Jelinek <jakub@redhat.com>
47738 PR tree-optimization/109154
47739 * value-range.h (frange::flush_denormals_to_zero): Make it public
47740 rather than private.
47741 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
47743 * range-op-float.cc (range_operator_float::fold_range): Call
47744 flush_denormals_to_zero.
47746 2023-03-28 Jakub Jelinek <jakub@redhat.com>
47748 PR middle-end/106190
47749 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
47750 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
47752 2023-03-28 Jakub Jelinek <jakub@redhat.com>
47754 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
47755 as 4th argument to set to avoid clear_nan and union_ calls.
47757 2023-03-28 Jakub Jelinek <jakub@redhat.com>
47760 * config/i386/i386.cc (assign_386_stack_local): For DImode
47761 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
47762 align 32 rather than 0 to assign_stack_local.
47764 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
47767 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
47768 on operand #3 to get the final condition code. Use std::swap.
47769 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
47770 (fucmp<gcond:code>8<P:mode>_vis): Move around.
47771 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
47772 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
47774 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
47776 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
47777 top-level sections.
47779 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
47781 * config.host: Pull in i386/x-mingw32-utf8 Makefile
47782 fragment and reference utf8rc-mingw32.o explicitly
47784 * config/i386/sym-mingw32.cc: prevent name mangling of
47786 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
47787 depend on manifest file explicitly.
47789 2023-03-28 Richard Biener <rguenther@suse.de>
47792 2023-03-27 Richard Biener <rguenther@suse.de>
47794 PR rtl-optimization/109237
47795 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
47797 2023-03-28 Richard Biener <rguenther@suse.de>
47799 * common.opt (gdwarf): Remove Negative(gdwarf-).
47801 2023-03-28 Richard Biener <rguenther@suse.de>
47803 * common.opt (gdwarf): Add RejectNegative.
47804 (gdwarf-): Likewise.
47808 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
47810 * config/cris/constraints.md ("T"): Correct to
47811 define_memory_constraint.
47813 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
47815 * config/cris/cris.md (BW2): New mode-iterator.
47816 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
47819 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
47821 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
47822 for possible eliminable compares.
47824 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
47826 * config/cris/constraints.md ("R"): Remove unused constraint.
47828 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
47830 PR gcov-profile/109297
47831 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
47832 (merge_stream_usage): Likewise.
47833 (overlap_usage): Likewise.
47835 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
47838 * config/riscv/thead.md: Add missing mode specifiers.
47840 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
47841 Jiangning Liu <jiangning.liu@amperecomputing.com>
47842 Manolis Tsamis <manolis.tsamis@vrull.eu>
47844 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
47846 2023-03-27 Richard Biener <rguenther@suse.de>
47848 PR rtl-optimization/109237
47849 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
47851 2023-03-27 Richard Biener <rguenther@suse.de>
47854 * lto-wrapper.cc (run_gcc): Parse alternate debug options
47855 as well, they always enable debug.
47857 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
47860 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
47862 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
47864 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
47867 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
47868 than zero when calling vec_sld.
47869 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
47870 zero when calling vec_sld.
47871 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
47872 than zero when calling vec_sld.
47874 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
47876 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
47877 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
47878 loops are represented and which fields are vectors. Add
47879 documentation for OMP_FOR_PRE_BODY field. Document internal
47880 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
47881 * tree.def (OMP_FOR): Make documentation consistent with the
47882 Texinfo manual, to fill some gaps and correct errors.
47884 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
47887 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
47888 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
47889 (handle_move_double): Call it before handle_movsi.
47890 * config/m68k/m68k-protos.h: Declare it.
47892 2023-03-26 Jakub Jelinek <jakub@redhat.com>
47894 PR tree-optimization/109230
47895 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
47897 2023-03-26 Jakub Jelinek <jakub@redhat.com>
47900 * predict.cc (compute_function_frequency): Don't call
47901 warn_function_cold if function already has cold attribute.
47903 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
47905 * doc/install.texi: Remove anachronistic note
47906 related to languages built and separate source tarballs.
47908 2023-03-25 David Malcolm <dmalcolm@redhat.com>
47911 * diagnostic-format-sarif.cc (read_until_eof): Delete.
47912 (maybe_read_file): Delete.
47913 (sarif_builder::maybe_make_artifact_content_object): Use
47914 get_source_file_content rather than maybe_read_file.
47915 Reject it if it's not valid UTF-8.
47916 * input.cc (file_cache_slot::get_full_file_content): New.
47917 (get_source_file_content): New.
47918 (selftest::check_cpp_valid_utf8_p): New.
47919 (selftest::test_cpp_valid_utf8_p): New.
47920 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
47921 * input.h (get_source_file_content): New prototype.
47923 2023-03-24 David Malcolm <dmalcolm@redhat.com>
47925 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
47927 (Special Functions for Debugging the Analyzer): Convert to a
47928 table, and rewrite in places.
47929 (Other Debugging Techniques): Add notes on how to compare two
47930 different exploded graphs.
47932 2023-03-24 David Malcolm <dmalcolm@redhat.com>
47935 * json.cc: Update comments to indicate that we now preserve
47936 insertion order of keys within objects.
47937 (object::print): Traverse keys in insertion order.
47938 (object::set): Preserve insertion order of keys.
47939 (selftest::test_writing_objects): Add an additional key to verify
47940 that we preserve insertion order.
47941 * json.h (object::m_keys): New field.
47943 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
47945 PR tree-optimization/109238
47946 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
47947 predecessors which this block dominates.
47949 2023-03-24 Richard Biener <rguenther@suse.de>
47951 PR tree-optimization/106912
47952 * tree-profile.cc (tree_profiling): Update stmts only when
47953 profiling or testing coverage. Make sure to update calls
47954 fntype, stripping 'const' there.
47956 2023-03-24 Jakub Jelinek <jakub@redhat.com>
47958 PR middle-end/109258
47959 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
47960 if target == const0_rtx.
47962 2023-03-24 Alexandre Oliva <oliva@adacore.com>
47964 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
47965 Document options and effective targets.
47967 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
47969 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
47972 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
47974 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
47975 non-earlyclobber alternative.
47977 2023-03-23 Andrew Pinski <apinski@marvell.com>
47980 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
47983 2023-03-23 Richard Biener <rguenther@suse.de>
47985 PR tree-optimization/107569
47986 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
47987 Do not push SSA names with zero uses as available leader.
47988 (process_bb): Likewise.
47990 2023-03-23 Richard Biener <rguenther@suse.de>
47992 PR tree-optimization/109262
47993 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
47994 combining a piecewise complex load avoid touching loads
47995 that throw internally. Use fun, not cfun throughout.
47997 2023-03-23 Jakub Jelinek <jakub@redhat.com>
47999 * value-range.cc (irange::irange_union, irange::intersect): Fix
48000 comment spelling bugs.
48001 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
48002 * gimple-range-trace.h: Likewise.
48003 * gimple-range-edge.cc: Likewise.
48004 (gimple_outgoing_range_stmt_p,
48005 gimple_outgoing_range::switch_edge_range,
48006 gimple_outgoing_range::edge_range_p): Likewise.
48007 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
48008 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
48009 assume_query::assume_query, assume_query::calculate_phi): Likewise.
48010 * gimple-range-edge.h: Likewise.
48011 * value-range.h (Value_Range::set, Value_Range::lower_bound,
48012 Value_Range::upper_bound, frange::set_undefined): Likewise.
48013 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
48014 gori_compute): Likewise.
48015 * gimple-range-fold.h (fold_using_range): Likewise.
48016 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
48018 * gimple-range-gori.cc (range_def_chain::in_chain_p,
48019 range_def_chain::dump, gori_map::calculate_gori,
48020 gori_compute::compute_operand_range_switch,
48021 gori_compute::logical_combine, gori_compute::refine_using_relation,
48022 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
48024 * gimple-range.h: Likewise.
48025 (enable_ranger): Likewise.
48026 * range-op.h (empty_range_varying): Likewise.
48027 * value-query.h (value_query): Likewise.
48028 * gimple-range-cache.cc (block_range_cache::set_bb_range,
48029 block_range_cache::dump, ssa_global_cache::clear_global_range,
48030 temporal_cache::temporal_value, temporal_cache::current_p,
48031 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
48032 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
48034 * gimple-range-fold.cc (fur_edge::get_phi_operand,
48035 fur_stmt::get_operand, gimple_range_adjustment,
48036 fold_using_range::range_of_phi,
48037 fold_using_range::relation_fold_and_or): Likewise.
48038 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
48039 * value-query.cc (range_query::value_of_expr,
48040 range_query::value_on_edge, range_query::query_relation): Likewise.
48041 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
48042 intersect_range_with_nonzero_bits): Likewise.
48043 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
48044 exit_range): Likewise.
48045 * value-relation.h: Likewise.
48046 (equiv_oracle, relation_trio::relation_trio, value_relation,
48047 value_relation::value_relation, pe_min): Likewise.
48048 * range-op-float.cc (range_operator_float::rv_fold,
48049 frange_arithmetic, foperator_unordered_equal::op1_range,
48050 foperator_div::rv_fold): Likewise.
48051 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
48052 * value-relation.cc (equiv_oracle::query_relation,
48053 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
48054 value_relation::apply_transitive, relation_chain_head::find_relation,
48055 dom_oracle::query_relation, dom_oracle::find_relation_block,
48056 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
48057 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
48058 create_possibly_reversed_range, adjust_op1_for_overflow,
48059 operator_mult::wi_fold, operator_exact_divide::op1_range,
48060 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
48061 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
48062 range_op_lshift_tests): Likewise.
48064 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
48066 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
48067 (move_callee_saved_registers): Detect the bug condition early.
48069 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
48071 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
48072 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
48074 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
48075 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
48076 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
48077 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
48078 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
48080 2023-03-23 Jakub Jelinek <jakub@redhat.com>
48082 PR tree-optimization/109176
48083 * tree-vect-generic.cc (expand_vector_condition): If a has
48084 vector boolean type and is a comparison, also check if both
48085 the comparison and VEC_COND_EXPR could be successfully expanded
48088 2023-03-23 Pan Li <pan2.li@intel.com>
48089 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48093 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
48094 for vector mask modes.
48095 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
48096 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
48098 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
48100 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
48102 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48105 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
48106 (emit_vlmax_op): Ditto.
48107 * config/riscv/riscv-v.cc (get_sew): New function.
48108 (emit_vlmax_vsetvl): Adapt function.
48109 (emit_pred_op): Ditto.
48110 (emit_vlmax_op): Ditto.
48111 (emit_nonvlmax_op): Ditto.
48112 (legitimize_move): Fix LRA ICE.
48113 (gen_no_side_effects_vsetvl_rtx): Adapt function.
48114 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
48115 (@mov<VB:mode><P:mode>_lra): Ditto.
48116 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
48117 (*mov<VB:mode><P:mode>_lra): Ditto.
48119 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48122 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
48123 __riscv_vlenb support.
48125 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
48126 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
48127 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
48129 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
48130 * config/riscv/riscv-vector-builtins.cc: Ditto.
48132 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48133 kito-cheng <kito.cheng@sifive.com>
48135 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
48136 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
48137 (pass_vsetvl::need_vsetvl): Fix bugs.
48138 (pass_vsetvl::backward_demand_fusion): Fix bugs.
48139 (pass_vsetvl::demand_fusion): Fix bugs.
48140 (eliminate_insn): Fix bugs.
48141 (insert_vsetvl): Ditto.
48142 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
48143 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
48144 * config/riscv/vector.md: Ditto.
48146 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48147 kito-cheng <kito.cheng@sifive.com>
48149 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
48150 * config/riscv/vector-iterators.md (nmsac): Ditto.
48156 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
48157 (@pred_mul_plus<mode>): Ditto.
48158 (*pred_madd<mode>): Ditto.
48159 (*pred_macc<mode>): Ditto.
48160 (*pred_mul_plus<mode>): Ditto.
48161 (@pred_mul_plus<mode>_scalar): Ditto.
48162 (*pred_madd<mode>_scalar): Ditto.
48163 (*pred_macc<mode>_scalar): Ditto.
48164 (*pred_mul_plus<mode>_scalar): Ditto.
48165 (*pred_madd<mode>_extended_scalar): Ditto.
48166 (*pred_macc<mode>_extended_scalar): Ditto.
48167 (*pred_mul_plus<mode>_extended_scalar): Ditto.
48168 (@pred_minus_mul<mode>): Ditto.
48169 (*pred_<madd_nmsub><mode>): Ditto.
48170 (*pred_nmsub<mode>): Ditto.
48171 (*pred_<macc_nmsac><mode>): Ditto.
48172 (*pred_nmsac<mode>): Ditto.
48173 (*pred_mul_<optab><mode>): Ditto.
48174 (*pred_minus_mul<mode>): Ditto.
48175 (@pred_mul_<optab><mode>_scalar): Ditto.
48176 (@pred_minus_mul<mode>_scalar): Ditto.
48177 (*pred_<madd_nmsub><mode>_scalar): Ditto.
48178 (*pred_nmsub<mode>_scalar): Ditto.
48179 (*pred_<macc_nmsac><mode>_scalar): Ditto.
48180 (*pred_nmsac<mode>_scalar): Ditto.
48181 (*pred_mul_<optab><mode>_scalar): Ditto.
48182 (*pred_minus_mul<mode>_scalar): Ditto.
48183 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
48184 (*pred_nmsub<mode>_extended_scalar): Ditto.
48185 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
48186 (*pred_nmsac<mode>_extended_scalar): Ditto.
48187 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
48188 (*pred_minus_mul<mode>_extended_scalar): Ditto.
48189 (*pred_<madd_msub><mode>): Ditto.
48190 (*pred_<macc_msac><mode>): Ditto.
48191 (*pred_<madd_msub><mode>_scalar): Ditto.
48192 (*pred_<macc_msac><mode>_scalar): Ditto.
48193 (@pred_neg_mul_<optab><mode>): Ditto.
48194 (@pred_mul_neg_<optab><mode>): Ditto.
48195 (*pred_<nmadd_msub><mode>): Ditto.
48196 (*pred_<nmsub_nmadd><mode>): Ditto.
48197 (*pred_<nmacc_msac><mode>): Ditto.
48198 (*pred_<nmsac_nmacc><mode>): Ditto.
48199 (*pred_neg_mul_<optab><mode>): Ditto.
48200 (*pred_mul_neg_<optab><mode>): Ditto.
48201 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
48202 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
48203 (*pred_<nmadd_msub><mode>_scalar): Ditto.
48204 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
48205 (*pred_<nmacc_msac><mode>_scalar): Ditto.
48206 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
48207 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
48208 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
48209 (@pred_widen_neg_mul_<optab><mode>): Ditto.
48210 (@pred_widen_mul_neg_<optab><mode>): Ditto.
48211 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
48212 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
48214 2023-03-23 liuhongt <hongtao.liu@intel.com>
48216 * builtins.cc (builtin_memset_read_str): Replace
48217 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
48218 (builtin_memset_gen_str): Ditto.
48219 * config/i386/i386-expand.cc
48220 (ix86_convert_const_wide_int_to_broadcast): Replace
48221 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
48222 (ix86_expand_vector_move): Ditto.
48223 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
48225 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
48226 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
48227 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
48228 * doc/tm.texi.in: Ditto.
48229 * target.def: Ditto.
48231 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
48233 * lra.cc (lra): Do not repeat inheritance and live range splitting
48234 when asm error is found.
48236 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
48238 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
48239 (gcn_expand_dpp_distribute_even_insn)
48240 (gcn_expand_dpp_distribute_odd_insn): Declare.
48241 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
48242 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
48243 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
48244 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
48245 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
48246 (fms<mode>4_negop2): New patterns.
48247 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
48248 (gcn_expand_dpp_distribute_even_insn)
48249 (gcn_expand_dpp_distribute_odd_insn): New functions.
48250 * config/gcn/gcn.md: Add entries to unspec enum.
48252 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
48254 PR tree-optimization/109008
48255 * value-range.cc (frange::set): Add nan_state argument.
48256 * value-range.h (class nan_state): New.
48257 (frange::get_nan_state): New.
48259 2023-03-22 Martin Liska <mliska@suse.cz>
48261 * configure: Regenerate.
48263 2023-03-21 Joseph Myers <joseph@codesourcery.com>
48265 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
48268 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
48270 PR tree-optimization/109192
48271 * gimple-range-gori.cc (gori_compute::compute_operand_range):
48272 Terminate gori calculations if a relation is not relevant.
48273 * value-relation.h (value_relation::set_relation): Allow
48274 equality between op1 and op2 if they are the same.
48276 2023-03-21 Richard Biener <rguenther@suse.de>
48278 PR tree-optimization/109219
48279 * tree-vect-loop.cc (vectorizable_reduction): Check
48280 slp_node, not STMT_SLP_TYPE.
48281 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
48282 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
48283 Remove assertion on STMT_SLP_TYPE.
48285 2023-03-21 Jakub Jelinek <jakub@redhat.com>
48287 PR tree-optimization/109215
48288 * tree.h (enum special_array_member): Adjust comments for int_0
48290 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
48291 has zero sized element type and the array has variable number of
48292 elements or constant one or more elements.
48293 (component_ref_size): Adjust comments, formatting fix.
48295 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48297 * configure.ac: Add check for the Texinfo 6.8
48298 CONTENTS_OUTPUT_LOCATION customization variable and set it if
48300 * configure: Regenerate.
48301 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
48302 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
48303 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
48304 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
48306 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48308 * doc/extend.texi: Associate use_hazard_barrier_return index
48309 entry with its attribute.
48310 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
48313 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48315 * doc/implement-c.texi: Remove usage of @gol.
48316 * doc/invoke.texi: Ditto.
48317 * doc/sourcebuild.texi: Ditto.
48318 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
48319 texinfo.tex versions, the bug it was working around appears to
48322 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48324 * doc/include/texinfo.tex: Update to 2023-01-17.19.
48326 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48328 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
48329 @enddefbuiltin for defining built-in functions.
48330 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
48331 places where it should be used.
48333 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48335 * doc/extend.texi (Formatted Output Function Checking): New
48336 subsection for grouping together printf et al.
48337 (Exception handling) Fix missing @ sign before copyright
48338 header, which lead to the copyright line leaking into
48339 '(gcc)Exception handling'.
48340 * doc/gcc.texi: Set document language to en_US.
48341 (@copying): Wrap front cover texts in quotations, move in manual
48344 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48346 * doc/gcc.texi: Add the Indices appendix, to make texinfo
48347 generate nice indices overview page.
48349 2023-03-21 Richard Biener <rguenther@suse.de>
48351 PR tree-optimization/109170
48352 * gimple-range-op.cc (cfn_pass_through_arg1): New.
48353 (gimple_range_op_handler::maybe_builtin_call): Handle
48354 __builtin_expect via cfn_pass_through_arg1.
48356 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
48359 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
48360 (init_float128_ieee): Delete code to switch complex multiply and divide
48362 (complex_multiply_builtin_code): New helper function.
48363 (complex_divide_builtin_code): Likewise.
48364 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
48365 of complex 128-bit multiply and divide built-in functions.
48367 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
48370 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
48372 2023-03-19 Jonny Grant <jg@jguk.org>
48374 * doc/extend.texi (Common Function Attributes) <nonnull>:
48377 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
48379 PR rtl-optimization/109179
48380 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
48381 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
48383 2023-03-17 Jakub Jelinek <jakub@redhat.com>
48386 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
48388 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
48389 to allocate_struct_function instead of false.
48390 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
48391 nor DECL_RESULT here. Pass true as ABSTRACT_P to
48392 push_struct_function. Call targetm.target_option.relayout_function
48394 (tree_function_versioning): Formatting fix.
48396 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
48398 * lra-constraints.cc: Include hooks.h.
48399 (combine_reload_insn): New function.
48400 (lra_constraints): Call it.
48402 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48403 kito-cheng <kito.cheng@sifive.com>
48405 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
48406 as legitimate value.
48407 * config/riscv/riscv-vector-builtins.cc
48408 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
48409 (function_expander::use_widen_ternop_insn): Ditto.
48410 * config/riscv/vector.md (@vundefined<mode>): New pattern.
48411 (pred_mul_<optab><mode>_undef_merge): Remove.
48412 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
48413 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
48414 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
48415 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
48417 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48420 * config/riscv/riscv.md: Fix subreg bug.
48422 2023-03-17 Jakub Jelinek <jakub@redhat.com>
48424 PR middle-end/108685
48425 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
48426 use its loop_father rather than BODY_BB's loop_father.
48427 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
48428 If broken_loop with ordered > collapse and at least one of those
48429 extra loops aren't guaranteed to have at least one iteration, change
48430 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
48431 loop_father to l0_bb's loop_father rather than l1_bb's.
48433 2023-03-17 Jakub Jelinek <jakub@redhat.com>
48436 * gdbhooks.py (TreePrinter.to_string): Wrap
48437 gdb.parse_and_eval('tree_code_type') in a try block, parse
48438 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
48439 raises exception. Update comments for the recent tree_code_type
48442 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
48444 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
48445 issues. Add more line breaks to example so it doesn't overflow
48448 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
48450 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
48451 line breaks in examples.
48452 <malloc>: Fix bad line breaks in running text, also copy-edit
48454 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
48455 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
48457 (C++ Dialect Options) <-fcontracts>: Add line break in example.
48458 <-Wctad-maybe-unsupported>: Likewise.
48459 <-Winvalid-constexpr>: Likewise.
48460 (Warning Options) <-Wdangling-pointer>: Likewise.
48461 <-Winterference-size>: Likewise.
48462 <-Wvla-parameter>: Likewise.
48463 (Static Analyzer Options): Fix bad line breaks in running text,
48464 plus add some missing markup.
48465 (Optimize Options) <openacc-privatization>: Fix more bad line
48466 breaks in running text.
48468 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
48470 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
48471 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
48472 (expand_vec_perm_2perm_pblendv): Ditto.
48474 2023-03-16 Martin Liska <mliska@suse.cz>
48476 PR middle-end/106133
48477 * gcc.cc (driver_handle_option): Use x_main_input_basename
48478 if x_dump_base_name is null.
48479 * opts.cc (common_handle_option): Likewise.
48481 2023-03-16 Richard Biener <rguenther@suse.de>
48483 PR tree-optimization/109123
48484 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
48485 Do not emit -Wuse-after-free late.
48486 (pass_waccess::check_call): Always check call pointer uses.
48488 2023-03-16 Richard Biener <rguenther@suse.de>
48490 PR tree-optimization/109141
48491 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
48492 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
48494 (renumber_gimple_stmt_uids): ... here and
48495 (renumber_gimple_stmt_uids_in_blocks): ... here.
48496 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
48497 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
48499 (pass_waccess::check_pointer_uses): Process all PHIs.
48501 2023-03-15 David Malcolm <dmalcolm@redhat.com>
48504 * diagnostic-format-sarif.cc (class sarif_invocation): New.
48505 (class sarif_ice_notification): New.
48506 (sarif_builder::m_invocation_obj): New field.
48507 (sarif_invocation::add_notification_for_ice): New.
48508 (sarif_invocation::prepare_to_flush): New.
48509 (sarif_ice_notification::sarif_ice_notification): New.
48510 (sarif_builder::sarif_builder): Add m_invocation_obj.
48511 (sarif_builder::end_diagnostic): Special-case DK_ICE and
48513 (sarif_builder::flush_to_file): Call prepare_to_flush on
48514 m_invocation_obj. Pass the latter to make_top_level_object.
48515 (sarif_builder::make_result_object): Move creation of "locations"
48517 (sarif_builder::make_locations_arr): ...this new function.
48518 (sarif_builder::make_top_level_object): Add "invocation_obj" param
48519 and pass it to make_run_object.
48520 (sarif_builder::make_run_object): Add "invocation_obj" param and
48522 (sarif_ice_handler): New callback.
48523 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
48524 * diagnostic.cc (diagnostic_initialize): Initialize new field
48526 (diagnostic_action_after_output): If it is set, make one attempt
48527 to call ice_handler_cb.
48528 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
48530 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
48532 * config/i386/i386-expand.cc (expand_vec_perm_blend):
48533 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
48534 and fix V2HImode handling.
48535 (expand_vec_perm_1): Try to emit BLEND instruction
48536 before MOVSS/MOVSD.
48537 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
48539 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
48541 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
48543 2023-03-15 Richard Biener <rguenther@suse.de>
48545 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
48546 Do not diagnose clobbers.
48548 2023-03-15 Richard Biener <rguenther@suse.de>
48550 PR tree-optimization/109139
48551 * tree-ssa-live.cc (remove_unused_locals): Look at the
48552 base address for unused decls on the LHS of .DEFERRED_INIT.
48554 2023-03-15 Xi Ruoyao <xry111@xry111.site>
48557 * builtins.cc (inline_string_cmp): Force the character
48558 difference into "result" pseudo-register, instead of reassign
48559 the pseudo-register.
48561 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48563 * config.gcc: Add thead.o to RISC-V extra_objs.
48564 * config/riscv/peephole.md: Add mempair peephole passes.
48565 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
48567 (th_mempair_operands_p): Likewise.
48568 (th_mempair_order_operands): Likewise.
48569 (th_mempair_prepare_save_restore_operands): Likewise.
48570 (th_mempair_save_restore_regs): Likewise.
48571 (th_mempair_output_move): Likewise.
48572 * config/riscv/riscv.cc (riscv_save_reg): Move code.
48573 (riscv_restore_reg): Move code.
48574 (riscv_for_each_saved_reg): Add code to emit mempair insns.
48575 * config/riscv/t-riscv: Add thead.cc.
48576 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
48578 (*th_mempair_store_<GPR:mode>2): Likewise.
48579 (*th_mempair_load_extendsidi2): Likewise.
48580 (*th_mempair_load_zero_extendsidi2): Likewise.
48581 * config/riscv/thead.cc: New file.
48583 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48585 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
48586 New constraint "th_f_fmv".
48587 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
48589 * config/riscv/riscv.cc (riscv_split_doubleword_move):
48590 Add split code for XTheadFmv.
48591 (riscv_secondary_memory_needed): XTheadFmv does not need
48593 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
48594 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
48595 movdf_hardfloat_rv32.
48596 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
48597 (th_fmv_x_w): New INSN.
48598 (th_fmv_x_hw): New INSN.
48600 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48602 * config/riscv/riscv.md (maddhisi4): New expand.
48603 (msubhisi4): New expand.
48604 * config/riscv/thead.md (*th_mula<mode>): New pattern.
48605 (*th_mulawsi): New pattern.
48606 (*th_mulawsi2): New pattern.
48607 (*th_maddhisi4): New pattern.
48608 (*th_sextw_maddhisi4): New pattern.
48609 (*th_muls<mode>): New pattern.
48610 (*th_mulswsi): New pattern.
48611 (*th_mulswsi2): New pattern.
48612 (*th_msubhisi4): New pattern.
48613 (*th_sextw_msubhisi4): New pattern.
48615 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48617 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
48618 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
48620 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
48622 (riscv_expand_conditional_move): New function.
48623 (riscv_expand_conditional_move_onesided): New function.
48624 * config/riscv/riscv.md: Add support for XTheadCondMov.
48625 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
48626 support for XTheadCondMov.
48627 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
48629 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48631 * config/riscv/bitmanip.md (clzdi2): New expand.
48632 (clzsi2): New expand.
48633 (ctz<mode>2): New expand.
48634 (popcount<mode>2): New expand.
48635 (<bitmanip_optab>si2): Rename INSN.
48636 (*<bitmanip_optab>si2): Hide INSN name.
48637 (<bitmanip_optab>di2): Rename INSN.
48638 (*<bitmanip_optab>di2): Hide INSN name.
48639 (rotrsi3): Remove INSN.
48640 (rotr<mode>3): Add expand.
48641 (*rotrsi3): New INSN.
48642 (rotrdi3): Rename INSN.
48643 (*rotrdi3): Hide INSN name.
48644 (rotrsi3_sext): Rename INSN.
48645 (*rotrsi3_sext): Hide INSN name.
48646 (bswap<mode>2): Remove INSN.
48647 (bswapdi2): Add expand.
48648 (bswapsi2): Add expand.
48649 (*bswap<mode>2): Hide INSN name.
48650 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
48652 * config/riscv/riscv.md (extv<mode>): New expand.
48653 (extzv<mode>): New expand.
48654 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
48655 (*th_ext<mode>): New INSN.
48656 (*th_extu<mode>): New INSN.
48657 (*th_clz<mode>2): New INSN.
48658 (*th_rev<mode>2): New INSN.
48660 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48662 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
48663 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
48665 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48667 * config/riscv/riscv.md: Include thead.md
48668 * config/riscv/thead.md: New file.
48670 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48672 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
48674 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48676 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
48677 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
48678 (MASK_XTHEADBB): New.
48679 (MASK_XTHEADBS): New.
48680 (MASK_XTHEADCMO): New.
48681 (MASK_XTHEADCONDMOV): New.
48682 (MASK_XTHEADFMEMIDX): New.
48683 (MASK_XTHEADFMV): New.
48684 (MASK_XTHEADINT): New.
48685 (MASK_XTHEADMAC): New.
48686 (MASK_XTHEADMEMIDX): New.
48687 (MASK_XTHEADMEMPAIR): New.
48688 (MASK_XTHEADSYNC): New.
48689 (TARGET_XTHEADBA): New.
48690 (TARGET_XTHEADBB): New.
48691 (TARGET_XTHEADBS): New.
48692 (TARGET_XTHEADCMO): New.
48693 (TARGET_XTHEADCONDMOV): New.
48694 (TARGET_XTHEADFMEMIDX): New.
48695 (TARGET_XTHEADFMV): New.
48696 (TARGET_XTHEADINT): New.
48697 (TARGET_XTHEADMAC): New.
48698 (TARGET_XTHEADMEMIDX): New.
48699 (TARGET_XTHEADMEMPAIR): new.
48700 (TARGET_XTHEADSYNC): New.
48701 * config/riscv/riscv.opt: Add riscv_xthead_subext.
48703 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
48706 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
48707 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
48708 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
48710 2023-03-14 Jakub Jelinek <jakub@redhat.com>
48713 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
48714 when lo is equal to dhi and hi is a MEM which uses dlo register.
48716 2023-03-14 Martin Jambor <mjambor@suse.cz>
48719 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
48720 global0 instead of zeroing when it does not have as many counts as
48723 2023-03-14 Martin Jambor <mjambor@suse.cz>
48726 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
48727 ipa count, remove assert, lenient_count_portion_handling, dump
48728 also orig_node_count.
48730 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
48732 * config/i386/i386-expand.cc (expand_vec_perm_movs):
48733 Handle V2SImode for TARGET_MMX_WITH_SSE.
48734 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
48735 using V2FI mode iterator to handle both V2SI and V2SF modes.
48737 2023-03-14 Sam James <sam@gentoo.org>
48739 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
48740 including <sstream> earlier.
48741 * system.h: Add INCLUDE_SSTREAM.
48743 2023-03-14 Richard Biener <rguenther@suse.de>
48745 * tree-ssa-live.cc (remove_unused_locals): Do not treat
48746 the .DEFERRED_INIT of a variable as use, instead remove
48747 that if it is the only use.
48749 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
48751 PR rtl-optimization/107762
48752 * expr.cc (emit_group_store): Revert latest change.
48754 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
48756 PR tree-optimization/109005
48757 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
48758 aggregate type check.
48760 2023-03-14 Jakub Jelinek <jakub@redhat.com>
48762 PR tree-optimization/109115
48763 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
48764 r.upper_bound () on r.undefined_p () range.
48766 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
48768 PR tree-optimization/106896
48769 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
48770 implementatoin with probability_in; avoid some asserts.
48772 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
48774 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
48776 2023-03-13 Sean Bright <sean@seanbright.com>
48778 * doc/invoke.texi (Warning Options): Remove errant 'See'
48781 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
48783 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
48784 REG_OK_FOR_BASE_P): Remove.
48786 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48788 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
48789 (=vd,vd,vr,vr): Ditto.
48790 * config/riscv/vector.md: Ditto.
48792 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48794 * config/riscv/riscv-vector-builtins.cc
48795 (function_expander::use_compare_insn): Add operand predicate check.
48797 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48799 * config/riscv/vector.md: Fine tune RA constraints.
48801 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
48803 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
48804 hsaco assemble/link.
48806 2023-03-13 Richard Biener <rguenther@suse.de>
48808 PR tree-optimization/109046
48809 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
48810 piecewise complex loads.
48812 2023-03-12 Jakub Jelinek <jakub@redhat.com>
48814 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
48815 (aarch64_bf16_ptr_type_node): Adjust comment.
48816 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
48817 bfloat16_type_node rather than aarch64_bf16_type_node.
48818 (aarch64_libgcc_floating_mode_supported_p,
48819 aarch64_scalar_mode_supported_p): Also support BFmode.
48820 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
48821 (aarch64_invalid_binary_op): Remove BFmode related rejections.
48822 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
48823 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
48824 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
48825 aarch64_bf16_type_node.
48826 (aarch64_init_simd_builtin_types): Likewise.
48827 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
48828 which is created in tree.cc already.
48829 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
48831 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
48833 PR middle-end/109031
48834 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
48835 ensure that the type of x is as wide or wider than the type of a.
48837 2023-03-12 Tamar Christina <tamar.christina@arm.com>
48840 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
48841 (*bitmask_shift_plus<mode>): New.
48842 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
48843 (@aarch64_bitmask_udiv<mode>3): Remove.
48844 * config/aarch64/aarch64.cc
48845 (aarch64_vectorize_can_special_div_by_constant,
48846 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
48847 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
48848 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
48850 2023-03-12 Tamar Christina <tamar.christina@arm.com>
48853 * target.def (preferred_div_as_shifts_over_mult): New.
48854 * doc/tm.texi.in: Document it.
48855 * doc/tm.texi: Regenerate.
48856 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
48857 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
48858 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
48860 2023-03-12 Tamar Christina <tamar.christina@arm.com>
48861 Richard Sandiford <richard.sandiford@arm.com>
48864 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
48867 2023-03-12 Tamar Christina <tamar.christina@arm.com>
48868 Andrew MacLeod <amacleod@redhat.com>
48871 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
48872 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
48874 (gimple_range_op_handler::maybe_non_standard): New.
48875 * range-op.cc (class operator_widen_plus_signed,
48876 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
48877 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
48878 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
48879 operator_widen_mult_unsigned::wi_fold,
48880 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
48881 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
48882 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
48883 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
48885 2023-03-12 Tamar Christina <tamar.christina@arm.com>
48888 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
48889 * doc/tm.texi.in: Likewise.
48890 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
48891 * expmed.cc (expand_divmod): Likewise.
48892 * expmed.h (expand_divmod): Likewise.
48893 * expr.cc (force_operand, expand_expr_divmod): Likewise.
48894 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
48895 * target.def (can_special_div_by_const): Remove.
48896 * target.h: Remove tree-core.h include
48897 * targhooks.cc (default_can_special_div_by_const): Remove.
48898 * targhooks.h (default_can_special_div_by_const): Remove.
48899 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
48900 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
48901 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
48903 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
48905 * doc/install.texi2html: Fix issue number typo in comment.
48907 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
48909 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
48912 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
48914 * doc/invoke.texi (Optimize Options): Add markup to
48915 description of asan-kernel-mem-intrinsic-prefix, and clarify
48918 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
48920 * doc/extend.texi (Named Address Spaces): Drop a redundant link
48923 2023-03-11 Jeff Law <jlaw@ventanamicro>
48926 * doc/extend.texi: Clarify Attribute Syntax a bit.
48928 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
48930 * doc/install.texi (Prerequisites): Suggest using newer versions
48932 (Final install): Clean up and modernize discussion of how to
48933 build or obtain the GCC manuals.
48934 * doc/install.texi2html: Update comment to point to the PR instead
48935 of "makeinfo 4.7 brokenness" (it's not specific to that version).
48937 2023-03-10 Jakub Jelinek <jakub@redhat.com>
48940 * optabs.cc (expand_fix): For conversions from BFmode to integral,
48941 use shifts to convert it to SFmode first and then convert SFmode
48944 2023-03-10 Andrew Pinski <apinski@marvell.com>
48946 * config/aarch64/aarch64.md: Add a new define_split
48949 2023-03-10 Richard Biener <rguenther@suse.de>
48951 * tree-ssa-structalias.cc (solve_graph): Immediately
48952 iterate self-cycles.
48954 2023-03-10 Jakub Jelinek <jakub@redhat.com>
48956 PR tree-optimization/109008
48957 * range-op-float.cc (float_widen_lhs_range): If not
48958 -frounding-math and not IBM double double format, extend lhs
48959 range just by 0.5ulp rather than 1ulp in each direction.
48961 2023-03-10 Jakub Jelinek <jakub@redhat.com>
48964 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
48966 * config/i386/t-cygwin-w64: Remove.
48968 2023-03-10 Jakub Jelinek <jakub@redhat.com>
48971 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
48972 C++14, don't declare as extern const arrays.
48973 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
48974 static constexpr member arrays for C++11 or C++14.
48975 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
48976 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
48977 (TREE_CODE_LENGTH): For C++11 or C++14 use
48978 tree_code_length_tmpl <0>::tree_code_length instead of
48980 * tree.cc (tree_code_type, tree_code_length): Remove.
48982 2023-03-10 Jakub Jelinek <jakub@redhat.com>
48985 * common.opt (fcanon-prefix-map): New option.
48986 * opts.cc: Include file-prefix-map.h.
48987 (flag_canon_prefix_map): New variable.
48988 (common_handle_option): Handle OPT_fcanon_prefix_map.
48989 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
48990 * file-prefix-map.h (flag_canon_prefix_map): Declare.
48991 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
48993 (add_prefix_map): Initialize canonicalize member from
48994 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
48995 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
48996 use lrealpath result only for map->canonicalize map entries.
48997 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
48998 * opts-global.cc (handle_common_deferred_options): Clear
48999 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
49000 * doc/invoke.texi (-fcanon-prefix-map): Document.
49001 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
49002 see also for -fcanon-prefix-map.
49003 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
49005 2023-03-10 Jakub Jelinek <jakub@redhat.com>
49008 * cgraphunit.cc (check_global_declaration): Don't warn for unused
49009 variables which have OPT_Wunused_variable warning suppressed.
49011 2023-03-10 Jakub Jelinek <jakub@redhat.com>
49013 PR tree-optimization/109008
49014 * range-op-float.cc (float_widen_lhs_range): If lb is
49015 minimum representable finite number or ub is maximum
49016 representable finite number, instead of widening it to
49017 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
49018 Temporarily clear flag_finite_math_only when canonicalizing
49021 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49023 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
49024 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
49025 (gimple_fold_builtin): Ditto.
49026 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
49027 (class vleff): Ditto.
49029 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49030 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
49032 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
49033 (struct fault_load_def): Ditto.
49035 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
49036 * config/riscv/riscv-vector-builtins.cc
49037 (rvv_arg_type_info::get_tree_type): Add size_ptr.
49038 (gimple_folder::gimple_folder): New class.
49039 (gimple_folder::fold): Ditto.
49040 (gimple_fold_builtin): New function.
49041 (get_read_vl_instance): Ditto.
49042 (get_read_vl_decl): Ditto.
49043 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
49044 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
49045 (get_read_vl_instance): New function.
49046 (get_read_vl_decl): Ditto.
49047 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
49048 (read_vl_insn_p): Ditto.
49049 (available_occurrence_p): Ditto.
49050 (backward_propagate_worthwhile_p): Ditto.
49051 (gen_vsetvl_pat): Adapt for vleff support.
49052 (get_forward_read_vl_insn): New function.
49053 (get_backward_fault_first_load_insn): Ditto.
49054 (source_equal_p): Adapt for vleff support.
49055 (first_ratio_invalid_for_second_sew_p): Remove.
49056 (first_ratio_invalid_for_second_lmul_p): Ditto.
49057 (first_lmul_less_than_second_lmul_p): Ditto.
49058 (first_ratio_less_than_second_ratio_p): Ditto.
49059 (support_relaxed_compatible_p): New function.
49060 (vector_insn_info::operator>): Remove.
49061 (vector_insn_info::operator>=): Refine.
49062 (vector_insn_info::parse_insn): Adapt for vleff support.
49063 (vector_insn_info::compatible_p): Ditto.
49064 (vector_insn_info::update_fault_first_load_avl): New function.
49065 (pass_vsetvl::transfer_after): Adapt for vleff support.
49066 (pass_vsetvl::demand_fusion): Ditto.
49067 (pass_vsetvl::cleanup_insns): Ditto.
49068 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
49069 redundant condtions.
49070 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
49071 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
49072 * config/riscv/riscv.md: Adapt for vleff support.
49073 * config/riscv/t-riscv: Ditto.
49074 * config/riscv/vector-iterators.md: New iterator.
49075 * config/riscv/vector.md (read_vlsi): New pattern.
49076 (read_vldi_zero_extend): Ditto.
49077 (@pred_fault_load<mode>): Ditto.
49079 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49081 * config/riscv/riscv-vector-builtins.cc
49082 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
49083 (function_expander::use_widen_ternop_insn): Ditto.
49084 * optabs.cc (maybe_gen_insn): Extend nops handling.
49086 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49088 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
49089 patterns according to RVV ISA.
49090 * config/riscv/vector-iterators.md: New iterators.
49091 * config/riscv/vector.md
49092 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
49093 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
49094 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
49095 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
49096 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
49097 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
49098 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
49099 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
49100 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
49101 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
49102 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
49103 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
49104 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
49105 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
49107 2023-03-10 Michael Collison <collison@rivosinc.com>
49109 * tree-vect-loop-manip.cc (vect_do_peeling): Use
49110 result of constant_lower_bound instead of vf for the lower
49111 bound of the epilog loop trip count.
49113 2023-03-09 Tamar Christina <tamar.christina@arm.com>
49115 * passes.cc (emergency_dump_function): Finish graph generation.
49117 2023-03-09 Tamar Christina <tamar.christina@arm.com>
49119 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
49120 and bottom bit only.
49122 2023-03-09 Andrew Pinski <apinski@marvell.com>
49124 PR tree-optimization/108980
49125 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
49126 Reorgnize the call to warning for not strict flexible arrays
49127 to be before the check of warned.
49129 2023-03-09 Jason Merrill <jason@redhat.com>
49131 * doc/extend.texi: Comment out __is_deducible docs.
49133 2023-03-09 Jason Merrill <jason@redhat.com>
49136 * doc/extend.texi (Type Traits):: Document __is_deducible.
49138 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
49141 * config.host: add object for x86_64-*-mingw*.
49142 * config/i386/sym-mingw32.cc: dummy file to attach
49144 * config/i386/utf8-mingw32.rc: windres resource file.
49145 * config/i386/winnt-utf8.manifest: XML manifest to
49147 * config/i386/x-mingw32: reference to x-mingw32-utf8.
49148 * config/i386/x-mingw32-utf8: Makefile fragment to
49149 embed UTF-8 manifest.
49151 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
49153 * lra-constraints.cc (process_alt_operands): Use operand modes for
49154 clobbered regs instead of the biggest access mode.
49156 2023-03-09 Richard Biener <rguenther@suse.de>
49158 PR middle-end/108995
49159 * fold-const.cc (extract_muldiv_1): Avoid folding
49160 (CST * b) / CST2 when sanitizing overflow and we rely on
49161 overflow being undefined.
49163 2023-03-09 Jakub Jelinek <jakub@redhat.com>
49164 Richard Biener <rguenther@suse.de>
49166 PR tree-optimization/109008
49167 * range-op-float.cc (float_widen_lhs_range): New function.
49168 (foperator_plus::op1_range, foperator_minus::op1_range,
49169 foperator_minus::op2_range, foperator_mult::op1_range,
49170 foperator_div::op1_range, foperator_div::op2_range): Use it.
49172 2023-03-07 Jonathan Grant <jg@jguk.org>
49175 * doc/invoke.texi (Instrumentation Options): Clarify
49176 LeakSanitizer behavior.
49178 2023-03-07 Benson Muite <benson_muite@emailplus.org>
49180 * doc/install.texi (Prerequisites): Add link to gmplib.org.
49182 2023-03-07 Pan Li <pan2.li@intel.com>
49183 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49187 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
49189 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
49190 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
49191 * genmodes.cc (adj_precision): New.
49192 (ADJUST_PRECISION): New.
49193 (emit_mode_adjustments): Handle ADJUST_PRECISION.
49195 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
49197 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
49199 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
49201 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
49202 {s|u}{max|min} in QI, HI and DI modes.
49203 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
49204 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
49205 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
49206 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
49209 2023-03-06 Richard Biener <rguenther@suse.de>
49211 PR tree-optimization/109025
49212 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
49213 the inner LC PHI use is the inner loop PHI latch definition
49214 before classifying an outer PHI as double reduction.
49216 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
49219 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
49221 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
49222 (X86_TUNE_USE_SCATTER): Likewise.
49224 2023-03-06 Xi Ruoyao <xry111@xry111.site>
49227 * config/loongarch/loongarch.h (FP_RETURN): Use
49228 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
49229 (UNITS_PER_FP_ARG): Likewise.
49231 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49233 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
49234 (pass_vsetvl::backward_demand_fusion): Ditto.
49236 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
49237 SiYu Wu <siyu@isrc.iscas.ac.cn>
49239 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
49241 (riscv_sm3p1_<mode>): New.
49242 (riscv_sm4ed_<mode>): New.
49243 (riscv_sm4ks_<mode>): New.
49244 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
49245 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
49246 ZKSH's built-in functions.
49248 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
49249 SiYu Wu <siyu@isrc.iscas.ac.cn>
49251 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
49252 (riscv_sha256sig1_<mode>): New.
49253 (riscv_sha256sum0_<mode>): New.
49254 (riscv_sha256sum1_<mode>): New.
49255 (riscv_sha512sig0h): New.
49256 (riscv_sha512sig0l): New.
49257 (riscv_sha512sig1h): New.
49258 (riscv_sha512sig1l): New.
49259 (riscv_sha512sum0r): New.
49260 (riscv_sha512sum1r): New.
49261 (riscv_sha512sig0): New.
49262 (riscv_sha512sig1): New.
49263 (riscv_sha512sum0): New.
49264 (riscv_sha512sum1): New.
49265 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
49266 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
49267 built-in functions.
49268 (DIRECT_BUILTIN): Add new.
49270 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
49271 SiYu Wu <siyu@isrc.iscas.ac.cn>
49273 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
49275 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
49276 (riscv_aes32dsmi): New.
49277 (riscv_aes64ds): New.
49278 (riscv_aes64dsm): New.
49279 (riscv_aes64im): New.
49280 (riscv_aes64ks1i): New.
49281 (riscv_aes64ks2): New.
49282 (riscv_aes32esi): New.
49283 (riscv_aes32esmi): New.
49284 (riscv_aes64es): New.
49285 (riscv_aes64esm): New.
49286 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
49287 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
49288 ZKNE's built-in functions.
49290 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
49291 SiYu Wu <siyu@isrc.iscas.ac.cn>
49293 * config/riscv/bitmanip.md: Add ZBKB's instructions.
49294 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
49295 * config/riscv/riscv.md: Add new type for crypto instructions.
49296 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
49298 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
49299 extension's built-in function file.
49301 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
49302 SiYu Wu <siyu@isrc.iscas.ac.cn>
49304 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
49305 (RISCV_FTYPE_NAME3): New.
49306 (RISCV_ATYPE_QI): New.
49307 (RISCV_ATYPE_HI): New.
49308 (RISCV_FTYPE_ATYPES2): New.
49309 (RISCV_FTYPE_ATYPES3): New.
49310 * config/riscv/riscv-ftypes.def (2): New.
49313 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
49315 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
49318 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49319 kito-cheng <kito.cheng@sifive.com>
49321 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
49322 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
49323 (riscv_register_pragmas): Add builtin function check call.
49324 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
49325 (check_builtin_call): New function.
49326 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
49327 (class vreinterpret): Ditto.
49328 (class vlmul_ext): Ditto.
49329 (class vlmul_trunc): Ditto.
49330 (class vset): Ditto.
49331 (class vget): Ditto.
49333 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49334 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
49350 (vundefined): Add new intrinsic.
49351 (vreinterpret): Ditto.
49352 (vlmul_ext): Ditto.
49353 (vlmul_trunc): Ditto.
49356 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
49357 (struct narrow_alu_def): Ditto.
49358 (struct reduc_alu_def): Ditto.
49359 (struct vundefined_def): Ditto.
49360 (struct misc_def): Ditto.
49361 (struct vset_def): Ditto.
49362 (struct vget_def): Ditto.
49364 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
49365 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
49366 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
49367 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
49368 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
49369 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
49370 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
49371 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
49372 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
49373 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
49374 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
49375 (DEF_RVV_LMUL1_OPS): Ditto.
49376 (DEF_RVV_LMUL2_OPS): Ditto.
49377 (DEF_RVV_LMUL4_OPS): Ditto.
49378 (vint16mf4_t): Ditto.
49379 (vint16mf2_t): Ditto.
49380 (vint16m1_t): Ditto.
49381 (vint16m2_t): Ditto.
49382 (vint16m4_t): Ditto.
49383 (vint16m8_t): Ditto.
49384 (vint32mf2_t): Ditto.
49385 (vint32m1_t): Ditto.
49386 (vint32m2_t): Ditto.
49387 (vint32m4_t): Ditto.
49388 (vint32m8_t): Ditto.
49389 (vint64m1_t): Ditto.
49390 (vint64m2_t): Ditto.
49391 (vint64m4_t): Ditto.
49392 (vint64m8_t): Ditto.
49393 (vuint16mf4_t): Ditto.
49394 (vuint16mf2_t): Ditto.
49395 (vuint16m1_t): Ditto.
49396 (vuint16m2_t): Ditto.
49397 (vuint16m4_t): Ditto.
49398 (vuint16m8_t): Ditto.
49399 (vuint32mf2_t): Ditto.
49400 (vuint32m1_t): Ditto.
49401 (vuint32m2_t): Ditto.
49402 (vuint32m4_t): Ditto.
49403 (vuint32m8_t): Ditto.
49404 (vuint64m1_t): Ditto.
49405 (vuint64m2_t): Ditto.
49406 (vuint64m4_t): Ditto.
49407 (vuint64m8_t): Ditto.
49408 (vint8mf4_t): Ditto.
49409 (vint8mf2_t): Ditto.
49410 (vint8m1_t): Ditto.
49411 (vint8m2_t): Ditto.
49412 (vint8m4_t): Ditto.
49413 (vint8m8_t): Ditto.
49414 (vuint8mf4_t): Ditto.
49415 (vuint8mf2_t): Ditto.
49416 (vuint8m1_t): Ditto.
49417 (vuint8m2_t): Ditto.
49418 (vuint8m4_t): Ditto.
49419 (vuint8m8_t): Ditto.
49420 (vint8mf8_t): Ditto.
49421 (vuint8mf8_t): Ditto.
49422 (vfloat32mf2_t): Ditto.
49423 (vfloat32m1_t): Ditto.
49424 (vfloat32m2_t): Ditto.
49425 (vfloat32m4_t): Ditto.
49426 (vfloat64m1_t): Ditto.
49427 (vfloat64m2_t): Ditto.
49428 (vfloat64m4_t): Ditto.
49429 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
49430 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
49431 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
49432 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
49433 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
49434 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
49435 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
49436 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
49437 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
49438 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
49439 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
49440 (DEF_RVV_LMUL1_OPS): Ditto.
49441 (DEF_RVV_LMUL2_OPS): Ditto.
49442 (DEF_RVV_LMUL4_OPS): Ditto.
49443 (DEF_RVV_TYPE_INDEX): Ditto.
49444 (required_extensions_p): Adapt for new intrinsic support/
49445 (get_required_extensions): New function.
49446 (check_required_extensions): Ditto.
49447 (unsigned_base_type_p): Remove.
49448 (rvv_arg_type_info::get_scalar_ptr_type): New function.
49449 (get_mode_for_bitsize): Remove.
49450 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
49451 (rvv_arg_type_info::get_base_vector_type): Ditto.
49452 (rvv_arg_type_info::get_function_type_index): Ditto.
49453 (DEF_RVV_BASE_TYPE): New def.
49454 (function_builder::apply_predication): New class.
49455 (function_expander::mask_mode): Ditto.
49456 (function_checker::function_checker): Ditto.
49457 (function_checker::report_non_ice): Ditto.
49458 (function_checker::report_out_of_range): Ditto.
49459 (function_checker::require_immediate): Ditto.
49460 (function_checker::require_immediate_range): Ditto.
49461 (function_checker::check): Ditto.
49462 (check_builtin_call): Ditto.
49463 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
49464 (DEF_RVV_BASE_TYPE): Ditto.
49465 (DEF_RVV_TYPE_INDEX): Ditto.
49466 (vbool64_t): Ditto.
49467 (vbool32_t): Ditto.
49468 (vbool16_t): Ditto.
49473 (vuint8mf8_t): Ditto.
49474 (vuint8mf4_t): Ditto.
49475 (vuint8mf2_t): Ditto.
49476 (vuint8m1_t): Ditto.
49477 (vuint8m2_t): Ditto.
49478 (vint8m4_t): Ditto.
49479 (vuint8m4_t): Ditto.
49480 (vint8m8_t): Ditto.
49481 (vuint8m8_t): Ditto.
49482 (vint16mf4_t): Ditto.
49483 (vuint16mf2_t): Ditto.
49484 (vuint16m1_t): Ditto.
49485 (vuint16m2_t): Ditto.
49486 (vuint16m4_t): Ditto.
49487 (vuint16m8_t): Ditto.
49488 (vint32mf2_t): Ditto.
49489 (vuint32m1_t): Ditto.
49490 (vuint32m2_t): Ditto.
49491 (vuint32m4_t): Ditto.
49492 (vuint32m8_t): Ditto.
49493 (vuint64m1_t): Ditto.
49494 (vuint64m2_t): Ditto.
49495 (vuint64m4_t): Ditto.
49496 (vuint64m8_t): Ditto.
49497 (vfloat32mf2_t): Ditto.
49498 (vfloat32m1_t): Ditto.
49499 (vfloat32m2_t): Ditto.
49500 (vfloat32m4_t): Ditto.
49501 (vfloat32m8_t): Ditto.
49502 (vfloat64m1_t): Ditto.
49503 (vfloat64m4_t): Ditto.
49504 (vector): Move it def.
49507 (signed_vector): Ditto.
49508 (unsigned_vector): Ditto.
49509 (unsigned_scalar): Ditto.
49510 (vector_ptr): Ditto.
49511 (scalar_ptr): Ditto.
49512 (scalar_const_ptr): Ditto.
49516 (unsigned_long): Ditto.
49518 (eew8_index): Ditto.
49519 (eew16_index): Ditto.
49520 (eew32_index): Ditto.
49521 (eew64_index): Ditto.
49522 (shift_vector): Ditto.
49523 (double_trunc_vector): Ditto.
49524 (quad_trunc_vector): Ditto.
49525 (oct_trunc_vector): Ditto.
49526 (double_trunc_scalar): Ditto.
49527 (double_trunc_signed_vector): Ditto.
49528 (double_trunc_unsigned_vector): Ditto.
49529 (double_trunc_unsigned_scalar): Ditto.
49530 (double_trunc_float_vector): Ditto.
49531 (float_vector): Ditto.
49532 (lmul1_vector): Ditto.
49533 (widen_lmul1_vector): Ditto.
49534 (eew8_interpret): Ditto.
49535 (eew16_interpret): Ditto.
49536 (eew32_interpret): Ditto.
49537 (eew64_interpret): Ditto.
49538 (vlmul_ext_x2): Ditto.
49539 (vlmul_ext_x4): Ditto.
49540 (vlmul_ext_x8): Ditto.
49541 (vlmul_ext_x16): Ditto.
49542 (vlmul_ext_x32): Ditto.
49543 (vlmul_ext_x64): Ditto.
49544 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
49545 (struct function_type_info): New function.
49546 (struct rvv_arg_type_info): Ditto.
49547 (class function_checker): New class.
49548 (rvv_arg_type_info::get_scalar_type): New function.
49549 (rvv_arg_type_info::get_vector_type): Ditto.
49550 (function_expander::ret_mode): New function.
49551 (function_checker::arg_mode): Ditto.
49552 (function_checker::ret_mode): Ditto.
49553 * config/riscv/t-riscv: Add generator.
49554 * config/riscv/vector-iterators.md: New iterators.
49555 * config/riscv/vector.md (vundefined<mode>): New pattern.
49556 (@vundefined<mode>): Ditto.
49557 (@vreinterpret<mode>): Ditto.
49558 (@vlmul_extx2<mode>): Ditto.
49559 (@vlmul_extx4<mode>): Ditto.
49560 (@vlmul_extx8<mode>): Ditto.
49561 (@vlmul_extx16<mode>): Ditto.
49562 (@vlmul_extx32<mode>): Ditto.
49563 (@vlmul_extx64<mode>): Ditto.
49564 (*vlmul_extx2<mode>): Ditto.
49565 (*vlmul_extx4<mode>): Ditto.
49566 (*vlmul_extx8<mode>): Ditto.
49567 (*vlmul_extx16<mode>): Ditto.
49568 (*vlmul_extx32<mode>): Ditto.
49569 (*vlmul_extx64<mode>): Ditto.
49570 * config/riscv/genrvv-type-indexer.cc: New file.
49572 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49574 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
49575 (slide1_sew64_helper): New function.
49576 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
49577 (get_unknown_min_value): Ditto.
49578 (force_vector_length_operand): Ditto.
49579 (gen_no_side_effects_vsetvl_rtx): Ditto.
49580 (get_vl_x2_rtx): Ditto.
49581 (slide1_sew64_helper): Ditto.
49582 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
49583 (class vrgather): Ditto.
49584 (class vrgatherei16): Ditto.
49585 (class vcompress): Ditto.
49587 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49588 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
49589 (vslidedown): Ditto.
49590 (vslide1up): Ditto.
49591 (vslide1down): Ditto.
49592 (vfslide1up): Ditto.
49593 (vfslide1down): Ditto.
49595 (vrgatherei16): Ditto.
49596 (vcompress): Ditto.
49597 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
49598 (vint8mf8_t): Ditto.
49599 (vint8mf4_t): Ditto.
49600 (vint8mf2_t): Ditto.
49601 (vint8m1_t): Ditto.
49602 (vint8m2_t): Ditto.
49603 (vint8m4_t): Ditto.
49604 (vint16mf4_t): Ditto.
49605 (vint16mf2_t): Ditto.
49606 (vint16m1_t): Ditto.
49607 (vint16m2_t): Ditto.
49608 (vint16m4_t): Ditto.
49609 (vint16m8_t): Ditto.
49610 (vint32mf2_t): Ditto.
49611 (vint32m1_t): Ditto.
49612 (vint32m2_t): Ditto.
49613 (vint32m4_t): Ditto.
49614 (vint32m8_t): Ditto.
49615 (vint64m1_t): Ditto.
49616 (vint64m2_t): Ditto.
49617 (vint64m4_t): Ditto.
49618 (vint64m8_t): Ditto.
49619 (vuint8mf8_t): Ditto.
49620 (vuint8mf4_t): Ditto.
49621 (vuint8mf2_t): Ditto.
49622 (vuint8m1_t): Ditto.
49623 (vuint8m2_t): Ditto.
49624 (vuint8m4_t): Ditto.
49625 (vuint16mf4_t): Ditto.
49626 (vuint16mf2_t): Ditto.
49627 (vuint16m1_t): Ditto.
49628 (vuint16m2_t): Ditto.
49629 (vuint16m4_t): Ditto.
49630 (vuint16m8_t): Ditto.
49631 (vuint32mf2_t): Ditto.
49632 (vuint32m1_t): Ditto.
49633 (vuint32m2_t): Ditto.
49634 (vuint32m4_t): Ditto.
49635 (vuint32m8_t): Ditto.
49636 (vuint64m1_t): Ditto.
49637 (vuint64m2_t): Ditto.
49638 (vuint64m4_t): Ditto.
49639 (vuint64m8_t): Ditto.
49640 (vfloat32mf2_t): Ditto.
49641 (vfloat32m1_t): Ditto.
49642 (vfloat32m2_t): Ditto.
49643 (vfloat32m4_t): Ditto.
49644 (vfloat32m8_t): Ditto.
49645 (vfloat64m1_t): Ditto.
49646 (vfloat64m2_t): Ditto.
49647 (vfloat64m4_t): Ditto.
49648 (vfloat64m8_t): Ditto.
49649 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
49650 * config/riscv/riscv.md: Adjust RVV instruction types.
49651 * config/riscv/vector-iterators.md (down): New iterator.
49652 (=vd,vr): New attribute.
49653 (UNSPEC_VSLIDE1UP): New unspec.
49654 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
49655 (*pred_slide<ud><mode>): Ditto.
49656 (*pred_slide<ud><mode>_extended): Ditto.
49657 (@pred_gather<mode>): Ditto.
49658 (@pred_gather<mode>_scalar): Ditto.
49659 (@pred_gatherei16<mode>): Ditto.
49660 (@pred_compress<mode>): Ditto.
49662 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49664 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
49666 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49668 * config/riscv/constraints.md (Wb1): New constraint.
49669 * config/riscv/predicates.md
49670 (vector_least_significant_set_mask_operand): New predicate.
49671 (vector_broadcast_mask_operand): Ditto.
49672 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
49673 (gen_scalar_move_mask): New function.
49674 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
49675 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
49676 (class vmv_s): Ditto.
49678 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49679 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
49683 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
49685 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
49686 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
49687 (function_expander::use_exact_insn): New function.
49688 (function_expander::use_contiguous_load_insn): New function.
49689 (function_expander::use_contiguous_store_insn): New function.
49690 (function_expander::use_ternop_insn): New function.
49691 (function_expander::use_widen_ternop_insn): New function.
49692 (function_expander::use_scalar_move_insn): New function.
49693 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
49694 * config/riscv/riscv-vector-builtins.h
49695 (function_expander::add_scalar_move_mask_operand): New class.
49696 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
49697 (scalar_move_insn_p): Ditto.
49698 (has_vsetvl_killed_avl_p): Ditto.
49699 (anticipatable_occurrence_p): Ditto.
49700 (insert_vsetvl): Ditto.
49701 (get_vl_vtype_info): Ditto.
49702 (calculate_sew): Ditto.
49703 (calculate_vlmul): Ditto.
49704 (incompatible_avl_p): Ditto.
49705 (different_sew_p): Ditto.
49706 (different_lmul_p): Ditto.
49707 (different_ratio_p): Ditto.
49708 (different_tail_policy_p): Ditto.
49709 (different_mask_policy_p): Ditto.
49710 (possible_zero_avl_p): Ditto.
49711 (first_ratio_invalid_for_second_sew_p): Ditto.
49712 (first_ratio_invalid_for_second_lmul_p): Ditto.
49713 (second_ratio_invalid_for_first_sew_p): Ditto.
49714 (second_ratio_invalid_for_first_lmul_p): Ditto.
49715 (second_sew_less_than_first_sew_p): Ditto.
49716 (first_sew_less_than_second_sew_p): Ditto.
49717 (compare_lmul): Ditto.
49718 (second_lmul_less_than_first_lmul_p): Ditto.
49719 (first_lmul_less_than_second_lmul_p): Ditto.
49720 (first_ratio_less_than_second_ratio_p): Ditto.
49721 (second_ratio_less_than_first_ratio_p): Ditto.
49722 (DEF_INCOMPATIBLE_COND): Ditto.
49723 (greatest_sew): Ditto.
49724 (first_sew): Ditto.
49725 (second_sew): Ditto.
49726 (first_vlmul): Ditto.
49727 (second_vlmul): Ditto.
49728 (first_ratio): Ditto.
49729 (second_ratio): Ditto.
49730 (vlmul_for_first_sew_second_ratio): Ditto.
49731 (ratio_for_second_sew_first_vlmul): Ditto.
49732 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
49733 (always_unavailable): Ditto.
49734 (avl_unavailable_p): Ditto.
49735 (sew_unavailable_p): Ditto.
49736 (lmul_unavailable_p): Ditto.
49737 (ge_sew_unavailable_p): Ditto.
49738 (ge_sew_lmul_unavailable_p): Ditto.
49739 (ge_sew_ratio_unavailable_p): Ditto.
49740 (DEF_UNAVAILABLE_COND): Ditto.
49741 (same_sew_lmul_demand_p): Ditto.
49742 (propagate_avl_across_demands_p): Ditto.
49743 (reg_available_p): Ditto.
49744 (avl_info::has_non_zero_avl): Ditto.
49745 (vl_vtype_info::has_non_zero_avl): Ditto.
49746 (vector_insn_info::operator>=): Refactor.
49747 (vector_insn_info::parse_insn): Adjust for scalar move.
49748 (vector_insn_info::demand_vl_vtype): Remove.
49749 (vector_insn_info::compatible_p): New function.
49750 (vector_insn_info::compatible_avl_p): Ditto.
49751 (vector_insn_info::compatible_vtype_p): Ditto.
49752 (vector_insn_info::available_p): Ditto.
49753 (vector_insn_info::merge): Ditto.
49754 (vector_insn_info::fuse_avl): Ditto.
49755 (vector_insn_info::fuse_sew_lmul): Ditto.
49756 (vector_insn_info::fuse_tail_policy): Ditto.
49757 (vector_insn_info::fuse_mask_policy): Ditto.
49758 (vector_insn_info::dump): Ditto.
49759 (vector_infos_manager::release): Ditto.
49760 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
49761 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
49762 (pass_vsetvl::hard_empty_block_p): Ditto.
49763 (pass_vsetvl::backward_demand_fusion): Ditto.
49764 (pass_vsetvl::forward_demand_fusion): Ditto.
49765 (pass_vsetvl::refine_vsetvls): Ditto.
49766 (pass_vsetvl::cleanup_vsetvls): Ditto.
49767 (pass_vsetvl::commit_vsetvls): Ditto.
49768 (pass_vsetvl::propagate_avl): Ditto.
49769 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
49770 (struct demands_pair): Ditto.
49771 (struct demands_cond): Ditto.
49772 (struct demands_fuse_rule): Ditto.
49773 * config/riscv/vector-iterators.md: New iterator.
49774 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
49775 (*pred_broadcast<mode>): Ditto.
49776 (*pred_broadcast<mode>_extended_scalar): Ditto.
49777 (@pred_extract_first<mode>): Ditto.
49778 (*pred_extract_first<mode>): Ditto.
49779 (@pred_extract_first_trunc<mode>): Ditto.
49780 * config/riscv/riscv-vsetvl.def: New file.
49782 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
49784 * config/riscv/bitmanip.md: allow 0 constant in max/min
49787 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
49789 * config/riscv/bitmanip.md: Fix wrong index in the check.
49791 2023-03-04 Jakub Jelinek <jakub@redhat.com>
49793 PR middle-end/109006
49794 * vec.cc (test_auto_alias): Adjust comment for removal of
49796 * read-rtl-function.cc (function_reader::parse_block): Likewise.
49797 * gdbhooks.py: Likewise.
49799 2023-03-04 Jakub Jelinek <jakub@redhat.com>
49801 PR testsuite/108973
49802 * selftest-diagnostic.cc
49803 (test_diagnostic_context::test_diagnostic_context): Set
49804 caret_max_width to 80.
49806 2023-03-03 Alexandre Oliva <oliva@adacore.com>
49808 * gimple-ssa-warn-access.cc
49809 (pass_waccess::check_dangling_stores): Skip non-stores.
49811 2023-03-03 Alexandre Oliva <oliva@adacore.com>
49813 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
49814 after vmsr and vmrs, and lower the case of P0.
49816 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
49818 PR middle-end/109006
49819 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
49821 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
49823 PR middle-end/109006
49824 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
49826 2023-03-03 Jakub Jelinek <jakub@redhat.com>
49829 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
49830 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
49831 suppressed on stmt. For [static %E] warning, print access_nelts
49832 rather than access_size. Fix up comment wording.
49834 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
49836 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
49837 arch14 instead of z16.
49839 2023-03-03 Anthony Green <green@moxielogic.com>
49841 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
49843 2023-03-03 Anthony Green <green@moxielogic.com>
49845 * config/moxie/constraints.md (A, B, W): Change
49846 define_constraint to define_memory_constraint.
49848 2023-03-03 Xi Ruoyao <xry111@xry111.site>
49850 * toplev.cc (process_options): Fix the spelling of
49851 "-fstack-clash-protection".
49853 2023-03-03 Richard Biener <rguenther@suse.de>
49855 PR tree-optimization/109002
49856 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
49857 PHI-translate ANTIC_IN.
49859 2023-03-03 Jakub Jelinek <jakub@redhat.com>
49861 PR tree-optimization/108988
49862 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
49863 size_type_node before passing it as argument to fwrite. Formatting
49866 2023-03-03 Richard Biener <rguenther@suse.de>
49869 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
49870 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
49871 * config/i386/i386-features.h (scalar_chain::max_visits): New.
49872 (scalar_chain::build): Add bitmap parameter, return boolean.
49873 (scalar_chain::add_insn): Likewise.
49874 (scalar_chain::analyze_register_chain): Likewise.
49875 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
49876 Initialize max_visits.
49877 (scalar_chain::analyze_register_chain): When we exhaust
49878 max_visits, abort. Also abort when running into any
49880 (scalar_chain::add_insn): Propagate abort.
49881 (scalar_chain::build): Likewise. When aborting amend
49882 the set of disallowed insn with the insns set.
49883 (convert_scalars_to_vector): Adjust. Do not convert aborted
49886 2023-03-03 Richard Biener <rguenther@suse.de>
49889 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
49890 generate a DIE for a function scope static.
49892 2023-03-03 Alexandre Oliva <oliva@adacore.com>
49894 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
49896 2023-03-02 Jakub Jelinek <jakub@redhat.com>
49899 * target.h (emit_support_tinfos_callback): New typedef.
49900 * targhooks.h (default_emit_support_tinfos): Declare.
49901 * targhooks.cc (default_emit_support_tinfos): New function.
49902 * target.def (emit_support_tinfos): New target hook.
49903 * doc/tm.texi.in (emit_support_tinfos): Document it.
49904 * doc/tm.texi: Regenerated.
49905 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
49906 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
49908 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
49910 * ira-costs.cc: Include print-rtl.h.
49911 (record_reg_classes, scan_one_insn): Add code to print debug info.
49912 (record_operand_costs): Find and use smaller cost for hard reg
49915 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
49916 Paul-Antoine Arras <pa@codesourcery.com>
49918 * builtins.cc (mathfn_built_in_explicit): New.
49919 * config/gcn/gcn.cc: Include case-cfn-macros.h.
49920 (mathfn_built_in_explicit): Add prototype.
49921 (gcn_vectorize_builtin_vectorized_function): New.
49922 (gcn_libc_has_function): New.
49923 (TARGET_LIBC_HAS_FUNCTION): Define.
49924 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
49926 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
49928 PR tree-optimization/108979
49929 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
49930 operations on invariants.
49932 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
49934 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
49935 * config/s390/s390.cc (s390_option_override_internal): Make
49936 partial vector usage the default from z13 on.
49937 * config/s390/vector.md (len_load_v16qi): Add.
49938 (len_store_v16qi): Add.
49940 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
49942 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
49943 of constant 0 offset.
49945 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
49947 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
49949 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
49951 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
49953 * config.gcc: add -with-{no-}msa build option.
49954 * config/mips/mips.h: Likewise.
49955 * doc/install.texi: Likewise.
49957 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
49959 PR tree-optimization/108603
49960 * explow.cc (convert_memory_address_addr_space_1): Only wrap
49961 the result of a recursive call in a CONST if no instructions
49964 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
49966 PR tree-optimization/108430
49967 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
49968 of inverted condition.
49970 2023-03-02 Jakub Jelinek <jakub@redhat.com>
49973 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
49974 comparison copy the bytes from ptr to a temporary buffer and clearing
49975 padding bits in there.
49977 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
49979 PR middle-end/108545
49980 * gimplify.cc (struct tree_operand_hash_no_se): New.
49981 (omp_index_mapping_groups_1, omp_index_mapping_groups,
49982 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
49983 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
49984 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
49985 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
49986 of tree_operand_hash.
49988 2023-03-01 LIU Hao <lh_mouse@126.com>
49991 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
49992 Remove the size limit `pch_VA_max_size`
49994 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
49996 PR middle-end/108546
49997 * omp-low.cc (lower_omp_target): Remove optional handling
49998 on the receiver side, i.e. inside target (data), for
50001 2023-03-01 Jakub Jelinek <jakub@redhat.com>
50004 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
50005 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
50007 2023-03-01 Richard Biener <rguenther@suse.de>
50009 PR tree-optimization/108970
50010 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
50011 Check we can copy the BBs.
50012 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
50014 (vect_do_peeling): Streamline error handling.
50016 2023-03-01 Richard Biener <rguenther@suse.de>
50018 PR tree-optimization/108950
50019 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
50020 Check oprnd0 is defined in the loop.
50021 * tree-vect-loop.cc (vectorizable_reduction): Record all
50022 operands vector types, compute that of invariants and
50023 properly update their SLP nodes.
50025 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
50028 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
50029 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
50031 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
50033 PR middle-end/107411
50034 PR middle-end/107411
50035 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
50037 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
50038 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
50040 2023-02-28 Jakub Jelinek <jakub@redhat.com>
50042 PR sanitizer/108894
50043 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
50044 comparison rather than index > bound.
50045 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
50046 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
50047 * doc/invoke.texi (-fsanitize=bounds): Document that whether
50048 flexible array member-like arrays are instrumented or not depends
50049 on -fstrict-flex-arrays* options of strict_flex_array attributes.
50050 (-fsanitize=bounds-strict): Document that flexible array members
50051 are not instrumented.
50053 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
50057 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
50058 (fmod<mode>3): Ditto.
50059 (fpremxf4_i387): Ditto.
50060 (reminderxf3): Ditto.
50061 (reminder<mode>3): Ditto.
50062 (fprem1xf4_i387): Ditto.
50064 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
50066 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
50067 generating FFS with mismatched operand and result modes, by using
50068 an explicit SIGN_EXTEND/ZERO_EXTEND.
50069 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
50070 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
50072 2023-02-27 Patrick Palka <ppalka@redhat.com>
50074 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
50075 * lra-int.h (lra_change_class): Likewise.
50076 * recog.h (which_op_alt): Likewise.
50077 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
50080 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50082 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
50084 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
50086 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
50087 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
50089 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
50091 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
50092 (xtensa_get_config_v3): New functions.
50094 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
50096 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
50098 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
50100 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
50101 the macro to 0x1000000000.
50103 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
50106 * doc/gm2.texi (-fm2-pathname): New option documented.
50107 (-fm2-pathnameI): New option documented.
50108 (-fm2-prefix=): New option documented.
50109 (-fruntime-modules=): Update default module list.
50111 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
50114 * config/xtensa/xtensa-protos.h
50115 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
50116 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
50117 to xtensa_expand_call.
50118 (xtensa_expand_call): Emit the call and add a clobber expression
50119 for the static chain to it in case of windowed ABI.
50120 * config/xtensa/xtensa.md (call, call_value, sibcall)
50121 (sibcall_value): Call xtensa_expand_call and complete expansion
50122 right after that call.
50124 2023-02-24 Richard Biener <rguenther@suse.de>
50126 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
50127 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
50128 changing alignment of vec<T, A, vl_embed> and simplifying
50130 (vec<T, A, vl_embed>::address): Compute as this + 1.
50131 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
50132 vector instead of the offset of the m_vecdata member.
50133 (auto_vec<T, N>::m_data): Turn storage into
50134 uninitialized unsigned char.
50135 (auto_vec<T, N>::auto_vec): Allow allocation of one
50136 stack member. Initialize m_vec in a special way to
50137 avoid later stringop overflow diagnostics.
50138 * vec.cc (test_auto_alias): New.
50139 (vec_cc_tests): Call it.
50141 2023-02-24 Richard Biener <rguenther@suse.de>
50143 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
50144 take a const reference to the object, use address to
50146 (vec<T, A, vl_embed>::contains): Use address to access data.
50147 (vec<T, A, vl_embed>::operator[]): Use address instead of
50148 m_vecdata to access data.
50149 (vec<T, A, vl_embed>::iterate): Likewise.
50150 (vec<T, A, vl_embed>::copy): Likewise.
50151 (vec<T, A, vl_embed>::quick_push): Likewise.
50152 (vec<T, A, vl_embed>::pop): Likewise.
50153 (vec<T, A, vl_embed>::quick_insert): Likewise.
50154 (vec<T, A, vl_embed>::ordered_remove): Likewise.
50155 (vec<T, A, vl_embed>::unordered_remove): Likewise.
50156 (vec<T, A, vl_embed>::block_remove): Likewise.
50157 (vec<T, A, vl_heap>::address): Likewise.
50159 2023-02-24 Martin Liska <mliska@suse.cz>
50161 PR sanitizer/108834
50162 * asan.cc (asan_add_global): Use proper TU name for normal
50163 global variables (and aux_base_name for the artificial one).
50165 2023-02-24 Jakub Jelinek <jakub@redhat.com>
50167 * config/i386/i386-builtin.def: Update description of BDESC
50168 and BDESC_FIRST in file comment to include mask2.
50170 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
50172 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
50174 2023-02-24 Jakub Jelinek <jakub@redhat.com>
50176 PR middle-end/108854
50177 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
50178 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
50179 nodes and adjust their DECL_CONTEXT.
50181 2023-02-24 Jakub Jelinek <jakub@redhat.com>
50184 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
50185 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
50186 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
50187 __builtin_ia32_cvtne2ps2bf16_v8bf,
50188 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
50189 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
50190 __builtin_ia32_cvtneps2bf16_v8sf_mask,
50191 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
50192 __builtin_ia32_cvtneps2bf16_v4sf_mask,
50193 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
50194 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
50195 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
50196 __builtin_ia32_dpbf16ps_v4sf_mask,
50197 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
50198 OPTION_MASK_ISA_AVX512VL.
50200 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
50202 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
50203 Add non-compact 32-bit multilibs.
50205 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
50207 * config/mips/mips.md (*clo<mode>2): New pattern.
50209 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
50211 * config/mips/mips.h (machine_function): New variable
50212 use_hazard_barrier_return_p.
50213 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
50214 (mips_hb_return_internal): New insn pattern.
50215 * config/mips/mips.cc (mips_attribute_table): Add attribute
50216 use_hazard_barrier_return.
50217 (mips_use_hazard_barrier_return_p): New static function.
50218 (mips_function_attr_inlinable_p): Likewise.
50219 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
50220 Emit error for unsupported architecture choice.
50221 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
50222 Return false for use_hazard_barrier_return.
50223 (mips_expand_epilogue): Emit hazard barrier return.
50224 * doc/extend.texi: Document use_hazard_barrier_return.
50226 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
50228 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
50229 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
50230 for the gcc-internal headers.
50232 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
50234 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
50235 and $(POSTCOMPILE) instead of manual dependency listing.
50236 * config/xtensa/xtensa-dynconfig.c: Rename to ...
50237 * config/xtensa/xtensa-dynconfig.cc: ... this.
50239 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
50241 * doc/cfg.texi: Reorder index entries around @items.
50242 * doc/cpp.texi: Ditto.
50243 * doc/cppenv.texi: Ditto.
50244 * doc/cppopts.texi: Ditto.
50245 * doc/generic.texi: Ditto.
50246 * doc/install.texi: Ditto.
50247 * doc/extend.texi: Ditto.
50248 * doc/invoke.texi: Ditto.
50249 * doc/md.texi: Ditto.
50250 * doc/rtl.texi: Ditto.
50251 * doc/tm.texi.in: Ditto.
50252 * doc/trouble.texi: Ditto.
50253 * doc/tm.texi: Regenerate.
50255 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50257 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
50258 the occurrence of general-purpose register used only once and for
50259 transferring intermediate value.
50261 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50263 * config/xtensa/xtensa.cc (machine_function): Add new member
50264 'eliminated_callee_saved_bmp'.
50265 (xtensa_can_eliminate_callee_saved_reg_p): New function to
50266 determine whether the register can be eliminated or not.
50267 (xtensa_expand_prologue): Add invoking the above function and
50268 elimination the use of callee-saved register by using its stack
50269 slot through the stack pointer (or the frame pointer if needed)
50271 (xtensa_expand_prologue): Modify to not emit register restoration
50272 insn from its stack slot if the register is already eliminated.
50274 2023-02-23 Jakub Jelinek <jakub@redhat.com>
50276 PR translation/108890
50277 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
50278 around fatal_error format strings.
50280 2023-02-23 Richard Biener <rguenther@suse.de>
50282 * tree-ssa-structalias.cc (handle_lhs_call): Do not
50283 re-create rhsc, only truncate it.
50285 2023-02-23 Jakub Jelinek <jakub@redhat.com>
50287 PR middle-end/106258
50288 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
50289 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
50291 2023-02-23 Richard Biener <rguenther@suse.de>
50293 * tree-if-conv.cc (tree_if_conversion): Properly manage
50294 memory of refs and the contained data references.
50296 2023-02-23 Richard Biener <rguenther@suse.de>
50298 PR tree-optimization/108888
50299 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
50300 calls to predicate.
50301 (predicate_statements): Only predicate calls with PLF_2.
50303 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50305 * config/xtensa/xtensa.md
50306 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
50307 Add missing "SI:" to PLUS RTXes.
50309 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
50312 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
50313 Emit (use (reg:SI A0_REG)) at the end in the sibling call
50314 (i.e. the same place as (return) in the normal call).
50316 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
50319 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
50322 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
50324 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
50325 (sibcall_value, sibcall_value_internal): Add 'use' expression
50328 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
50330 * doc/cppdiropts.texi: Reorder @opindex commands to precede
50331 @items they relate to.
50332 * doc/cppopts.texi: Ditto.
50333 * doc/cppwarnopts.texi: Ditto.
50334 * doc/invoke.texi: Ditto.
50335 * doc/lto.texi: Ditto.
50337 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
50339 * internal-fn.cc (expand_MASK_CALL): New.
50340 * internal-fn.def (MASK_CALL): New.
50341 * internal-fn.h (expand_MASK_CALL): New prototype.
50342 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
50343 for mask arguments also.
50344 * tree-if-conv.cc: Include cgraph.h.
50345 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
50346 (predicate_statements): Convert functions to IFN_MASK_CALL.
50347 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
50348 IFN_MASK_CALL as a SIMD function call.
50349 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
50350 IFN_MASK_CALL as an inbranch SIMD function call.
50351 Generate the mask vector arguments.
50353 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50355 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
50356 (class widen_reducop): Ditto.
50357 (class freducop): Ditto.
50358 (class widen_freducop): Ditto.
50360 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
50361 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
50370 (vwredsumu): Ditto.
50371 (vfredusum): Ditto.
50372 (vfredosum): Ditto.
50375 (vfwredosum): Ditto.
50376 (vfwredusum): Ditto.
50377 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
50379 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
50380 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
50381 (DEF_RVV_WU_OPS): Ditto.
50382 (DEF_RVV_WF_OPS): Ditto.
50383 (vint8mf8_t): Ditto.
50384 (vint8mf4_t): Ditto.
50385 (vint8mf2_t): Ditto.
50386 (vint8m1_t): Ditto.
50387 (vint8m2_t): Ditto.
50388 (vint8m4_t): Ditto.
50389 (vint8m8_t): Ditto.
50390 (vint16mf4_t): Ditto.
50391 (vint16mf2_t): Ditto.
50392 (vint16m1_t): Ditto.
50393 (vint16m2_t): Ditto.
50394 (vint16m4_t): Ditto.
50395 (vint16m8_t): Ditto.
50396 (vint32mf2_t): Ditto.
50397 (vint32m1_t): Ditto.
50398 (vint32m2_t): Ditto.
50399 (vint32m4_t): Ditto.
50400 (vint32m8_t): Ditto.
50401 (vuint8mf8_t): Ditto.
50402 (vuint8mf4_t): Ditto.
50403 (vuint8mf2_t): Ditto.
50404 (vuint8m1_t): Ditto.
50405 (vuint8m2_t): Ditto.
50406 (vuint8m4_t): Ditto.
50407 (vuint8m8_t): Ditto.
50408 (vuint16mf4_t): Ditto.
50409 (vuint16mf2_t): Ditto.
50410 (vuint16m1_t): Ditto.
50411 (vuint16m2_t): Ditto.
50412 (vuint16m4_t): Ditto.
50413 (vuint16m8_t): Ditto.
50414 (vuint32mf2_t): Ditto.
50415 (vuint32m1_t): Ditto.
50416 (vuint32m2_t): Ditto.
50417 (vuint32m4_t): Ditto.
50418 (vuint32m8_t): Ditto.
50419 (vfloat32mf2_t): Ditto.
50420 (vfloat32m1_t): Ditto.
50421 (vfloat32m2_t): Ditto.
50422 (vfloat32m4_t): Ditto.
50423 (vfloat32m8_t): Ditto.
50424 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
50425 (DEF_RVV_WU_OPS): Ditto.
50426 (DEF_RVV_WF_OPS): Ditto.
50427 (required_extensions_p): Add reduction support.
50428 (rvv_arg_type_info::get_base_vector_type): Ditto.
50429 (rvv_arg_type_info::get_tree_type): Ditto.
50430 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
50431 * config/riscv/riscv.md: Ditto.
50432 * config/riscv/vector-iterators.md (minu): Ditto.
50433 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
50434 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
50435 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
50436 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
50437 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
50438 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
50439 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
50441 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50443 * config/riscv/iterators.md: New iterator.
50444 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
50445 (enum ternop_type): New enum.
50446 (class vmacc): New class.
50447 (class imac): Ditto.
50448 (class vnmsac): Ditto.
50449 (enum widen_ternop_type): New enum.
50450 (class vmadd): Ditto.
50451 (class vnmsub): Ditto.
50452 (class iwmac): Ditto.
50453 (class vwmacc): Ditto.
50454 (class vwmaccu): Ditto.
50455 (class vwmaccsu): Ditto.
50456 (class vwmaccus): Ditto.
50457 (class reverse_binop): Ditto.
50458 (class vfmacc): Ditto.
50459 (class vfnmsac): Ditto.
50460 (class vfmadd): Ditto.
50461 (class vfnmsub): Ditto.
50462 (class vfnmacc): Ditto.
50463 (class vfmsac): Ditto.
50464 (class vfnmadd): Ditto.
50465 (class vfmsub): Ditto.
50466 (class vfwmacc): Ditto.
50467 (class vfwnmacc): Ditto.
50468 (class vfwmsac): Ditto.
50469 (class vfwnmsac): Ditto.
50470 (class float_misc): Ditto.
50471 (class fcmp): Ditto.
50472 (class vfclass): Ditto.
50473 (class vfcvt_x): Ditto.
50474 (class vfcvt_rtz_x): Ditto.
50475 (class vfcvt_f): Ditto.
50476 (class vfwcvt_x): Ditto.
50477 (class vfwcvt_rtz_x): Ditto.
50478 (class vfwcvt_f): Ditto.
50479 (class vfncvt_x): Ditto.
50480 (class vfncvt_rtz_x): Ditto.
50481 (class vfncvt_f): Ditto.
50482 (class vfncvt_rod_f): Ditto.
50484 * config/riscv/riscv-vector-builtins-bases.h:
50485 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
50529 (vfcvt_rtz_x): Ditto.
50530 (vfcvt_rtz_xu): Ditto.
50533 (vfwcvt_xu): Ditto.
50534 (vfwcvt_rtz_x): Ditto.
50535 (vfwcvt_rtz_xu): Ditto.
50538 (vfncvt_xu): Ditto.
50539 (vfncvt_rtz_x): Ditto.
50540 (vfncvt_rtz_xu): Ditto.
50542 (vfncvt_rod_f): Ditto.
50543 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
50544 (struct move_def): Ditto.
50545 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
50546 (DEF_RVV_CONVERT_I_OPS): Ditto.
50547 (DEF_RVV_CONVERT_U_OPS): Ditto.
50548 (DEF_RVV_WCONVERT_I_OPS): Ditto.
50549 (DEF_RVV_WCONVERT_U_OPS): Ditto.
50550 (DEF_RVV_WCONVERT_F_OPS): Ditto.
50551 (vfloat64m1_t): Ditto.
50552 (vfloat64m2_t): Ditto.
50553 (vfloat64m4_t): Ditto.
50554 (vfloat64m8_t): Ditto.
50555 (vint32mf2_t): Ditto.
50556 (vint32m1_t): Ditto.
50557 (vint32m2_t): Ditto.
50558 (vint32m4_t): Ditto.
50559 (vint32m8_t): Ditto.
50560 (vint64m1_t): Ditto.
50561 (vint64m2_t): Ditto.
50562 (vint64m4_t): Ditto.
50563 (vint64m8_t): Ditto.
50564 (vuint32mf2_t): Ditto.
50565 (vuint32m1_t): Ditto.
50566 (vuint32m2_t): Ditto.
50567 (vuint32m4_t): Ditto.
50568 (vuint32m8_t): Ditto.
50569 (vuint64m1_t): Ditto.
50570 (vuint64m2_t): Ditto.
50571 (vuint64m4_t): Ditto.
50572 (vuint64m8_t): Ditto.
50573 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
50574 (DEF_RVV_CONVERT_U_OPS): Ditto.
50575 (DEF_RVV_WCONVERT_I_OPS): Ditto.
50576 (DEF_RVV_WCONVERT_U_OPS): Ditto.
50577 (DEF_RVV_WCONVERT_F_OPS): Ditto.
50578 (DEF_RVV_F_OPS): Ditto.
50579 (DEF_RVV_WEXTF_OPS): Ditto.
50580 (required_extensions_p): Adjust for floating-point support.
50581 (check_required_extensions): Ditto.
50582 (unsigned_base_type_p): Ditto.
50583 (get_mode_for_bitsize): Ditto.
50584 (rvv_arg_type_info::get_base_vector_type): Ditto.
50585 (rvv_arg_type_info::get_tree_type): Ditto.
50586 * config/riscv/riscv-vector-builtins.def (v_f): New define.
50589 (xu_v): New define.
50591 (xu_w): New define.
50592 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
50593 (function_expander::arg_mode): New function.
50594 * config/riscv/vector-iterators.md (sof): New iterator.
50600 (fixuns_trunc): Ditto.
50602 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
50603 (@pred_<optab><mode>): Ditto.
50604 (@pred_<optab><mode>_scalar): Ditto.
50605 (@pred_<optab><mode>_reverse_scalar): Ditto.
50606 (@pred_<copysign><mode>): Ditto.
50607 (@pred_<copysign><mode>_scalar): Ditto.
50608 (@pred_mul_<optab><mode>): Ditto.
50609 (pred_mul_<optab><mode>_undef_merge): Ditto.
50610 (*pred_<madd_nmsub><mode>): Ditto.
50611 (*pred_<macc_nmsac><mode>): Ditto.
50612 (*pred_mul_<optab><mode>): Ditto.
50613 (@pred_mul_<optab><mode>_scalar): Ditto.
50614 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
50615 (*pred_<madd_nmsub><mode>_scalar): Ditto.
50616 (*pred_<macc_nmsac><mode>_scalar): Ditto.
50617 (*pred_mul_<optab><mode>_scalar): Ditto.
50618 (@pred_neg_mul_<optab><mode>): Ditto.
50619 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
50620 (*pred_<nmadd_msub><mode>): Ditto.
50621 (*pred_<nmacc_msac><mode>): Ditto.
50622 (*pred_neg_mul_<optab><mode>): Ditto.
50623 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
50624 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
50625 (*pred_<nmadd_msub><mode>_scalar): Ditto.
50626 (*pred_<nmacc_msac><mode>_scalar): Ditto.
50627 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
50628 (@pred_<misc_op><mode>): Ditto.
50629 (@pred_class<mode>): Ditto.
50630 (@pred_dual_widen_<optab><mode>): Ditto.
50631 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
50632 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
50633 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
50634 (@pred_widen_mul_<optab><mode>): Ditto.
50635 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
50636 (@pred_widen_neg_mul_<optab><mode>): Ditto.
50637 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
50638 (@pred_cmp<mode>): Ditto.
50639 (*pred_cmp<mode>): Ditto.
50640 (*pred_cmp<mode>_narrow): Ditto.
50641 (@pred_cmp<mode>_scalar): Ditto.
50642 (*pred_cmp<mode>_scalar): Ditto.
50643 (*pred_cmp<mode>_scalar_narrow): Ditto.
50644 (@pred_eqne<mode>_scalar): Ditto.
50645 (*pred_eqne<mode>_scalar): Ditto.
50646 (*pred_eqne<mode>_scalar_narrow): Ditto.
50647 (@pred_merge<mode>_scalar): Ditto.
50648 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
50649 (@pred_<fix_cvt><mode>): Ditto.
50650 (@pred_<float_cvt><mode>): Ditto.
50651 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
50652 (@pred_widen_<fix_cvt><mode>): Ditto.
50653 (@pred_widen_<float_cvt><mode>): Ditto.
50654 (@pred_extend<mode>): Ditto.
50655 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
50656 (@pred_narrow_<fix_cvt><mode>): Ditto.
50657 (@pred_narrow_<float_cvt><mode>): Ditto.
50658 (@pred_trunc<mode>): Ditto.
50659 (@pred_rod_trunc<mode>): Ditto.
50661 2023-02-22 Jakub Jelinek <jakub@redhat.com>
50663 PR middle-end/106258
50664 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
50665 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
50666 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
50667 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
50669 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
50671 * common.opt (-Wcomplain-wrong-lang): New.
50672 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
50673 * opts-common.cc (prune_options): Handle it.
50674 * opts-global.cc (complain_wrong_lang): Use it.
50676 2023-02-21 David Malcolm <dmalcolm@redhat.com>
50679 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
50681 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
50684 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
50686 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
50687 (sibcall_value, sibcall_value_internal): Add 'use' expression
50690 2023-02-21 Richard Biener <rguenther@suse.de>
50692 PR tree-optimization/108691
50693 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
50694 assert about calls_setjmp not becoming true when it was false.
50696 2023-02-21 Richard Biener <rguenther@suse.de>
50698 PR tree-optimization/108793
50699 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
50700 Use convert operands to niter_type when computing num.
50702 2023-02-21 Richard Biener <rguenther@suse.de>
50705 2023-02-13 Richard Biener <rguenther@suse.de>
50707 PR tree-optimization/108691
50708 * tree-cfg.cc (notice_special_calls): When the CFG is built
50709 honor gimple_call_ctrl_altering_p.
50710 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
50711 temporarily if the call is not control-altering.
50712 * calls.cc (emit_call_1): Do not add REG_SETJMP if
50713 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
50715 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50717 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
50718 true if register A0 (return address register) when -Og is specified.
50720 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
50722 * config/i386/predicates.md
50723 (general_x64constmem_operand): New predicate.
50724 * config/i386/i386.md (*cmpqi_ext<mode>_1):
50725 Use nonimm_x64constmem_operand.
50726 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
50727 (*addqi_ext<mode>_1): Ditto.
50728 (*testqi_ext<mode>_1): Ditto.
50729 (*andqi_ext<mode>_1): Ditto.
50730 (*andqi_ext<mode>_1_cc): Ditto.
50731 (*<any_or:code>qi_ext<mode>_1): Ditto.
50732 (*xorqi_ext<mode>_1_cc): Ditto.
50734 2023-02-20 Jakub Jelinek <jakub2redhat.com>
50737 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
50738 gen_umadddi4_highpart{,_le}.
50740 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
50742 * config/riscv/riscv.md (prefetch): Use r instead of p for the
50744 (riscv_prefetchi_<mode>): Ditto.
50746 2023-02-20 Richard Biener <rguenther@suse.de>
50748 PR tree-optimization/108816
50749 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
50750 versioning condition split prerequesite, assert required
50753 2023-02-20 Richard Biener <rguenther@suse.de>
50755 PR tree-optimization/108825
50756 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
50757 loop-local verfication only verify there's no pending SSA
50760 2023-02-20 Richard Biener <rguenther@suse.de>
50762 PR tree-optimization/108819
50763 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
50764 we have an SSA name as iv_2 as expected.
50766 2023-02-18 Jakub Jelinek <jakub@redhat.com>
50768 PR tree-optimization/108819
50769 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
50771 2023-02-18 Jakub Jelinek <jakub@redhat.com>
50774 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
50775 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
50777 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
50778 with ix86_replace_reg_with_reg.
50780 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
50782 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
50784 2023-02-18 Xi Ruoyao <xry111@xry111.site>
50786 * config.gcc (triplet_abi): Set its value based on $with_abi,
50787 instead of $target.
50788 (la_canonical_triplet): Set it after $triplet_abi is set
50790 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
50791 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
50794 2023-02-18 Andrew Pinski <apinski@marvell.com>
50796 * match.pd: Remove #if GIMPLE around the
50799 2023-02-18 Andrew Pinski <apinski@marvell.com>
50801 * value-query.h (get_range_query): Return the global ranges
50802 for a nullptr func.
50804 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
50806 * doc/invoke.texi (@item -Wall): Fix typo in
50809 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
50812 * config/i386/predicates.md
50813 (nonimm_x64constmem_operand): New predicate.
50814 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
50815 (*subqi_ext<mode>_0): Ditto.
50816 (*andqi_ext<mode>_0): Ditto.
50817 (*<any_or:code>qi_ext<mode>_0): Ditto.
50819 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
50822 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
50823 int_outermode instead of GET_MODE (tem) to prevent
50824 VOIDmode from entering simplify_gen_subreg.
50826 2023-02-17 Richard Biener <rguenther@suse.de>
50828 PR tree-optimization/108821
50829 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
50830 move volatile accesses.
50832 2023-02-17 Richard Biener <rguenther@suse.de>
50834 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
50835 called on virtual operands.
50836 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
50837 ssa_undefined_value_p calls.
50838 (vn_phi_insert): Likewise.
50839 (set_ssa_val_to): Likewise.
50840 (visit_phi): Avoid extra work with equivalences for
50841 virtual operand PHIs.
50843 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50845 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
50847 (class mask_nlogic): Ditto.
50848 (class mask_notlogic): Ditto.
50849 (class vmmv): Ditto.
50850 (class vmclr): Ditto.
50851 (class vmset): Ditto.
50852 (class vmnot): Ditto.
50853 (class vcpop): Ditto.
50854 (class vfirst): Ditto.
50855 (class mask_misc): Ditto.
50856 (class viota): Ditto.
50857 (class vid): Ditto.
50859 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
50860 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
50879 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
50880 (struct mask_alu_def): Ditto.
50882 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
50883 * config/riscv/riscv-vector-builtins.cc: Ditto.
50884 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
50885 for dest it scalar RVV intrinsics.
50886 * config/riscv/vector-iterators.md (sof): New iterator.
50887 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
50888 (@pred_<optab>not<mode>): New pattern.
50889 (@pred_popcount<VB:mode><P:mode>): New pattern.
50890 (@pred_ffs<VB:mode><P:mode>): New pattern.
50891 (@pred_<misc_op><mode>): New pattern.
50892 (@pred_iota<mode>): New pattern.
50893 (@pred_series<mode>): New pattern.
50895 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50897 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
50901 * config/riscv/riscv-vector-builtins.cc: Ditto.
50903 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50904 kito-cheng <kito.cheng@sifive.com>
50906 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
50907 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
50908 (sew64_scalar_helper): New function.
50909 * config/riscv/vector.md: Normalization.
50911 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50913 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
50975 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50977 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
50978 (@pred_<optab><mode>_scalar): Ditto.
50979 (*pred_<optab><mode>_scalar): Ditto.
50980 (*pred_<optab><mode>_extended_scalar): Ditto.
50982 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50984 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
50985 (init_builtins): Ditto.
50986 (mangle_builtin_type): Ditto.
50987 (verify_type_context): Ditto.
50988 (handle_pragma_vector): Ditto.
50989 (builtin_decl): Ditto.
50990 (expand_builtin): Ditto.
50991 (const_vec_all_same_in_range_p): Ditto.
50992 (legitimize_move): Ditto.
50993 (emit_vlmax_op): Ditto.
50994 (emit_nonvlmax_op): Ditto.
50995 (get_vlmul): Ditto.
50996 (get_ratio): Ditto.
50999 (get_avl_type): Ditto.
51000 (calculate_ratio): Ditto.
51001 (enum vlmul_type): Ditto.
51003 (neg_simm5_p): Ditto.
51004 (has_vi_variant_p): Ditto.
51006 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51008 * config/riscv/riscv-protos.h (simm32_p): Remove.
51009 * config/riscv/riscv-v.cc (simm32_p): Ditto.
51010 * config/riscv/vector.md: Use immediate_operand
51011 instead of riscv_vector::simm32_p.
51013 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
51015 * doc/invoke.texi (Optimize Options): Reword the explanation
51016 getting minimal, maximal and default values of a parameter.
51018 2023-02-16 Patrick Palka <ppalka@redhat.com>
51020 * addresses.h: Mechanically drop 'static' from 'static inline'
51021 functions via s/^static inline/inline/g.
51022 * asan.h: Likewise.
51023 * attribs.h: Likewise.
51024 * basic-block.h: Likewise.
51025 * bitmap.h: Likewise.
51026 * cfghooks.h: Likewise.
51027 * cfgloop.h: Likewise.
51028 * cgraph.h: Likewise.
51029 * cselib.h: Likewise.
51030 * data-streamer.h: Likewise.
51031 * debug.h: Likewise.
51033 * diagnostic.h: Likewise.
51034 * dominance.h: Likewise.
51035 * dumpfile.h: Likewise.
51036 * emit-rtl.h: Likewise.
51037 * except.h: Likewise.
51038 * expmed.h: Likewise.
51039 * expr.h: Likewise.
51040 * fixed-value.h: Likewise.
51041 * gengtype.h: Likewise.
51042 * gimple-expr.h: Likewise.
51043 * gimple-iterator.h: Likewise.
51044 * gimple-predict.h: Likewise.
51045 * gimple-range-fold.h: Likewise.
51046 * gimple-ssa.h: Likewise.
51047 * gimple.h: Likewise.
51048 * graphite.h: Likewise.
51049 * hard-reg-set.h: Likewise.
51050 * hash-map.h: Likewise.
51051 * hash-set.h: Likewise.
51052 * hash-table.h: Likewise.
51053 * hwint.h: Likewise.
51054 * input.h: Likewise.
51055 * insn-addr.h: Likewise.
51056 * internal-fn.h: Likewise.
51057 * ipa-fnsummary.h: Likewise.
51058 * ipa-icf-gimple.h: Likewise.
51059 * ipa-inline.h: Likewise.
51060 * ipa-modref.h: Likewise.
51061 * ipa-prop.h: Likewise.
51062 * ira-int.h: Likewise.
51064 * lra-int.h: Likewise.
51066 * lto-streamer.h: Likewise.
51067 * memmodel.h: Likewise.
51068 * omp-general.h: Likewise.
51069 * optabs-query.h: Likewise.
51070 * optabs.h: Likewise.
51071 * plugin.h: Likewise.
51072 * pretty-print.h: Likewise.
51073 * range.h: Likewise.
51074 * read-md.h: Likewise.
51075 * recog.h: Likewise.
51076 * regs.h: Likewise.
51077 * rtl-iter.h: Likewise.
51079 * sbitmap.h: Likewise.
51080 * sched-int.h: Likewise.
51081 * sel-sched-ir.h: Likewise.
51082 * sese.h: Likewise.
51083 * sparseset.h: Likewise.
51084 * ssa-iterators.h: Likewise.
51085 * system.h: Likewise.
51086 * target-globals.h: Likewise.
51087 * target.h: Likewise.
51088 * timevar.h: Likewise.
51089 * tree-chrec.h: Likewise.
51090 * tree-data-ref.h: Likewise.
51091 * tree-iterator.h: Likewise.
51092 * tree-outof-ssa.h: Likewise.
51093 * tree-phinodes.h: Likewise.
51094 * tree-scalar-evolution.h: Likewise.
51095 * tree-sra.h: Likewise.
51096 * tree-ssa-alias.h: Likewise.
51097 * tree-ssa-live.h: Likewise.
51098 * tree-ssa-loop-manip.h: Likewise.
51099 * tree-ssa-loop.h: Likewise.
51100 * tree-ssa-operands.h: Likewise.
51101 * tree-ssa-propagate.h: Likewise.
51102 * tree-ssa-sccvn.h: Likewise.
51103 * tree-ssa.h: Likewise.
51104 * tree-ssanames.h: Likewise.
51105 * tree-streamer.h: Likewise.
51106 * tree-switch-conversion.h: Likewise.
51107 * tree-vectorizer.h: Likewise.
51108 * tree.h: Likewise.
51109 * wide-int.h: Likewise.
51111 2023-02-16 Jakub Jelinek <jakub@redhat.com>
51113 PR tree-optimization/108657
51114 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
51115 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
51116 is a call to internal or builtin function.
51118 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
51120 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
51121 using-declaration to unhide functions.
51123 2023-02-16 Jakub Jelinek <jakub@redhat.com>
51125 PR tree-optimization/108783
51126 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
51127 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
51128 t to curr->op. Otherwise, punt if either newop1 or newop2 are
51129 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
51131 2023-02-16 Richard Biener <rguenther@suse.de>
51133 PR tree-optimization/108791
51134 * tree-ssa-forwprop.cc (optimize_vector_load): Build
51135 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
51138 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
51141 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
51142 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
51143 (ix86_expand_prologue): Likewise.
51145 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
51147 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
51149 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
51151 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
51152 int248_register_operand predicate in zero_extract sub-RTX.
51153 (*cmpqi_ext<mode>_2): Ditto.
51154 (*cmpqi_ext<mode>_3): Ditto.
51155 (*cmpqi_ext<mode>_4): Ditto.
51156 (*extzvqi_mem_rex64): Ditto.
51158 (*insvqi_1_mem_rex64): Ditto.
51159 (@insv<mode>_1): Ditto.
51160 (*insvqi_1): Ditto.
51161 (*insvqi_2): Ditto.
51162 (*insvqi_3): Ditto.
51163 (*extendqi<SWI24:mode>_ext_1): Ditto.
51164 (*addqi_ext<mode>_1): Ditto.
51165 (*addqi_ext<mode>_2): Ditto.
51166 (*subqi_ext<mode>_2): Ditto.
51167 (*testqi_ext<mode>_1): Ditto.
51168 (*testqi_ext<mode>_2): Ditto.
51169 (*andqi_ext<mode>_1): Ditto.
51170 (*andqi_ext<mode>_1_cc): Ditto.
51171 (*andqi_ext<mode>_2): Ditto.
51172 (*<any_or:code>qi_ext<mode>_1): Ditto.
51173 (*<any_or:code>qi_ext<mode>_2): Ditto.
51174 (*xorqi_ext<mode>_1_cc): Ditto.
51175 (*negqi_ext<mode>_2): Ditto.
51176 (*ashlqi_ext<mode>_2): Ditto.
51177 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
51179 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
51181 * config/i386/predicates.md (int248_register_operand):
51182 Rename from extr_register_operand.
51183 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
51184 (*extzx<mode>): Ditto.
51185 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
51186 (*ashl<mode>3_mask): Ditto.
51187 (*<any_shiftrt:insn><mode>3_mask): Ditto.
51188 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
51189 (*<any_rotate:insn><mode>3_mask): Ditto.
51190 (*<btsc><mode>_mask): Ditto.
51191 (*btr<mode>_mask): Ditto.
51192 (*jcc_bt<mode>_mask_1): Ditto.
51194 2023-02-15 Richard Biener <rguenther@suse.de>
51196 PR middle-end/26854
51197 * df-core.cc (df_worklist_propagate_forward): Put later
51198 blocks on worklist and only earlier blocks on pending.
51199 (df_worklist_propagate_backward): Likewise.
51200 (df_worklist_dataflow_doublequeue): Change the iteration
51201 to process new blocks in the same iteration if that
51202 maintains the iteration order.
51204 2023-02-15 Marek Polacek <polacek@redhat.com>
51206 PR middle-end/106080
51207 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
51210 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51212 * config/riscv/predicates.md: Refine codes.
51213 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
51214 * config/riscv/riscv-v.cc: Refine codes.
51215 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
51217 (class imac): New class.
51218 (enum widen_ternop_type): New enum.
51219 (class iwmac): New class.
51221 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51222 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
51230 * config/riscv/riscv-vector-builtins.cc
51231 (function_builder::apply_predication): Adjust for multiply-add support.
51232 (function_expander::add_vundef_operand): Refine codes.
51233 (function_expander::use_ternop_insn): New function.
51234 (function_expander::use_widen_ternop_insn): Ditto.
51235 * config/riscv/riscv-vector-builtins.h: New function.
51236 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
51237 (pred_mul_<optab><mode>_undef_merge): Ditto.
51238 (*pred_<madd_nmsub><mode>): Ditto.
51239 (*pred_<macc_nmsac><mode>): Ditto.
51240 (*pred_mul_<optab><mode>): Ditto.
51241 (@pred_mul_<optab><mode>_scalar): Ditto.
51242 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
51243 (*pred_<madd_nmsub><mode>_scalar): Ditto.
51244 (*pred_<macc_nmsac><mode>_scalar): Ditto.
51245 (*pred_mul_<optab><mode>_scalar): Ditto.
51246 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
51247 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
51248 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
51249 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
51250 (@pred_widen_mul_plus<su><mode>): Ditto.
51251 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
51252 (@pred_widen_mul_plussu<mode>): Ditto.
51253 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
51254 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
51256 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51258 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
51259 (vector_all_trues_mask_operand): New predicate.
51260 (vector_undef_operand): New predicate.
51261 (ltge_operator): New predicate.
51262 (comparison_except_ltge_operator): New predicate.
51263 (comparison_except_eqge_operator): New predicate.
51264 (ge_operator): New predicate.
51265 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
51266 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
51268 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51269 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
51279 * config/riscv/riscv-vector-builtins-shapes.cc
51280 (struct return_mask_def): Adjust for compare support.
51281 * config/riscv/riscv-vector-builtins.cc
51282 (function_expander::use_compare_insn): New function.
51283 * config/riscv/riscv-vector-builtins.h
51284 (function_expander::add_integer_operand): Ditto.
51285 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
51286 * config/riscv/riscv.md: Add vector min/max attributes.
51287 * config/riscv/vector-iterators.md (xnor): New iterator.
51288 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
51289 (*pred_cmp<mode>): Ditto.
51290 (*pred_cmp<mode>_narrow): Ditto.
51291 (@pred_ltge<mode>): Ditto.
51292 (*pred_ltge<mode>): Ditto.
51293 (*pred_ltge<mode>_narrow): Ditto.
51294 (@pred_cmp<mode>_scalar): Ditto.
51295 (*pred_cmp<mode>_scalar): Ditto.
51296 (*pred_cmp<mode>_scalar_narrow): Ditto.
51297 (@pred_eqne<mode>_scalar): Ditto.
51298 (*pred_eqne<mode>_scalar): Ditto.
51299 (*pred_eqne<mode>_scalar_narrow): Ditto.
51300 (*pred_cmp<mode>_extended_scalar): Ditto.
51301 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
51302 (*pred_eqne<mode>_extended_scalar): Ditto.
51303 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
51304 (@pred_ge<mode>_scalar): Ditto.
51305 (@pred_<optab><mode>): Ditto.
51306 (@pred_n<optab><mode>): Ditto.
51307 (@pred_<optab>n<mode>): Ditto.
51308 (@pred_not<mode>): Ditto.
51310 2023-02-15 Martin Jambor <mjambor@suse.cz>
51313 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
51314 creation of non-scalar replacements even if IPA-CP knows their
51317 2023-02-15 Jakub Jelinek <jakub@redhat.com>
51321 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
51322 expander, change operand 3 to be TImode, emit maddlddi4 and
51323 umadddi4_highpart{,_le} with its low half and finally add the high
51324 half to the result.
51326 2023-02-15 Martin Liska <mliska@suse.cz>
51328 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
51330 2023-02-15 Richard Biener <rguenther@suse.de>
51332 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
51333 for with_poison and alias worklist to it.
51334 (sanitize_asan_mark_poison): Likewise.
51336 2023-02-15 Richard Biener <rguenther@suse.de>
51339 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
51340 Combine bitmap test and set.
51341 (scalar_chain::add_insn): Likewise.
51342 (scalar_chain::analyze_register_chain): Remove redundant
51343 attempt to add to queue and instead strengthen assert.
51344 Sink common attempts to mark the def dual-mode.
51345 (scalar_chain::add_to_queue): Remove redundant insn bitmap
51348 2023-02-15 Richard Biener <rguenther@suse.de>
51351 * config/i386/i386-features.cc (convert_scalars_to_vector):
51352 Switch candidates bitmaps to tree view before building the chains.
51354 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
51356 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
51357 "failure trying to reload" call.
51359 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
51361 * gdbinit.in (phrs): New command.
51362 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
51363 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
51365 2023-02-14 David Faust <david.faust@oracle.com>
51368 * config/bpf/constraints.md (q): New memory constraint.
51369 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
51370 (zero_extendqidi2): Likewise.
51371 (zero_extendsidi2): Likewise.
51372 (*mov<MM:mode>): Likewise.
51374 2023-02-14 Andrew Pinski <apinski@marvell.com>
51376 PR tree-optimization/108355
51377 PR tree-optimization/96921
51378 * match.pd: Add pattern for "1 - bool_val".
51380 2023-02-14 Richard Biener <rguenther@suse.de>
51382 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
51383 basic block index hashing on the availability of ->cclhs.
51384 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
51385 rely on ->cclhs availability.
51386 (vn_phi_lookup): Set ->cclhs only when we are eventually
51387 going to CSE the PHI.
51388 (vn_phi_insert): Likewise.
51390 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
51392 * gimplify.cc (gimplify_save_expr): Add missing guard.
51394 2023-02-14 Richard Biener <rguenther@suse.de>
51396 PR tree-optimization/108782
51397 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
51398 Make sure we're not vectorizing an inner loop.
51400 2023-02-14 Jakub Jelinek <jakub@redhat.com>
51402 PR sanitizer/108777
51403 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
51404 * asan.h (asan_memfn_rtl): Declare.
51405 * asan.cc (asan_memfn_rtls): New variable.
51406 (asan_memfn_rtl): New function.
51407 * builtins.cc (expand_builtin): If
51408 param_asan_kernel_mem_intrinsic_prefix and function is
51409 kernel-{,hw}address sanitized, emit calls to
51410 __{,hw}asan_{memcpy,memmove,memset} rather than
51411 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
51412 instead of flag_sanitize & SANITIZE_ADDRESS to check if
51413 asan_intercepted_p functions shouldn't be expanded inline.
51415 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
51417 PR tree-optimization/96373
51418 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
51419 operations on the loop mask. Reject partial vectors if this isn't
51422 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
51424 PR rtl-optimization/108681
51425 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
51426 code to handle bare uses and clobbers.
51428 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
51430 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
51431 caller_save_p flag when clearing defined_p flag.
51432 (setup_reg_equiv): Ditto.
51433 * lra-constraints.cc (lra_constraints): Ditto.
51435 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
51438 * config/i386/predicates.md (extr_register_operand):
51439 New special predicate.
51440 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
51441 as operand 1 predicate.
51442 (*exzv<mode>): Ditto.
51443 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
51445 2023-02-13 Richard Biener <rguenther@suse.de>
51447 PR tree-optimization/28614
51448 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
51449 walking all edges in most cases.
51450 (vn_nary_op_insert_pieces_predicated): Avoid repeated
51451 calls to can_track_predicate_on_edge unless checking is
51453 (process_bb): Instead call it once here for each edge
51454 we register possibly multiple predicates on.
51456 2023-02-13 Richard Biener <rguenther@suse.de>
51458 PR tree-optimization/108691
51459 * tree-cfg.cc (notice_special_calls): When the CFG is built
51460 honor gimple_call_ctrl_altering_p.
51461 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
51462 temporarily if the call is not control-altering.
51463 * calls.cc (emit_call_1): Do not add REG_SETJMP if
51464 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
51466 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
51469 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
51470 (struct s390_sched_state): Initialise to zero.
51471 (s390_sched_variable_issue): For better debuggability also emit
51473 (s390_sched_init): Unconditionally reset scheduler state.
51475 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
51477 * ifcvt.h (noce_if_info::cond_inverted): New field.
51478 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
51479 values when cond_inverted is true.
51480 (noce_find_if_block): Allow the condition to be inverted when
51481 handling conditional moves.
51483 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
51485 * config/s390/predicates.md (execute_operation): Use
51486 constrain_operands instead of extract_constrain_insn in order to
51487 determine wheter there exists a valid alternative.
51489 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
51491 * common/config/arc/arc-common.cc (arc_option_optimization_table):
51492 Remove millicode from list.
51494 2023-02-13 Martin Liska <mliska@suse.cz>
51496 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
51498 2023-02-13 Richard Biener <rguenther@suse.de>
51500 PR tree-optimization/106722
51501 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
51502 whether we marked a stmt.
51503 (mark_control_dependent_edges_necessary): When
51504 mark_last_stmt_necessary didn't mark any stmt make sure
51505 to mark its control dependent edges.
51506 (propagate_necessity): Likewise.
51508 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
51510 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
51511 (DWARF_FRAME_REGISTERS): New.
51512 (DWARF_REG_TO_UNWIND_COLUMN): New.
51514 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
51516 * doc/sourcebuild.texi: Remove (broken) direct reference to
51517 "The GNU configure and build system".
51519 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
51521 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
51522 gen_add3_insn to gen_rtx_SET.
51523 (riscv_adjust_libcall_cfi_epilogue): Likewise.
51525 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51527 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
51528 (class vnclip): Ditto.
51530 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51531 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
51540 * config/riscv/vector-iterators.md (su): Add instruction.
51543 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
51544 (@pred_<sat_op><mode>_scalar): Ditto.
51545 (*pred_<sat_op><mode>_scalar): Ditto.
51546 (*pred_<sat_op><mode>_extended_scalar): Ditto.
51547 (@pred_narrow_clip<v_su><mode>): Ditto.
51548 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
51550 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51552 * config/riscv/constraints.md (Wbr): Remove unused constraint.
51553 * config/riscv/predicates.md: Fix move operand predicate.
51554 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
51555 (class vncvt_x): Ditto.
51556 (class vmerge): Ditto.
51557 (class vmv_v): Ditto.
51559 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51560 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
51567 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
51568 (struct move_def): Ditto.
51570 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
51571 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
51572 (DEF_RVV_WEXTU_OPS): Ditto
51573 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
51578 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
51579 * config/riscv/vector-iterators.md (nmsac):New iterator.
51580 (nmsub): New iterator.
51581 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
51582 (@pred_merge<mode>_scalar): New pattern.
51583 (*pred_merge<mode>_scalar): New pattern.
51584 (*pred_merge<mode>_extended_scalar): New pattern.
51585 (@pred_narrow_<optab><mode>): New pattern.
51586 (@pred_narrow_<optab><mode>_scalar): New pattern.
51587 (@pred_trunc<mode>): New pattern.
51589 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51591 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
51592 (class vmsbc): Ditto.
51593 (BASE): Define new class.
51594 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51595 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
51597 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
51600 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
51601 * config/riscv/riscv-vector-builtins.cc
51602 (function_expander::use_exact_insn): Adjust for new support
51603 * config/riscv/riscv-vector-builtins.h
51604 (function_base::has_merge_operand_p): New function.
51605 * config/riscv/vector-iterators.md: New iterator.
51606 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
51607 (@pred_msbc<mode>): Ditto.
51608 (@pred_madc<mode>_scalar): Ditto.
51609 (@pred_msbc<mode>_scalar): Ditto.
51610 (*pred_madc<mode>_scalar): Ditto.
51611 (*pred_madc<mode>_extended_scalar): Ditto.
51612 (*pred_msbc<mode>_scalar): Ditto.
51613 (*pred_msbc<mode>_extended_scalar): Ditto.
51614 (@pred_madc<mode>_overflow): Ditto.
51615 (@pred_msbc<mode>_overflow): Ditto.
51616 (@pred_madc<mode>_overflow_scalar): Ditto.
51617 (@pred_msbc<mode>_overflow_scalar): Ditto.
51618 (*pred_madc<mode>_overflow_scalar): Ditto.
51619 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
51620 (*pred_msbc<mode>_overflow_scalar): Ditto.
51621 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
51623 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51625 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
51626 * config/riscv/riscv-v.cc (simm32_p): Ditto.
51627 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
51628 (class vsbc): Ditto.
51630 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51631 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
51633 * config/riscv/riscv-vector-builtins-shapes.cc
51634 (struct no_mask_policy_def): Ditto.
51636 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
51637 * config/riscv/riscv-vector-builtins.cc
51638 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
51639 (rvv_arg_type_info::get_tree_type): Ditto.
51640 (function_expander::use_exact_insn): Ditto.
51641 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
51642 (function_base::use_mask_predication_p): New function.
51643 * config/riscv/vector-iterators.md: New iterator.
51644 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
51645 (@pred_sbc<mode>): Ditto.
51646 (@pred_adc<mode>_scalar): Ditto.
51647 (@pred_sbc<mode>_scalar): Ditto.
51648 (*pred_adc<mode>_scalar): Ditto.
51649 (*pred_adc<mode>_extended_scalar): Ditto.
51650 (*pred_sbc<mode>_scalar): Ditto.
51651 (*pred_sbc<mode>_extended_scalar): Ditto.
51653 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51655 * config/riscv/vector.md: use "zero" reg.
51657 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51659 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
51661 (class vwmulsu): Ditto.
51662 (class vwcvt): Ditto.
51663 (BASE): Add integer widening support.
51664 * config/riscv/riscv-vector-builtins-bases.h: Ditto
51665 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
51666 (vwsub): New class.
51667 (vwmul): New class.
51668 (vwmulu): New class.
51669 (vwmulsu): New class.
51670 (vwaddu): New class.
51671 (vwsubu): New class.
51672 (vwcvt_x): New class.
51673 (vwcvtu_x): New class.
51674 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
51676 (struct widen_alu_def): New class.
51677 (SHAPE): New class.
51678 * config/riscv/riscv-vector-builtins-shapes.h: New class.
51679 * config/riscv/riscv-vector-builtins.cc
51680 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
51681 (rvv_arg_type_info::get_tree_type): Ditto.
51682 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
51684 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
51686 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
51687 * config/riscv/riscv.h (X0_REGNUM): New constant.
51688 * config/riscv/vector-iterators.md: New iterators.
51689 * config/riscv/vector.md
51690 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
51692 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
51694 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
51695 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
51697 (@pred_widen_mulsu<mode>): Ditto.
51698 (@pred_widen_mulsu<mode>_scalar): Ditto.
51699 (@pred_<optab><mode>): Ditto.
51701 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51702 kito-cheng <kito.cheng@sifive.com>
51704 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
51705 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
51707 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51708 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
51712 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
51714 (DEF_RVV_FULL_V_U_OPS): Ditto.
51715 (vint8mf8_t): Ditto.
51716 (vint8mf4_t): Ditto.
51717 (vint8mf2_t): Ditto.
51718 (vint8m1_t): Ditto.
51719 (vint8m2_t): Ditto.
51720 (vint8m4_t): Ditto.
51721 (vint8m8_t): Ditto.
51722 (vint16mf4_t): Ditto.
51723 (vint16mf2_t): Ditto.
51724 (vint16m1_t): Ditto.
51725 (vint16m2_t): Ditto.
51726 (vint16m4_t): Ditto.
51727 (vint16m8_t): Ditto.
51728 (vint32mf2_t): Ditto.
51729 (vint32m1_t): Ditto.
51730 (vint32m2_t): Ditto.
51731 (vint32m4_t): Ditto.
51732 (vint32m8_t): Ditto.
51733 (vint64m1_t): Ditto.
51734 (vint64m2_t): Ditto.
51735 (vint64m4_t): Ditto.
51736 (vint64m8_t): Ditto.
51737 (vuint8mf8_t): Ditto.
51738 (vuint8mf4_t): Ditto.
51739 (vuint8mf2_t): Ditto.
51740 (vuint8m1_t): Ditto.
51741 (vuint8m2_t): Ditto.
51742 (vuint8m4_t): Ditto.
51743 (vuint8m8_t): Ditto.
51744 (vuint16mf4_t): Ditto.
51745 (vuint16mf2_t): Ditto.
51746 (vuint16m1_t): Ditto.
51747 (vuint16m2_t): Ditto.
51748 (vuint16m4_t): Ditto.
51749 (vuint16m8_t): Ditto.
51750 (vuint32mf2_t): Ditto.
51751 (vuint32m1_t): Ditto.
51752 (vuint32m2_t): Ditto.
51753 (vuint32m4_t): Ditto.
51754 (vuint32m8_t): Ditto.
51755 (vuint64m1_t): Ditto.
51756 (vuint64m2_t): Ditto.
51757 (vuint64m4_t): Ditto.
51758 (vuint64m8_t): Ditto.
51759 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
51760 (DEF_RVV_FULL_V_U_OPS): Ditto.
51761 (check_required_extensions): Add vmulh support.
51762 (rvv_arg_type_info::get_tree_type): Ditto.
51763 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
51764 (enum rvv_base_type): Ditto.
51765 * config/riscv/riscv.opt: Add 'V' extension flag.
51766 * config/riscv/vector-iterators.md (su): New iterator.
51767 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
51768 (@pred_mulh<v_su><mode>_scalar): Ditto.
51769 (*pred_mulh<v_su><mode>_scalar): Ditto.
51770 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
51772 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51774 * config/riscv/iterators.md: Add sign_extend/zero_extend.
51775 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
51777 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
51778 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
51781 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
51782 for vsext/vzext support.
51783 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
51785 (DEF_RVV_QEXTI_OPS): Ditto.
51786 (DEF_RVV_OEXTI_OPS): Ditto.
51787 (DEF_RVV_WEXTU_OPS): Ditto.
51788 (DEF_RVV_QEXTU_OPS): Ditto.
51789 (DEF_RVV_OEXTU_OPS): Ditto.
51790 (vint16mf4_t): Ditto.
51791 (vint16mf2_t): Ditto.
51792 (vint16m1_t): Ditto.
51793 (vint16m2_t): Ditto.
51794 (vint16m4_t): Ditto.
51795 (vint16m8_t): Ditto.
51796 (vint32mf2_t): Ditto.
51797 (vint32m1_t): Ditto.
51798 (vint32m2_t): Ditto.
51799 (vint32m4_t): Ditto.
51800 (vint32m8_t): Ditto.
51801 (vint64m1_t): Ditto.
51802 (vint64m2_t): Ditto.
51803 (vint64m4_t): Ditto.
51804 (vint64m8_t): Ditto.
51805 (vuint16mf4_t): Ditto.
51806 (vuint16mf2_t): Ditto.
51807 (vuint16m1_t): Ditto.
51808 (vuint16m2_t): Ditto.
51809 (vuint16m4_t): Ditto.
51810 (vuint16m8_t): Ditto.
51811 (vuint32mf2_t): Ditto.
51812 (vuint32m1_t): Ditto.
51813 (vuint32m2_t): Ditto.
51814 (vuint32m4_t): Ditto.
51815 (vuint32m8_t): Ditto.
51816 (vuint64m1_t): Ditto.
51817 (vuint64m2_t): Ditto.
51818 (vuint64m4_t): Ditto.
51819 (vuint64m8_t): Ditto.
51820 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
51821 (DEF_RVV_QEXTI_OPS): Ditto.
51822 (DEF_RVV_OEXTI_OPS): Ditto.
51823 (DEF_RVV_WEXTU_OPS): Ditto.
51824 (DEF_RVV_QEXTU_OPS): Ditto.
51825 (DEF_RVV_OEXTU_OPS): Ditto.
51826 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
51828 (rvv_arg_type_info::get_tree_type): Ditto.
51829 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
51830 * config/riscv/vector-iterators.md (z): New attribute.
51831 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
51832 (@pred_<optab><mode>_vf4): Ditto.
51833 (@pred_<optab><mode>_vf8): Ditto.
51835 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51837 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
51838 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
51839 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
51840 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51841 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
51845 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
51850 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
51851 (@pred_<optab><mode>_scalar): New pattern.
51852 (*pred_<optab><mode>_scalar): New pattern.
51853 (*pred_<optab><mode>_extended_scalar): New pattern.
51855 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51857 * config/riscv/iterators.md: Add neg and not.
51858 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
51860 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51861 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
51882 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
51883 (struct alu_def): Ditto.
51885 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
51886 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
51887 * config/riscv/vector-iterators.md: New iterator.
51888 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
51890 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51892 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
51894 2023-02-11 Jakub Jelinek <jakub@redhat.com>
51897 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
51898 item->offset bit position is too large to be representable as
51899 unsigned int byte position.
51901 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
51903 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
51905 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
51907 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
51908 valid_combine only when ira_use_lra_p is true.
51910 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
51912 * params.opt (ira-simple-lra-insn-threshold): Add new param.
51913 * ira.cc (ira): Use the param to switch on simple LRA.
51915 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
51917 PR tree-optimization/108687
51918 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
51919 back to RFD_NONE mode for calculations.
51920 (ranger_cache::propagate_cache): Call the internal edge range API
51921 with RFD_READ_ONLY instead of changing the external routine.
51923 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
51925 PR tree-optimization/108520
51926 * gimple-range-infer.cc (check_assume_func): Invoke
51927 gimple_range_global directly instead using global_range_query.
51928 * value-query.cc (get_range_global): Add function context and
51929 avoid calling nonnull_arg_p if not cfun.
51930 (gimple_range_global): Add function context pointer.
51931 * value-query.h (imple_range_global): Add function context.
51933 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51935 * config/riscv/constraints.md (Wdm): Adjust constraint.
51936 (Wbr): New constraint.
51937 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
51938 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
51939 (emit_vlmax_op): New function.
51940 (emit_nonvlmax_op): Ditto.
51942 (neg_simm5_p): Ditto.
51943 (has_vi_variant_p): Ditto.
51944 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
51945 (emit_vlmax_op): New function.
51946 (emit_nonvlmax_op): Ditto.
51947 (expand_const_vector): Adjust function.
51948 (legitimize_move): Ditto.
51949 (simm32_p): New function.
51951 (neg_simm5_p): Ditto.
51952 (has_vi_variant_p): Ditto.
51953 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
51955 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51956 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
51959 (vminu): Remove signed cases.
51961 (vdiv): Remove unsigned cases.
51963 (vdivu): Remove signed cases.
51967 (vrsub): New class.
51972 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
51973 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
51974 * config/riscv/vector-iterators.md: New iterators.
51975 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
51977 (@pred_<optab><mode>_scalar): New pattern.
51978 (@pred_sub<mode>_reverse_scalar): Ditto.
51979 (*pred_<optab><mode>_scalar): Ditto.
51980 (*pred_<optab><mode>_extended_scalar): Ditto.
51981 (*pred_sub<mode>_reverse_scalar): Ditto.
51982 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
51984 2023-02-10 Richard Biener <rguenther@suse.de>
51986 PR tree-optimization/108724
51987 * tree-vect-stmts.cc (vectorizable_operation): Avoid
51988 using word_mode vectors when vector lowering will
51989 decompose them to elementwise operations.
51991 2023-02-10 Jakub Jelinek <jakub@redhat.com>
51994 2023-02-09 Martin Liska <mliska@suse.cz>
51997 * doc/extend.texi: Document that the function
51998 does not work correctly for old VIA processors.
52000 2023-02-10 Andrew Pinski <apinski@marvell.com>
52001 Andrew Macleod <amacleod@redhat.com>
52003 PR tree-optimization/108684
52004 * tree-ssa-dce.cc (simple_dce_from_worklist):
52005 Check all ssa names and not just non-vdef ones
52006 before accepting the inline-asm.
52007 Call unlink_stmt_vdef on the statement before
52010 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
52012 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
52013 * ira.cc (validate_equiv_mem): Check memref address variance.
52014 (no_equiv): Clear caller_save_p flag.
52015 (update_equiv_regs): Define caller save equivalence for
52017 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
52018 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
52019 call_save_p. Use caller save equivalence depending on the arg.
52020 (split_reg): Adjust the call.
52022 2023-02-09 Jakub Jelinek <jakub@redhat.com>
52025 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
52026 (cpu_indicator_init): Call get_available_features for all CPUs with
52027 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
52030 2023-02-09 Jakub Jelinek <jakub@redhat.com>
52032 PR tree-optimization/108688
52033 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
52034 of BIT_INSERT_EXPR extracting exactly all inserted bits even
52035 when without mode precision. Formatting fixes.
52037 2023-02-09 Andrew Pinski <apinski@marvell.com>
52039 PR tree-optimization/108688
52040 * match.pd (bit_field_ref [bit_insert]): Avoid generating
52041 BIT_FIELD_REFs of non-mode-precision integral operands.
52043 2023-02-09 Martin Liska <mliska@suse.cz>
52046 * doc/extend.texi: Document that the function
52047 does not work correctly for old VIA processors.
52049 2023-02-09 Andreas Schwab <schwab@suse.de>
52051 * lto-wrapper.cc (merge_and_complain): Handle
52052 -funwind-tables and -fasynchronous-unwind-tables.
52053 (append_compiler_options): Likewise.
52055 2023-02-09 Richard Biener <rguenther@suse.de>
52057 PR tree-optimization/26854
52058 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
52059 view around insert_updated_phi_nodes_for.
52060 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
52062 (walk_aliased_vdefs_1): Likewise.
52064 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
52066 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
52068 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
52071 * config.gcc (tm_mlib_file): Define new variable.
52073 2023-02-08 Jakub Jelinek <jakub@redhat.com>
52075 PR tree-optimization/108692
52076 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
52077 widened_code which is different from code, don't call
52078 vect_look_through_possible_promotion but instead just check op is
52079 SSA_NAME with integral type for which vect_is_simple_use is true
52080 and call set_op on this_unprom.
52082 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
52084 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
52086 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
52088 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
52089 to 'aarch_ra_sign_key'.
52090 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
52092 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
52093 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
52094 * config/arm/arm.opt: Define.
52096 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
52098 PR tree-optimization/108316
52099 * tree-vect-stmts.cc (get_load_store_type): When using
52100 internal functions for gather/scatter, make sure that the type
52101 of the offset argument is consistent with the offset vector type.
52103 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
52106 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
52108 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
52109 * ira.cc (validate_equiv_mem): Check memref address variance.
52110 (update_equiv_regs): Define caller save equivalence for
52112 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
52113 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
52114 call_save_p. Use caller save equivalence depending on the arg.
52115 (split_reg): Adjust the call.
52117 2023-02-08 Jakub Jelinek <jakub@redhat.com>
52119 * tree.def (SAD_EXPR): Remove outdated comment about missing
52122 2023-02-07 Marek Polacek <polacek@redhat.com>
52124 * doc/invoke.texi: Update -fchar8_t documentation.
52126 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
52128 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
52129 * ira.cc (validate_equiv_mem): Check memref address variance.
52130 (update_equiv_regs): Define caller save equivalence for
52132 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
52133 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
52134 call_save_p. Use caller save equivalence depending on the arg.
52135 (split_reg): Adjust the call.
52137 2023-02-07 Richard Biener <rguenther@suse.de>
52139 PR tree-optimization/26854
52140 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
52141 instead of immediate uses.
52143 2023-02-07 Jakub Jelinek <jakub@redhat.com>
52145 PR tree-optimization/106923
52146 * ipa-split.cc (execute_split_functions): Don't split returns_twice
52149 2023-02-07 Jakub Jelinek <jakub@redhat.com>
52151 PR tree-optimization/106433
52152 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
52153 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
52155 2023-02-07 Jan Hubicka <jh@suse.cz>
52157 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
52160 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
52162 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
52163 (process_asm): Create a constructor for GCN_STACK_SIZE.
52164 (main): Parse the -mstack-size option.
52166 2023-02-06 Alex Coplan <alex.coplan@arm.com>
52169 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
52170 Use correct constraint for operand 3.
52172 2023-02-06 Martin Jambor <mjambor@suse.cz>
52174 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
52176 2023-02-06 Xi Ruoyao <xry111@xry111.site>
52178 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
52179 New define_int_iterator.
52180 (bytepick_d_ashift_amount): Likewise.
52181 (bytepick_imm): New define_int_attr.
52182 (bytepick_w_lshiftrt_amount): Likewise.
52183 (bytepick_d_lshiftrt_amount): Likewise.
52184 (bytepick_w_<bytepick_imm>): New define_insn template.
52185 (bytepick_w_<bytepick_imm>_extend): Likewise.
52186 (bytepick_d_<bytepick_imm>): Likewise.
52187 (bytepick_w): Remove unused define_insn.
52188 (bytepick_d): Likewise.
52189 (UNSPEC_BYTEPICK_W): Remove unused unspec.
52190 (UNSPEC_BYTEPICK_D): Likewise.
52191 * config/loongarch/predicates.md (const_0_to_3_operand):
52192 Remove unused define_predicate.
52193 (const_0_to_7_operand): Likewise.
52195 2023-02-06 Jakub Jelinek <jakub@redhat.com>
52197 PR tree-optimization/108655
52198 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
52199 or -fsanitize=unreachable -fsanitize-trap=unreachable return
52200 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
52202 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
52204 * doc/install.texi (Specific): Remove PW32.
52206 2023-02-03 Jakub Jelinek <jakub@redhat.com>
52208 PR tree-optimization/108647
52209 * range-op.cc (operator_equal::op1_range,
52210 operator_not_equal::op1_range): Don't test op2 bound
52211 equality if op2.undefined_p (), instead set_varying.
52212 (operator_lt::op1_range, operator_le::op1_range,
52213 operator_gt::op1_range, operator_ge::op1_range): Return false if
52214 op2.undefined_p ().
52215 (operator_lt::op2_range, operator_le::op2_range,
52216 operator_gt::op2_range, operator_ge::op2_range): Return false if
52217 op1.undefined_p ().
52219 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
52221 PR tree-optimization/108639
52222 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
52224 (irange::operator==): Same.
52226 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
52228 PR tree-optimization/108647
52229 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
52230 (foperator_lt::op2_range): Same.
52231 (foperator_le::op1_range): Same.
52232 (foperator_le::op2_range): Same.
52233 (foperator_gt::op1_range): Same.
52234 (foperator_gt::op2_range): Same.
52235 (foperator_ge::op1_range): Same.
52236 (foperator_ge::op2_range): Same.
52237 (foperator_unordered_lt::op1_range): Same.
52238 (foperator_unordered_lt::op2_range): Same.
52239 (foperator_unordered_le::op1_range): Same.
52240 (foperator_unordered_le::op2_range): Same.
52241 (foperator_unordered_gt::op1_range): Same.
52242 (foperator_unordered_gt::op2_range): Same.
52243 (foperator_unordered_ge::op1_range): Same.
52244 (foperator_unordered_ge::op2_range): Same.
52246 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
52248 PR tree-optimization/107570
52249 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
52251 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
52253 * doc/gm2.texi (Internals): Remove from menu.
52254 (Using): Comment out ifnohtml conditional.
52255 (Documentation): Use gcc url.
52256 (License): Node simplified.
52257 (Copying): New node. Include gpl_v3_without_node.
52258 (Contributing): Node simplified.
52259 (Internals): Commented out.
52260 (Libraries): Node simplified.
52263 (Functions): Ditto.
52265 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
52267 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
52269 (mve_vqshluq_m_n_s<mode>): Likewise.
52270 (mve_vshlq_m_<supf><mode>): Likewise.
52271 (mve_vsriq_m_n_<supf><mode>): Likewise.
52272 (mve_vsubq_m_<supf><mode>): Likewise.
52274 2023-02-03 Martin Jambor <mjambor@suse.cz>
52277 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
52278 when comparing to an IPA-CP value.
52279 (dump_list_of_param_indices): New function.
52280 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
52281 Dump removed candidates using dump_list_of_param_indices.
52282 * ipa-param-manipulation.cc
52283 (ipa_param_body_adjustments::modify_expression): Add assert checking
52284 sizes of a VIEW_CONVERT_EXPR will match.
52285 (ipa_param_body_adjustments::modify_assignment): Likewise.
52287 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
52289 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
52290 * config/riscv/riscv.cc: Ditto.
52292 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52294 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
52298 * config/riscv/vector.md: Ditto.
52300 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52302 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
52303 * config/riscv/riscv-vector-builtins-bases.cc: New class.
52304 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
52307 * config/riscv/riscv-vector-builtins.cc: Ditto.
52308 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
52310 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
52312 * toplev.cc (toplev::main): Only print the version information header
52313 from toplevel main().
52315 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
52317 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
52318 cond_{ashl|ashr|lshr}
52320 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
52322 PR rtl-optimization/108086
52323 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
52324 Adjust size-related commentary accordingly.
52326 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
52328 PR rtl-optimization/108508
52329 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
52330 the splay tree search gives the first clobber in the second group,
52331 make sure that the root of the first clobber group is updated
52332 correctly. Enter the new clobber group into the definition splay
52335 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
52337 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
52338 Fix finding best match score.
52340 2023-02-02 Jakub Jelinek <jakub@redhat.com>
52343 PR rtl-optimization/108463
52345 * cselib.cc (cselib_current_insn): Move declaration earlier.
52346 (cselib_hasher::equal): For debug only locs, temporarily override
52347 cselib_current_insn to their l->setting_insn for the
52348 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
52349 promote some debug locs.
52350 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
52351 when using cselib call cselib_lookup_from_insn on the address but
52352 don't substitute it.
52354 2023-02-02 Richard Biener <rguenther@suse.de>
52356 PR middle-end/108625
52357 * genmatch.cc (expr::gen_transform): Also disallow resimplification
52358 from pushing to lseq with force_leaf.
52359 (dt_simplify::gen_1): Likewise.
52361 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
52363 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
52364 (struct kernargs): Replace the common content with kernargs_abi.
52365 (struct heap): Delete.
52366 (main): Read GCN_STACK_SIZE envvar.
52367 Allocate space for the device stacks.
52368 Write the new kernargs fields.
52369 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
52370 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
52371 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
52372 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
52373 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
52374 Set up the stacks from the values in the kernargs, not private.
52375 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
52376 (gcn_hsa_declare_function_name): Turn off the private segment.
52377 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
52378 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
52379 * config/gcn/gcn.opt (mstack-size): Change the description.
52381 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
52384 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
52385 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
52386 addressing MVE predicate modes.
52387 (mve_bool_vec_to_const): Change to represent correct MVE predicate
52389 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
52391 (arm_vector_mode_supported_p): Likewise.
52392 (arm_mode_to_pred_mode): Add V2QI.
52393 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
52395 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
52396 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
52397 (v2qi_UP): New macro.
52398 (v4bi_UP): New macro.
52399 (v8bi_UP): New macro.
52400 (v16bi_UP): New macro.
52401 (arm_expand_builtin_args): Make it able to expand the new predicate
52403 * config/arm/arm-modes.def (V2QI): New mode.
52404 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
52405 Pred4x4_t): Remove unused predicate builtin types.
52406 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
52407 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
52408 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
52409 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
52410 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
52411 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
52412 of MODE_VECTOR_BOOL.
52413 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
52414 (MVE_VPRED): Likewise.
52415 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
52416 (MVE_vctp): New mode attribute.
52420 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
52421 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
52423 (mve_vpnothi): Rename this...
52424 (mve_vpnotv16bi): ... to this.
52425 (mve_vctp<mode1>q_mhi): Rename this...
52426 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
52427 (mve_vldrdq_gather_base_z_<supf>v2di,
52428 mve_vldrdq_gather_offset_z_<supf>v2di,
52429 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
52430 mve_vstrdq_scatter_base_p_<supf>v2di,
52431 mve_vstrdq_scatter_offset_p_<supf>v2di,
52432 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
52433 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
52434 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
52435 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
52436 mve_vldrdq_gather_base_wb_z_<supf>v2di,
52437 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
52438 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
52440 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
52442 (VCTP): ... with this.
52443 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
52444 (VCTP_M): ... with this.
52445 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
52446 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
52448 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
52451 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
52452 (arm_modes_tieable_p): Make MVE predicate modes tieable.
52453 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
52454 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
52455 simplify_subreg to simplify subregs where the outermode is not scalar.
52457 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
52460 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
52461 new qualifiers parameter and use unsigned short type for MVE predicate.
52462 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
52464 (arm_init_crypto_builtins): Likewise.
52466 2023-02-02 Jakub Jelinek <jakub@redhat.com>
52469 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
52470 * internal-fn.def (TRAP): Remove.
52471 * internal-fn.cc (expand_TRAP): Remove.
52472 * tree.cc (build_common_builtin_nodes): Define
52473 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
52474 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
52475 instead of BUILT_IN_TRAP.
52476 * gimple.cc (gimple_build_builtin_unreachable): Remove
52477 emitting internal function for BUILT_IN_TRAP.
52478 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
52479 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
52480 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
52481 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
52482 BUILT_IN_UNREACHABLE_TRAP.
52483 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
52484 * tree-cfg.cc (verify_gimple_call,
52485 pass_warn_function_return::execute): Likewise.
52486 * attribs.cc (decl_attributes): Don't report exclusions on
52487 BUILT_IN_UNREACHABLE_TRAP either.
52489 2023-02-02 liuhongt <hongtao.liu@intel.com>
52491 PR tree-optimization/108601
52492 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
52493 * tree-vect-loop.cc
52494 (vectorizable_nonlinear_induction): Remove
52495 vect_can_peel_nonlinear_iv_p.
52496 (vect_can_peel_nonlinear_iv_p): Don't peel
52497 nonlinear iv(mult or shift) for epilog when vf is not
52498 constant and moved the defination to ..
52499 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
52502 2023-02-02 Jakub Jelinek <jakub@redhat.com>
52504 PR middle-end/108435
52505 * tree-nested.cc (convert_nonlocal_omp_clauses)
52506 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
52507 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
52508 before calling declare_vars.
52509 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
52510 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
52511 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
52512 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
52514 2023-02-01 Tamar Christina <tamar.christina@arm.com>
52516 * common/config/aarch64/aarch64-common.cc
52517 (struct aarch64_option_extension): Add native_detect and document struct
52519 (all_extensions): Set new field native_detect.
52520 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
52523 2023-02-01 Martin Liska <mliska@suse.cz>
52525 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
52528 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
52530 PR tree-optimization/108356
52531 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
52532 do a search of the DOM tree for a range.
52534 2023-02-01 Martin Liska <mliska@suse.cz>
52537 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
52538 ony non-null values.
52539 * ipa.cc (walk_polymorphic_call_targets): Likewise.
52541 2023-02-01 Martin Liska <mliska@suse.cz>
52544 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
52547 2023-02-01 Jakub Jelinek <jakub@redhat.com>
52550 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
52551 subregs in DEBUG_INSNs.
52553 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
52555 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
52557 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
52559 * config/s390/s390.cc (s390_restore_gpr_p): New function.
52560 (s390_preserve_gpr_arg_in_range_p): New function.
52561 (s390_preserve_gpr_arg_p): New function.
52562 (s390_preserve_fpr_arg_p): New function.
52563 (s390_register_info_stdarg_fpr): Rename to ...
52564 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
52565 (s390_register_info_stdarg_gpr): Rename to ...
52566 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
52567 (s390_register_info): Use the renamed functions above.
52568 (s390_optimize_register_info): Likewise.
52569 (save_fpr): Generate CFI for -mpreserve-args.
52570 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
52571 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
52572 (s390_optimize_prologue): Likewise.
52573 * config/s390/s390.opt: New option -mpreserve-args
52575 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
52577 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
52578 (restore_gprs): Likewise.
52579 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
52580 frame pointer if a frame-pointer is used.
52581 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
52582 * config/s390/s390.md (stack_tie): Add a register operand and
52584 (@stack_tie<mode>): ... this.
52586 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
52588 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
52589 EMIT_CFI parameter.
52590 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
52591 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
52593 2023-02-01 Richard Biener <rguenther@suse.de>
52595 PR middle-end/108500
52596 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
52597 with tree traversal algorithm.
52599 2023-02-01 Jason Merrill <jason@redhat.com>
52601 * doc/invoke.texi: Document -Wno-changes-meaning.
52603 2023-02-01 David Malcolm <dmalcolm@redhat.com>
52605 * doc/invoke.texi (Static Analyzer Options): Add notes about
52606 limitations of -fanalyzer.
52608 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52610 * config/riscv/constraints.md (vj): New.
52612 * config/riscv/iterators.md: Add more opcode.
52613 * config/riscv/predicates.md (vector_arith_operand): New.
52614 (vector_neg_arith_operand): New.
52615 (vector_shift_operand): New.
52616 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
52617 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
52634 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
52651 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
52652 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
52653 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
52654 (DEF_RVV_U_OPS): New.
52655 (rvv_arg_type_info::get_base_vector_type): Handle
52656 RVV_BASE_shift_vector.
52657 (rvv_arg_type_info::get_tree_type): Ditto.
52658 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
52659 RVV_BASE_shift_vector.
52660 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
52661 * config/riscv/vector-iterators.md: Handle more opcode.
52662 * config/riscv/vector.md (@pred_<optab><mode>): New.
52664 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
52667 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
52670 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
52672 PR tree-optimization/108608
52673 * tree-vect-loop.cc (vect_transform_reduction): Handle single
52674 def-use cycles that involve function calls rather than tree codes.
52676 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
52678 PR tree-optimization/108385
52679 * gimple-range-gori.cc (gori_compute::compute_operand_range):
52680 Allow VARYING computations to continue if there is a relation.
52681 * range-op.cc (pointer_plus_operator::op2_range): New.
52683 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
52685 PR tree-optimization/108359
52686 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
52687 (range_operator::fold_range): If op1 is equivalent to op2 then
52688 invoke new fold_in_parts_equiv to operate on sub-components.
52689 * range-op.h (wi_fold_in_parts_equiv): New prototype.
52691 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
52693 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
52694 not abort calculations if there is a valid relation available.
52695 (gori_compute::refine_using_relation): Pass correct relation trio.
52696 (gori_compute::compute_operand1_range): Create trio and use it.
52697 (gori_compute::compute_operand2_range): Ditto.
52698 * range-op.cc (operator_plus::op1_range): Use correct trio member.
52699 (operator_minus::op1_range): Use correct trio member.
52700 * value-relation.cc (value_relation::create_trio): New.
52701 * value-relation.h (value_relation::create_trio): New prototype.
52703 2023-01-31 Jakub Jelinek <jakub@redhat.com>
52706 * config/i386/i386-expand.cc
52707 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
52708 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
52709 equal to bitsize of mode.
52711 2023-01-31 Jakub Jelinek <jakub@redhat.com>
52713 PR rtl-optimization/108596
52714 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
52715 ends with asm goto and has a crossing fallthrough edge to the same bb
52716 that contains at least one of its labels by restoring EDGE_CROSSING
52717 flag even on possible edge from cur_bb to new_bb successor.
52719 2023-01-31 Jakub Jelinek <jakub@redhat.com>
52722 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
52723 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
52724 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
52725 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
52726 uninitialized automatic variable __W.
52728 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
52730 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
52732 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52734 * config/riscv/riscv-protos.h (get_vector_mode): New function.
52735 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
52736 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
52737 (class loadstore): Adjust for indexed loads/stores support.
52739 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
52740 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
52756 * config/riscv/riscv-vector-builtins-shapes.cc
52757 (struct indexed_loadstore_def): New class.
52759 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
52760 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
52761 for indexed loads/stores support.
52762 (check_required_extensions): Ditto.
52763 (rvv_arg_type_info::get_base_vector_type): New function.
52764 (rvv_arg_type_info::get_tree_type): Ditto.
52765 (function_builder::add_unique_function): Adjust for indexed loads/stores
52767 (function_expander::use_exact_insn): New function.
52768 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
52769 indexed loads/stores support.
52770 (struct rvv_arg_type_info): Ditto.
52771 (function_expander::index_mode): New function.
52772 (function_base::apply_tail_policy_p): Ditto.
52773 (function_base::apply_mask_policy_p): Ditto.
52774 * config/riscv/vector-iterators.md (unspec): New unspec.
52775 * config/riscv/vector.md (unspec): Ditto.
52776 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
52778 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
52779 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
52780 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
52781 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
52782 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
52783 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
52784 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
52785 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
52786 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
52787 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
52788 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
52789 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
52790 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
52792 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
52794 * config.gcc: Recognize x86_64-*-gnu* targets and include
52796 * config/i386/gnu64.h: Define configuration for new target
52797 including ld.so location.
52799 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
52801 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
52802 ampere1a to include SM4.
52804 2023-01-30 Andrew Pinski <apinski@marvell.com>
52806 PR tree-optimization/108582
52807 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
52808 for middlebb to have no phi nodes.
52810 2023-01-30 Richard Biener <rguenther@suse.de>
52812 PR tree-optimization/108574
52813 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
52814 sameval and def, ignore the equivalence if there's the
52815 danger of oscillating between two values.
52817 2023-01-30 Andreas Schwab <schwab@suse.de>
52819 * common/config/riscv/riscv-common.cc
52820 (riscv_option_optimization_table)
52821 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
52822 -fasynchronous-unwind-tables and -funwind-tables.
52823 * config.gcc (riscv*-*-linux*): Define
52824 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
52826 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
52828 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
52829 value of includedir.
52831 2023-01-30 Richard Biener <rguenther@suse.de>
52834 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
52837 2023-01-30 liuhongt <hongtao.liu@intel.com>
52839 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
52840 * doc/invoke.texi: Ditto.
52842 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
52844 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
52845 (stmt_may_terminate_function_p): If assuming return or EH
52846 volatile asm is safe.
52847 (find_always_executed_bbs): Fix handling of terminating BBS and
52848 infinite loops; add debug output.
52849 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
52851 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
52853 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
52854 off-by-one in checking the permissible shift-amount.
52856 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
52858 * doc/extend.texi (Named Address Spaces): Update link to the
52861 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
52863 * doc/standards.texi (Standards): Fix markup.
52865 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
52867 * doc/standards.texi (Standards): Update link to Objective-C book.
52869 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
52871 * doc/invoke.texi (Instrumentation Options): Update reference to
52874 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
52876 * doc/standards.texi: Update Go1 link.
52878 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52880 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
52881 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
52884 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
52885 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
52887 * config/riscv/riscv-vector-builtins.cc
52888 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
52889 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
52890 (@pred_strided_store<mode>): Ditto.
52892 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52894 * config/riscv/vector.md (tail_policy_op_idx): Remove.
52895 (mask_policy_op_idx): Remove.
52896 (avl_type_op_idx): Remove.
52898 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
52900 PR tree-optimization/96373
52901 * tree.h (sign_mask_for): Declare.
52902 * tree.cc (sign_mask_for): New function.
52903 (signed_or_unsigned_type_for): For vector types, try to use the
52904 related_int_vector_mode.
52905 * genmatch.cc (commutative_op): Handle conditional internal functions.
52906 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
52908 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
52910 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
52911 Use the likely minimum VF when bounding the denominators to
52912 the estimated number of iterations.
52914 2023-01-27 Richard Biener <rguenther@suse.de>
52917 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
52918 and -Ofast FP environment side-effects.
52920 2023-01-27 Richard Biener <rguenther@suse.de>
52923 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
52924 Don't add crtfastmath.o for -shared.
52926 2023-01-27 Richard Biener <rguenther@suse.de>
52929 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
52932 2023-01-27 Richard Biener <rguenther@suse.de>
52935 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
52936 crtfastmath.o for -shared.
52938 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
52940 PR tree-optimization/108306
52941 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
52942 varying for shifts that are always out of void range.
52943 (operator_rshift::fold_range): Return [0, 0] not
52944 varying for shifts that are always out of void range.
52946 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
52948 PR tree-optimization/108447
52949 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
52950 Do not attempt to fold HONOR_NAN types.
52952 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52954 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
52955 Remove _m suffix for "vop_m" C++ overloaded API name.
52957 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52959 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
52960 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
52961 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
52963 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
52964 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
52965 (vbool64_t): Ditto.
52966 (vbool32_t): Ditto.
52967 (vbool16_t): Ditto.
52972 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
52973 (rvv_arg_type_info::get_tree_type): Ditto.
52974 (function_expander::use_contiguous_load_insn): Ditto.
52975 * config/riscv/vector.md (@pred_store<mode>): Ditto.
52977 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52979 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
52980 (vsetvl_discard_result_insn_p): New function.
52981 (reg_killed_by_bb_p): rename to find_reg_killed_by.
52982 (find_reg_killed_by): New name.
52983 (get_vl): allow it to be called by more functions.
52984 (has_vsetvl_killed_avl_p): Add condition.
52985 (get_avl): allow it to be called by more functions.
52986 (insn_should_be_added_p): New function.
52987 (get_all_nonphi_defs): Refine function.
52988 (get_all_sets): Ditto.
52989 (get_same_bb_set): New function.
52990 (any_insn_in_bb_p): Ditto.
52991 (any_set_in_bb_p): Ditto.
52992 (get_vl_vtype_info): Add VLMAX forward optimization.
52993 (source_equal_p): Fix issues.
52994 (extract_single_source): Refine.
52995 (avl_info::multiple_source_equal_p): New function.
52996 (avl_info::operator==): Adjust for final version.
52997 (vl_vtype_info::operator==): Ditto.
52998 (vl_vtype_info::same_avl_p): Ditto.
52999 (vector_insn_info::parse_insn): Ditto.
53000 (vector_insn_info::available_p): New function.
53001 (vector_insn_info::merge): Adjust for final version.
53002 (vector_insn_info::dump): Add hard_empty.
53003 (pass_vsetvl::hard_empty_block_p): New function.
53004 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
53005 (pass_vsetvl::forward_demand_fusion): Ditto.
53006 (pass_vsetvl::demand_fusion): Ditto.
53007 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
53008 (pass_vsetvl::compute_local_properties): Adjust for final version.
53009 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
53010 (pass_vsetvl::refine_vsetvls): Ditto.
53011 (pass_vsetvl::commit_vsetvls): Ditto.
53012 (pass_vsetvl::propagate_avl): New function.
53013 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
53014 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
53016 2023-01-27 Jakub Jelinek <jakub@redhat.com>
53019 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
53020 from size_t to int.
53022 2023-01-27 Jakub Jelinek <jakub@redhat.com>
53025 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
53026 redirection of calls to __builtin_trap in addition to redirection
53027 to __builtin_unreachable.
53029 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53031 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
53033 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53035 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
53036 (emit_vsetvl_insn): Ditto.
53038 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53040 * config/riscv/vector.md: Fix constraints.
53042 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53044 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
53046 2023-01-27 Patrick Palka <ppalka@redhat.com>
53047 Jakub Jelinek <jakub@redhat.com>
53049 * tree-core.h (tree_code_type, tree_code_length): For
53050 C++17 and later, add inline keyword, otherwise don't define
53051 the arrays, but declare extern arrays.
53052 * tree.cc (tree_code_type, tree_code_length): Define these
53053 arrays for C++14 and older.
53055 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53057 * config/riscv/riscv-vsetvl.h: Change it into public.
53059 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53061 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
53064 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53066 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
53068 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53070 * config/riscv/vector.md: Fix incorrect attributes.
53072 2023-01-27 Richard Biener <rguenther@suse.de>
53075 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
53076 Don't add crtfastmath.o for -shared.
53078 2023-01-27 Alexandre Oliva <oliva@gnu.org>
53080 * doc/options.texi (option, RejectNegative): Mention that
53081 -g-started options are also implicitly negatable.
53083 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
53085 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
53086 Use get_typenode_from_name to get fixed-width integer type
53088 * config/riscv/riscv-vector-builtins.def: Update define with
53089 fixed-width integer type nodes.
53091 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53093 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
53094 (real_insn_and_same_bb_p): New function.
53095 (same_bb_and_after_or_equal_p): Remove it.
53096 (before_p): New function.
53097 (reg_killed_by_bb_p): Ditto.
53098 (has_vsetvl_killed_avl_p): Ditto.
53099 (get_vl): Move location so that we can call it.
53100 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
53101 (available_occurrence_p): Ditto.
53102 (dominate_probability_p): Remove it.
53103 (can_backward_propagate_p): Remove it.
53104 (get_all_nonphi_defs): New function.
53105 (get_all_predecessors): Ditto.
53106 (any_insn_in_bb_p): Ditto.
53107 (insert_vsetvl): Adjust AVL REG.
53108 (source_equal_p): New function.
53109 (extract_single_source): Ditto.
53110 (avl_info::single_source_equal_p): Ditto.
53111 (avl_info::operator==): Adjust for AVL=REG.
53112 (vl_vtype_info::same_avl_p): Ditto.
53113 (vector_insn_info::set_demand_info): Remove it.
53114 (vector_insn_info::compatible_p): Adjust for AVL=REG.
53115 (vector_insn_info::compatible_avl_p): New function.
53116 (vector_insn_info::merge): Adjust AVL=REG.
53117 (vector_insn_info::dump): Ditto.
53118 (pass_vsetvl::merge_successors): Remove it.
53119 (enum fusion_type): New enum.
53120 (pass_vsetvl::get_backward_fusion_type): New function.
53121 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
53122 (pass_vsetvl::forward_demand_fusion): Ditto.
53123 (pass_vsetvl::demand_fusion): Ditto.
53124 (pass_vsetvl::prune_expressions): Ditto.
53125 (pass_vsetvl::compute_local_properties): Ditto.
53126 (pass_vsetvl::cleanup_vsetvls): Ditto.
53127 (pass_vsetvl::commit_vsetvls): Ditto.
53128 (pass_vsetvl::init): Ditto.
53129 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
53130 (enum merge_type): New enum.
53132 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53134 * config/riscv/riscv-vsetvl.cc
53135 (vector_infos_manager::vector_infos_manager): Add probability.
53136 (vector_infos_manager::dump): Ditto.
53137 (pass_vsetvl::compute_probabilities): Ditto.
53138 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
53140 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53142 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
53143 (vector_insn_info::merge): Ditto.
53144 (vector_insn_info::dump): Ditto.
53145 (pass_vsetvl::merge_successors): Ditto.
53146 (pass_vsetvl::backward_demand_fusion): Ditto.
53147 (pass_vsetvl::forward_demand_fusion): Ditto.
53148 (pass_vsetvl::commit_vsetvls): Ditto.
53149 * config/riscv/riscv-vsetvl.h: Ditto.
53151 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53153 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
53156 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53158 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
53160 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53162 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
53163 Add pre-check for redundant flow.
53165 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53167 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
53168 (vector_infos_manager::free_bitmap_vectors): Ditto.
53169 (pass_vsetvl::pre_vsetvl): Adjust codes.
53170 * config/riscv/riscv-vsetvl.h: New function declaration.
53172 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53174 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
53175 (vector_insn_info::set_demand_info): New function.
53176 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
53177 (pass_vsetvl::merge_successors): Ditto.
53178 (pass_vsetvl::compute_global_backward_infos): Ditto.
53179 (pass_vsetvl::backward_demand_fusion): Ditto.
53180 (pass_vsetvl::forward_demand_fusion): Ditto.
53181 (pass_vsetvl::demand_fusion): New function.
53182 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
53183 * config/riscv/riscv-vsetvl.h: New function declaration.
53185 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53187 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
53189 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53191 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
53192 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
53194 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53196 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
53197 (backward_propagate_worthwhile_p): Fix non-worthwhile.
53199 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53201 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
53203 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53205 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
53206 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
53207 (pass_vsetvl::commit_vsetvls): Ditto.
53208 * config/riscv/riscv-vsetvl.h: New function declaration.
53210 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53212 * config/riscv/vector.md:
53214 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53216 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
53217 pred_store for vse.
53218 * config/riscv/riscv-vector-builtins.cc
53219 (function_expander::add_mem_operand): Refine function.
53220 (function_expander::use_contiguous_load_insn): Adjust new
53222 (function_expander::use_contiguous_store_insn): Ditto.
53223 * config/riscv/riscv-vector-builtins.h: Refine function.
53224 * config/riscv/vector.md (@pred_store<mode>): New pattern.
53226 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53228 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
53230 2023-01-26 Marek Polacek <polacek@redhat.com>
53232 PR middle-end/108543
53233 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
53234 if it was previously set.
53236 2023-01-26 Jakub Jelinek <jakub@redhat.com>
53238 PR tree-optimization/108540
53239 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
53240 are singletons, use range_true even if op1 != op2
53241 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
53242 even if intersection of the ranges is empty and one has
53243 zero low bound and another zero high bound, use range_true_and_false
53244 rather than range_false.
53245 (foperator_not_equal::fold_range): If both op1 and op2
53246 are singletons, use range_false even if op1 != op2
53247 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
53248 even if intersection of the ranges is empty and one has
53249 zero low bound and another zero high bound, use range_true_and_false
53250 rather than range_true.
53252 2023-01-26 Jakub Jelinek <jakub@redhat.com>
53254 * value-relation.cc (kind_string): Add const.
53255 (rr_negate_table, rr_swap_table, rr_intersect_table,
53256 rr_union_table, rr_transitive_table): Add static const, change
53257 element type from relation_kind to unsigned char.
53258 (relation_negate, relation_swap, relation_intersect, relation_union,
53259 relation_transitive): Cast rr_*_table element to relation_kind.
53260 (relation_to_code): Add static const.
53261 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
53263 2023-01-26 Richard Biener <rguenther@suse.de>
53265 PR tree-optimization/108547
53266 * gimple-predicate-analysis.cc (value_sat_pred_p):
53269 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
53271 PR tree-optimization/108522
53272 * tree-object-size.cc (compute_object_offset): Make EXPR
53273 argument non-const. Call component_ref_field_offset.
53275 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
53277 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
53278 FEATURE_STRING field.
53280 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
53282 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
53284 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
53288 * gcc.cc: Provide default specs for Modula-2 so that when the
53289 language is not built-in better diagnostics are emitted for
53290 attempts to use .mod or .m2i file extensions.
53292 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
53294 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
53296 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
53298 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
53300 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
53302 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
53305 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
53307 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
53309 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
53311 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
53313 2023-01-25 Richard Biener <rguenther@suse.de>
53315 PR tree-optimization/108523
53316 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
53317 backedge value for the result when using predication to
53320 2023-01-25 Richard Biener <rguenther@suse.de>
53322 * doc/lto.texi (Command line options): Reword and update reference
53323 to removed lto_read_all_file_options.
53325 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
53327 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
53330 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
53332 * doc/contrib.texi: Add Jose E. Marchesi.
53334 2023-01-25 Jakub Jelinek <jakub@redhat.com>
53336 PR tree-optimization/108498
53337 * gimple-ssa-store-merging.cc (class store_operand_info):
53338 End coment with full stop rather than comma.
53339 (split_group): Likewise.
53340 (merged_store_group::apply_stores): Clear string_concatenation if
53341 start or end aren't on a byte boundary.
53343 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
53344 Jakub Jelinek <jakub@redhat.com>
53346 PR tree-optimization/108522
53347 * tree-object-size.cc (compute_object_offset): Use
53348 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
53350 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
53352 * config/xtensa/xtensa.md:
53353 Fix exit from loops detecting references before overwriting in the
53356 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
53358 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
53359 do elimination but only for hard register.
53360 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
53361 calls of get_hard_regno.
53363 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
53365 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
53368 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
53371 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
53372 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
53375 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
53377 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
53378 and only include 'csky/t-csky-linux' when enable multilib.
53379 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
53380 define it when disable multilib.
53382 2023-01-24 Richard Biener <rguenther@suse.de>
53384 PR tree-optimization/108500
53385 * dominance.h (calculate_dominance_info): Add parameter
53386 to indicate fast-query compute, defaulted to true.
53387 * dominance.cc (calculate_dominance_info): Honor
53388 fast-query compute parameter.
53389 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
53390 not compute the dominator fast-query DFS numbers.
53392 2023-01-24 Eric Biggers <ebiggers@google.com>
53395 * optc-save-gen.awk: Fix copy-and-paste error.
53397 2023-01-24 Jakub Jelinek <jakub@redhat.com>
53400 * cgraphbuild.cc: Include gimplify.h.
53401 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
53402 their corresponding DECL_VALUE_EXPR expressions after unsharing.
53404 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53407 * config.gcc (tm_file): Move the variable out of loop.
53409 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
53410 Yang Yujie <yangyujie@loongson.cn>
53413 * config/loongarch/loongarch.cc (loongarch_classify_address):
53414 Add precessint for CONST_INT.
53415 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
53416 (loongarch_print_operand): Increase the processing of '%c'.
53417 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
53418 And port the public operand modifiers information to this document.
53420 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53422 * doc/invoke.texi (-mbranch-protection): Update documentation.
53424 2023-01-23 Richard Biener <rguenther@suse.de>
53427 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
53429 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
53430 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
53431 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
53432 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
53434 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53436 * config/arm/aout.h (ra_auth_code): Add entry in enum.
53437 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
53438 to dwarf frame expression.
53439 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
53440 (arm_expand_prologue): Update frame related information and reg notes
53441 for pac/pacbit insn.
53442 (arm_regno_class): Check for pac pseudo reigster.
53443 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
53444 (arm_init_machine_status): Set pacspval_needed to zero.
53445 (arm_debugger_regno): Check for PAC register.
53446 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
53448 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
53449 (arm_unwind_emit): Update REG_CFA_REGISTER case._
53450 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
53451 (DWARF_PAC_REGNUM): Define.
53452 (IS_PAC_REGNUM): Likewise.
53453 (enum reg_class): Add PAC_REG entry.
53454 (machine_function): Add pacbti_needed state to structure.
53455 * config/arm/arm.md (RA_AUTH_CODE): Define.
53457 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53459 * config.gcc ($tm_file): Update variable.
53460 * config/arm/arm-mlib.h: Create new header file.
53461 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
53462 multilib arch directory.
53463 (MULTILIB_REUSE): Add multilib reuse rules.
53464 (MULTILIB_MATCHES): Add multilib match rules.
53466 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53468 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
53469 * config/arm/arm-tables.opt: Regenerate.
53470 * config/arm/arm-tune.md: Likewise.
53471 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
53472 * (-mfix-cmse-cve-2021-35465): Likewise.
53474 2023-01-23 Richard Biener <rguenther@suse.de>
53476 PR tree-optimization/108482
53477 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
53478 .LOOP_DIST_ALIAS calls.
53480 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53482 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
53483 * config/arm/arm-protos.h: Update.
53484 * config/arm/aarch-common-protos.h: Declare
53485 'aarch_bti_arch_check'.
53486 * config/arm/arm.cc (aarch_bti_enabled) Update.
53487 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
53488 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
53489 * config/arm/arm.md (bti_nop): New insn.
53490 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
53491 (aarch-bti-insert.o): New target.
53492 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
53493 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
53495 (gate): Make use of 'aarch_bti_arch_check'.
53496 * config/arm/arm-passes.def: New file.
53497 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
53499 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53501 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
53502 'aarch-bti-insert.o'.
53503 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
53505 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
53506 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
53507 (aarch64_output_mi_thunk)
53508 (aarch64_print_patchable_function_entry)
53509 (aarch64_file_end_indicate_exec_stack): Update renamed function
53510 calls to renamed functions.
53511 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
53512 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
53514 * config/aarch64/aarch64-bti-insert.cc: Delete.
53515 * config/arm/aarch-bti-insert.cc: New file including and
53516 generalizing code from aarch64-bti-insert.cc.
53517 * config/arm/aarch-common-protos.h: Update.
53519 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53521 * config/arm/arm.h (arm_arch8m_main): Declare it.
53522 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
53524 * config/arm/arm.cc (arm_arch8m_main): Define it.
53525 (arm_option_reconfigure_globals): Set arm_arch8m_main.
53526 (arm_compute_frame_layout, arm_expand_prologue)
53527 (thumb2_expand_return, arm_expand_epilogue)
53528 (arm_conditional_register_usage): Update for pac codegen.
53529 (arm_current_function_pac_enabled_p): New function.
53530 (aarch_bti_enabled) New function.
53531 (use_return_insn): Return zero when pac is enabled.
53532 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
53534 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
53535 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
53537 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53539 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
53540 mbranch-protection.
53542 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53543 Tejas Belagod <tbelagod@arm.com>
53545 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
53546 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
53548 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53549 Tejas Belagod <tbelagod@arm.com>
53550 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53552 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
53553 new pseudo register class _UVRSC_PAC.
53555 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53556 Tejas Belagod <tbelagod@arm.com>
53558 * config/arm/arm-c.cc (arm_cpu_builtins): Define
53559 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
53560 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
53562 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53563 Tejas Belagod <tbelagod@arm.com>
53565 * doc/sourcebuild.texi: Document arm_pacbti_hw.
53567 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53568 Tejas Belagod <tbelagod@arm.com>
53569 Richard Earnshaw <Richard.Earnshaw@arm.com>
53571 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
53572 -mbranch-protection option and initialize appropriate data structures.
53573 * config/arm/arm.opt (-mbranch-protection): New option.
53574 * doc/invoke.texi (Arm Options): Document it.
53576 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53577 Tejas Belagod <tbelagod@arm.com>
53579 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
53580 * config/arm/arm-cpus.in (pacbti): New feature.
53581 * doc/invoke.texi (Arm Options): Document it.
53583 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53584 Tejas Belagod <tbelagod@arm.com>
53586 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
53587 (all_architectures): Fix comment.
53588 (aarch64_parse_extension): Rename return type, enum value names.
53589 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
53590 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
53591 Also rename corresponding enum values.
53592 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
53593 out aarch64_function_type and move it to common code as
53594 aarch_function_type in aarch-common.h.
53595 * config/aarch64/aarch64-protos.h: Include common types header,
53596 move out types aarch64_parse_opt_result and aarch64_key_type to
53598 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
53599 and functions out into aarch-common.h and aarch-common.cc. Fix up
53600 all the name changes resulting from the move.
53601 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
53603 * config/aarch64/aarch64.opt: Include aarch-common.h to import
53604 type move. Fix up name changes from factoring out common code and
53606 * config/arm/aarch-common-protos.h: Export factored out routines to both
53608 * config/arm/aarch-common.cc: Include newly factored out types.
53609 Move all mbranch-protection code and data structures from
53611 * config/arm/aarch-common.h: New header that declares types shared
53612 between aarch32 and aarch64 backends.
53613 * config/arm/arm-protos.h: Declare types and variables that are
53614 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
53615 aarch_ra_sign_scope and aarch_enable_bti.
53616 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
53617 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
53618 * config/arm/arm.cc: Add missing includes.
53620 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
53622 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
53624 2023-01-23 Richard Biener <rguenther@suse.de>
53626 PR tree-optimization/108449
53627 * cgraphunit.cc (check_global_declaration): Do not turn
53628 undefined statics into externs.
53630 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
53632 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
53633 and HI input modes.
53634 * config/pru/pru.md (clz): Fix generated code for QI and HI
53637 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
53639 * config/v850/v850.cc (v850_select_section): Put const volatile
53640 objects into read-only sections.
53642 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
53644 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
53645 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
53646 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
53648 2023-01-20 Jakub Jelinek <jakub@redhat.com>
53650 PR tree-optimization/108457
53651 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
53652 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
53653 argument instead of a temporary. Formatting fixes.
53655 2023-01-19 Jakub Jelinek <jakub@redhat.com>
53657 PR tree-optimization/108447
53658 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
53659 (relation_tests): Add self-tests for relation_{intersect,union}
53661 * selftest.h (relation_tests): Declare.
53662 * function-tests.cc (test_ranges): Call it.
53664 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
53667 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
53668 invalid third argument to __builtin_ia32_prefetch.
53670 2023-01-19 Jakub Jelinek <jakub@redhat.com>
53672 PR middle-end/108459
53673 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
53674 than fold_unary for NEGATE_EXPR.
53676 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
53679 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
53680 comment. Move assert about alignment a bit later.
53682 2023-01-19 Jakub Jelinek <jakub@redhat.com>
53684 PR tree-optimization/108440
53685 * tree-ssa-forwprop.cc: Include gimple-range.h.
53686 (simplify_rotate): For the forms with T2 wider than T and shift counts of
53687 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
53688 to B. For the forms with T2 wider than T and shift counts of
53689 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
53690 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
53691 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
53692 pass specific ranger instead of get_global_range_query.
53693 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
53696 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
53698 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
53699 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
53701 (aarch64_simd_vec_copy_lane<mode>): Likewise.
53702 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
53704 2023-01-19 Alexandre Oliva <oliva@adacore.com>
53707 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
53708 within debug insns.
53710 2023-01-18 Martin Jambor <mjambor@suse.cz>
53713 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
53714 lcone_of chain also do not need the body.
53716 2023-01-18 Richard Biener <rguenther@suse.de>
53719 2022-12-16 Richard Biener <rguenther@suse.de>
53721 PR middle-end/108086
53722 * tree-inline.cc (remap_ssa_name): Do not unshare the
53723 result from the decl_map.
53725 2023-01-18 Murray Steele <murray.steele@arm.com>
53728 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
53730 (__arm_vst1q_p_s8): Likewise.
53731 (__arm_vld1q_z_u8): Likewise.
53732 (__arm_vld1q_z_s8): Likewise.
53733 (__arm_vst1q_p_u16): Likewise.
53734 (__arm_vst1q_p_s16): Likewise.
53735 (__arm_vld1q_z_u16): Likewise.
53736 (__arm_vld1q_z_s16): Likewise.
53737 (__arm_vst1q_p_u32): Likewise.
53738 (__arm_vst1q_p_s32): Likewise.
53739 (__arm_vld1q_z_u32): Likewise.
53740 (__arm_vld1q_z_s32): Likewise.
53741 (__arm_vld1q_z_f16): Likewise.
53742 (__arm_vst1q_p_f16): Likewise.
53743 (__arm_vld1q_z_f32): Likewise.
53744 (__arm_vst1q_p_f32): Likewise.
53746 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
53748 * config/xtensa/xtensa.md (xorsi3_internal):
53749 Rename from the original of "xorsi3".
53750 (xorsi3): New expansion pattern that emits addition rather than
53751 bitwise-XOR when the second source is a constant of -2147483648
53754 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
53755 Andrew Pinski <apinski@marvell.com>
53758 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
53759 vec_vsubcuqP with vec_vsubcuq.
53761 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
53764 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
53765 support for invalid uses of MMA opaque type in function arguments.
53767 2023-01-18 liuhongt <hongtao.liu@intel.com>
53770 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
53771 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
53772 -share or -mno-daz-ftz is specified.
53773 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
53774 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
53776 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
53778 * config/bpf/bpf.cc (bpf_option_override): Disable
53781 2023-01-17 Jakub Jelinek <jakub@redhat.com>
53783 PR tree-optimization/106523
53784 * tree-ssa-forwprop.cc (simplify_rotate): For the
53785 patterns with (-Y) & (B - 1) in one operand's shift
53786 count and Y in another, if T2 has wider precision than T,
53787 punt if Y could have a value in [B, B2 - 1] range.
53789 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
53792 * config/i386/i386.cc (x86_output_mi_thunk): Disable
53793 -mforce-indirect-call for PIC in 32-bit mode.
53795 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
53798 * ipa-modref.cc (modref_access_analysis::analyze): Use
53799 find_always_executed_bbs.
53800 * ipa-sra.cc (process_scan_results): Likewise.
53801 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
53802 (find_always_executed_bbs): New function.
53803 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
53804 (find_always_executed_bbs): Declare.
53806 2023-01-16 Jan Hubicka <jh@suse.cz>
53808 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
53809 by TARGET_USE_SCATTER.
53810 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
53811 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
53812 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
53813 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
53814 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
53815 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
53817 2023-01-16 Richard Biener <rguenther@suse.de>
53820 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
53822 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
53826 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
53827 (__ARM_mve_coerce3): Likewise.
53829 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
53831 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
53833 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
53835 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
53836 (number_of_iterations_bitcount): Add call to the above.
53837 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
53838 c[lt]z idiom recognition.
53840 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
53842 * doc/sourcebuild.texi: Add missing target attributes.
53844 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
53846 PR tree-optimization/94793
53847 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
53849 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
53850 (number_of_iterations_cltz_complement): New.
53851 (number_of_iterations_bitcount): Add call to the above.
53853 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
53855 * doc/extend.texi (Common Function Attributes): Fix grammar.
53857 2023-01-16 Jakub Jelinek <jakub@redhat.com>
53860 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
53861 * config/riscv/riscv-vsetvl.cc: Likewise.
53863 2023-01-16 Jakub Jelinek <jakub@redhat.com>
53866 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
53867 disable -Winit-self using pragma GCC diagnostic ignored.
53868 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
53870 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
53871 _mm256_undefined_si256): Likewise.
53872 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
53873 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
53874 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
53875 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
53877 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
53880 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
53881 support for invalid uses in inline asm, factor out the checking and
53882 erroring to lambda function check_and_error_invalid_use.
53884 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
53886 PR tree-optimization/107608
53887 * range-op-float.cc (range_operator_float::fold_range): Avoid
53888 folding into INF when flag_trapping_math.
53889 * value-range.h (frange::known_isinf): Return false for possible NANs.
53891 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
53893 * config.gcc (csky-*-*): Support --with-float=softfp.
53895 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
53897 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
53898 Rename to xtensa_adjust_reg_alloc_order.
53899 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
53900 Ditto. And also remove code to reorder register numbers for
53901 leaf functions, rename the tables, and adjust the allocation
53902 order for the call0 ABI to use register A0 more.
53903 (xtensa_leaf_regs): Remove.
53904 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
53905 (order_regs_for_local_alloc): Rename as the above.
53906 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
53908 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
53910 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
53911 Change to define_insn_and_split to fold ldr+dup to ld1rq.
53912 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
53914 2023-01-14 Alexandre Oliva <oliva@adacore.com>
53916 * hash-table.h (is_deleted): Precheck !is_empty.
53917 (mark_deleted): Postcheck !is_empty.
53918 (copy constructor): Test is_empty before is_deleted.
53920 2023-01-14 Alexandre Oliva <oliva@adacore.com>
53923 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
53926 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
53928 PR rtl-optimization/108274
53929 * function.cc (thread_prologue_and_epilogue_insns): Also update the
53930 DF information for calls in a few more cases.
53932 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
53934 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
53935 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
53937 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
53938 (MAX_SYNC_LIBFUNC_SIZE): Define.
53939 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
53941 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
53942 libcall when sync libcalls are disabled.
53943 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
53944 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
53945 are disabled on 32-bit target.
53946 * config/pa/pa.opt (matomic-libcalls): New option.
53947 * doc/invoke.texi (HPPA Options): Update.
53949 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
53951 PR rtl-optimization/108117
53952 PR rtl-optimization/108132
53953 * sched-deps.cc (deps_analyze_insn): Do not schedule across
53954 calls before reload.
53956 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53958 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
53959 options for -mlibarch.
53960 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
53961 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
53963 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
53965 * attribs.cc (strict_flex_array_level_of): Move this function to ...
53966 * attribs.h (strict_flex_array_level_of): Remove the declaration.
53967 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
53968 replace the referece to strict_flex_array_level_of with
53969 DECL_NOT_FLEXARRAY.
53970 * tree.cc (component_ref_size): Likewise.
53972 2023-01-13 Richard Biener <rguenther@suse.de>
53975 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
53976 crtfastmath.o for -shared.
53977 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
53979 2023-01-13 Richard Biener <rguenther@suse.de>
53982 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
53983 crtfastmath.o for -shared.
53984 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
53986 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
53989 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
53991 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
53993 (TARGET_DWARF_FRAME_REG_MODE): Define.
53995 2023-01-13 Richard Biener <rguenther@suse.de>
53998 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
53999 update EH info on the fly.
54001 2023-01-13 Richard Biener <rguenther@suse.de>
54003 PR tree-optimization/108387
54004 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
54005 value before inserting expression into the tables.
54007 2023-01-12 Andrew Pinski <apinski@marvell.com>
54008 Roger Sayle <roger@nextmovesoftware.com>
54010 PR tree-optimization/92342
54011 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
54012 Use tcc_comparison and :c for the multiply.
54013 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
54015 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
54016 Richard Sandiford <richard.sandiford@arm.com>
54019 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
54020 Check DECL_PACKED for bitfield.
54021 (aarch64_layout_arg): Warn when parameter passing ABI changes.
54022 (aarch64_function_arg_boundary): Do not warn here.
54023 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
54026 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
54027 Richard Sandiford <richard.sandiford@arm.com>
54029 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
54031 (aarch64_layout_arg): Factorize warning conditions.
54032 (aarch64_function_arg_boundary): Fix typo.
54033 * function.cc (currently_expanding_function_start): New variable.
54034 (expand_function_start): Handle
54035 currently_expanding_function_start.
54036 * function.h (currently_expanding_function_start): Declare.
54038 2023-01-12 Richard Biener <rguenther@suse.de>
54040 PR tree-optimization/99412
54041 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
54042 (swap_ops_for_binary_stmt): Remove reduction handling.
54043 (rewrite_expr_tree_parallel): Adjust.
54044 (reassociate_bb): Likewise.
54045 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
54047 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54049 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
54050 Rearrange the emitting codes.
54052 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54054 * config/xtensa/xtensa.md (*btrue):
54055 Correct value of the attribute "length" that depends on
54056 TARGET_DENSITY and operands, and add '?' character to the register
54057 constraint of the compared operand.
54059 2023-01-12 Alexandre Oliva <oliva@adacore.com>
54061 * hash-table.h (expand): Check elements and deleted counts.
54062 (verify): Likewise.
54064 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
54066 PR tree-optimization/71343
54067 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
54068 the value number of the expression X << C the same as the value
54069 number for the multiplication X * (1<<C).
54071 2023-01-11 David Faust <david.faust@oracle.com>
54074 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
54075 floating point modes.
54077 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
54079 PR tree-optimization/108199
54080 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
54081 for bit-field references.
54083 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
54085 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
54086 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
54087 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
54088 OPTION_MASK_P10_FUSION.
54090 2023-01-11 Richard Biener <rguenther@suse.de>
54092 PR tree-optimization/107767
54093 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
54094 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
54095 * tree-switch-conversion.cc (switch_conversion::collect):
54096 Count unique non-default targets accounting for later
54097 merging opportunities.
54099 2023-01-11 Martin Liska <mliska@suse.cz>
54101 PR middle-end/107976
54102 * params.opt: Limit JT params.
54103 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
54105 2023-01-11 Richard Biener <rguenther@suse.de>
54107 PR tree-optimization/108352
54108 * tree-ssa-threadbackward.cc
54109 (back_threader_profitability::profitable_path_p): Adjust
54110 heuristic that allows non-multi-way branch threads creating
54112 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
54113 (--param fsm-scale-path-stmts): Adjust.
54114 * params.opt (--param=fsm-scale-path-blocks=): Remove.
54115 (-param=fsm-scale-path-stmts=): Adjust description.
54117 2023-01-11 Richard Biener <rguenther@suse.de>
54119 PR tree-optimization/108353
54120 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
54122 (add_ssa_edge): Simplify.
54123 (add_control_edge): Likewise.
54124 (ssa_prop_init): Likewise.
54125 (ssa_prop_fini): Likewise.
54126 (ssa_propagation_engine::ssa_propagate): Likewise.
54128 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
54130 * config/s390/s390.md (*not<mode>): New pattern.
54132 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54134 * config/xtensa/xtensa.cc (xtensa_insn_cost):
54135 Let insn cost for size be obtained by applying COSTS_N_INSNS()
54136 to instruction length and then dividing by 3.
54138 2023-01-10 Richard Biener <rguenther@suse.de>
54140 PR tree-optimization/106293
54141 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
54142 process degenerate PHI defs.
54144 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
54146 PR rtl-optimization/106421
54147 * cprop.cc (bypass_block): Check that DEST is local to this
54148 function (non-NULL) before calling find_edge.
54150 2023-01-10 Martin Jambor <mjambor@suse.cz>
54153 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
54154 sort_replacements, lookup_first_base_replacement and
54155 m_sorted_replacements_p.
54156 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
54157 (ipa_param_body_adjustments::register_replacement): Set
54158 m_sorted_replacements_p to false.
54159 (compare_param_body_replacement): New function.
54160 (ipa_param_body_adjustments::sort_replacements): Likewise.
54161 (ipa_param_body_adjustments::common_initialization): Call
54163 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
54164 m_sorted_replacements_p.
54165 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
54167 (ipa_param_body_adjustments::lookup_first_base_replacement): New
54169 (ipa_param_body_adjustments::modify_call_stmt): Use
54170 lookup_first_base_replacement.
54171 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
54172 adjustments->sort_replacements.
54174 2023-01-10 Richard Biener <rguenther@suse.de>
54176 PR tree-optimization/108314
54177 * tree-vect-stmts.cc (vectorizable_condition): Do not
54178 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
54180 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54182 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
54184 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54186 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
54188 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54190 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
54191 defines for soft float abi.
54193 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54195 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
54196 (smart_bclri): Likewise.
54197 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
54198 (fast_bclri): Likewise.
54199 (fast_cmpnesi_i): Likewise.
54200 (*fast_cmpltsi_i): Likewise.
54201 (*fast_cmpgeusi_i): Likewise.
54203 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54205 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
54206 flag_fp_int_builtin_inexact || !flag_trapping_math.
54207 (<frm_pattern><mode>2): Likewise.
54209 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
54211 * config/s390/s390.cc (s390_register_info): Check call_used_regs
54212 instead of hard-coding the register numbers for call saved
54214 (s390_optimize_register_info): Likewise.
54216 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
54218 * doc/gm2.texi (Overview): Fix @node markers.
54219 (Using): Likewise. Remove subsections that were moved to Overview
54220 from the menu and move others around.
54222 2023-01-09 Richard Biener <rguenther@suse.de>
54224 PR middle-end/108209
54225 * genmatch.cc (commutative_op): Fix return value for
54226 user-id with non-commutative first replacement.
54228 2023-01-09 Jakub Jelinek <jakub@redhat.com>
54231 * calls.cc (expand_call): For calls with
54232 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
54235 2023-01-09 Richard Biener <rguenther@suse.de>
54237 PR middle-end/69482
54238 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
54239 qualified accesses also force objects to memory.
54241 2023-01-09 Martin Liska <mliska@suse.cz>
54244 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
54245 NULL (deleleted value) to a hash_set.
54247 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54249 * config/xtensa/xtensa.md (*splice_bits):
54250 New insn_and_split pattern.
54252 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54254 * config/xtensa/xtensa.cc
54255 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
54256 New helper functions.
54257 (xtensa_set_return_address, xtensa_output_mi_thunk):
54258 Change to use the helper function.
54259 (xtensa_emit_adjust_stack_ptr): Ditto.
54260 And also change to try reusing the content of scratch register
54261 A9 if the register is not modified in the function body.
54263 2023-01-07 LIU Hao <lh_mouse@126.com>
54265 PR middle-end/108300
54266 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
54267 before <windows.h>.
54268 * diagnostic-color.cc: Likewise.
54269 * plugin.cc: Likewise.
54270 * prefix.cc: Likewise.
54272 2023-01-06 Joseph Myers <joseph@codesourcery.com>
54274 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
54275 for handling real integer types.
54277 2023-01-06 Tamar Christina <tamar.christina@arm.com>
54280 2022-12-12 Tamar Christina <tamar.christina@arm.com>
54282 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
54283 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
54284 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
54285 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
54286 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
54287 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
54288 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
54289 (aarch64_simd_dupv2hf): New.
54290 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
54292 * config/aarch64/iterators.md (VHSDF_P): New.
54293 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
54294 Vel, q, vp): Add V2HF.
54295 * config/arm/types.md (neon_fp_reduc_add_h): New.
54297 2023-01-06 Martin Liska <mliska@suse.cz>
54299 PR middle-end/107966
54300 * doc/options.texi: Fix Var documentation in internal manual.
54302 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
54305 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
54307 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
54308 RTL expansion to allow condition (mask) to be shared/reused,
54309 by avoiding overwriting pseudos and adding REG_EQUAL notes.
54311 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
54313 * common.opt: Add -static-libgm2.
54314 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
54315 * doc/gm2.texi: Document static-libgm2.
54316 * gcc.cc (driver_handle_option): Allow static-libgm2.
54318 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
54320 * common/config/i386/i386-common.cc (processor_alias_table):
54321 Use CPU_ZNVER4 for znver4.
54322 * config/i386/i386.md: Add znver4.md.
54323 * config/i386/znver4.md: New.
54325 2023-01-04 Jakub Jelinek <jakub@redhat.com>
54327 PR tree-optimization/108253
54328 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
54331 2023-01-04 Jakub Jelinek <jakub@redhat.com>
54333 PR middle-end/108237
54334 * generic-match-head.cc: Include tree-pass.h.
54335 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
54336 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
54337 resp. PROP_gimple_lvec property set.
54339 2023-01-04 Jakub Jelinek <jakub@redhat.com>
54341 PR sanitizer/108256
54342 * convert.cc (do_narrow): Punt for MULT_EXPR if original
54343 type doesn't wrap around and -fsanitize=signed-integer-overflow
54345 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
54347 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
54349 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
54350 * common/config/i386/i386-common.cc: Add Emeraldrapids.
54352 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
54354 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
54357 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
54359 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
54360 default constructor to initialize it.
54361 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
54362 for last and iterate to handle recursive calls. Delete leftover
54363 candidates at the end.
54364 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
54366 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
54367 gc_candidate bit when a clone is used.
54369 2023-01-03 Florian Weimer <fweimer@redhat.com>
54372 2023-01-02 Florian Weimer <fweimer@redhat.com>
54374 * dwarf2cfi.cc (init_return_column_size): Remove.
54375 (init_one_dwarf_reg_size): Adjust.
54376 (generate_dwarf_reg_sizes): New function. Extracted
54377 from expand_builtin_init_dwarf_reg_sizes.
54378 (expand_builtin_init_dwarf_reg_sizes): Call
54379 generate_dwarf_reg_sizes.
54380 * target.def (init_dwarf_reg_sizes_extra): Adjust
54382 * config/msp430/msp430.cc
54383 (msp430_init_dwarf_reg_sizes_extra): Adjust.
54384 * config/rs6000/rs6000.cc
54385 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
54386 * doc/tm.texi: Update.
54388 2023-01-03 Florian Weimer <fweimer@redhat.com>
54391 2023-01-02 Florian Weimer <fweimer@redhat.com>
54393 * debug.h (dwarf_reg_sizes_constant): Declare.
54394 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
54396 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
54398 PR tree-optimization/105043
54399 * doc/extend.texi (Object Size Checking): Split out into two
54400 subsections and mention _FORTIFY_SOURCE.
54402 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
54404 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
54405 RTL expansion to allow condition (mask) to be shared/reused,
54406 by avoiding overwriting pseudos and adding REG_EQUAL notes.
54408 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
54411 * config/i386/i386-features.cc
54412 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
54413 the gain/cost of converting a MEM operand.
54415 2023-01-03 Jakub Jelinek <jakub@redhat.com>
54417 PR middle-end/108264
54418 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
54419 from source which doesn't have scalar integral mode first convert
54422 2023-01-03 Jakub Jelinek <jakub@redhat.com>
54424 PR rtl-optimization/108263
54425 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
54428 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
54431 * config/i386/lujiazui.md (lujiazui_div): New automaton.
54432 (lua_div): New unit.
54433 (lua_idiv_qi): Correct unit in the reservation.
54434 (lua_idiv_qi_load): Ditto.
54435 (lua_idiv_hi): Ditto.
54436 (lua_idiv_hi_load): Ditto.
54437 (lua_idiv_si): Ditto.
54438 (lua_idiv_si_load): Ditto.
54439 (lua_idiv_di): Ditto.
54440 (lua_idiv_di_load): Ditto.
54441 (lua_fdiv_SF): Ditto.
54442 (lua_fdiv_SF_load): Ditto.
54443 (lua_fdiv_DF): Ditto.
54444 (lua_fdiv_DF_load): Ditto.
54445 (lua_fdiv_XF): Ditto.
54446 (lua_fdiv_XF_load): Ditto.
54447 (lua_ssediv_SF): Ditto.
54448 (lua_ssediv_load_SF): Ditto.
54449 (lua_ssediv_V4SF): Ditto.
54450 (lua_ssediv_load_V4SF): Ditto.
54451 (lua_ssediv_V8SF): Ditto.
54452 (lua_ssediv_load_V8SF): Ditto.
54453 (lua_ssediv_SD): Ditto.
54454 (lua_ssediv_load_SD): Ditto.
54455 (lua_ssediv_V2DF): Ditto.
54456 (lua_ssediv_load_V2DF): Ditto.
54457 (lua_ssediv_V4DF): Ditto.
54458 (lua_ssediv_load_V4DF): Ditto.
54460 2023-01-02 Florian Weimer <fweimer@redhat.com>
54462 * debug.h (dwarf_reg_sizes_constant): Declare.
54463 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
54465 2023-01-02 Florian Weimer <fweimer@redhat.com>
54467 * dwarf2cfi.cc (init_return_column_size): Remove.
54468 (init_one_dwarf_reg_size): Adjust.
54469 (generate_dwarf_reg_sizes): New function. Extracted
54470 from expand_builtin_init_dwarf_reg_sizes.
54471 (expand_builtin_init_dwarf_reg_sizes): Call
54472 generate_dwarf_reg_sizes.
54473 * target.def (init_dwarf_reg_sizes_extra): Adjust
54475 * config/msp430/msp430.cc
54476 (msp430_init_dwarf_reg_sizes_extra): Adjust.
54477 * config/rs6000/rs6000.cc
54478 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
54479 * doc/tm.texi: Update.
54481 2023-01-02 Jakub Jelinek <jakub@redhat.com>
54483 * gcc.cc (process_command): Update copyright notice dates.
54484 * gcov-dump.cc (print_version): Ditto.
54485 * gcov.cc (print_version): Ditto.
54486 * gcov-tool.cc (print_version): Ditto.
54487 * gengtype.cc (create_file): Ditto.
54488 * doc/cpp.texi: Bump @copying's copyright year.
54489 * doc/cppinternals.texi: Ditto.
54490 * doc/gcc.texi: Ditto.
54491 * doc/gccint.texi: Ditto.
54492 * doc/gcov.texi: Ditto.
54493 * doc/install.texi: Ditto.
54494 * doc/invoke.texi: Ditto.
54496 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
54497 Uroš Bizjak <ubizjak@gmail.com>
54499 * config/i386/i386.md (extendditi2): New define_insn.
54500 (define_split): Use DWIH mode iterator to treat new extendditi2
54501 identically to existing extendsidi2_1.
54502 (define_peephole2): Likewise.
54503 (define_peephole2): Likewise.
54504 (define_Split): Likewise.
54507 Copyright (C) 2023 Free Software Foundation, Inc.
54509 Copying and distribution of this file, with or without modification,
54510 are permitted in any medium without royalty provided the copyright
54511 notice and this notice are preserved.