Do not do src->dest copy if register would not be allocated a normal register
[official-gcc.git] / gcc / regmove.c
blobf932da8417dede37ba046f1b2b9d789ba70bb616
1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This module looks for cases where matching constraints would force
22 an instruction to need a reload, and this reload would be a register
23 to register move. It then attempts to change the registers used by the
24 instruction to avoid the move instruction. */
26 #include "config.h"
27 #ifdef __STDC__
28 #include <stdarg.h>
29 #else
30 #include <varargs.h>
31 #endif
33 /* stdio.h must precede rtl.h for FFS. */
34 #include "system.h"
36 #include "rtl.h"
37 #include "insn-config.h"
38 #include "recog.h"
39 #include "output.h"
40 #include "reload.h"
41 #include "regs.h"
42 #include "hard-reg-set.h"
43 #include "flags.h"
44 #include "expr.h"
45 #include "insn-flags.h"
46 #include "basic-block.h"
48 static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx));
49 static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx));
50 static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx));
51 static rtx gen_add3_insn PROTO((rtx, rtx, rtx));
52 static void copy_src_to_dest PROTO((rtx, rtx, rtx, int));
53 static int *regmove_bb_head;
55 struct match {
56 int with[MAX_RECOG_OPERANDS];
57 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
58 int commutative[MAX_RECOG_OPERANDS];
59 int early_clobber[MAX_RECOG_OPERANDS];
62 #ifdef AUTO_INC_DEC
63 static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
64 #endif
65 static int find_matches PROTO((rtx, struct match *));
66 static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
68 static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx));
69 static int stable_but_for_p PROTO((rtx, rtx, rtx));
70 static int loop_depth;
72 /* Generate and return an insn body to add r1 and c,
73 storing the result in r0. */
74 static rtx
75 gen_add3_insn (r0, r1, c)
76 rtx r0, r1, c;
78 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
80 if (icode == CODE_FOR_nothing
81 || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0])
82 || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1])
83 || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2]))
84 return NULL_RTX;
86 return (GEN_FCN (icode) (r0, r1, c));
89 #ifdef AUTO_INC_DEC
91 /* INC_INSN is an instruction that adds INCREMENT to REG.
92 Try to fold INC_INSN as a post/pre in/decrement into INSN.
93 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
94 Return nonzero for success. */
95 static int
96 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
97 rtx reg, insn, inc_insn ,inc_insn_set;
98 HOST_WIDE_INT increment;
99 int pre;
101 enum rtx_code inc_code;
103 rtx pset = single_set (insn);
104 if (pset)
106 /* Can't use the size of SET_SRC, we might have something like
107 (sign_extend:SI (mem:QI ... */
108 rtx use = find_use_as_address (pset, reg, 0);
109 if (use != 0 && use != (rtx) 1)
111 int size = GET_MODE_SIZE (GET_MODE (use));
112 if (0
113 #ifdef HAVE_POST_INCREMENT
114 || (pre == 0 && (inc_code = POST_INC, increment == size))
115 #endif
116 #ifdef HAVE_PRE_INCREMENT
117 || (pre == 1 && (inc_code = PRE_INC, increment == size))
118 #endif
119 #ifdef HAVE_POST_DECREMENT
120 || (pre == 0 && (inc_code = POST_DEC, increment == -size))
121 #endif
122 #ifdef HAVE_PRE_DECREMENT
123 || (pre == 1 && (inc_code = PRE_DEC, increment == -size))
124 #endif
127 if (inc_insn_set)
128 validate_change
129 (inc_insn,
130 &SET_SRC (inc_insn_set),
131 XEXP (SET_SRC (inc_insn_set), 0), 1);
132 validate_change (insn, &XEXP (use, 0),
133 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
134 if (apply_change_group ())
136 REG_NOTES (insn)
137 = gen_rtx_EXPR_LIST (REG_INC,
138 reg, REG_NOTES (insn));
139 if (! inc_insn_set)
141 PUT_CODE (inc_insn, NOTE);
142 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
143 NOTE_SOURCE_FILE (inc_insn) = 0;
145 return 1;
150 return 0;
152 #endif /* AUTO_INC_DEC */
154 static int *regno_src_regno;
156 /* Indicate how good a choice REG (which appears as a source) is to replace
157 a destination register with. The higher the returned value, the better
158 the choice. The main objective is to avoid using a register that is
159 a candidate for tying to a hard register, since the output might in
160 turn be a candidate to be tied to a different hard register. */
162 replacement_quality(reg)
163 rtx reg;
165 int src_regno;
167 /* Bad if this isn't a register at all. */
168 if (GET_CODE (reg) != REG)
169 return 0;
171 /* If this register is not meant to get a hard register,
172 it is a poor choice. */
173 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
174 return 0;
176 src_regno = regno_src_regno[REGNO (reg)];
178 /* If it was not copied from another register, it is fine. */
179 if (src_regno < 0)
180 return 3;
182 /* Copied from a hard register? */
183 if (src_regno < FIRST_PSEUDO_REGISTER)
184 return 1;
186 /* Copied from a pseudo register - not as bad as from a hard register,
187 yet still cumbersome, since the register live length will be lengthened
188 when the registers get tied. */
189 return 2;
192 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
193 in INSN.
195 Search forward to see if SRC dies before either it or DEST is modified,
196 but don't scan past the end of a basic block. If so, we can replace SRC
197 with DEST and let SRC die in INSN.
199 This will reduce the number of registers live in that range and may enable
200 DEST to be tied to SRC, thus often saving one register in addition to a
201 register-register copy. */
203 static int
204 optimize_reg_copy_1 (insn, dest, src)
205 rtx insn;
206 rtx dest;
207 rtx src;
209 rtx p, q;
210 rtx note;
211 rtx dest_death = 0;
212 int sregno = REGNO (src);
213 int dregno = REGNO (dest);
215 /* We don't want to mess with hard regs if register classes are small. */
216 if (sregno == dregno
217 || (SMALL_REGISTER_CLASSES
218 && (sregno < FIRST_PSEUDO_REGISTER
219 || dregno < FIRST_PSEUDO_REGISTER))
220 /* We don't see all updates to SP if they are in an auto-inc memory
221 reference, so we must disallow this optimization on them. */
222 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
223 return 0;
225 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
227 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
228 || (GET_CODE (p) == NOTE
229 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
230 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
231 break;
233 /* ??? We can't scan past the end of a basic block without updating
234 the register lifetime info (REG_DEAD/basic_block_live_at_start).
235 A CALL_INSN might be the last insn of a basic block, if it is inside
236 an EH region. There is no easy way to tell, so we just always break
237 when we see a CALL_INSN if flag_exceptions is nonzero. */
238 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
239 break;
241 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
242 continue;
244 if (reg_set_p (src, p) || reg_set_p (dest, p)
245 /* Don't change a USE of a register. */
246 || (GET_CODE (PATTERN (p)) == USE
247 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
248 break;
250 /* See if all of SRC dies in P. This test is slightly more
251 conservative than it needs to be. */
252 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
253 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
255 int failed = 0;
256 int length = 0;
257 int d_length = 0;
258 int n_calls = 0;
259 int d_n_calls = 0;
261 /* We can do the optimization. Scan forward from INSN again,
262 replacing regs as we go. Set FAILED if a replacement can't
263 be done. In that case, we can't move the death note for SRC.
264 This should be rare. */
266 /* Set to stop at next insn. */
267 for (q = next_real_insn (insn);
268 q != next_real_insn (p);
269 q = next_real_insn (q))
271 if (reg_overlap_mentioned_p (src, PATTERN (q)))
273 /* If SRC is a hard register, we might miss some
274 overlapping registers with validate_replace_rtx,
275 so we would have to undo it. We can't if DEST is
276 present in the insn, so fail in that combination
277 of cases. */
278 if (sregno < FIRST_PSEUDO_REGISTER
279 && reg_mentioned_p (dest, PATTERN (q)))
280 failed = 1;
282 /* Replace all uses and make sure that the register
283 isn't still present. */
284 else if (validate_replace_rtx (src, dest, q)
285 && (sregno >= FIRST_PSEUDO_REGISTER
286 || ! reg_overlap_mentioned_p (src,
287 PATTERN (q))))
289 /* We assume that a register is used exactly once per
290 insn in the updates below. If this is not correct,
291 no great harm is done. */
292 if (sregno >= FIRST_PSEUDO_REGISTER)
293 REG_N_REFS (sregno) -= loop_depth;
294 if (dregno >= FIRST_PSEUDO_REGISTER)
295 REG_N_REFS (dregno) += loop_depth;
297 else
299 validate_replace_rtx (dest, src, q);
300 failed = 1;
304 /* Count the insns and CALL_INSNs passed. If we passed the
305 death note of DEST, show increased live length. */
306 length++;
307 if (dest_death)
308 d_length++;
310 /* If the insn in which SRC dies is a CALL_INSN, don't count it
311 as a call that has been crossed. Otherwise, count it. */
312 if (q != p && GET_CODE (q) == CALL_INSN)
314 n_calls++;
315 if (dest_death)
316 d_n_calls++;
319 /* If DEST dies here, remove the death note and save it for
320 later. Make sure ALL of DEST dies here; again, this is
321 overly conservative. */
322 if (dest_death == 0
323 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
325 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
326 failed = 1, dest_death = 0;
327 else
328 remove_note (q, dest_death);
332 if (! failed)
334 if (sregno >= FIRST_PSEUDO_REGISTER)
336 if (REG_LIVE_LENGTH (sregno) >= 0)
338 REG_LIVE_LENGTH (sregno) -= length;
339 /* REG_LIVE_LENGTH is only an approximation after
340 combine if sched is not run, so make sure that we
341 still have a reasonable value. */
342 if (REG_LIVE_LENGTH (sregno) < 2)
343 REG_LIVE_LENGTH (sregno) = 2;
346 REG_N_CALLS_CROSSED (sregno) -= n_calls;
349 if (dregno >= FIRST_PSEUDO_REGISTER)
351 if (REG_LIVE_LENGTH (dregno) >= 0)
352 REG_LIVE_LENGTH (dregno) += d_length;
354 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
357 /* Move death note of SRC from P to INSN. */
358 remove_note (p, note);
359 XEXP (note, 1) = REG_NOTES (insn);
360 REG_NOTES (insn) = note;
363 /* Put death note of DEST on P if we saw it die. */
364 if (dest_death)
366 XEXP (dest_death, 1) = REG_NOTES (p);
367 REG_NOTES (p) = dest_death;
370 return ! failed;
373 /* If SRC is a hard register which is set or killed in some other
374 way, we can't do this optimization. */
375 else if (sregno < FIRST_PSEUDO_REGISTER
376 && dead_or_set_p (p, src))
377 break;
379 return 0;
382 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
383 a sequence of insns that modify DEST followed by an insn that sets
384 SRC to DEST in which DEST dies, with no prior modification of DEST.
385 (There is no need to check if the insns in between actually modify
386 DEST. We should not have cases where DEST is not modified, but
387 the optimization is safe if no such modification is detected.)
388 In that case, we can replace all uses of DEST, starting with INSN and
389 ending with the set of SRC to DEST, with SRC. We do not do this
390 optimization if a CALL_INSN is crossed unless SRC already crosses a
391 call or if DEST dies before the copy back to SRC.
393 It is assumed that DEST and SRC are pseudos; it is too complicated to do
394 this for hard registers since the substitutions we may make might fail. */
396 static void
397 optimize_reg_copy_2 (insn, dest, src)
398 rtx insn;
399 rtx dest;
400 rtx src;
402 rtx p, q;
403 rtx set;
404 int sregno = REGNO (src);
405 int dregno = REGNO (dest);
407 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
409 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
410 || (GET_CODE (p) == NOTE
411 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
412 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
413 break;
415 /* ??? We can't scan past the end of a basic block without updating
416 the register lifetime info (REG_DEAD/basic_block_live_at_start).
417 A CALL_INSN might be the last insn of a basic block, if it is inside
418 an EH region. There is no easy way to tell, so we just always break
419 when we see a CALL_INSN if flag_exceptions is nonzero. */
420 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
421 break;
423 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
424 continue;
426 set = single_set (p);
427 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
428 && find_reg_note (p, REG_DEAD, dest))
430 /* We can do the optimization. Scan forward from INSN again,
431 replacing regs as we go. */
433 /* Set to stop at next insn. */
434 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
435 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
437 if (reg_mentioned_p (dest, PATTERN (q)))
439 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
441 /* We assume that a register is used exactly once per
442 insn in the updates below. If this is not correct,
443 no great harm is done. */
444 REG_N_REFS (dregno) -= loop_depth;
445 REG_N_REFS (sregno) += loop_depth;
449 if (GET_CODE (q) == CALL_INSN)
451 REG_N_CALLS_CROSSED (dregno)--;
452 REG_N_CALLS_CROSSED (sregno)++;
456 remove_note (p, find_reg_note (p, REG_DEAD, dest));
457 REG_N_DEATHS (dregno)--;
458 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
459 REG_N_DEATHS (sregno)--;
460 return;
463 if (reg_set_p (src, p)
464 || find_reg_note (p, REG_DEAD, dest)
465 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
466 break;
469 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
470 Look if SRC dies there, and if it is only set once, by loading
471 it from memory. If so, try to encorporate the zero/sign extension
472 into the memory read, change SRC to the mode of DEST, and alter
473 the remaining accesses to use the appropriate SUBREG. This allows
474 SRC and DEST to be tied later. */
475 static void
476 optimize_reg_copy_3 (insn, dest, src)
477 rtx insn;
478 rtx dest;
479 rtx src;
481 rtx src_reg = XEXP (src, 0);
482 int src_no = REGNO (src_reg);
483 int dst_no = REGNO (dest);
484 rtx p, set, subreg;
485 enum machine_mode old_mode;
487 if (src_no < FIRST_PSEUDO_REGISTER
488 || dst_no < FIRST_PSEUDO_REGISTER
489 || ! find_reg_note (insn, REG_DEAD, src_reg)
490 || REG_N_SETS (src_no) != 1)
491 return;
492 for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p))
494 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
495 || (GET_CODE (p) == NOTE
496 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
497 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
498 return;
500 /* ??? We can't scan past the end of a basic block without updating
501 the register lifetime info (REG_DEAD/basic_block_live_at_start).
502 A CALL_INSN might be the last insn of a basic block, if it is inside
503 an EH region. There is no easy way to tell, so we just always break
504 when we see a CALL_INSN if flag_exceptions is nonzero. */
505 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
506 return;
508 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
509 continue;
511 if (! (set = single_set (p))
512 || GET_CODE (SET_SRC (set)) != MEM
513 || SET_DEST (set) != src_reg)
514 return;
515 old_mode = GET_MODE (src_reg);
516 PUT_MODE (src_reg, GET_MODE (src));
517 XEXP (src, 0) = SET_SRC (set);
518 if (! validate_change (p, &SET_SRC (set), src, 0))
520 PUT_MODE (src_reg, old_mode);
521 XEXP (src, 0) = src_reg;
522 return;
524 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
525 while (p = NEXT_INSN (p), p != insn)
527 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
528 continue;
529 validate_replace_rtx (src_reg, subreg, p);
531 validate_replace_rtx (src, src_reg, insn);
535 /* If we were not able to update the users of src to use dest directly, try
536 instead moving the value to dest directly before the operation. */
538 void
539 copy_src_to_dest (insn, src, dest, loop_depth)
540 rtx insn;
541 rtx src;
542 rtx dest;
544 rtx seq;
545 rtx link;
546 rtx next;
547 rtx set;
548 rtx move_insn;
549 rtx *p_insn_notes;
550 rtx *p_move_notes;
551 int i;
552 int src_regno;
553 int dest_regno;
554 int bb;
555 int insn_uid;
556 int move_uid;
558 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
559 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
560 parameter when there is no frame pointer that is not allocated a register.
561 For now, we just reject them, rather than incrementing the live length. */
563 if (GET_CODE (src) == REG && GET_CODE (dest) == REG
564 && (set = single_set (insn)) != NULL_RTX
565 && !reg_mentioned_p (dest, SET_SRC (set))
566 && REG_LIVE_LENGTH (REGNO (dest)) > 0
567 && REG_LIVE_LENGTH (REGNO (src)) > 0
568 && validate_replace_rtx (src, dest, insn))
570 /* Generate the src->dest move. */
571 start_sequence ();
572 emit_move_insn (dest, src);
573 seq = gen_sequence ();
574 end_sequence ();
575 emit_insn_before (seq, insn);
576 move_insn = PREV_INSN (insn);
577 p_move_notes = &REG_NOTES (move_insn);
578 p_insn_notes = &REG_NOTES (insn);
580 /* Move any notes mentioning src to the move instruction */
581 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
583 next = XEXP (link, 1);
584 if (XEXP (link, 0) == src)
586 *p_move_notes = link;
587 p_move_notes = &XEXP (link, 1);
589 else
591 *p_insn_notes = link;
592 p_insn_notes = &XEXP (link, 1);
596 *p_move_notes = NULL_RTX;
597 *p_insn_notes = NULL_RTX;
599 /* Is the insn the head of a basic block? If so extend it */
600 insn_uid = INSN_UID (insn);
601 move_uid = INSN_UID (move_insn);
602 bb = regmove_bb_head[insn_uid];
603 if (bb >= 0)
605 basic_block_head[bb] = move_insn;
606 regmove_bb_head[insn_uid] = -1;
609 /* Update the various register tables. */
610 dest_regno = REGNO (dest);
611 REG_N_SETS (dest_regno) += loop_depth;
612 REG_N_REFS (dest_regno) += loop_depth;
613 REG_LIVE_LENGTH (dest_regno)++;
614 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
615 REGNO_FIRST_UID (dest_regno) = move_uid;
617 src_regno = REGNO (src);
618 if (! find_reg_note (move_insn, REG_DEAD, src))
619 REG_LIVE_LENGTH (src_regno)++;
621 if (REGNO_FIRST_UID (src_regno) == insn_uid)
622 REGNO_FIRST_UID (src_regno) = move_uid;
624 if (REGNO_LAST_UID (src_regno) == insn_uid)
625 REGNO_LAST_UID (src_regno) = move_uid;
627 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
628 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
633 /* Return whether REG is set in only one location, and is set to a
634 constant, but is set in a different basic block from INSN (an
635 instructions which uses REG). In this case REG is equivalent to a
636 constant, and we don't want to break that equivalence, because that
637 may increase register pressure and make reload harder. If REG is
638 set in the same basic block as INSN, we don't worry about it,
639 because we'll probably need a register anyhow (??? but what if REG
640 is used in a different basic block as well as this one?). FIRST is
641 the first insn in the function. */
643 static int
644 reg_is_remote_constant_p (reg, insn, first)
645 rtx reg;
646 rtx insn;
647 rtx first;
649 register rtx p;
651 if (REG_N_SETS (REGNO (reg)) != 1)
652 return 0;
654 /* Look for the set. */
655 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
657 rtx s;
659 if (REG_NOTE_KIND (p) != 0)
660 continue;
661 s = single_set (XEXP (p, 0));
662 if (s != 0
663 && GET_CODE (SET_DEST (s)) == REG
664 && REGNO (SET_DEST (s)) == REGNO (reg))
666 /* The register is set in the same basic block. */
667 return 0;
671 for (p = first; p && p != insn; p = NEXT_INSN (p))
673 rtx s;
675 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
676 continue;
677 s = single_set (p);
678 if (s != 0
679 && GET_CODE (SET_DEST (s)) == REG
680 && REGNO (SET_DEST (s)) == REGNO (reg))
682 /* This is the instruction which sets REG. If there is a
683 REG_EQUAL note, then REG is equivalent to a constant. */
684 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
685 return 1;
686 return 0;
690 return 0;
693 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
694 another add immediate instruction with the same source and dest registers,
695 and if we find one, we change INSN to an increment, and return 1. If
696 no changes are made, we return 0.
698 This changes
699 (set (reg100) (plus reg1 offset1))
701 (set (reg100) (plus reg1 offset2))
703 (set (reg100) (plus reg1 offset1))
705 (set (reg100) (plus reg100 offset2-offset1)) */
707 /* ??? What does this comment mean? */
708 /* cse disrupts preincrement / postdecrement squences when it finds a
709 hard register as ultimate source, like the frame pointer. */
712 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
713 rtx insn, dst, src, offset;
714 FILE *regmove_dump_file;
716 rtx p, dst_death = 0;
717 int length, num_calls = 0;
719 /* If SRC dies in INSN, we'd have to move the death note. This is
720 considered to be very unlikely, so we just skip the optimization
721 in this case. */
722 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
723 return 0;
725 /* Scan backward to find the first instruction that sets DST. */
727 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
729 rtx pset;
731 if (GET_CODE (p) == CODE_LABEL
732 || GET_CODE (p) == JUMP_INSN
733 || (GET_CODE (p) == NOTE
734 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
735 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
736 break;
738 /* ??? We can't scan past the end of a basic block without updating
739 the register lifetime info (REG_DEAD/basic_block_live_at_start).
740 A CALL_INSN might be the last insn of a basic block, if it is inside
741 an EH region. There is no easy way to tell, so we just always break
742 when we see a CALL_INSN if flag_exceptions is nonzero. */
743 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
744 break;
746 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
747 continue;
749 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
750 dst_death = p;
751 if (! dst_death)
752 length++;
754 pset = single_set (p);
755 if (pset && SET_DEST (pset) == dst
756 && GET_CODE (SET_SRC (pset)) == PLUS
757 && XEXP (SET_SRC (pset), 0) == src
758 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
760 HOST_WIDE_INT newconst
761 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
762 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
764 if (add && validate_change (insn, &PATTERN (insn), add, 0))
766 /* Remove the death note for DST from DST_DEATH. */
767 if (dst_death)
769 remove_death (REGNO (dst), dst_death);
770 REG_LIVE_LENGTH (REGNO (dst)) += length;
771 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
774 REG_N_REFS (REGNO (dst)) += loop_depth;
775 REG_N_REFS (REGNO (src)) -= loop_depth;
777 if (regmove_dump_file)
778 fprintf (regmove_dump_file,
779 "Fixed operand of insn %d.\n",
780 INSN_UID (insn));
782 #ifdef AUTO_INC_DEC
783 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
785 if (GET_CODE (p) == CODE_LABEL
786 || GET_CODE (p) == JUMP_INSN
787 || (GET_CODE (p) == NOTE
788 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
789 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
790 break;
791 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
793 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
794 return 1;
795 break;
798 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
800 if (GET_CODE (p) == CODE_LABEL
801 || GET_CODE (p) == JUMP_INSN
802 || (GET_CODE (p) == NOTE
803 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
804 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
805 break;
806 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
808 try_auto_increment (p, insn, 0, dst, newconst, 1);
809 break;
812 #endif
813 return 1;
817 if (reg_set_p (dst, PATTERN (p)))
818 break;
820 /* If we have passed a call instruction, and the
821 pseudo-reg SRC is not already live across a call,
822 then don't perform the optimization. */
823 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
824 hard regs are clobbered. Thus, we only use it for src for
825 non-call insns. */
826 if (GET_CODE (p) == CALL_INSN)
828 if (! dst_death)
829 num_calls++;
831 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
832 break;
834 if (call_used_regs [REGNO (dst)]
835 || find_reg_fusage (p, CLOBBER, dst))
836 break;
838 else if (reg_set_p (src, PATTERN (p)))
839 break;
842 return 0;
845 void
846 regmove_optimize (f, nregs, regmove_dump_file)
847 rtx f;
848 int nregs;
849 FILE *regmove_dump_file;
851 rtx insn;
852 struct match match;
853 int pass;
854 int maxregnum = max_reg_num (), i;
855 rtx copy_src, copy_dst;
857 regno_src_regno = (int *)alloca (sizeof *regno_src_regno * maxregnum);
858 for (i = maxregnum; --i >= 0; ) regno_src_regno[i] = -1;
860 regmove_bb_head = (int *)alloca (sizeof (int) * (get_max_uid () + 1));
861 for (i = get_max_uid (); --i >= 0; ) regmove_bb_head[i] = -1;
862 for (i = 0; i < n_basic_blocks; i++)
863 regmove_bb_head[INSN_UID (basic_block_head[i])] = i;
865 /* A forward/backward pass. Replace output operands with input operands. */
867 loop_depth = 1;
869 for (pass = 0; pass <= 2; pass++)
871 if (! flag_regmove && pass >= flag_expensive_optimizations)
872 return;
874 if (regmove_dump_file)
875 fprintf (regmove_dump_file, "Starting %s pass...\n",
876 pass ? "backward" : "forward");
878 for (insn = pass ? get_last_insn () : f; insn;
879 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
881 rtx set;
882 int insn_code_number;
883 int operand_number, match_number;
885 if (GET_CODE (insn) == NOTE)
887 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
888 loop_depth++;
889 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
890 loop_depth--;
893 set = single_set (insn);
894 if (! set)
895 continue;
897 if (flag_expensive_optimizations && ! pass
898 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
899 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
900 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
901 && GET_CODE (SET_DEST(set)) == REG)
902 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
904 if (flag_expensive_optimizations && ! pass
905 && GET_CODE (SET_SRC (set)) == REG
906 && GET_CODE (SET_DEST(set)) == REG)
908 /* If this is a register-register copy where SRC is not dead,
909 see if we can optimize it. If this optimization succeeds,
910 it will become a copy where SRC is dead. */
911 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
912 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
913 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
915 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
916 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
917 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
918 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
919 && SET_SRC (set) != SET_DEST (set))
921 int srcregno = REGNO (SET_SRC(set));
922 if (regno_src_regno[srcregno] >= 0)
923 srcregno = regno_src_regno[srcregno];
924 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
928 #ifdef REGISTER_CONSTRAINTS
929 insn_code_number
930 = find_matches (insn, &match);
932 if (insn_code_number < 0)
933 continue;
935 /* Now scan through the operands looking for a source operand
936 which is supposed to match the destination operand.
937 Then scan forward for an instruction which uses the dest
938 operand.
939 If it dies there, then replace the dest in both operands with
940 the source operand. */
942 for (operand_number = 0;
943 operand_number < insn_n_operands[insn_code_number];
944 operand_number++)
946 rtx src, dst, src_subreg;
947 enum reg_class src_class, dst_class;
949 match_number = match.with[operand_number];
951 /* Nothing to do if the two operands aren't supposed to match. */
952 if (match_number < 0)
953 continue;
955 src = recog_operand[operand_number];
956 dst = recog_operand[match_number];
958 if (GET_CODE (src) != REG)
959 continue;
961 src_subreg = src;
962 if (GET_CODE (dst) == SUBREG
963 && GET_MODE_SIZE (GET_MODE (dst))
964 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
966 src_subreg
967 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
968 src, SUBREG_WORD (dst));
969 dst = SUBREG_REG (dst);
971 if (GET_CODE (dst) != REG
972 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
973 continue;
975 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
977 if (match.commutative[operand_number] < operand_number)
978 regno_src_regno[REGNO (dst)] = REGNO (src);
979 continue;
982 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
983 continue;
985 /* operand_number/src must be a read-only operand, and
986 match_operand/dst must be a write-only operand. */
987 if (match.use[operand_number] != READ
988 || match.use[match_number] != WRITE)
989 continue;
991 if (match.early_clobber[match_number]
992 && count_occurrences (PATTERN (insn), src) > 1)
993 continue;
995 /* Make sure match_operand is the destination. */
996 if (recog_operand[match_number] != SET_DEST (set))
997 continue;
999 /* If the operands already match, then there is nothing to do. */
1000 /* But in the commutative case, we might find a better match. */
1001 if (operands_match_p (src, dst)
1002 || (match.commutative[operand_number] >= 0
1003 && operands_match_p (recog_operand[match.commutative
1004 [operand_number]], dst)
1005 && (replacement_quality (recog_operand[match.commutative
1006 [operand_number]])
1007 >= replacement_quality (src))))
1008 continue;
1010 src_class = reg_preferred_class (REGNO (src));
1011 dst_class = reg_preferred_class (REGNO (dst));
1012 if (src_class != dst_class
1013 && (! reg_class_subset_p (src_class, dst_class)
1014 || CLASS_LIKELY_SPILLED_P (src_class))
1015 && (! reg_class_subset_p (dst_class, src_class)
1016 || CLASS_LIKELY_SPILLED_P (dst_class)))
1017 continue;
1019 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1020 operand_number, match_number,
1021 regmove_dump_file))
1022 break;
1027 /* A backward pass. Replace input operands with output operands. */
1029 if (regmove_dump_file)
1030 fprintf (regmove_dump_file, "Starting backward pass...\n");
1032 loop_depth = 1;
1034 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1036 if (GET_CODE (insn) == NOTE)
1038 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1039 loop_depth++;
1040 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1041 loop_depth--;
1043 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1045 int insn_code_number = find_matches (insn, &match);
1046 int operand_number, match_number;
1047 int success = 0;
1049 if (insn_code_number < 0)
1050 continue;
1052 /* Now scan through the operands looking for a destination operand
1053 which is supposed to match a source operand.
1054 Then scan backward for an instruction which sets the source
1055 operand. If safe, then replace the source operand with the
1056 dest operand in both instructions. */
1058 copy_src = NULL_RTX;
1059 copy_dst = NULL_RTX;
1060 for (operand_number = 0;
1061 operand_number < insn_n_operands[insn_code_number];
1062 operand_number++)
1064 rtx set, p, src, dst;
1065 rtx src_note, dst_note;
1066 int num_calls = 0;
1067 enum reg_class src_class, dst_class;
1068 int length;
1070 match_number = match.with[operand_number];
1072 /* Nothing to do if the two operands aren't supposed to match. */
1073 if (match_number < 0)
1074 continue;
1076 dst = recog_operand[match_number];
1077 src = recog_operand[operand_number];
1079 if (GET_CODE (src) != REG)
1080 continue;
1082 if (GET_CODE (dst) != REG
1083 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1084 || REG_LIVE_LENGTH (REGNO (dst)) < 0)
1085 continue;
1087 /* If the operands already match, then there is nothing to do. */
1088 if (operands_match_p (src, dst)
1089 || (match.commutative[operand_number] >= 0
1090 && operands_match_p (recog_operand[match.commutative[operand_number]], dst)))
1091 continue;
1093 set = single_set (insn);
1094 if (! set)
1095 continue;
1097 /* match_number/dst must be a write-only operand, and
1098 operand_operand/src must be a read-only operand. */
1099 if (match.use[operand_number] != READ
1100 || match.use[match_number] != WRITE)
1101 continue;
1103 if (match.early_clobber[match_number]
1104 && count_occurrences (PATTERN (insn), src) > 1)
1105 continue;
1107 /* Make sure match_number is the destination. */
1108 if (recog_operand[match_number] != SET_DEST (set))
1109 continue;
1111 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1113 if (GET_CODE (SET_SRC (set)) == PLUS
1114 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1115 && XEXP (SET_SRC (set), 0) == src
1116 && fixup_match_2 (insn, dst, src,
1117 XEXP (SET_SRC (set), 1),
1118 regmove_dump_file))
1119 break;
1120 continue;
1122 src_class = reg_preferred_class (REGNO (src));
1123 dst_class = reg_preferred_class (REGNO (dst));
1124 if (src_class != dst_class
1125 && (! reg_class_subset_p (src_class, dst_class)
1126 || CLASS_LIKELY_SPILLED_P (src_class))
1127 && (! reg_class_subset_p (dst_class, src_class)
1128 || CLASS_LIKELY_SPILLED_P (dst_class)))
1130 if (!copy_src)
1132 copy_src = src;
1133 copy_dst = dst;
1135 continue;
1138 /* Can not modify an earlier insn to set dst if this insn
1139 uses an old value in the source. */
1140 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1142 if (!copy_src)
1144 copy_src = src;
1145 copy_dst = dst;
1147 continue;
1150 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1152 if (!copy_src)
1154 copy_src = src;
1155 copy_dst = dst;
1157 continue;
1161 /* If src is set once in a different basic block,
1162 and is set equal to a constant, then do not use
1163 it for this optimization, as this would make it
1164 no longer equivalent to a constant. */
1166 if (reg_is_remote_constant_p (src, insn, f))
1168 if (!copy_src)
1170 copy_src = src;
1171 copy_dst = dst;
1173 continue;
1177 if (regmove_dump_file)
1178 fprintf (regmove_dump_file,
1179 "Could fix operand %d of insn %d matching operand %d.\n",
1180 operand_number, INSN_UID (insn), match_number);
1182 /* Scan backward to find the first instruction that uses
1183 the input operand. If the operand is set here, then
1184 replace it in both instructions with match_number. */
1186 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1188 rtx pset;
1190 if (GET_CODE (p) == CODE_LABEL
1191 || GET_CODE (p) == JUMP_INSN
1192 || (GET_CODE (p) == NOTE
1193 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1194 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1195 break;
1197 /* ??? We can't scan past the end of a basic block without
1198 updating the register lifetime info
1199 (REG_DEAD/basic_block_live_at_start).
1200 A CALL_INSN might be the last insn of a basic block, if
1201 it is inside an EH region. There is no easy way to tell,
1202 so we just always break when we see a CALL_INSN if
1203 flag_exceptions is nonzero. */
1204 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1205 break;
1207 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1208 continue;
1210 length++;
1212 /* ??? See if all of SRC is set in P. This test is much
1213 more conservative than it needs to be. */
1214 pset = single_set (p);
1215 if (pset && SET_DEST (pset) == src)
1217 /* We use validate_replace_rtx, in case there
1218 are multiple identical source operands. All of
1219 them have to be changed at the same time. */
1220 if (validate_replace_rtx (src, dst, insn))
1222 if (validate_change (p, &SET_DEST (pset),
1223 dst, 0))
1224 success = 1;
1225 else
1227 /* Change all source operands back.
1228 This modifies the dst as a side-effect. */
1229 validate_replace_rtx (dst, src, insn);
1230 /* Now make sure the dst is right. */
1231 validate_change (insn,
1232 recog_operand_loc[match_number],
1233 dst, 0);
1236 break;
1239 if (reg_overlap_mentioned_p (src, PATTERN (p))
1240 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1241 break;
1243 /* If we have passed a call instruction, and the
1244 pseudo-reg DST is not already live across a call,
1245 then don't perform the optimization. */
1246 if (GET_CODE (p) == CALL_INSN)
1248 num_calls++;
1250 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1251 break;
1255 if (success)
1257 int dstno, srcno;
1259 /* Remove the death note for SRC from INSN. */
1260 remove_note (insn, src_note);
1261 /* Move the death note for SRC to P if it is used
1262 there. */
1263 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1265 XEXP (src_note, 1) = REG_NOTES (p);
1266 REG_NOTES (p) = src_note;
1268 /* If there is a REG_DEAD note for DST on P, then remove
1269 it, because DST is now set there. */
1270 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1271 remove_note (p, dst_note);
1273 dstno = REGNO (dst);
1274 srcno = REGNO (src);
1276 REG_N_SETS (dstno)++;
1277 REG_N_SETS (srcno)--;
1279 REG_N_CALLS_CROSSED (dstno) += num_calls;
1280 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1282 REG_LIVE_LENGTH (dstno) += length;
1283 if (REG_LIVE_LENGTH (srcno) >= 0)
1285 REG_LIVE_LENGTH (srcno) -= length;
1286 /* REG_LIVE_LENGTH is only an approximation after
1287 combine if sched is not run, so make sure that we
1288 still have a reasonable value. */
1289 if (REG_LIVE_LENGTH (srcno) < 2)
1290 REG_LIVE_LENGTH (srcno) = 2;
1293 /* We assume that a register is used exactly once per
1294 insn in the updates above. If this is not correct,
1295 no great harm is done. */
1297 REG_N_REFS (dstno) += 2 * loop_depth;
1298 REG_N_REFS (srcno) -= 2 * loop_depth;
1300 /* If that was the only time src was set,
1301 and src was not live at the start of the
1302 function, we know that we have no more
1303 references to src; clear REG_N_REFS so it
1304 won't make reload do any work. */
1305 if (REG_N_SETS (REGNO (src)) == 0
1306 && ! regno_uninitialized (REGNO (src)))
1307 REG_N_REFS (REGNO (src)) = 0;
1309 if (regmove_dump_file)
1310 fprintf (regmove_dump_file,
1311 "Fixed operand %d of insn %d matching operand %d.\n",
1312 operand_number, INSN_UID (insn), match_number);
1314 break;
1318 /* If we weren't able to replace any of the alternatives, try an
1319 alternative appoach of copying the source to the destination. */
1320 if (!success && copy_src != NULL_RTX)
1321 copy_src_to_dest (insn, copy_src, copy_dst, loop_depth);
1325 #endif /* REGISTER_CONSTRAINTS */
1328 /* Returns the INSN_CODE for INSN if its pattern has matching constraints for
1329 any operand. Returns -1 if INSN can't be recognized, or if the alternative
1330 can't be determined.
1332 Initialize the info in MATCHP based on the constraints. */
1334 static int
1335 find_matches (insn, matchp)
1336 rtx insn;
1337 struct match *matchp;
1339 int likely_spilled[MAX_RECOG_OPERANDS];
1340 int operand_number;
1341 int insn_code_number = recog_memoized (insn);
1342 int any_matches = 0;
1344 if (insn_code_number < 0)
1345 return -1;
1347 insn_extract (insn);
1348 if (! constrain_operands (insn_code_number, 0))
1349 return -1;
1351 /* Must initialize this before main loop, because the code for
1352 the commutative case may set matches for operands other than
1353 the current one. */
1354 for (operand_number = insn_n_operands[insn_code_number];
1355 --operand_number >= 0; )
1356 matchp->with[operand_number] = matchp->commutative[operand_number] = -1;
1358 for (operand_number = 0; operand_number < insn_n_operands[insn_code_number];
1359 operand_number++)
1361 char *p, c;
1362 int i = 0;
1364 p = insn_operand_constraint[insn_code_number][operand_number];
1366 likely_spilled[operand_number] = 0;
1367 matchp->use[operand_number] = READ;
1368 matchp->early_clobber[operand_number] = 0;
1369 if (*p == '=')
1370 matchp->use[operand_number] = WRITE;
1371 else if (*p == '+')
1372 matchp->use[operand_number] = READWRITE;
1374 for (;*p && i < which_alternative; p++)
1375 if (*p == ',')
1376 i++;
1378 while ((c = *p++) != '\0' && c != ',')
1379 switch (c)
1381 case '=':
1382 break;
1383 case '+':
1384 break;
1385 case '&':
1386 matchp->early_clobber[operand_number] = 1;
1387 break;
1388 case '%':
1389 matchp->commutative[operand_number] = operand_number + 1;
1390 matchp->commutative[operand_number + 1] = operand_number;
1391 break;
1392 case '0': case '1': case '2': case '3': case '4':
1393 case '5': case '6': case '7': case '8': case '9':
1394 c -= '0';
1395 if (c < operand_number && likely_spilled[(unsigned char) c])
1396 break;
1397 matchp->with[operand_number] = c;
1398 any_matches = 1;
1399 if (matchp->commutative[operand_number] >= 0)
1400 matchp->with[matchp->commutative[operand_number]] = c;
1401 break;
1402 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1403 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1404 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1405 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1406 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER (c)))
1407 likely_spilled[operand_number] = 1;
1408 break;
1411 return any_matches ? insn_code_number : -1;
1414 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1415 the only set in INSN. INSN has just been recgnized and constrained.
1416 SRC is operand number OPERAND_NUMBER in INSN.
1417 DST is operand number MATCH_NUMBER in INSN.
1418 If BACKWARD is nonzero, we have been called in a backward pass.
1419 Return nonzero for success. */
1420 static int
1421 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1422 match_number, regmove_dump_file)
1423 rtx insn, set, src, src_subreg, dst;
1424 int backward, operand_number, match_number;
1425 FILE *regmove_dump_file;
1427 rtx p;
1428 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1429 int success = 0;
1430 int num_calls = 0, s_num_calls = 0;
1431 enum rtx_code code = NOTE;
1432 HOST_WIDE_INT insn_const, newconst;
1433 rtx overlap = 0; /* need to move insn ? */
1434 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note;
1435 int length, s_length, true_loop_depth;
1437 if (! src_note)
1439 /* Look for (set (regX) (op regA constX))
1440 (set (regY) (op regA constY))
1441 and change that to
1442 (set (regA) (op regA constX)).
1443 (set (regY) (op regA constY-constX)).
1444 This works for add and shift operations, if
1445 regA is dead after or set by the second insn. */
1447 code = GET_CODE (SET_SRC (set));
1448 if ((code == PLUS || code == LSHIFTRT
1449 || code == ASHIFT || code == ASHIFTRT)
1450 && XEXP (SET_SRC (set), 0) == src
1451 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1452 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1453 else if (! stable_but_for_p (SET_SRC (set), src, dst))
1454 return 0;
1455 else
1456 /* We might find a src_note while scanning. */
1457 code = NOTE;
1460 if (regmove_dump_file)
1461 fprintf (regmove_dump_file,
1462 "Could fix operand %d of insn %d matching operand %d.\n",
1463 operand_number, INSN_UID (insn), match_number);
1465 /* If SRC is equivalent to a constant set in a different basic block,
1466 then do not use it for this optimization. We want the equivalence
1467 so that if we have to reload this register, we can reload the
1468 constant, rather than extending the lifespan of the register. */
1469 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1470 return 0;
1472 /* Scan forward to find the next instruction that
1473 uses the output operand. If the operand dies here,
1474 then replace it in both instructions with
1475 operand_number. */
1477 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1479 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
1480 || (GET_CODE (p) == NOTE
1481 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1482 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1483 break;
1485 /* ??? We can't scan past the end of a basic block without updating
1486 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1487 A CALL_INSN might be the last insn of a basic block, if it is
1488 inside an EH region. There is no easy way to tell, so we just
1489 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1490 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1491 break;
1493 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1494 continue;
1496 length++;
1497 if (src_note)
1498 s_length++;
1500 if (reg_set_p (src, p) || reg_set_p (dst, p)
1501 || (GET_CODE (PATTERN (p)) == USE
1502 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1503 break;
1505 /* See if all of DST dies in P. This test is
1506 slightly more conservative than it needs to be. */
1507 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1508 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1510 if (! src_note)
1512 rtx q;
1513 rtx set2;
1515 /* If an optimization is done, the value of SRC while P
1516 is executed will be changed. Check that this is OK. */
1517 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1518 break;
1519 for (q = p; q; q = NEXT_INSN (q))
1521 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1522 || (GET_CODE (q) == NOTE
1523 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1524 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1526 q = 0;
1527 break;
1530 /* ??? We can't scan past the end of a basic block without
1531 updating the register lifetime info
1532 (REG_DEAD/basic_block_live_at_start).
1533 A CALL_INSN might be the last insn of a basic block, if
1534 it is inside an EH region. There is no easy way to tell,
1535 so we just always break when we see a CALL_INSN if
1536 flag_exceptions is nonzero. */
1537 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1539 q = 0;
1540 break;
1543 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1544 continue;
1545 if (reg_overlap_mentioned_p (src, PATTERN (q))
1546 || reg_set_p (src, q))
1547 break;
1549 if (q)
1550 set2 = single_set (q);
1551 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1552 || XEXP (SET_SRC (set2), 0) != src
1553 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1554 || (SET_DEST (set2) != src
1555 && ! find_reg_note (q, REG_DEAD, src)))
1557 /* If this is a PLUS, we can still save a register by doing
1558 src += insn_const;
1560 src -= insn_const; .
1561 This also gives opportunities for subsequent
1562 optimizations in the backward pass, so do it there. */
1563 if (code == PLUS && backward
1564 #ifdef HAVE_cc0
1565 /* We may not emit an insn directly
1566 after P if the latter sets CC0. */
1567 && ! sets_cc0_p (PATTERN (p))
1568 #endif
1572 search_end = q;
1573 q = insn;
1574 set2 = set;
1575 newconst = -insn_const;
1576 code = MINUS;
1578 else
1579 break;
1581 else
1583 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1584 /* Reject out of range shifts. */
1585 if (code != PLUS
1586 && (newconst < 0
1587 || (newconst
1588 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2))))))
1589 break;
1590 if (code == PLUS)
1592 post_inc = q;
1593 if (SET_DEST (set2) != src)
1594 post_inc_set = set2;
1597 /* We use 1 as last argument to validate_change so that all
1598 changes are accepted or rejected together by apply_change_group
1599 when it is called by validate_replace_rtx . */
1600 validate_change (q, &XEXP (SET_SRC (set2), 1),
1601 GEN_INT (newconst), 1);
1603 validate_change (insn, recog_operand_loc[match_number], src, 1);
1604 if (validate_replace_rtx (dst, src_subreg, p))
1605 success = 1;
1606 break;
1609 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1610 break;
1611 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1613 /* INSN was already checked to be movable when
1614 we found no REG_DEAD note for src on it. */
1615 overlap = p;
1616 src_note = find_reg_note (p, REG_DEAD, src);
1619 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1620 already live across a call, then don't perform the optimization. */
1621 if (GET_CODE (p) == CALL_INSN)
1623 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1624 break;
1626 num_calls++;
1628 if (src_note)
1629 s_num_calls++;
1634 if (! success)
1635 return 0;
1637 true_loop_depth = backward ? 2 - loop_depth : loop_depth;
1639 /* Remove the death note for DST from P. */
1640 remove_note (p, dst_note);
1641 if (code == MINUS)
1643 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1644 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1645 if (search_end
1646 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1647 post_inc = 0;
1648 #endif
1649 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1650 REG_N_SETS (REGNO (src))++;
1651 REG_N_REFS (REGNO (src)) += true_loop_depth;
1652 REG_LIVE_LENGTH (REGNO (src))++;
1654 if (overlap)
1656 /* The lifetime of src and dest overlap,
1657 but we can change this by moving insn. */
1658 rtx pat = PATTERN (insn);
1659 if (src_note)
1660 remove_note (overlap, src_note);
1661 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1662 if (code == PLUS
1663 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1664 insn = overlap;
1665 else
1666 #endif
1668 rtx notes = REG_NOTES (insn);
1670 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1671 PUT_CODE (insn, NOTE);
1672 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1673 NOTE_SOURCE_FILE (insn) = 0;
1674 /* emit_insn_after_with_line_notes has no
1675 return value, so search for the new insn. */
1676 for (insn = p; PATTERN (insn) != pat; )
1677 insn = PREV_INSN (insn);
1679 REG_NOTES (insn) = notes;
1682 /* Sometimes we'd generate src = const; src += n;
1683 if so, replace the instruction that set src
1684 in the first place. */
1686 if (! overlap && (code == PLUS || code == MINUS))
1688 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1689 rtx q, set2;
1690 int num_calls2 = 0, s_length2 = 0;
1692 if (note && CONSTANT_P (XEXP (note, 0)))
1694 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1696 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1697 || (GET_CODE (q) == NOTE
1698 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1699 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1701 q = 0;
1702 break;
1705 /* ??? We can't scan past the end of a basic block without
1706 updating the register lifetime info
1707 (REG_DEAD/basic_block_live_at_start).
1708 A CALL_INSN might be the last insn of a basic block, if
1709 it is inside an EH region. There is no easy way to tell,
1710 so we just always break when we see a CALL_INSN if
1711 flag_exceptions is nonzero. */
1712 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1714 q = 0;
1715 break;
1718 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1719 continue;
1720 s_length2++;
1721 if (reg_set_p (src, q))
1723 set2 = single_set (q);
1724 break;
1726 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1728 q = 0;
1729 break;
1731 if (GET_CODE (p) == CALL_INSN)
1732 num_calls2++;
1734 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
1735 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
1737 PUT_CODE (q, NOTE);
1738 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1739 NOTE_SOURCE_FILE (q) = 0;
1740 REG_N_SETS (REGNO (src))--;
1741 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
1742 REG_N_REFS (REGNO (src)) -= true_loop_depth;
1743 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
1744 insn_const = 0;
1749 /* Don't remove this seemingly useless if, it is needed to pair with the
1750 else in the next two conditionally included code blocks. */
1751 if (0)
1753 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1754 else if ((code == PLUS || code == MINUS) && insn_const
1755 && try_auto_increment (p, insn, 0, src, insn_const, 1))
1756 insn = p;
1757 #endif
1758 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1759 else if (post_inc
1760 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
1761 post_inc = 0;
1762 #endif
1763 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1764 /* If post_inc still prevails, try to find an
1765 insn where it can be used as a pre-in/decrement.
1766 If code is MINUS, this was already tried. */
1767 if (post_inc && code == PLUS
1768 /* Check that newconst is likely to be usable
1769 in a pre-in/decrement before starting the search. */
1770 && (0
1771 #if defined (HAVE_PRE_INCREMENT)
1772 || (newconst > 0 && newconst <= MOVE_MAX)
1773 #endif
1774 #if defined (HAVE_PRE_DECREMENT)
1775 || (newconst < 0 && newconst >= -MOVE_MAX)
1776 #endif
1777 ) && exact_log2 (newconst))
1779 rtx q, inc_dest;
1781 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
1782 for (q = post_inc; (q = NEXT_INSN (q)); )
1784 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1785 || (GET_CODE (q) == NOTE
1786 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1787 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1788 break;
1790 /* ??? We can't scan past the end of a basic block without updating
1791 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1792 A CALL_INSN might be the last insn of a basic block, if it
1793 is inside an EH region. There is no easy way to tell so we
1794 just always break when we see a CALL_INSN if flag_exceptions
1795 is nonzero. */
1796 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1797 break;
1799 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1800 continue;
1801 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q))
1802 || reg_set_p (src, q)))
1803 break;
1804 if (reg_set_p (inc_dest, q))
1805 break;
1806 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
1808 try_auto_increment (q, post_inc,
1809 post_inc_set, inc_dest, newconst, 1);
1810 break;
1814 #endif /* defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) */
1815 /* Move the death note for DST to INSN if it is used
1816 there. */
1817 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
1819 XEXP (dst_note, 1) = REG_NOTES (insn);
1820 REG_NOTES (insn) = dst_note;
1823 if (src_note)
1825 /* Move the death note for SRC from INSN to P. */
1826 if (! overlap)
1827 remove_note (insn, src_note);
1828 XEXP (src_note, 1) = REG_NOTES (p);
1829 REG_NOTES (p) = src_note;
1831 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
1834 REG_N_SETS (REGNO (src))++;
1835 REG_N_SETS (REGNO (dst))--;
1837 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
1839 REG_LIVE_LENGTH (REGNO (src)) += s_length;
1840 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
1842 REG_LIVE_LENGTH (REGNO (dst)) -= length;
1843 /* REG_LIVE_LENGTH is only an approximation after
1844 combine if sched is not run, so make sure that we
1845 still have a reasonable value. */
1846 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
1847 REG_LIVE_LENGTH (REGNO (dst)) = 2;
1850 /* We assume that a register is used exactly once per
1851 insn in the updates above. If this is not correct,
1852 no great harm is done. */
1854 REG_N_REFS (REGNO (src)) += 2 * true_loop_depth;
1855 REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth;
1857 /* If that was the only time dst was set,
1858 and dst was not live at the start of the
1859 function, we know that we have no more
1860 references to dst; clear REG_N_REFS so it
1861 won't make reload do any work. */
1862 if (REG_N_SETS (REGNO (dst)) == 0
1863 && ! regno_uninitialized (REGNO (dst)))
1864 REG_N_REFS (REGNO (dst)) = 0;
1866 if (regmove_dump_file)
1867 fprintf (regmove_dump_file,
1868 "Fixed operand %d of insn %d matching operand %d.\n",
1869 operand_number, INSN_UID (insn), match_number);
1870 return 1;
1874 /* return nonzero if X is stable but for mentioning SRC or mentioning /
1875 changing DST . If in doubt, presume it is unstable. */
1876 static int
1877 stable_but_for_p (x, src, dst)
1878 rtx x, src, dst;
1880 RTX_CODE code = GET_CODE (x);
1881 switch (GET_RTX_CLASS (code))
1883 case '<': case '1': case 'c': case '2': case 'b': case '3':
1885 int i;
1886 char *fmt = GET_RTX_FORMAT (code);
1887 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1888 if (fmt[i] == 'e' && ! stable_but_for_p (XEXP (x, i), src, dst))
1889 return 0;
1890 return 1;
1892 case 'o':
1893 if (x == src || x == dst)
1894 return 1;
1895 /* fall through */
1896 default:
1897 return ! rtx_unstable_p (x);
1901 /* Test if regmove seems profitable for this target. Regmove is useful only
1902 if some common patterns are two address, i.e. require matching constraints,
1903 so we check that condition here. */
1906 regmove_profitable_p ()
1908 #ifdef REGISTER_CONSTRAINTS
1909 struct match match;
1910 enum machine_mode mode;
1911 optab tstoptab = add_optab;
1912 do /* check add_optab and ashl_optab */
1913 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1914 mode = GET_MODE_WIDER_MODE (mode))
1916 int icode = (int) tstoptab->handlers[(int) mode].insn_code;
1917 rtx reg0, reg1, reg2, pat;
1918 int i;
1920 if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing)
1921 continue;
1922 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1923 if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i))
1924 break;
1925 if (i + 2 >= FIRST_PSEUDO_REGISTER)
1926 break;
1927 reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i);
1928 reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1);
1929 reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2);
1930 if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode)
1931 || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode)
1932 || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode))
1933 break;
1934 pat = GEN_FCN (icode) (reg0, reg1, reg2);
1935 if (! pat)
1936 continue;
1937 if (GET_CODE (pat) == SEQUENCE)
1938 pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1);
1939 else
1940 pat = make_insn_raw (pat);
1941 if (! single_set (pat)
1942 || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code)
1943 /* Unexpected complexity; don't need to handle this unless
1944 we find a machine where this occurs and regmove should
1945 be enabled. */
1946 break;
1947 if (find_matches (pat, &match) >= 0)
1948 return 1;
1949 break;
1951 while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1));
1952 #endif /* REGISTER_CONSTRAINTS */
1953 return 0;