1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
38 /* The basic idea of common subexpression elimination is to go
39 through the code, keeping a record of expressions that would
40 have the same value at the current scan point, and replacing
41 expressions encountered with the cheapest equivalent expression.
43 It is too complicated to keep track of the different possibilities
44 when control paths merge; so, at each label, we forget all that is
45 known and start fresh. This can be described as processing each
46 basic block separately. Note, however, that these are not quite
47 the same as the basic blocks found by a later pass and used for
48 data flow analysis and register packing. We do not need to start fresh
49 after a conditional jump instruction if there is no label there.
51 We use two data structures to record the equivalent expressions:
52 a hash table for most expressions, and several vectors together
53 with "quantity numbers" to record equivalent (pseudo) registers.
55 The use of the special data structure for registers is desirable
56 because it is faster. It is possible because registers references
57 contain a fairly small number, the register number, taken from
58 a contiguously allocated series, and two register references are
59 identical if they have the same number. General expressions
60 do not have any such thing, so the only way to retrieve the
61 information recorded on an expression other than a register
62 is to keep it in a hash table.
64 Registers and "quantity numbers":
66 At the start of each basic block, all of the (hardware and pseudo)
67 registers used in the function are given distinct quantity
68 numbers to indicate their contents. During scan, when the code
69 copies one register into another, we copy the quantity number.
70 When a register is loaded in any other way, we allocate a new
71 quantity number to describe the value generated by this operation.
72 `reg_qty' records what quantity a register is currently thought
75 All real quantity numbers are greater than or equal to `max_reg'.
76 If register N has not been assigned a quantity, reg_qty[N] will equal N.
78 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
79 variables should be referenced with an index below `max_reg'.
81 We also maintain a bidirectional chain of registers for each
82 quantity number. `qty_first_reg', `qty_last_reg',
83 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
85 The first register in a chain is the one whose lifespan is least local.
86 Among equals, it is the one that was seen first.
87 We replace any equivalent register with that one.
89 If two registers have the same quantity number, it must be true that
90 REG expressions with `qty_mode' must be in the hash table for both
91 registers and must be in the same class.
93 The converse is not true. Since hard registers may be referenced in
94 any mode, two REG expressions might be equivalent in the hash table
95 but not have the same quantity number if the quantity number of one
96 of the registers is not the same mode as those expressions.
98 Constants and quantity numbers
100 When a quantity has a known constant value, that value is stored
101 in the appropriate element of qty_const. This is in addition to
102 putting the constant in the hash table as is usual for non-regs.
104 Whether a reg or a constant is preferred is determined by the configuration
105 macro CONST_COSTS and will often depend on the constant value. In any
106 event, expressions containing constants can be simplified, by fold_rtx.
108 When a quantity has a known nearly constant value (such as an address
109 of a stack slot), that value is stored in the appropriate element
112 Integer constants don't have a machine mode. However, cse
113 determines the intended machine mode from the destination
114 of the instruction that moves the constant. The machine mode
115 is recorded in the hash table along with the actual RTL
116 constant expression so that different modes are kept separate.
120 To record known equivalences among expressions in general
121 we use a hash table called `table'. It has a fixed number of buckets
122 that contain chains of `struct table_elt' elements for expressions.
123 These chains connect the elements whose expressions have the same
126 Other chains through the same elements connect the elements which
127 currently have equivalent values.
129 Register references in an expression are canonicalized before hashing
130 the expression. This is done using `reg_qty' and `qty_first_reg'.
131 The hash code of a register reference is computed using the quantity
132 number, not the register number.
134 When the value of an expression changes, it is necessary to remove from the
135 hash table not just that expression but all expressions whose values
136 could be different as a result.
138 1. If the value changing is in memory, except in special cases
139 ANYTHING referring to memory could be changed. That is because
140 nobody knows where a pointer does not point.
141 The function `invalidate_memory' removes what is necessary.
143 The special cases are when the address is constant or is
144 a constant plus a fixed register such as the frame pointer
145 or a static chain pointer. When such addresses are stored in,
146 we can tell exactly which other such addresses must be invalidated
147 due to overlap. `invalidate' does this.
148 All expressions that refer to non-constant
149 memory addresses are also invalidated. `invalidate_memory' does this.
151 2. If the value changing is a register, all expressions
152 containing references to that register, and only those,
155 Because searching the entire hash table for expressions that contain
156 a register is very slow, we try to figure out when it isn't necessary.
157 Precisely, this is necessary only when expressions have been
158 entered in the hash table using this register, and then the value has
159 changed, and then another expression wants to be added to refer to
160 the register's new value. This sequence of circumstances is rare
161 within any one basic block.
163 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
164 reg_tick[i] is incremented whenever a value is stored in register i.
165 reg_in_table[i] holds -1 if no references to register i have been
166 entered in the table; otherwise, it contains the value reg_tick[i] had
167 when the references were entered. If we want to enter a reference
168 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
169 Until we want to enter a new entry, the mere fact that the two vectors
170 don't match makes the entries be ignored if anyone tries to match them.
172 Registers themselves are entered in the hash table as well as in
173 the equivalent-register chains. However, the vectors `reg_tick'
174 and `reg_in_table' do not apply to expressions which are simple
175 register references. These expressions are removed from the table
176 immediately when they become invalid, and this can be done even if
177 we do not immediately search for all the expressions that refer to
180 A CLOBBER rtx in an instruction invalidates its operand for further
181 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
182 invalidates everything that resides in memory.
186 Constant expressions that differ only by an additive integer
187 are called related. When a constant expression is put in
188 the table, the related expression with no constant term
189 is also entered. These are made to point at each other
190 so that it is possible to find out if there exists any
191 register equivalent to an expression related to a given expression. */
193 /* One plus largest register number used in this function. */
197 /* One plus largest instruction UID used in this function at time of
200 static int max_insn_uid
;
202 /* Length of vectors indexed by quantity number.
203 We know in advance we will not need a quantity number this big. */
207 /* Next quantity number to be allocated.
208 This is 1 + the largest number needed so far. */
212 /* Indexed by quantity number, gives the first (or last) register
213 in the chain of registers that currently contain this quantity. */
215 static int *qty_first_reg
;
216 static int *qty_last_reg
;
218 /* Index by quantity number, gives the mode of the quantity. */
220 static enum machine_mode
*qty_mode
;
222 /* Indexed by quantity number, gives the rtx of the constant value of the
223 quantity, or zero if it does not have a known value.
224 A sum of the frame pointer (or arg pointer) plus a constant
225 can also be entered here. */
227 static rtx
*qty_const
;
229 /* Indexed by qty number, gives the insn that stored the constant value
230 recorded in `qty_const'. */
232 static rtx
*qty_const_insn
;
234 /* The next three variables are used to track when a comparison between a
235 quantity and some constant or register has been passed. In that case, we
236 know the results of the comparison in case we see it again. These variables
237 record a comparison that is known to be true. */
239 /* Indexed by qty number, gives the rtx code of a comparison with a known
240 result involving this quantity. If none, it is UNKNOWN. */
241 static enum rtx_code
*qty_comparison_code
;
243 /* Indexed by qty number, gives the constant being compared against in a
244 comparison of known result. If no such comparison, it is undefined.
245 If the comparison is not with a constant, it is zero. */
247 static rtx
*qty_comparison_const
;
249 /* Indexed by qty number, gives the quantity being compared against in a
250 comparison of known result. If no such comparison, if it undefined.
251 If the comparison is not with a register, it is -1. */
253 static int *qty_comparison_qty
;
256 /* For machines that have a CC0, we do not record its value in the hash
257 table since its use is guaranteed to be the insn immediately following
258 its definition and any other insn is presumed to invalidate it.
260 Instead, we store below the value last assigned to CC0. If it should
261 happen to be a constant, it is stored in preference to the actual
262 assigned value. In case it is a constant, we store the mode in which
263 the constant should be interpreted. */
265 static rtx prev_insn_cc0
;
266 static enum machine_mode prev_insn_cc0_mode
;
269 /* Previous actual insn. 0 if at first insn of basic block. */
271 static rtx prev_insn
;
273 /* Insn being scanned. */
275 static rtx this_insn
;
277 /* Index by register number, gives the quantity number
278 of the register's current contents. */
282 /* Index by register number, gives the number of the next (or
283 previous) register in the chain of registers sharing the same
286 Or -1 if this register is at the end of the chain.
288 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
290 static int *reg_next_eqv
;
291 static int *reg_prev_eqv
;
293 /* Index by register number, gives the number of times
294 that register has been altered in the current basic block. */
296 static int *reg_tick
;
298 /* Index by register number, gives the reg_tick value at which
299 rtx's containing this register are valid in the hash table.
300 If this does not equal the current reg_tick value, such expressions
301 existing in the hash table are invalid.
302 If this is -1, no expressions containing this register have been
303 entered in the table. */
305 static int *reg_in_table
;
307 /* A HARD_REG_SET containing all the hard registers for which there is
308 currently a REG expression in the hash table. Note the difference
309 from the above variables, which indicate if the REG is mentioned in some
310 expression in the table. */
312 static HARD_REG_SET hard_regs_in_table
;
314 /* A HARD_REG_SET containing all the hard registers that are invalidated
317 static HARD_REG_SET regs_invalidated_by_call
;
319 /* Two vectors of ints:
320 one containing max_reg -1's; the other max_reg + 500 (an approximation
321 for max_qty) elements where element i contains i.
322 These are used to initialize various other vectors fast. */
324 static int *all_minus_one
;
325 static int *consec_ints
;
327 /* CUID of insn that starts the basic block currently being cse-processed. */
329 static int cse_basic_block_start
;
331 /* CUID of insn that ends the basic block currently being cse-processed. */
333 static int cse_basic_block_end
;
335 /* Vector mapping INSN_UIDs to cuids.
336 The cuids are like uids but increase monotonically always.
337 We use them to see whether a reg is used outside a given basic block. */
339 static int *uid_cuid
;
341 /* Highest UID in UID_CUID. */
344 /* Get the cuid of an insn. */
346 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
348 /* Nonzero if cse has altered conditional jump insns
349 in such a way that jump optimization should be redone. */
351 static int cse_jumps_altered
;
353 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
354 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
355 to put in the note. */
356 static int recorded_label_ref
;
358 /* canon_hash stores 1 in do_not_record
359 if it notices a reference to CC0, PC, or some other volatile
362 static int do_not_record
;
364 #ifdef LOAD_EXTEND_OP
366 /* Scratch rtl used when looking for load-extended copy of a MEM. */
367 static rtx memory_extend_rtx
;
370 /* canon_hash stores 1 in hash_arg_in_memory
371 if it notices a reference to memory within the expression being hashed. */
373 static int hash_arg_in_memory
;
375 /* canon_hash stores 1 in hash_arg_in_struct
376 if it notices a reference to memory that's part of a structure. */
378 static int hash_arg_in_struct
;
380 /* The hash table contains buckets which are chains of `struct table_elt's,
381 each recording one expression's information.
382 That expression is in the `exp' field.
384 Those elements with the same hash code are chained in both directions
385 through the `next_same_hash' and `prev_same_hash' fields.
387 Each set of expressions with equivalent values
388 are on a two-way chain through the `next_same_value'
389 and `prev_same_value' fields, and all point with
390 the `first_same_value' field at the first element in
391 that chain. The chain is in order of increasing cost.
392 Each element's cost value is in its `cost' field.
394 The `in_memory' field is nonzero for elements that
395 involve any reference to memory. These elements are removed
396 whenever a write is done to an unidentified location in memory.
397 To be safe, we assume that a memory address is unidentified unless
398 the address is either a symbol constant or a constant plus
399 the frame pointer or argument pointer.
401 The `in_struct' field is nonzero for elements that
402 involve any reference to memory inside a structure or array.
404 The `related_value' field is used to connect related expressions
405 (that differ by adding an integer).
406 The related expressions are chained in a circular fashion.
407 `related_value' is zero for expressions for which this
410 The `cost' field stores the cost of this element's expression.
412 The `is_const' flag is set if the element is a constant (including
415 The `flag' field is used as a temporary during some search routines.
417 The `mode' field is usually the same as GET_MODE (`exp'), but
418 if `exp' is a CONST_INT and has no machine mode then the `mode'
419 field is the mode it was being used as. Each constant is
420 recorded separately for each mode it is used with. */
426 struct table_elt
*next_same_hash
;
427 struct table_elt
*prev_same_hash
;
428 struct table_elt
*next_same_value
;
429 struct table_elt
*prev_same_value
;
430 struct table_elt
*first_same_value
;
431 struct table_elt
*related_value
;
433 enum machine_mode mode
;
440 /* We don't want a lot of buckets, because we rarely have very many
441 things stored in the hash table, and a lot of buckets slows
442 down a lot of loops that happen frequently. */
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
449 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
451 : canon_hash (X, M) % NBUCKETS)
453 /* Determine whether register number N is considered a fixed register for CSE.
454 It is desirable to replace other regs with fixed regs, to reduce need for
456 A reg wins if it is either the frame pointer or designated as fixed,
457 but not if it is an overlapping register. */
458 #ifdef OVERLAPPING_REGNO_P
459 #define FIXED_REGNO_P(N) \
460 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
461 || fixed_regs[N] || global_regs[N]) \
462 && ! OVERLAPPING_REGNO_P ((N)))
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
469 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
470 hard registers and pointers into the frame are the cheapest with a cost
471 of 0. Next come pseudos with a cost of one and other hard registers with
472 a cost of 2. Aside from these special cases, call `rtx_cost'. */
474 #define CHEAP_REGNO(N) \
475 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
476 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
477 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
478 || ((N) < FIRST_PSEUDO_REGISTER \
479 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
481 /* A register is cheap if it is a user variable assigned to the register
482 or if its register number always corresponds to a cheap register. */
484 #define CHEAP_REG(N) \
485 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
486 || CHEAP_REGNO (REGNO (N)))
489 (GET_CODE (X) == REG \
490 ? (CHEAP_REG (X) ? 0 \
491 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
495 /* Determine if the quantity number for register X represents a valid index
496 into the `qty_...' variables. */
498 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
500 static struct table_elt
*table
[NBUCKETS
];
502 /* Chain of `struct table_elt's made so far for this function
503 but currently removed from the table. */
505 static struct table_elt
*free_element_chain
;
507 /* Number of `struct table_elt' structures made so far for this function. */
509 static int n_elements_made
;
511 /* Maximum value `n_elements_made' has had so far in this compilation
512 for functions previously processed. */
514 static int max_elements_made
;
516 /* Surviving equivalence class when two equivalence classes are merged
517 by recording the effects of a jump in the last insn. Zero if the
518 last insn was not a conditional jump. */
520 static struct table_elt
*last_jump_equiv_class
;
522 /* Set to the cost of a constant pool reference if one was found for a
523 symbolic constant. If this was found, it means we should try to
524 convert constants into constant pool entries if they don't fit in
527 static int constant_pool_entries_cost
;
529 /* Define maximum length of a branch path. */
531 #define PATHLENGTH 10
533 /* This data describes a block that will be processed by cse_basic_block. */
535 struct cse_basic_block_data
{
536 /* Lowest CUID value of insns in block. */
538 /* Highest CUID value of insns in block. */
540 /* Total number of SETs in block. */
542 /* Last insn in the block. */
544 /* Size of current branch path, if any. */
546 /* Current branch path, indicating which branches will be taken. */
548 /* The branch insn. */
550 /* Whether it should be taken or not. AROUND is the same as taken
551 except that it is used when the destination label is not preceded
553 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
557 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
558 virtual regs here because the simplify_*_operation routines are called
559 by integrate.c, which is called before virtual register instantiation. */
561 #define FIXED_BASE_PLUS_P(X) \
562 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
563 || (X) == arg_pointer_rtx \
564 || (X) == virtual_stack_vars_rtx \
565 || (X) == virtual_incoming_args_rtx \
566 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
567 && (XEXP (X, 0) == frame_pointer_rtx \
568 || XEXP (X, 0) == hard_frame_pointer_rtx \
569 || XEXP (X, 0) == arg_pointer_rtx \
570 || XEXP (X, 0) == virtual_stack_vars_rtx \
571 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
572 || GET_CODE (X) == ADDRESSOF)
574 /* Similar, but also allows reference to the stack pointer.
576 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
577 arg_pointer_rtx by itself is nonzero, because on at least one machine,
578 the i960, the arg pointer is zero when it is unused. */
580 #define NONZERO_BASE_PLUS_P(X) \
581 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
582 || (X) == virtual_stack_vars_rtx \
583 || (X) == virtual_incoming_args_rtx \
584 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
585 && (XEXP (X, 0) == frame_pointer_rtx \
586 || XEXP (X, 0) == hard_frame_pointer_rtx \
587 || XEXP (X, 0) == arg_pointer_rtx \
588 || XEXP (X, 0) == virtual_stack_vars_rtx \
589 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
590 || (X) == stack_pointer_rtx \
591 || (X) == virtual_stack_dynamic_rtx \
592 || (X) == virtual_outgoing_args_rtx \
593 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
594 && (XEXP (X, 0) == stack_pointer_rtx \
595 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
596 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
597 || GET_CODE (X) == ADDRESSOF)
599 static int notreg_cost
PROTO((rtx
));
600 static void new_basic_block
PROTO((void));
601 static void make_new_qty
PROTO((int));
602 static void make_regs_eqv
PROTO((int, int));
603 static void delete_reg_equiv
PROTO((int));
604 static int mention_regs
PROTO((rtx
));
605 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
606 static void free_element
PROTO((struct table_elt
*));
607 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
608 static struct table_elt
*get_element
PROTO((void));
609 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
610 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
611 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
612 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
614 static void merge_equiv_classes
PROTO((struct table_elt
*,
615 struct table_elt
*));
616 static void invalidate
PROTO((rtx
, enum machine_mode
));
617 static int cse_rtx_varies_p
PROTO((rtx
));
618 static void remove_invalid_refs
PROTO((int));
619 static void rehash_using_reg
PROTO((rtx
));
620 static void invalidate_memory
PROTO((void));
621 static void invalidate_for_call
PROTO((void));
622 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
623 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
624 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
625 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
626 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
629 static int refers_to_p
PROTO((rtx
, rtx
));
630 static rtx canon_reg
PROTO((rtx
, rtx
));
631 static void find_best_addr
PROTO((rtx
, rtx
*));
632 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
634 enum machine_mode
*));
635 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
637 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
639 static rtx fold_rtx
PROTO((rtx
, rtx
));
640 static rtx equiv_constant
PROTO((rtx
));
641 static void record_jump_equiv
PROTO((rtx
, int));
642 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
644 static void cse_insn
PROTO((rtx
, int));
645 static int note_mem_written
PROTO((rtx
));
646 static void invalidate_from_clobbers
PROTO((rtx
));
647 static rtx cse_process_notes
PROTO((rtx
, rtx
));
648 static void cse_around_loop
PROTO((rtx
));
649 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
650 static void invalidate_skipped_block
PROTO((rtx
));
651 static void cse_check_loop_start
PROTO((rtx
, rtx
));
652 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
653 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
654 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
656 extern int rtx_equal_function_value_matters
;
658 /* Return an estimate of the cost of computing rtx X.
659 One use is in cse, to decide which expression to keep in the hash table.
660 Another is in rtl generation, to pick the cheapest way to multiply.
661 Other uses like the latter are expected in the future. */
663 /* Internal function, to compute cost when X is not a register; called
664 from COST macro to keep it simple. */
670 return ((GET_CODE (x
) == SUBREG
671 && GET_CODE (SUBREG_REG (x
)) == REG
672 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
673 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
674 && (GET_MODE_SIZE (GET_MODE (x
))
675 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
676 && subreg_lowpart_p (x
)
677 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
678 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
679 ? (CHEAP_REG (SUBREG_REG (x
)) ? 0
680 : (REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
? 1
682 : rtx_cost (x
, SET
) * 2);
685 /* Return the right cost to give to an operation
686 to make the cost of the corresponding register-to-register instruction
687 N times that of a fast register-to-register instruction. */
689 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
692 rtx_cost (x
, outer_code
)
694 enum rtx_code outer_code
;
697 register enum rtx_code code
;
704 /* Compute the default costs of certain things.
705 Note that RTX_COSTS can override the defaults. */
711 /* Count multiplication by 2**n as a shift,
712 because if we are considering it, we would output it as a shift. */
713 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
714 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
717 total
= COSTS_N_INSNS (5);
723 total
= COSTS_N_INSNS (7);
726 /* Used in loop.c and combine.c as a marker. */
730 /* We don't want these to be used in substitutions because
731 we have no way of validating the resulting insn. So assign
732 anything containing an ASM_OPERANDS a very high cost. */
742 return ! CHEAP_REG (x
);
745 /* If we can't tie these modes, make this expensive. The larger
746 the mode, the more expensive it is. */
747 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
748 return COSTS_N_INSNS (2
749 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
752 RTX_COSTS (x
, code
, outer_code
);
755 CONST_COSTS (x
, code
, outer_code
);
759 #ifdef DEFAULT_RTX_COSTS
760 DEFAULT_RTX_COSTS(x
, code
, outer_code
);
765 /* Sum the costs of the sub-rtx's, plus cost of this operation,
766 which is already in total. */
768 fmt
= GET_RTX_FORMAT (code
);
769 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
771 total
+= rtx_cost (XEXP (x
, i
), code
);
772 else if (fmt
[i
] == 'E')
773 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
774 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
779 /* Clear the hash table and initialize each register with its own quantity,
780 for a new basic block. */
789 bzero ((char *) reg_tick
, max_reg
* sizeof (int));
791 bcopy ((char *) all_minus_one
, (char *) reg_in_table
,
792 max_reg
* sizeof (int));
793 bcopy ((char *) consec_ints
, (char *) reg_qty
, max_reg
* sizeof (int));
794 CLEAR_HARD_REG_SET (hard_regs_in_table
);
796 /* The per-quantity values used to be initialized here, but it is
797 much faster to initialize each as it is made in `make_new_qty'. */
799 for (i
= 0; i
< NBUCKETS
; i
++)
801 register struct table_elt
*this, *next
;
802 for (this = table
[i
]; this; this = next
)
804 next
= this->next_same_hash
;
809 bzero ((char *) table
, sizeof table
);
818 /* Say that register REG contains a quantity not in any register before
819 and initialize that quantity. */
827 if (next_qty
>= max_qty
)
830 q
= reg_qty
[reg
] = next_qty
++;
831 qty_first_reg
[q
] = reg
;
832 qty_last_reg
[q
] = reg
;
833 qty_const
[q
] = qty_const_insn
[q
] = 0;
834 qty_comparison_code
[q
] = UNKNOWN
;
836 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
839 /* Make reg NEW equivalent to reg OLD.
840 OLD is not changing; NEW is. */
843 make_regs_eqv (new, old
)
844 register int new, old
;
846 register int lastr
, firstr
;
847 register int q
= reg_qty
[old
];
849 /* Nothing should become eqv until it has a "non-invalid" qty number. */
850 if (! REGNO_QTY_VALID_P (old
))
854 firstr
= qty_first_reg
[q
];
855 lastr
= qty_last_reg
[q
];
857 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
858 hard regs. Among pseudos, if NEW will live longer than any other reg
859 of the same qty, and that is beyond the current basic block,
860 make it the new canonical replacement for this qty. */
861 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
862 /* Certain fixed registers might be of the class NO_REGS. This means
863 that not only can they not be allocated by the compiler, but
864 they cannot be used in substitutions or canonicalizations
866 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
867 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
868 || (new >= FIRST_PSEUDO_REGISTER
869 && (firstr
< FIRST_PSEUDO_REGISTER
870 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
871 || (uid_cuid
[REGNO_FIRST_UID (new)]
872 < cse_basic_block_start
))
873 && (uid_cuid
[REGNO_LAST_UID (new)]
874 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
876 reg_prev_eqv
[firstr
] = new;
877 reg_next_eqv
[new] = firstr
;
878 reg_prev_eqv
[new] = -1;
879 qty_first_reg
[q
] = new;
883 /* If NEW is a hard reg (known to be non-fixed), insert at end.
884 Otherwise, insert before any non-fixed hard regs that are at the
885 end. Registers of class NO_REGS cannot be used as an
886 equivalent for anything. */
887 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
888 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
889 && new >= FIRST_PSEUDO_REGISTER
)
890 lastr
= reg_prev_eqv
[lastr
];
891 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
892 if (reg_next_eqv
[lastr
] >= 0)
893 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
895 qty_last_reg
[q
] = new;
896 reg_next_eqv
[lastr
] = new;
897 reg_prev_eqv
[new] = lastr
;
901 /* Remove REG from its equivalence class. */
904 delete_reg_equiv (reg
)
907 register int q
= reg_qty
[reg
];
910 /* If invalid, do nothing. */
914 p
= reg_prev_eqv
[reg
];
915 n
= reg_next_eqv
[reg
];
924 qty_first_reg
[q
] = n
;
929 /* Remove any invalid expressions from the hash table
930 that refer to any of the registers contained in expression X.
932 Make sure that newly inserted references to those registers
933 as subexpressions will be considered valid.
935 mention_regs is not called when a register itself
936 is being stored in the table.
938 Return 1 if we have done something that may have changed the hash code
945 register enum rtx_code code
;
948 register int changed
= 0;
956 register int regno
= REGNO (x
);
957 register int endregno
958 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
959 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
962 for (i
= regno
; i
< endregno
; i
++)
964 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
965 remove_invalid_refs (i
);
967 reg_in_table
[i
] = reg_tick
[i
];
973 /* If X is a comparison or a COMPARE and either operand is a register
974 that does not have a quantity, give it one. This is so that a later
975 call to record_jump_equiv won't cause X to be assigned a different
976 hash code and not found in the table after that call.
978 It is not necessary to do this here, since rehash_using_reg can
979 fix up the table later, but doing this here eliminates the need to
980 call that expensive function in the most common case where the only
981 use of the register is in the comparison. */
983 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
985 if (GET_CODE (XEXP (x
, 0)) == REG
986 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
987 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
989 rehash_using_reg (XEXP (x
, 0));
993 if (GET_CODE (XEXP (x
, 1)) == REG
994 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
995 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
997 rehash_using_reg (XEXP (x
, 1));
1002 fmt
= GET_RTX_FORMAT (code
);
1003 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1005 changed
|= mention_regs (XEXP (x
, i
));
1006 else if (fmt
[i
] == 'E')
1007 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1008 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1013 /* Update the register quantities for inserting X into the hash table
1014 with a value equivalent to CLASSP.
1015 (If the class does not contain a REG, it is irrelevant.)
1016 If MODIFIED is nonzero, X is a destination; it is being modified.
1017 Note that delete_reg_equiv should be called on a register
1018 before insert_regs is done on that register with MODIFIED != 0.
1020 Nonzero value means that elements of reg_qty have changed
1021 so X's hash code may be different. */
1024 insert_regs (x
, classp
, modified
)
1026 struct table_elt
*classp
;
1029 if (GET_CODE (x
) == REG
)
1031 register int regno
= REGNO (x
);
1033 /* If REGNO is in the equivalence table already but is of the
1034 wrong mode for that equivalence, don't do anything here. */
1036 if (REGNO_QTY_VALID_P (regno
)
1037 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
1040 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1043 for (classp
= classp
->first_same_value
;
1045 classp
= classp
->next_same_value
)
1046 if (GET_CODE (classp
->exp
) == REG
1047 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1049 make_regs_eqv (regno
, REGNO (classp
->exp
));
1053 make_new_qty (regno
);
1054 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1061 /* If X is a SUBREG, we will likely be inserting the inner register in the
1062 table. If that register doesn't have an assigned quantity number at
1063 this point but does later, the insertion that we will be doing now will
1064 not be accessible because its hash code will have changed. So assign
1065 a quantity number now. */
1067 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1068 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1070 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1071 mention_regs (SUBREG_REG (x
));
1075 return mention_regs (x
);
1078 /* Look in or update the hash table. */
1080 /* Put the element ELT on the list of free elements. */
1084 struct table_elt
*elt
;
1086 elt
->next_same_hash
= free_element_chain
;
1087 free_element_chain
= elt
;
1090 /* Return an element that is free for use. */
1092 static struct table_elt
*
1095 struct table_elt
*elt
= free_element_chain
;
1098 free_element_chain
= elt
->next_same_hash
;
1102 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1105 /* Remove table element ELT from use in the table.
1106 HASH is its hash code, made using the HASH macro.
1107 It's an argument because often that is known in advance
1108 and we save much time not recomputing it. */
1111 remove_from_table (elt
, hash
)
1112 register struct table_elt
*elt
;
1118 /* Mark this element as removed. See cse_insn. */
1119 elt
->first_same_value
= 0;
1121 /* Remove the table element from its equivalence class. */
1124 register struct table_elt
*prev
= elt
->prev_same_value
;
1125 register struct table_elt
*next
= elt
->next_same_value
;
1127 if (next
) next
->prev_same_value
= prev
;
1130 prev
->next_same_value
= next
;
1133 register struct table_elt
*newfirst
= next
;
1136 next
->first_same_value
= newfirst
;
1137 next
= next
->next_same_value
;
1142 /* Remove the table element from its hash bucket. */
1145 register struct table_elt
*prev
= elt
->prev_same_hash
;
1146 register struct table_elt
*next
= elt
->next_same_hash
;
1148 if (next
) next
->prev_same_hash
= prev
;
1151 prev
->next_same_hash
= next
;
1152 else if (table
[hash
] == elt
)
1156 /* This entry is not in the proper hash bucket. This can happen
1157 when two classes were merged by `merge_equiv_classes'. Search
1158 for the hash bucket that it heads. This happens only very
1159 rarely, so the cost is acceptable. */
1160 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1161 if (table
[hash
] == elt
)
1166 /* Remove the table element from its related-value circular chain. */
1168 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1170 register struct table_elt
*p
= elt
->related_value
;
1171 while (p
->related_value
!= elt
)
1172 p
= p
->related_value
;
1173 p
->related_value
= elt
->related_value
;
1174 if (p
->related_value
== p
)
1175 p
->related_value
= 0;
1181 /* Look up X in the hash table and return its table element,
1182 or 0 if X is not in the table.
1184 MODE is the machine-mode of X, or if X is an integer constant
1185 with VOIDmode then MODE is the mode with which X will be used.
1187 Here we are satisfied to find an expression whose tree structure
1190 static struct table_elt
*
1191 lookup (x
, hash
, mode
)
1194 enum machine_mode mode
;
1196 register struct table_elt
*p
;
1198 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1199 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1200 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1206 /* Like `lookup' but don't care whether the table element uses invalid regs.
1207 Also ignore discrepancies in the machine mode of a register. */
1209 static struct table_elt
*
1210 lookup_for_remove (x
, hash
, mode
)
1213 enum machine_mode mode
;
1215 register struct table_elt
*p
;
1217 if (GET_CODE (x
) == REG
)
1219 int regno
= REGNO (x
);
1220 /* Don't check the machine mode when comparing registers;
1221 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1222 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1223 if (GET_CODE (p
->exp
) == REG
1224 && REGNO (p
->exp
) == regno
)
1229 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1230 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1237 /* Look for an expression equivalent to X and with code CODE.
1238 If one is found, return that expression. */
1241 lookup_as_function (x
, code
)
1245 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1250 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1252 if (GET_CODE (p
->exp
) == code
1253 /* Make sure this is a valid entry in the table. */
1254 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1261 /* Insert X in the hash table, assuming HASH is its hash code
1262 and CLASSP is an element of the class it should go in
1263 (or 0 if a new class should be made).
1264 It is inserted at the proper position to keep the class in
1265 the order cheapest first.
1267 MODE is the machine-mode of X, or if X is an integer constant
1268 with VOIDmode then MODE is the mode with which X will be used.
1270 For elements of equal cheapness, the most recent one
1271 goes in front, except that the first element in the list
1272 remains first unless a cheaper element is added. The order of
1273 pseudo-registers does not matter, as canon_reg will be called to
1274 find the cheapest when a register is retrieved from the table.
1276 The in_memory field in the hash table element is set to 0.
1277 The caller must set it nonzero if appropriate.
1279 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1280 and if insert_regs returns a nonzero value
1281 you must then recompute its hash code before calling here.
1283 If necessary, update table showing constant values of quantities. */
1285 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1287 static struct table_elt
*
1288 insert (x
, classp
, hash
, mode
)
1290 register struct table_elt
*classp
;
1292 enum machine_mode mode
;
1294 register struct table_elt
*elt
;
1296 /* If X is a register and we haven't made a quantity for it,
1297 something is wrong. */
1298 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1301 /* If X is a hard register, show it is being put in the table. */
1302 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1304 int regno
= REGNO (x
);
1305 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1308 for (i
= regno
; i
< endregno
; i
++)
1309 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1312 /* If X is a label, show we recorded it. */
1313 if (GET_CODE (x
) == LABEL_REF
1314 || (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == PLUS
1315 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == LABEL_REF
))
1316 recorded_label_ref
= 1;
1318 /* Put an element for X into the right hash bucket. */
1320 elt
= get_element ();
1322 elt
->cost
= COST (x
);
1323 elt
->next_same_value
= 0;
1324 elt
->prev_same_value
= 0;
1325 elt
->next_same_hash
= table
[hash
];
1326 elt
->prev_same_hash
= 0;
1327 elt
->related_value
= 0;
1330 elt
->is_const
= (CONSTANT_P (x
)
1331 /* GNU C++ takes advantage of this for `this'
1332 (and other const values). */
1333 || (RTX_UNCHANGING_P (x
)
1334 && GET_CODE (x
) == REG
1335 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1336 || FIXED_BASE_PLUS_P (x
));
1339 table
[hash
]->prev_same_hash
= elt
;
1342 /* Put it into the proper value-class. */
1345 classp
= classp
->first_same_value
;
1346 if (CHEAPER (elt
, classp
))
1347 /* Insert at the head of the class */
1349 register struct table_elt
*p
;
1350 elt
->next_same_value
= classp
;
1351 classp
->prev_same_value
= elt
;
1352 elt
->first_same_value
= elt
;
1354 for (p
= classp
; p
; p
= p
->next_same_value
)
1355 p
->first_same_value
= elt
;
1359 /* Insert not at head of the class. */
1360 /* Put it after the last element cheaper than X. */
1361 register struct table_elt
*p
, *next
;
1362 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1364 /* Put it after P and before NEXT. */
1365 elt
->next_same_value
= next
;
1367 next
->prev_same_value
= elt
;
1368 elt
->prev_same_value
= p
;
1369 p
->next_same_value
= elt
;
1370 elt
->first_same_value
= classp
;
1374 elt
->first_same_value
= elt
;
1376 /* If this is a constant being set equivalent to a register or a register
1377 being set equivalent to a constant, note the constant equivalence.
1379 If this is a constant, it cannot be equivalent to a different constant,
1380 and a constant is the only thing that can be cheaper than a register. So
1381 we know the register is the head of the class (before the constant was
1384 If this is a register that is not already known equivalent to a
1385 constant, we must check the entire class.
1387 If this is a register that is already known equivalent to an insn,
1388 update `qty_const_insn' to show that `this_insn' is the latest
1389 insn making that quantity equivalent to the constant. */
1391 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
1392 && GET_CODE (x
) != REG
)
1394 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1395 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1396 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1399 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]]
1402 register struct table_elt
*p
;
1404 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1406 if (p
->is_const
&& GET_CODE (p
->exp
) != REG
)
1408 qty_const
[reg_qty
[REGNO (x
)]]
1409 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1410 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1416 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1417 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1418 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1420 /* If this is a constant with symbolic value,
1421 and it has a term with an explicit integer value,
1422 link it up with related expressions. */
1423 if (GET_CODE (x
) == CONST
)
1425 rtx subexp
= get_related_value (x
);
1427 struct table_elt
*subelt
, *subelt_prev
;
1431 /* Get the integer-free subexpression in the hash table. */
1432 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1433 subelt
= lookup (subexp
, subhash
, mode
);
1435 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1436 /* Initialize SUBELT's circular chain if it has none. */
1437 if (subelt
->related_value
== 0)
1438 subelt
->related_value
= subelt
;
1439 /* Find the element in the circular chain that precedes SUBELT. */
1440 subelt_prev
= subelt
;
1441 while (subelt_prev
->related_value
!= subelt
)
1442 subelt_prev
= subelt_prev
->related_value
;
1443 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1444 This way the element that follows SUBELT is the oldest one. */
1445 elt
->related_value
= subelt_prev
->related_value
;
1446 subelt_prev
->related_value
= elt
;
1453 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1454 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1455 the two classes equivalent.
1457 CLASS1 will be the surviving class; CLASS2 should not be used after this
1460 Any invalid entries in CLASS2 will not be copied. */
1463 merge_equiv_classes (class1
, class2
)
1464 struct table_elt
*class1
, *class2
;
1466 struct table_elt
*elt
, *next
, *new;
1468 /* Ensure we start with the head of the classes. */
1469 class1
= class1
->first_same_value
;
1470 class2
= class2
->first_same_value
;
1472 /* If they were already equal, forget it. */
1473 if (class1
== class2
)
1476 for (elt
= class2
; elt
; elt
= next
)
1480 enum machine_mode mode
= elt
->mode
;
1482 next
= elt
->next_same_value
;
1484 /* Remove old entry, make a new one in CLASS1's class.
1485 Don't do this for invalid entries as we cannot find their
1486 hash code (it also isn't necessary). */
1487 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1489 hash_arg_in_memory
= 0;
1490 hash_arg_in_struct
= 0;
1491 hash
= HASH (exp
, mode
);
1493 if (GET_CODE (exp
) == REG
)
1494 delete_reg_equiv (REGNO (exp
));
1496 remove_from_table (elt
, hash
);
1498 if (insert_regs (exp
, class1
, 0))
1500 rehash_using_reg (exp
);
1501 hash
= HASH (exp
, mode
);
1503 new = insert (exp
, class1
, hash
, mode
);
1504 new->in_memory
= hash_arg_in_memory
;
1505 new->in_struct
= hash_arg_in_struct
;
1510 /* Remove from the hash table, or mark as invalid,
1511 all expressions whose values could be altered by storing in X.
1512 X is a register, a subreg, or a memory reference with nonvarying address
1513 (because, when a memory reference with a varying address is stored in,
1514 all memory references are removed by invalidate_memory
1515 so specific invalidation is superfluous).
1516 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1517 instead of just the amount indicated by the mode of X. This is only used
1518 for bitfield stores into memory.
1520 A nonvarying address may be just a register or just
1521 a symbol reference, or it may be either of those plus
1522 a numeric offset. */
1525 invalidate (x
, full_mode
)
1527 enum machine_mode full_mode
;
1530 register struct table_elt
*p
;
1532 /* If X is a register, dependencies on its contents
1533 are recorded through the qty number mechanism.
1534 Just change the qty number of the register,
1535 mark it as invalid for expressions that refer to it,
1536 and remove it itself. */
1538 if (GET_CODE (x
) == REG
)
1540 register int regno
= REGNO (x
);
1541 register unsigned hash
= HASH (x
, GET_MODE (x
));
1543 /* Remove REGNO from any quantity list it might be on and indicate
1544 that it's value might have changed. If it is a pseudo, remove its
1545 entry from the hash table.
1547 For a hard register, we do the first two actions above for any
1548 additional hard registers corresponding to X. Then, if any of these
1549 registers are in the table, we must remove any REG entries that
1550 overlap these registers. */
1552 delete_reg_equiv (regno
);
1555 if (regno
>= FIRST_PSEUDO_REGISTER
)
1557 /* Because a register can be referenced in more than one mode,
1558 we might have to remove more than one table entry. */
1560 struct table_elt
*elt
;
1562 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1563 remove_from_table (elt
, hash
);
1567 HOST_WIDE_INT in_table
1568 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1569 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1570 int tregno
, tendregno
;
1571 register struct table_elt
*p
, *next
;
1573 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1575 for (i
= regno
+ 1; i
< endregno
; i
++)
1577 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1578 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1579 delete_reg_equiv (i
);
1584 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1585 for (p
= table
[hash
]; p
; p
= next
)
1587 next
= p
->next_same_hash
;
1589 if (GET_CODE (p
->exp
) != REG
1590 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1593 tregno
= REGNO (p
->exp
);
1595 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1596 if (tendregno
> regno
&& tregno
< endregno
)
1597 remove_from_table (p
, hash
);
1604 if (GET_CODE (x
) == SUBREG
)
1606 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1608 invalidate (SUBREG_REG (x
), VOIDmode
);
1612 /* X is not a register; it must be a memory reference with
1613 a nonvarying address. Remove all hash table elements
1614 that refer to overlapping pieces of memory. */
1616 if (GET_CODE (x
) != MEM
)
1619 if (full_mode
== VOIDmode
)
1620 full_mode
= GET_MODE (x
);
1622 for (i
= 0; i
< NBUCKETS
; i
++)
1624 register struct table_elt
*next
;
1625 for (p
= table
[i
]; p
; p
= next
)
1627 next
= p
->next_same_hash
;
1628 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1629 than checking all the aliases). */
1631 && (GET_CODE (p
->exp
) != MEM
1632 || true_dependence (x
, full_mode
, p
->exp
, cse_rtx_varies_p
)))
1633 remove_from_table (p
, i
);
1638 /* Remove all expressions that refer to register REGNO,
1639 since they are already invalid, and we are about to
1640 mark that register valid again and don't want the old
1641 expressions to reappear as valid. */
1644 remove_invalid_refs (regno
)
1648 register struct table_elt
*p
, *next
;
1650 for (i
= 0; i
< NBUCKETS
; i
++)
1651 for (p
= table
[i
]; p
; p
= next
)
1653 next
= p
->next_same_hash
;
1654 if (GET_CODE (p
->exp
) != REG
1655 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1656 remove_from_table (p
, i
);
1660 /* Recompute the hash codes of any valid entries in the hash table that
1661 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1663 This is called when we make a jump equivalence. */
1666 rehash_using_reg (x
)
1670 struct table_elt
*p
, *next
;
1673 if (GET_CODE (x
) == SUBREG
)
1676 /* If X is not a register or if the register is known not to be in any
1677 valid entries in the table, we have no work to do. */
1679 if (GET_CODE (x
) != REG
1680 || reg_in_table
[REGNO (x
)] < 0
1681 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1684 /* Scan all hash chains looking for valid entries that mention X.
1685 If we find one and it is in the wrong hash chain, move it. We can skip
1686 objects that are registers, since they are handled specially. */
1688 for (i
= 0; i
< NBUCKETS
; i
++)
1689 for (p
= table
[i
]; p
; p
= next
)
1691 next
= p
->next_same_hash
;
1692 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1693 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1694 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1696 if (p
->next_same_hash
)
1697 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1699 if (p
->prev_same_hash
)
1700 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1702 table
[i
] = p
->next_same_hash
;
1704 p
->next_same_hash
= table
[hash
];
1705 p
->prev_same_hash
= 0;
1707 table
[hash
]->prev_same_hash
= p
;
1713 /* Remove from the hash table any expression that is a call-clobbered
1714 register. Also update their TICK values. */
1717 invalidate_for_call ()
1719 int regno
, endregno
;
1722 struct table_elt
*p
, *next
;
1725 /* Go through all the hard registers. For each that is clobbered in
1726 a CALL_INSN, remove the register from quantity chains and update
1727 reg_tick if defined. Also see if any of these registers is currently
1730 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1731 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1733 delete_reg_equiv (regno
);
1734 if (reg_tick
[regno
] >= 0)
1737 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1740 /* In the case where we have no call-clobbered hard registers in the
1741 table, we are done. Otherwise, scan the table and remove any
1742 entry that overlaps a call-clobbered register. */
1745 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1746 for (p
= table
[hash
]; p
; p
= next
)
1748 next
= p
->next_same_hash
;
1752 remove_from_table (p
, hash
);
1756 if (GET_CODE (p
->exp
) != REG
1757 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1760 regno
= REGNO (p
->exp
);
1761 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1763 for (i
= regno
; i
< endregno
; i
++)
1764 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1766 remove_from_table (p
, hash
);
1772 /* Given an expression X of type CONST,
1773 and ELT which is its table entry (or 0 if it
1774 is not in the hash table),
1775 return an alternate expression for X as a register plus integer.
1776 If none can be found, return 0. */
1779 use_related_value (x
, elt
)
1781 struct table_elt
*elt
;
1783 register struct table_elt
*relt
= 0;
1784 register struct table_elt
*p
, *q
;
1785 HOST_WIDE_INT offset
;
1787 /* First, is there anything related known?
1788 If we have a table element, we can tell from that.
1789 Otherwise, must look it up. */
1791 if (elt
!= 0 && elt
->related_value
!= 0)
1793 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1795 rtx subexp
= get_related_value (x
);
1797 relt
= lookup (subexp
,
1798 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1805 /* Search all related table entries for one that has an
1806 equivalent register. */
1811 /* This loop is strange in that it is executed in two different cases.
1812 The first is when X is already in the table. Then it is searching
1813 the RELATED_VALUE list of X's class (RELT). The second case is when
1814 X is not in the table. Then RELT points to a class for the related
1817 Ensure that, whatever case we are in, that we ignore classes that have
1818 the same value as X. */
1820 if (rtx_equal_p (x
, p
->exp
))
1823 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1824 if (GET_CODE (q
->exp
) == REG
)
1830 p
= p
->related_value
;
1832 /* We went all the way around, so there is nothing to be found.
1833 Alternatively, perhaps RELT was in the table for some other reason
1834 and it has no related values recorded. */
1835 if (p
== relt
|| p
== 0)
1842 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1843 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1844 return plus_constant (q
->exp
, offset
);
1847 /* Hash an rtx. We are careful to make sure the value is never negative.
1848 Equivalent registers hash identically.
1849 MODE is used in hashing for CONST_INTs only;
1850 otherwise the mode of X is used.
1852 Store 1 in do_not_record if any subexpression is volatile.
1854 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1855 which does not have the RTX_UNCHANGING_P bit set.
1856 In this case, also store 1 in hash_arg_in_struct
1857 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1859 Note that cse_insn knows that the hash code of a MEM expression
1860 is just (int) MEM plus the hash code of the address. */
1863 canon_hash (x
, mode
)
1865 enum machine_mode mode
;
1868 register unsigned hash
= 0;
1869 register enum rtx_code code
;
1872 /* repeat is used to turn tail-recursion into iteration. */
1877 code
= GET_CODE (x
);
1882 register int regno
= REGNO (x
);
1884 /* On some machines, we can't record any non-fixed hard register,
1885 because extending its life will cause reload problems. We
1886 consider ap, fp, and sp to be fixed for this purpose.
1887 On all machines, we can't record any global registers. */
1889 if (regno
< FIRST_PSEUDO_REGISTER
1890 && (global_regs
[regno
]
1891 || (SMALL_REGISTER_CLASSES
1892 && ! fixed_regs
[regno
]
1893 && regno
!= FRAME_POINTER_REGNUM
1894 && regno
!= HARD_FRAME_POINTER_REGNUM
1895 && regno
!= ARG_POINTER_REGNUM
1896 && regno
!= STACK_POINTER_REGNUM
)))
1901 hash
+= ((unsigned) REG
<< 7) + (unsigned) reg_qty
[regno
];
1907 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
1908 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
1913 /* This is like the general case, except that it only counts
1914 the integers representing the constant. */
1915 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1916 if (GET_MODE (x
) != VOIDmode
)
1917 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1919 unsigned tem
= XINT (x
, i
);
1923 hash
+= ((unsigned) CONST_DOUBLE_LOW (x
)
1924 + (unsigned) CONST_DOUBLE_HIGH (x
));
1927 /* Assume there is only one rtx object for any given label. */
1930 += ((unsigned) LABEL_REF
<< 7) + (unsigned long) XEXP (x
, 0);
1935 += ((unsigned) SYMBOL_REF
<< 7) + (unsigned long) XSTR (x
, 0);
1939 if (MEM_VOLATILE_P (x
))
1944 if (! RTX_UNCHANGING_P (x
) || FIXED_BASE_PLUS_P (XEXP (x
, 0)))
1946 hash_arg_in_memory
= 1;
1947 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1949 /* Now that we have already found this special case,
1950 might as well speed it up as much as possible. */
1951 hash
+= (unsigned) MEM
;
1962 case UNSPEC_VOLATILE
:
1967 if (MEM_VOLATILE_P (x
))
1978 i
= GET_RTX_LENGTH (code
) - 1;
1979 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1980 fmt
= GET_RTX_FORMAT (code
);
1985 rtx tem
= XEXP (x
, i
);
1987 /* If we are about to do the last recursive call
1988 needed at this level, change it into iteration.
1989 This function is called enough to be worth it. */
1995 hash
+= canon_hash (tem
, 0);
1997 else if (fmt
[i
] == 'E')
1998 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1999 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
2000 else if (fmt
[i
] == 's')
2002 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
2007 else if (fmt
[i
] == 'i')
2009 register unsigned tem
= XINT (x
, i
);
2012 else if (fmt
[i
] == '0')
2020 /* Like canon_hash but with no side effects. */
2025 enum machine_mode mode
;
2027 int save_do_not_record
= do_not_record
;
2028 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2029 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2030 unsigned hash
= canon_hash (x
, mode
);
2031 hash_arg_in_memory
= save_hash_arg_in_memory
;
2032 hash_arg_in_struct
= save_hash_arg_in_struct
;
2033 do_not_record
= save_do_not_record
;
2037 /* Return 1 iff X and Y would canonicalize into the same thing,
2038 without actually constructing the canonicalization of either one.
2039 If VALIDATE is nonzero,
2040 we assume X is an expression being processed from the rtl
2041 and Y was found in the hash table. We check register refs
2042 in Y for being marked as valid.
2044 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2045 that is known to be in the register. Ordinarily, we don't allow them
2046 to match, because letting them match would cause unpredictable results
2047 in all the places that search a hash table chain for an equivalent
2048 for a given value. A possible equivalent that has different structure
2049 has its hash code computed from different data. Whether the hash code
2050 is the same as that of the given value is pure luck. */
2053 exp_equiv_p (x
, y
, validate
, equal_values
)
2059 register enum rtx_code code
;
2062 /* Note: it is incorrect to assume an expression is equivalent to itself
2063 if VALIDATE is nonzero. */
2064 if (x
== y
&& !validate
)
2066 if (x
== 0 || y
== 0)
2069 code
= GET_CODE (x
);
2070 if (code
!= GET_CODE (y
))
2075 /* If X is a constant and Y is a register or vice versa, they may be
2076 equivalent. We only have to validate if Y is a register. */
2077 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2078 && REGNO_QTY_VALID_P (REGNO (y
))
2079 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2080 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2081 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2084 if (CONSTANT_P (y
) && code
== REG
2085 && REGNO_QTY_VALID_P (REGNO (x
))
2086 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2087 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2093 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2094 if (GET_MODE (x
) != GET_MODE (y
))
2104 return INTVAL (x
) == INTVAL (y
);
2107 return XEXP (x
, 0) == XEXP (y
, 0);
2110 return XSTR (x
, 0) == XSTR (y
, 0);
2114 int regno
= REGNO (y
);
2116 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2117 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2120 /* If the quantities are not the same, the expressions are not
2121 equivalent. If there are and we are not to validate, they
2122 are equivalent. Otherwise, ensure all regs are up-to-date. */
2124 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2130 for (i
= regno
; i
< endregno
; i
++)
2131 if (reg_in_table
[i
] != reg_tick
[i
])
2137 /* For commutative operations, check both orders. */
2145 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2146 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2147 validate
, equal_values
))
2148 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2149 validate
, equal_values
)
2150 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2151 validate
, equal_values
)));
2157 /* Compare the elements. If any pair of corresponding elements
2158 fail to match, return 0 for the whole things. */
2160 fmt
= GET_RTX_FORMAT (code
);
2161 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2166 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2171 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2173 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2174 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2175 validate
, equal_values
))
2180 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2185 if (XINT (x
, i
) != XINT (y
, i
))
2190 if (XWINT (x
, i
) != XWINT (y
, i
))
2205 /* Return 1 iff any subexpression of X matches Y.
2206 Here we do not require that X or Y be valid (for registers referred to)
2207 for being in the hash table. */
2214 register enum rtx_code code
;
2220 if (x
== 0 || y
== 0)
2223 code
= GET_CODE (x
);
2224 /* If X as a whole has the same code as Y, they may match.
2226 if (code
== GET_CODE (y
))
2228 if (exp_equiv_p (x
, y
, 0, 1))
2232 /* X does not match, so try its subexpressions. */
2234 fmt
= GET_RTX_FORMAT (code
);
2235 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2244 if (refers_to_p (XEXP (x
, i
), y
))
2247 else if (fmt
[i
] == 'E')
2250 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2251 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2258 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2259 set PBASE, PSTART, and PEND which correspond to the base of the address,
2260 the starting offset, and ending offset respectively.
2262 ADDR is known to be a nonvarying address. */
2264 /* ??? Despite what the comments say, this function is in fact frequently
2265 passed varying addresses. This does not appear to cause any problems. */
2268 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2272 HOST_WIDE_INT
*pstart
, *pend
;
2275 HOST_WIDE_INT start
, end
;
2281 if (flag_pic
&& GET_CODE (base
) == PLUS
2282 && XEXP (base
, 0) == pic_offset_table_rtx
)
2283 base
= XEXP (base
, 1);
2285 /* Registers with nonvarying addresses usually have constant equivalents;
2286 but the frame pointer register is also possible. */
2287 if (GET_CODE (base
) == REG
2289 && REGNO_QTY_VALID_P (REGNO (base
))
2290 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2291 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2292 base
= qty_const
[reg_qty
[REGNO (base
)]];
2293 else if (GET_CODE (base
) == PLUS
2294 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2295 && GET_CODE (XEXP (base
, 0)) == REG
2297 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2298 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2299 == GET_MODE (XEXP (base
, 0)))
2300 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2302 start
= INTVAL (XEXP (base
, 1));
2303 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2305 /* This can happen as the result of virtual register instantiation,
2306 if the initial offset is too large to be a valid address. */
2307 else if (GET_CODE (base
) == PLUS
2308 && GET_CODE (XEXP (base
, 0)) == REG
2309 && GET_CODE (XEXP (base
, 1)) == REG
2311 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2312 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2313 == GET_MODE (XEXP (base
, 0)))
2314 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]]
2315 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 1)))
2316 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 1))]]
2317 == GET_MODE (XEXP (base
, 1)))
2318 && qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]])
2320 rtx tem
= qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]];
2321 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2323 /* One of the two values must be a constant. */
2324 if (GET_CODE (base
) != CONST_INT
)
2326 if (GET_CODE (tem
) != CONST_INT
)
2328 start
= INTVAL (tem
);
2332 start
= INTVAL (base
);
2337 /* Handle everything that we can find inside an address that has been
2338 viewed as constant. */
2342 /* If no part of this switch does a "continue", the code outside
2343 will exit this loop. */
2345 switch (GET_CODE (base
))
2348 /* By definition, operand1 of a LO_SUM is the associated constant
2349 address. Use the associated constant address as the base
2351 base
= XEXP (base
, 1);
2355 /* Strip off CONST. */
2356 base
= XEXP (base
, 0);
2360 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2362 start
+= INTVAL (XEXP (base
, 1));
2363 base
= XEXP (base
, 0);
2369 /* Handle the case of an AND which is the negative of a power of
2370 two. This is used to represent unaligned memory operations. */
2371 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
2372 && exact_log2 (- INTVAL (XEXP (base
, 1))) > 0)
2374 set_nonvarying_address_components (XEXP (base
, 0), size
,
2375 pbase
, pstart
, pend
);
2377 /* Assume the worst misalignment. START is affected, but not
2378 END, so compensate but adjusting SIZE. Don't lose any
2379 constant we already had. */
2381 size
= *pend
- *pstart
- INTVAL (XEXP (base
, 1)) - 1;
2382 start
+= *pstart
+ INTVAL (XEXP (base
, 1)) + 1;
2395 if (GET_CODE (base
) == CONST_INT
)
2397 start
+= INTVAL (base
);
2403 /* Set the return values. */
2409 /* Return 1 if X has a value that can vary even between two
2410 executions of the program. 0 means X can be compared reliably
2411 against certain constants or near-constants. */
2414 cse_rtx_varies_p (x
)
2417 /* We need not check for X and the equivalence class being of the same
2418 mode because if X is equivalent to a constant in some mode, it
2419 doesn't vary in any mode. */
2421 if (GET_CODE (x
) == REG
2422 && REGNO_QTY_VALID_P (REGNO (x
))
2423 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2424 && qty_const
[reg_qty
[REGNO (x
)]] != 0)
2427 if (GET_CODE (x
) == PLUS
2428 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2429 && GET_CODE (XEXP (x
, 0)) == REG
2430 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2431 && (GET_MODE (XEXP (x
, 0))
2432 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]])
2433 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]])
2436 /* This can happen as the result of virtual register instantiation, if
2437 the initial constant is too large to be a valid address. This gives
2438 us a three instruction sequence, load large offset into a register,
2439 load fp minus a constant into a register, then a MEM which is the
2440 sum of the two `constant' registers. */
2441 if (GET_CODE (x
) == PLUS
2442 && GET_CODE (XEXP (x
, 0)) == REG
2443 && GET_CODE (XEXP (x
, 1)) == REG
2444 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2445 && (GET_MODE (XEXP (x
, 0))
2446 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]])
2447 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]]
2448 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1)))
2449 && (GET_MODE (XEXP (x
, 1))
2450 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 1))]])
2451 && qty_const
[reg_qty
[REGNO (XEXP (x
, 1))]])
2454 return rtx_varies_p (x
);
2457 /* Canonicalize an expression:
2458 replace each register reference inside it
2459 with the "oldest" equivalent register.
2461 If INSN is non-zero and we are replacing a pseudo with a hard register
2462 or vice versa, validate_change is used to ensure that INSN remains valid
2463 after we make our substitution. The calls are made with IN_GROUP non-zero
2464 so apply_change_group must be called upon the outermost return from this
2465 function (unless INSN is zero). The result of apply_change_group can
2466 generally be discarded since the changes we are making are optional. */
2474 register enum rtx_code code
;
2480 code
= GET_CODE (x
);
2498 /* Never replace a hard reg, because hard regs can appear
2499 in more than one machine mode, and we must preserve the mode
2500 of each occurrence. Also, some hard regs appear in
2501 MEMs that are shared and mustn't be altered. Don't try to
2502 replace any reg that maps to a reg of class NO_REGS. */
2503 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2504 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2507 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2508 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2509 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2510 : gen_rtx_REG (qty_mode
[reg_qty
[REGNO (x
)]], first
));
2517 fmt
= GET_RTX_FORMAT (code
);
2518 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2524 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2527 /* If replacing pseudo with hard reg or vice versa, ensure the
2528 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2529 if (insn
!= 0 && new != 0
2530 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2531 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2532 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2533 || (insn_code
= recog_memoized (insn
)) < 0
2534 || insn_n_dups
[insn_code
] > 0))
2535 validate_change (insn
, &XEXP (x
, i
), new, 1);
2539 else if (fmt
[i
] == 'E')
2540 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2541 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2547 /* LOC is a location within INSN that is an operand address (the contents of
2548 a MEM). Find the best equivalent address to use that is valid for this
2551 On most CISC machines, complicated address modes are costly, and rtx_cost
2552 is a good approximation for that cost. However, most RISC machines have
2553 only a few (usually only one) memory reference formats. If an address is
2554 valid at all, it is often just as cheap as any other address. Hence, for
2555 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2556 costs of various addresses. For two addresses of equal cost, choose the one
2557 with the highest `rtx_cost' value as that has the potential of eliminating
2558 the most insns. For equal costs, we choose the first in the equivalence
2559 class. Note that we ignore the fact that pseudo registers are cheaper
2560 than hard registers here because we would also prefer the pseudo registers.
2564 find_best_addr (insn
, loc
)
2568 struct table_elt
*elt
;
2571 struct table_elt
*p
;
2572 int found_better
= 1;
2574 int save_do_not_record
= do_not_record
;
2575 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2576 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2581 /* Do not try to replace constant addresses or addresses of local and
2582 argument slots. These MEM expressions are made only once and inserted
2583 in many instructions, as well as being used to control symbol table
2584 output. It is not safe to clobber them.
2586 There are some uncommon cases where the address is already in a register
2587 for some reason, but we cannot take advantage of that because we have
2588 no easy way to unshare the MEM. In addition, looking up all stack
2589 addresses is costly. */
2590 if ((GET_CODE (addr
) == PLUS
2591 && GET_CODE (XEXP (addr
, 0)) == REG
2592 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2593 && (regno
= REGNO (XEXP (addr
, 0)),
2594 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2595 || regno
== ARG_POINTER_REGNUM
))
2596 || (GET_CODE (addr
) == REG
2597 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2598 || regno
== HARD_FRAME_POINTER_REGNUM
2599 || regno
== ARG_POINTER_REGNUM
))
2600 || GET_CODE (addr
) == ADDRESSOF
2601 || CONSTANT_ADDRESS_P (addr
))
2604 /* If this address is not simply a register, try to fold it. This will
2605 sometimes simplify the expression. Many simplifications
2606 will not be valid, but some, usually applying the associative rule, will
2607 be valid and produce better code. */
2608 if (GET_CODE (addr
) != REG
)
2610 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2614 && (ADDRESS_COST (folded
) < ADDRESS_COST (addr
)
2615 || (ADDRESS_COST (folded
) == ADDRESS_COST (addr
)
2616 && rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)))
2618 && rtx_cost (folded
, MEM
) < rtx_cost (addr
, MEM
)
2620 && validate_change (insn
, loc
, folded
, 0))
2624 /* If this address is not in the hash table, we can't look for equivalences
2625 of the whole address. Also, ignore if volatile. */
2628 hash
= HASH (addr
, Pmode
);
2629 addr_volatile
= do_not_record
;
2630 do_not_record
= save_do_not_record
;
2631 hash_arg_in_memory
= save_hash_arg_in_memory
;
2632 hash_arg_in_struct
= save_hash_arg_in_struct
;
2637 elt
= lookup (addr
, hash
, Pmode
);
2639 #ifndef ADDRESS_COST
2642 int our_cost
= elt
->cost
;
2644 /* Find the lowest cost below ours that works. */
2645 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2646 if (elt
->cost
< our_cost
2647 && (GET_CODE (elt
->exp
) == REG
2648 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2649 && validate_change (insn
, loc
,
2650 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2657 /* We need to find the best (under the criteria documented above) entry
2658 in the class that is valid. We use the `flag' field to indicate
2659 choices that were invalid and iterate until we can't find a better
2660 one that hasn't already been tried. */
2662 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2665 while (found_better
)
2667 int best_addr_cost
= ADDRESS_COST (*loc
);
2668 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2669 struct table_elt
*best_elt
= elt
;
2672 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2674 && (GET_CODE (p
->exp
) == REG
2675 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2676 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2677 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2678 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2681 best_addr_cost
= ADDRESS_COST (p
->exp
);
2682 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2688 if (validate_change (insn
, loc
,
2689 canon_reg (copy_rtx (best_elt
->exp
),
2698 /* If the address is a binary operation with the first operand a register
2699 and the second a constant, do the same as above, but looking for
2700 equivalences of the register. Then try to simplify before checking for
2701 the best address to use. This catches a few cases: First is when we
2702 have REG+const and the register is another REG+const. We can often merge
2703 the constants and eliminate one insn and one register. It may also be
2704 that a machine has a cheap REG+REG+const. Finally, this improves the
2705 code on the Alpha for unaligned byte stores. */
2707 if (flag_expensive_optimizations
2708 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2709 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2710 && GET_CODE (XEXP (*loc
, 0)) == REG
2711 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2713 rtx c
= XEXP (*loc
, 1);
2716 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2717 do_not_record
= save_do_not_record
;
2718 hash_arg_in_memory
= save_hash_arg_in_memory
;
2719 hash_arg_in_struct
= save_hash_arg_in_struct
;
2721 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2725 /* We need to find the best (under the criteria documented above) entry
2726 in the class that is valid. We use the `flag' field to indicate
2727 choices that were invalid and iterate until we can't find a better
2728 one that hasn't already been tried. */
2730 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2733 while (found_better
)
2735 int best_addr_cost
= ADDRESS_COST (*loc
);
2736 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2737 struct table_elt
*best_elt
= elt
;
2738 rtx best_rtx
= *loc
;
2741 /* This is at worst case an O(n^2) algorithm, so limit our search
2742 to the first 32 elements on the list. This avoids trouble
2743 compiling code with very long basic blocks that can easily
2744 call cse_gen_binary so many times that we run out of memory. */
2747 for (p
= elt
->first_same_value
, count
= 0;
2749 p
= p
->next_same_value
, count
++)
2751 && (GET_CODE (p
->exp
) == REG
2752 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2754 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2756 if ((ADDRESS_COST (new) < best_addr_cost
2757 || (ADDRESS_COST (new) == best_addr_cost
2758 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2761 best_addr_cost
= ADDRESS_COST (new);
2762 best_rtx_cost
= (COST (new) + 1) >> 1;
2770 if (validate_change (insn
, loc
,
2771 canon_reg (copy_rtx (best_rtx
),
2782 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2783 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2784 what values are being compared.
2786 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2787 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2788 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2789 compared to produce cc0.
2791 The return value is the comparison operator and is either the code of
2792 A or the code corresponding to the inverse of the comparison. */
2794 static enum rtx_code
2795 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2798 enum machine_mode
*pmode1
, *pmode2
;
2802 arg1
= *parg1
, arg2
= *parg2
;
2804 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2806 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2808 /* Set non-zero when we find something of interest. */
2810 int reverse_code
= 0;
2811 struct table_elt
*p
= 0;
2813 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2814 On machines with CC0, this is the only case that can occur, since
2815 fold_rtx will return the COMPARE or item being compared with zero
2818 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2821 /* If ARG1 is a comparison operator and CODE is testing for
2822 STORE_FLAG_VALUE, get the inner arguments. */
2824 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2827 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2828 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2829 #ifdef FLOAT_STORE_FLAG_VALUE
2830 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2831 && FLOAT_STORE_FLAG_VALUE
< 0)
2836 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2837 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2838 #ifdef FLOAT_STORE_FLAG_VALUE
2839 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2840 && FLOAT_STORE_FLAG_VALUE
< 0)
2843 x
= arg1
, reverse_code
= 1;
2846 /* ??? We could also check for
2848 (ne (and (eq (...) (const_int 1))) (const_int 0))
2850 and related forms, but let's wait until we see them occurring. */
2853 /* Look up ARG1 in the hash table and see if it has an equivalence
2854 that lets us see what is being compared. */
2855 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2857 if (p
) p
= p
->first_same_value
;
2859 for (; p
; p
= p
->next_same_value
)
2861 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2863 /* If the entry isn't valid, skip it. */
2864 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2867 if (GET_CODE (p
->exp
) == COMPARE
2868 /* Another possibility is that this machine has a compare insn
2869 that includes the comparison code. In that case, ARG1 would
2870 be equivalent to a comparison operation that would set ARG1 to
2871 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2872 ORIG_CODE is the actual comparison being done; if it is an EQ,
2873 we must reverse ORIG_CODE. On machine with a negative value
2874 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2877 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2878 && (GET_MODE_BITSIZE (inner_mode
)
2879 <= HOST_BITS_PER_WIDE_INT
)
2880 && (STORE_FLAG_VALUE
2881 & ((HOST_WIDE_INT
) 1
2882 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2883 #ifdef FLOAT_STORE_FLAG_VALUE
2885 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2886 && FLOAT_STORE_FLAG_VALUE
< 0)
2889 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2894 else if ((code
== EQ
2896 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2897 && (GET_MODE_BITSIZE (inner_mode
)
2898 <= HOST_BITS_PER_WIDE_INT
)
2899 && (STORE_FLAG_VALUE
2900 & ((HOST_WIDE_INT
) 1
2901 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2902 #ifdef FLOAT_STORE_FLAG_VALUE
2904 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2905 && FLOAT_STORE_FLAG_VALUE
< 0)
2908 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2915 /* If this is fp + constant, the equivalent is a better operand since
2916 it may let us predict the value of the comparison. */
2917 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2924 /* If we didn't find a useful equivalence for ARG1, we are done.
2925 Otherwise, set up for the next iteration. */
2929 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2930 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2931 code
= GET_CODE (x
);
2934 code
= reverse_condition (code
);
2937 /* Return our results. Return the modes from before fold_rtx
2938 because fold_rtx might produce const_int, and then it's too late. */
2939 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2940 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2945 /* Try to simplify a unary operation CODE whose output mode is to be
2946 MODE with input operand OP whose mode was originally OP_MODE.
2947 Return zero if no simplification can be made. */
2950 simplify_unary_operation (code
, mode
, op
, op_mode
)
2952 enum machine_mode mode
;
2954 enum machine_mode op_mode
;
2956 register int width
= GET_MODE_BITSIZE (mode
);
2958 /* The order of these tests is critical so that, for example, we don't
2959 check the wrong mode (input vs. output) for a conversion operation,
2960 such as FIX. At some point, this should be simplified. */
2962 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2964 if (code
== FLOAT
&& GET_MODE (op
) == VOIDmode
2965 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2967 HOST_WIDE_INT hv
, lv
;
2970 if (GET_CODE (op
) == CONST_INT
)
2971 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
2973 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
2975 #ifdef REAL_ARITHMETIC
2976 REAL_VALUE_FROM_INT (d
, lv
, hv
, mode
);
2980 d
= (double) (~ hv
);
2981 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2982 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2983 d
+= (double) (unsigned HOST_WIDE_INT
) (~ lv
);
2989 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2990 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2991 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
2993 #endif /* REAL_ARITHMETIC */
2994 d
= real_value_truncate (mode
, d
);
2995 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2997 else if (code
== UNSIGNED_FLOAT
&& GET_MODE (op
) == VOIDmode
2998 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3000 HOST_WIDE_INT hv
, lv
;
3003 if (GET_CODE (op
) == CONST_INT
)
3004 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
3006 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
3008 if (op_mode
== VOIDmode
)
3010 /* We don't know how to interpret negative-looking numbers in
3011 this case, so don't try to fold those. */
3015 else if (GET_MODE_BITSIZE (op_mode
) >= HOST_BITS_PER_WIDE_INT
* 2)
3018 hv
= 0, lv
&= GET_MODE_MASK (op_mode
);
3020 #ifdef REAL_ARITHMETIC
3021 REAL_VALUE_FROM_UNSIGNED_INT (d
, lv
, hv
, mode
);
3024 d
= (double) (unsigned HOST_WIDE_INT
) hv
;
3025 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3026 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3027 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3028 #endif /* REAL_ARITHMETIC */
3029 d
= real_value_truncate (mode
, d
);
3030 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3034 if (GET_CODE (op
) == CONST_INT
3035 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3037 register HOST_WIDE_INT arg0
= INTVAL (op
);
3038 register HOST_WIDE_INT val
;
3051 val
= (arg0
>= 0 ? arg0
: - arg0
);
3055 /* Don't use ffs here. Instead, get low order bit and then its
3056 number. If arg0 is zero, this will return 0, as desired. */
3057 arg0
&= GET_MODE_MASK (mode
);
3058 val
= exact_log2 (arg0
& (- arg0
)) + 1;
3066 if (op_mode
== VOIDmode
)
3068 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3070 /* If we were really extending the mode,
3071 we would have to distinguish between zero-extension
3072 and sign-extension. */
3073 if (width
!= GET_MODE_BITSIZE (op_mode
))
3077 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3078 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3084 if (op_mode
== VOIDmode
)
3086 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3088 /* If we were really extending the mode,
3089 we would have to distinguish between zero-extension
3090 and sign-extension. */
3091 if (width
!= GET_MODE_BITSIZE (op_mode
))
3095 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3098 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3100 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3101 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3114 /* Clear the bits that don't belong in our mode,
3115 unless they and our sign bit are all one.
3116 So we get either a reasonable negative value or a reasonable
3117 unsigned value for this mode. */
3118 if (width
< HOST_BITS_PER_WIDE_INT
3119 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3120 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3121 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3123 return GEN_INT (val
);
3126 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3127 for a DImode operation on a CONST_INT. */
3128 else if (GET_MODE (op
) == VOIDmode
&& width
<= HOST_BITS_PER_INT
* 2
3129 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3131 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3133 if (GET_CODE (op
) == CONST_DOUBLE
)
3134 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3136 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3146 neg_double (l1
, h1
, &lv
, &hv
);
3151 neg_double (l1
, h1
, &lv
, &hv
);
3159 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3161 lv
= exact_log2 (l1
& (-l1
)) + 1;
3165 /* This is just a change-of-mode, so do nothing. */
3170 if (op_mode
== VOIDmode
3171 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3175 lv
= l1
& GET_MODE_MASK (op_mode
);
3179 if (op_mode
== VOIDmode
3180 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3184 lv
= l1
& GET_MODE_MASK (op_mode
);
3185 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3186 && (lv
& ((HOST_WIDE_INT
) 1
3187 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3188 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3190 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3201 return immed_double_const (lv
, hv
, mode
);
3204 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3205 else if (GET_CODE (op
) == CONST_DOUBLE
3206 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3212 if (setjmp (handler
))
3213 /* There used to be a warning here, but that is inadvisable.
3214 People may want to cause traps, and the natural way
3215 to do it should not get a warning. */
3218 set_float_handler (handler
);
3220 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3225 d
= REAL_VALUE_NEGATE (d
);
3229 if (REAL_VALUE_NEGATIVE (d
))
3230 d
= REAL_VALUE_NEGATE (d
);
3233 case FLOAT_TRUNCATE
:
3234 d
= real_value_truncate (mode
, d
);
3238 /* All this does is change the mode. */
3242 d
= REAL_VALUE_RNDZINT (d
);
3246 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3256 x
= CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3257 set_float_handler (NULL_PTR
);
3261 else if (GET_CODE (op
) == CONST_DOUBLE
3262 && GET_MODE_CLASS (GET_MODE (op
)) == MODE_FLOAT
3263 && GET_MODE_CLASS (mode
) == MODE_INT
3264 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3270 if (setjmp (handler
))
3273 set_float_handler (handler
);
3275 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3280 val
= REAL_VALUE_FIX (d
);
3284 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3291 set_float_handler (NULL_PTR
);
3293 /* Clear the bits that don't belong in our mode,
3294 unless they and our sign bit are all one.
3295 So we get either a reasonable negative value or a reasonable
3296 unsigned value for this mode. */
3297 if (width
< HOST_BITS_PER_WIDE_INT
3298 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3299 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3300 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3302 /* If this would be an entire word for the target, but is not for
3303 the host, then sign-extend on the host so that the number will look
3304 the same way on the host that it would on the target.
3306 For example, when building a 64 bit alpha hosted 32 bit sparc
3307 targeted compiler, then we want the 32 bit unsigned value -1 to be
3308 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3309 The later confuses the sparc backend. */
3311 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
3312 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
3313 val
|= ((HOST_WIDE_INT
) (-1) << width
);
3315 return GEN_INT (val
);
3318 /* This was formerly used only for non-IEEE float.
3319 eggert@twinsun.com says it is safe for IEEE also. */
3322 /* There are some simplifications we can do even if the operands
3328 /* (not (not X)) == X, similarly for NEG. */
3329 if (GET_CODE (op
) == code
)
3330 return XEXP (op
, 0);
3334 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3335 becomes just the MINUS if its mode is MODE. This allows
3336 folding switch statements on machines using casesi (such as
3338 if (GET_CODE (op
) == TRUNCATE
3339 && GET_MODE (XEXP (op
, 0)) == mode
3340 && GET_CODE (XEXP (op
, 0)) == MINUS
3341 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3342 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3343 return XEXP (op
, 0);
3345 #ifdef POINTERS_EXTEND_UNSIGNED
3346 if (! POINTERS_EXTEND_UNSIGNED
3347 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3349 return convert_memory_address (Pmode
, op
);
3353 #ifdef POINTERS_EXTEND_UNSIGNED
3355 if (POINTERS_EXTEND_UNSIGNED
3356 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3358 return convert_memory_address (Pmode
, op
);
3370 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3371 and OP1. Return 0 if no simplification is possible.
3373 Don't use this for relational operations such as EQ or LT.
3374 Use simplify_relational_operation instead. */
3377 simplify_binary_operation (code
, mode
, op0
, op1
)
3379 enum machine_mode mode
;
3382 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3384 int width
= GET_MODE_BITSIZE (mode
);
3387 /* Relational operations don't work here. We must know the mode
3388 of the operands in order to do the comparison correctly.
3389 Assuming a full word can give incorrect results.
3390 Consider comparing 128 with -128 in QImode. */
3392 if (GET_RTX_CLASS (code
) == '<')
3395 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3396 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3397 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3398 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3400 REAL_VALUE_TYPE f0
, f1
, value
;
3403 if (setjmp (handler
))
3406 set_float_handler (handler
);
3408 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3409 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3410 f0
= real_value_truncate (mode
, f0
);
3411 f1
= real_value_truncate (mode
, f1
);
3413 #ifdef REAL_ARITHMETIC
3414 #ifndef REAL_INFINITY
3415 if (code
== DIV
&& REAL_VALUES_EQUAL (f1
, dconst0
))
3418 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3432 #ifndef REAL_INFINITY
3439 value
= MIN (f0
, f1
);
3442 value
= MAX (f0
, f1
);
3449 value
= real_value_truncate (mode
, value
);
3450 set_float_handler (NULL_PTR
);
3451 return CONST_DOUBLE_FROM_REAL_VALUE (value
, mode
);
3453 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3455 /* We can fold some multi-word operations. */
3456 if (GET_MODE_CLASS (mode
) == MODE_INT
3457 && width
== HOST_BITS_PER_WIDE_INT
* 2
3458 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3459 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3461 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3463 if (GET_CODE (op0
) == CONST_DOUBLE
)
3464 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3466 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3468 if (GET_CODE (op1
) == CONST_DOUBLE
)
3469 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3471 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3476 /* A - B == A + (-B). */
3477 neg_double (l2
, h2
, &lv
, &hv
);
3480 /* .. fall through ... */
3483 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3487 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3490 case DIV
: case MOD
: case UDIV
: case UMOD
:
3491 /* We'd need to include tree.h to do this and it doesn't seem worth
3496 lv
= l1
& l2
, hv
= h1
& h2
;
3500 lv
= l1
| l2
, hv
= h1
| h2
;
3504 lv
= l1
^ l2
, hv
= h1
^ h2
;
3510 && ((unsigned HOST_WIDE_INT
) l1
3511 < (unsigned HOST_WIDE_INT
) l2
)))
3520 && ((unsigned HOST_WIDE_INT
) l1
3521 > (unsigned HOST_WIDE_INT
) l2
)))
3528 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3530 && ((unsigned HOST_WIDE_INT
) l1
3531 < (unsigned HOST_WIDE_INT
) l2
)))
3538 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3540 && ((unsigned HOST_WIDE_INT
) l1
3541 > (unsigned HOST_WIDE_INT
) l2
)))
3547 case LSHIFTRT
: case ASHIFTRT
:
3549 case ROTATE
: case ROTATERT
:
3550 #ifdef SHIFT_COUNT_TRUNCATED
3551 if (SHIFT_COUNT_TRUNCATED
)
3552 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3555 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3558 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3559 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3561 else if (code
== ASHIFT
)
3562 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
, 1);
3563 else if (code
== ROTATE
)
3564 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3565 else /* code == ROTATERT */
3566 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3573 return immed_double_const (lv
, hv
, mode
);
3576 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3577 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3579 /* Even if we can't compute a constant result,
3580 there are some cases worth simplifying. */
3585 /* In IEEE floating point, x+0 is not the same as x. Similarly
3586 for the other optimizations below. */
3587 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3588 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3591 if (op1
== CONST0_RTX (mode
))
3594 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3595 if (GET_CODE (op0
) == NEG
)
3596 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3597 else if (GET_CODE (op1
) == NEG
)
3598 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3600 /* Handle both-operands-constant cases. We can only add
3601 CONST_INTs to constants since the sum of relocatable symbols
3602 can't be handled by most assemblers. Don't add CONST_INT
3603 to CONST_INT since overflow won't be computed properly if wider
3604 than HOST_BITS_PER_WIDE_INT. */
3606 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3607 && GET_CODE (op1
) == CONST_INT
)
3608 return plus_constant (op0
, INTVAL (op1
));
3609 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3610 && GET_CODE (op0
) == CONST_INT
)
3611 return plus_constant (op1
, INTVAL (op0
));
3613 /* See if this is something like X * C - X or vice versa or
3614 if the multiplication is written as a shift. If so, we can
3615 distribute and make a new multiply, shift, or maybe just
3616 have X (if C is 2 in the example above). But don't make
3617 real multiply if we didn't have one before. */
3619 if (! FLOAT_MODE_P (mode
))
3621 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3622 rtx lhs
= op0
, rhs
= op1
;
3625 if (GET_CODE (lhs
) == NEG
)
3626 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3627 else if (GET_CODE (lhs
) == MULT
3628 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3630 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3633 else if (GET_CODE (lhs
) == ASHIFT
3634 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3635 && INTVAL (XEXP (lhs
, 1)) >= 0
3636 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3638 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3639 lhs
= XEXP (lhs
, 0);
3642 if (GET_CODE (rhs
) == NEG
)
3643 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3644 else if (GET_CODE (rhs
) == MULT
3645 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3647 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3650 else if (GET_CODE (rhs
) == ASHIFT
3651 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3652 && INTVAL (XEXP (rhs
, 1)) >= 0
3653 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3655 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3656 rhs
= XEXP (rhs
, 0);
3659 if (rtx_equal_p (lhs
, rhs
))
3661 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3662 GEN_INT (coeff0
+ coeff1
));
3663 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3667 /* If one of the operands is a PLUS or a MINUS, see if we can
3668 simplify this by the associative law.
3669 Don't use the associative law for floating point.
3670 The inaccuracy makes it nonassociative,
3671 and subtle programs can break if operations are associated. */
3673 if (INTEGRAL_MODE_P (mode
)
3674 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3675 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3676 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3682 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3683 using cc0, in which case we want to leave it as a COMPARE
3684 so we can distinguish it from a register-register-copy.
3686 In IEEE floating point, x-0 is not the same as x. */
3688 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3689 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3690 && op1
== CONST0_RTX (mode
))
3693 /* Do nothing here. */
3698 /* None of these optimizations can be done for IEEE
3700 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3701 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3704 /* We can't assume x-x is 0 even with non-IEEE floating point,
3705 but since it is zero except in very strange circumstances, we
3706 will treat it as zero with -ffast-math. */
3707 if (rtx_equal_p (op0
, op1
)
3708 && ! side_effects_p (op0
)
3709 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3710 return CONST0_RTX (mode
);
3712 /* Change subtraction from zero into negation. */
3713 if (op0
== CONST0_RTX (mode
))
3714 return gen_rtx_NEG (mode
, op1
);
3716 /* (-1 - a) is ~a. */
3717 if (op0
== constm1_rtx
)
3718 return gen_rtx_NOT (mode
, op1
);
3720 /* Subtracting 0 has no effect. */
3721 if (op1
== CONST0_RTX (mode
))
3724 /* See if this is something like X * C - X or vice versa or
3725 if the multiplication is written as a shift. If so, we can
3726 distribute and make a new multiply, shift, or maybe just
3727 have X (if C is 2 in the example above). But don't make
3728 real multiply if we didn't have one before. */
3730 if (! FLOAT_MODE_P (mode
))
3732 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3733 rtx lhs
= op0
, rhs
= op1
;
3736 if (GET_CODE (lhs
) == NEG
)
3737 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3738 else if (GET_CODE (lhs
) == MULT
3739 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3741 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3744 else if (GET_CODE (lhs
) == ASHIFT
3745 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3746 && INTVAL (XEXP (lhs
, 1)) >= 0
3747 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3749 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3750 lhs
= XEXP (lhs
, 0);
3753 if (GET_CODE (rhs
) == NEG
)
3754 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3755 else if (GET_CODE (rhs
) == MULT
3756 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3758 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3761 else if (GET_CODE (rhs
) == ASHIFT
3762 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3763 && INTVAL (XEXP (rhs
, 1)) >= 0
3764 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3766 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3767 rhs
= XEXP (rhs
, 0);
3770 if (rtx_equal_p (lhs
, rhs
))
3772 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3773 GEN_INT (coeff0
- coeff1
));
3774 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3778 /* (a - (-b)) -> (a + b). */
3779 if (GET_CODE (op1
) == NEG
)
3780 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3782 /* If one of the operands is a PLUS or a MINUS, see if we can
3783 simplify this by the associative law.
3784 Don't use the associative law for floating point.
3785 The inaccuracy makes it nonassociative,
3786 and subtle programs can break if operations are associated. */
3788 if (INTEGRAL_MODE_P (mode
)
3789 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3790 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3791 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3794 /* Don't let a relocatable value get a negative coeff. */
3795 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op0
) != VOIDmode
)
3796 return plus_constant (op0
, - INTVAL (op1
));
3798 /* (x - (x & y)) -> (x & ~y) */
3799 if (GET_CODE (op1
) == AND
)
3801 if (rtx_equal_p (op0
, XEXP (op1
, 0)))
3802 return cse_gen_binary (AND
, mode
, op0
, gen_rtx_NOT (mode
, XEXP (op1
, 1)));
3803 if (rtx_equal_p (op0
, XEXP (op1
, 1)))
3804 return cse_gen_binary (AND
, mode
, op0
, gen_rtx_NOT (mode
, XEXP (op1
, 0)));
3809 if (op1
== constm1_rtx
)
3811 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3813 return tem
? tem
: gen_rtx_NEG (mode
, op0
);
3816 /* In IEEE floating point, x*0 is not always 0. */
3817 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3818 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3819 && op1
== CONST0_RTX (mode
)
3820 && ! side_effects_p (op0
))
3823 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3824 However, ANSI says we can drop signals,
3825 so we can do this anyway. */
3826 if (op1
== CONST1_RTX (mode
))
3829 /* Convert multiply by constant power of two into shift unless
3830 we are still generating RTL. This test is a kludge. */
3831 if (GET_CODE (op1
) == CONST_INT
3832 && (val
= exact_log2 (INTVAL (op1
))) >= 0
3833 /* If the mode is larger than the host word size, and the
3834 uppermost bit is set, then this isn't a power of two due
3835 to implicit sign extension. */
3836 && (width
<= HOST_BITS_PER_WIDE_INT
3837 || val
!= HOST_BITS_PER_WIDE_INT
- 1)
3838 && ! rtx_equal_function_value_matters
)
3839 return gen_rtx_ASHIFT (mode
, op0
, GEN_INT (val
));
3841 if (GET_CODE (op1
) == CONST_DOUBLE
3842 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3846 int op1is2
, op1ism1
;
3848 if (setjmp (handler
))
3851 set_float_handler (handler
);
3852 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3853 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3854 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3855 set_float_handler (NULL_PTR
);
3857 /* x*2 is x+x and x*(-1) is -x */
3858 if (op1is2
&& GET_MODE (op0
) == mode
)
3859 return gen_rtx_PLUS (mode
, op0
, copy_rtx (op0
));
3861 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3862 return gen_rtx_NEG (mode
, op0
);
3867 if (op1
== const0_rtx
)
3869 if (GET_CODE (op1
) == CONST_INT
3870 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3872 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3874 /* A | (~A) -> -1 */
3875 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3876 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3877 && ! side_effects_p (op0
)
3878 && GET_MODE_CLASS (mode
) != MODE_CC
)
3883 if (op1
== const0_rtx
)
3885 if (GET_CODE (op1
) == CONST_INT
3886 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3887 return gen_rtx_NOT (mode
, op0
);
3888 if (op0
== op1
&& ! side_effects_p (op0
)
3889 && GET_MODE_CLASS (mode
) != MODE_CC
)
3894 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3896 if (GET_CODE (op1
) == CONST_INT
3897 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3899 if (op0
== op1
&& ! side_effects_p (op0
)
3900 && GET_MODE_CLASS (mode
) != MODE_CC
)
3903 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3904 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3905 && ! side_effects_p (op0
)
3906 && GET_MODE_CLASS (mode
) != MODE_CC
)
3911 /* Convert divide by power of two into shift (divide by 1 handled
3913 if (GET_CODE (op1
) == CONST_INT
3914 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3915 return gen_rtx_LSHIFTRT (mode
, op0
, GEN_INT (arg1
));
3917 /* ... fall through ... */
3920 if (op1
== CONST1_RTX (mode
))
3923 /* In IEEE floating point, 0/x is not always 0. */
3924 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3925 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3926 && op0
== CONST0_RTX (mode
)
3927 && ! side_effects_p (op1
))
3930 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3931 /* Change division by a constant into multiplication. Only do
3932 this with -ffast-math until an expert says it is safe in
3934 else if (GET_CODE (op1
) == CONST_DOUBLE
3935 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3936 && op1
!= CONST0_RTX (mode
)
3940 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3942 if (! REAL_VALUES_EQUAL (d
, dconst0
))
3944 #if defined (REAL_ARITHMETIC)
3945 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
3946 return gen_rtx_MULT (mode
, op0
,
3947 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3949 return gen_rtx_MULT (mode
, op0
,
3950 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3958 /* Handle modulus by power of two (mod with 1 handled below). */
3959 if (GET_CODE (op1
) == CONST_INT
3960 && exact_log2 (INTVAL (op1
)) > 0)
3961 return gen_rtx_AND (mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3963 /* ... fall through ... */
3966 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3967 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3973 /* Rotating ~0 always results in ~0. */
3974 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3975 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3976 && ! side_effects_p (op1
))
3979 /* ... fall through ... */
3984 if (op1
== const0_rtx
)
3986 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3991 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3992 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3993 && ! side_effects_p (op0
))
3995 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4000 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
4002 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
4003 && ! side_effects_p (op0
))
4005 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4010 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
4012 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4017 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
4019 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4030 /* Get the integer argument values in two forms:
4031 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4033 arg0
= INTVAL (op0
);
4034 arg1
= INTVAL (op1
);
4036 if (width
< HOST_BITS_PER_WIDE_INT
)
4038 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4039 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4042 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4043 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4046 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4047 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4055 /* Compute the value of the arithmetic. */
4060 val
= arg0s
+ arg1s
;
4064 val
= arg0s
- arg1s
;
4068 val
= arg0s
* arg1s
;
4074 val
= arg0s
/ arg1s
;
4080 val
= arg0s
% arg1s
;
4086 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
4092 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
4108 /* If shift count is undefined, don't fold it; let the machine do
4109 what it wants. But truncate it if the machine will do that. */
4113 #ifdef SHIFT_COUNT_TRUNCATED
4114 if (SHIFT_COUNT_TRUNCATED
)
4118 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
4125 #ifdef SHIFT_COUNT_TRUNCATED
4126 if (SHIFT_COUNT_TRUNCATED
)
4130 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
4137 #ifdef SHIFT_COUNT_TRUNCATED
4138 if (SHIFT_COUNT_TRUNCATED
)
4142 val
= arg0s
>> arg1
;
4144 /* Bootstrap compiler may not have sign extended the right shift.
4145 Manually extend the sign to insure bootstrap cc matches gcc. */
4146 if (arg0s
< 0 && arg1
> 0)
4147 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4156 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4157 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4165 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4166 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4170 /* Do nothing here. */
4174 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4178 val
= ((unsigned HOST_WIDE_INT
) arg0
4179 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4183 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4187 val
= ((unsigned HOST_WIDE_INT
) arg0
4188 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4195 /* Clear the bits that don't belong in our mode, unless they and our sign
4196 bit are all one. So we get either a reasonable negative value or a
4197 reasonable unsigned value for this mode. */
4198 if (width
< HOST_BITS_PER_WIDE_INT
4199 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4200 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4201 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4203 /* If this would be an entire word for the target, but is not for
4204 the host, then sign-extend on the host so that the number will look
4205 the same way on the host that it would on the target.
4207 For example, when building a 64 bit alpha hosted 32 bit sparc
4208 targeted compiler, then we want the 32 bit unsigned value -1 to be
4209 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4210 The later confuses the sparc backend. */
4212 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
4213 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
4214 val
|= ((HOST_WIDE_INT
) (-1) << width
);
4216 return GEN_INT (val
);
4219 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4222 Rather than test for specific case, we do this by a brute-force method
4223 and do all possible simplifications until no more changes occur. Then
4224 we rebuild the operation. */
4227 simplify_plus_minus (code
, mode
, op0
, op1
)
4229 enum machine_mode mode
;
4235 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4236 int first
= 1, negate
= 0, changed
;
4239 bzero ((char *) ops
, sizeof ops
);
4241 /* Set up the two operands and then expand them until nothing has been
4242 changed. If we run out of room in our array, give up; this should
4243 almost never happen. */
4245 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4252 for (i
= 0; i
< n_ops
; i
++)
4253 switch (GET_CODE (ops
[i
]))
4260 ops
[n_ops
] = XEXP (ops
[i
], 1);
4261 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4262 ops
[i
] = XEXP (ops
[i
], 0);
4268 ops
[i
] = XEXP (ops
[i
], 0);
4269 negs
[i
] = ! negs
[i
];
4274 ops
[i
] = XEXP (ops
[i
], 0);
4280 /* ~a -> (-a - 1) */
4283 ops
[n_ops
] = constm1_rtx
;
4284 negs
[n_ops
++] = negs
[i
];
4285 ops
[i
] = XEXP (ops
[i
], 0);
4286 negs
[i
] = ! negs
[i
];
4293 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4301 /* If we only have two operands, we can't do anything. */
4305 /* Now simplify each pair of operands until nothing changes. The first
4306 time through just simplify constants against each other. */
4313 for (i
= 0; i
< n_ops
- 1; i
++)
4314 for (j
= i
+ 1; j
< n_ops
; j
++)
4315 if (ops
[i
] != 0 && ops
[j
] != 0
4316 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4318 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4319 enum rtx_code ncode
= PLUS
;
4321 if (negs
[i
] && ! negs
[j
])
4322 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4323 else if (! negs
[i
] && negs
[j
])
4326 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4329 ops
[i
] = tem
, ops
[j
] = 0;
4330 negs
[i
] = negs
[i
] && negs
[j
];
4331 if (GET_CODE (tem
) == NEG
)
4332 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4334 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4335 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4343 /* Pack all the operands to the lower-numbered entries and give up if
4344 we didn't reduce the number of operands we had. Make sure we
4345 count a CONST as two operands. If we have the same number of
4346 operands, but have made more CONSTs than we had, this is also
4347 an improvement, so accept it. */
4349 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4352 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4353 if (GET_CODE (ops
[j
]) == CONST
)
4357 if (i
+ n_consts
> input_ops
4358 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4363 /* If we have a CONST_INT, put it last. */
4364 for (i
= 0; i
< n_ops
- 1; i
++)
4365 if (GET_CODE (ops
[i
]) == CONST_INT
)
4367 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4368 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4371 /* Put a non-negated operand first. If there aren't any, make all
4372 operands positive and negate the whole thing later. */
4373 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4378 for (i
= 0; i
< n_ops
; i
++)
4384 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4385 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4388 /* Now make the result by performing the requested operations. */
4390 for (i
= 1; i
< n_ops
; i
++)
4391 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4393 return negate
? gen_rtx_NEG (mode
, result
) : result
;
4396 /* Make a binary operation by properly ordering the operands and
4397 seeing if the expression folds. */
4400 cse_gen_binary (code
, mode
, op0
, op1
)
4402 enum machine_mode mode
;
4407 /* Put complex operands first and constants second if commutative. */
4408 if (GET_RTX_CLASS (code
) == 'c'
4409 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4410 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4411 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4412 || (GET_CODE (op0
) == SUBREG
4413 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4414 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4415 tem
= op0
, op0
= op1
, op1
= tem
;
4417 /* If this simplifies, do it. */
4418 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4423 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4424 just form the operation. */
4426 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4427 && GET_MODE (op0
) != VOIDmode
)
4428 return plus_constant (op0
, INTVAL (op1
));
4429 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4430 && GET_MODE (op0
) != VOIDmode
)
4431 return plus_constant (op0
, - INTVAL (op1
));
4433 return gen_rtx_fmt_ee (code
, mode
, op0
, op1
);
4436 /* Like simplify_binary_operation except used for relational operators.
4437 MODE is the mode of the operands, not that of the result. If MODE
4438 is VOIDmode, both operands must also be VOIDmode and we compare the
4439 operands in "infinite precision".
4441 If no simplification is possible, this function returns zero. Otherwise,
4442 it returns either const_true_rtx or const0_rtx. */
4445 simplify_relational_operation (code
, mode
, op0
, op1
)
4447 enum machine_mode mode
;
4450 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4453 /* If op0 is a compare, extract the comparison arguments from it. */
4454 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4455 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4457 /* We can't simplify MODE_CC values since we don't know what the
4458 actual comparison is. */
4459 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4466 /* For integer comparisons of A and B maybe we can simplify A - B and can
4467 then simplify a comparison of that with zero. If A and B are both either
4468 a register or a CONST_INT, this can't help; testing for these cases will
4469 prevent infinite recursion here and speed things up.
4471 If CODE is an unsigned comparison, then we can never do this optimization,
4472 because it gives an incorrect result if the subtraction wraps around zero.
4473 ANSI C defines unsigned operations such that they never overflow, and
4474 thus such cases can not be ignored. */
4476 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4477 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4478 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4479 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4480 && code
!= GTU
&& code
!= GEU
&& code
!= LTU
&& code
!= LEU
)
4481 return simplify_relational_operation (signed_condition (code
),
4482 mode
, tem
, const0_rtx
);
4484 /* For non-IEEE floating-point, if the two operands are equal, we know the
4486 if (rtx_equal_p (op0
, op1
)
4487 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4488 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4489 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4491 /* If the operands are floating-point constants, see if we can fold
4493 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4494 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4495 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4497 REAL_VALUE_TYPE d0
, d1
;
4500 if (setjmp (handler
))
4503 set_float_handler (handler
);
4504 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4505 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4506 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4507 op0lt
= op0ltu
= REAL_VALUES_LESS (d0
, d1
);
4508 op1lt
= op1ltu
= REAL_VALUES_LESS (d1
, d0
);
4509 set_float_handler (NULL_PTR
);
4511 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4513 /* Otherwise, see if the operands are both integers. */
4514 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4515 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4516 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4518 int width
= GET_MODE_BITSIZE (mode
);
4519 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4520 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4522 /* Get the two words comprising each integer constant. */
4523 if (GET_CODE (op0
) == CONST_DOUBLE
)
4525 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4526 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4530 l0u
= l0s
= INTVAL (op0
);
4531 h0u
= h0s
= l0s
< 0 ? -1 : 0;
4534 if (GET_CODE (op1
) == CONST_DOUBLE
)
4536 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4537 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4541 l1u
= l1s
= INTVAL (op1
);
4542 h1u
= h1s
= l1s
< 0 ? -1 : 0;
4545 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4546 we have to sign or zero-extend the values. */
4547 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4548 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4550 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4552 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4553 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4555 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4556 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4558 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4559 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4562 equal
= (h0u
== h1u
&& l0u
== l1u
);
4563 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4564 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4565 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4566 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4569 /* Otherwise, there are some code-specific tests we can make. */
4575 /* References to the frame plus a constant or labels cannot
4576 be zero, but a SYMBOL_REF can due to #pragma weak. */
4577 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4578 || GET_CODE (op0
) == LABEL_REF
)
4579 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4580 /* On some machines, the ap reg can be 0 sometimes. */
4581 && op0
!= arg_pointer_rtx
4588 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4589 || GET_CODE (op0
) == LABEL_REF
)
4590 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4591 && op0
!= arg_pointer_rtx
4594 return const_true_rtx
;
4598 /* Unsigned values are never negative. */
4599 if (op1
== const0_rtx
)
4600 return const_true_rtx
;
4604 if (op1
== const0_rtx
)
4609 /* Unsigned values are never greater than the largest
4611 if (GET_CODE (op1
) == CONST_INT
4612 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4613 && INTEGRAL_MODE_P (mode
))
4614 return const_true_rtx
;
4618 if (GET_CODE (op1
) == CONST_INT
4619 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4620 && INTEGRAL_MODE_P (mode
))
4631 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4636 return equal
? const_true_rtx
: const0_rtx
;
4638 return ! equal
? const_true_rtx
: const0_rtx
;
4640 return op0lt
? const_true_rtx
: const0_rtx
;
4642 return op1lt
? const_true_rtx
: const0_rtx
;
4644 return op0ltu
? const_true_rtx
: const0_rtx
;
4646 return op1ltu
? const_true_rtx
: const0_rtx
;
4648 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4650 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4652 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4654 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4660 /* Simplify CODE, an operation with result mode MODE and three operands,
4661 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4662 a constant. Return 0 if no simplifications is possible. */
4665 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4667 enum machine_mode mode
, op0_mode
;
4670 int width
= GET_MODE_BITSIZE (mode
);
4672 /* VOIDmode means "infinite" precision. */
4674 width
= HOST_BITS_PER_WIDE_INT
;
4680 if (GET_CODE (op0
) == CONST_INT
4681 && GET_CODE (op1
) == CONST_INT
4682 && GET_CODE (op2
) == CONST_INT
4683 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4684 && width
<= HOST_BITS_PER_WIDE_INT
)
4686 /* Extracting a bit-field from a constant */
4687 HOST_WIDE_INT val
= INTVAL (op0
);
4689 if (BITS_BIG_ENDIAN
)
4690 val
>>= (GET_MODE_BITSIZE (op0_mode
)
4691 - INTVAL (op2
) - INTVAL (op1
));
4693 val
>>= INTVAL (op2
);
4695 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4697 /* First zero-extend. */
4698 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4699 /* If desired, propagate sign bit. */
4700 if (code
== SIGN_EXTRACT
4701 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4702 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4705 /* Clear the bits that don't belong in our mode,
4706 unless they and our sign bit are all one.
4707 So we get either a reasonable negative value or a reasonable
4708 unsigned value for this mode. */
4709 if (width
< HOST_BITS_PER_WIDE_INT
4710 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4711 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4712 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4714 return GEN_INT (val
);
4719 if (GET_CODE (op0
) == CONST_INT
)
4720 return op0
!= const0_rtx
? op1
: op2
;
4722 /* Convert a == b ? b : a to "a". */
4723 if (GET_CODE (op0
) == NE
&& ! side_effects_p (op0
)
4724 && rtx_equal_p (XEXP (op0
, 0), op1
)
4725 && rtx_equal_p (XEXP (op0
, 1), op2
))
4727 else if (GET_CODE (op0
) == EQ
&& ! side_effects_p (op0
)
4728 && rtx_equal_p (XEXP (op0
, 1), op1
)
4729 && rtx_equal_p (XEXP (op0
, 0), op2
))
4731 else if (GET_RTX_CLASS (GET_CODE (op0
)) == '<' && ! side_effects_p (op0
))
4734 temp
= simplify_relational_operation (GET_CODE (op0
), op0_mode
,
4735 XEXP (op0
, 0), XEXP (op0
, 1));
4736 /* See if any simplifications were possible. */
4737 if (temp
== const0_rtx
)
4739 else if (temp
== const1_rtx
)
4751 /* If X is a nontrivial arithmetic operation on an argument
4752 for which a constant value can be determined, return
4753 the result of operating on that value, as a constant.
4754 Otherwise, return X, possibly with one or more operands
4755 modified by recursive calls to this function.
4757 If X is a register whose contents are known, we do NOT
4758 return those contents here. equiv_constant is called to
4761 INSN is the insn that we may be modifying. If it is 0, make a copy
4762 of X before modifying it. */
4769 register enum rtx_code code
;
4770 register enum machine_mode mode
;
4777 /* Folded equivalents of first two operands of X. */
4781 /* Constant equivalents of first three operands of X;
4782 0 when no such equivalent is known. */
4787 /* The mode of the first operand of X. We need this for sign and zero
4789 enum machine_mode mode_arg0
;
4794 mode
= GET_MODE (x
);
4795 code
= GET_CODE (x
);
4804 /* No use simplifying an EXPR_LIST
4805 since they are used only for lists of args
4806 in a function call's REG_EQUAL note. */
4808 /* Changing anything inside an ADDRESSOF is incorrect; we don't
4809 want to (e.g.,) make (addressof (const_int 0)) just because
4810 the location is known to be zero. */
4816 return prev_insn_cc0
;
4820 /* If the next insn is a CODE_LABEL followed by a jump table,
4821 PC's value is a LABEL_REF pointing to that label. That
4822 lets us fold switch statements on the Vax. */
4823 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4825 rtx next
= next_nonnote_insn (insn
);
4827 if (next
&& GET_CODE (next
) == CODE_LABEL
4828 && NEXT_INSN (next
) != 0
4829 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4830 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4831 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4832 return gen_rtx_LABEL_REF (Pmode
, next
);
4837 /* See if we previously assigned a constant value to this SUBREG. */
4838 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4839 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4842 /* If this is a paradoxical SUBREG, we have no idea what value the
4843 extra bits would have. However, if the operand is equivalent
4844 to a SUBREG whose operand is the same as our mode, and all the
4845 modes are within a word, we can just use the inner operand
4846 because these SUBREGs just say how to treat the register.
4848 Similarly if we find an integer constant. */
4850 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4852 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4853 struct table_elt
*elt
;
4855 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4856 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4857 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4859 for (elt
= elt
->first_same_value
;
4860 elt
; elt
= elt
->next_same_value
)
4862 if (CONSTANT_P (elt
->exp
)
4863 && GET_MODE (elt
->exp
) == VOIDmode
)
4866 if (GET_CODE (elt
->exp
) == SUBREG
4867 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4868 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4869 return copy_rtx (SUBREG_REG (elt
->exp
));
4875 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4876 We might be able to if the SUBREG is extracting a single word in an
4877 integral mode or extracting the low part. */
4879 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4880 const_arg0
= equiv_constant (folded_arg0
);
4882 folded_arg0
= const_arg0
;
4884 if (folded_arg0
!= SUBREG_REG (x
))
4888 if (GET_MODE_CLASS (mode
) == MODE_INT
4889 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4890 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4891 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4892 GET_MODE (SUBREG_REG (x
)));
4893 if (new == 0 && subreg_lowpart_p (x
))
4894 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4899 /* If this is a narrowing SUBREG and our operand is a REG, see if
4900 we can find an equivalence for REG that is an arithmetic operation
4901 in a wider mode where both operands are paradoxical SUBREGs
4902 from objects of our result mode. In that case, we couldn't report
4903 an equivalent value for that operation, since we don't know what the
4904 extra bits will be. But we can find an equivalence for this SUBREG
4905 by folding that operation is the narrow mode. This allows us to
4906 fold arithmetic in narrow modes when the machine only supports
4907 word-sized arithmetic.
4909 Also look for a case where we have a SUBREG whose operand is the
4910 same as our result. If both modes are smaller than a word, we
4911 are simply interpreting a register in different modes and we
4912 can use the inner value. */
4914 if (GET_CODE (folded_arg0
) == REG
4915 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4916 && subreg_lowpart_p (x
))
4918 struct table_elt
*elt
;
4920 /* We can use HASH here since we know that canon_hash won't be
4922 elt
= lookup (folded_arg0
,
4923 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4924 GET_MODE (folded_arg0
));
4927 elt
= elt
->first_same_value
;
4929 for (; elt
; elt
= elt
->next_same_value
)
4931 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4933 /* Just check for unary and binary operations. */
4934 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4935 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4936 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4937 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4938 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4940 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4942 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4943 op0
= fold_rtx (op0
, NULL_RTX
);
4945 op0
= equiv_constant (op0
);
4947 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4950 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4951 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4952 && eltcode
!= DIV
&& eltcode
!= MOD
4953 && eltcode
!= UDIV
&& eltcode
!= UMOD
4954 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4955 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4956 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4957 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4959 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4960 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4961 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4963 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4965 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4966 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4968 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4969 op0
= fold_rtx (op0
, NULL_RTX
);
4972 op0
= equiv_constant (op0
);
4974 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4975 op1
= fold_rtx (op1
, NULL_RTX
);
4978 op1
= equiv_constant (op1
);
4980 /* If we are looking for the low SImode part of
4981 (ashift:DI c (const_int 32)), it doesn't work
4982 to compute that in SImode, because a 32-bit shift
4983 in SImode is unpredictable. We know the value is 0. */
4985 && GET_CODE (elt
->exp
) == ASHIFT
4986 && GET_CODE (op1
) == CONST_INT
4987 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
4989 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
4991 /* If the count fits in the inner mode's width,
4992 but exceeds the outer mode's width,
4993 the value will get truncated to 0
4997 /* If the count exceeds even the inner mode's width,
4998 don't fold this expression. */
5001 else if (op0
&& op1
)
5002 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
5006 else if (GET_CODE (elt
->exp
) == SUBREG
5007 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
5008 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
5010 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
5011 new = copy_rtx (SUBREG_REG (elt
->exp
));
5022 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5023 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5024 new = lookup_as_function (XEXP (x
, 0), code
);
5026 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
5030 /* If we are not actually processing an insn, don't try to find the
5031 best address. Not only don't we care, but we could modify the
5032 MEM in an invalid way since we have no insn to validate against. */
5034 find_best_addr (insn
, &XEXP (x
, 0));
5037 /* Even if we don't fold in the insn itself,
5038 we can safely do so here, in hopes of getting a constant. */
5039 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
5041 HOST_WIDE_INT offset
= 0;
5043 if (GET_CODE (addr
) == REG
5044 && REGNO_QTY_VALID_P (REGNO (addr
))
5045 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
5046 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
5047 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
5049 /* If address is constant, split it into a base and integer offset. */
5050 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
5052 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
5053 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
5055 base
= XEXP (XEXP (addr
, 0), 0);
5056 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
5058 else if (GET_CODE (addr
) == LO_SUM
5059 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
5060 base
= XEXP (addr
, 1);
5061 else if (GET_CODE (addr
) == ADDRESSOF
)
5062 return change_address (x
, VOIDmode
, addr
);
5064 /* If this is a constant pool reference, we can fold it into its
5065 constant to allow better value tracking. */
5066 if (base
&& GET_CODE (base
) == SYMBOL_REF
5067 && CONSTANT_POOL_ADDRESS_P (base
))
5069 rtx constant
= get_pool_constant (base
);
5070 enum machine_mode const_mode
= get_pool_mode (base
);
5073 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
5074 constant_pool_entries_cost
= COST (constant
);
5076 /* If we are loading the full constant, we have an equivalence. */
5077 if (offset
== 0 && mode
== const_mode
)
5080 /* If this actually isn't a constant (weird!), we can't do
5081 anything. Otherwise, handle the two most common cases:
5082 extracting a word from a multi-word constant, and extracting
5083 the low-order bits. Other cases don't seem common enough to
5085 if (! CONSTANT_P (constant
))
5088 if (GET_MODE_CLASS (mode
) == MODE_INT
5089 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
5090 && offset
% UNITS_PER_WORD
== 0
5091 && (new = operand_subword (constant
,
5092 offset
/ UNITS_PER_WORD
,
5093 0, const_mode
)) != 0)
5096 if (((BYTES_BIG_ENDIAN
5097 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
5098 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
5099 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
5103 /* If this is a reference to a label at a known position in a jump
5104 table, we also know its value. */
5105 if (base
&& GET_CODE (base
) == LABEL_REF
)
5107 rtx label
= XEXP (base
, 0);
5108 rtx table_insn
= NEXT_INSN (label
);
5110 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5111 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
5113 rtx table
= PATTERN (table_insn
);
5116 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5117 < XVECLEN (table
, 0)))
5118 return XVECEXP (table
, 0,
5119 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
5121 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5122 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
5124 rtx table
= PATTERN (table_insn
);
5127 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5128 < XVECLEN (table
, 1)))
5130 offset
/= GET_MODE_SIZE (GET_MODE (table
));
5131 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
5134 if (GET_MODE (table
) != Pmode
)
5135 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
5137 /* Indicate this is a constant. This isn't a
5138 valid form of CONST, but it will only be used
5139 to fold the next insns and then discarded, so
5140 it should be safe. */
5141 return gen_rtx_CONST (GET_MODE (new), new);
5150 for (i
= XVECLEN (x
, 3) - 1; i
>= 0; i
--)
5151 validate_change (insn
, &XVECEXP (x
, 3, i
),
5152 fold_rtx (XVECEXP (x
, 3, i
), insn
), 0);
5162 mode_arg0
= VOIDmode
;
5164 /* Try folding our operands.
5165 Then see which ones have constant values known. */
5167 fmt
= GET_RTX_FORMAT (code
);
5168 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5171 rtx arg
= XEXP (x
, i
);
5172 rtx folded_arg
= arg
, const_arg
= 0;
5173 enum machine_mode mode_arg
= GET_MODE (arg
);
5174 rtx cheap_arg
, expensive_arg
;
5175 rtx replacements
[2];
5178 /* Most arguments are cheap, so handle them specially. */
5179 switch (GET_CODE (arg
))
5182 /* This is the same as calling equiv_constant; it is duplicated
5184 if (REGNO_QTY_VALID_P (REGNO (arg
))
5185 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
5186 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
5187 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
5189 = gen_lowpart_if_possible (GET_MODE (arg
),
5190 qty_const
[reg_qty
[REGNO (arg
)]]);
5203 folded_arg
= prev_insn_cc0
;
5204 mode_arg
= prev_insn_cc0_mode
;
5205 const_arg
= equiv_constant (folded_arg
);
5210 folded_arg
= fold_rtx (arg
, insn
);
5211 const_arg
= equiv_constant (folded_arg
);
5214 /* For the first three operands, see if the operand
5215 is constant or equivalent to a constant. */
5219 folded_arg0
= folded_arg
;
5220 const_arg0
= const_arg
;
5221 mode_arg0
= mode_arg
;
5224 folded_arg1
= folded_arg
;
5225 const_arg1
= const_arg
;
5228 const_arg2
= const_arg
;
5232 /* Pick the least expensive of the folded argument and an
5233 equivalent constant argument. */
5234 if (const_arg
== 0 || const_arg
== folded_arg
5235 || COST (const_arg
) > COST (folded_arg
))
5236 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5238 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5240 /* Try to replace the operand with the cheapest of the two
5241 possibilities. If it doesn't work and this is either of the first
5242 two operands of a commutative operation, try swapping them.
5243 If THAT fails, try the more expensive, provided it is cheaper
5244 than what is already there. */
5246 if (cheap_arg
== XEXP (x
, i
))
5249 if (insn
== 0 && ! copied
)
5255 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5257 j
< 2 && replacements
[j
]
5258 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5261 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5264 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5266 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5267 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5269 if (apply_change_group ())
5271 /* Swap them back to be invalid so that this loop can
5272 continue and flag them to be swapped back later. */
5275 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5287 /* Don't try to fold inside of a vector of expressions.
5288 Doing nothing is harmless. */
5292 /* If a commutative operation, place a constant integer as the second
5293 operand unless the first operand is also a constant integer. Otherwise,
5294 place any constant second unless the first operand is also a constant. */
5296 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5298 if (must_swap
|| (const_arg0
5300 || (GET_CODE (const_arg0
) == CONST_INT
5301 && GET_CODE (const_arg1
) != CONST_INT
))))
5303 register rtx tem
= XEXP (x
, 0);
5305 if (insn
== 0 && ! copied
)
5311 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5312 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5313 if (apply_change_group ())
5315 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5316 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5321 /* If X is an arithmetic operation, see if we can simplify it. */
5323 switch (GET_RTX_CLASS (code
))
5329 /* We can't simplify extension ops unless we know the
5331 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5332 && mode_arg0
== VOIDmode
)
5335 /* If we had a CONST, strip it off and put it back later if we
5337 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
5338 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
5340 new = simplify_unary_operation (code
, mode
,
5341 const_arg0
? const_arg0
: folded_arg0
,
5343 if (new != 0 && is_const
)
5344 new = gen_rtx_CONST (mode
, new);
5349 /* See what items are actually being compared and set FOLDED_ARG[01]
5350 to those values and CODE to the actual comparison code. If any are
5351 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5352 do anything if both operands are already known to be constant. */
5354 if (const_arg0
== 0 || const_arg1
== 0)
5356 struct table_elt
*p0
, *p1
;
5357 rtx
true = const_true_rtx
, false = const0_rtx
;
5358 enum machine_mode mode_arg1
;
5360 #ifdef FLOAT_STORE_FLAG_VALUE
5361 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5363 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5365 false = CONST0_RTX (mode
);
5369 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5370 &mode_arg0
, &mode_arg1
);
5371 const_arg0
= equiv_constant (folded_arg0
);
5372 const_arg1
= equiv_constant (folded_arg1
);
5374 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5375 what kinds of things are being compared, so we can't do
5376 anything with this comparison. */
5378 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5381 /* If we do not now have two constants being compared, see
5382 if we can nevertheless deduce some things about the
5384 if (const_arg0
== 0 || const_arg1
== 0)
5386 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5387 non-explicit constant? These aren't zero, but we
5388 don't know their sign. */
5389 if (const_arg1
== const0_rtx
5390 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5391 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5393 || GET_CODE (folded_arg0
) == SYMBOL_REF
5395 || GET_CODE (folded_arg0
) == LABEL_REF
5396 || GET_CODE (folded_arg0
) == CONST
))
5400 else if (code
== NE
)
5404 /* See if the two operands are the same. We don't do this
5405 for IEEE floating-point since we can't assume x == x
5406 since x might be a NaN. */
5408 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5409 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5410 && (folded_arg0
== folded_arg1
5411 || (GET_CODE (folded_arg0
) == REG
5412 && GET_CODE (folded_arg1
) == REG
5413 && (reg_qty
[REGNO (folded_arg0
)]
5414 == reg_qty
[REGNO (folded_arg1
)]))
5415 || ((p0
= lookup (folded_arg0
,
5416 (safe_hash (folded_arg0
, mode_arg0
)
5417 % NBUCKETS
), mode_arg0
))
5418 && (p1
= lookup (folded_arg1
,
5419 (safe_hash (folded_arg1
, mode_arg0
)
5420 % NBUCKETS
), mode_arg0
))
5421 && p0
->first_same_value
== p1
->first_same_value
)))
5422 return ((code
== EQ
|| code
== LE
|| code
== GE
5423 || code
== LEU
|| code
== GEU
)
5426 /* If FOLDED_ARG0 is a register, see if the comparison we are
5427 doing now is either the same as we did before or the reverse
5428 (we only check the reverse if not floating-point). */
5429 else if (GET_CODE (folded_arg0
) == REG
)
5431 int qty
= reg_qty
[REGNO (folded_arg0
)];
5433 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5434 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5435 || (comparison_dominates_p (qty_comparison_code
[qty
],
5436 reverse_condition (code
))
5437 && ! FLOAT_MODE_P (mode_arg0
)))
5438 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5440 && rtx_equal_p (qty_comparison_const
[qty
],
5442 || (GET_CODE (folded_arg1
) == REG
5443 && (reg_qty
[REGNO (folded_arg1
)]
5444 == qty_comparison_qty
[qty
]))))
5445 return (comparison_dominates_p (qty_comparison_code
[qty
],
5452 /* If we are comparing against zero, see if the first operand is
5453 equivalent to an IOR with a constant. If so, we may be able to
5454 determine the result of this comparison. */
5456 if (const_arg1
== const0_rtx
)
5458 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5462 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5463 && GET_CODE (inner_const
) == CONST_INT
5464 && INTVAL (inner_const
) != 0)
5466 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5467 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5468 && (INTVAL (inner_const
)
5469 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5470 rtx
true = const_true_rtx
, false = const0_rtx
;
5472 #ifdef FLOAT_STORE_FLAG_VALUE
5473 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5475 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5477 false = CONST0_RTX (mode
);
5501 new = simplify_relational_operation (code
, mode_arg0
,
5502 const_arg0
? const_arg0
: folded_arg0
,
5503 const_arg1
? const_arg1
: folded_arg1
);
5504 #ifdef FLOAT_STORE_FLAG_VALUE
5505 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5506 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5507 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
, mode
));
5516 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5517 with that LABEL_REF as its second operand. If so, the result is
5518 the first operand of that MINUS. This handles switches with an
5519 ADDR_DIFF_VEC table. */
5520 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5523 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
5524 : lookup_as_function (folded_arg0
, MINUS
);
5526 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5527 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5530 /* Now try for a CONST of a MINUS like the above. */
5531 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
5532 : lookup_as_function (folded_arg0
, CONST
))) != 0
5533 && GET_CODE (XEXP (y
, 0)) == MINUS
5534 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5535 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg1
, 0))
5536 return XEXP (XEXP (y
, 0), 0);
5539 /* Likewise if the operands are in the other order. */
5540 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
5543 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
5544 : lookup_as_function (folded_arg1
, MINUS
);
5546 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5547 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
5550 /* Now try for a CONST of a MINUS like the above. */
5551 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
5552 : lookup_as_function (folded_arg1
, CONST
))) != 0
5553 && GET_CODE (XEXP (y
, 0)) == MINUS
5554 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5555 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg0
, 0))
5556 return XEXP (XEXP (y
, 0), 0);
5559 /* If second operand is a register equivalent to a negative
5560 CONST_INT, see if we can find a register equivalent to the
5561 positive constant. Make a MINUS if so. Don't do this for
5562 a non-negative constant since we might then alternate between
5563 chosing positive and negative constants. Having the positive
5564 constant previously-used is the more common case. Be sure
5565 the resulting constant is non-negative; if const_arg1 were
5566 the smallest negative number this would overflow: depending
5567 on the mode, this would either just be the same value (and
5568 hence not save anything) or be incorrect. */
5569 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
5570 && INTVAL (const_arg1
) < 0
5571 && - INTVAL (const_arg1
) >= 0
5572 && GET_CODE (folded_arg1
) == REG
)
5574 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5576 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5580 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5581 if (GET_CODE (p
->exp
) == REG
)
5582 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5583 canon_reg (p
->exp
, NULL_RTX
));
5588 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5589 If so, produce (PLUS Z C2-C). */
5590 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5592 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5593 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5594 return fold_rtx (plus_constant (copy_rtx (y
),
5595 -INTVAL (const_arg1
)),
5599 /* ... fall through ... */
5602 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5603 case IOR
: case AND
: case XOR
:
5604 case MULT
: case DIV
: case UDIV
:
5605 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5606 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5607 is known to be of similar form, we may be able to replace the
5608 operation with a combined operation. This may eliminate the
5609 intermediate operation if every use is simplified in this way.
5610 Note that the similar optimization done by combine.c only works
5611 if the intermediate operation's result has only one reference. */
5613 if (GET_CODE (folded_arg0
) == REG
5614 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5617 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5618 rtx y
= lookup_as_function (folded_arg0
, code
);
5620 enum rtx_code associate_code
;
5624 || 0 == (inner_const
5625 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5626 || GET_CODE (inner_const
) != CONST_INT
5627 /* If we have compiled a statement like
5628 "if (x == (x & mask1))", and now are looking at
5629 "x & mask2", we will have a case where the first operand
5630 of Y is the same as our first operand. Unless we detect
5631 this case, an infinite loop will result. */
5632 || XEXP (y
, 0) == folded_arg0
)
5635 /* Don't associate these operations if they are a PLUS with the
5636 same constant and it is a power of two. These might be doable
5637 with a pre- or post-increment. Similarly for two subtracts of
5638 identical powers of two with post decrement. */
5640 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5642 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5643 || exact_log2 (INTVAL (const_arg1
)) >= 0
5645 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5646 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5651 /* Compute the code used to compose the constants. For example,
5652 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5655 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5656 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5658 new_const
= simplify_binary_operation (associate_code
, mode
,
5659 const_arg1
, inner_const
);
5664 /* If we are associating shift operations, don't let this
5665 produce a shift of the size of the object or larger.
5666 This could occur when we follow a sign-extend by a right
5667 shift on a machine that does a sign-extend as a pair
5670 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5671 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5673 /* As an exception, we can turn an ASHIFTRT of this
5674 form into a shift of the number of bits - 1. */
5675 if (code
== ASHIFTRT
)
5676 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5681 y
= copy_rtx (XEXP (y
, 0));
5683 /* If Y contains our first operand (the most common way this
5684 can happen is if Y is a MEM), we would do into an infinite
5685 loop if we tried to fold it. So don't in that case. */
5687 if (! reg_mentioned_p (folded_arg0
, y
))
5688 y
= fold_rtx (y
, insn
);
5690 return cse_gen_binary (code
, mode
, y
, new_const
);
5698 new = simplify_binary_operation (code
, mode
,
5699 const_arg0
? const_arg0
: folded_arg0
,
5700 const_arg1
? const_arg1
: folded_arg1
);
5704 /* (lo_sum (high X) X) is simply X. */
5705 if (code
== LO_SUM
&& const_arg0
!= 0
5706 && GET_CODE (const_arg0
) == HIGH
5707 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5713 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5714 const_arg0
? const_arg0
: folded_arg0
,
5715 const_arg1
? const_arg1
: folded_arg1
,
5716 const_arg2
? const_arg2
: XEXP (x
, 2));
5720 return new ? new : x
;
5723 /* Return a constant value currently equivalent to X.
5724 Return 0 if we don't know one. */
5730 if (GET_CODE (x
) == REG
5731 && REGNO_QTY_VALID_P (REGNO (x
))
5732 && qty_const
[reg_qty
[REGNO (x
)]])
5733 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5735 if (x
!= 0 && CONSTANT_P (x
))
5738 /* If X is a MEM, try to fold it outside the context of any insn to see if
5739 it might be equivalent to a constant. That handles the case where it
5740 is a constant-pool reference. Then try to look it up in the hash table
5741 in case it is something whose value we have seen before. */
5743 if (GET_CODE (x
) == MEM
)
5745 struct table_elt
*elt
;
5747 x
= fold_rtx (x
, NULL_RTX
);
5751 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5755 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5756 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5763 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5764 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5765 least-significant part of X.
5766 MODE specifies how big a part of X to return.
5768 If the requested operation cannot be done, 0 is returned.
5770 This is similar to gen_lowpart in emit-rtl.c. */
5773 gen_lowpart_if_possible (mode
, x
)
5774 enum machine_mode mode
;
5777 rtx result
= gen_lowpart_common (mode
, x
);
5781 else if (GET_CODE (x
) == MEM
)
5783 /* This is the only other case we handle. */
5784 register int offset
= 0;
5787 if (WORDS_BIG_ENDIAN
)
5788 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5789 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5790 if (BYTES_BIG_ENDIAN
)
5791 /* Adjust the address so that the address-after-the-data is
5793 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5794 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5795 new = gen_rtx_MEM (mode
, plus_constant (XEXP (x
, 0), offset
));
5796 if (! memory_address_p (mode
, XEXP (new, 0)))
5798 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5799 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5800 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5807 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5808 branch. It will be zero if not.
5810 In certain cases, this can cause us to add an equivalence. For example,
5811 if we are following the taken case of
5813 we can add the fact that `i' and '2' are now equivalent.
5815 In any case, we can record that this comparison was passed. If the same
5816 comparison is seen later, we will know its value. */
5819 record_jump_equiv (insn
, taken
)
5823 int cond_known_true
;
5825 enum machine_mode mode
, mode0
, mode1
;
5826 int reversed_nonequality
= 0;
5829 /* Ensure this is the right kind of insn. */
5830 if (! condjump_p (insn
) || simplejump_p (insn
))
5833 /* See if this jump condition is known true or false. */
5835 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5837 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5839 /* Get the type of comparison being done and the operands being compared.
5840 If we had to reverse a non-equality condition, record that fact so we
5841 know that it isn't valid for floating-point. */
5842 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5843 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5844 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5846 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5847 if (! cond_known_true
)
5849 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5850 code
= reverse_condition (code
);
5853 /* The mode is the mode of the non-constant. */
5855 if (mode1
!= VOIDmode
)
5858 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5861 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5862 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5863 Make any useful entries we can with that information. Called from
5864 above function and called recursively. */
5867 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5869 enum machine_mode mode
;
5871 int reversed_nonequality
;
5873 unsigned op0_hash
, op1_hash
;
5874 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5875 struct table_elt
*op0_elt
, *op1_elt
;
5877 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5878 we know that they are also equal in the smaller mode (this is also
5879 true for all smaller modes whether or not there is a SUBREG, but
5880 is not worth testing for with no SUBREG. */
5882 /* Note that GET_MODE (op0) may not equal MODE. */
5883 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5884 && (GET_MODE_SIZE (GET_MODE (op0
))
5885 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5887 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5888 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5890 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5891 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
5892 reversed_nonequality
);
5895 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5896 && (GET_MODE_SIZE (GET_MODE (op1
))
5897 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5899 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5900 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5902 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5903 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
5904 reversed_nonequality
);
5907 /* Similarly, if this is an NE comparison, and either is a SUBREG
5908 making a smaller mode, we know the whole thing is also NE. */
5910 /* Note that GET_MODE (op0) may not equal MODE;
5911 if we test MODE instead, we can get an infinite recursion
5912 alternating between two modes each wider than MODE. */
5914 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5915 && subreg_lowpart_p (op0
)
5916 && (GET_MODE_SIZE (GET_MODE (op0
))
5917 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5919 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5920 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5922 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5923 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
5924 reversed_nonequality
);
5927 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5928 && subreg_lowpart_p (op1
)
5929 && (GET_MODE_SIZE (GET_MODE (op1
))
5930 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5932 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5933 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5935 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5936 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
5937 reversed_nonequality
);
5940 /* Hash both operands. */
5943 hash_arg_in_memory
= 0;
5944 hash_arg_in_struct
= 0;
5945 op0_hash
= HASH (op0
, mode
);
5946 op0_in_memory
= hash_arg_in_memory
;
5947 op0_in_struct
= hash_arg_in_struct
;
5953 hash_arg_in_memory
= 0;
5954 hash_arg_in_struct
= 0;
5955 op1_hash
= HASH (op1
, mode
);
5956 op1_in_memory
= hash_arg_in_memory
;
5957 op1_in_struct
= hash_arg_in_struct
;
5962 /* Look up both operands. */
5963 op0_elt
= lookup (op0
, op0_hash
, mode
);
5964 op1_elt
= lookup (op1
, op1_hash
, mode
);
5966 /* If both operands are already equivalent or if they are not in the
5967 table but are identical, do nothing. */
5968 if ((op0_elt
!= 0 && op1_elt
!= 0
5969 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
5970 || op0
== op1
|| rtx_equal_p (op0
, op1
))
5973 /* If we aren't setting two things equal all we can do is save this
5974 comparison. Similarly if this is floating-point. In the latter
5975 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5976 If we record the equality, we might inadvertently delete code
5977 whose intent was to change -0 to +0. */
5979 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
5981 /* If we reversed a floating-point comparison, if OP0 is not a
5982 register, or if OP1 is neither a register or constant, we can't
5985 if (GET_CODE (op1
) != REG
)
5986 op1
= equiv_constant (op1
);
5988 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
5989 || GET_CODE (op0
) != REG
|| op1
== 0)
5992 /* Put OP0 in the hash table if it isn't already. This gives it a
5993 new quantity number. */
5996 if (insert_regs (op0
, NULL_PTR
, 0))
5998 rehash_using_reg (op0
);
5999 op0_hash
= HASH (op0
, mode
);
6001 /* If OP0 is contained in OP1, this changes its hash code
6002 as well. Faster to rehash than to check, except
6003 for the simple case of a constant. */
6004 if (! CONSTANT_P (op1
))
6005 op1_hash
= HASH (op1
,mode
);
6008 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6009 op0_elt
->in_memory
= op0_in_memory
;
6010 op0_elt
->in_struct
= op0_in_struct
;
6013 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
6014 if (GET_CODE (op1
) == REG
)
6016 /* Look it up again--in case op0 and op1 are the same. */
6017 op1_elt
= lookup (op1
, op1_hash
, mode
);
6019 /* Put OP1 in the hash table so it gets a new quantity number. */
6022 if (insert_regs (op1
, NULL_PTR
, 0))
6024 rehash_using_reg (op1
);
6025 op1_hash
= HASH (op1
, mode
);
6028 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6029 op1_elt
->in_memory
= op1_in_memory
;
6030 op1_elt
->in_struct
= op1_in_struct
;
6033 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
6034 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
6038 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
6039 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
6045 /* If either side is still missing an equivalence, make it now,
6046 then merge the equivalences. */
6050 if (insert_regs (op0
, NULL_PTR
, 0))
6052 rehash_using_reg (op0
);
6053 op0_hash
= HASH (op0
, mode
);
6056 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6057 op0_elt
->in_memory
= op0_in_memory
;
6058 op0_elt
->in_struct
= op0_in_struct
;
6063 if (insert_regs (op1
, NULL_PTR
, 0))
6065 rehash_using_reg (op1
);
6066 op1_hash
= HASH (op1
, mode
);
6069 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6070 op1_elt
->in_memory
= op1_in_memory
;
6071 op1_elt
->in_struct
= op1_in_struct
;
6074 merge_equiv_classes (op0_elt
, op1_elt
);
6075 last_jump_equiv_class
= op0_elt
;
6078 /* CSE processing for one instruction.
6079 First simplify sources and addresses of all assignments
6080 in the instruction, using previously-computed equivalents values.
6081 Then install the new sources and destinations in the table
6082 of available values.
6084 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
6087 /* Data on one SET contained in the instruction. */
6091 /* The SET rtx itself. */
6093 /* The SET_SRC of the rtx (the original value, if it is changing). */
6095 /* The hash-table element for the SET_SRC of the SET. */
6096 struct table_elt
*src_elt
;
6097 /* Hash value for the SET_SRC. */
6099 /* Hash value for the SET_DEST. */
6101 /* The SET_DEST, with SUBREG, etc., stripped. */
6103 /* Place where the pointer to the INNER_DEST was found. */
6104 rtx
*inner_dest_loc
;
6105 /* Nonzero if the SET_SRC is in memory. */
6107 /* Nonzero if the SET_SRC is in a structure. */
6109 /* Nonzero if the SET_SRC contains something
6110 whose value cannot be predicted and understood. */
6112 /* Original machine mode, in case it becomes a CONST_INT. */
6113 enum machine_mode mode
;
6114 /* A constant equivalent for SET_SRC, if any. */
6116 /* Hash value of constant equivalent for SET_SRC. */
6117 unsigned src_const_hash
;
6118 /* Table entry for constant equivalent for SET_SRC, if any. */
6119 struct table_elt
*src_const_elt
;
6123 cse_insn (insn
, in_libcall_block
)
6125 int in_libcall_block
;
6127 register rtx x
= PATTERN (insn
);
6130 register int n_sets
= 0;
6133 /* Records what this insn does to set CC0. */
6134 rtx this_insn_cc0
= 0;
6135 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
6139 struct table_elt
*src_eqv_elt
= 0;
6140 int src_eqv_volatile
;
6141 int src_eqv_in_memory
;
6142 int src_eqv_in_struct
;
6143 unsigned src_eqv_hash
;
6149 /* Find all the SETs and CLOBBERs in this instruction.
6150 Record all the SETs in the array `set' and count them.
6151 Also determine whether there is a CLOBBER that invalidates
6152 all memory references, or all references at varying addresses. */
6154 if (GET_CODE (insn
) == CALL_INSN
)
6156 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6157 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6158 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6161 if (GET_CODE (x
) == SET
)
6163 sets
= (struct set
*) alloca (sizeof (struct set
));
6166 /* Ignore SETs that are unconditional jumps.
6167 They never need cse processing, so this does not hurt.
6168 The reason is not efficiency but rather
6169 so that we can test at the end for instructions
6170 that have been simplified to unconditional jumps
6171 and not be misled by unchanged instructions
6172 that were unconditional jumps to begin with. */
6173 if (SET_DEST (x
) == pc_rtx
6174 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
6177 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6178 The hard function value register is used only once, to copy to
6179 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6180 Ensure we invalidate the destination register. On the 80386 no
6181 other code would invalidate it since it is a fixed_reg.
6182 We need not check the return of apply_change_group; see canon_reg. */
6184 else if (GET_CODE (SET_SRC (x
)) == CALL
)
6186 canon_reg (SET_SRC (x
), insn
);
6187 apply_change_group ();
6188 fold_rtx (SET_SRC (x
), insn
);
6189 invalidate (SET_DEST (x
), VOIDmode
);
6194 else if (GET_CODE (x
) == PARALLEL
)
6196 register int lim
= XVECLEN (x
, 0);
6198 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
6200 /* Find all regs explicitly clobbered in this insn,
6201 and ensure they are not replaced with any other regs
6202 elsewhere in this insn.
6203 When a reg that is clobbered is also used for input,
6204 we should presume that that is for a reason,
6205 and we should not substitute some other register
6206 which is not supposed to be clobbered.
6207 Therefore, this loop cannot be merged into the one below
6208 because a CALL may precede a CLOBBER and refer to the
6209 value clobbered. We must not let a canonicalization do
6210 anything in that case. */
6211 for (i
= 0; i
< lim
; i
++)
6213 register rtx y
= XVECEXP (x
, 0, i
);
6214 if (GET_CODE (y
) == CLOBBER
)
6216 rtx clobbered
= XEXP (y
, 0);
6218 if (GET_CODE (clobbered
) == REG
6219 || GET_CODE (clobbered
) == SUBREG
)
6220 invalidate (clobbered
, VOIDmode
);
6221 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6222 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6223 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6227 for (i
= 0; i
< lim
; i
++)
6229 register rtx y
= XVECEXP (x
, 0, i
);
6230 if (GET_CODE (y
) == SET
)
6232 /* As above, we ignore unconditional jumps and call-insns and
6233 ignore the result of apply_change_group. */
6234 if (GET_CODE (SET_SRC (y
)) == CALL
)
6236 canon_reg (SET_SRC (y
), insn
);
6237 apply_change_group ();
6238 fold_rtx (SET_SRC (y
), insn
);
6239 invalidate (SET_DEST (y
), VOIDmode
);
6241 else if (SET_DEST (y
) == pc_rtx
6242 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
6245 sets
[n_sets
++].rtl
= y
;
6247 else if (GET_CODE (y
) == CLOBBER
)
6249 /* If we clobber memory, canon the address.
6250 This does nothing when a register is clobbered
6251 because we have already invalidated the reg. */
6252 if (GET_CODE (XEXP (y
, 0)) == MEM
)
6253 canon_reg (XEXP (y
, 0), NULL_RTX
);
6255 else if (GET_CODE (y
) == USE
6256 && ! (GET_CODE (XEXP (y
, 0)) == REG
6257 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
6258 canon_reg (y
, NULL_RTX
);
6259 else if (GET_CODE (y
) == CALL
)
6261 /* The result of apply_change_group can be ignored; see
6263 canon_reg (y
, insn
);
6264 apply_change_group ();
6269 else if (GET_CODE (x
) == CLOBBER
)
6271 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6272 canon_reg (XEXP (x
, 0), NULL_RTX
);
6275 /* Canonicalize a USE of a pseudo register or memory location. */
6276 else if (GET_CODE (x
) == USE
6277 && ! (GET_CODE (XEXP (x
, 0)) == REG
6278 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6279 canon_reg (XEXP (x
, 0), NULL_RTX
);
6280 else if (GET_CODE (x
) == CALL
)
6282 /* The result of apply_change_group can be ignored; see canon_reg. */
6283 canon_reg (x
, insn
);
6284 apply_change_group ();
6288 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6289 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6290 is handled specially for this case, and if it isn't set, then there will
6291 be no equivalence for the destination. */
6292 if (n_sets
== 1 && REG_NOTES (insn
) != 0
6293 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
6294 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
6295 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
6296 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6298 /* Canonicalize sources and addresses of destinations.
6299 We do this in a separate pass to avoid problems when a MATCH_DUP is
6300 present in the insn pattern. In that case, we want to ensure that
6301 we don't break the duplicate nature of the pattern. So we will replace
6302 both operands at the same time. Otherwise, we would fail to find an
6303 equivalent substitution in the loop calling validate_change below.
6305 We used to suppress canonicalization of DEST if it appears in SRC,
6306 but we don't do this any more. */
6308 for (i
= 0; i
< n_sets
; i
++)
6310 rtx dest
= SET_DEST (sets
[i
].rtl
);
6311 rtx src
= SET_SRC (sets
[i
].rtl
);
6312 rtx
new = canon_reg (src
, insn
);
6315 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6316 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6317 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6318 || (insn_code
= recog_memoized (insn
)) < 0
6319 || insn_n_dups
[insn_code
] > 0)
6320 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6322 SET_SRC (sets
[i
].rtl
) = new;
6324 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6326 validate_change (insn
, &XEXP (dest
, 1),
6327 canon_reg (XEXP (dest
, 1), insn
), 1);
6328 validate_change (insn
, &XEXP (dest
, 2),
6329 canon_reg (XEXP (dest
, 2), insn
), 1);
6332 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6333 || GET_CODE (dest
) == ZERO_EXTRACT
6334 || GET_CODE (dest
) == SIGN_EXTRACT
)
6335 dest
= XEXP (dest
, 0);
6337 if (GET_CODE (dest
) == MEM
)
6338 canon_reg (dest
, insn
);
6341 /* Now that we have done all the replacements, we can apply the change
6342 group and see if they all work. Note that this will cause some
6343 canonicalizations that would have worked individually not to be applied
6344 because some other canonicalization didn't work, but this should not
6347 The result of apply_change_group can be ignored; see canon_reg. */
6349 apply_change_group ();
6351 /* Set sets[i].src_elt to the class each source belongs to.
6352 Detect assignments from or to volatile things
6353 and set set[i] to zero so they will be ignored
6354 in the rest of this function.
6356 Nothing in this loop changes the hash table or the register chains. */
6358 for (i
= 0; i
< n_sets
; i
++)
6360 register rtx src
, dest
;
6361 register rtx src_folded
;
6362 register struct table_elt
*elt
= 0, *p
;
6363 enum machine_mode mode
;
6366 rtx src_related
= 0;
6367 struct table_elt
*src_const_elt
= 0;
6368 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6369 int src_related_cost
= 10000, src_elt_cost
= 10000;
6370 /* Set non-zero if we need to call force_const_mem on with the
6371 contents of src_folded before using it. */
6372 int src_folded_force_flag
= 0;
6374 dest
= SET_DEST (sets
[i
].rtl
);
6375 src
= SET_SRC (sets
[i
].rtl
);
6377 /* If SRC is a constant that has no machine mode,
6378 hash it with the destination's machine mode.
6379 This way we can keep different modes separate. */
6381 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6382 sets
[i
].mode
= mode
;
6386 enum machine_mode eqvmode
= mode
;
6387 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6388 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6390 hash_arg_in_memory
= 0;
6391 hash_arg_in_struct
= 0;
6392 src_eqv
= fold_rtx (src_eqv
, insn
);
6393 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6395 /* Find the equivalence class for the equivalent expression. */
6398 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6400 src_eqv_volatile
= do_not_record
;
6401 src_eqv_in_memory
= hash_arg_in_memory
;
6402 src_eqv_in_struct
= hash_arg_in_struct
;
6405 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6406 value of the INNER register, not the destination. So it is not
6407 a valid substitution for the source. But save it for later. */
6408 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6411 src_eqv_here
= src_eqv
;
6413 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6414 simplified result, which may not necessarily be valid. */
6415 src_folded
= fold_rtx (src
, insn
);
6418 /* ??? This caused bad code to be generated for the m68k port with -O2.
6419 Suppose src is (CONST_INT -1), and that after truncation src_folded
6420 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6421 At the end we will add src and src_const to the same equivalence
6422 class. We now have 3 and -1 on the same equivalence class. This
6423 causes later instructions to be mis-optimized. */
6424 /* If storing a constant in a bitfield, pre-truncate the constant
6425 so we will be able to record it later. */
6426 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6427 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6429 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6431 if (GET_CODE (src
) == CONST_INT
6432 && GET_CODE (width
) == CONST_INT
6433 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6434 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6436 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6437 << INTVAL (width
)) - 1));
6441 /* Compute SRC's hash code, and also notice if it
6442 should not be recorded at all. In that case,
6443 prevent any further processing of this assignment. */
6445 hash_arg_in_memory
= 0;
6446 hash_arg_in_struct
= 0;
6449 sets
[i
].src_hash
= HASH (src
, mode
);
6450 sets
[i
].src_volatile
= do_not_record
;
6451 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6452 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6454 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6455 a pseudo that is set more than once, do not record SRC. Using
6456 SRC as a replacement for anything else will be incorrect in that
6457 situation. Note that this usually occurs only for stack slots,
6458 in which case all the RTL would be referring to SRC, so we don't
6459 lose any optimization opportunities by not having SRC in the
6462 if (GET_CODE (src
) == MEM
6463 && find_reg_note (insn
, REG_EQUIV
, src
) != 0
6464 && GET_CODE (dest
) == REG
6465 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
6466 && REG_N_SETS (REGNO (dest
)) != 1)
6467 sets
[i
].src_volatile
= 1;
6470 /* It is no longer clear why we used to do this, but it doesn't
6471 appear to still be needed. So let's try without it since this
6472 code hurts cse'ing widened ops. */
6473 /* If source is a perverse subreg (such as QI treated as an SI),
6474 treat it as volatile. It may do the work of an SI in one context
6475 where the extra bits are not being used, but cannot replace an SI
6477 if (GET_CODE (src
) == SUBREG
6478 && (GET_MODE_SIZE (GET_MODE (src
))
6479 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6480 sets
[i
].src_volatile
= 1;
6483 /* Locate all possible equivalent forms for SRC. Try to replace
6484 SRC in the insn with each cheaper equivalent.
6486 We have the following types of equivalents: SRC itself, a folded
6487 version, a value given in a REG_EQUAL note, or a value related
6490 Each of these equivalents may be part of an additional class
6491 of equivalents (if more than one is in the table, they must be in
6492 the same class; we check for this).
6494 If the source is volatile, we don't do any table lookups.
6496 We note any constant equivalent for possible later use in a
6499 if (!sets
[i
].src_volatile
)
6500 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6502 sets
[i
].src_elt
= elt
;
6504 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6506 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6508 /* The REG_EQUAL is indicating that two formerly distinct
6509 classes are now equivalent. So merge them. */
6510 merge_equiv_classes (elt
, src_eqv_elt
);
6511 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6512 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6518 else if (src_eqv_elt
)
6521 /* Try to find a constant somewhere and record it in `src_const'.
6522 Record its table element, if any, in `src_const_elt'. Look in
6523 any known equivalences first. (If the constant is not in the
6524 table, also set `sets[i].src_const_hash'). */
6526 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6530 src_const_elt
= elt
;
6535 && (CONSTANT_P (src_folded
)
6536 /* Consider (minus (label_ref L1) (label_ref L2)) as
6537 "constant" here so we will record it. This allows us
6538 to fold switch statements when an ADDR_DIFF_VEC is used. */
6539 || (GET_CODE (src_folded
) == MINUS
6540 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6541 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6542 src_const
= src_folded
, src_const_elt
= elt
;
6543 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6544 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6546 /* If we don't know if the constant is in the table, get its
6547 hash code and look it up. */
6548 if (src_const
&& src_const_elt
== 0)
6550 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6551 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6554 sets
[i
].src_const
= src_const
;
6555 sets
[i
].src_const_elt
= src_const_elt
;
6557 /* If the constant and our source are both in the table, mark them as
6558 equivalent. Otherwise, if a constant is in the table but the source
6559 isn't, set ELT to it. */
6560 if (src_const_elt
&& elt
6561 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6562 merge_equiv_classes (elt
, src_const_elt
);
6563 else if (src_const_elt
&& elt
== 0)
6564 elt
= src_const_elt
;
6566 /* See if there is a register linearly related to a constant
6567 equivalent of SRC. */
6569 && (GET_CODE (src_const
) == CONST
6570 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6572 src_related
= use_related_value (src_const
, src_const_elt
);
6575 struct table_elt
*src_related_elt
6576 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6577 if (src_related_elt
&& elt
)
6579 if (elt
->first_same_value
6580 != src_related_elt
->first_same_value
)
6581 /* This can occur when we previously saw a CONST
6582 involving a SYMBOL_REF and then see the SYMBOL_REF
6583 twice. Merge the involved classes. */
6584 merge_equiv_classes (elt
, src_related_elt
);
6587 src_related_elt
= 0;
6589 else if (src_related_elt
&& elt
== 0)
6590 elt
= src_related_elt
;
6594 /* See if we have a CONST_INT that is already in a register in a
6597 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6598 && GET_MODE_CLASS (mode
) == MODE_INT
6599 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6601 enum machine_mode wider_mode
;
6603 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6604 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6605 && src_related
== 0;
6606 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6608 struct table_elt
*const_elt
6609 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6614 for (const_elt
= const_elt
->first_same_value
;
6615 const_elt
; const_elt
= const_elt
->next_same_value
)
6616 if (GET_CODE (const_elt
->exp
) == REG
)
6618 src_related
= gen_lowpart_if_possible (mode
,
6625 /* Another possibility is that we have an AND with a constant in
6626 a mode narrower than a word. If so, it might have been generated
6627 as part of an "if" which would narrow the AND. If we already
6628 have done the AND in a wider mode, we can use a SUBREG of that
6631 if (flag_expensive_optimizations
&& ! src_related
6632 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6633 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6635 enum machine_mode tmode
;
6636 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6638 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6639 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6640 tmode
= GET_MODE_WIDER_MODE (tmode
))
6642 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6643 struct table_elt
*larger_elt
;
6647 PUT_MODE (new_and
, tmode
);
6648 XEXP (new_and
, 0) = inner
;
6649 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6650 if (larger_elt
== 0)
6653 for (larger_elt
= larger_elt
->first_same_value
;
6654 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6655 if (GET_CODE (larger_elt
->exp
) == REG
)
6658 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6668 #ifdef LOAD_EXTEND_OP
6669 /* See if a MEM has already been loaded with a widening operation;
6670 if it has, we can use a subreg of that. Many CISC machines
6671 also have such operations, but this is only likely to be
6672 beneficial these machines. */
6674 if (flag_expensive_optimizations
&& src_related
== 0
6675 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6676 && GET_MODE_CLASS (mode
) == MODE_INT
6677 && GET_CODE (src
) == MEM
&& ! do_not_record
6678 && LOAD_EXTEND_OP (mode
) != NIL
)
6680 enum machine_mode tmode
;
6682 /* Set what we are trying to extend and the operation it might
6683 have been extended with. */
6684 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
6685 XEXP (memory_extend_rtx
, 0) = src
;
6687 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6688 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6689 tmode
= GET_MODE_WIDER_MODE (tmode
))
6691 struct table_elt
*larger_elt
;
6693 PUT_MODE (memory_extend_rtx
, tmode
);
6694 larger_elt
= lookup (memory_extend_rtx
,
6695 HASH (memory_extend_rtx
, tmode
), tmode
);
6696 if (larger_elt
== 0)
6699 for (larger_elt
= larger_elt
->first_same_value
;
6700 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6701 if (GET_CODE (larger_elt
->exp
) == REG
)
6703 src_related
= gen_lowpart_if_possible (mode
,
6712 #endif /* LOAD_EXTEND_OP */
6714 if (src
== src_folded
)
6717 /* At this point, ELT, if non-zero, points to a class of expressions
6718 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6719 and SRC_RELATED, if non-zero, each contain additional equivalent
6720 expressions. Prune these latter expressions by deleting expressions
6721 already in the equivalence class.
6723 Check for an equivalent identical to the destination. If found,
6724 this is the preferred equivalent since it will likely lead to
6725 elimination of the insn. Indicate this by placing it in
6728 if (elt
) elt
= elt
->first_same_value
;
6729 for (p
= elt
; p
; p
= p
->next_same_value
)
6731 enum rtx_code code
= GET_CODE (p
->exp
);
6733 /* If the expression is not valid, ignore it. Then we do not
6734 have to check for validity below. In most cases, we can use
6735 `rtx_equal_p', since canonicalization has already been done. */
6736 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6739 /* Also skip paradoxical subregs, unless that's what we're
6742 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
6743 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
6745 && GET_CODE (src
) == SUBREG
6746 && GET_MODE (src
) == GET_MODE (p
->exp
)
6747 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6748 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
6751 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6753 else if (src_folded
&& GET_CODE (src_folded
) == code
6754 && rtx_equal_p (src_folded
, p
->exp
))
6756 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6757 && rtx_equal_p (src_eqv_here
, p
->exp
))
6759 else if (src_related
&& GET_CODE (src_related
) == code
6760 && rtx_equal_p (src_related
, p
->exp
))
6763 /* This is the same as the destination of the insns, we want
6764 to prefer it. Copy it to src_related. The code below will
6765 then give it a negative cost. */
6766 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6771 /* Find the cheapest valid equivalent, trying all the available
6772 possibilities. Prefer items not in the hash table to ones
6773 that are when they are equal cost. Note that we can never
6774 worsen an insn as the current contents will also succeed.
6775 If we find an equivalent identical to the destination, use it as best,
6776 since this insn will probably be eliminated in that case. */
6779 if (rtx_equal_p (src
, dest
))
6782 src_cost
= COST (src
);
6787 if (rtx_equal_p (src_eqv_here
, dest
))
6790 src_eqv_cost
= COST (src_eqv_here
);
6795 if (rtx_equal_p (src_folded
, dest
))
6796 src_folded_cost
= -1;
6798 src_folded_cost
= COST (src_folded
);
6803 if (rtx_equal_p (src_related
, dest
))
6804 src_related_cost
= -1;
6806 src_related_cost
= COST (src_related
);
6809 /* If this was an indirect jump insn, a known label will really be
6810 cheaper even though it looks more expensive. */
6811 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6812 src_folded
= src_const
, src_folded_cost
= -1;
6814 /* Terminate loop when replacement made. This must terminate since
6815 the current contents will be tested and will always be valid. */
6820 /* Skip invalid entries. */
6821 while (elt
&& GET_CODE (elt
->exp
) != REG
6822 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6823 elt
= elt
->next_same_value
;
6825 /* A paradoxical subreg would be bad here: it'll be the right
6826 size, but later may be adjusted so that the upper bits aren't
6827 what we want. So reject it. */
6829 && GET_CODE (elt
->exp
) == SUBREG
6830 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
6831 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
6832 /* It is okay, though, if the rtx we're trying to match
6833 will ignore any of the bits we can't predict. */
6835 && GET_CODE (src
) == SUBREG
6836 && GET_MODE (src
) == GET_MODE (elt
->exp
)
6837 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6838 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
6840 elt
= elt
->next_same_value
;
6844 if (elt
) src_elt_cost
= elt
->cost
;
6846 /* Find cheapest and skip it for the next time. For items
6847 of equal cost, use this order:
6848 src_folded, src, src_eqv, src_related and hash table entry. */
6849 if (src_folded_cost
<= src_cost
6850 && src_folded_cost
<= src_eqv_cost
6851 && src_folded_cost
<= src_related_cost
6852 && src_folded_cost
<= src_elt_cost
)
6854 trial
= src_folded
, src_folded_cost
= 10000;
6855 if (src_folded_force_flag
)
6856 trial
= force_const_mem (mode
, trial
);
6858 else if (src_cost
<= src_eqv_cost
6859 && src_cost
<= src_related_cost
6860 && src_cost
<= src_elt_cost
)
6861 trial
= src
, src_cost
= 10000;
6862 else if (src_eqv_cost
<= src_related_cost
6863 && src_eqv_cost
<= src_elt_cost
)
6864 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
6865 else if (src_related_cost
<= src_elt_cost
)
6866 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
6869 trial
= copy_rtx (elt
->exp
);
6870 elt
= elt
->next_same_value
;
6871 src_elt_cost
= 10000;
6874 /* We don't normally have an insn matching (set (pc) (pc)), so
6875 check for this separately here. We will delete such an
6878 Tablejump insns contain a USE of the table, so simply replacing
6879 the operand with the constant won't match. This is simply an
6880 unconditional branch, however, and is therefore valid. Just
6881 insert the substitution here and we will delete and re-emit
6884 if (n_sets
== 1 && dest
== pc_rtx
6886 || (GET_CODE (trial
) == LABEL_REF
6887 && ! condjump_p (insn
))))
6889 /* If TRIAL is a label in front of a jump table, we are
6890 really falling through the switch (this is how casesi
6891 insns work), so we must branch around the table. */
6892 if (GET_CODE (trial
) == CODE_LABEL
6893 && NEXT_INSN (trial
) != 0
6894 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6895 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6896 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6898 trial
= gen_rtx_LABEL_REF (Pmode
, get_label_after (trial
));
6900 SET_SRC (sets
[i
].rtl
) = trial
;
6901 cse_jumps_altered
= 1;
6905 /* Look for a substitution that makes a valid insn. */
6906 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6908 /* The result of apply_change_group can be ignored; see
6911 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6912 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6914 apply_change_group ();
6918 /* If we previously found constant pool entries for
6919 constants and this is a constant, try making a
6920 pool entry. Put it in src_folded unless we already have done
6921 this since that is where it likely came from. */
6923 else if (constant_pool_entries_cost
6924 && CONSTANT_P (trial
)
6925 && ! (GET_CODE (trial
) == CONST
6926 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
6928 || (GET_CODE (src_folded
) != MEM
6929 && ! src_folded_force_flag
))
6930 && GET_MODE_CLASS (mode
) != MODE_CC
6931 && mode
!= VOIDmode
)
6933 src_folded_force_flag
= 1;
6935 src_folded_cost
= constant_pool_entries_cost
;
6939 src
= SET_SRC (sets
[i
].rtl
);
6941 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6942 However, there is an important exception: If both are registers
6943 that are not the head of their equivalence class, replace SET_SRC
6944 with the head of the class. If we do not do this, we will have
6945 both registers live over a portion of the basic block. This way,
6946 their lifetimes will likely abut instead of overlapping. */
6947 if (GET_CODE (dest
) == REG
6948 && REGNO_QTY_VALID_P (REGNO (dest
))
6949 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6950 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6951 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6952 /* Don't do this if the original insn had a hard reg as
6954 && (GET_CODE (sets
[i
].src
) != REG
6955 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6956 /* We can't call canon_reg here because it won't do anything if
6957 SRC is a hard register. */
6959 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6961 src
= SET_SRC (sets
[i
].rtl
)
6962 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6963 : gen_rtx_REG (GET_MODE (src
), first
);
6965 /* If we had a constant that is cheaper than what we are now
6966 setting SRC to, use that constant. We ignored it when we
6967 thought we could make this into a no-op. */
6968 if (src_const
&& COST (src_const
) < COST (src
)
6969 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6973 /* If we made a change, recompute SRC values. */
6974 if (src
!= sets
[i
].src
)
6977 hash_arg_in_memory
= 0;
6978 hash_arg_in_struct
= 0;
6980 sets
[i
].src_hash
= HASH (src
, mode
);
6981 sets
[i
].src_volatile
= do_not_record
;
6982 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6983 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6984 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6987 /* If this is a single SET, we are setting a register, and we have an
6988 equivalent constant, we want to add a REG_NOTE. We don't want
6989 to write a REG_EQUAL note for a constant pseudo since verifying that
6990 that pseudo hasn't been eliminated is a pain. Such a note also
6991 won't help anything. */
6992 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6993 && GET_CODE (src_const
) != REG
)
6995 tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6997 /* Record the actual constant value in a REG_EQUAL note, making
6998 a new one if one does not already exist. */
7000 XEXP (tem
, 0) = src_const
;
7002 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EQUAL
,
7003 src_const
, REG_NOTES (insn
));
7005 /* If storing a constant value in a register that
7006 previously held the constant value 0,
7007 record this fact with a REG_WAS_0 note on this insn.
7009 Note that the *register* is required to have previously held 0,
7010 not just any register in the quantity and we must point to the
7011 insn that set that register to zero.
7013 Rather than track each register individually, we just see if
7014 the last set for this quantity was for this register. */
7016 if (REGNO_QTY_VALID_P (REGNO (dest
))
7017 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
7019 /* See if we previously had a REG_WAS_0 note. */
7020 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7021 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
7023 if ((tem
= single_set (const_insn
)) != 0
7024 && rtx_equal_p (SET_DEST (tem
), dest
))
7027 XEXP (note
, 0) = const_insn
;
7029 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_WAS_0
,
7036 /* Now deal with the destination. */
7038 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
7040 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7041 to the MEM or REG within it. */
7042 while (GET_CODE (dest
) == SIGN_EXTRACT
7043 || GET_CODE (dest
) == ZERO_EXTRACT
7044 || GET_CODE (dest
) == SUBREG
7045 || GET_CODE (dest
) == STRICT_LOW_PART
)
7047 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
7048 dest
= XEXP (dest
, 0);
7051 sets
[i
].inner_dest
= dest
;
7053 if (GET_CODE (dest
) == MEM
)
7055 #ifdef PUSH_ROUNDING
7056 /* Stack pushes invalidate the stack pointer. */
7057 rtx addr
= XEXP (dest
, 0);
7058 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7059 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7060 && XEXP (addr
, 0) == stack_pointer_rtx
)
7061 invalidate (stack_pointer_rtx
, Pmode
);
7063 dest
= fold_rtx (dest
, insn
);
7066 /* Compute the hash code of the destination now,
7067 before the effects of this instruction are recorded,
7068 since the register values used in the address computation
7069 are those before this instruction. */
7070 sets
[i
].dest_hash
= HASH (dest
, mode
);
7072 /* Don't enter a bit-field in the hash table
7073 because the value in it after the store
7074 may not equal what was stored, due to truncation. */
7076 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
7077 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
7079 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
7081 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
7082 && GET_CODE (width
) == CONST_INT
7083 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
7084 && ! (INTVAL (src_const
)
7085 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
7086 /* Exception: if the value is constant,
7087 and it won't be truncated, record it. */
7091 /* This is chosen so that the destination will be invalidated
7092 but no new value will be recorded.
7093 We must invalidate because sometimes constant
7094 values can be recorded for bitfields. */
7095 sets
[i
].src_elt
= 0;
7096 sets
[i
].src_volatile
= 1;
7102 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7104 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
7106 PUT_CODE (insn
, NOTE
);
7107 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
7108 NOTE_SOURCE_FILE (insn
) = 0;
7109 cse_jumps_altered
= 1;
7110 /* One less use of the label this insn used to jump to. */
7111 if (JUMP_LABEL (insn
) != 0)
7112 --LABEL_NUSES (JUMP_LABEL (insn
));
7113 /* No more processing for this set. */
7117 /* If this SET is now setting PC to a label, we know it used to
7118 be a conditional or computed branch. So we see if we can follow
7119 it. If it was a computed branch, delete it and re-emit. */
7120 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
7124 /* If this is not in the format for a simple branch and
7125 we are the only SET in it, re-emit it. */
7126 if (! simplejump_p (insn
) && n_sets
== 1)
7128 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
7129 JUMP_LABEL (new) = XEXP (src
, 0);
7130 LABEL_NUSES (XEXP (src
, 0))++;
7135 /* Otherwise, force rerecognition, since it probably had
7136 a different pattern before.
7137 This shouldn't really be necessary, since whatever
7138 changed the source value above should have done this.
7139 Until the right place is found, might as well do this here. */
7140 INSN_CODE (insn
) = -1;
7142 /* Now that we've converted this jump to an unconditional jump,
7143 there is dead code after it. Delete the dead code until we
7144 reach a BARRIER, the end of the function, or a label. Do
7145 not delete NOTEs except for NOTE_INSN_DELETED since later
7146 phases assume these notes are retained. */
7150 while (NEXT_INSN (p
) != 0
7151 && GET_CODE (NEXT_INSN (p
)) != BARRIER
7152 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
7154 if (GET_CODE (NEXT_INSN (p
)) != NOTE
7155 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
7156 delete_insn (NEXT_INSN (p
));
7161 /* If we don't have a BARRIER immediately after INSN, put one there.
7162 Much code assumes that there are no NOTEs between a JUMP_INSN and
7165 if (NEXT_INSN (insn
) == 0
7166 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
7167 emit_barrier_before (NEXT_INSN (insn
));
7169 /* We might have two BARRIERs separated by notes. Delete the second
7172 if (p
!= insn
&& NEXT_INSN (p
) != 0
7173 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
7174 delete_insn (NEXT_INSN (p
));
7176 cse_jumps_altered
= 1;
7180 /* If destination is volatile, invalidate it and then do no further
7181 processing for this assignment. */
7183 else if (do_not_record
)
7185 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7186 || GET_CODE (dest
) == MEM
)
7187 invalidate (dest
, VOIDmode
);
7188 else if (GET_CODE (dest
) == STRICT_LOW_PART
7189 || GET_CODE (dest
) == ZERO_EXTRACT
)
7190 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7194 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
7195 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
7198 /* If setting CC0, record what it was set to, or a constant, if it
7199 is equivalent to a constant. If it is being set to a floating-point
7200 value, make a COMPARE with the appropriate constant of 0. If we
7201 don't do this, later code can interpret this as a test against
7202 const0_rtx, which can cause problems if we try to put it into an
7203 insn as a floating-point operand. */
7204 if (dest
== cc0_rtx
)
7206 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
7207 this_insn_cc0_mode
= mode
;
7208 if (FLOAT_MODE_P (mode
))
7209 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
7215 /* Now enter all non-volatile source expressions in the hash table
7216 if they are not already present.
7217 Record their equivalence classes in src_elt.
7218 This way we can insert the corresponding destinations into
7219 the same classes even if the actual sources are no longer in them
7220 (having been invalidated). */
7222 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
7223 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
7225 register struct table_elt
*elt
;
7226 register struct table_elt
*classp
= sets
[0].src_elt
;
7227 rtx dest
= SET_DEST (sets
[0].rtl
);
7228 enum machine_mode eqvmode
= GET_MODE (dest
);
7230 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7232 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
7235 if (insert_regs (src_eqv
, classp
, 0))
7237 rehash_using_reg (src_eqv
);
7238 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
7240 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
7241 elt
->in_memory
= src_eqv_in_memory
;
7242 elt
->in_struct
= src_eqv_in_struct
;
7245 /* Check to see if src_eqv_elt is the same as a set source which
7246 does not yet have an elt, and if so set the elt of the set source
7248 for (i
= 0; i
< n_sets
; i
++)
7249 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
7250 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
7251 sets
[i
].src_elt
= src_eqv_elt
;
7254 for (i
= 0; i
< n_sets
; i
++)
7255 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
7256 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
7258 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
7260 /* REG_EQUAL in setting a STRICT_LOW_PART
7261 gives an equivalent for the entire destination register,
7262 not just for the subreg being stored in now.
7263 This is a more interesting equivalence, so we arrange later
7264 to treat the entire reg as the destination. */
7265 sets
[i
].src_elt
= src_eqv_elt
;
7266 sets
[i
].src_hash
= src_eqv_hash
;
7270 /* Insert source and constant equivalent into hash table, if not
7272 register struct table_elt
*classp
= src_eqv_elt
;
7273 register rtx src
= sets
[i
].src
;
7274 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7275 enum machine_mode mode
7276 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
7278 if (sets
[i
].src_elt
== 0)
7280 register struct table_elt
*elt
;
7282 /* Note that these insert_regs calls cannot remove
7283 any of the src_elt's, because they would have failed to
7284 match if not still valid. */
7285 if (insert_regs (src
, classp
, 0))
7287 rehash_using_reg (src
);
7288 sets
[i
].src_hash
= HASH (src
, mode
);
7290 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
7291 elt
->in_memory
= sets
[i
].src_in_memory
;
7292 elt
->in_struct
= sets
[i
].src_in_struct
;
7293 sets
[i
].src_elt
= classp
= elt
;
7296 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
7297 && src
!= sets
[i
].src_const
7298 && ! rtx_equal_p (sets
[i
].src_const
, src
))
7299 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
7300 sets
[i
].src_const_hash
, mode
);
7303 else if (sets
[i
].src_elt
== 0)
7304 /* If we did not insert the source into the hash table (e.g., it was
7305 volatile), note the equivalence class for the REG_EQUAL value, if any,
7306 so that the destination goes into that class. */
7307 sets
[i
].src_elt
= src_eqv_elt
;
7309 invalidate_from_clobbers (x
);
7311 /* Some registers are invalidated by subroutine calls. Memory is
7312 invalidated by non-constant calls. */
7314 if (GET_CODE (insn
) == CALL_INSN
)
7316 if (! CONST_CALL_P (insn
))
7317 invalidate_memory ();
7318 invalidate_for_call ();
7321 /* Now invalidate everything set by this instruction.
7322 If a SUBREG or other funny destination is being set,
7323 sets[i].rtl is still nonzero, so here we invalidate the reg
7324 a part of which is being set. */
7326 for (i
= 0; i
< n_sets
; i
++)
7329 /* We can't use the inner dest, because the mode associated with
7330 a ZERO_EXTRACT is significant. */
7331 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7333 /* Needed for registers to remove the register from its
7334 previous quantity's chain.
7335 Needed for memory if this is a nonvarying address, unless
7336 we have just done an invalidate_memory that covers even those. */
7337 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7338 || GET_CODE (dest
) == MEM
)
7339 invalidate (dest
, VOIDmode
);
7340 else if (GET_CODE (dest
) == STRICT_LOW_PART
7341 || GET_CODE (dest
) == ZERO_EXTRACT
)
7342 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7345 /* Make sure registers mentioned in destinations
7346 are safe for use in an expression to be inserted.
7347 This removes from the hash table
7348 any invalid entry that refers to one of these registers.
7350 We don't care about the return value from mention_regs because
7351 we are going to hash the SET_DEST values unconditionally. */
7353 for (i
= 0; i
< n_sets
; i
++)
7354 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
7355 mention_regs (SET_DEST (sets
[i
].rtl
));
7357 /* We may have just removed some of the src_elt's from the hash table.
7358 So replace each one with the current head of the same class. */
7360 for (i
= 0; i
< n_sets
; i
++)
7363 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
7364 /* If elt was removed, find current head of same class,
7365 or 0 if nothing remains of that class. */
7367 register struct table_elt
*elt
= sets
[i
].src_elt
;
7369 while (elt
&& elt
->prev_same_value
)
7370 elt
= elt
->prev_same_value
;
7372 while (elt
&& elt
->first_same_value
== 0)
7373 elt
= elt
->next_same_value
;
7374 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7378 /* Now insert the destinations into their equivalence classes. */
7380 for (i
= 0; i
< n_sets
; i
++)
7383 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7384 register struct table_elt
*elt
;
7386 /* Don't record value if we are not supposed to risk allocating
7387 floating-point values in registers that might be wider than
7389 if ((flag_float_store
7390 && GET_CODE (dest
) == MEM
7391 && FLOAT_MODE_P (GET_MODE (dest
)))
7392 /* Don't record BLKmode values, because we don't know the
7393 size of it, and can't be sure that other BLKmode values
7394 have the same or smaller size. */
7395 || GET_MODE (dest
) == BLKmode
7396 /* Don't record values of destinations set inside a libcall block
7397 since we might delete the libcall. Things should have been set
7398 up so we won't want to reuse such a value, but we play it safe
7401 /* If we didn't put a REG_EQUAL value or a source into the hash
7402 table, there is no point is recording DEST. */
7403 || sets
[i
].src_elt
== 0
7404 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7405 or SIGN_EXTEND, don't record DEST since it can cause
7406 some tracking to be wrong.
7408 ??? Think about this more later. */
7409 || (GET_CODE (dest
) == SUBREG
7410 && (GET_MODE_SIZE (GET_MODE (dest
))
7411 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7412 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
7413 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
7416 /* STRICT_LOW_PART isn't part of the value BEING set,
7417 and neither is the SUBREG inside it.
7418 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7419 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7420 dest
= SUBREG_REG (XEXP (dest
, 0));
7422 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7423 /* Registers must also be inserted into chains for quantities. */
7424 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7426 /* If `insert_regs' changes something, the hash code must be
7428 rehash_using_reg (dest
);
7429 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7432 elt
= insert (dest
, sets
[i
].src_elt
,
7433 sets
[i
].dest_hash
, GET_MODE (dest
));
7434 elt
->in_memory
= (GET_CODE (sets
[i
].inner_dest
) == MEM
7435 && (! RTX_UNCHANGING_P (sets
[i
].inner_dest
)
7436 || FIXED_BASE_PLUS_P (XEXP (sets
[i
].inner_dest
,
7441 /* This implicitly assumes a whole struct
7442 need not have MEM_IN_STRUCT_P.
7443 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7444 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7445 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7448 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7449 narrower than M2, and both M1 and M2 are the same number of words,
7450 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7451 make that equivalence as well.
7453 However, BAR may have equivalences for which gen_lowpart_if_possible
7454 will produce a simpler value than gen_lowpart_if_possible applied to
7455 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7456 BAR's equivalences. If we don't get a simplified form, make
7457 the SUBREG. It will not be used in an equivalence, but will
7458 cause two similar assignments to be detected.
7460 Note the loop below will find SUBREG_REG (DEST) since we have
7461 already entered SRC and DEST of the SET in the table. */
7463 if (GET_CODE (dest
) == SUBREG
7464 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
7466 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1)/ UNITS_PER_WORD
)
7467 && (GET_MODE_SIZE (GET_MODE (dest
))
7468 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7469 && sets
[i
].src_elt
!= 0)
7471 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7472 struct table_elt
*elt
, *classp
= 0;
7474 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7475 elt
= elt
->next_same_value
)
7479 struct table_elt
*src_elt
;
7481 /* Ignore invalid entries. */
7482 if (GET_CODE (elt
->exp
) != REG
7483 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7486 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7488 new_src
= gen_rtx_SUBREG (new_mode
, elt
->exp
, 0);
7490 src_hash
= HASH (new_src
, new_mode
);
7491 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7493 /* Put the new source in the hash table is if isn't
7497 if (insert_regs (new_src
, classp
, 0))
7499 rehash_using_reg (new_src
);
7500 src_hash
= HASH (new_src
, new_mode
);
7502 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7503 src_elt
->in_memory
= elt
->in_memory
;
7504 src_elt
->in_struct
= elt
->in_struct
;
7506 else if (classp
&& classp
!= src_elt
->first_same_value
)
7507 /* Show that two things that we've seen before are
7508 actually the same. */
7509 merge_equiv_classes (src_elt
, classp
);
7511 classp
= src_elt
->first_same_value
;
7512 /* Ignore invalid entries. */
7514 && GET_CODE (classp
->exp
) != REG
7515 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, 0))
7516 classp
= classp
->next_same_value
;
7521 /* Special handling for (set REG0 REG1)
7522 where REG0 is the "cheapest", cheaper than REG1.
7523 After cse, REG1 will probably not be used in the sequel,
7524 so (if easily done) change this insn to (set REG1 REG0) and
7525 replace REG1 with REG0 in the previous insn that computed their value.
7526 Then REG1 will become a dead store and won't cloud the situation
7527 for later optimizations.
7529 Do not make this change if REG1 is a hard register, because it will
7530 then be used in the sequel and we may be changing a two-operand insn
7531 into a three-operand insn.
7533 Also do not do this if we are operating on a copy of INSN. */
7535 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7536 && NEXT_INSN (PREV_INSN (insn
)) == insn
7537 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7538 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7539 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7540 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
7541 == REGNO (SET_DEST (sets
[0].rtl
))))
7543 rtx prev
= PREV_INSN (insn
);
7544 while (prev
&& GET_CODE (prev
) == NOTE
)
7545 prev
= PREV_INSN (prev
);
7547 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7548 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7550 rtx dest
= SET_DEST (sets
[0].rtl
);
7551 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7553 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7554 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7555 SET_SRC (sets
[0].rtl
), 1);
7556 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7557 apply_change_group ();
7559 /* If REG1 was equivalent to a constant, REG0 is not. */
7561 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7563 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7564 any REG_WAS_0 note on INSN to PREV. */
7565 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7567 remove_note (prev
, note
);
7569 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7572 remove_note (insn
, note
);
7573 XEXP (note
, 1) = REG_NOTES (prev
);
7574 REG_NOTES (prev
) = note
;
7577 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7578 then we must delete it, because the value in REG0 has changed. */
7579 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7580 if (note
&& reg_mentioned_p (dest
, XEXP (note
, 0)))
7581 remove_note (insn
, note
);
7585 /* If this is a conditional jump insn, record any known equivalences due to
7586 the condition being tested. */
7588 last_jump_equiv_class
= 0;
7589 if (GET_CODE (insn
) == JUMP_INSN
7590 && n_sets
== 1 && GET_CODE (x
) == SET
7591 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7592 record_jump_equiv (insn
, 0);
7595 /* If the previous insn set CC0 and this insn no longer references CC0,
7596 delete the previous insn. Here we use the fact that nothing expects CC0
7597 to be valid over an insn, which is true until the final pass. */
7598 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7599 && (tem
= single_set (prev_insn
)) != 0
7600 && SET_DEST (tem
) == cc0_rtx
7601 && ! reg_mentioned_p (cc0_rtx
, x
))
7603 PUT_CODE (prev_insn
, NOTE
);
7604 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7605 NOTE_SOURCE_FILE (prev_insn
) = 0;
7608 prev_insn_cc0
= this_insn_cc0
;
7609 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7615 /* Remove from the ahsh table all expressions that reference memory. */
7617 invalidate_memory ()
7620 register struct table_elt
*p
, *next
;
7622 for (i
= 0; i
< NBUCKETS
; i
++)
7623 for (p
= table
[i
]; p
; p
= next
)
7625 next
= p
->next_same_hash
;
7627 remove_from_table (p
, i
);
7631 /* XXX ??? The name of this function bears little resemblance to
7632 what this function actually does. FIXME. */
7634 note_mem_written (addr
)
7637 /* Pushing or popping the stack invalidates just the stack pointer. */
7638 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7639 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7640 && GET_CODE (XEXP (addr
, 0)) == REG
7641 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7643 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7644 reg_tick
[STACK_POINTER_REGNUM
]++;
7646 /* This should be *very* rare. */
7647 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7648 invalidate (stack_pointer_rtx
, VOIDmode
);
7654 /* Perform invalidation on the basis of everything about an insn
7655 except for invalidating the actual places that are SET in it.
7656 This includes the places CLOBBERed, and anything that might
7657 alias with something that is SET or CLOBBERed.
7659 X is the pattern of the insn. */
7662 invalidate_from_clobbers (x
)
7665 if (GET_CODE (x
) == CLOBBER
)
7667 rtx ref
= XEXP (x
, 0);
7670 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7671 || GET_CODE (ref
) == MEM
)
7672 invalidate (ref
, VOIDmode
);
7673 else if (GET_CODE (ref
) == STRICT_LOW_PART
7674 || GET_CODE (ref
) == ZERO_EXTRACT
)
7675 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7678 else if (GET_CODE (x
) == PARALLEL
)
7681 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7683 register rtx y
= XVECEXP (x
, 0, i
);
7684 if (GET_CODE (y
) == CLOBBER
)
7686 rtx ref
= XEXP (y
, 0);
7687 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7688 || GET_CODE (ref
) == MEM
)
7689 invalidate (ref
, VOIDmode
);
7690 else if (GET_CODE (ref
) == STRICT_LOW_PART
7691 || GET_CODE (ref
) == ZERO_EXTRACT
)
7692 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7698 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7699 and replace any registers in them with either an equivalent constant
7700 or the canonical form of the register. If we are inside an address,
7701 only do this if the address remains valid.
7703 OBJECT is 0 except when within a MEM in which case it is the MEM.
7705 Return the replacement for X. */
7708 cse_process_notes (x
, object
)
7712 enum rtx_code code
= GET_CODE (x
);
7713 char *fmt
= GET_RTX_FORMAT (code
);
7729 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7734 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7735 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7737 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7744 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7745 /* We don't substitute VOIDmode constants into these rtx,
7746 since they would impede folding. */
7747 if (GET_MODE (new) != VOIDmode
)
7748 validate_change (object
, &XEXP (x
, 0), new, 0);
7753 i
= reg_qty
[REGNO (x
)];
7755 /* Return a constant or a constant register. */
7756 if (REGNO_QTY_VALID_P (REGNO (x
))
7757 && qty_const
[i
] != 0
7758 && (CONSTANT_P (qty_const
[i
])
7759 || GET_CODE (qty_const
[i
]) == REG
))
7761 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7766 /* Otherwise, canonicalize this register. */
7767 return canon_reg (x
, NULL_RTX
);
7773 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7775 validate_change (object
, &XEXP (x
, i
),
7776 cse_process_notes (XEXP (x
, i
), object
), 0);
7781 /* Find common subexpressions between the end test of a loop and the beginning
7782 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7784 Often we have a loop where an expression in the exit test is used
7785 in the body of the loop. For example "while (*p) *q++ = *p++;".
7786 Because of the way we duplicate the loop exit test in front of the loop,
7787 however, we don't detect that common subexpression. This will be caught
7788 when global cse is implemented, but this is a quite common case.
7790 This function handles the most common cases of these common expressions.
7791 It is called after we have processed the basic block ending with the
7792 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7793 jumps to a label used only once. */
7796 cse_around_loop (loop_start
)
7801 struct table_elt
*p
;
7803 /* If the jump at the end of the loop doesn't go to the start, we don't
7805 for (insn
= PREV_INSN (loop_start
);
7806 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7807 insn
= PREV_INSN (insn
))
7811 || GET_CODE (insn
) != NOTE
7812 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7815 /* If the last insn of the loop (the end test) was an NE comparison,
7816 we will interpret it as an EQ comparison, since we fell through
7817 the loop. Any equivalences resulting from that comparison are
7818 therefore not valid and must be invalidated. */
7819 if (last_jump_equiv_class
)
7820 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7821 p
= p
->next_same_value
)
7823 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7824 || (GET_CODE (p
->exp
) == SUBREG
7825 && GET_CODE (SUBREG_REG (p
->exp
)) == REG
))
7826 invalidate (p
->exp
, VOIDmode
);
7827 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
7828 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
7829 invalidate (XEXP (p
->exp
, 0), GET_MODE (p
->exp
));
7832 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7833 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7835 The only thing we do with SET_DEST is invalidate entries, so we
7836 can safely process each SET in order. It is slightly less efficient
7837 to do so, but we only want to handle the most common cases.
7839 The gen_move_insn call in cse_set_around_loop may create new pseudos.
7840 These pseudos won't have valid entries in any of the tables indexed
7841 by register number, such as reg_qty. We avoid out-of-range array
7842 accesses by not processing any instructions created after cse started. */
7844 for (insn
= NEXT_INSN (loop_start
);
7845 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7846 && INSN_UID (insn
) < max_insn_uid
7847 && ! (GET_CODE (insn
) == NOTE
7848 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7849 insn
= NEXT_INSN (insn
))
7851 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7852 && (GET_CODE (PATTERN (insn
)) == SET
7853 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7854 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7855 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7856 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7857 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7858 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7859 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7860 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7865 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7866 since they are done elsewhere. This function is called via note_stores. */
7869 invalidate_skipped_set (dest
, set
)
7873 enum rtx_code code
= GET_CODE (dest
);
7876 && ! note_mem_written (dest
) /* If this is not a stack push ... */
7877 /* There are times when an address can appear varying and be a PLUS
7878 during this scan when it would be a fixed address were we to know
7879 the proper equivalences. So invalidate all memory if there is
7880 a BLKmode or nonscalar memory reference or a reference to a
7881 variable address. */
7882 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
7883 || cse_rtx_varies_p (XEXP (dest
, 0))))
7885 invalidate_memory ();
7889 if (GET_CODE (set
) == CLOBBER
7896 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
7897 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7898 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
7899 invalidate (dest
, VOIDmode
);
7902 /* Invalidate all insns from START up to the end of the function or the
7903 next label. This called when we wish to CSE around a block that is
7904 conditionally executed. */
7907 invalidate_skipped_block (start
)
7912 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7913 insn
= NEXT_INSN (insn
))
7915 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7918 if (GET_CODE (insn
) == CALL_INSN
)
7920 if (! CONST_CALL_P (insn
))
7921 invalidate_memory ();
7922 invalidate_for_call ();
7925 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7929 /* Used for communication between the following two routines; contains a
7930 value to be checked for modification. */
7932 static rtx cse_check_loop_start_value
;
7934 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7935 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7938 cse_check_loop_start (x
, set
)
7940 rtx set ATTRIBUTE_UNUSED
;
7942 if (cse_check_loop_start_value
== 0
7943 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7946 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7947 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7948 cse_check_loop_start_value
= 0;
7951 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7952 a loop that starts with the label at LOOP_START.
7954 If X is a SET, we see if its SET_SRC is currently in our hash table.
7955 If so, we see if it has a value equal to some register used only in the
7956 loop exit code (as marked by jump.c).
7958 If those two conditions are true, we search backwards from the start of
7959 the loop to see if that same value was loaded into a register that still
7960 retains its value at the start of the loop.
7962 If so, we insert an insn after the load to copy the destination of that
7963 load into the equivalent register and (try to) replace our SET_SRC with that
7966 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7969 cse_set_around_loop (x
, insn
, loop_start
)
7974 struct table_elt
*src_elt
;
7976 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7977 are setting PC or CC0 or whose SET_SRC is already a register. */
7978 if (GET_CODE (x
) == SET
7979 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7980 && GET_CODE (SET_SRC (x
)) != REG
)
7982 src_elt
= lookup (SET_SRC (x
),
7983 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7984 GET_MODE (SET_DEST (x
)));
7987 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7988 src_elt
= src_elt
->next_same_value
)
7989 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7990 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7994 /* Look for an insn in front of LOOP_START that sets
7995 something in the desired mode to SET_SRC (x) before we hit
7996 a label or CALL_INSN. */
7998 for (p
= prev_nonnote_insn (loop_start
);
7999 p
&& GET_CODE (p
) != CALL_INSN
8000 && GET_CODE (p
) != CODE_LABEL
;
8001 p
= prev_nonnote_insn (p
))
8002 if ((set
= single_set (p
)) != 0
8003 && GET_CODE (SET_DEST (set
)) == REG
8004 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
8005 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
8007 /* We now have to ensure that nothing between P
8008 and LOOP_START modified anything referenced in
8009 SET_SRC (x). We know that nothing within the loop
8010 can modify it, or we would have invalidated it in
8014 cse_check_loop_start_value
= SET_SRC (x
);
8015 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
8016 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
8017 note_stores (PATTERN (q
), cse_check_loop_start
);
8019 /* If nothing was changed and we can replace our
8020 SET_SRC, add an insn after P to copy its destination
8021 to what we will be replacing SET_SRC with. */
8022 if (cse_check_loop_start_value
8023 && validate_change (insn
, &SET_SRC (x
),
8026 /* If this creates new pseudos, this is unsafe,
8027 because the regno of new pseudo is unsuitable
8028 to index into reg_qty when cse_insn processes
8029 the new insn. Therefore, if a new pseudo was
8030 created, discard this optimization. */
8031 int nregs
= max_reg_num ();
8033 = gen_move_insn (src_elt
->exp
, SET_DEST (set
));
8034 if (nregs
!= max_reg_num ())
8036 if (! validate_change (insn
, &SET_SRC (x
),
8041 emit_insn_after (move
, p
);
8048 /* Now invalidate anything modified by X. */
8049 note_mem_written (SET_DEST (x
));
8051 /* See comment on similar code in cse_insn for explanation of these tests. */
8052 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
8053 || GET_CODE (SET_DEST (x
)) == MEM
)
8054 invalidate (SET_DEST (x
), VOIDmode
);
8055 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
8056 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
8057 invalidate (XEXP (SET_DEST (x
), 0), GET_MODE (SET_DEST (x
)));
8060 /* Find the end of INSN's basic block and return its range,
8061 the total number of SETs in all the insns of the block, the last insn of the
8062 block, and the branch path.
8064 The branch path indicates which branches should be followed. If a non-zero
8065 path size is specified, the block should be rescanned and a different set
8066 of branches will be taken. The branch path is only used if
8067 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8069 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8070 used to describe the block. It is filled in with the information about
8071 the current block. The incoming structure's branch path, if any, is used
8072 to construct the output branch path. */
8075 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
8077 struct cse_basic_block_data
*data
;
8084 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
8085 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
8086 int path_size
= data
->path_size
;
8090 /* Update the previous branch path, if any. If the last branch was
8091 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8092 shorten the path by one and look at the previous branch. We know that
8093 at least one branch must have been taken if PATH_SIZE is non-zero. */
8094 while (path_size
> 0)
8096 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
8098 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
8105 /* Scan to end of this basic block. */
8106 while (p
&& GET_CODE (p
) != CODE_LABEL
)
8108 /* Don't cse out the end of a loop. This makes a difference
8109 only for the unusual loops that always execute at least once;
8110 all other loops have labels there so we will stop in any case.
8111 Cse'ing out the end of the loop is dangerous because it
8112 might cause an invariant expression inside the loop
8113 to be reused after the end of the loop. This would make it
8114 hard to move the expression out of the loop in loop.c,
8115 especially if it is one of several equivalent expressions
8116 and loop.c would like to eliminate it.
8118 If we are running after loop.c has finished, we can ignore
8119 the NOTE_INSN_LOOP_END. */
8121 if (! after_loop
&& GET_CODE (p
) == NOTE
8122 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
8125 /* Don't cse over a call to setjmp; on some machines (eg vax)
8126 the regs restored by the longjmp come from
8127 a later time than the setjmp. */
8128 if (GET_CODE (p
) == NOTE
8129 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
8132 /* A PARALLEL can have lots of SETs in it,
8133 especially if it is really an ASM_OPERANDS. */
8134 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
8135 && GET_CODE (PATTERN (p
)) == PARALLEL
)
8136 nsets
+= XVECLEN (PATTERN (p
), 0);
8137 else if (GET_CODE (p
) != NOTE
)
8140 /* Ignore insns made by CSE; they cannot affect the boundaries of
8143 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
8144 high_cuid
= INSN_CUID (p
);
8145 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
8146 low_cuid
= INSN_CUID (p
);
8148 /* See if this insn is in our branch path. If it is and we are to
8150 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
8152 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
8155 /* Point to next entry in path, if any. */
8159 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8160 was specified, we haven't reached our maximum path length, there are
8161 insns following the target of the jump, this is the only use of the
8162 jump label, and the target label is preceded by a BARRIER.
8164 Alternatively, we can follow the jump if it branches around a
8165 block of code and there are no other branches into the block.
8166 In this case invalidate_skipped_block will be called to invalidate any
8167 registers set in the block when following the jump. */
8169 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
8170 && GET_CODE (p
) == JUMP_INSN
8171 && GET_CODE (PATTERN (p
)) == SET
8172 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
8173 && JUMP_LABEL (p
) != 0
8174 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
8175 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
8177 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
8178 if ((GET_CODE (q
) != NOTE
8179 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
8180 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
8181 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
8184 /* If we ran into a BARRIER, this code is an extension of the
8185 basic block when the branch is taken. */
8186 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
8188 /* Don't allow ourself to keep walking around an
8189 always-executed loop. */
8190 if (next_real_insn (q
) == next
)
8196 /* Similarly, don't put a branch in our path more than once. */
8197 for (i
= 0; i
< path_entry
; i
++)
8198 if (data
->path
[i
].branch
== p
)
8201 if (i
!= path_entry
)
8204 data
->path
[path_entry
].branch
= p
;
8205 data
->path
[path_entry
++].status
= TAKEN
;
8207 /* This branch now ends our path. It was possible that we
8208 didn't see this branch the last time around (when the
8209 insn in front of the target was a JUMP_INSN that was
8210 turned into a no-op). */
8211 path_size
= path_entry
;
8214 /* Mark block so we won't scan it again later. */
8215 PUT_MODE (NEXT_INSN (p
), QImode
);
8217 /* Detect a branch around a block of code. */
8218 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
8222 if (next_real_insn (q
) == next
)
8228 for (i
= 0; i
< path_entry
; i
++)
8229 if (data
->path
[i
].branch
== p
)
8232 if (i
!= path_entry
)
8235 /* This is no_labels_between_p (p, q) with an added check for
8236 reaching the end of a function (in case Q precedes P). */
8237 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
8238 if (GET_CODE (tmp
) == CODE_LABEL
)
8243 data
->path
[path_entry
].branch
= p
;
8244 data
->path
[path_entry
++].status
= AROUND
;
8246 path_size
= path_entry
;
8249 /* Mark block so we won't scan it again later. */
8250 PUT_MODE (NEXT_INSN (p
), QImode
);
8257 data
->low_cuid
= low_cuid
;
8258 data
->high_cuid
= high_cuid
;
8259 data
->nsets
= nsets
;
8262 /* If all jumps in the path are not taken, set our path length to zero
8263 so a rescan won't be done. */
8264 for (i
= path_size
- 1; i
>= 0; i
--)
8265 if (data
->path
[i
].status
!= NOT_TAKEN
)
8269 data
->path_size
= 0;
8271 data
->path_size
= path_size
;
8273 /* End the current branch path. */
8274 data
->path
[path_size
].branch
= 0;
8277 /* Perform cse on the instructions of a function.
8278 F is the first instruction.
8279 NREGS is one plus the highest pseudo-reg number used in the instruction.
8281 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8282 (only if -frerun-cse-after-loop).
8284 Returns 1 if jump_optimize should be redone due to simplifications
8285 in conditional jump instructions. */
8288 cse_main (f
, nregs
, after_loop
, file
)
8294 struct cse_basic_block_data val
;
8295 register rtx insn
= f
;
8298 cse_jumps_altered
= 0;
8299 recorded_label_ref
= 0;
8300 constant_pool_entries_cost
= 0;
8304 init_alias_analysis ();
8308 max_insn_uid
= get_max_uid ();
8310 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
8311 consec_ints
= (int *) alloca (nregs
* sizeof (int));
8313 for (i
= 0; i
< nregs
; i
++)
8315 all_minus_one
[i
] = -1;
8319 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
8320 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
8321 reg_qty
= (int *) alloca (nregs
* sizeof (int));
8322 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
8323 reg_tick
= (int *) alloca (nregs
* sizeof (int));
8325 #ifdef LOAD_EXTEND_OP
8327 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8328 and change the code and mode as appropriate. */
8329 memory_extend_rtx
= gen_rtx_ZERO_EXTEND (VOIDmode
, NULL_RTX
);
8332 /* Discard all the free elements of the previous function
8333 since they are allocated in the temporarily obstack. */
8334 bzero ((char *) table
, sizeof table
);
8335 free_element_chain
= 0;
8336 n_elements_made
= 0;
8338 /* Find the largest uid. */
8340 max_uid
= get_max_uid ();
8341 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
8342 bzero ((char *) uid_cuid
, (max_uid
+ 1) * sizeof (int));
8344 /* Compute the mapping from uids to cuids.
8345 CUIDs are numbers assigned to insns, like uids,
8346 except that cuids increase monotonically through the code.
8347 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8348 between two insns is not affected by -g. */
8350 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
8352 if (GET_CODE (insn
) != NOTE
8353 || NOTE_LINE_NUMBER (insn
) < 0)
8354 INSN_CUID (insn
) = ++i
;
8356 /* Give a line number note the same cuid as preceding insn. */
8357 INSN_CUID (insn
) = i
;
8360 /* Initialize which registers are clobbered by calls. */
8362 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
8364 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8365 if ((call_used_regs
[i
]
8366 /* Used to check !fixed_regs[i] here, but that isn't safe;
8367 fixed regs are still call-clobbered, and sched can get
8368 confused if they can "live across calls".
8370 The frame pointer is always preserved across calls. The arg
8371 pointer is if it is fixed. The stack pointer usually is, unless
8372 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8373 will be present. If we are generating PIC code, the PIC offset
8374 table register is preserved across calls. */
8376 && i
!= STACK_POINTER_REGNUM
8377 && i
!= FRAME_POINTER_REGNUM
8378 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8379 && i
!= HARD_FRAME_POINTER_REGNUM
8381 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8382 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
8384 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8385 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
8389 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
8391 /* Loop over basic blocks.
8392 Compute the maximum number of qty's needed for each basic block
8393 (which is 2 for each SET). */
8397 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
8398 flag_cse_skip_blocks
);
8400 /* If this basic block was already processed or has no sets, skip it. */
8401 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
8403 PUT_MODE (insn
, VOIDmode
);
8404 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
8409 cse_basic_block_start
= val
.low_cuid
;
8410 cse_basic_block_end
= val
.high_cuid
;
8411 max_qty
= val
.nsets
* 2;
8414 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
8415 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8418 /* Make MAX_QTY bigger to give us room to optimize
8419 past the end of this basic block, if that should prove useful. */
8425 /* If this basic block is being extended by following certain jumps,
8426 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8427 Otherwise, we start after this basic block. */
8428 if (val
.path_size
> 0)
8429 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8432 int old_cse_jumps_altered
= cse_jumps_altered
;
8435 /* When cse changes a conditional jump to an unconditional
8436 jump, we want to reprocess the block, since it will give
8437 us a new branch path to investigate. */
8438 cse_jumps_altered
= 0;
8439 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8440 if (cse_jumps_altered
== 0
8441 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8444 cse_jumps_altered
|= old_cse_jumps_altered
;
8452 /* Tell refers_to_mem_p that qty_const info is not available. */
8455 if (max_elements_made
< n_elements_made
)
8456 max_elements_made
= n_elements_made
;
8458 return cse_jumps_altered
|| recorded_label_ref
;
8461 /* Process a single basic block. FROM and TO and the limits of the basic
8462 block. NEXT_BRANCH points to the branch path when following jumps or
8463 a null path when not following jumps.
8465 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8466 loop. This is true when we are being called for the last time on a
8467 block and this CSE pass is before loop.c. */
8470 cse_basic_block (from
, to
, next_branch
, around_loop
)
8471 register rtx from
, to
;
8472 struct branch_path
*next_branch
;
8477 int in_libcall_block
= 0;
8480 /* Each of these arrays is undefined before max_reg, so only allocate
8481 the space actually needed and adjust the start below. */
8483 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8484 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8485 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8486 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8487 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8489 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8490 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8491 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8493 qty_first_reg
-= max_reg
;
8494 qty_last_reg
-= max_reg
;
8495 qty_mode
-= max_reg
;
8496 qty_const
-= max_reg
;
8497 qty_const_insn
-= max_reg
;
8498 qty_comparison_code
-= max_reg
;
8499 qty_comparison_qty
-= max_reg
;
8500 qty_comparison_const
-= max_reg
;
8504 /* TO might be a label. If so, protect it from being deleted. */
8505 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8508 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8510 register enum rtx_code code
;
8512 struct table_elt
*p
, *next
;
8514 /* If we have processed 1,000 insns, flush the hash table to avoid
8515 extreme quadratic behavior.
8517 ??? This is a real kludge and needs to be done some other way.
8519 if (num_insns
++ > 1000)
8521 for (i
= 0; i
< NBUCKETS
; i
++)
8522 for (p
= table
[i
]; p
; p
= next
)
8524 next
= p
->next_same_hash
;
8526 if (GET_CODE (p
->exp
) == REG
)
8527 invalidate (p
->exp
, p
->mode
);
8529 remove_from_table (p
, i
);
8535 /* See if this is a branch that is part of the path. If so, and it is
8536 to be taken, do so. */
8537 if (next_branch
->branch
== insn
)
8539 enum taken status
= next_branch
++->status
;
8540 if (status
!= NOT_TAKEN
)
8542 if (status
== TAKEN
)
8543 record_jump_equiv (insn
, 1);
8545 invalidate_skipped_block (NEXT_INSN (insn
));
8547 /* Set the last insn as the jump insn; it doesn't affect cc0.
8548 Then follow this branch. */
8553 insn
= JUMP_LABEL (insn
);
8558 code
= GET_CODE (insn
);
8559 if (GET_MODE (insn
) == QImode
)
8560 PUT_MODE (insn
, VOIDmode
);
8562 if (GET_RTX_CLASS (code
) == 'i')
8564 /* Process notes first so we have all notes in canonical forms when
8565 looking for duplicate operations. */
8567 if (REG_NOTES (insn
))
8568 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8570 /* Track when we are inside in LIBCALL block. Inside such a block,
8571 we do not want to record destinations. The last insn of a
8572 LIBCALL block is not considered to be part of the block, since
8573 its destination is the result of the block and hence should be
8576 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
8577 in_libcall_block
= 1;
8578 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8579 in_libcall_block
= 0;
8581 cse_insn (insn
, in_libcall_block
);
8584 /* If INSN is now an unconditional jump, skip to the end of our
8585 basic block by pretending that we just did the last insn in the
8586 basic block. If we are jumping to the end of our block, show
8587 that we can have one usage of TO. */
8589 if (simplejump_p (insn
))
8594 if (JUMP_LABEL (insn
) == to
)
8597 /* Maybe TO was deleted because the jump is unconditional.
8598 If so, there is nothing left in this basic block. */
8599 /* ??? Perhaps it would be smarter to set TO
8600 to whatever follows this insn,
8601 and pretend the basic block had always ended here. */
8602 if (INSN_DELETED_P (to
))
8605 insn
= PREV_INSN (to
);
8608 /* See if it is ok to keep on going past the label
8609 which used to end our basic block. Remember that we incremented
8610 the count of that label, so we decrement it here. If we made
8611 a jump unconditional, TO_USAGE will be one; in that case, we don't
8612 want to count the use in that jump. */
8614 if (to
!= 0 && NEXT_INSN (insn
) == to
8615 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8617 struct cse_basic_block_data val
;
8620 insn
= NEXT_INSN (to
);
8622 if (LABEL_NUSES (to
) == 0)
8623 insn
= delete_insn (to
);
8625 /* If TO was the last insn in the function, we are done. */
8629 /* If TO was preceded by a BARRIER we are done with this block
8630 because it has no continuation. */
8631 prev
= prev_nonnote_insn (to
);
8632 if (prev
&& GET_CODE (prev
) == BARRIER
)
8635 /* Find the end of the following block. Note that we won't be
8636 following branches in this case. */
8639 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8641 /* If the tables we allocated have enough space left
8642 to handle all the SETs in the next basic block,
8643 continue through it. Otherwise, return,
8644 and that block will be scanned individually. */
8645 if (val
.nsets
* 2 + next_qty
> max_qty
)
8648 cse_basic_block_start
= val
.low_cuid
;
8649 cse_basic_block_end
= val
.high_cuid
;
8652 /* Prevent TO from being deleted if it is a label. */
8653 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8656 /* Back up so we process the first insn in the extension. */
8657 insn
= PREV_INSN (insn
);
8661 if (next_qty
> max_qty
)
8664 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8665 the previous insn is the only insn that branches to the head of a loop,
8666 we can cse into the loop. Don't do this if we changed the jump
8667 structure of a loop unless we aren't going to be following jumps. */
8669 if ((cse_jumps_altered
== 0
8670 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8671 && around_loop
&& to
!= 0
8672 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8673 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8674 && JUMP_LABEL (PREV_INSN (to
)) != 0
8675 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8676 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8678 return to
? NEXT_INSN (to
) : 0;
8681 /* Count the number of times registers are used (not set) in X.
8682 COUNTS is an array in which we accumulate the count, INCR is how much
8683 we count each register usage.
8685 Don't count a usage of DEST, which is the SET_DEST of a SET which
8686 contains X in its SET_SRC. This is because such a SET does not
8687 modify the liveness of DEST. */
8690 count_reg_usage (x
, counts
, dest
, incr
)
8703 switch (code
= GET_CODE (x
))
8707 counts
[REGNO (x
)] += incr
;
8721 /* Unless we are setting a REG, count everything in SET_DEST. */
8722 if (GET_CODE (SET_DEST (x
)) != REG
)
8723 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
8725 /* If SRC has side-effects, then we can't delete this insn, so the
8726 usage of SET_DEST inside SRC counts.
8728 ??? Strictly-speaking, we might be preserving this insn
8729 because some other SET has side-effects, but that's hard
8730 to do and can't happen now. */
8731 count_reg_usage (SET_SRC (x
), counts
,
8732 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
8737 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, NULL_RTX
, incr
);
8739 /* ... falls through ... */
8742 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
8744 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8747 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
8752 if (REG_NOTE_KIND (x
) == REG_EQUAL
8753 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
))
8754 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
8755 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
8762 fmt
= GET_RTX_FORMAT (code
);
8763 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8766 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
8767 else if (fmt
[i
] == 'E')
8768 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8769 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
8773 /* Scan all the insns and delete any that are dead; i.e., they store a register
8774 that is never used or they copy a register to itself.
8776 This is used to remove insns made obviously dead by cse, loop or other
8777 optimizations. It improves the heuristics in loop since it won't try to
8778 move dead invariants out of loops or make givs for dead quantities. The
8779 remaining passes of the compilation are also sped up. */
8782 delete_trivially_dead_insns (insns
, nreg
)
8786 int *counts
= (int *) alloca (nreg
* sizeof (int));
8792 int in_libcall
= 0, dead_libcall
= 0;
8794 /* First count the number of times each register is used. */
8795 bzero ((char *) counts
, sizeof (int) * nreg
);
8796 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8797 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
8799 /* Go from the last insn to the first and delete insns that only set unused
8800 registers or copy a register to itself. As we delete an insn, remove
8801 usage counts for registers it uses. */
8802 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8807 prev
= prev_real_insn (insn
);
8809 /* Don't delete any insns that are part of a libcall block unless
8810 we can delete the whole libcall block.
8812 Flow or loop might get confused if we did that. Remember
8813 that we are scanning backwards. */
8814 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8820 /* See if there's a REG_EQUAL note on this insn and try to
8821 replace the source with the REG_EQUAL expression.
8823 We assume that insns with REG_RETVALs can only be reg->reg
8824 copies at this point. */
8825 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
8828 rtx set
= single_set (insn
);
8830 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
8833 find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
8838 else if (in_libcall
)
8839 live_insn
= ! dead_libcall
;
8840 else if (GET_CODE (PATTERN (insn
)) == SET
)
8842 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8843 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8847 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8848 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8849 && ((tem
= next_nonnote_insn (insn
)) == 0
8850 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8851 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8854 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8855 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8856 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8857 || side_effects_p (SET_SRC (PATTERN (insn
))))
8860 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8861 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8863 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8865 if (GET_CODE (elt
) == SET
)
8867 if (GET_CODE (SET_DEST (elt
)) == REG
8868 && SET_DEST (elt
) == SET_SRC (elt
))
8872 else if (GET_CODE (SET_DEST (elt
)) == CC0
8873 && ! side_effects_p (SET_SRC (elt
))
8874 && ((tem
= next_nonnote_insn (insn
)) == 0
8875 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8876 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8879 else if (GET_CODE (SET_DEST (elt
)) != REG
8880 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8881 || counts
[REGNO (SET_DEST (elt
))] != 0
8882 || side_effects_p (SET_SRC (elt
)))
8885 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8891 /* If this is a dead insn, delete it and show registers in it aren't
8896 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
8900 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))