1 /* Test vsub works correctly. */
3 /* { dg-options "--save-temps" } */
10 #define TESTA3 -0.76544
11 /* 2^54, double has 53 significand bits
12 according to Double-precision floating-point format. */
13 #define TESTA4 18014398509481984
16 #define TESTB0 0.66667
21 #define TESTB5 (1.0 / TESTA4)
30 extern void abort (void);
32 #define EPSILON __DBL_EPSILON__
33 #define ISNAN(a) __builtin_isnan (a)
34 /* FP_equals is implemented like this to execute subtraction
35 exectly once during a single test run. */
36 #define FP_equals(a, b, epsilon) \
39 || (ISNAN (a) && ISNAN (b)) \
40 || (((a > b) && (a < (b + epsilon))) \
41 || ((b > a) && (b < (a + epsilon)))) \
46 test_vsub_f64_##N () \
48 float64x1_t a = { TESTA##N }; \
49 float64x1_t b = { TESTB##N }; \
50 float64x1_t c = { ANSW##N }; \
52 a = vsub_f64 (a, b); \
53 return !FP_equals (a[0], c[0], EPSILON); \
63 /* { dg-final { scan-assembler-times "fsub\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 6 } } */
66 main (int argc
, char **argv
)
68 if (test_vsub_f64_0 ())
70 if (test_vsub_f64_1 ())
72 if (test_vsub_f64_2 ())
74 if (test_vsub_f64_3 ())
76 if (test_vsub_f64_4 ())
78 if (test_vsub_f64_5 ())