[AArch64] SVE tests
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / vsub_f64.c
blob3b6b4d2a7e4055c3727432bce7d44ed71dd5e312
1 /* Test vsub works correctly. */
2 /* { dg-do run } */
3 /* { dg-options "--save-temps" } */
5 #include <arm_neon.h>
7 #define TESTA0 1
8 #define TESTA1 0.2223
9 #define TESTA2 0
10 #define TESTA3 -0.76544
11 /* 2^54, double has 53 significand bits
12 according to Double-precision floating-point format. */
13 #define TESTA4 18014398509481984
14 #define TESTA5 2.0
16 #define TESTB0 0.66667
17 #define TESTB1 2
18 #define TESTB2 0
19 #define TESTB3 -2
20 #define TESTB4 1.0
21 #define TESTB5 (1.0 / TESTA4)
23 #define ANSW0 0.33333
24 #define ANSW1 -1.7777
25 #define ANSW2 0
26 #define ANSW3 1.23456
27 #define ANSW4 TESTA4
28 #define ANSW5 2.0
30 extern void abort (void);
32 #define EPSILON __DBL_EPSILON__
33 #define ISNAN(a) __builtin_isnan (a)
34 /* FP_equals is implemented like this to execute subtraction
35 exectly once during a single test run. */
36 #define FP_equals(a, b, epsilon) \
37 ( \
38 ((a) == (b)) \
39 || (ISNAN (a) && ISNAN (b)) \
40 || (((a > b) && (a < (b + epsilon))) \
41 || ((b > a) && (b < (a + epsilon)))) \
44 #define TEST(N) \
45 int \
46 test_vsub_f64_##N () \
47 { \
48 float64x1_t a = { TESTA##N }; \
49 float64x1_t b = { TESTB##N }; \
50 float64x1_t c = { ANSW##N }; \
52 a = vsub_f64 (a, b); \
53 return !FP_equals (a[0], c[0], EPSILON); \
56 TEST (0)
57 TEST (1)
58 TEST (2)
59 TEST (3)
60 TEST (4)
61 TEST (5)
63 /* { dg-final { scan-assembler-times "fsub\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 6 } } */
65 int
66 main (int argc, char **argv)
68 if (test_vsub_f64_0 ())
69 abort ();
70 if (test_vsub_f64_1 ())
71 abort ();
72 if (test_vsub_f64_2 ())
73 abort ();
74 if (test_vsub_f64_3 ())
75 abort ();
76 if (test_vsub_f64_4 ())
77 abort ();
78 if (test_vsub_f64_5 ())
79 abort ();
81 return 0;