gcc/testsuite/gcc.target/aarch64/vect-compile.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O3" } */
   3
   4 #pragma GCC target "+nosve"
   5
   6 #include "vect.x"
   7
   8 /* { dg-final { scan-assembler "orn\\tv" } } */
   9 /* { dg-final { scan-assembler "bic\\tv" } } */
  10 /* { dg-final { scan-assembler "mla\\tv" } } */
  11 /* { dg-final { scan-assembler "mls\\tv" } } */
  12 /* { dg-final { scan-assembler "smax\\tv" } } */
  13 /* { dg-final { scan-assembler "smin\\tv" } } */
  14 /* { dg-final { scan-assembler "umax\\tv" } } */
  15 /* { dg-final { scan-assembler "umin\\tv" } } */
  16 /* { dg-final { scan-assembler "umaxv" } } */
  17 /* { dg-final { scan-assembler "uminv" } } */
  18 /* { dg-final { scan-assembler "smaxv" } } */
  19 /* { dg-final { scan-assembler "sminv" } } */
  20 /* { dg-final { scan-assembler "sabd" } } */
  21 /* { dg-final { scan-assembler "saba" } } */
  22 /* { dg-final { scan-assembler-times "addv" 2} } */
  23 /* { dg-final { scan-assembler-times "addp" 2} } */