1 /* If-conversion support.
2 Copyright (C) 2000-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
39 #include "cfgcleanup.h"
43 #include "tree-pass.h"
45 #include "shrink-wrap.h"
50 #ifndef MAX_CONDITIONAL_EXECUTE
51 #define MAX_CONDITIONAL_EXECUTE \
52 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
56 #define IFCVT_MULTIPLE_DUMPS 1
58 #define NULL_BLOCK ((basic_block) NULL)
60 /* True if after combine pass. */
61 static bool ifcvt_after_combine
;
63 /* True if the target has the cbranchcc4 optab. */
64 static bool have_cbranchcc4
;
66 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
67 static int num_possible_if_blocks
;
69 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
71 static int num_updated_if_blocks
;
73 /* # of changes made. */
74 static int num_true_changes
;
76 /* Whether conditional execution changes were made. */
77 static int cond_exec_changed_p
;
79 /* Forward references. */
80 static int count_bb_insns (const_basic_block
);
81 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
82 static rtx_insn
*first_active_insn (basic_block
);
83 static rtx_insn
*last_active_insn (basic_block
, int);
84 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
85 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
86 static basic_block
block_fallthru (basic_block
);
87 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
89 static rtx
cond_exec_get_condition (rtx_insn
*);
90 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
91 static int noce_operand_ok (const_rtx
);
92 static void merge_if_block (ce_if_block
*);
93 static int find_cond_trap (basic_block
, edge
, edge
);
94 static basic_block
find_if_header (basic_block
, int);
95 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
96 static int noce_find_if_block (basic_block
, edge
, edge
, int);
97 static int cond_exec_find_if_block (ce_if_block
*);
98 static int find_if_case_1 (basic_block
, edge
, edge
);
99 static int find_if_case_2 (basic_block
, edge
, edge
);
100 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
102 static void noce_emit_move_insn (rtx
, rtx
);
103 static rtx_insn
*block_has_only_trap (basic_block
);
105 /* Count the number of non-jump active insns in BB. */
108 count_bb_insns (const_basic_block bb
)
111 rtx_insn
*insn
= BB_HEAD (bb
);
115 if (active_insn_p (insn
) && !JUMP_P (insn
))
118 if (insn
== BB_END (bb
))
120 insn
= NEXT_INSN (insn
);
126 /* Determine whether the total insn_rtx_cost on non-jump insns in
127 basic block BB is less than MAX_COST. This function returns
128 false if the cost of any instruction could not be estimated.
130 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
131 as those insns are being speculated. MAX_COST is scaled with SCALE
132 plus a small fudge factor. */
135 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
138 rtx_insn
*insn
= BB_HEAD (bb
);
139 bool speed
= optimize_bb_for_speed_p (bb
);
141 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
142 applied to insn_rtx_cost when optimizing for size. Only do
143 this after combine because if-conversion might interfere with
144 passes before combine.
146 Use optimize_function_for_speed_p instead of the pre-defined
147 variable speed to make sure it is set to same value for all
148 basic blocks in one if-conversion transformation. */
149 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
150 scale
= REG_BR_PROB_BASE
;
151 /* Our branch probability/scaling factors are just estimates and don't
152 account for cases where we can get speculation for free and other
153 secondary benefits. So we fudge the scale factor to make speculating
154 appear a little more profitable when optimizing for performance. */
156 scale
+= REG_BR_PROB_BASE
/ 8;
163 if (NONJUMP_INSN_P (insn
))
165 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
169 /* If this instruction is the load or set of a "stack" register,
170 such as a floating point register on x87, then the cost of
171 speculatively executing this insn may need to include
172 the additional cost of popping its result off of the
173 register stack. Unfortunately, correctly recognizing and
174 accounting for this additional overhead is tricky, so for
175 now we simply prohibit such speculative execution. */
178 rtx set
= single_set (insn
);
179 if (set
&& STACK_REG_P (SET_DEST (set
)))
185 if (count
>= max_cost
)
188 else if (CALL_P (insn
))
191 if (insn
== BB_END (bb
))
193 insn
= NEXT_INSN (insn
);
199 /* Return the first non-jump active insn in the basic block. */
202 first_active_insn (basic_block bb
)
204 rtx_insn
*insn
= BB_HEAD (bb
);
208 if (insn
== BB_END (bb
))
210 insn
= NEXT_INSN (insn
);
213 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
215 if (insn
== BB_END (bb
))
217 insn
= NEXT_INSN (insn
);
226 /* Return the last non-jump active (non-jump) insn in the basic block. */
229 last_active_insn (basic_block bb
, int skip_use_p
)
231 rtx_insn
*insn
= BB_END (bb
);
232 rtx_insn
*head
= BB_HEAD (bb
);
236 || DEBUG_INSN_P (insn
)
238 && NONJUMP_INSN_P (insn
)
239 && GET_CODE (PATTERN (insn
)) == USE
))
243 insn
= PREV_INSN (insn
);
252 /* Return the active insn before INSN inside basic block CURR_BB. */
255 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
257 if (!insn
|| insn
== BB_HEAD (curr_bb
))
260 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
262 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
265 /* No other active insn all the way to the start of the basic block. */
266 if (insn
== BB_HEAD (curr_bb
))
273 /* Return the active insn after INSN inside basic block CURR_BB. */
276 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
278 if (!insn
|| insn
== BB_END (curr_bb
))
281 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
283 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
286 /* No other active insn all the way to the end of the basic block. */
287 if (insn
== BB_END (curr_bb
))
294 /* Return the basic block reached by falling though the basic block BB. */
297 block_fallthru (basic_block bb
)
299 edge e
= find_fallthru_edge (bb
->succs
);
301 return (e
) ? e
->dest
: NULL_BLOCK
;
304 /* Return true if RTXs A and B can be safely interchanged. */
307 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
309 if (!rtx_equal_p (a
, b
))
312 if (GET_CODE (a
) != MEM
)
315 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
316 reference is not. Interchanging a dead type-unsafe memory reference with
317 a live type-safe one creates a live type-unsafe memory reference, in other
318 words, it makes the program illegal.
319 We check here conservatively whether the two memory references have equal
320 memory attributes. */
322 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
326 /* Go through a bunch of insns, converting them to conditional
327 execution format if possible. Return TRUE if all of the non-note
328 insns were processed. */
331 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
332 /* if block information */rtx_insn
*start
,
333 /* first insn to look at */rtx end
,
334 /* last insn to look at */rtx test
,
335 /* conditional execution test */int prob_val
,
336 /* probability of branch taken. */int mod_ok
)
338 int must_be_last
= FALSE
;
346 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
348 /* dwarf2out can't cope with conditional prologues. */
349 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
352 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
355 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
357 /* dwarf2out can't cope with conditional unwind info. */
358 if (RTX_FRAME_RELATED_P (insn
))
361 /* Remove USE insns that get in the way. */
362 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
364 /* ??? Ug. Actually unlinking the thing is problematic,
365 given what we'd have to coordinate with our callers. */
366 SET_INSN_DELETED (insn
);
370 /* Last insn wasn't last? */
374 if (modified_in_p (test
, insn
))
381 /* Now build the conditional form of the instruction. */
382 pattern
= PATTERN (insn
);
383 xtest
= copy_rtx (test
);
385 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
387 if (GET_CODE (pattern
) == COND_EXEC
)
389 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
392 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
393 COND_EXEC_TEST (pattern
));
394 pattern
= COND_EXEC_CODE (pattern
);
397 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
399 /* If the machine needs to modify the insn being conditionally executed,
400 say for example to force a constant integer operand into a temp
401 register, do so here. */
402 #ifdef IFCVT_MODIFY_INSN
403 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
408 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
410 if (CALL_P (insn
) && prob_val
>= 0)
411 validate_change (insn
, ®_NOTES (insn
),
412 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
413 prob_val
, REG_NOTES (insn
)), 1);
423 /* Return the condition for a jump. Do not do any special processing. */
426 cond_exec_get_condition (rtx_insn
*jump
)
430 if (any_condjump_p (jump
))
431 test_if
= SET_SRC (pc_set (jump
));
434 cond
= XEXP (test_if
, 0);
436 /* If this branches to JUMP_LABEL when the condition is false,
437 reverse the condition. */
438 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
439 && label_ref_label (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
441 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
445 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
452 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
453 to conditional execution. Return TRUE if we were successful at
454 converting the block. */
457 cond_exec_process_if_block (ce_if_block
* ce_info
,
458 /* if block information */int do_multiple_p
)
460 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
461 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
462 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
463 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
464 rtx_insn
*then_start
; /* first insn in THEN block */
465 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
466 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
467 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
468 int max
; /* max # of insns to convert. */
469 int then_mod_ok
; /* whether conditional mods are ok in THEN */
470 rtx true_expr
; /* test for else block insns */
471 rtx false_expr
; /* test for then block insns */
472 int true_prob_val
; /* probability of else block */
473 int false_prob_val
; /* probability of then block */
474 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
475 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
476 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
477 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
478 int then_n_insns
, else_n_insns
, n_insns
;
479 enum rtx_code false_code
;
482 /* If test is comprised of && or || elements, and we've failed at handling
483 all of them together, just use the last test if it is the special case of
484 && elements without an ELSE block. */
485 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
487 if (else_bb
|| ! ce_info
->and_and_p
)
490 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
491 ce_info
->num_multiple_test_blocks
= 0;
492 ce_info
->num_and_and_blocks
= 0;
493 ce_info
->num_or_or_blocks
= 0;
496 /* Find the conditional jump to the ELSE or JOIN part, and isolate
498 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
502 /* If the conditional jump is more than just a conditional jump,
503 then we can not do conditional execution conversion on this block. */
504 if (! onlyjump_p (BB_END (test_bb
)))
507 /* Collect the bounds of where we're to search, skipping any labels, jumps
508 and notes at the beginning and end of the block. Then count the total
509 number of insns and see if it is small enough to convert. */
510 then_start
= first_active_insn (then_bb
);
511 then_end
= last_active_insn (then_bb
, TRUE
);
512 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
513 n_insns
= then_n_insns
;
514 max
= MAX_CONDITIONAL_EXECUTE
;
521 else_start
= first_active_insn (else_bb
);
522 else_end
= last_active_insn (else_bb
, TRUE
);
523 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
524 n_insns
+= else_n_insns
;
526 /* Look for matching sequences at the head and tail of the two blocks,
527 and limit the range of insns to be converted if possible. */
528 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
529 &then_first_tail
, &else_first_tail
,
531 if (then_first_tail
== BB_HEAD (then_bb
))
532 then_start
= then_end
= NULL
;
533 if (else_first_tail
== BB_HEAD (else_bb
))
534 else_start
= else_end
= NULL
;
539 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
541 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
542 n_insns
-= 2 * n_matching
;
547 && then_n_insns
> n_matching
548 && else_n_insns
> n_matching
)
550 int longest_match
= MIN (then_n_insns
- n_matching
,
551 else_n_insns
- n_matching
);
553 = flow_find_head_matching_sequence (then_bb
, else_bb
,
562 /* We won't pass the insns in the head sequence to
563 cond_exec_process_insns, so we need to test them here
564 to make sure that they don't clobber the condition. */
565 for (insn
= BB_HEAD (then_bb
);
566 insn
!= NEXT_INSN (then_last_head
);
567 insn
= NEXT_INSN (insn
))
568 if (!LABEL_P (insn
) && !NOTE_P (insn
)
569 && !DEBUG_INSN_P (insn
)
570 && modified_in_p (test_expr
, insn
))
574 if (then_last_head
== then_end
)
575 then_start
= then_end
= NULL
;
576 if (else_last_head
== else_end
)
577 else_start
= else_end
= NULL
;
582 then_start
= find_active_insn_after (then_bb
, then_last_head
);
584 else_start
= find_active_insn_after (else_bb
, else_last_head
);
585 n_insns
-= 2 * n_matching
;
593 /* Map test_expr/test_jump into the appropriate MD tests to use on
594 the conditionally executed code. */
596 true_expr
= test_expr
;
598 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
599 if (false_code
!= UNKNOWN
)
600 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
601 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
603 false_expr
= NULL_RTX
;
605 #ifdef IFCVT_MODIFY_TESTS
606 /* If the machine description needs to modify the tests, such as setting a
607 conditional execution register from a comparison, it can do so here. */
608 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
610 /* See if the conversion failed. */
611 if (!true_expr
|| !false_expr
)
615 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
618 true_prob_val
= XINT (note
, 0);
619 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
627 /* If we have && or || tests, do them here. These tests are in the adjacent
628 blocks after the first block containing the test. */
629 if (ce_info
->num_multiple_test_blocks
> 0)
631 basic_block bb
= test_bb
;
632 basic_block last_test_bb
= ce_info
->last_test_bb
;
639 rtx_insn
*start
, *end
;
641 enum rtx_code f_code
;
643 bb
= block_fallthru (bb
);
644 start
= first_active_insn (bb
);
645 end
= last_active_insn (bb
, TRUE
);
647 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
648 false_prob_val
, FALSE
))
651 /* If the conditional jump is more than just a conditional jump, then
652 we can not do conditional execution conversion on this block. */
653 if (! onlyjump_p (BB_END (bb
)))
656 /* Find the conditional jump and isolate the test. */
657 t
= cond_exec_get_condition (BB_END (bb
));
661 f_code
= reversed_comparison_code (t
, BB_END (bb
));
662 if (f_code
== UNKNOWN
)
665 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
666 if (ce_info
->and_and_p
)
668 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
669 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
673 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
674 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
677 /* If the machine description needs to modify the tests, such as
678 setting a conditional execution register from a comparison, it can
680 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
681 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
683 /* See if the conversion failed. */
691 while (bb
!= last_test_bb
);
694 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
695 on then THEN block. */
696 then_mod_ok
= (else_bb
== NULL_BLOCK
);
698 /* Go through the THEN and ELSE blocks converting the insns if possible
699 to conditional execution. */
703 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
704 false_expr
, false_prob_val
,
708 if (else_bb
&& else_end
709 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
710 true_expr
, true_prob_val
, TRUE
))
713 /* If we cannot apply the changes, fail. Do not go through the normal fail
714 processing, since apply_change_group will call cancel_changes. */
715 if (! apply_change_group ())
717 #ifdef IFCVT_MODIFY_CANCEL
718 /* Cancel any machine dependent changes. */
719 IFCVT_MODIFY_CANCEL (ce_info
);
724 #ifdef IFCVT_MODIFY_FINAL
725 /* Do any machine dependent final modifications. */
726 IFCVT_MODIFY_FINAL (ce_info
);
729 /* Conversion succeeded. */
731 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
732 n_insns
, (n_insns
== 1) ? " was" : "s were");
734 /* Merge the blocks! If we had matching sequences, make sure to delete one
735 copy at the appropriate location first: delete the copy in the THEN branch
736 for a tail sequence so that the remaining one is executed last for both
737 branches, and delete the copy in the ELSE branch for a head sequence so
738 that the remaining one is executed first for both branches. */
741 rtx_insn
*from
= then_first_tail
;
743 from
= find_active_insn_after (then_bb
, from
);
744 delete_insn_chain (from
, get_last_bb_insn (then_bb
), false);
747 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
749 merge_if_block (ce_info
);
750 cond_exec_changed_p
= TRUE
;
754 #ifdef IFCVT_MODIFY_CANCEL
755 /* Cancel any machine dependent changes. */
756 IFCVT_MODIFY_CANCEL (ce_info
);
763 /* Used by noce_process_if_block to communicate with its subroutines.
765 The subroutines know that A and B may be evaluated freely. They
766 know that X is a register. They should insert new instructions
767 before cond_earliest. */
771 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
772 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
774 /* The jump that ends TEST_BB. */
777 /* The jump condition. */
780 /* Reversed jump condition. */
783 /* New insns should be inserted before this one. */
784 rtx_insn
*cond_earliest
;
786 /* Insns in the THEN and ELSE block. There is always just this
787 one insns in those blocks. The insns are single_set insns.
788 If there was no ELSE block, INSN_B is the last insn before
789 COND_EARLIEST, or NULL_RTX. In the former case, the insn
790 operands are still valid, as if INSN_B was moved down below
792 rtx_insn
*insn_a
, *insn_b
;
794 /* The SET_SRC of INSN_A and INSN_B. */
797 /* The SET_DEST of INSN_A. */
800 /* The original set destination that the THEN and ELSE basic blocks finally
801 write their result to. */
803 /* True if this if block is not canonical. In the canonical form of
804 if blocks, the THEN_BB is the block reached via the fallthru edge
805 from TEST_BB. For the noce transformations, we allow the symmetric
807 bool then_else_reversed
;
809 /* True if the contents of then_bb and else_bb are a
810 simple single set instruction. */
814 /* True if we're optimisizing the control block for speed, false if
815 we're optimizing for size. */
818 /* An estimate of the original costs. When optimizing for size, this is the
819 combined cost of COND, JUMP and the costs for THEN_BB and ELSE_BB.
820 When optimizing for speed, we use the costs of COND plus the minimum of
821 the costs for THEN_BB and ELSE_BB, as computed in the next field. */
822 unsigned int original_cost
;
824 /* Maximum permissible cost for the unconditional sequence we should
825 generate to replace this branch. */
826 unsigned int max_seq_cost
;
828 /* The name of the noce transform that succeeded in if-converting
829 this structure. Used for debugging. */
830 const char *transform_name
;
833 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
834 static int noce_try_move (struct noce_if_info
*);
835 static int noce_try_ifelse_collapse (struct noce_if_info
*);
836 static int noce_try_store_flag (struct noce_if_info
*);
837 static int noce_try_addcc (struct noce_if_info
*);
838 static int noce_try_store_flag_constants (struct noce_if_info
*);
839 static int noce_try_store_flag_mask (struct noce_if_info
*);
840 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
842 static int noce_try_cmove (struct noce_if_info
*);
843 static int noce_try_cmove_arith (struct noce_if_info
*);
844 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
845 static int noce_try_minmax (struct noce_if_info
*);
846 static int noce_try_abs (struct noce_if_info
*);
847 static int noce_try_sign_mask (struct noce_if_info
*);
849 /* Return the comparison code for reversed condition for IF_INFO,
850 or UNKNOWN if reversing the condition is not possible. */
852 static inline enum rtx_code
853 noce_reversed_cond_code (struct noce_if_info
*if_info
)
855 if (if_info
->rev_cond
)
856 return GET_CODE (if_info
->rev_cond
);
857 return reversed_comparison_code (if_info
->cond
, if_info
->jump
);
860 /* Return TRUE if SEQ is a good candidate as a replacement for the
861 if-convertible sequence described in IF_INFO. */
864 noce_conversion_profitable_p (rtx_insn
*seq
, struct noce_if_info
*if_info
)
866 bool speed_p
= if_info
->speed_p
;
868 /* Cost up the new sequence. */
869 unsigned int cost
= seq_cost (seq
, speed_p
);
871 if (cost
<= if_info
->original_cost
)
874 /* When compiling for size, we can make a reasonably accurately guess
875 at the size growth. When compiling for speed, use the maximum. */
876 return speed_p
&& cost
<= if_info
->max_seq_cost
;
879 /* Helper function for noce_try_store_flag*. */
882 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
885 rtx cond
= if_info
->cond
;
889 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
890 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
892 /* If earliest == jump, or when the condition is complex, try to
893 build the store_flag insn directly. */
897 rtx set
= pc_set (if_info
->jump
);
898 cond
= XEXP (SET_SRC (set
), 0);
899 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
900 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
901 reversep
= !reversep
;
902 if (if_info
->then_else_reversed
)
903 reversep
= !reversep
;
907 && general_operand (XEXP (if_info
->rev_cond
, 0), VOIDmode
)
908 && general_operand (XEXP (if_info
->rev_cond
, 1), VOIDmode
))
910 cond
= if_info
->rev_cond
;
915 code
= reversed_comparison_code (cond
, if_info
->jump
);
917 code
= GET_CODE (cond
);
919 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
920 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
922 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
924 rtx set
= gen_rtx_SET (x
, src
);
927 rtx_insn
*insn
= emit_insn (set
);
929 if (recog_memoized (insn
) >= 0)
931 rtx_insn
*seq
= get_insns ();
935 if_info
->cond_earliest
= if_info
->jump
;
943 /* Don't even try if the comparison operands or the mode of X are weird. */
944 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
947 return emit_store_flag (x
, code
, XEXP (cond
, 0),
948 XEXP (cond
, 1), VOIDmode
,
949 (code
== LTU
|| code
== LEU
950 || code
== GEU
|| code
== GTU
), normalize
);
953 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
954 X is the destination/target and Y is the value to copy. */
957 noce_emit_move_insn (rtx x
, rtx y
)
959 machine_mode outmode
;
963 if (GET_CODE (x
) != STRICT_LOW_PART
)
965 rtx_insn
*seq
, *insn
;
970 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
971 otherwise construct a suitable SET pattern ourselves. */
972 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
973 ? emit_move_insn (x
, y
)
974 : emit_insn (gen_rtx_SET (x
, y
));
978 if (recog_memoized (insn
) <= 0)
980 if (GET_CODE (x
) == ZERO_EXTRACT
)
982 rtx op
= XEXP (x
, 0);
983 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
984 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
986 /* store_bit_field expects START to be relative to
987 BYTES_BIG_ENDIAN and adjusts this value for machines with
988 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
989 invoke store_bit_field again it is necessary to have the START
990 value from the first call. */
991 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
994 start
= BITS_PER_UNIT
- start
- size
;
997 gcc_assert (REG_P (op
));
998 start
= BITS_PER_WORD
- start
- size
;
1002 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
1003 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
1007 switch (GET_RTX_CLASS (GET_CODE (y
)))
1010 ot
= code_to_optab (GET_CODE (y
));
1014 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
1015 if (target
!= NULL_RTX
)
1018 emit_move_insn (x
, target
);
1026 case RTX_COMM_ARITH
:
1027 ot
= code_to_optab (GET_CODE (y
));
1031 target
= expand_binop (GET_MODE (y
), ot
,
1032 XEXP (y
, 0), XEXP (y
, 1),
1033 x
, 0, OPTAB_DIRECT
);
1034 if (target
!= NULL_RTX
)
1037 emit_move_insn (x
, target
);
1053 outer
= XEXP (x
, 0);
1054 inner
= XEXP (outer
, 0);
1055 outmode
= GET_MODE (outer
);
1056 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1057 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1058 0, 0, outmode
, y
, false);
1061 /* Return the CC reg if it is used in COND. */
1064 cc_in_cond (rtx cond
)
1066 if (have_cbranchcc4
&& cond
1067 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1068 return XEXP (cond
, 0);
1073 /* Return sequence of instructions generated by if conversion. This
1074 function calls end_sequence() to end the current stream, ensures
1075 that the instructions are unshared, recognizable non-jump insns.
1076 On failure, this function returns a NULL_RTX. */
1079 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1082 rtx_insn
*seq
= get_insns ();
1083 rtx cc
= cc_in_cond (if_info
->cond
);
1085 set_used_flags (if_info
->x
);
1086 set_used_flags (if_info
->cond
);
1087 set_used_flags (if_info
->a
);
1088 set_used_flags (if_info
->b
);
1090 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1091 set_used_flags (insn
);
1093 unshare_all_rtl_in_chain (seq
);
1096 /* Make sure that all of the instructions emitted are recognizable,
1097 and that we haven't introduced a new jump instruction.
1098 As an exercise for the reader, build a general mechanism that
1099 allows proper placement of required clobbers. */
1100 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1102 || recog_memoized (insn
) == -1
1103 /* Make sure new generated code does not clobber CC. */
1104 || (cc
&& set_of (cc
, insn
)))
1110 /* Return true iff the then and else basic block (if it exists)
1111 consist of a single simple set instruction. */
1114 noce_simple_bbs (struct noce_if_info
*if_info
)
1116 if (!if_info
->then_simple
)
1119 if (if_info
->else_bb
)
1120 return if_info
->else_simple
;
1125 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1126 "if (a == b) x = a; else x = b" into "x = b". */
1129 noce_try_move (struct noce_if_info
*if_info
)
1131 rtx cond
= if_info
->cond
;
1132 enum rtx_code code
= GET_CODE (cond
);
1136 if (code
!= NE
&& code
!= EQ
)
1139 if (!noce_simple_bbs (if_info
))
1142 /* This optimization isn't valid if either A or B could be a NaN
1143 or a signed zero. */
1144 if (HONOR_NANS (if_info
->x
)
1145 || HONOR_SIGNED_ZEROS (if_info
->x
))
1148 /* Check whether the operands of the comparison are A and in
1150 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1151 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1152 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1153 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1155 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1158 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1160 /* Avoid generating the move if the source is the destination. */
1161 if (! rtx_equal_p (if_info
->x
, y
))
1164 noce_emit_move_insn (if_info
->x
, y
);
1165 seq
= end_ifcvt_sequence (if_info
);
1169 emit_insn_before_setloc (seq
, if_info
->jump
,
1170 INSN_LOCATION (if_info
->insn_a
));
1172 if_info
->transform_name
= "noce_try_move";
1178 /* Try forming an IF_THEN_ELSE (cond, b, a) and collapsing that
1179 through simplify_rtx. Sometimes that can eliminate the IF_THEN_ELSE.
1180 If that is the case, emit the result into x. */
1183 noce_try_ifelse_collapse (struct noce_if_info
* if_info
)
1185 if (!noce_simple_bbs (if_info
))
1188 machine_mode mode
= GET_MODE (if_info
->x
);
1189 rtx if_then_else
= simplify_gen_ternary (IF_THEN_ELSE
, mode
, mode
,
1190 if_info
->cond
, if_info
->b
,
1193 if (GET_CODE (if_then_else
) == IF_THEN_ELSE
)
1198 noce_emit_move_insn (if_info
->x
, if_then_else
);
1199 seq
= end_ifcvt_sequence (if_info
);
1203 emit_insn_before_setloc (seq
, if_info
->jump
,
1204 INSN_LOCATION (if_info
->insn_a
));
1206 if_info
->transform_name
= "noce_try_ifelse_collapse";
1211 /* Convert "if (test) x = 1; else x = 0".
1213 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1214 tried in noce_try_store_flag_constants after noce_try_cmove has had
1215 a go at the conversion. */
1218 noce_try_store_flag (struct noce_if_info
*if_info
)
1224 if (!noce_simple_bbs (if_info
))
1227 if (CONST_INT_P (if_info
->b
)
1228 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1229 && if_info
->a
== const0_rtx
)
1231 else if (if_info
->b
== const0_rtx
1232 && CONST_INT_P (if_info
->a
)
1233 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1234 && noce_reversed_cond_code (if_info
) != UNKNOWN
)
1241 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1244 if (target
!= if_info
->x
)
1245 noce_emit_move_insn (if_info
->x
, target
);
1247 seq
= end_ifcvt_sequence (if_info
);
1251 emit_insn_before_setloc (seq
, if_info
->jump
,
1252 INSN_LOCATION (if_info
->insn_a
));
1253 if_info
->transform_name
= "noce_try_store_flag";
1264 /* Convert "if (test) x = -A; else x = A" into
1265 x = A; if (test) x = -x if the machine can do the
1266 conditional negate form of this cheaply.
1267 Try this before noce_try_cmove that will just load the
1268 immediates into two registers and do a conditional select
1269 between them. If the target has a conditional negate or
1270 conditional invert operation we can save a potentially
1271 expensive constant synthesis. */
1274 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1276 if (!noce_simple_bbs (if_info
))
1279 if (!CONST_INT_P (if_info
->a
)
1280 || !CONST_INT_P (if_info
->b
)
1281 || !REG_P (if_info
->x
))
1284 machine_mode mode
= GET_MODE (if_info
->x
);
1286 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1287 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1289 rtx cond
= if_info
->cond
;
1297 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1299 else if (val_a
== ~val_b
)
1307 rtx tmp
= gen_reg_rtx (mode
);
1308 noce_emit_move_insn (tmp
, if_info
->a
);
1310 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1314 rtx_insn
*seq
= get_insns ();
1322 if (target
!= if_info
->x
)
1323 noce_emit_move_insn (if_info
->x
, target
);
1325 seq
= end_ifcvt_sequence (if_info
);
1330 emit_insn_before_setloc (seq
, if_info
->jump
,
1331 INSN_LOCATION (if_info
->insn_a
));
1332 if_info
->transform_name
= "noce_try_inverse_constants";
1341 /* Convert "if (test) x = a; else x = b", for A and B constant.
1342 Also allow A = y + c1, B = y + c2, with a common y between A
1346 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1351 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1354 machine_mode mode
= GET_MODE (if_info
->x
);;
1355 rtx common
= NULL_RTX
;
1360 /* Handle cases like x := test ? y + 3 : y + 4. */
1361 if (GET_CODE (a
) == PLUS
1362 && GET_CODE (b
) == PLUS
1363 && CONST_INT_P (XEXP (a
, 1))
1364 && CONST_INT_P (XEXP (b
, 1))
1365 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1366 /* Allow expressions that are not using the result or plain
1367 registers where we handle overlap below. */
1368 && (REG_P (XEXP (a
, 0))
1369 || (noce_operand_ok (XEXP (a
, 0))
1370 && ! reg_overlap_mentioned_p (if_info
->x
, XEXP (a
, 0)))))
1372 common
= XEXP (a
, 0);
1377 if (!noce_simple_bbs (if_info
))
1383 ifalse
= INTVAL (a
);
1385 bool subtract_flag_p
= false;
1387 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1388 /* Make sure we can represent the difference between the two values. */
1390 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1393 diff
= trunc_int_for_mode (diff
, mode
);
1395 can_reverse
= noce_reversed_cond_code (if_info
) != UNKNOWN
;
1397 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1400 /* We could collapse these cases but it is easier to follow the
1401 diff/STORE_FLAG_VALUE combinations when they are listed
1405 => 4 + (test != 0). */
1406 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1409 => can_reverse | 4 + (test == 0)
1410 !can_reverse | 3 - (test != 0). */
1411 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1413 reversep
= can_reverse
;
1414 subtract_flag_p
= !can_reverse
;
1415 /* If we need to subtract the flag and we have PLUS-immediate
1416 A and B then it is unlikely to be beneficial to play tricks
1418 if (subtract_flag_p
&& common
)
1422 => can_reverse | 3 + (test == 0)
1423 !can_reverse | 4 - (test != 0). */
1424 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1426 reversep
= can_reverse
;
1427 subtract_flag_p
= !can_reverse
;
1428 /* If we need to subtract the flag and we have PLUS-immediate
1429 A and B then it is unlikely to be beneficial to play tricks
1431 if (subtract_flag_p
&& common
)
1435 => 4 + (test != 0). */
1436 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1441 /* Is this (cond) ? 2^n : 0? */
1442 else if (ifalse
== 0 && pow2p_hwi (itrue
)
1443 && STORE_FLAG_VALUE
== 1)
1445 /* Is this (cond) ? 0 : 2^n? */
1446 else if (itrue
== 0 && pow2p_hwi (ifalse
) && can_reverse
1447 && STORE_FLAG_VALUE
== 1)
1452 /* Is this (cond) ? -1 : x? */
1453 else if (itrue
== -1
1454 && STORE_FLAG_VALUE
== -1)
1456 /* Is this (cond) ? x : -1? */
1457 else if (ifalse
== -1 && can_reverse
1458 && STORE_FLAG_VALUE
== -1)
1468 std::swap (itrue
, ifalse
);
1469 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1474 /* If we have x := test ? x + 3 : x + 4 then move the original
1475 x out of the way while we store flags. */
1476 if (common
&& rtx_equal_p (common
, if_info
->x
))
1478 common
= gen_reg_rtx (mode
);
1479 noce_emit_move_insn (common
, if_info
->x
);
1482 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1489 /* if (test) x = 3; else x = 4;
1490 => x = 3 + (test == 0); */
1491 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1493 /* Add the common part now. This may allow combine to merge this
1494 with the store flag operation earlier into some sort of conditional
1495 increment/decrement if the target allows it. */
1497 target
= expand_simple_binop (mode
, PLUS
,
1499 target
, 0, OPTAB_WIDEN
);
1501 /* Always use ifalse here. It should have been swapped with itrue
1502 when appropriate when reversep is true. */
1503 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1504 gen_int_mode (ifalse
, mode
), target
,
1505 if_info
->x
, 0, OPTAB_WIDEN
);
1507 /* Other cases are not beneficial when the original A and B are PLUS
1514 /* if (test) x = 8; else x = 0;
1515 => x = (test != 0) << 3; */
1516 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1518 target
= expand_simple_binop (mode
, ASHIFT
,
1519 target
, GEN_INT (tmp
), if_info
->x
, 0,
1523 /* if (test) x = -1; else x = b;
1524 => x = -(test != 0) | b; */
1525 else if (itrue
== -1)
1527 target
= expand_simple_binop (mode
, IOR
,
1528 target
, gen_int_mode (ifalse
, mode
),
1529 if_info
->x
, 0, OPTAB_WIDEN
);
1543 if (target
!= if_info
->x
)
1544 noce_emit_move_insn (if_info
->x
, target
);
1546 seq
= end_ifcvt_sequence (if_info
);
1547 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1550 emit_insn_before_setloc (seq
, if_info
->jump
,
1551 INSN_LOCATION (if_info
->insn_a
));
1552 if_info
->transform_name
= "noce_try_store_flag_constants";
1560 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1561 similarly for "foo--". */
1564 noce_try_addcc (struct noce_if_info
*if_info
)
1568 int subtract
, normalize
;
1570 if (!noce_simple_bbs (if_info
))
1573 if (GET_CODE (if_info
->a
) == PLUS
1574 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1575 && noce_reversed_cond_code (if_info
) != UNKNOWN
)
1577 rtx cond
= if_info
->rev_cond
;
1580 if (cond
== NULL_RTX
)
1582 cond
= if_info
->cond
;
1583 code
= reversed_comparison_code (cond
, if_info
->jump
);
1586 code
= GET_CODE (cond
);
1588 /* First try to use addcc pattern. */
1589 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1590 && general_operand (XEXP (cond
, 1), VOIDmode
))
1593 target
= emit_conditional_add (if_info
->x
, code
,
1598 XEXP (if_info
->a
, 1),
1599 GET_MODE (if_info
->x
),
1600 (code
== LTU
|| code
== GEU
1601 || code
== LEU
|| code
== GTU
));
1604 if (target
!= if_info
->x
)
1605 noce_emit_move_insn (if_info
->x
, target
);
1607 seq
= end_ifcvt_sequence (if_info
);
1608 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1611 emit_insn_before_setloc (seq
, if_info
->jump
,
1612 INSN_LOCATION (if_info
->insn_a
));
1613 if_info
->transform_name
= "noce_try_addcc";
1620 /* If that fails, construct conditional increment or decrement using
1621 setcc. We're changing a branch and an increment to a comparison and
1623 if (XEXP (if_info
->a
, 1) == const1_rtx
1624 || XEXP (if_info
->a
, 1) == constm1_rtx
)
1627 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1628 subtract
= 0, normalize
= 0;
1629 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1630 subtract
= 1, normalize
= 0;
1632 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1635 target
= noce_emit_store_flag (if_info
,
1636 gen_reg_rtx (GET_MODE (if_info
->x
)),
1640 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1641 subtract
? MINUS
: PLUS
,
1642 if_info
->b
, target
, if_info
->x
,
1646 if (target
!= if_info
->x
)
1647 noce_emit_move_insn (if_info
->x
, target
);
1649 seq
= end_ifcvt_sequence (if_info
);
1650 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1653 emit_insn_before_setloc (seq
, if_info
->jump
,
1654 INSN_LOCATION (if_info
->insn_a
));
1655 if_info
->transform_name
= "noce_try_addcc";
1665 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1668 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1674 if (!noce_simple_bbs (if_info
))
1679 if ((if_info
->a
== const0_rtx
1680 && rtx_equal_p (if_info
->b
, if_info
->x
))
1681 || ((reversep
= (noce_reversed_cond_code (if_info
) != UNKNOWN
))
1682 && if_info
->b
== const0_rtx
1683 && rtx_equal_p (if_info
->a
, if_info
->x
)))
1686 target
= noce_emit_store_flag (if_info
,
1687 gen_reg_rtx (GET_MODE (if_info
->x
)),
1690 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1692 target
, if_info
->x
, 0,
1697 if (target
!= if_info
->x
)
1698 noce_emit_move_insn (if_info
->x
, target
);
1700 seq
= end_ifcvt_sequence (if_info
);
1701 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1704 emit_insn_before_setloc (seq
, if_info
->jump
,
1705 INSN_LOCATION (if_info
->insn_a
));
1706 if_info
->transform_name
= "noce_try_store_flag_mask";
1717 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1720 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1721 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1723 rtx target ATTRIBUTE_UNUSED
;
1724 int unsignedp ATTRIBUTE_UNUSED
;
1726 /* If earliest == jump, try to build the cmove insn directly.
1727 This is helpful when combine has created some complex condition
1728 (like for alpha's cmovlbs) that we can't hope to regenerate
1729 through the normal interface. */
1731 if (if_info
->cond_earliest
== if_info
->jump
)
1733 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1734 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1735 cond
, vtrue
, vfalse
);
1736 rtx set
= gen_rtx_SET (x
, if_then_else
);
1739 rtx_insn
*insn
= emit_insn (set
);
1741 if (recog_memoized (insn
) >= 0)
1743 rtx_insn
*seq
= get_insns ();
1753 /* Don't even try if the comparison operands are weird
1754 except that the target supports cbranchcc4. */
1755 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1756 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1758 if (!have_cbranchcc4
1759 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1760 || cmp_b
!= const0_rtx
)
1764 unsignedp
= (code
== LTU
|| code
== GEU
1765 || code
== LEU
|| code
== GTU
);
1767 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1768 vtrue
, vfalse
, GET_MODE (x
),
1773 /* We might be faced with a situation like:
1776 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1777 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1779 We can't do a conditional move in mode M, but it's possible that we
1780 could do a conditional move in mode N instead and take a subreg of
1783 If we can't create new pseudos, though, don't bother. */
1784 if (reload_completed
)
1787 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1789 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1790 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1791 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1792 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1793 rtx promoted_target
;
1795 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1796 || byte_vtrue
!= byte_vfalse
1797 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1798 != SUBREG_PROMOTED_VAR_P (vfalse
))
1799 || (SUBREG_PROMOTED_GET (vtrue
)
1800 != SUBREG_PROMOTED_GET (vfalse
)))
1803 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1805 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1806 VOIDmode
, reg_vtrue
, reg_vfalse
,
1807 GET_MODE (reg_vtrue
), unsignedp
);
1808 /* Nope, couldn't do it in that mode either. */
1812 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1813 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1814 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1815 emit_move_insn (x
, target
);
1822 /* Try only simple constants and registers here. More complex cases
1823 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1824 has had a go at it. */
1827 noce_try_cmove (struct noce_if_info
*if_info
)
1833 if (!noce_simple_bbs (if_info
))
1836 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1837 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1841 code
= GET_CODE (if_info
->cond
);
1842 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1843 XEXP (if_info
->cond
, 0),
1844 XEXP (if_info
->cond
, 1),
1845 if_info
->a
, if_info
->b
);
1849 if (target
!= if_info
->x
)
1850 noce_emit_move_insn (if_info
->x
, target
);
1852 seq
= end_ifcvt_sequence (if_info
);
1853 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1856 emit_insn_before_setloc (seq
, if_info
->jump
,
1857 INSN_LOCATION (if_info
->insn_a
));
1858 if_info
->transform_name
= "noce_try_cmove";
1862 /* If both a and b are constants try a last-ditch transformation:
1863 if (test) x = a; else x = b;
1864 => x = (-(test != 0) & (b - a)) + a;
1865 Try this only if the target-specific expansion above has failed.
1866 The target-specific expander may want to generate sequences that
1867 we don't know about, so give them a chance before trying this
1869 else if (!targetm
.have_conditional_execution ()
1870 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
))
1872 machine_mode mode
= GET_MODE (if_info
->x
);
1873 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1874 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1875 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1882 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1883 /* Make sure we can represent the difference
1884 between the two values. */
1886 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1892 diff
= trunc_int_for_mode (diff
, mode
);
1893 target
= expand_simple_binop (mode
, AND
,
1894 target
, gen_int_mode (diff
, mode
),
1895 if_info
->x
, 0, OPTAB_WIDEN
);
1897 target
= expand_simple_binop (mode
, PLUS
,
1898 target
, gen_int_mode (ifalse
, mode
),
1899 if_info
->x
, 0, OPTAB_WIDEN
);
1902 if (target
!= if_info
->x
)
1903 noce_emit_move_insn (if_info
->x
, target
);
1905 seq
= end_ifcvt_sequence (if_info
);
1906 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1909 emit_insn_before_setloc (seq
, if_info
->jump
,
1910 INSN_LOCATION (if_info
->insn_a
));
1911 if_info
->transform_name
= "noce_try_cmove";
1927 /* Return true if X contains a conditional code mode rtx. */
1930 contains_ccmode_rtx_p (rtx x
)
1932 subrtx_iterator::array_type array
;
1933 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1934 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1940 /* Helper for bb_valid_for_noce_process_p. Validate that
1941 the rtx insn INSN is a single set that does not set
1942 the conditional register CC and is in general valid for
1946 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1949 || !NONJUMP_INSN_P (insn
)
1950 || (cc
&& set_of (cc
, insn
)))
1953 rtx sset
= single_set (insn
);
1955 /* Currently support only simple single sets in test_bb. */
1957 || !noce_operand_ok (SET_DEST (sset
))
1958 || contains_ccmode_rtx_p (SET_DEST (sset
))
1959 || !noce_operand_ok (SET_SRC (sset
)))
1966 /* Return true iff the registers that the insns in BB_A set do not get
1967 used in BB_B. If TO_RENAME is non-NULL then it is a location that will be
1968 renamed later by the caller and so conflicts on it should be ignored
1969 in this function. */
1972 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
, rtx to_rename
)
1975 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1980 FOR_BB_INSNS (bb_a
, a_insn
)
1982 if (!active_insn_p (a_insn
))
1985 rtx sset_a
= single_set (a_insn
);
1989 BITMAP_FREE (bba_sets
);
1992 /* Record all registers that BB_A sets. */
1993 FOR_EACH_INSN_DEF (def
, a_insn
)
1994 if (!(to_rename
&& DF_REF_REG (def
) == to_rename
))
1995 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
2000 FOR_BB_INSNS (bb_b
, b_insn
)
2002 if (!active_insn_p (b_insn
))
2005 rtx sset_b
= single_set (b_insn
);
2009 BITMAP_FREE (bba_sets
);
2013 /* Make sure this is a REG and not some instance
2014 of ZERO_EXTRACT or SUBREG or other dangerous stuff.
2015 If we have a memory destination then we have a pair of simple
2016 basic blocks performing an operation of the form [addr] = c ? a : b.
2017 bb_valid_for_noce_process_p will have ensured that these are
2018 the only stores present. In that case [addr] should be the location
2019 to be renamed. Assert that the callers set this up properly. */
2020 if (MEM_P (SET_DEST (sset_b
)))
2021 gcc_assert (rtx_equal_p (SET_DEST (sset_b
), to_rename
));
2022 else if (!REG_P (SET_DEST (sset_b
)))
2024 BITMAP_FREE (bba_sets
);
2028 /* If the insn uses a reg set in BB_A return false. */
2029 FOR_EACH_INSN_USE (use
, b_insn
)
2031 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
2033 BITMAP_FREE (bba_sets
);
2040 BITMAP_FREE (bba_sets
);
2044 /* Emit copies of all the active instructions in BB except the last.
2045 This is a helper for noce_try_cmove_arith. */
2048 noce_emit_all_but_last (basic_block bb
)
2050 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
2052 FOR_BB_INSNS (bb
, insn
)
2054 if (insn
!= last
&& active_insn_p (insn
))
2056 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
2058 emit_insn (PATTERN (to_emit
));
2063 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
2064 the resulting insn or NULL if it's not a valid insn. */
2067 noce_emit_insn (rtx to_emit
)
2069 gcc_assert (to_emit
);
2070 rtx_insn
*insn
= emit_insn (to_emit
);
2072 if (recog_memoized (insn
) < 0)
2078 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
2079 and including the penultimate one in BB if it is not simple
2080 (as indicated by SIMPLE). Then emit LAST_INSN as the last
2081 insn in the block. The reason for that is that LAST_INSN may
2082 have been modified by the preparation in noce_try_cmove_arith. */
2085 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
2088 noce_emit_all_but_last (bb
);
2090 if (last_insn
&& !noce_emit_insn (last_insn
))
2096 /* Try more complex cases involving conditional_move. */
2099 noce_try_cmove_arith (struct noce_if_info
*if_info
)
2105 rtx_insn
*insn_a
, *insn_b
;
2106 bool a_simple
= if_info
->then_simple
;
2107 bool b_simple
= if_info
->else_simple
;
2108 basic_block then_bb
= if_info
->then_bb
;
2109 basic_block else_bb
= if_info
->else_bb
;
2113 rtx cond
= if_info
->cond
;
2114 rtx_insn
*ifcvt_seq
;
2116 /* A conditional move from two memory sources is equivalent to a
2117 conditional on their addresses followed by a load. Don't do this
2118 early because it'll screw alias analysis. Note that we've
2119 already checked for no side effects. */
2120 if (cse_not_expected
2121 && MEM_P (a
) && MEM_P (b
)
2122 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
))
2124 machine_mode address_mode
= get_address_mode (a
);
2128 x
= gen_reg_rtx (address_mode
);
2132 /* ??? We could handle this if we knew that a load from A or B could
2133 not trap or fault. This is also true if we've already loaded
2134 from the address along the path from ENTRY. */
2135 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2138 /* if (test) x = a + b; else x = c - d;
2145 code
= GET_CODE (cond
);
2146 insn_a
= if_info
->insn_a
;
2147 insn_b
= if_info
->insn_b
;
2149 machine_mode x_mode
= GET_MODE (x
);
2151 if (!can_conditionally_move_p (x_mode
))
2154 /* Possibly rearrange operands to make things come out more natural. */
2155 if (noce_reversed_cond_code (if_info
) != UNKNOWN
)
2158 if (rtx_equal_p (b
, x
))
2160 else if (general_operand (b
, GET_MODE (b
)))
2165 if (if_info
->rev_cond
)
2167 cond
= if_info
->rev_cond
;
2168 code
= GET_CODE (cond
);
2171 code
= reversed_comparison_code (cond
, if_info
->jump
);
2173 std::swap (insn_a
, insn_b
);
2174 std::swap (a_simple
, b_simple
);
2175 std::swap (then_bb
, else_bb
);
2179 if (then_bb
&& else_bb
2180 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
, if_info
->orig_x
)
2181 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
, if_info
->orig_x
)))
2186 /* If one of the blocks is empty then the corresponding B or A value
2187 came from the test block. The non-empty complex block that we will
2188 emit might clobber the register used by B or A, so move it to a pseudo
2191 rtx tmp_a
= NULL_RTX
;
2192 rtx tmp_b
= NULL_RTX
;
2194 if (b_simple
|| !else_bb
)
2195 tmp_b
= gen_reg_rtx (x_mode
);
2197 if (a_simple
|| !then_bb
)
2198 tmp_a
= gen_reg_rtx (x_mode
);
2203 rtx emit_a
= NULL_RTX
;
2204 rtx emit_b
= NULL_RTX
;
2205 rtx_insn
*tmp_insn
= NULL
;
2206 bool modified_in_a
= false;
2207 bool modified_in_b
= false;
2208 /* If either operand is complex, load it into a register first.
2209 The best way to do this is to copy the original insn. In this
2210 way we preserve any clobbers etc that the insn may have had.
2211 This is of course not possible in the IS_MEM case. */
2213 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2218 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2219 emit_a
= gen_rtx_SET (reg
, a
);
2225 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2227 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2228 rtx set
= single_set (copy_of_a
);
2231 emit_a
= PATTERN (copy_of_a
);
2235 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2236 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2242 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2246 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2247 emit_b
= gen_rtx_SET (reg
, b
);
2253 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2254 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2255 rtx set
= single_set (copy_of_b
);
2258 emit_b
= PATTERN (copy_of_b
);
2262 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2263 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2269 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2270 if (tmp_b
&& then_bb
)
2272 FOR_BB_INSNS (then_bb
, tmp_insn
)
2273 /* Don't check inside insn_a. We will have changed it to emit_a
2274 with a destination that doesn't conflict. */
2275 if (!(insn_a
&& tmp_insn
== insn_a
)
2276 && modified_in_p (orig_b
, tmp_insn
))
2278 modified_in_a
= true;
2284 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2285 if (tmp_a
&& else_bb
)
2287 FOR_BB_INSNS (else_bb
, tmp_insn
)
2288 /* Don't check inside insn_b. We will have changed it to emit_b
2289 with a destination that doesn't conflict. */
2290 if (!(insn_b
&& tmp_insn
== insn_b
)
2291 && modified_in_p (orig_a
, tmp_insn
))
2293 modified_in_b
= true;
2298 /* If insn to set up A clobbers any registers B depends on, try to
2299 swap insn that sets up A with the one that sets up B. If even
2300 that doesn't help, punt. */
2301 if (modified_in_a
&& !modified_in_b
)
2303 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2304 goto end_seq_and_fail
;
2306 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2307 goto end_seq_and_fail
;
2309 else if (!modified_in_a
)
2311 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2312 goto end_seq_and_fail
;
2314 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2315 goto end_seq_and_fail
;
2318 goto end_seq_and_fail
;
2320 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (cond
, 0), XEXP (cond
, 1),
2324 goto end_seq_and_fail
;
2326 /* If we're handling a memory for above, emit the load now. */
2329 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2331 /* Copy over flags as appropriate. */
2332 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2333 MEM_VOLATILE_P (mem
) = 1;
2334 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2335 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2337 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2339 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2340 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2342 noce_emit_move_insn (if_info
->x
, mem
);
2344 else if (target
!= x
)
2345 noce_emit_move_insn (x
, target
);
2347 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2348 if (!ifcvt_seq
|| !noce_conversion_profitable_p (ifcvt_seq
, if_info
))
2351 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2352 INSN_LOCATION (if_info
->insn_a
));
2353 if_info
->transform_name
= "noce_try_cmove_arith";
2361 /* For most cases, the simplified condition we found is the best
2362 choice, but this is not the case for the min/max/abs transforms.
2363 For these we wish to know that it is A or B in the condition. */
2366 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2367 rtx_insn
**earliest
)
2373 /* If target is already mentioned in the known condition, return it. */
2374 if (reg_mentioned_p (target
, if_info
->cond
))
2376 *earliest
= if_info
->cond_earliest
;
2377 return if_info
->cond
;
2380 set
= pc_set (if_info
->jump
);
2381 cond
= XEXP (SET_SRC (set
), 0);
2383 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2384 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2385 if (if_info
->then_else_reversed
)
2388 /* If we're looking for a constant, try to make the conditional
2389 have that constant in it. There are two reasons why it may
2390 not have the constant we want:
2392 1. GCC may have needed to put the constant in a register, because
2393 the target can't compare directly against that constant. For
2394 this case, we look for a SET immediately before the comparison
2395 that puts a constant in that register.
2397 2. GCC may have canonicalized the conditional, for example
2398 replacing "if x < 4" with "if x <= 3". We can undo that (or
2399 make equivalent types of changes) to get the constants we need
2400 if they're off by one in the right direction. */
2402 if (CONST_INT_P (target
))
2404 enum rtx_code code
= GET_CODE (if_info
->cond
);
2405 rtx op_a
= XEXP (if_info
->cond
, 0);
2406 rtx op_b
= XEXP (if_info
->cond
, 1);
2407 rtx_insn
*prev_insn
;
2409 /* First, look to see if we put a constant in a register. */
2410 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2412 && BLOCK_FOR_INSN (prev_insn
)
2413 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2414 && INSN_P (prev_insn
)
2415 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2417 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2419 src
= SET_SRC (PATTERN (prev_insn
));
2420 if (CONST_INT_P (src
))
2422 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2424 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2427 if (CONST_INT_P (op_a
))
2429 std::swap (op_a
, op_b
);
2430 code
= swap_condition (code
);
2435 /* Now, look to see if we can get the right constant by
2436 adjusting the conditional. */
2437 if (CONST_INT_P (op_b
))
2439 HOST_WIDE_INT desired_val
= INTVAL (target
);
2440 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2445 if (desired_val
!= HOST_WIDE_INT_MAX
2446 && actual_val
== desired_val
+ 1)
2449 op_b
= GEN_INT (desired_val
);
2453 if (desired_val
!= HOST_WIDE_INT_MIN
2454 && actual_val
== desired_val
- 1)
2457 op_b
= GEN_INT (desired_val
);
2461 if (desired_val
!= HOST_WIDE_INT_MIN
2462 && actual_val
== desired_val
- 1)
2465 op_b
= GEN_INT (desired_val
);
2469 if (desired_val
!= HOST_WIDE_INT_MAX
2470 && actual_val
== desired_val
+ 1)
2473 op_b
= GEN_INT (desired_val
);
2481 /* If we made any changes, generate a new conditional that is
2482 equivalent to what we started with, but has the right
2484 if (code
!= GET_CODE (if_info
->cond
)
2485 || op_a
!= XEXP (if_info
->cond
, 0)
2486 || op_b
!= XEXP (if_info
->cond
, 1))
2488 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2489 *earliest
= if_info
->cond_earliest
;
2494 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2495 earliest
, target
, have_cbranchcc4
, true);
2496 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2499 /* We almost certainly searched back to a different place.
2500 Need to re-verify correct lifetimes. */
2502 /* X may not be mentioned in the range (cond_earliest, jump]. */
2503 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2504 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2507 /* A and B may not be modified in the range [cond_earliest, jump). */
2508 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2510 && (modified_in_p (if_info
->a
, insn
)
2511 || modified_in_p (if_info
->b
, insn
)))
2517 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2520 noce_try_minmax (struct noce_if_info
*if_info
)
2523 rtx_insn
*earliest
, *seq
;
2524 enum rtx_code code
, op
;
2527 if (!noce_simple_bbs (if_info
))
2530 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2531 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2532 to get the target to tell us... */
2533 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2534 || HONOR_NANS (if_info
->x
))
2537 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2541 /* Verify the condition is of the form we expect, and canonicalize
2542 the comparison code. */
2543 code
= GET_CODE (cond
);
2544 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2546 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2549 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2551 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2553 code
= swap_condition (code
);
2558 /* Determine what sort of operation this is. Note that the code is for
2559 a taken branch, so the code->operation mapping appears backwards. */
2592 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2593 if_info
->a
, if_info
->b
,
2594 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2600 if (target
!= if_info
->x
)
2601 noce_emit_move_insn (if_info
->x
, target
);
2603 seq
= end_ifcvt_sequence (if_info
);
2607 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2608 if_info
->cond
= cond
;
2609 if_info
->cond_earliest
= earliest
;
2610 if_info
->rev_cond
= NULL_RTX
;
2611 if_info
->transform_name
= "noce_try_minmax";
2616 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2617 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2621 noce_try_abs (struct noce_if_info
*if_info
)
2623 rtx cond
, target
, a
, b
, c
;
2624 rtx_insn
*earliest
, *seq
;
2626 bool one_cmpl
= false;
2628 if (!noce_simple_bbs (if_info
))
2631 /* Reject modes with signed zeros. */
2632 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2635 /* Recognize A and B as constituting an ABS or NABS. The canonical
2636 form is a branch around the negation, taken when the object is the
2637 first operand of a comparison against 0 that evaluates to true. */
2640 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2642 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2647 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2652 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2661 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2665 /* Verify the condition is of the form we expect. */
2666 if (rtx_equal_p (XEXP (cond
, 0), b
))
2668 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2676 /* Verify that C is zero. Search one step backward for a
2677 REG_EQUAL note or a simple source if necessary. */
2681 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2683 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2684 && (set
= single_set (insn
))
2685 && rtx_equal_p (SET_DEST (set
), c
))
2687 rtx note
= find_reg_equal_equiv_note (insn
);
2697 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2698 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2699 c
= get_pool_constant (XEXP (c
, 0));
2701 /* Work around funny ideas get_condition has wrt canonicalization.
2702 Note that these rtx constants are known to be CONST_INT, and
2703 therefore imply integer comparisons.
2704 The one_cmpl case is more complicated, as we want to handle
2705 only x < 0 ? ~x : x or x >= 0 ? x : ~x to one_cmpl_abs (x)
2706 and x < 0 ? x : ~x or x >= 0 ? ~x : x to ~one_cmpl_abs (x),
2707 but not other cases (x > -1 is equivalent of x >= 0). */
2708 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2710 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2715 else if (c
== CONST0_RTX (GET_MODE (b
)))
2718 && GET_CODE (cond
) != GE
2719 && GET_CODE (cond
) != LT
)
2725 /* Determine what sort of operation this is. */
2726 switch (GET_CODE (cond
))
2745 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2748 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2750 /* ??? It's a quandary whether cmove would be better here, especially
2751 for integers. Perhaps combine will clean things up. */
2752 if (target
&& negate
)
2755 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2758 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2768 if (target
!= if_info
->x
)
2769 noce_emit_move_insn (if_info
->x
, target
);
2771 seq
= end_ifcvt_sequence (if_info
);
2775 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2776 if_info
->cond
= cond
;
2777 if_info
->cond_earliest
= earliest
;
2778 if_info
->rev_cond
= NULL_RTX
;
2779 if_info
->transform_name
= "noce_try_abs";
2784 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2787 noce_try_sign_mask (struct noce_if_info
*if_info
)
2793 bool t_unconditional
;
2795 if (!noce_simple_bbs (if_info
))
2798 cond
= if_info
->cond
;
2799 code
= GET_CODE (cond
);
2804 if (if_info
->a
== const0_rtx
)
2806 if ((code
== LT
&& c
== const0_rtx
)
2807 || (code
== LE
&& c
== constm1_rtx
))
2810 else if (if_info
->b
== const0_rtx
)
2812 if ((code
== GE
&& c
== const0_rtx
)
2813 || (code
== GT
&& c
== constm1_rtx
))
2817 if (! t
|| side_effects_p (t
))
2820 /* We currently don't handle different modes. */
2821 mode
= GET_MODE (t
);
2822 if (GET_MODE (m
) != mode
)
2825 /* This is only profitable if T is unconditionally executed/evaluated in the
2826 original insn sequence or T is cheap. The former happens if B is the
2827 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2828 INSN_B which can happen for e.g. conditional stores to memory. For the
2829 cost computation use the block TEST_BB where the evaluation will end up
2830 after the transformation. */
2833 && (if_info
->insn_b
== NULL_RTX
2834 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2835 if (!(t_unconditional
2836 || (set_src_cost (t
, mode
, if_info
->speed_p
)
2837 < COSTS_N_INSNS (2))))
2841 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2842 "(signed) m >> 31" directly. This benefits targets with specialized
2843 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2844 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2845 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2854 noce_emit_move_insn (if_info
->x
, t
);
2856 seq
= end_ifcvt_sequence (if_info
);
2860 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2861 if_info
->transform_name
= "noce_try_sign_mask";
2867 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2871 noce_try_bitop (struct noce_if_info
*if_info
)
2873 rtx cond
, x
, a
, result
;
2880 cond
= if_info
->cond
;
2881 code
= GET_CODE (cond
);
2883 if (!noce_simple_bbs (if_info
))
2886 /* Check for no else condition. */
2887 if (! rtx_equal_p (x
, if_info
->b
))
2890 /* Check for a suitable condition. */
2891 if (code
!= NE
&& code
!= EQ
)
2893 if (XEXP (cond
, 1) != const0_rtx
)
2895 cond
= XEXP (cond
, 0);
2897 /* ??? We could also handle AND here. */
2898 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2900 if (XEXP (cond
, 1) != const1_rtx
2901 || !CONST_INT_P (XEXP (cond
, 2))
2902 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2904 bitnum
= INTVAL (XEXP (cond
, 2));
2905 mode
= GET_MODE (x
);
2906 if (BITS_BIG_ENDIAN
)
2907 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2908 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2915 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2917 /* Check for "if (X & C) x = x op C". */
2918 if (! rtx_equal_p (x
, XEXP (a
, 0))
2919 || !CONST_INT_P (XEXP (a
, 1))
2920 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2921 != HOST_WIDE_INT_1U
<< bitnum
)
2924 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2925 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2926 if (GET_CODE (a
) == IOR
)
2927 result
= (code
== NE
) ? a
: NULL_RTX
;
2928 else if (code
== NE
)
2930 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2931 result
= gen_int_mode (HOST_WIDE_INT_1
<< bitnum
, mode
);
2932 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2936 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2937 result
= gen_int_mode (~(HOST_WIDE_INT_1
<< bitnum
), mode
);
2938 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2941 else if (GET_CODE (a
) == AND
)
2943 /* Check for "if (X & C) x &= ~C". */
2944 if (! rtx_equal_p (x
, XEXP (a
, 0))
2945 || !CONST_INT_P (XEXP (a
, 1))
2946 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2947 != (~(HOST_WIDE_INT_1
<< bitnum
) & GET_MODE_MASK (mode
)))
2950 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2951 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2952 result
= (code
== EQ
) ? a
: NULL_RTX
;
2960 noce_emit_move_insn (x
, result
);
2961 seq
= end_ifcvt_sequence (if_info
);
2965 emit_insn_before_setloc (seq
, if_info
->jump
,
2966 INSN_LOCATION (if_info
->insn_a
));
2968 if_info
->transform_name
= "noce_try_bitop";
2973 /* Similar to get_condition, only the resulting condition must be
2974 valid at JUMP, instead of at EARLIEST.
2976 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2977 THEN block of the caller, and we have to reverse the condition. */
2980 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2985 if (! any_condjump_p (jump
))
2988 set
= pc_set (jump
);
2990 /* If this branches to JUMP_LABEL when the condition is false,
2991 reverse the condition. */
2992 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2993 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2995 /* We may have to reverse because the caller's if block is not canonical,
2996 i.e. the THEN block isn't the fallthrough block for the TEST block
2997 (see find_if_header). */
2998 if (then_else_reversed
)
3001 /* If the condition variable is a register and is MODE_INT, accept it. */
3003 cond
= XEXP (SET_SRC (set
), 0);
3004 tmp
= XEXP (cond
, 0);
3005 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
3006 && (GET_MODE (tmp
) != BImode
3007 || !targetm
.small_register_classes_for_mode_p (BImode
)))
3012 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
3013 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
3017 /* Otherwise, fall back on canonicalize_condition to do the dirty
3018 work of manipulating MODE_CC values and COMPARE rtx codes. */
3019 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
3020 NULL_RTX
, have_cbranchcc4
, true);
3022 /* We don't handle side-effects in the condition, like handling
3023 REG_INC notes and making sure no duplicate conditions are emitted. */
3024 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
3030 /* Return true if OP is ok for if-then-else processing. */
3033 noce_operand_ok (const_rtx op
)
3035 if (side_effects_p (op
))
3038 /* We special-case memories, so handle any of them with
3039 no address side effects. */
3041 return ! side_effects_p (XEXP (op
, 0));
3043 return ! may_trap_p (op
);
3046 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
3047 The condition used in this if-conversion is in COND.
3048 In practice, check that TEST_BB ends with a single set
3049 x := a and all previous computations
3050 in TEST_BB don't produce any values that are live after TEST_BB.
3051 In other words, all the insns in TEST_BB are there only
3052 to compute a value for x. Add the rtx cost of the insns
3053 in TEST_BB to COST. Record whether TEST_BB is a single simple
3054 set instruction in SIMPLE_P. */
3057 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
3058 unsigned int *cost
, bool *simple_p
)
3063 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
3064 rtx last_set
= NULL_RTX
;
3066 rtx cc
= cc_in_cond (cond
);
3068 if (!insn_valid_noce_process_p (last_insn
, cc
))
3070 last_set
= single_set (last_insn
);
3072 rtx x
= SET_DEST (last_set
);
3073 rtx_insn
*first_insn
= first_active_insn (test_bb
);
3074 rtx first_set
= single_set (first_insn
);
3079 /* We have a single simple set, that's okay. */
3080 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3082 if (first_insn
== last_insn
)
3084 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3085 *cost
+= insn_rtx_cost (first_set
, speed_p
);
3089 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3090 gcc_assert (prev_last_insn
);
3092 /* For now, disallow setting x multiple times in test_bb. */
3093 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3096 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3098 /* The regs that are live out of test_bb. */
3099 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3101 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
3103 FOR_BB_INSNS (test_bb
, insn
)
3105 if (insn
!= last_insn
)
3107 if (!active_insn_p (insn
))
3110 if (!insn_valid_noce_process_p (insn
, cc
))
3111 goto free_bitmap_and_fail
;
3113 rtx sset
= single_set (insn
);
3116 if (contains_mem_rtx_p (SET_SRC (sset
))
3117 || !REG_P (SET_DEST (sset
))
3118 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3119 goto free_bitmap_and_fail
;
3121 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3122 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3126 /* If any of the intermediate results in test_bb are live after test_bb
3128 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3129 goto free_bitmap_and_fail
;
3131 BITMAP_FREE (test_bb_temps
);
3132 *cost
+= potential_cost
;
3136 free_bitmap_and_fail
:
3137 BITMAP_FREE (test_bb_temps
);
3141 /* We have something like:
3144 { i = a; j = b; k = c; }
3148 tmp_i = (x > y) ? a : i;
3149 tmp_j = (x > y) ? b : j;
3150 tmp_k = (x > y) ? c : k;
3155 Subsequent passes are expected to clean up the extra moves.
3157 Look for special cases such as writes to one register which are
3158 read back in another SET, as might occur in a swap idiom or
3167 Which we want to rewrite to:
3169 tmp_i = (x > y) ? a : i;
3170 tmp_j = (x > y) ? tmp_i : j;
3174 We can catch these when looking at (SET x y) by keeping a list of the
3175 registers we would have targeted before if-conversion and looking back
3176 through it for an overlap with Y. If we find one, we rewire the
3177 conditional set to use the temporary we introduced earlier.
3179 IF_INFO contains the useful information about the block structure and
3180 jump instructions. */
3183 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3185 basic_block test_bb
= if_info
->test_bb
;
3186 basic_block then_bb
= if_info
->then_bb
;
3187 basic_block join_bb
= if_info
->join_bb
;
3188 rtx_insn
*jump
= if_info
->jump
;
3189 rtx_insn
*cond_earliest
;
3194 /* Decompose the condition attached to the jump. */
3195 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3196 rtx x
= XEXP (cond
, 0);
3197 rtx y
= XEXP (cond
, 1);
3198 rtx_code cond_code
= GET_CODE (cond
);
3200 /* The true targets for a conditional move. */
3201 auto_vec
<rtx
> targets
;
3202 /* The temporaries introduced to allow us to not consider register
3204 auto_vec
<rtx
> temporaries
;
3205 /* The insns we've emitted. */
3206 auto_vec
<rtx_insn
*> unmodified_insns
;
3209 FOR_BB_INSNS (then_bb
, insn
)
3211 /* Skip over non-insns. */
3212 if (!active_insn_p (insn
))
3215 rtx set
= single_set (insn
);
3216 gcc_checking_assert (set
);
3218 rtx target
= SET_DEST (set
);
3219 rtx temp
= gen_reg_rtx (GET_MODE (target
));
3220 rtx new_val
= SET_SRC (set
);
3221 rtx old_val
= target
;
3223 /* If we were supposed to read from an earlier write in this block,
3224 we've changed the register allocation. Rewire the read. While
3225 we are looking, also try to catch a swap idiom. */
3226 for (int i
= count
- 1; i
>= 0; --i
)
3227 if (reg_overlap_mentioned_p (new_val
, targets
[i
]))
3229 /* Catch a "swap" style idiom. */
3230 if (find_reg_note (insn
, REG_DEAD
, new_val
) != NULL_RTX
)
3231 /* The write to targets[i] is only live until the read
3232 here. As the condition codes match, we can propagate
3234 new_val
= SET_SRC (single_set (unmodified_insns
[i
]));
3236 new_val
= temporaries
[i
];
3240 /* If we had a non-canonical conditional jump (i.e. one where
3241 the fallthrough is to the "else" case) we need to reverse
3242 the conditional select. */
3243 if (if_info
->then_else_reversed
)
3244 std::swap (old_val
, new_val
);
3247 /* We allow simple lowpart register subreg SET sources in
3248 bb_ok_for_noce_convert_multiple_sets. Be careful when processing
3250 (set (reg:SI r1) (reg:SI r2))
3251 (set (reg:HI r3) (subreg:HI (r1)))
3252 For the second insn new_val or old_val (r1 in this example) will be
3253 taken from the temporaries and have the wider mode which will not
3254 match with the mode of the other source of the conditional move, so
3255 we'll end up trying to emit r4:HI = cond ? (r1:SI) : (r3:HI).
3256 Wrap the two cmove operands into subregs if appropriate to prevent
3258 if (GET_MODE (new_val
) != GET_MODE (temp
))
3260 machine_mode src_mode
= GET_MODE (new_val
);
3261 machine_mode dst_mode
= GET_MODE (temp
);
3262 if (GET_MODE_SIZE (src_mode
) <= GET_MODE_SIZE (dst_mode
))
3267 new_val
= lowpart_subreg (dst_mode
, new_val
, src_mode
);
3269 if (GET_MODE (old_val
) != GET_MODE (temp
))
3271 machine_mode src_mode
= GET_MODE (old_val
);
3272 machine_mode dst_mode
= GET_MODE (temp
);
3273 if (GET_MODE_SIZE (src_mode
) <= GET_MODE_SIZE (dst_mode
))
3278 old_val
= lowpart_subreg (dst_mode
, old_val
, src_mode
);
3281 /* Actually emit the conditional move. */
3282 rtx temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3283 x
, y
, new_val
, old_val
);
3285 /* If we failed to expand the conditional move, drop out and don't
3287 if (temp_dest
== NULL_RTX
)
3295 targets
.safe_push (target
);
3296 temporaries
.safe_push (temp_dest
);
3297 unmodified_insns
.safe_push (insn
);
3300 /* We must have seen some sort of insn to insert, otherwise we were
3301 given an empty BB to convert, and we can't handle that. */
3302 gcc_assert (!unmodified_insns
.is_empty ());
3304 /* Now fixup the assignments. */
3305 for (int i
= 0; i
< count
; i
++)
3306 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3308 /* Actually emit the sequence if it isn't too expensive. */
3309 rtx_insn
*seq
= get_insns ();
3311 if (!noce_conversion_profitable_p (seq
, if_info
))
3317 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3318 set_used_flags (insn
);
3320 /* Mark all our temporaries and targets as used. */
3321 for (int i
= 0; i
< count
; i
++)
3323 set_used_flags (temporaries
[i
]);
3324 set_used_flags (targets
[i
]);
3327 set_used_flags (cond
);
3331 unshare_all_rtl_in_chain (seq
);
3337 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3339 || recog_memoized (insn
) == -1)
3342 emit_insn_before_setloc (seq
, if_info
->jump
,
3343 INSN_LOCATION (unmodified_insns
.last ()));
3345 /* Clean up THEN_BB and the edges in and out of it. */
3346 remove_edge (find_edge (test_bb
, join_bb
));
3347 remove_edge (find_edge (then_bb
, join_bb
));
3348 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3349 delete_basic_block (then_bb
);
3352 /* Maybe merge blocks now the jump is simple enough. */
3353 if (can_merge_blocks_p (test_bb
, join_bb
))
3355 merge_blocks (test_bb
, join_bb
);
3359 num_updated_if_blocks
++;
3360 if_info
->transform_name
= "noce_convert_multiple_sets";
3364 /* Return true iff basic block TEST_BB is comprised of only
3365 (SET (REG) (REG)) insns suitable for conversion to a series
3366 of conditional moves. Also check that we have more than one set
3367 (other routines can handle a single set better than we would), and
3368 fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. */
3371 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
)
3375 unsigned param
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3377 FOR_BB_INSNS (test_bb
, insn
)
3379 /* Skip over notes etc. */
3380 if (!active_insn_p (insn
))
3383 /* We only handle SET insns. */
3384 rtx set
= single_set (insn
);
3385 if (set
== NULL_RTX
)
3388 rtx dest
= SET_DEST (set
);
3389 rtx src
= SET_SRC (set
);
3391 /* We can possibly relax this, but for now only handle REG to REG
3392 (including subreg) moves. This avoids any issues that might come
3393 from introducing loads/stores that might violate data-race-freedom
3399 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3400 && subreg_lowpart_p (src
))))
3403 /* Destination must be appropriate for a conditional write. */
3404 if (!noce_operand_ok (dest
))
3407 /* We must be able to conditionally move in this mode. */
3408 if (!can_conditionally_move_p (GET_MODE (dest
)))
3414 /* If we would only put out one conditional move, the other strategies
3415 this pass tries are better optimized and will be more appropriate.
3416 Some targets want to strictly limit the number of conditional moves
3417 that are emitted, they set this through PARAM, we need to respect
3419 return count
> 1 && count
<= param
;
3422 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3423 it without using conditional execution. Return TRUE if we were successful
3424 at converting the block. */
3427 noce_process_if_block (struct noce_if_info
*if_info
)
3429 basic_block test_bb
= if_info
->test_bb
; /* test block */
3430 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3431 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3432 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3433 rtx_insn
*jump
= if_info
->jump
;
3434 rtx cond
= if_info
->cond
;
3435 rtx_insn
*insn_a
, *insn_b
;
3437 rtx orig_x
, x
, a
, b
;
3439 /* We're looking for patterns of the form
3441 (1) if (...) x = a; else x = b;
3442 (2) x = b; if (...) x = a;
3443 (3) if (...) x = a; // as if with an initial x = x.
3444 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3445 The later patterns require jumps to be more expensive.
3446 For the if (...) x = a; else x = b; case we allow multiple insns
3447 inside the then and else blocks as long as their only effect is
3448 to calculate a value for x.
3449 ??? For future expansion, further expand the "multiple X" rules. */
3451 /* First look for multiple SETS. */
3453 && HAVE_conditional_move
3455 && bb_ok_for_noce_convert_multiple_sets (then_bb
))
3457 if (noce_convert_multiple_sets (if_info
))
3459 if (dump_file
&& if_info
->transform_name
)
3460 fprintf (dump_file
, "if-conversion succeeded through %s\n",
3461 if_info
->transform_name
);
3466 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3467 unsigned int then_cost
= 0, else_cost
= 0;
3468 if (!bb_valid_for_noce_process_p (then_bb
, cond
, &then_cost
,
3469 &if_info
->then_simple
))
3473 && !bb_valid_for_noce_process_p (else_bb
, cond
, &else_cost
,
3474 &if_info
->else_simple
))
3477 if (else_bb
== NULL
)
3478 if_info
->original_cost
+= then_cost
;
3480 if_info
->original_cost
+= MIN (then_cost
, else_cost
);
3482 if_info
->original_cost
+= then_cost
+ else_cost
;
3484 insn_a
= last_active_insn (then_bb
, FALSE
);
3485 set_a
= single_set (insn_a
);
3488 x
= SET_DEST (set_a
);
3489 a
= SET_SRC (set_a
);
3491 /* Look for the other potential set. Make sure we've got equivalent
3493 /* ??? This is overconservative. Storing to two different mems is
3494 as easy as conditionally computing the address. Storing to a
3495 single mem merely requires a scratch memory to use as one of the
3496 destination addresses; often the memory immediately below the
3497 stack pointer is available for this. */
3501 insn_b
= last_active_insn (else_bb
, FALSE
);
3502 set_b
= single_set (insn_b
);
3505 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3510 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3511 /* We're going to be moving the evaluation of B down from above
3512 COND_EARLIEST to JUMP. Make sure the relevant data is still
3515 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3516 || !NONJUMP_INSN_P (insn_b
)
3517 || (set_b
= single_set (insn_b
)) == NULL_RTX
3518 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3519 || ! noce_operand_ok (SET_SRC (set_b
))
3520 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3521 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3522 /* Avoid extending the lifetime of hard registers on small
3523 register class machines. */
3524 || (REG_P (SET_SRC (set_b
))
3525 && HARD_REGISTER_P (SET_SRC (set_b
))
3526 && targetm
.small_register_classes_for_mode_p
3527 (GET_MODE (SET_SRC (set_b
))))
3528 /* Likewise with X. In particular this can happen when
3529 noce_get_condition looks farther back in the instruction
3530 stream than one might expect. */
3531 || reg_overlap_mentioned_p (x
, cond
)
3532 || reg_overlap_mentioned_p (x
, a
)
3533 || modified_between_p (x
, insn_b
, jump
))
3540 /* If x has side effects then only the if-then-else form is safe to
3541 convert. But even in that case we would need to restore any notes
3542 (such as REG_INC) at then end. That can be tricky if
3543 noce_emit_move_insn expands to more than one insn, so disable the
3544 optimization entirely for now if there are side effects. */
3545 if (side_effects_p (x
))
3548 b
= (set_b
? SET_SRC (set_b
) : x
);
3550 /* Only operate on register destinations, and even then avoid extending
3551 the lifetime of hard registers on small register class machines. */
3553 if_info
->orig_x
= orig_x
;
3555 || (HARD_REGISTER_P (x
)
3556 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3558 if (GET_MODE (x
) == BLKmode
)
3561 if (GET_CODE (x
) == ZERO_EXTRACT
3562 && (!CONST_INT_P (XEXP (x
, 1))
3563 || !CONST_INT_P (XEXP (x
, 2))))
3566 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3567 ? XEXP (x
, 0) : x
));
3570 /* Don't operate on sources that may trap or are volatile. */
3571 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3575 /* Set up the info block for our subroutines. */
3576 if_info
->insn_a
= insn_a
;
3577 if_info
->insn_b
= insn_b
;
3582 /* Try optimizations in some approximation of a useful order. */
3583 /* ??? Should first look to see if X is live incoming at all. If it
3584 isn't, we don't need anything but an unconditional set. */
3586 /* Look and see if A and B are really the same. Avoid creating silly
3587 cmove constructs that no one will fix up later. */
3588 if (noce_simple_bbs (if_info
)
3589 && rtx_interchangeable_p (a
, b
))
3591 /* If we have an INSN_B, we don't have to create any new rtl. Just
3592 move the instruction that we already have. If we don't have an
3593 INSN_B, that means that A == X, and we've got a noop move. In
3594 that case don't do anything and let the code below delete INSN_A. */
3595 if (insn_b
&& else_bb
)
3599 if (else_bb
&& insn_b
== BB_END (else_bb
))
3600 BB_END (else_bb
) = PREV_INSN (insn_b
);
3601 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3603 /* If there was a REG_EQUAL note, delete it since it may have been
3604 true due to this insn being after a jump. */
3605 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3606 remove_note (insn_b
, note
);
3610 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3611 x must be executed twice. */
3612 else if (insn_b
&& side_effects_p (orig_x
))
3619 if (!set_b
&& MEM_P (orig_x
))
3620 /* We want to avoid store speculation to avoid cases like
3621 if (pthread_mutex_trylock(mutex))
3623 Rather than go to much effort here, we rely on the SSA optimizers,
3624 which do a good enough job these days. */
3627 if (noce_try_move (if_info
))
3629 if (noce_try_ifelse_collapse (if_info
))
3631 if (noce_try_store_flag (if_info
))
3633 if (noce_try_bitop (if_info
))
3635 if (noce_try_minmax (if_info
))
3637 if (noce_try_abs (if_info
))
3639 if (noce_try_inverse_constants (if_info
))
3641 if (!targetm
.have_conditional_execution ()
3642 && noce_try_store_flag_constants (if_info
))
3644 if (HAVE_conditional_move
3645 && noce_try_cmove (if_info
))
3647 if (! targetm
.have_conditional_execution ())
3649 if (noce_try_addcc (if_info
))
3651 if (noce_try_store_flag_mask (if_info
))
3653 if (HAVE_conditional_move
3654 && noce_try_cmove_arith (if_info
))
3656 if (noce_try_sign_mask (if_info
))
3660 if (!else_bb
&& set_b
)
3671 if (dump_file
&& if_info
->transform_name
)
3672 fprintf (dump_file
, "if-conversion succeeded through %s\n",
3673 if_info
->transform_name
);
3675 /* If we used a temporary, fix it up now. */
3681 noce_emit_move_insn (orig_x
, x
);
3683 set_used_flags (orig_x
);
3684 unshare_all_rtl_in_chain (seq
);
3687 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3690 /* The original THEN and ELSE blocks may now be removed. The test block
3691 must now jump to the join block. If the test block and the join block
3692 can be merged, do so. */
3695 delete_basic_block (else_bb
);
3699 remove_edge (find_edge (test_bb
, join_bb
));
3701 remove_edge (find_edge (then_bb
, join_bb
));
3702 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3703 delete_basic_block (then_bb
);
3706 if (can_merge_blocks_p (test_bb
, join_bb
))
3708 merge_blocks (test_bb
, join_bb
);
3712 num_updated_if_blocks
++;
3716 /* Check whether a block is suitable for conditional move conversion.
3717 Every insn must be a simple set of a register to a constant or a
3718 register. For each assignment, store the value in the pointer map
3719 VALS, keyed indexed by register pointer, then store the register
3720 pointer in REGS. COND is the condition we will test. */
3723 check_cond_move_block (basic_block bb
,
3724 hash_map
<rtx
, rtx
> *vals
,
3729 rtx cc
= cc_in_cond (cond
);
3731 /* We can only handle simple jumps at the end of the basic block.
3732 It is almost impossible to update the CFG otherwise. */
3734 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3737 FOR_BB_INSNS (bb
, insn
)
3741 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3743 set
= single_set (insn
);
3747 dest
= SET_DEST (set
);
3748 src
= SET_SRC (set
);
3750 || (HARD_REGISTER_P (dest
)
3751 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3754 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3757 if (side_effects_p (src
) || side_effects_p (dest
))
3760 if (may_trap_p (src
) || may_trap_p (dest
))
3763 /* Don't try to handle this if the source register was
3764 modified earlier in the block. */
3767 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3768 && vals
->get (SUBREG_REG (src
))))
3771 /* Don't try to handle this if the destination register was
3772 modified earlier in the block. */
3773 if (vals
->get (dest
))
3776 /* Don't try to handle this if the condition uses the
3777 destination register. */
3778 if (reg_overlap_mentioned_p (dest
, cond
))
3781 /* Don't try to handle this if the source register is modified
3782 later in the block. */
3783 if (!CONSTANT_P (src
)
3784 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3787 /* Skip it if the instruction to be moved might clobber CC. */
3788 if (cc
&& set_of (cc
, insn
))
3791 vals
->put (dest
, src
);
3793 regs
->safe_push (dest
);
3799 /* Given a basic block BB suitable for conditional move conversion,
3800 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3801 the register values depending on COND, emit the insns in the block as
3802 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3803 processed. The caller has started a sequence for the conversion.
3804 Return true if successful, false if something goes wrong. */
3807 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3808 basic_block bb
, rtx cond
,
3809 hash_map
<rtx
, rtx
> *then_vals
,
3810 hash_map
<rtx
, rtx
> *else_vals
,
3815 rtx cond_arg0
, cond_arg1
;
3817 code
= GET_CODE (cond
);
3818 cond_arg0
= XEXP (cond
, 0);
3819 cond_arg1
= XEXP (cond
, 1);
3821 FOR_BB_INSNS (bb
, insn
)
3823 rtx set
, target
, dest
, t
, e
;
3825 /* ??? Maybe emit conditional debug insn? */
3826 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3828 set
= single_set (insn
);
3829 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3831 dest
= SET_DEST (set
);
3833 rtx
*then_slot
= then_vals
->get (dest
);
3834 rtx
*else_slot
= else_vals
->get (dest
);
3835 t
= then_slot
? *then_slot
: NULL_RTX
;
3836 e
= else_slot
? *else_slot
: NULL_RTX
;
3840 /* If this register was set in the then block, we already
3841 handled this case there. */
3854 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3860 noce_emit_move_insn (dest
, target
);
3866 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3867 it using only conditional moves. Return TRUE if we were successful at
3868 converting the block. */
3871 cond_move_process_if_block (struct noce_if_info
*if_info
)
3873 basic_block test_bb
= if_info
->test_bb
;
3874 basic_block then_bb
= if_info
->then_bb
;
3875 basic_block else_bb
= if_info
->else_bb
;
3876 basic_block join_bb
= if_info
->join_bb
;
3877 rtx_insn
*jump
= if_info
->jump
;
3878 rtx cond
= if_info
->cond
;
3879 rtx_insn
*seq
, *loc_insn
;
3882 vec
<rtx
> then_regs
= vNULL
;
3883 vec
<rtx
> else_regs
= vNULL
;
3885 int success_p
= FALSE
;
3886 int limit
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3888 /* Build a mapping for each block to the value used for each
3890 hash_map
<rtx
, rtx
> then_vals
;
3891 hash_map
<rtx
, rtx
> else_vals
;
3893 /* Make sure the blocks are suitable. */
3894 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3896 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3899 /* Make sure the blocks can be used together. If the same register
3900 is set in both blocks, and is not set to a constant in both
3901 cases, then both blocks must set it to the same register. We
3902 have already verified that if it is set to a register, that the
3903 source register does not change after the assignment. Also count
3904 the number of registers set in only one of the blocks. */
3906 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3908 rtx
*then_slot
= then_vals
.get (reg
);
3909 rtx
*else_slot
= else_vals
.get (reg
);
3911 gcc_checking_assert (then_slot
);
3916 rtx then_val
= *then_slot
;
3917 rtx else_val
= *else_slot
;
3918 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3919 && !rtx_equal_p (then_val
, else_val
))
3924 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3925 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3927 gcc_checking_assert (else_vals
.get (reg
));
3928 if (!then_vals
.get (reg
))
3932 /* Make sure it is reasonable to convert this block. What matters
3933 is the number of assignments currently made in only one of the
3934 branches, since if we convert we are going to always execute
3936 if (c
> MAX_CONDITIONAL_EXECUTE
3940 /* Try to emit the conditional moves. First do the then block,
3941 then do anything left in the else blocks. */
3943 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3944 &then_vals
, &else_vals
, false)
3946 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3947 &then_vals
, &else_vals
, true)))
3952 seq
= end_ifcvt_sequence (if_info
);
3956 loc_insn
= first_active_insn (then_bb
);
3959 loc_insn
= first_active_insn (else_bb
);
3960 gcc_assert (loc_insn
);
3962 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3966 delete_basic_block (else_bb
);
3970 remove_edge (find_edge (test_bb
, join_bb
));
3972 remove_edge (find_edge (then_bb
, join_bb
));
3973 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3974 delete_basic_block (then_bb
);
3977 if (can_merge_blocks_p (test_bb
, join_bb
))
3979 merge_blocks (test_bb
, join_bb
);
3983 num_updated_if_blocks
++;
3987 then_regs
.release ();
3988 else_regs
.release ();
3993 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3994 IF-THEN-ELSE-JOIN block.
3996 If so, we'll try to convert the insns to not require the branch,
3997 using only transformations that do not require conditional execution.
3999 Return TRUE if we were successful at converting the block. */
4002 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
4005 basic_block then_bb
, else_bb
, join_bb
;
4006 bool then_else_reversed
= false;
4009 rtx_insn
*cond_earliest
;
4010 struct noce_if_info if_info
;
4011 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
4013 /* We only ever should get here before reload. */
4014 gcc_assert (!reload_completed
);
4016 /* Recognize an IF-THEN-ELSE-JOIN block. */
4017 if (single_pred_p (then_edge
->dest
)
4018 && single_succ_p (then_edge
->dest
)
4019 && single_pred_p (else_edge
->dest
)
4020 && single_succ_p (else_edge
->dest
)
4021 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
4023 then_bb
= then_edge
->dest
;
4024 else_bb
= else_edge
->dest
;
4025 join_bb
= single_succ (then_bb
);
4027 /* Recognize an IF-THEN-JOIN block. */
4028 else if (single_pred_p (then_edge
->dest
)
4029 && single_succ_p (then_edge
->dest
)
4030 && single_succ (then_edge
->dest
) == else_edge
->dest
)
4032 then_bb
= then_edge
->dest
;
4033 else_bb
= NULL_BLOCK
;
4034 join_bb
= else_edge
->dest
;
4036 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
4037 of basic blocks in cfglayout mode does not matter, so the fallthrough
4038 edge can go to any basic block (and not just to bb->next_bb, like in
4040 else if (single_pred_p (else_edge
->dest
)
4041 && single_succ_p (else_edge
->dest
)
4042 && single_succ (else_edge
->dest
) == then_edge
->dest
)
4044 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
4045 To make this work, we have to invert the THEN and ELSE blocks
4046 and reverse the jump condition. */
4047 then_bb
= else_edge
->dest
;
4048 else_bb
= NULL_BLOCK
;
4049 join_bb
= single_succ (then_bb
);
4050 then_else_reversed
= true;
4053 /* Not a form we can handle. */
4056 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4057 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4060 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4063 num_possible_if_blocks
++;
4068 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
4069 (else_bb
) ? "-ELSE" : "",
4070 pass
, test_bb
->index
, then_bb
->index
);
4073 fprintf (dump_file
, ", else %d", else_bb
->index
);
4075 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
4078 /* If the conditional jump is more than just a conditional
4079 jump, then we can not do if-conversion on this block. */
4080 jump
= BB_END (test_bb
);
4081 if (! onlyjump_p (jump
))
4084 /* If this is not a standard conditional jump, we can't parse it. */
4085 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
4089 /* We must be comparing objects whose modes imply the size. */
4090 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4093 /* Initialize an IF_INFO struct to pass around. */
4094 memset (&if_info
, 0, sizeof if_info
);
4095 if_info
.test_bb
= test_bb
;
4096 if_info
.then_bb
= then_bb
;
4097 if_info
.else_bb
= else_bb
;
4098 if_info
.join_bb
= join_bb
;
4099 if_info
.cond
= cond
;
4100 rtx_insn
*rev_cond_earliest
;
4101 if_info
.rev_cond
= noce_get_condition (jump
, &rev_cond_earliest
,
4102 !then_else_reversed
);
4103 gcc_assert (if_info
.rev_cond
== NULL_RTX
4104 || rev_cond_earliest
== cond_earliest
);
4105 if_info
.cond_earliest
= cond_earliest
;
4106 if_info
.jump
= jump
;
4107 if_info
.then_else_reversed
= then_else_reversed
;
4108 if_info
.speed_p
= speed_p
;
4109 if_info
.max_seq_cost
4110 = targetm
.max_noce_ifcvt_seq_cost (then_edge
);
4111 /* We'll add in the cost of THEN_BB and ELSE_BB later, when we check
4112 that they are valid to transform. We can't easily get back to the insn
4113 for COND (and it may not exist if we had to canonicalize to get COND),
4114 and jump_insns are always given a cost of 1 by seq_cost, so treat
4115 both instructions as having cost COSTS_N_INSNS (1). */
4116 if_info
.original_cost
= COSTS_N_INSNS (2);
4119 /* Do the real work. */
4121 if (noce_process_if_block (&if_info
))
4124 if (HAVE_conditional_move
4125 && cond_move_process_if_block (&if_info
))
4132 /* Merge the blocks and mark for local life update. */
4135 merge_if_block (struct ce_if_block
* ce_info
)
4137 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
4138 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
4139 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
4140 basic_block join_bb
= ce_info
->join_bb
; /* join block */
4141 basic_block combo_bb
;
4143 /* All block merging is done into the lower block numbers. */
4146 df_set_bb_dirty (test_bb
);
4148 /* Merge any basic blocks to handle && and || subtests. Each of
4149 the blocks are on the fallthru path from the predecessor block. */
4150 if (ce_info
->num_multiple_test_blocks
> 0)
4152 basic_block bb
= test_bb
;
4153 basic_block last_test_bb
= ce_info
->last_test_bb
;
4154 basic_block fallthru
= block_fallthru (bb
);
4159 fallthru
= block_fallthru (bb
);
4160 merge_blocks (combo_bb
, bb
);
4163 while (bb
!= last_test_bb
);
4166 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4167 label, but it might if there were || tests. That label's count should be
4168 zero, and it normally should be removed. */
4172 /* If THEN_BB has no successors, then there's a BARRIER after it.
4173 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4174 is no longer needed, and in fact it is incorrect to leave it in
4176 if (EDGE_COUNT (then_bb
->succs
) == 0
4177 && EDGE_COUNT (combo_bb
->succs
) > 1)
4179 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4180 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4181 end
= NEXT_INSN (end
);
4183 if (end
&& BARRIER_P (end
))
4186 merge_blocks (combo_bb
, then_bb
);
4190 /* The ELSE block, if it existed, had a label. That label count
4191 will almost always be zero, but odd things can happen when labels
4192 get their addresses taken. */
4195 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4196 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4197 is no longer needed, and in fact it is incorrect to leave it in
4199 if (EDGE_COUNT (else_bb
->succs
) == 0
4200 && EDGE_COUNT (combo_bb
->succs
) > 1)
4202 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4203 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4204 end
= NEXT_INSN (end
);
4206 if (end
&& BARRIER_P (end
))
4209 merge_blocks (combo_bb
, else_bb
);
4213 /* If there was no join block reported, that means it was not adjacent
4214 to the others, and so we cannot merge them. */
4218 rtx_insn
*last
= BB_END (combo_bb
);
4220 /* The outgoing edge for the current COMBO block should already
4221 be correct. Verify this. */
4222 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4223 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4224 || (NONJUMP_INSN_P (last
)
4225 && GET_CODE (PATTERN (last
)) == TRAP_IF
4226 && (TRAP_CONDITION (PATTERN (last
))
4227 == const_true_rtx
)));
4230 /* There should still be something at the end of the THEN or ELSE
4231 blocks taking us to our final destination. */
4232 gcc_assert (JUMP_P (last
)
4233 || (EDGE_SUCC (combo_bb
, 0)->dest
4234 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4236 && SIBLING_CALL_P (last
))
4237 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4238 && can_throw_internal (last
)));
4241 /* The JOIN block may have had quite a number of other predecessors too.
4242 Since we've already merged the TEST, THEN and ELSE blocks, we should
4243 have only one remaining edge from our if-then-else diamond. If there
4244 is more than one remaining edge, it must come from elsewhere. There
4245 may be zero incoming edges if the THEN block didn't actually join
4246 back up (as with a call to a non-return function). */
4247 else if (EDGE_COUNT (join_bb
->preds
) < 2
4248 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4250 /* We can merge the JOIN cleanly and update the dataflow try
4251 again on this pass.*/
4252 merge_blocks (combo_bb
, join_bb
);
4257 /* We cannot merge the JOIN. */
4259 /* The outgoing edge for the current COMBO block should already
4260 be correct. Verify this. */
4261 gcc_assert (single_succ_p (combo_bb
)
4262 && single_succ (combo_bb
) == join_bb
);
4264 /* Remove the jump and cruft from the end of the COMBO block. */
4265 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4266 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4269 num_updated_if_blocks
++;
4272 /* Find a block ending in a simple IF condition and try to transform it
4273 in some way. When converting a multi-block condition, put the new code
4274 in the first such block and delete the rest. Return a pointer to this
4275 first block if some transformation was done. Return NULL otherwise. */
4278 find_if_header (basic_block test_bb
, int pass
)
4280 ce_if_block ce_info
;
4284 /* The kind of block we're looking for has exactly two successors. */
4285 if (EDGE_COUNT (test_bb
->succs
) != 2)
4288 then_edge
= EDGE_SUCC (test_bb
, 0);
4289 else_edge
= EDGE_SUCC (test_bb
, 1);
4291 if (df_get_bb_dirty (then_edge
->dest
))
4293 if (df_get_bb_dirty (else_edge
->dest
))
4296 /* Neither edge should be abnormal. */
4297 if ((then_edge
->flags
& EDGE_COMPLEX
)
4298 || (else_edge
->flags
& EDGE_COMPLEX
))
4301 /* Nor exit the loop. */
4302 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4303 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4306 /* The THEN edge is canonically the one that falls through. */
4307 if (then_edge
->flags
& EDGE_FALLTHRU
)
4309 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4310 std::swap (then_edge
, else_edge
);
4312 /* Otherwise this must be a multiway branch of some sort. */
4315 memset (&ce_info
, 0, sizeof (ce_info
));
4316 ce_info
.test_bb
= test_bb
;
4317 ce_info
.then_bb
= then_edge
->dest
;
4318 ce_info
.else_bb
= else_edge
->dest
;
4319 ce_info
.pass
= pass
;
4321 #ifdef IFCVT_MACHDEP_INIT
4322 IFCVT_MACHDEP_INIT (&ce_info
);
4325 if (!reload_completed
4326 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4329 if (reload_completed
4330 && targetm
.have_conditional_execution ()
4331 && cond_exec_find_if_block (&ce_info
))
4334 if (targetm
.have_trap ()
4335 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4336 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4339 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4340 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4342 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4344 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4352 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4353 /* Set this so we continue looking. */
4354 cond_exec_changed_p
= TRUE
;
4355 return ce_info
.test_bb
;
4358 /* Return true if a block has two edges, one of which falls through to the next
4359 block, and the other jumps to a specific block, so that we can tell if the
4360 block is part of an && test or an || test. Returns either -1 or the number
4361 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4364 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4367 int fallthru_p
= FALSE
;
4374 if (!cur_bb
|| !target_bb
)
4377 /* If no edges, obviously it doesn't jump or fallthru. */
4378 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4381 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4383 if (cur_edge
->flags
& EDGE_COMPLEX
)
4384 /* Anything complex isn't what we want. */
4387 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4390 else if (cur_edge
->dest
== target_bb
)
4397 if ((jump_p
& fallthru_p
) == 0)
4400 /* Don't allow calls in the block, since this is used to group && and ||
4401 together for conditional execution support. ??? we should support
4402 conditional execution support across calls for IA-64 some day, but
4403 for now it makes the code simpler. */
4404 end
= BB_END (cur_bb
);
4405 insn
= BB_HEAD (cur_bb
);
4407 while (insn
!= NULL_RTX
)
4414 && !DEBUG_INSN_P (insn
)
4415 && GET_CODE (PATTERN (insn
)) != USE
4416 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4422 insn
= NEXT_INSN (insn
);
4428 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4429 block. If so, we'll try to convert the insns to not require the branch.
4430 Return TRUE if we were successful at converting the block. */
4433 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4435 basic_block test_bb
= ce_info
->test_bb
;
4436 basic_block then_bb
= ce_info
->then_bb
;
4437 basic_block else_bb
= ce_info
->else_bb
;
4438 basic_block join_bb
= NULL_BLOCK
;
4443 ce_info
->last_test_bb
= test_bb
;
4445 /* We only ever should get here after reload,
4446 and if we have conditional execution. */
4447 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4449 /* Discover if any fall through predecessors of the current test basic block
4450 were && tests (which jump to the else block) or || tests (which jump to
4452 if (single_pred_p (test_bb
)
4453 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4455 basic_block bb
= single_pred (test_bb
);
4456 basic_block target_bb
;
4457 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4460 /* Determine if the preceding block is an && or || block. */
4461 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4463 ce_info
->and_and_p
= TRUE
;
4464 target_bb
= else_bb
;
4466 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4468 ce_info
->and_and_p
= FALSE
;
4469 target_bb
= then_bb
;
4472 target_bb
= NULL_BLOCK
;
4474 if (target_bb
&& n_insns
<= max_insns
)
4476 int total_insns
= 0;
4479 ce_info
->last_test_bb
= test_bb
;
4481 /* Found at least one && or || block, look for more. */
4484 ce_info
->test_bb
= test_bb
= bb
;
4485 total_insns
+= n_insns
;
4488 if (!single_pred_p (bb
))
4491 bb
= single_pred (bb
);
4492 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4494 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4496 ce_info
->num_multiple_test_blocks
= blocks
;
4497 ce_info
->num_multiple_test_insns
= total_insns
;
4499 if (ce_info
->and_and_p
)
4500 ce_info
->num_and_and_blocks
= blocks
;
4502 ce_info
->num_or_or_blocks
= blocks
;
4506 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4507 other than any || blocks which jump to the THEN block. */
4508 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4511 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4512 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4514 if (cur_edge
->flags
& EDGE_COMPLEX
)
4518 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4520 if (cur_edge
->flags
& EDGE_COMPLEX
)
4524 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4525 if (EDGE_COUNT (then_bb
->succs
) > 0
4526 && (!single_succ_p (then_bb
)
4527 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4528 || (epilogue_completed
4529 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4532 /* If the THEN block has no successors, conditional execution can still
4533 make a conditional call. Don't do this unless the ELSE block has
4534 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4535 Check for the last insn of the THEN block being an indirect jump, which
4536 is listed as not having any successors, but confuses the rest of the CE
4537 code processing. ??? we should fix this in the future. */
4538 if (EDGE_COUNT (then_bb
->succs
) == 0)
4540 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4542 rtx_insn
*last_insn
= BB_END (then_bb
);
4545 && NOTE_P (last_insn
)
4546 && last_insn
!= BB_HEAD (then_bb
))
4547 last_insn
= PREV_INSN (last_insn
);
4550 && JUMP_P (last_insn
)
4551 && ! simplejump_p (last_insn
))
4555 else_bb
= NULL_BLOCK
;
4561 /* If the THEN block's successor is the other edge out of the TEST block,
4562 then we have an IF-THEN combo without an ELSE. */
4563 else if (single_succ (then_bb
) == else_bb
)
4566 else_bb
= NULL_BLOCK
;
4569 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4570 has exactly one predecessor and one successor, and the outgoing edge
4571 is not complex, then we have an IF-THEN-ELSE combo. */
4572 else if (single_succ_p (else_bb
)
4573 && single_succ (then_bb
) == single_succ (else_bb
)
4574 && single_pred_p (else_bb
)
4575 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4576 && !(epilogue_completed
4577 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4578 join_bb
= single_succ (else_bb
);
4580 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4584 num_possible_if_blocks
++;
4589 "\nIF-THEN%s block found, pass %d, start block %d "
4590 "[insn %d], then %d [%d]",
4591 (else_bb
) ? "-ELSE" : "",
4594 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4596 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4599 fprintf (dump_file
, ", else %d [%d]",
4601 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4603 fprintf (dump_file
, ", join %d [%d]",
4605 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4607 if (ce_info
->num_multiple_test_blocks
> 0)
4608 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4609 ce_info
->num_multiple_test_blocks
,
4610 (ce_info
->and_and_p
) ? "&&" : "||",
4611 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4612 ce_info
->last_test_bb
->index
,
4613 ((BB_HEAD (ce_info
->last_test_bb
))
4614 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4617 fputc ('\n', dump_file
);
4620 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4621 first condition for free, since we've already asserted that there's a
4622 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4623 we checked the FALLTHRU flag, those are already adjacent to the last IF
4625 /* ??? As an enhancement, move the ELSE block. Have to deal with
4626 BLOCK notes, if by no other means than backing out the merge if they
4627 exist. Sticky enough I don't want to think about it now. */
4629 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4631 if ((next
= next
->next_bb
) != join_bb
4632 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4640 /* Do the real work. */
4642 ce_info
->else_bb
= else_bb
;
4643 ce_info
->join_bb
= join_bb
;
4645 /* If we have && and || tests, try to first handle combining the && and ||
4646 tests into the conditional code, and if that fails, go back and handle
4647 it without the && and ||, which at present handles the && case if there
4648 was no ELSE block. */
4649 if (cond_exec_process_if_block (ce_info
, TRUE
))
4652 if (ce_info
->num_multiple_test_blocks
)
4656 if (cond_exec_process_if_block (ce_info
, FALSE
))
4663 /* Convert a branch over a trap, or a branch
4664 to a trap, into a conditional trap. */
4667 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4669 basic_block then_bb
= then_edge
->dest
;
4670 basic_block else_bb
= else_edge
->dest
;
4671 basic_block other_bb
, trap_bb
;
4672 rtx_insn
*trap
, *jump
;
4674 rtx_insn
*cond_earliest
;
4676 /* Locate the block with the trap instruction. */
4677 /* ??? While we look for no successors, we really ought to allow
4678 EH successors. Need to fix merge_if_block for that to work. */
4679 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4680 trap_bb
= then_bb
, other_bb
= else_bb
;
4681 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4682 trap_bb
= else_bb
, other_bb
= then_bb
;
4688 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4689 test_bb
->index
, trap_bb
->index
);
4692 /* If this is not a standard conditional jump, we can't parse it. */
4693 jump
= BB_END (test_bb
);
4694 cond
= noce_get_condition (jump
, &cond_earliest
, then_bb
== trap_bb
);
4698 /* If the conditional jump is more than just a conditional jump, then
4699 we can not do if-conversion on this block. Give up for returnjump_p,
4700 changing a conditional return followed by unconditional trap for
4701 conditional trap followed by unconditional return is likely not
4702 beneficial and harder to handle. */
4703 if (! onlyjump_p (jump
) || returnjump_p (jump
))
4706 /* We must be comparing objects whose modes imply the size. */
4707 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4710 /* Attempt to generate the conditional trap. */
4711 rtx_insn
*seq
= gen_cond_trap (GET_CODE (cond
), copy_rtx (XEXP (cond
, 0)),
4712 copy_rtx (XEXP (cond
, 1)),
4713 TRAP_CODE (PATTERN (trap
)));
4717 /* If that results in an invalid insn, back out. */
4718 for (rtx_insn
*x
= seq
; x
; x
= NEXT_INSN (x
))
4719 if (recog_memoized (x
) < 0)
4722 /* Emit the new insns before cond_earliest. */
4723 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4725 /* Delete the trap block if possible. */
4726 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4727 df_set_bb_dirty (test_bb
);
4728 df_set_bb_dirty (then_bb
);
4729 df_set_bb_dirty (else_bb
);
4731 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4733 delete_basic_block (trap_bb
);
4737 /* Wire together the blocks again. */
4738 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4739 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4740 else if (trap_bb
== then_bb
)
4742 rtx lab
= JUMP_LABEL (jump
);
4743 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4744 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4745 LABEL_NUSES (lab
) += 1;
4746 JUMP_LABEL (newjump
) = lab
;
4747 emit_barrier_after (newjump
);
4751 if (can_merge_blocks_p (test_bb
, other_bb
))
4753 merge_blocks (test_bb
, other_bb
);
4757 num_updated_if_blocks
++;
4761 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4765 block_has_only_trap (basic_block bb
)
4769 /* We're not the exit block. */
4770 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4773 /* The block must have no successors. */
4774 if (EDGE_COUNT (bb
->succs
) > 0)
4777 /* The only instruction in the THEN block must be the trap. */
4778 trap
= first_active_insn (bb
);
4779 if (! (trap
== BB_END (bb
)
4780 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4781 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4787 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4788 transformable, but not necessarily the other. There need be no
4791 Return TRUE if we were successful at converting the block.
4793 Cases we'd like to look at:
4796 if (test) goto over; // x not live
4804 if (! test) goto label;
4807 if (test) goto E; // x not live
4821 (3) // This one's really only interesting for targets that can do
4822 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4823 // it results in multiple branches on a cache line, which often
4824 // does not sit well with predictors.
4826 if (test1) goto E; // predicted not taken
4842 (A) Don't do (2) if the branch is predicted against the block we're
4843 eliminating. Do it anyway if we can eliminate a branch; this requires
4844 that the sole successor of the eliminated block postdominate the other
4847 (B) With CE, on (3) we can steal from both sides of the if, creating
4856 Again, this is most useful if J postdominates.
4858 (C) CE substitutes for helpful life information.
4860 (D) These heuristics need a lot of work. */
4862 /* Tests for case 1 above. */
4865 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4867 basic_block then_bb
= then_edge
->dest
;
4868 basic_block else_bb
= else_edge
->dest
;
4870 int then_bb_index
, then_prob
;
4871 rtx else_target
= NULL_RTX
;
4873 /* If we are partitioning hot/cold basic blocks, we don't want to
4874 mess up unconditional or indirect jumps that cross between hot
4877 Basic block partitioning may result in some jumps that appear to
4878 be optimizable (or blocks that appear to be mergeable), but which really
4879 must be left untouched (they are required to make it safely across
4880 partition boundaries). See the comments at the top of
4881 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4883 if ((BB_END (then_bb
)
4884 && JUMP_P (BB_END (then_bb
))
4885 && CROSSING_JUMP_P (BB_END (then_bb
)))
4886 || (BB_END (test_bb
)
4887 && JUMP_P (BB_END (test_bb
))
4888 && CROSSING_JUMP_P (BB_END (test_bb
)))
4889 || (BB_END (else_bb
)
4890 && JUMP_P (BB_END (else_bb
))
4891 && CROSSING_JUMP_P (BB_END (else_bb
))))
4894 /* THEN has one successor. */
4895 if (!single_succ_p (then_bb
))
4898 /* THEN does not fall through, but is not strange either. */
4899 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4902 /* THEN has one predecessor. */
4903 if (!single_pred_p (then_bb
))
4906 /* THEN must do something. */
4907 if (forwarder_block_p (then_bb
))
4910 num_possible_if_blocks
++;
4913 "\nIF-CASE-1 found, start %d, then %d\n",
4914 test_bb
->index
, then_bb
->index
);
4916 if (then_edge
->probability
)
4917 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4919 then_prob
= REG_BR_PROB_BASE
/ 2;
4921 /* We're speculating from the THEN path, we want to make sure the cost
4922 of speculation is within reason. */
4923 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4924 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4925 predictable_edge_p (then_edge
)))))
4928 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4930 rtx_insn
*jump
= BB_END (else_edge
->src
);
4931 gcc_assert (JUMP_P (jump
));
4932 else_target
= JUMP_LABEL (jump
);
4935 /* Registers set are dead, or are predicable. */
4936 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4937 single_succ_edge (then_bb
), 1))
4940 /* Conversion went ok, including moving the insns and fixing up the
4941 jump. Adjust the CFG to match. */
4943 /* We can avoid creating a new basic block if then_bb is immediately
4944 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4945 through to else_bb. */
4947 if (then_bb
->next_bb
== else_bb
4948 && then_bb
->prev_bb
== test_bb
4949 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4951 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4954 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4955 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4956 else_bb
, else_target
);
4958 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4961 df_set_bb_dirty (test_bb
);
4962 df_set_bb_dirty (else_bb
);
4964 then_bb_index
= then_bb
->index
;
4965 delete_basic_block (then_bb
);
4967 /* Make rest of code believe that the newly created block is the THEN_BB
4968 block we removed. */
4971 df_bb_replace (then_bb_index
, new_bb
);
4972 /* This should have been done above via force_nonfallthru_and_redirect
4973 (possibly called from redirect_edge_and_branch_force). */
4974 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4978 num_updated_if_blocks
++;
4982 /* Test for case 2 above. */
4985 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4987 basic_block then_bb
= then_edge
->dest
;
4988 basic_block else_bb
= else_edge
->dest
;
4990 int then_prob
, else_prob
;
4992 /* We do not want to speculate (empty) loop latches. */
4994 && else_bb
->loop_father
->latch
== else_bb
)
4997 /* If we are partitioning hot/cold basic blocks, we don't want to
4998 mess up unconditional or indirect jumps that cross between hot
5001 Basic block partitioning may result in some jumps that appear to
5002 be optimizable (or blocks that appear to be mergeable), but which really
5003 must be left untouched (they are required to make it safely across
5004 partition boundaries). See the comments at the top of
5005 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
5007 if ((BB_END (then_bb
)
5008 && JUMP_P (BB_END (then_bb
))
5009 && CROSSING_JUMP_P (BB_END (then_bb
)))
5010 || (BB_END (test_bb
)
5011 && JUMP_P (BB_END (test_bb
))
5012 && CROSSING_JUMP_P (BB_END (test_bb
)))
5013 || (BB_END (else_bb
)
5014 && JUMP_P (BB_END (else_bb
))
5015 && CROSSING_JUMP_P (BB_END (else_bb
))))
5018 /* ELSE has one successor. */
5019 if (!single_succ_p (else_bb
))
5022 else_succ
= single_succ_edge (else_bb
);
5024 /* ELSE outgoing edge is not complex. */
5025 if (else_succ
->flags
& EDGE_COMPLEX
)
5028 /* ELSE has one predecessor. */
5029 if (!single_pred_p (else_bb
))
5032 /* THEN is not EXIT. */
5033 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
5036 if (else_edge
->probability
)
5038 else_prob
= else_edge
->probability
;
5039 then_prob
= REG_BR_PROB_BASE
- else_prob
;
5043 else_prob
= REG_BR_PROB_BASE
/ 2;
5044 then_prob
= REG_BR_PROB_BASE
/ 2;
5047 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
5048 if (else_prob
> then_prob
)
5050 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
5051 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
5057 num_possible_if_blocks
++;
5060 "\nIF-CASE-2 found, start %d, else %d\n",
5061 test_bb
->index
, else_bb
->index
);
5063 /* We're speculating from the ELSE path, we want to make sure the cost
5064 of speculation is within reason. */
5065 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
5066 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
5067 predictable_edge_p (else_edge
)))))
5070 /* Registers set are dead, or are predicable. */
5071 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
5074 /* Conversion went ok, including moving the insns and fixing up the
5075 jump. Adjust the CFG to match. */
5077 df_set_bb_dirty (test_bb
);
5078 df_set_bb_dirty (then_bb
);
5079 delete_basic_block (else_bb
);
5082 num_updated_if_blocks
++;
5084 /* ??? We may now fallthru from one of THEN's successors into a join
5085 block. Rerun cleanup_cfg? Examine things manually? Wait? */
5090 /* Used by the code above to perform the actual rtl transformations.
5091 Return TRUE if successful.
5093 TEST_BB is the block containing the conditional branch. MERGE_BB
5094 is the block containing the code to manipulate. DEST_EDGE is an
5095 edge representing a jump to the join block; after the conversion,
5096 TEST_BB should be branching to its destination.
5097 REVERSEP is true if the sense of the branch should be reversed. */
5100 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
5101 basic_block other_bb
, edge dest_edge
, int reversep
)
5103 basic_block new_dest
= dest_edge
->dest
;
5104 rtx_insn
*head
, *end
, *jump
;
5105 rtx_insn
*earliest
= NULL
;
5107 bitmap merge_set
= NULL
;
5108 /* Number of pending changes. */
5109 int n_validated_changes
= 0;
5110 rtx new_dest_label
= NULL_RTX
;
5112 jump
= BB_END (test_bb
);
5114 /* Find the extent of the real code in the merge block. */
5115 head
= BB_HEAD (merge_bb
);
5116 end
= BB_END (merge_bb
);
5118 while (DEBUG_INSN_P (end
) && end
!= head
)
5119 end
= PREV_INSN (end
);
5121 /* If merge_bb ends with a tablejump, predicating/moving insn's
5122 into test_bb and then deleting merge_bb will result in the jumptable
5123 that follows merge_bb being removed along with merge_bb and then we
5124 get an unresolved reference to the jumptable. */
5125 if (tablejump_p (end
, NULL
, NULL
))
5129 head
= NEXT_INSN (head
);
5130 while (DEBUG_INSN_P (head
) && head
!= end
)
5131 head
= NEXT_INSN (head
);
5139 head
= NEXT_INSN (head
);
5140 while (DEBUG_INSN_P (head
) && head
!= end
)
5141 head
= NEXT_INSN (head
);
5146 if (!onlyjump_p (end
))
5153 end
= PREV_INSN (end
);
5154 while (DEBUG_INSN_P (end
) && end
!= head
)
5155 end
= PREV_INSN (end
);
5158 /* Don't move frame-related insn across the conditional branch. This
5159 can lead to one of the paths of the branch having wrong unwind info. */
5160 if (epilogue_completed
)
5162 rtx_insn
*insn
= head
;
5165 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5169 insn
= NEXT_INSN (insn
);
5173 /* Disable handling dead code by conditional execution if the machine needs
5174 to do anything funny with the tests, etc. */
5175 #ifndef IFCVT_MODIFY_TESTS
5176 if (targetm
.have_conditional_execution ())
5178 /* In the conditional execution case, we have things easy. We know
5179 the condition is reversible. We don't have to check life info
5180 because we're going to conditionally execute the code anyway.
5181 All that's left is making sure the insns involved can actually
5186 cond
= cond_exec_get_condition (jump
);
5190 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5191 int prob_val
= (note
? XINT (note
, 0) : -1);
5195 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5198 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5201 prob_val
= REG_BR_PROB_BASE
- prob_val
;
5204 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5205 && verify_changes (0))
5206 n_validated_changes
= num_validated_changes ();
5214 /* If we allocated new pseudos (e.g. in the conditional move
5215 expander called from noce_emit_cmove), we must resize the
5217 if (max_regno
< max_reg_num ())
5218 max_regno
= max_reg_num ();
5220 /* Try the NCE path if the CE path did not result in any changes. */
5221 if (n_validated_changes
== 0)
5228 /* In the non-conditional execution case, we have to verify that there
5229 are no trapping operations, no calls, no references to memory, and
5230 that any registers modified are dead at the branch site. */
5232 if (!any_condjump_p (jump
))
5235 /* Find the extent of the conditional. */
5236 cond
= noce_get_condition (jump
, &earliest
, false);
5240 live
= BITMAP_ALLOC (®_obstack
);
5241 simulate_backwards_to_point (merge_bb
, live
, end
);
5242 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5244 df_get_live_in (other_bb
), NULL
);
5249 /* Collect the set of registers set in MERGE_BB. */
5250 merge_set
= BITMAP_ALLOC (®_obstack
);
5252 FOR_BB_INSNS (merge_bb
, insn
)
5253 if (NONDEBUG_INSN_P (insn
))
5254 df_simulate_find_defs (insn
, merge_set
);
5256 /* If shrink-wrapping, disable this optimization when test_bb is
5257 the first basic block and merge_bb exits. The idea is to not
5258 move code setting up a return register as that may clobber a
5259 register used to pass function parameters, which then must be
5260 saved in caller-saved regs. A caller-saved reg requires the
5261 prologue, killing a shrink-wrap opportunity. */
5262 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5263 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5264 && single_succ_p (new_dest
)
5265 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5266 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5271 return_regs
= BITMAP_ALLOC (®_obstack
);
5273 /* Start off with the intersection of regs used to pass
5274 params and regs used to return values. */
5275 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5276 if (FUNCTION_ARG_REGNO_P (i
)
5277 && targetm
.calls
.function_value_regno_p (i
))
5278 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5280 bitmap_and_into (return_regs
,
5281 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5282 bitmap_and_into (return_regs
,
5283 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5284 if (!bitmap_empty_p (return_regs
))
5286 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5287 if (NONDEBUG_INSN_P (insn
))
5291 /* If this insn sets any reg in return_regs, add all
5292 reg uses to the set of regs we're interested in. */
5293 FOR_EACH_INSN_DEF (def
, insn
)
5294 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5296 df_simulate_uses (insn
, return_regs
);
5300 if (bitmap_intersect_p (merge_set
, return_regs
))
5302 BITMAP_FREE (return_regs
);
5303 BITMAP_FREE (merge_set
);
5307 BITMAP_FREE (return_regs
);
5312 /* We don't want to use normal invert_jump or redirect_jump because
5313 we don't want to delete_insn called. Also, we want to do our own
5314 change group management. */
5316 old_dest
= JUMP_LABEL (jump
);
5317 if (other_bb
!= new_dest
)
5319 if (!any_condjump_p (jump
))
5322 if (JUMP_P (BB_END (dest_edge
->src
)))
5323 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5324 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5325 new_dest_label
= ret_rtx
;
5327 new_dest_label
= block_label (new_dest
);
5329 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5331 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5332 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5336 if (verify_changes (n_validated_changes
))
5337 confirm_change_group ();
5341 if (other_bb
!= new_dest
)
5343 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5346 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5349 std::swap (BRANCH_EDGE (test_bb
)->count
,
5350 FALLTHRU_EDGE (test_bb
)->count
);
5351 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5352 FALLTHRU_EDGE (test_bb
)->probability
);
5353 update_br_prob_note (test_bb
);
5357 /* Move the insns out of MERGE_BB to before the branch. */
5362 if (end
== BB_END (merge_bb
))
5363 BB_END (merge_bb
) = PREV_INSN (head
);
5365 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5366 notes being moved might become invalid. */
5372 if (! INSN_P (insn
))
5374 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5377 remove_note (insn
, note
);
5378 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5380 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5381 notes referring to the registers being set might become invalid. */
5387 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5388 remove_reg_equal_equiv_notes_for_regno (i
);
5390 BITMAP_FREE (merge_set
);
5393 reorder_insns (head
, end
, PREV_INSN (earliest
));
5396 /* Remove the jump and edge if we can. */
5397 if (other_bb
== new_dest
)
5400 remove_edge (BRANCH_EDGE (test_bb
));
5401 /* ??? Can't merge blocks here, as then_bb is still in use.
5402 At minimum, the merge will get done just before bb-reorder. */
5411 BITMAP_FREE (merge_set
);
5416 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5417 we are after combine pass. */
5420 if_convert (bool after_combine
)
5427 df_live_add_problem ();
5428 df_live_set_all_dirty ();
5431 /* Record whether we are after combine pass. */
5432 ifcvt_after_combine
= after_combine
;
5433 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5434 != CODE_FOR_nothing
);
5435 num_possible_if_blocks
= 0;
5436 num_updated_if_blocks
= 0;
5437 num_true_changes
= 0;
5439 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5440 mark_loop_exit_edges ();
5441 loop_optimizer_finalize ();
5442 free_dominance_info (CDI_DOMINATORS
);
5444 /* Compute postdominators. */
5445 calculate_dominance_info (CDI_POST_DOMINATORS
);
5447 df_set_flags (DF_LR_RUN_DCE
);
5449 /* Go through each of the basic blocks looking for things to convert. If we
5450 have conditional execution, we make multiple passes to allow us to handle
5451 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5456 /* Only need to do dce on the first pass. */
5457 df_clear_flags (DF_LR_RUN_DCE
);
5458 cond_exec_changed_p
= FALSE
;
5461 #ifdef IFCVT_MULTIPLE_DUMPS
5462 if (dump_file
&& pass
> 1)
5463 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5466 FOR_EACH_BB_FN (bb
, cfun
)
5469 while (!df_get_bb_dirty (bb
)
5470 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5474 #ifdef IFCVT_MULTIPLE_DUMPS
5475 if (dump_file
&& cond_exec_changed_p
)
5476 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5479 while (cond_exec_changed_p
);
5481 #ifdef IFCVT_MULTIPLE_DUMPS
5483 fprintf (dump_file
, "\n\n========== no more changes\n");
5486 free_dominance_info (CDI_POST_DOMINATORS
);
5491 clear_aux_for_blocks ();
5493 /* If we allocated new pseudos, we must resize the array for sched1. */
5494 if (max_regno
< max_reg_num ())
5495 max_regno
= max_reg_num ();
5497 /* Write the final stats. */
5498 if (dump_file
&& num_possible_if_blocks
> 0)
5501 "\n%d possible IF blocks searched.\n",
5502 num_possible_if_blocks
);
5504 "%d IF blocks converted.\n",
5505 num_updated_if_blocks
);
5507 "%d true changes made.\n\n\n",
5512 df_remove_problem (df_live
);
5514 checking_verify_flow_info ();
5517 /* If-conversion and CFG cleanup. */
5519 rest_of_handle_if_conversion (void)
5521 if (flag_if_conversion
)
5525 dump_reg_info (dump_file
);
5526 dump_flow_info (dump_file
, dump_flags
);
5528 cleanup_cfg (CLEANUP_EXPENSIVE
);
5538 const pass_data pass_data_rtl_ifcvt
=
5540 RTL_PASS
, /* type */
5542 OPTGROUP_NONE
, /* optinfo_flags */
5543 TV_IFCVT
, /* tv_id */
5544 0, /* properties_required */
5545 0, /* properties_provided */
5546 0, /* properties_destroyed */
5547 0, /* todo_flags_start */
5548 TODO_df_finish
, /* todo_flags_finish */
5551 class pass_rtl_ifcvt
: public rtl_opt_pass
5554 pass_rtl_ifcvt (gcc::context
*ctxt
)
5555 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5558 /* opt_pass methods: */
5559 virtual bool gate (function
*)
5561 return (optimize
> 0) && dbg_cnt (if_conversion
);
5564 virtual unsigned int execute (function
*)
5566 return rest_of_handle_if_conversion ();
5569 }; // class pass_rtl_ifcvt
5574 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5576 return new pass_rtl_ifcvt (ctxt
);
5580 /* Rerun if-conversion, as combine may have simplified things enough
5581 to now meet sequence length restrictions. */
5585 const pass_data pass_data_if_after_combine
=
5587 RTL_PASS
, /* type */
5589 OPTGROUP_NONE
, /* optinfo_flags */
5590 TV_IFCVT
, /* tv_id */
5591 0, /* properties_required */
5592 0, /* properties_provided */
5593 0, /* properties_destroyed */
5594 0, /* todo_flags_start */
5595 TODO_df_finish
, /* todo_flags_finish */
5598 class pass_if_after_combine
: public rtl_opt_pass
5601 pass_if_after_combine (gcc::context
*ctxt
)
5602 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5605 /* opt_pass methods: */
5606 virtual bool gate (function
*)
5608 return optimize
> 0 && flag_if_conversion
5609 && dbg_cnt (if_after_combine
);
5612 virtual unsigned int execute (function
*)
5618 }; // class pass_if_after_combine
5623 make_pass_if_after_combine (gcc::context
*ctxt
)
5625 return new pass_if_after_combine (ctxt
);
5631 const pass_data pass_data_if_after_reload
=
5633 RTL_PASS
, /* type */
5635 OPTGROUP_NONE
, /* optinfo_flags */
5636 TV_IFCVT2
, /* tv_id */
5637 0, /* properties_required */
5638 0, /* properties_provided */
5639 0, /* properties_destroyed */
5640 0, /* todo_flags_start */
5641 TODO_df_finish
, /* todo_flags_finish */
5644 class pass_if_after_reload
: public rtl_opt_pass
5647 pass_if_after_reload (gcc::context
*ctxt
)
5648 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5651 /* opt_pass methods: */
5652 virtual bool gate (function
*)
5654 return optimize
> 0 && flag_if_conversion2
5655 && dbg_cnt (if_after_reload
);
5658 virtual unsigned int execute (function
*)
5664 }; // class pass_if_after_reload
5669 make_pass_if_after_reload (gcc::context
*ctxt
)
5671 return new pass_if_after_reload (ctxt
);