gcc/simplify-rtx.c

   1 /* RTL simplification functions for GNU compiler.
   2    Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
   3    1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify it under
   8 the terms of the GNU General Public License as published by the Free
   9 Software Foundation; either version 2, or (at your option) any later
  10 version.
  11
  12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING.  If not, write to the Free
  19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  20 02111-1307, USA.  */
  21
  22
  23 #include "config.h"
  24 #include "system.h"
  25 #include "coretypes.h"
  26 #include "tm.h"
  27 #include "rtl.h"
  28 #include "tree.h"
  29 #include "tm_p.h"
  30 #include "regs.h"
  31 #include "hard-reg-set.h"
  32 #include "flags.h"
  33 #include "real.h"
  34 #include "insn-config.h"
  35 #include "recog.h"
  36 #include "function.h"
  37 #include "expr.h"
  38 #include "toplev.h"
  39 #include "output.h"
  40 #include "ggc.h"
  41 #include "target.h"
  42
  43 /* Simplification and canonicalization of RTL.  */
  44
  45 /* Much code operates on (low, high) pairs; the low value is an
  46    unsigned wide int, the high value a signed wide int.  We
  47    occasionally need to sign extend from low to high as if low were a
  48    signed wide int.  */
  49 #define HWI_SIGN_EXTEND(low) \
  50  ((((HOST_WIDE_INT) low) < 0) ? ((HOST_WIDE_INT) -1) : ((HOST_WIDE_INT) 0))
  51
  52 static rtx neg_const_int PARAMS ((enum machine_mode, rtx));
  53 static int simplify_plus_minus_op_data_cmp PARAMS ((const void *,
  54                                                     const void *));
  55 static rtx simplify_plus_minus          PARAMS ((enum rtx_code,
  56                                                  enum machine_mode, rtx,
  57                                                  rtx, int));
  58 \f
  59 /* Negate a CONST_INT rtx, truncating (because a conversion from a
  60    maximally negative number can overflow).  */
  61 static rtx
  62 neg_const_int (mode, i)
  63      enum machine_mode mode;
  64      rtx i;
  65 {
  66   return gen_int_mode (- INTVAL (i), mode);
  67 }
  68
  69 \f
  70 /* Make a binary operation by properly ordering the operands and
  71    seeing if the expression folds.  */
  72
  73 rtx
  74 simplify_gen_binary (code, mode, op0, op1)
  75      enum rtx_code code;
  76      enum machine_mode mode;
  77      rtx op0, op1;
  78 {
  79   rtx tem;
  80
  81   /* Put complex operands first and constants second if commutative.  */
  82   if (GET_RTX_CLASS (code) == 'c'
  83       && swap_commutative_operands_p (op0, op1))
  84     tem = op0, op0 = op1, op1 = tem;
  85
  86   /* If this simplifies, do it.  */
  87   tem = simplify_binary_operation (code, mode, op0, op1);
  88   if (tem)
  89     return tem;
  90
  91   /* Handle addition and subtraction specially.  Otherwise, just form
  92      the operation.  */
  93
  94   if (code == PLUS || code == MINUS)
  95     {
  96       tem = simplify_plus_minus (code, mode, op0, op1, 1);
  97       if (tem)
  98         return tem;
  99     }
 100
 101   return gen_rtx_fmt_ee (code, mode, op0, op1);
 102 }
 103 \f
 104 /* If X is a MEM referencing the constant pool, return the real value.
 105    Otherwise return X.  */
 106 rtx
 107 avoid_constant_pool_reference (x)
 108      rtx x;
 109 {
 110   rtx c, tmp, addr;
 111   enum machine_mode cmode;
 112
 113   switch (GET_CODE (x))
 114     {
 115     case MEM:
 116       break;
 117
 118     case FLOAT_EXTEND:
 119       /* Handle float extensions of constant pool references.  */
 120       tmp = XEXP (x, 0);
 121       c = avoid_constant_pool_reference (tmp);
 122       if (c != tmp && GET_CODE (c) == CONST_DOUBLE)
 123         {
 124           REAL_VALUE_TYPE d;
 125
 126           REAL_VALUE_FROM_CONST_DOUBLE (d, c);
 127           return CONST_DOUBLE_FROM_REAL_VALUE (d, GET_MODE (x));
 128         }
 129       return x;
 130
 131     default:
 132       return x;
 133     }
 134
 135   addr = XEXP (x, 0);
 136
 137   /* Call target hook to avoid the effects of -fpic etc...  */
 138   addr = (*targetm.delegitimize_address) (addr);
 139
 140   if (GET_CODE (addr) == LO_SUM)
 141     addr = XEXP (addr, 1);
 142
 143   if (GET_CODE (addr) != SYMBOL_REF
 144       || ! CONSTANT_POOL_ADDRESS_P (addr))
 145     return x;
 146
 147   c = get_pool_constant (addr);
 148   cmode = get_pool_mode (addr);
 149
 150   /* If we're accessing the constant in a different mode than it was
 151      originally stored, attempt to fix that up via subreg simplifications.
 152      If that fails we have no choice but to return the original memory.  */
 153   if (cmode != GET_MODE (x))
 154     {
 155       c = simplify_subreg (GET_MODE (x), c, cmode, 0);
 156       return c ? c : x;
 157     }
 158
 159   return c;
 160 }
 161 \f
 162 /* Make a unary operation by first seeing if it folds and otherwise making
 163    the specified operation.  */
 164
 165 rtx
 166 simplify_gen_unary (code, mode, op, op_mode)
 167      enum rtx_code code;
 168      enum machine_mode mode;
 169      rtx op;
 170      enum machine_mode op_mode;
 171 {
 172   rtx tem;
 173
 174   /* If this simplifies, use it.  */
 175   if ((tem = simplify_unary_operation (code, mode, op, op_mode)) != 0)
 176     return tem;
 177
 178   return gen_rtx_fmt_e (code, mode, op);
 179 }
 180
 181 /* Likewise for ternary operations.  */
 182
 183 rtx
 184 simplify_gen_ternary (code, mode, op0_mode, op0, op1, op2)
 185      enum rtx_code code;
 186      enum machine_mode mode, op0_mode;
 187      rtx op0, op1, op2;
 188 {
 189   rtx tem;
 190
 191   /* If this simplifies, use it.  */
 192   if (0 != (tem = simplify_ternary_operation (code, mode, op0_mode,
 193                                               op0, op1, op2)))
 194     return tem;
 195
 196   return gen_rtx_fmt_eee (code, mode, op0, op1, op2);
 197 }
 198 \f
 199 /* Likewise, for relational operations.
 200    CMP_MODE specifies mode comparison is done in.
 201   */
 202
 203 rtx
 204 simplify_gen_relational (code, mode, cmp_mode, op0, op1)
 205      enum rtx_code code;
 206      enum machine_mode mode;
 207      enum machine_mode cmp_mode;
 208      rtx op0, op1;
 209 {
 210   rtx tem;
 211
 212   if ((tem = simplify_relational_operation (code, cmp_mode, op0, op1)) != 0)
 213     return tem;
 214
 215   /* For the following tests, ensure const0_rtx is op1.  */
 216   if (op0 == const0_rtx && swap_commutative_operands_p (op0, op1))
 217     tem = op0, op0 = op1, op1 = tem, code = swap_condition (code);
 218
 219   /* If op0 is a compare, extract the comparison arguments from it.  */
 220   if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
 221     op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
 222
 223   /* If op0 is a comparison, extract the comparison arguments form it.  */
 224   if (code == NE && op1 == const0_rtx
 225       && GET_RTX_CLASS (GET_CODE (op0)) == '<')
 226     return op0;
 227   else if (code == EQ && op1 == const0_rtx)
 228     {
 229       /* The following tests GET_RTX_CLASS (GET_CODE (op0)) == '<'.  */
 230       enum rtx_code new = reversed_comparison_code (op0, NULL_RTX);
 231       if (new != UNKNOWN)
 232         {
 233           code = new;
 234           mode = cmp_mode;
 235           op1 = XEXP (op0, 1);
 236           op0 = XEXP (op0, 0);
 237         }
 238     }
 239
 240   /* Put complex operands first and constants second.  */
 241   if (swap_commutative_operands_p (op0, op1))
 242     tem = op0, op0 = op1, op1 = tem, code = swap_condition (code);
 243
 244   return gen_rtx_fmt_ee (code, mode, op0, op1);
 245 }
 246 \f
 247 /* Replace all occurrences of OLD in X with NEW and try to simplify the
 248    resulting RTX.  Return a new RTX which is as simplified as possible.  */
 249
 250 rtx
 251 simplify_replace_rtx (x, old, new)
 252      rtx x;
 253      rtx old;
 254      rtx new;
 255 {
 256   enum rtx_code code = GET_CODE (x);
 257   enum machine_mode mode = GET_MODE (x);
 258
 259   /* If X is OLD, return NEW.  Otherwise, if this is an expression, try
 260      to build a new expression substituting recursively.  If we can't do
 261      anything, return our input.  */
 262
 263   if (x == old)
 264     return new;
 265
 266   switch (GET_RTX_CLASS (code))
 267     {
 268     case '1':
 269       {
 270         enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
 271         rtx op = (XEXP (x, 0) == old
 272                   ? new : simplify_replace_rtx (XEXP (x, 0), old, new));
 273
 274         return simplify_gen_unary (code, mode, op, op_mode);
 275       }
 276
 277     case '2':
 278     case 'c':
 279       return
 280         simplify_gen_binary (code, mode,
 281                              simplify_replace_rtx (XEXP (x, 0), old, new),
 282                              simplify_replace_rtx (XEXP (x, 1), old, new));
 283     case '<':
 284       {
 285         enum machine_mode op_mode = (GET_MODE (XEXP (x, 0)) != VOIDmode
 286                                      ? GET_MODE (XEXP (x, 0))
 287                                      : GET_MODE (XEXP (x, 1)));
 288         rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
 289         rtx op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
 290
 291         return
 292           simplify_gen_relational (code, mode,
 293                                    (op_mode != VOIDmode
 294                                     ? op_mode
 295                                     : GET_MODE (op0) != VOIDmode
 296                                     ? GET_MODE (op0)
 297                                     : GET_MODE (op1)),
 298                                    op0, op1);
 299       }
 300
 301     case '3':
 302     case 'b':
 303       {
 304         enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
 305         rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
 306
 307         return
 308           simplify_gen_ternary (code, mode,
 309                                 (op_mode != VOIDmode
 310                                  ? op_mode
 311                                  : GET_MODE (op0)),
 312                                 op0,
 313                                 simplify_replace_rtx (XEXP (x, 1), old, new),
 314                                 simplify_replace_rtx (XEXP (x, 2), old, new));
 315       }
 316
 317     case 'x':
 318       /* The only case we try to handle is a SUBREG.  */
 319       if (code == SUBREG)
 320         {
 321           rtx exp;
 322           exp = simplify_gen_subreg (GET_MODE (x),
 323                                      simplify_replace_rtx (SUBREG_REG (x),
 324                                                            old, new),
 325                                      GET_MODE (SUBREG_REG (x)),
 326                                      SUBREG_BYTE (x));
 327           if (exp)
 328            x = exp;
 329         }
 330       return x;
 331
 332     case 'o':
 333       if (code == MEM)
 334         return replace_equiv_address_nv (x,
 335                                          simplify_replace_rtx (XEXP (x, 0),
 336                                                                old, new));
 337       else if (code == LO_SUM)
 338         {
 339           rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
 340           rtx op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
 341
 342           /* (lo_sum (high x) x) -> x  */
 343           if (GET_CODE (op0) == HIGH && rtx_equal_p (XEXP (op0, 0), op1))
 344             return op1;
 345
 346           return gen_rtx_LO_SUM (mode, op0, op1);
 347         }
 348       else if (code == REG)
 349         {
 350           if (REG_P (old) && REGNO (x) == REGNO (old))
 351             return new;
 352         }
 353
 354       return x;
 355
 356     default:
 357       return x;
 358     }
 359   return x;
 360 }
 361 \f
 362 /* Try to simplify a unary operation CODE whose output mode is to be
 363    MODE with input operand OP whose mode was originally OP_MODE.
 364    Return zero if no simplification can be made.  */
 365 rtx
 366 simplify_unary_operation (code, mode, op, op_mode)
 367      enum rtx_code code;
 368      enum machine_mode mode;
 369      rtx op;
 370      enum machine_mode op_mode;
 371 {
 372   unsigned int width = GET_MODE_BITSIZE (mode);
 373   rtx trueop = avoid_constant_pool_reference (op);
 374
 375   if (code == VEC_DUPLICATE)
 376     {
 377       if (!VECTOR_MODE_P (mode))
 378         abort ();
 379       if (GET_MODE (trueop) != VOIDmode
 380           && !VECTOR_MODE_P (GET_MODE (trueop))
 381           && GET_MODE_INNER (mode) != GET_MODE (trueop))
 382         abort ();
 383       if (GET_MODE (trueop) != VOIDmode
 384           && VECTOR_MODE_P (GET_MODE (trueop))
 385           && GET_MODE_INNER (mode) != GET_MODE_INNER (GET_MODE (trueop)))
 386         abort ();
 387       if (GET_CODE (trueop) == CONST_INT || GET_CODE (trueop) == CONST_DOUBLE
 388           || GET_CODE (trueop) == CONST_VECTOR)
 389         {
 390           int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
 391           unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
 392           rtvec v = rtvec_alloc (n_elts);
 393           unsigned int i;
 394
 395           if (GET_CODE (trueop) != CONST_VECTOR)
 396             for (i = 0; i < n_elts; i++)
 397               RTVEC_ELT (v, i) = trueop;
 398           else
 399             {
 400               enum machine_mode inmode = GET_MODE (trueop);
 401               int in_elt_size = GET_MODE_SIZE (GET_MODE_INNER (inmode));
 402               unsigned in_n_elts = (GET_MODE_SIZE (inmode) / in_elt_size);
 403
 404               if (in_n_elts >= n_elts || n_elts % in_n_elts)
 405                 abort ();
 406               for (i = 0; i < n_elts; i++)
 407                 RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop, i % in_n_elts);
 408             }
 409           return gen_rtx_CONST_VECTOR (mode, v);
 410         }
 411     }
 412
 413   if (VECTOR_MODE_P (mode) && GET_CODE (trueop) == CONST_VECTOR)
 414     {
 415       int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
 416       unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
 417       enum machine_mode opmode = GET_MODE (trueop);
 418       int op_elt_size = GET_MODE_SIZE (GET_MODE_INNER (opmode));
 419       unsigned op_n_elts = (GET_MODE_SIZE (opmode) / op_elt_size);
 420       rtvec v = rtvec_alloc (n_elts);
 421       unsigned int i;
 422
 423       if (op_n_elts != n_elts)
 424         abort ();
 425
 426       for (i = 0; i < n_elts; i++)
 427         {
 428           rtx x = simplify_unary_operation (code, GET_MODE_INNER (mode),
 429                                             CONST_VECTOR_ELT (trueop, i),
 430                                             GET_MODE_INNER (opmode));
 431           if (!x)
 432             return 0;
 433           RTVEC_ELT (v, i) = x;
 434         }
 435       return gen_rtx_CONST_VECTOR (mode, v);
 436     }
 437
 438   /* The order of these tests is critical so that, for example, we don't
 439      check the wrong mode (input vs. output) for a conversion operation,
 440      such as FIX.  At some point, this should be simplified.  */
 441
 442   if (code == FLOAT && GET_MODE (trueop) == VOIDmode
 443       && (GET_CODE (trueop) == CONST_DOUBLE || GET_CODE (trueop) == CONST_INT))
 444     {
 445       HOST_WIDE_INT hv, lv;
 446       REAL_VALUE_TYPE d;
 447
 448       if (GET_CODE (trueop) == CONST_INT)
 449         lv = INTVAL (trueop), hv = HWI_SIGN_EXTEND (lv);
 450       else
 451         lv = CONST_DOUBLE_LOW (trueop),  hv = CONST_DOUBLE_HIGH (trueop);
 452
 453       REAL_VALUE_FROM_INT (d, lv, hv, mode);
 454       d = real_value_truncate (mode, d);
 455       return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
 456     }
 457   else if (code == UNSIGNED_FLOAT && GET_MODE (trueop) == VOIDmode
 458            && (GET_CODE (trueop) == CONST_DOUBLE
 459                || GET_CODE (trueop) == CONST_INT))
 460     {
 461       HOST_WIDE_INT hv, lv;
 462       REAL_VALUE_TYPE d;
 463
 464       if (GET_CODE (trueop) == CONST_INT)
 465         lv = INTVAL (trueop), hv = HWI_SIGN_EXTEND (lv);
 466       else
 467         lv = CONST_DOUBLE_LOW (trueop),  hv = CONST_DOUBLE_HIGH (trueop);
 468
 469       if (op_mode == VOIDmode)
 470         {
 471           /* We don't know how to interpret negative-looking numbers in
 472              this case, so don't try to fold those.  */
 473           if (hv < 0)
 474             return 0;
 475         }
 476       else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
 477         ;
 478       else
 479         hv = 0, lv &= GET_MODE_MASK (op_mode);
 480
 481       REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
 482       d = real_value_truncate (mode, d);
 483       return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
 484     }
 485
 486   if (GET_CODE (trueop) == CONST_INT
 487       && width <= HOST_BITS_PER_WIDE_INT && width > 0)
 488     {
 489       HOST_WIDE_INT arg0 = INTVAL (trueop);
 490       HOST_WIDE_INT val;
 491
 492       switch (code)
 493         {
 494         case NOT:
 495           val = ~ arg0;
 496           break;
 497
 498         case NEG:
 499           val = - arg0;
 500           break;
 501
 502         case ABS:
 503           val = (arg0 >= 0 ? arg0 : - arg0);
 504           break;
 505
 506         case FFS:
 507           /* Don't use ffs here.  Instead, get low order bit and then its
 508              number.  If arg0 is zero, this will return 0, as desired.  */
 509           arg0 &= GET_MODE_MASK (mode);
 510           val = exact_log2 (arg0 & (- arg0)) + 1;
 511           break;
 512
 513         case CLZ:
 514           arg0 &= GET_MODE_MASK (mode);
 515           if (arg0 == 0 && CLZ_DEFINED_VALUE_AT_ZERO (mode, val))
 516             ;
 517           else
 518             val = GET_MODE_BITSIZE (mode) - floor_log2 (arg0) - 1;
 519           break;
 520
 521         case CTZ:
 522           arg0 &= GET_MODE_MASK (mode);
 523           if (arg0 == 0)
 524             {
 525               /* Even if the value at zero is undefined, we have to come
 526                  up with some replacement.  Seems good enough.  */
 527               if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, val))
 528                 val = GET_MODE_BITSIZE (mode);
 529             }
 530           else
 531             val = exact_log2 (arg0 & -arg0);
 532           break;
 533
 534         case POPCOUNT:
 535           arg0 &= GET_MODE_MASK (mode);
 536           val = 0;
 537           while (arg0)
 538             val++, arg0 &= arg0 - 1;
 539           break;
 540
 541         case PARITY:
 542           arg0 &= GET_MODE_MASK (mode);
 543           val = 0;
 544           while (arg0)
 545             val++, arg0 &= arg0 - 1;
 546           val &= 1;
 547           break;
 548
 549         case TRUNCATE:
 550           val = arg0;
 551           break;
 552
 553         case ZERO_EXTEND:
 554           /* When zero-extending a CONST_INT, we need to know its
 555              original mode.  */
 556           if (op_mode == VOIDmode)
 557             abort ();
 558           if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
 559             {
 560               /* If we were really extending the mode,
 561                  we would have to distinguish between zero-extension
 562                  and sign-extension.  */
 563               if (width != GET_MODE_BITSIZE (op_mode))
 564                 abort ();
 565               val = arg0;
 566             }
 567           else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
 568             val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
 569           else
 570             return 0;
 571           break;
 572
 573         case SIGN_EXTEND:
 574           if (op_mode == VOIDmode)
 575             op_mode = mode;
 576           if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
 577             {
 578               /* If we were really extending the mode,
 579                  we would have to distinguish between zero-extension
 580                  and sign-extension.  */
 581               if (width != GET_MODE_BITSIZE (op_mode))
 582                 abort ();
 583               val = arg0;
 584             }
 585           else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
 586             {
 587               val
 588                 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
 589               if (val
 590                   & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
 591                 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
 592             }
 593           else
 594             return 0;
 595           break;
 596
 597         case SQRT:
 598         case FLOAT_EXTEND:
 599         case FLOAT_TRUNCATE:
 600         case SS_TRUNCATE:
 601         case US_TRUNCATE:
 602           return 0;
 603
 604         default:
 605           abort ();
 606         }
 607
 608       val = trunc_int_for_mode (val, mode);
 609
 610       return GEN_INT (val);
 611     }
 612
 613   /* We can do some operations on integer CONST_DOUBLEs.  Also allow
 614      for a DImode operation on a CONST_INT.  */
 615   else if (GET_MODE (trueop) == VOIDmode
 616            && width <= HOST_BITS_PER_WIDE_INT * 2
 617            && (GET_CODE (trueop) == CONST_DOUBLE
 618                || GET_CODE (trueop) == CONST_INT))
 619     {
 620       unsigned HOST_WIDE_INT l1, lv;
 621       HOST_WIDE_INT h1, hv;
 622
 623       if (GET_CODE (trueop) == CONST_DOUBLE)
 624         l1 = CONST_DOUBLE_LOW (trueop), h1 = CONST_DOUBLE_HIGH (trueop);
 625       else
 626         l1 = INTVAL (trueop), h1 = HWI_SIGN_EXTEND (l1);
 627
 628       switch (code)
 629         {
 630         case NOT:
 631           lv = ~ l1;
 632           hv = ~ h1;
 633           break;
 634
 635         case NEG:
 636           neg_double (l1, h1, &lv, &hv);
 637           break;
 638
 639         case ABS:
 640           if (h1 < 0)
 641             neg_double (l1, h1, &lv, &hv);
 642           else
 643             lv = l1, hv = h1;
 644           break;
 645
 646         case FFS:
 647           hv = 0;
 648           if (l1 == 0)
 649             {
 650               if (h1 == 0)
 651                 lv = 0;
 652               else
 653                 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & -h1) + 1;
 654             }
 655           else
 656             lv = exact_log2 (l1 & -l1) + 1;
 657           break;
 658
 659         case CLZ:
 660           hv = 0;
 661           if (h1 == 0)
 662             lv = GET_MODE_BITSIZE (mode) - floor_log2 (l1) - 1;
 663           else
 664             lv = GET_MODE_BITSIZE (mode) - floor_log2 (h1) - 1
 665               - HOST_BITS_PER_WIDE_INT;
 666           break;
 667
 668         case CTZ:
 669           hv = 0;
 670           if (l1 == 0)
 671             {
 672               if (h1 == 0)
 673                 lv = GET_MODE_BITSIZE (mode);
 674               else
 675                 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & -h1);
 676             }
 677           else
 678             lv = exact_log2 (l1 & -l1);
 679           break;
 680
 681         case POPCOUNT:
 682           hv = 0;
 683           lv = 0;
 684           while (l1)
 685             lv++, l1 &= l1 - 1;
 686           while (h1)
 687             lv++, h1 &= h1 - 1;
 688           break;
 689
 690         case PARITY:
 691           hv = 0;
 692           lv = 0;
 693           while (l1)
 694             lv++, l1 &= l1 - 1;
 695           while (h1)
 696             lv++, h1 &= h1 - 1;
 697           lv &= 1;
 698           break;
 699
 700         case TRUNCATE:
 701           /* This is just a change-of-mode, so do nothing.  */
 702           lv = l1, hv = h1;
 703           break;
 704
 705         case ZERO_EXTEND:
 706           if (op_mode == VOIDmode)
 707             abort ();
 708
 709           if (GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
 710             return 0;
 711
 712           hv = 0;
 713           lv = l1 & GET_MODE_MASK (op_mode);
 714           break;
 715
 716         case SIGN_EXTEND:
 717           if (op_mode == VOIDmode
 718               || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
 719             return 0;
 720           else
 721             {
 722               lv = l1 & GET_MODE_MASK (op_mode);
 723               if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
 724                   && (lv & ((HOST_WIDE_INT) 1
 725                             << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
 726                 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
 727
 728               hv = HWI_SIGN_EXTEND (lv);
 729             }
 730           break;
 731
 732         case SQRT:
 733           return 0;
 734
 735         default:
 736           return 0;
 737         }
 738
 739       return immed_double_const (lv, hv, mode);
 740     }
 741
 742   else if (GET_CODE (trueop) == CONST_DOUBLE
 743            && GET_MODE_CLASS (mode) == MODE_FLOAT)
 744     {
 745       REAL_VALUE_TYPE d, t;
 746       REAL_VALUE_FROM_CONST_DOUBLE (d, trueop);
 747
 748       switch (code)
 749         {
 750         case SQRT:
 751           if (HONOR_SNANS (mode) && real_isnan (&d))
 752             return 0;
 753           real_sqrt (&t, mode, &d);
 754           d = t;
 755           break;
 756         case ABS:
 757           d = REAL_VALUE_ABS (d);
 758           break;
 759         case NEG:
 760           d = REAL_VALUE_NEGATE (d);
 761           break;
 762         case FLOAT_TRUNCATE:
 763           d = real_value_truncate (mode, d);
 764           break;
 765         case FLOAT_EXTEND:
 766           /* All this does is change the mode.  */
 767           break;
 768         case FIX:
 769           real_arithmetic (&d, FIX_TRUNC_EXPR, &d, NULL);
 770           break;
 771
 772         default:
 773           abort ();
 774         }
 775       return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
 776     }
 777
 778   else if (GET_CODE (trueop) == CONST_DOUBLE
 779            && GET_MODE_CLASS (GET_MODE (trueop)) == MODE_FLOAT
 780            && GET_MODE_CLASS (mode) == MODE_INT
 781            && width <= HOST_BITS_PER_WIDE_INT && width > 0)
 782     {
 783       HOST_WIDE_INT i;
 784       REAL_VALUE_TYPE d;
 785       REAL_VALUE_FROM_CONST_DOUBLE (d, trueop);
 786       switch (code)
 787         {
 788         case FIX:               i = REAL_VALUE_FIX (d);           break;
 789         case UNSIGNED_FIX:      i = REAL_VALUE_UNSIGNED_FIX (d);  break;
 790         default:
 791           abort ();
 792         }
 793       return gen_int_mode (i, mode);
 794     }
 795
 796   /* This was formerly used only for non-IEEE float.
 797      eggert@twinsun.com says it is safe for IEEE also.  */
 798   else
 799     {
 800       enum rtx_code reversed;
 801       /* There are some simplifications we can do even if the operands
 802          aren't constant.  */
 803       switch (code)
 804         {
 805         case NOT:
 806           /* (not (not X)) == X.  */
 807           if (GET_CODE (op) == NOT)
 808             return XEXP (op, 0);
 809
 810           /* (not (eq X Y)) == (ne X Y), etc.  */
 811           if (mode == BImode && GET_RTX_CLASS (GET_CODE (op)) == '<'
 812               && ((reversed = reversed_comparison_code (op, NULL_RTX))
 813                   != UNKNOWN))
 814             return gen_rtx_fmt_ee (reversed,
 815                                    op_mode, XEXP (op, 0), XEXP (op, 1));
 816           break;
 817
 818         case NEG:
 819           /* (neg (neg X)) == X.  */
 820           if (GET_CODE (op) == NEG)
 821             return XEXP (op, 0);
 822           break;
 823
 824         case SIGN_EXTEND:
 825           /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
 826              becomes just the MINUS if its mode is MODE.  This allows
 827              folding switch statements on machines using casesi (such as
 828              the VAX).  */
 829           if (GET_CODE (op) == TRUNCATE
 830               && GET_MODE (XEXP (op, 0)) == mode
 831               && GET_CODE (XEXP (op, 0)) == MINUS
 832               && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
 833               && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
 834             return XEXP (op, 0);
 835
 836 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
 837           if (! POINTERS_EXTEND_UNSIGNED
 838               && mode == Pmode && GET_MODE (op) == ptr_mode
 839               && (CONSTANT_P (op)
 840                   || (GET_CODE (op) == SUBREG
 841                       && GET_CODE (SUBREG_REG (op)) == REG
 842                       && REG_POINTER (SUBREG_REG (op))
 843                       && GET_MODE (SUBREG_REG (op)) == Pmode)))
 844             return convert_memory_address (Pmode, op);
 845 #endif
 846           break;
 847
 848 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
 849         case ZERO_EXTEND:
 850           if (POINTERS_EXTEND_UNSIGNED > 0
 851               && mode == Pmode && GET_MODE (op) == ptr_mode
 852               && (CONSTANT_P (op)
 853                   || (GET_CODE (op) == SUBREG
 854                       && GET_CODE (SUBREG_REG (op)) == REG
 855                       && REG_POINTER (SUBREG_REG (op))
 856                       && GET_MODE (SUBREG_REG (op)) == Pmode)))
 857             return convert_memory_address (Pmode, op);
 858           break;
 859 #endif
 860
 861         default:
 862           break;
 863         }
 864
 865       return 0;
 866     }
 867 }
 868 \f
 869 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
 870    and OP1.  Return 0 if no simplification is possible.
 871
 872    Don't use this for relational operations such as EQ or LT.
 873    Use simplify_relational_operation instead.  */
 874 rtx
 875 simplify_binary_operation (code, mode, op0, op1)
 876      enum rtx_code code;
 877      enum machine_mode mode;
 878      rtx op0, op1;
 879 {
 880   HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
 881   HOST_WIDE_INT val;
 882   unsigned int width = GET_MODE_BITSIZE (mode);
 883   rtx tem;
 884   rtx trueop0 = avoid_constant_pool_reference (op0);
 885   rtx trueop1 = avoid_constant_pool_reference (op1);
 886
 887   /* Relational operations don't work here.  We must know the mode
 888      of the operands in order to do the comparison correctly.
 889      Assuming a full word can give incorrect results.
 890      Consider comparing 128 with -128 in QImode.  */
 891
 892   if (GET_RTX_CLASS (code) == '<')
 893     abort ();
 894
 895   /* Make sure the constant is second.  */
 896   if (GET_RTX_CLASS (code) == 'c'
 897       && swap_commutative_operands_p (trueop0, trueop1))
 898     {
 899       tem = op0, op0 = op1, op1 = tem;
 900       tem = trueop0, trueop0 = trueop1, trueop1 = tem;
 901     }
 902
 903   if (VECTOR_MODE_P (mode)
 904       && GET_CODE (trueop0) == CONST_VECTOR
 905       && GET_CODE (trueop1) == CONST_VECTOR)
 906     {
 907       int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
 908       unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
 909       enum machine_mode op0mode = GET_MODE (trueop0);
 910       int op0_elt_size = GET_MODE_SIZE (GET_MODE_INNER (op0mode));
 911       unsigned op0_n_elts = (GET_MODE_SIZE (op0mode) / op0_elt_size);
 912       enum machine_mode op1mode = GET_MODE (trueop1);
 913       int op1_elt_size = GET_MODE_SIZE (GET_MODE_INNER (op1mode));
 914       unsigned op1_n_elts = (GET_MODE_SIZE (op1mode) / op1_elt_size);
 915       rtvec v = rtvec_alloc (n_elts);
 916       unsigned int i;
 917
 918       if (op0_n_elts != n_elts || op1_n_elts != n_elts)
 919         abort ();
 920
 921       for (i = 0; i < n_elts; i++)
 922         {
 923           rtx x = simplify_binary_operation (code, GET_MODE_INNER (mode),
 924                                              CONST_VECTOR_ELT (trueop0, i),
 925                                              CONST_VECTOR_ELT (trueop1, i));
 926           if (!x)
 927             return 0;
 928           RTVEC_ELT (v, i) = x;
 929         }
 930
 931       return gen_rtx_CONST_VECTOR (mode, v);
 932     }
 933
 934   if (GET_MODE_CLASS (mode) == MODE_FLOAT
 935       && GET_CODE (trueop0) == CONST_DOUBLE
 936       && GET_CODE (trueop1) == CONST_DOUBLE
 937       && mode == GET_MODE (op0) && mode == GET_MODE (op1))
 938     {
 939       REAL_VALUE_TYPE f0, f1, value;
 940
 941       REAL_VALUE_FROM_CONST_DOUBLE (f0, trueop0);
 942       REAL_VALUE_FROM_CONST_DOUBLE (f1, trueop1);
 943       f0 = real_value_truncate (mode, f0);
 944       f1 = real_value_truncate (mode, f1);
 945
 946       if (code == DIV
 947           && !MODE_HAS_INFINITIES (mode)
 948           && REAL_VALUES_EQUAL (f1, dconst0))
 949         return 0;
 950
 951       REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
 952
 953       value = real_value_truncate (mode, value);
 954       return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
 955     }
 956
 957   /* We can fold some multi-word operations.  */
 958   if (GET_MODE_CLASS (mode) == MODE_INT
 959       && width == HOST_BITS_PER_WIDE_INT * 2
 960       && (GET_CODE (trueop0) == CONST_DOUBLE
 961           || GET_CODE (trueop0) == CONST_INT)
 962       && (GET_CODE (trueop1) == CONST_DOUBLE
 963           || GET_CODE (trueop1) == CONST_INT))
 964     {
 965       unsigned HOST_WIDE_INT l1, l2, lv;
 966       HOST_WIDE_INT h1, h2, hv;
 967
 968       if (GET_CODE (trueop0) == CONST_DOUBLE)
 969         l1 = CONST_DOUBLE_LOW (trueop0), h1 = CONST_DOUBLE_HIGH (trueop0);
 970       else
 971         l1 = INTVAL (trueop0), h1 = HWI_SIGN_EXTEND (l1);
 972
 973       if (GET_CODE (trueop1) == CONST_DOUBLE)
 974         l2 = CONST_DOUBLE_LOW (trueop1), h2 = CONST_DOUBLE_HIGH (trueop1);
 975       else
 976         l2 = INTVAL (trueop1), h2 = HWI_SIGN_EXTEND (l2);
 977
 978       switch (code)
 979         {
 980         case MINUS:
 981           /* A - B == A + (-B).  */
 982           neg_double (l2, h2, &lv, &hv);
 983           l2 = lv, h2 = hv;
 984
 985           /* .. fall through ...  */
 986
 987         case PLUS:
 988           add_double (l1, h1, l2, h2, &lv, &hv);
 989           break;
 990
 991         case MULT:
 992           mul_double (l1, h1, l2, h2, &lv, &hv);
 993           break;
 994
 995         case DIV:  case MOD:   case UDIV:  case UMOD:
 996           /* We'd need to include tree.h to do this and it doesn't seem worth
 997              it.  */
 998           return 0;
 999
1000         case AND:
1001           lv = l1 & l2, hv = h1 & h2;
1002           break;
1003
1004         case IOR:
1005           lv = l1 | l2, hv = h1 | h2;
1006           break;
1007
1008         case XOR:
1009           lv = l1 ^ l2, hv = h1 ^ h2;
1010           break;
1011
1012         case SMIN:
1013           if (h1 < h2
1014               || (h1 == h2
1015                   && ((unsigned HOST_WIDE_INT) l1
1016                       < (unsigned HOST_WIDE_INT) l2)))
1017             lv = l1, hv = h1;
1018           else
1019             lv = l2, hv = h2;
1020           break;
1021
1022         case SMAX:
1023           if (h1 > h2
1024               || (h1 == h2
1025                   && ((unsigned HOST_WIDE_INT) l1
1026                       > (unsigned HOST_WIDE_INT) l2)))
1027             lv = l1, hv = h1;
1028           else
1029             lv = l2, hv = h2;
1030           break;
1031
1032         case UMIN:
1033           if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
1034               || (h1 == h2
1035                   && ((unsigned HOST_WIDE_INT) l1
1036                       < (unsigned HOST_WIDE_INT) l2)))
1037             lv = l1, hv = h1;
1038           else
1039             lv = l2, hv = h2;
1040           break;
1041
1042         case UMAX:
1043           if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
1044               || (h1 == h2
1045                   && ((unsigned HOST_WIDE_INT) l1
1046                       > (unsigned HOST_WIDE_INT) l2)))
1047             lv = l1, hv = h1;
1048           else
1049             lv = l2, hv = h2;
1050           break;
1051
1052         case LSHIFTRT:   case ASHIFTRT:
1053         case ASHIFT:
1054         case ROTATE:     case ROTATERT:
1055 #ifdef SHIFT_COUNT_TRUNCATED
1056           if (SHIFT_COUNT_TRUNCATED)
1057             l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
1058 #endif
1059
1060           if (h2 != 0 || l2 >= GET_MODE_BITSIZE (mode))
1061             return 0;
1062
1063           if (code == LSHIFTRT || code == ASHIFTRT)
1064             rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
1065                            code == ASHIFTRT);
1066           else if (code == ASHIFT)
1067             lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
1068           else if (code == ROTATE)
1069             lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
1070           else /* code == ROTATERT */
1071             rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
1072           break;
1073
1074         default:
1075           return 0;
1076         }
1077
1078       return immed_double_const (lv, hv, mode);
1079     }
1080
1081   if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
1082       || width > HOST_BITS_PER_WIDE_INT || width == 0)
1083     {
1084       /* Even if we can't compute a constant result,
1085          there are some cases worth simplifying.  */
1086
1087       switch (code)
1088         {
1089         case PLUS:
1090           /* Maybe simplify x + 0 to x.  The two expressions are equivalent
1091              when x is NaN, infinite, or finite and nonzero.  They aren't
1092              when x is -0 and the rounding mode is not towards -infinity,
1093              since (-0) + 0 is then 0.  */
1094           if (!HONOR_SIGNED_ZEROS (mode) && trueop1 == CONST0_RTX (mode))
1095             return op0;
1096
1097           /* ((-a) + b) -> (b - a) and similarly for (a + (-b)).  These
1098              transformations are safe even for IEEE.  */
1099           if (GET_CODE (op0) == NEG)
1100             return simplify_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
1101           else if (GET_CODE (op1) == NEG)
1102             return simplify_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
1103
1104           /* (~a) + 1 -> -a */
1105           if (INTEGRAL_MODE_P (mode)
1106               && GET_CODE (op0) == NOT
1107               && trueop1 == const1_rtx)
1108             return gen_rtx_NEG (mode, XEXP (op0, 0));
1109
1110           /* Handle both-operands-constant cases.  We can only add
1111              CONST_INTs to constants since the sum of relocatable symbols
1112              can't be handled by most assemblers.  Don't add CONST_INT
1113              to CONST_INT since overflow won't be computed properly if wider
1114              than HOST_BITS_PER_WIDE_INT.  */
1115
1116           if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
1117               && GET_CODE (op1) == CONST_INT)
1118             return plus_constant (op0, INTVAL (op1));
1119           else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
1120                    && GET_CODE (op0) == CONST_INT)
1121             return plus_constant (op1, INTVAL (op0));
1122
1123           /* See if this is something like X * C - X or vice versa or
1124              if the multiplication is written as a shift.  If so, we can
1125              distribute and make a new multiply, shift, or maybe just
1126              have X (if C is 2 in the example above).  But don't make
1127              real multiply if we didn't have one before.  */
1128
1129           if (! FLOAT_MODE_P (mode))
1130             {
1131               HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
1132               rtx lhs = op0, rhs = op1;
1133               int had_mult = 0;
1134
1135               if (GET_CODE (lhs) == NEG)
1136                 coeff0 = -1, lhs = XEXP (lhs, 0);
1137               else if (GET_CODE (lhs) == MULT
1138                        && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
1139                 {
1140                   coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
1141                   had_mult = 1;
1142                 }
1143               else if (GET_CODE (lhs) == ASHIFT
1144                        && GET_CODE (XEXP (lhs, 1)) == CONST_INT
1145                        && INTVAL (XEXP (lhs, 1)) >= 0
1146                        && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
1147                 {
1148                   coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
1149                   lhs = XEXP (lhs, 0);
1150                 }
1151
1152               if (GET_CODE (rhs) == NEG)
1153                 coeff1 = -1, rhs = XEXP (rhs, 0);
1154               else if (GET_CODE (rhs) == MULT
1155                        && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
1156                 {
1157                   coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
1158                   had_mult = 1;
1159                 }
1160               else if (GET_CODE (rhs) == ASHIFT
1161                        && GET_CODE (XEXP (rhs, 1)) == CONST_INT
1162                        && INTVAL (XEXP (rhs, 1)) >= 0
1163                        && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
1164                 {
1165                   coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
1166                   rhs = XEXP (rhs, 0);
1167                 }
1168
1169               if (rtx_equal_p (lhs, rhs))
1170                 {
1171                   tem = simplify_gen_binary (MULT, mode, lhs,
1172                                         GEN_INT (coeff0 + coeff1));
1173                   return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
1174                 }
1175             }
1176
1177           /* If one of the operands is a PLUS or a MINUS, see if we can
1178              simplify this by the associative law.
1179              Don't use the associative law for floating point.
1180              The inaccuracy makes it nonassociative,
1181              and subtle programs can break if operations are associated.  */
1182
1183           if (INTEGRAL_MODE_P (mode)
1184               && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
1185                   || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS
1186                   || (GET_CODE (op0) == CONST
1187                       && GET_CODE (XEXP (op0, 0)) == PLUS)
1188                   || (GET_CODE (op1) == CONST
1189                       && GET_CODE (XEXP (op1, 0)) == PLUS))
1190               && (tem = simplify_plus_minus (code, mode, op0, op1, 0)) != 0)
1191             return tem;
1192           break;
1193
1194         case COMPARE:
1195 #ifdef HAVE_cc0
1196           /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
1197              using cc0, in which case we want to leave it as a COMPARE
1198              so we can distinguish it from a register-register-copy.
1199
1200              In IEEE floating point, x-0 is not the same as x.  */
1201
1202           if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1203                || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
1204               && trueop1 == CONST0_RTX (mode))
1205             return op0;
1206 #endif
1207
1208           /* Convert (compare (gt (flags) 0) (lt (flags) 0)) to (flags).  */
1209           if (((GET_CODE (op0) == GT && GET_CODE (op1) == LT)
1210                || (GET_CODE (op0) == GTU && GET_CODE (op1) == LTU))
1211               && XEXP (op0, 1) == const0_rtx && XEXP (op1, 1) == const0_rtx)
1212             {
1213               rtx xop00 = XEXP (op0, 0);
1214               rtx xop10 = XEXP (op1, 0);
1215
1216 #ifdef HAVE_cc0
1217               if (GET_CODE (xop00) == CC0 && GET_CODE (xop10) == CC0)
1218 #else
1219               if (GET_CODE (xop00) == REG && GET_CODE (xop10) == REG
1220                   && GET_MODE (xop00) == GET_MODE (xop10)
1221                   && REGNO (xop00) == REGNO (xop10)
1222                   && GET_MODE_CLASS (GET_MODE (xop00)) == MODE_CC
1223                   && GET_MODE_CLASS (GET_MODE (xop10)) == MODE_CC)
1224 #endif
1225                 return xop00;
1226             }
1227           break;
1228
1229         case MINUS:
1230           /* We can't assume x-x is 0 even with non-IEEE floating point,
1231              but since it is zero except in very strange circumstances, we
1232              will treat it as zero with -funsafe-math-optimizations.  */
1233           if (rtx_equal_p (trueop0, trueop1)
1234               && ! side_effects_p (op0)
1235               && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations))
1236             return CONST0_RTX (mode);
1237
1238           /* Change subtraction from zero into negation.  (0 - x) is the
1239              same as -x when x is NaN, infinite, or finite and nonzero.
1240              But if the mode has signed zeros, and does not round towards
1241              -infinity, then 0 - 0 is 0, not -0.  */
1242           if (!HONOR_SIGNED_ZEROS (mode) && trueop0 == CONST0_RTX (mode))
1243             return gen_rtx_NEG (mode, op1);
1244
1245           /* (-1 - a) is ~a.  */
1246           if (trueop0 == constm1_rtx)
1247             return gen_rtx_NOT (mode, op1);
1248
1249           /* Subtracting 0 has no effect unless the mode has signed zeros
1250              and supports rounding towards -infinity.  In such a case,
1251              0 - 0 is -0.  */
1252           if (!(HONOR_SIGNED_ZEROS (mode)
1253                 && HONOR_SIGN_DEPENDENT_ROUNDING (mode))
1254               && trueop1 == CONST0_RTX (mode))
1255             return op0;
1256
1257           /* See if this is something like X * C - X or vice versa or
1258              if the multiplication is written as a shift.  If so, we can
1259              distribute and make a new multiply, shift, or maybe just
1260              have X (if C is 2 in the example above).  But don't make
1261              real multiply if we didn't have one before.  */
1262
1263           if (! FLOAT_MODE_P (mode))
1264             {
1265               HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
1266               rtx lhs = op0, rhs = op1;
1267               int had_mult = 0;
1268
1269               if (GET_CODE (lhs) == NEG)
1270                 coeff0 = -1, lhs = XEXP (lhs, 0);
1271               else if (GET_CODE (lhs) == MULT
1272                        && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
1273                 {
1274                   coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
1275                   had_mult = 1;
1276                 }
1277               else if (GET_CODE (lhs) == ASHIFT
1278                        && GET_CODE (XEXP (lhs, 1)) == CONST_INT
1279                        && INTVAL (XEXP (lhs, 1)) >= 0
1280                        && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
1281                 {
1282                   coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
1283                   lhs = XEXP (lhs, 0);
1284                 }
1285
1286               if (GET_CODE (rhs) == NEG)
1287                 coeff1 = - 1, rhs = XEXP (rhs, 0);
1288               else if (GET_CODE (rhs) == MULT
1289                        && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
1290                 {
1291                   coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
1292                   had_mult = 1;
1293                 }
1294               else if (GET_CODE (rhs) == ASHIFT
1295                        && GET_CODE (XEXP (rhs, 1)) == CONST_INT
1296                        && INTVAL (XEXP (rhs, 1)) >= 0
1297                        && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
1298                 {
1299                   coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
1300                   rhs = XEXP (rhs, 0);
1301                 }
1302
1303               if (rtx_equal_p (lhs, rhs))
1304                 {
1305                   tem = simplify_gen_binary (MULT, mode, lhs,
1306                                              GEN_INT (coeff0 - coeff1));
1307                   return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
1308                 }
1309             }
1310
1311           /* (a - (-b)) -> (a + b).  True even for IEEE.  */
1312           if (GET_CODE (op1) == NEG)
1313             return simplify_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
1314
1315           /* If one of the operands is a PLUS or a MINUS, see if we can
1316              simplify this by the associative law.
1317              Don't use the associative law for floating point.
1318              The inaccuracy makes it nonassociative,
1319              and subtle programs can break if operations are associated.  */
1320
1321           if (INTEGRAL_MODE_P (mode)
1322               && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
1323                   || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS
1324                   || (GET_CODE (op0) == CONST
1325                       && GET_CODE (XEXP (op0, 0)) == PLUS)
1326                   || (GET_CODE (op1) == CONST
1327                       && GET_CODE (XEXP (op1, 0)) == PLUS))
1328               && (tem = simplify_plus_minus (code, mode, op0, op1, 0)) != 0)
1329             return tem;
1330
1331           /* Don't let a relocatable value get a negative coeff.  */
1332           if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
1333             return simplify_gen_binary (PLUS, mode,
1334                                         op0,
1335                                         neg_const_int (mode, op1));
1336
1337           /* (x - (x & y)) -> (x & ~y) */
1338           if (GET_CODE (op1) == AND)
1339             {
1340              if (rtx_equal_p (op0, XEXP (op1, 0)))
1341                {
1342                  tem = simplify_gen_unary (NOT, mode, XEXP (op1, 1),
1343                                            GET_MODE (XEXP (op1, 1)));
1344                  return simplify_gen_binary (AND, mode, op0, tem);
1345                }
1346              if (rtx_equal_p (op0, XEXP (op1, 1)))
1347                {
1348                  tem = simplify_gen_unary (NOT, mode, XEXP (op1, 0),
1349                                            GET_MODE (XEXP (op1, 0)));
1350                  return simplify_gen_binary (AND, mode, op0, tem);
1351                }
1352            }
1353           break;
1354
1355         case MULT:
1356           if (trueop1 == constm1_rtx)
1357             {
1358               tem = simplify_unary_operation (NEG, mode, op0, mode);
1359
1360               return tem ? tem : gen_rtx_NEG (mode, op0);
1361             }
1362
1363           /* Maybe simplify x * 0 to 0.  The reduction is not valid if
1364              x is NaN, since x * 0 is then also NaN.  Nor is it valid
1365              when the mode has signed zeros, since multiplying a negative
1366              number by 0 will give -0, not 0.  */
1367           if (!HONOR_NANS (mode)
1368               && !HONOR_SIGNED_ZEROS (mode)
1369               && trueop1 == CONST0_RTX (mode)
1370               && ! side_effects_p (op0))
1371             return op1;
1372
1373           /* In IEEE floating point, x*1 is not equivalent to x for
1374              signalling NaNs.  */
1375           if (!HONOR_SNANS (mode)
1376               && trueop1 == CONST1_RTX (mode))
1377             return op0;
1378
1379           /* Convert multiply by constant power of two into shift unless
1380              we are still generating RTL.  This test is a kludge.  */
1381           if (GET_CODE (trueop1) == CONST_INT
1382               && (val = exact_log2 (INTVAL (trueop1))) >= 0
1383               /* If the mode is larger than the host word size, and the
1384                  uppermost bit is set, then this isn't a power of two due
1385                  to implicit sign extension.  */
1386               && (width <= HOST_BITS_PER_WIDE_INT
1387                   || val != HOST_BITS_PER_WIDE_INT - 1)
1388               && ! rtx_equal_function_value_matters)
1389             return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
1390
1391           /* x*2 is x+x and x*(-1) is -x */
1392           if (GET_CODE (trueop1) == CONST_DOUBLE
1393               && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT
1394               && GET_MODE (op0) == mode)
1395             {
1396               REAL_VALUE_TYPE d;
1397               REAL_VALUE_FROM_CONST_DOUBLE (d, trueop1);
1398
1399               if (REAL_VALUES_EQUAL (d, dconst2))
1400                 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
1401
1402               if (REAL_VALUES_EQUAL (d, dconstm1))
1403                 return gen_rtx_NEG (mode, op0);
1404             }
1405           break;
1406
1407         case IOR:
1408           if (trueop1 == const0_rtx)
1409             return op0;
1410           if (GET_CODE (trueop1) == CONST_INT
1411               && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1412                   == GET_MODE_MASK (mode)))
1413             return op1;
1414           if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1415             return op0;
1416           /* A | (~A) -> -1 */
1417           if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
1418                || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1419               && ! side_effects_p (op0)
1420               && GET_MODE_CLASS (mode) != MODE_CC)
1421             return constm1_rtx;
1422           break;
1423
1424         case XOR:
1425           if (trueop1 == const0_rtx)
1426             return op0;
1427           if (GET_CODE (trueop1) == CONST_INT
1428               && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1429                   == GET_MODE_MASK (mode)))
1430             return gen_rtx_NOT (mode, op0);
1431           if (trueop0 == trueop1 && ! side_effects_p (op0)
1432               && GET_MODE_CLASS (mode) != MODE_CC)
1433             return const0_rtx;
1434           break;
1435
1436         case AND:
1437           if (trueop1 == const0_rtx && ! side_effects_p (op0))
1438             return const0_rtx;
1439           if (GET_CODE (trueop1) == CONST_INT
1440               && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1441                   == GET_MODE_MASK (mode)))
1442             return op0;
1443           if (trueop0 == trueop1 && ! side_effects_p (op0)
1444               && GET_MODE_CLASS (mode) != MODE_CC)
1445             return op0;
1446           /* A & (~A) -> 0 */
1447           if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
1448                || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1449               && ! side_effects_p (op0)
1450               && GET_MODE_CLASS (mode) != MODE_CC)
1451             return const0_rtx;
1452           break;
1453
1454         case UDIV:
1455           /* Convert divide by power of two into shift (divide by 1 handled
1456              below).  */
1457           if (GET_CODE (trueop1) == CONST_INT
1458               && (arg1 = exact_log2 (INTVAL (trueop1))) > 0)
1459             return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
1460
1461           /* ... fall through ...  */
1462
1463         case DIV:
1464           if (trueop1 == CONST1_RTX (mode))
1465             {
1466               /* On some platforms DIV uses narrower mode than its
1467                  operands.  */
1468               rtx x = gen_lowpart_common (mode, op0);
1469               if (x)
1470                 return x;
1471               else if (mode != GET_MODE (op0) && GET_MODE (op0) != VOIDmode)
1472                 return gen_lowpart_SUBREG (mode, op0);
1473               else
1474                 return op0;
1475             }
1476
1477           /* Maybe change 0 / x to 0.  This transformation isn't safe for
1478              modes with NaNs, since 0 / 0 will then be NaN rather than 0.
1479              Nor is it safe for modes with signed zeros, since dividing
1480              0 by a negative number gives -0, not 0.  */
1481           if (!HONOR_NANS (mode)
1482               && !HONOR_SIGNED_ZEROS (mode)
1483               && trueop0 == CONST0_RTX (mode)
1484               && ! side_effects_p (op1))
1485             return op0;
1486
1487           /* Change division by a constant into multiplication.  Only do
1488              this with -funsafe-math-optimizations.  */
1489           else if (GET_CODE (trueop1) == CONST_DOUBLE
1490                    && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT
1491                    && trueop1 != CONST0_RTX (mode)
1492                    && flag_unsafe_math_optimizations)
1493             {
1494               REAL_VALUE_TYPE d;
1495               REAL_VALUE_FROM_CONST_DOUBLE (d, trueop1);
1496
1497               if (! REAL_VALUES_EQUAL (d, dconst0))
1498                 {
1499                   REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
1500                   return gen_rtx_MULT (mode, op0,
1501                                        CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
1502                 }
1503             }
1504           break;
1505
1506         case UMOD:
1507           /* Handle modulus by power of two (mod with 1 handled below).  */
1508           if (GET_CODE (trueop1) == CONST_INT
1509               && exact_log2 (INTVAL (trueop1)) > 0)
1510             return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
1511
1512           /* ... fall through ...  */
1513
1514         case MOD:
1515           if ((trueop0 == const0_rtx || trueop1 == const1_rtx)
1516               && ! side_effects_p (op0) && ! side_effects_p (op1))
1517             return const0_rtx;
1518           break;
1519
1520         case ROTATERT:
1521         case ROTATE:
1522         case ASHIFTRT:
1523           /* Rotating ~0 always results in ~0.  */
1524           if (GET_CODE (trueop0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
1525               && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
1526               && ! side_effects_p (op1))
1527             return op0;
1528
1529           /* ... fall through ...  */
1530
1531         case ASHIFT:
1532         case LSHIFTRT:
1533           if (trueop1 == const0_rtx)
1534             return op0;
1535           if (trueop0 == const0_rtx && ! side_effects_p (op1))
1536             return op0;
1537           break;
1538
1539         case SMIN:
1540           if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
1541               && INTVAL (trueop1) == (HOST_WIDE_INT) 1 << (width -1)
1542               && ! side_effects_p (op0))
1543             return op1;
1544           else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1545             return op0;
1546           break;
1547
1548         case SMAX:
1549           if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
1550               && ((unsigned HOST_WIDE_INT) INTVAL (trueop1)
1551                   == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
1552               && ! side_effects_p (op0))
1553             return op1;
1554           else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1555             return op0;
1556           break;
1557
1558         case UMIN:
1559           if (trueop1 == const0_rtx && ! side_effects_p (op0))
1560             return op1;
1561           else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1562             return op0;
1563           break;
1564
1565         case UMAX:
1566           if (trueop1 == constm1_rtx && ! side_effects_p (op0))
1567             return op1;
1568           else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1569             return op0;
1570           break;
1571
1572         case SS_PLUS:
1573         case US_PLUS:
1574         case SS_MINUS:
1575         case US_MINUS:
1576           /* ??? There are simplifications that can be done.  */
1577           return 0;
1578
1579         case VEC_SELECT:
1580           if (!VECTOR_MODE_P (mode))
1581             {
1582               if (!VECTOR_MODE_P (GET_MODE (trueop0))
1583                   || (mode
1584                       != GET_MODE_INNER (GET_MODE (trueop0)))
1585                   || GET_CODE (trueop1) != PARALLEL
1586                   || XVECLEN (trueop1, 0) != 1
1587                   || GET_CODE (XVECEXP (trueop1, 0, 0)) != CONST_INT)
1588                 abort ();
1589
1590               if (GET_CODE (trueop0) == CONST_VECTOR)
1591                 return CONST_VECTOR_ELT (trueop0, INTVAL (XVECEXP (trueop1, 0, 0)));
1592             }
1593           else
1594             {
1595               if (!VECTOR_MODE_P (GET_MODE (trueop0))
1596                   || (GET_MODE_INNER (mode)
1597                       != GET_MODE_INNER (GET_MODE (trueop0)))
1598                   || GET_CODE (trueop1) != PARALLEL)
1599                 abort ();
1600
1601               if (GET_CODE (trueop0) == CONST_VECTOR)
1602                 {
1603                   int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
1604                   unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
1605                   rtvec v = rtvec_alloc (n_elts);
1606                   unsigned int i;
1607
1608                   if (XVECLEN (trueop1, 0) != (int)n_elts)
1609                     abort ();
1610                   for (i = 0; i < n_elts; i++)
1611                     {
1612                        rtx x = XVECEXP (trueop1, 0, i);
1613
1614                        if (GET_CODE (x) != CONST_INT)
1615                          abort ();
1616                        RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0, INTVAL (x));
1617                     }
1618
1619                   return gen_rtx_CONST_VECTOR (mode, v);
1620                 }
1621             }
1622           return 0;
1623         case VEC_CONCAT:
1624           {
1625             enum machine_mode op0_mode = (GET_MODE (trueop0) != VOIDmode
1626                                           ? GET_MODE (trueop0)
1627                                           : GET_MODE_INNER (mode));
1628             enum machine_mode op1_mode = (GET_MODE (trueop1) != VOIDmode
1629                                           ? GET_MODE (trueop1)
1630                                           : GET_MODE_INNER (mode));
1631
1632             if (!VECTOR_MODE_P (mode)
1633                 || (GET_MODE_SIZE (op0_mode) + GET_MODE_SIZE (op1_mode)
1634                     != GET_MODE_SIZE (mode)))
1635               abort ();
1636
1637             if ((VECTOR_MODE_P (op0_mode)
1638                  && (GET_MODE_INNER (mode)
1639                      != GET_MODE_INNER (op0_mode)))
1640                 || (!VECTOR_MODE_P (op0_mode)
1641                     && GET_MODE_INNER (mode) != op0_mode))
1642               abort ();
1643
1644             if ((VECTOR_MODE_P (op1_mode)
1645                  && (GET_MODE_INNER (mode)
1646                      != GET_MODE_INNER (op1_mode)))
1647                 || (!VECTOR_MODE_P (op1_mode)
1648                     && GET_MODE_INNER (mode) != op1_mode))
1649               abort ();
1650
1651             if ((GET_CODE (trueop0) == CONST_VECTOR
1652                  || GET_CODE (trueop0) == CONST_INT
1653                  || GET_CODE (trueop0) == CONST_DOUBLE)
1654                 && (GET_CODE (trueop1) == CONST_VECTOR
1655                     || GET_CODE (trueop1) == CONST_INT
1656                     || GET_CODE (trueop1) == CONST_DOUBLE))
1657               {
1658                 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
1659                 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
1660                 rtvec v = rtvec_alloc (n_elts);
1661                 unsigned int i;
1662                 unsigned in_n_elts = 1;
1663
1664                 if (VECTOR_MODE_P (op0_mode))
1665                   in_n_elts = (GET_MODE_SIZE (op0_mode) / elt_size);
1666                 for (i = 0; i < n_elts; i++)
1667                   {
1668                     if (i < in_n_elts)
1669                       {
1670                         if (!VECTOR_MODE_P (op0_mode))
1671                           RTVEC_ELT (v, i) = trueop0;
1672                         else
1673                           RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0, i);
1674                       }
1675                     else
1676                       {
1677                         if (!VECTOR_MODE_P (op1_mode))
1678                           RTVEC_ELT (v, i) = trueop1;
1679                         else
1680                           RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop1,
1681                                                                i - in_n_elts);
1682                       }
1683                   }
1684
1685                 return gen_rtx_CONST_VECTOR (mode, v);
1686               }
1687             }
1688           return 0;
1689
1690         default:
1691           abort ();
1692         }
1693
1694       return 0;
1695     }
1696
1697   /* Get the integer argument values in two forms:
1698      zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S.  */
1699
1700   arg0 = INTVAL (trueop0);
1701   arg1 = INTVAL (trueop1);
1702
1703   if (width < HOST_BITS_PER_WIDE_INT)
1704     {
1705       arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
1706       arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
1707
1708       arg0s = arg0;
1709       if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
1710         arg0s |= ((HOST_WIDE_INT) (-1) << width);
1711
1712       arg1s = arg1;
1713       if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
1714         arg1s |= ((HOST_WIDE_INT) (-1) << width);
1715     }
1716   else
1717     {
1718       arg0s = arg0;
1719       arg1s = arg1;
1720     }
1721
1722   /* Compute the value of the arithmetic.  */
1723
1724   switch (code)
1725     {
1726     case PLUS:
1727       val = arg0s + arg1s;
1728       break;
1729
1730     case MINUS:
1731       val = arg0s - arg1s;
1732       break;
1733
1734     case MULT:
1735       val = arg0s * arg1s;
1736       break;
1737
1738     case DIV:
1739       if (arg1s == 0
1740           || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1741               && arg1s == -1))
1742         return 0;
1743       val = arg0s / arg1s;
1744       break;
1745
1746     case MOD:
1747       if (arg1s == 0
1748           || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1749               && arg1s == -1))
1750         return 0;
1751       val = arg0s % arg1s;
1752       break;
1753
1754     case UDIV:
1755       if (arg1 == 0
1756           || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1757               && arg1s == -1))
1758         return 0;
1759       val = (unsigned HOST_WIDE_INT) arg0 / arg1;
1760       break;
1761
1762     case UMOD:
1763       if (arg1 == 0
1764           || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1765               && arg1s == -1))
1766         return 0;
1767       val = (unsigned HOST_WIDE_INT) arg0 % arg1;
1768       break;
1769
1770     case AND:
1771       val = arg0 & arg1;
1772       break;
1773
1774     case IOR:
1775       val = arg0 | arg1;
1776       break;
1777
1778     case XOR:
1779       val = arg0 ^ arg1;
1780       break;
1781
1782     case LSHIFTRT:
1783       /* If shift count is undefined, don't fold it; let the machine do
1784          what it wants.  But truncate it if the machine will do that.  */
1785       if (arg1 < 0)
1786         return 0;
1787
1788 #ifdef SHIFT_COUNT_TRUNCATED
1789       if (SHIFT_COUNT_TRUNCATED)
1790         arg1 %= width;
1791 #endif
1792
1793       val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
1794       break;
1795
1796     case ASHIFT:
1797       if (arg1 < 0)
1798         return 0;
1799
1800 #ifdef SHIFT_COUNT_TRUNCATED
1801       if (SHIFT_COUNT_TRUNCATED)
1802         arg1 %= width;
1803 #endif
1804
1805       val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
1806       break;
1807
1808     case ASHIFTRT:
1809       if (arg1 < 0)
1810         return 0;
1811
1812 #ifdef SHIFT_COUNT_TRUNCATED
1813       if (SHIFT_COUNT_TRUNCATED)
1814         arg1 %= width;
1815 #endif
1816
1817       val = arg0s >> arg1;
1818
1819       /* Bootstrap compiler may not have sign extended the right shift.
1820          Manually extend the sign to insure bootstrap cc matches gcc.  */
1821       if (arg0s < 0 && arg1 > 0)
1822         val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
1823
1824       break;
1825
1826     case ROTATERT:
1827       if (arg1 < 0)
1828         return 0;
1829
1830       arg1 %= width;
1831       val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
1832              | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
1833       break;
1834
1835     case ROTATE:
1836       if (arg1 < 0)
1837         return 0;
1838
1839       arg1 %= width;
1840       val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
1841              | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
1842       break;
1843
1844     case COMPARE:
1845       /* Do nothing here.  */
1846       return 0;
1847
1848     case SMIN:
1849       val = arg0s <= arg1s ? arg0s : arg1s;
1850       break;
1851
1852     case UMIN:
1853       val = ((unsigned HOST_WIDE_INT) arg0
1854              <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
1855       break;
1856
1857     case SMAX:
1858       val = arg0s > arg1s ? arg0s : arg1s;
1859       break;
1860
1861     case UMAX:
1862       val = ((unsigned HOST_WIDE_INT) arg0
1863              > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
1864       break;
1865
1866     default:
1867       abort ();
1868     }
1869
1870   val = trunc_int_for_mode (val, mode);
1871
1872   return GEN_INT (val);
1873 }
1874 \f
1875 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
1876    PLUS or MINUS.
1877
1878    Rather than test for specific case, we do this by a brute-force method
1879    and do all possible simplifications until no more changes occur.  Then
1880    we rebuild the operation.
1881
1882    If FORCE is true, then always generate the rtx.  This is used to
1883    canonicalize stuff emitted from simplify_gen_binary.  Note that this
1884    can still fail if the rtx is too complex.  It won't fail just because
1885    the result is not 'simpler' than the input, however.  */
1886
1887 struct simplify_plus_minus_op_data
1888 {
1889   rtx op;
1890   int neg;
1891 };
1892
1893 static int
1894 simplify_plus_minus_op_data_cmp (p1, p2)
1895      const void *p1;
1896      const void *p2;
1897 {
1898   const struct simplify_plus_minus_op_data *d1 = p1;
1899   const struct simplify_plus_minus_op_data *d2 = p2;
1900
1901   return (commutative_operand_precedence (d2->op)
1902           - commutative_operand_precedence (d1->op));
1903 }
1904
1905 static rtx
1906 simplify_plus_minus (code, mode, op0, op1, force)
1907      enum rtx_code code;
1908      enum machine_mode mode;
1909      rtx op0, op1;
1910      int force;
1911 {
1912   struct simplify_plus_minus_op_data ops[8];
1913   rtx result, tem;
1914   int n_ops = 2, input_ops = 2, input_consts = 0, n_consts;
1915   int first, negate, changed;
1916   int i, j;
1917
1918   memset ((char *) ops, 0, sizeof ops);
1919
1920   /* Set up the two operands and then expand them until nothing has been
1921      changed.  If we run out of room in our array, give up; this should
1922      almost never happen.  */
1923
1924   ops[0].op = op0;
1925   ops[0].neg = 0;
1926   ops[1].op = op1;
1927   ops[1].neg = (code == MINUS);
1928
1929   do
1930     {
1931       changed = 0;
1932
1933       for (i = 0; i < n_ops; i++)
1934         {
1935           rtx this_op = ops[i].op;
1936           int this_neg = ops[i].neg;
1937           enum rtx_code this_code = GET_CODE (this_op);
1938
1939           switch (this_code)
1940             {
1941             case PLUS:
1942             case MINUS:
1943               if (n_ops == 7)
1944                 return NULL_RTX;
1945
1946               ops[n_ops].op = XEXP (this_op, 1);
1947               ops[n_ops].neg = (this_code == MINUS) ^ this_neg;
1948               n_ops++;
1949
1950               ops[i].op = XEXP (this_op, 0);
1951               input_ops++;
1952               changed = 1;
1953               break;
1954
1955             case NEG:
1956               ops[i].op = XEXP (this_op, 0);
1957               ops[i].neg = ! this_neg;
1958               changed = 1;
1959               break;
1960
1961             case CONST:
1962               if (n_ops < 7
1963                   && GET_CODE (XEXP (this_op, 0)) == PLUS
1964                   && CONSTANT_P (XEXP (XEXP (this_op, 0), 0))
1965                   && CONSTANT_P (XEXP (XEXP (this_op, 0), 1)))
1966                 {
1967                   ops[i].op = XEXP (XEXP (this_op, 0), 0);
1968                   ops[n_ops].op = XEXP (XEXP (this_op, 0), 1);
1969                   ops[n_ops].neg = this_neg;
1970                   n_ops++;
1971                   input_consts++;
1972                   changed = 1;
1973                 }
1974               break;
1975
1976             case NOT:
1977               /* ~a -> (-a - 1) */
1978               if (n_ops != 7)
1979                 {
1980                   ops[n_ops].op = constm1_rtx;
1981                   ops[n_ops++].neg = this_neg;
1982                   ops[i].op = XEXP (this_op, 0);
1983                   ops[i].neg = !this_neg;
1984                   changed = 1;
1985                 }
1986               break;
1987
1988             case CONST_INT:
1989               if (this_neg)
1990                 {
1991                   ops[i].op = neg_const_int (mode, this_op);
1992                   ops[i].neg = 0;
1993                   changed = 1;
1994                 }
1995               break;
1996
1997             default:
1998               break;
1999             }
2000         }
2001     }
2002   while (changed);
2003
2004   /* If we only have two operands, we can't do anything.  */
2005   if (n_ops <= 2 && !force)
2006     return NULL_RTX;
2007
2008   /* Count the number of CONSTs we didn't split above.  */
2009   for (i = 0; i < n_ops; i++)
2010     if (GET_CODE (ops[i].op) == CONST)
2011       input_consts++;
2012
2013   /* Now simplify each pair of operands until nothing changes.  The first
2014      time through just simplify constants against each other.  */
2015
2016   first = 1;
2017   do
2018     {
2019       changed = first;
2020
2021       for (i = 0; i < n_ops - 1; i++)
2022         for (j = i + 1; j < n_ops; j++)
2023           {
2024             rtx lhs = ops[i].op, rhs = ops[j].op;
2025             int lneg = ops[i].neg, rneg = ops[j].neg;
2026
2027             if (lhs != 0 && rhs != 0
2028                 && (! first || (CONSTANT_P (lhs) && CONSTANT_P (rhs))))
2029               {
2030                 enum rtx_code ncode = PLUS;
2031
2032                 if (lneg != rneg)
2033                   {
2034                     ncode = MINUS;
2035                     if (lneg)
2036                       tem = lhs, lhs = rhs, rhs = tem;
2037                   }
2038                 else if (swap_commutative_operands_p (lhs, rhs))
2039                   tem = lhs, lhs = rhs, rhs = tem;
2040
2041                 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
2042
2043                 /* Reject "simplifications" that just wrap the two
2044                    arguments in a CONST.  Failure to do so can result
2045                    in infinite recursion with simplify_binary_operation
2046                    when it calls us to simplify CONST operations.  */
2047                 if (tem
2048                     && ! (GET_CODE (tem) == CONST
2049                           && GET_CODE (XEXP (tem, 0)) == ncode
2050                           && XEXP (XEXP (tem, 0), 0) == lhs
2051                           && XEXP (XEXP (tem, 0), 1) == rhs)
2052                     /* Don't allow -x + -1 -> ~x simplifications in the
2053                        first pass.  This allows us the chance to combine
2054                        the -1 with other constants.  */
2055                     && ! (first
2056                           && GET_CODE (tem) == NOT
2057                           && XEXP (tem, 0) == rhs))
2058                   {
2059                     lneg &= rneg;
2060                     if (GET_CODE (tem) == NEG)
2061                       tem = XEXP (tem, 0), lneg = !lneg;
2062                     if (GET_CODE (tem) == CONST_INT && lneg)
2063                       tem = neg_const_int (mode, tem), lneg = 0;
2064
2065                     ops[i].op = tem;
2066                     ops[i].neg = lneg;
2067                     ops[j].op = NULL_RTX;
2068                     changed = 1;
2069                   }
2070               }
2071           }
2072
2073       first = 0;
2074     }
2075   while (changed);
2076
2077   /* Pack all the operands to the lower-numbered entries.  */
2078   for (i = 0, j = 0; j < n_ops; j++)
2079     if (ops[j].op)
2080       ops[i++] = ops[j];
2081   n_ops = i;
2082
2083   /* Sort the operations based on swap_commutative_operands_p.  */
2084   qsort (ops, n_ops, sizeof (*ops), simplify_plus_minus_op_data_cmp);
2085
2086   /* We suppressed creation of trivial CONST expressions in the
2087      combination loop to avoid recursion.  Create one manually now.
2088      The combination loop should have ensured that there is exactly
2089      one CONST_INT, and the sort will have ensured that it is last
2090      in the array and that any other constant will be next-to-last.  */
2091
2092   if (n_ops > 1
2093       && GET_CODE (ops[n_ops - 1].op) == CONST_INT
2094       && CONSTANT_P (ops[n_ops - 2].op))
2095     {
2096       rtx value = ops[n_ops - 1].op;
2097       if (ops[n_ops - 1].neg ^ ops[n_ops - 2].neg)
2098         value = neg_const_int (mode, value);
2099       ops[n_ops - 2].op = plus_constant (ops[n_ops - 2].op, INTVAL (value));
2100       n_ops--;
2101     }
2102
2103   /* Count the number of CONSTs that we generated.  */
2104   n_consts = 0;
2105   for (i = 0; i < n_ops; i++)
2106     if (GET_CODE (ops[i].op) == CONST)
2107       n_consts++;
2108
2109   /* Give up if we didn't reduce the number of operands we had.  Make
2110      sure we count a CONST as two operands.  If we have the same
2111      number of operands, but have made more CONSTs than before, this
2112      is also an improvement, so accept it.  */
2113   if (!force
2114       && (n_ops + n_consts > input_ops
2115           || (n_ops + n_consts == input_ops && n_consts <= input_consts)))
2116     return NULL_RTX;
2117
2118   /* Put a non-negated operand first.  If there aren't any, make all
2119      operands positive and negate the whole thing later.  */
2120
2121   negate = 0;
2122   for (i = 0; i < n_ops && ops[i].neg; i++)
2123     continue;
2124   if (i == n_ops)
2125     {
2126       for (i = 0; i < n_ops; i++)
2127         ops[i].neg = 0;
2128       negate = 1;
2129     }
2130   else if (i != 0)
2131     {
2132       tem = ops[0].op;
2133       ops[0] = ops[i];
2134       ops[i].op = tem;
2135       ops[i].neg = 1;
2136     }
2137
2138   /* Now make the result by performing the requested operations.  */
2139   result = ops[0].op;
2140   for (i = 1; i < n_ops; i++)
2141     result = gen_rtx_fmt_ee (ops[i].neg ? MINUS : PLUS,
2142                              mode, result, ops[i].op);
2143
2144   return negate ? gen_rtx_NEG (mode, result) : result;
2145 }
2146
2147 /* Like simplify_binary_operation except used for relational operators.
2148    MODE is the mode of the operands, not that of the result.  If MODE
2149    is VOIDmode, both operands must also be VOIDmode and we compare the
2150    operands in "infinite precision".
2151
2152    If no simplification is possible, this function returns zero.  Otherwise,
2153    it returns either const_true_rtx or const0_rtx.  */
2154
2155 rtx
2156 simplify_relational_operation (code, mode, op0, op1)
2157      enum rtx_code code;
2158      enum machine_mode mode;
2159      rtx op0, op1;
2160 {
2161   int equal, op0lt, op0ltu, op1lt, op1ltu;
2162   rtx tem;
2163   rtx trueop0;
2164   rtx trueop1;
2165
2166   if (mode == VOIDmode
2167       && (GET_MODE (op0) != VOIDmode
2168           || GET_MODE (op1) != VOIDmode))
2169     abort ();
2170
2171   /* If op0 is a compare, extract the comparison arguments from it.  */
2172   if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
2173     op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
2174
2175   trueop0 = avoid_constant_pool_reference (op0);
2176   trueop1 = avoid_constant_pool_reference (op1);
2177
2178   /* We can't simplify MODE_CC values since we don't know what the
2179      actual comparison is.  */
2180   if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
2181 #ifdef HAVE_cc0
2182       || op0 == cc0_rtx
2183 #endif
2184       )
2185     return 0;
2186
2187   /* Make sure the constant is second.  */
2188   if (swap_commutative_operands_p (trueop0, trueop1))
2189     {
2190       tem = op0, op0 = op1, op1 = tem;
2191       tem = trueop0, trueop0 = trueop1, trueop1 = tem;
2192       code = swap_condition (code);
2193     }
2194
2195   /* For integer comparisons of A and B maybe we can simplify A - B and can
2196      then simplify a comparison of that with zero.  If A and B are both either
2197      a register or a CONST_INT, this can't help; testing for these cases will
2198      prevent infinite recursion here and speed things up.
2199
2200      If CODE is an unsigned comparison, then we can never do this optimization,
2201      because it gives an incorrect result if the subtraction wraps around zero.
2202      ANSI C defines unsigned operations such that they never overflow, and
2203      thus such cases can not be ignored.  */
2204
2205   if (INTEGRAL_MODE_P (mode) && trueop1 != const0_rtx
2206       && ! ((GET_CODE (op0) == REG || GET_CODE (trueop0) == CONST_INT)
2207             && (GET_CODE (op1) == REG || GET_CODE (trueop1) == CONST_INT))
2208       && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
2209       && code != GTU && code != GEU && code != LTU && code != LEU)
2210     return simplify_relational_operation (signed_condition (code),
2211                                           mode, tem, const0_rtx);
2212
2213   if (flag_unsafe_math_optimizations && code == ORDERED)
2214     return const_true_rtx;
2215
2216   if (flag_unsafe_math_optimizations && code == UNORDERED)
2217     return const0_rtx;
2218
2219   /* For modes without NaNs, if the two operands are equal, we know the
2220      result.  */
2221   if (!HONOR_NANS (GET_MODE (trueop0)) && rtx_equal_p (trueop0, trueop1))
2222     equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
2223
2224   /* If the operands are floating-point constants, see if we can fold
2225      the result.  */
2226   else if (GET_CODE (trueop0) == CONST_DOUBLE
2227            && GET_CODE (trueop1) == CONST_DOUBLE
2228            && GET_MODE_CLASS (GET_MODE (trueop0)) == MODE_FLOAT)
2229     {
2230       REAL_VALUE_TYPE d0, d1;
2231
2232       REAL_VALUE_FROM_CONST_DOUBLE (d0, trueop0);
2233       REAL_VALUE_FROM_CONST_DOUBLE (d1, trueop1);
2234
2235       /* Comparisons are unordered iff at least one of the values is NaN.  */
2236       if (REAL_VALUE_ISNAN (d0) || REAL_VALUE_ISNAN (d1))
2237         switch (code)
2238           {
2239           case UNEQ:
2240           case UNLT:
2241           case UNGT:
2242           case UNLE:
2243           case UNGE:
2244           case NE:
2245           case UNORDERED:
2246             return const_true_rtx;
2247           case EQ:
2248           case LT:
2249           case GT:
2250           case LE:
2251           case GE:
2252           case LTGT:
2253           case ORDERED:
2254             return const0_rtx;
2255           default:
2256             return 0;
2257           }
2258
2259       equal = REAL_VALUES_EQUAL (d0, d1);
2260       op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
2261       op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
2262     }
2263
2264   /* Otherwise, see if the operands are both integers.  */
2265   else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
2266            && (GET_CODE (trueop0) == CONST_DOUBLE
2267                || GET_CODE (trueop0) == CONST_INT)
2268            && (GET_CODE (trueop1) == CONST_DOUBLE
2269                || GET_CODE (trueop1) == CONST_INT))
2270     {
2271       int width = GET_MODE_BITSIZE (mode);
2272       HOST_WIDE_INT l0s, h0s, l1s, h1s;
2273       unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
2274
2275       /* Get the two words comprising each integer constant.  */
2276       if (GET_CODE (trueop0) == CONST_DOUBLE)
2277         {
2278           l0u = l0s = CONST_DOUBLE_LOW (trueop0);
2279           h0u = h0s = CONST_DOUBLE_HIGH (trueop0);
2280         }
2281       else
2282         {
2283           l0u = l0s = INTVAL (trueop0);
2284           h0u = h0s = HWI_SIGN_EXTEND (l0s);
2285         }
2286
2287       if (GET_CODE (trueop1) == CONST_DOUBLE)
2288         {
2289           l1u = l1s = CONST_DOUBLE_LOW (trueop1);
2290           h1u = h1s = CONST_DOUBLE_HIGH (trueop1);
2291         }
2292       else
2293         {
2294           l1u = l1s = INTVAL (trueop1);
2295           h1u = h1s = HWI_SIGN_EXTEND (l1s);
2296         }
2297
2298       /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
2299          we have to sign or zero-extend the values.  */
2300       if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
2301         {
2302           l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
2303           l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
2304
2305           if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
2306             l0s |= ((HOST_WIDE_INT) (-1) << width);
2307
2308           if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
2309             l1s |= ((HOST_WIDE_INT) (-1) << width);
2310         }
2311       if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
2312         h0u = h1u = 0, h0s = HWI_SIGN_EXTEND (l0s), h1s = HWI_SIGN_EXTEND (l1s);
2313
2314       equal = (h0u == h1u && l0u == l1u);
2315       op0lt = (h0s < h1s || (h0s == h1s && l0u < l1u));
2316       op1lt = (h1s < h0s || (h1s == h0s && l1u < l0u));
2317       op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
2318       op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
2319     }
2320
2321   /* Otherwise, there are some code-specific tests we can make.  */
2322   else
2323     {
2324       switch (code)
2325         {
2326         case EQ:
2327           if (trueop1 == const0_rtx && nonzero_address_p (op0))
2328             return const0_rtx;
2329           break;
2330
2331         case NE:
2332           if (trueop1 == const0_rtx && nonzero_address_p (op0))
2333             return const_true_rtx;
2334           break;
2335
2336         case GEU:
2337           /* Unsigned values are never negative.  */
2338           if (trueop1 == const0_rtx)
2339             return const_true_rtx;
2340           break;
2341
2342         case LTU:
2343           if (trueop1 == const0_rtx)
2344             return const0_rtx;
2345           break;
2346
2347         case LEU:
2348           /* Unsigned values are never greater than the largest
2349              unsigned value.  */
2350           if (GET_CODE (trueop1) == CONST_INT
2351               && (unsigned HOST_WIDE_INT) INTVAL (trueop1) == GET_MODE_MASK (mode)
2352             && INTEGRAL_MODE_P (mode))
2353           return const_true_rtx;
2354           break;
2355
2356         case GTU:
2357           if (GET_CODE (trueop1) == CONST_INT
2358               && (unsigned HOST_WIDE_INT) INTVAL (trueop1) == GET_MODE_MASK (mode)
2359               && INTEGRAL_MODE_P (mode))
2360             return const0_rtx;
2361           break;
2362
2363         case LT:
2364           /* Optimize abs(x) < 0.0.  */
2365           if (trueop1 == CONST0_RTX (mode) && !HONOR_SNANS (mode))
2366             {
2367               tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
2368                                                        : trueop0;
2369               if (GET_CODE (tem) == ABS)
2370                 return const0_rtx;
2371             }
2372           break;
2373
2374         case GE:
2375           /* Optimize abs(x) >= 0.0.  */
2376           if (trueop1 == CONST0_RTX (mode) && !HONOR_NANS (mode))
2377             {
2378               tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
2379                                                        : trueop0;
2380               if (GET_CODE (tem) == ABS)
2381                 return const1_rtx;
2382             }
2383           break;
2384
2385         default:
2386           break;
2387         }
2388
2389       return 0;
2390     }
2391
2392   /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
2393      as appropriate.  */
2394   switch (code)
2395     {
2396     case EQ:
2397     case UNEQ:
2398       return equal ? const_true_rtx : const0_rtx;
2399     case NE:
2400     case LTGT:
2401       return ! equal ? const_true_rtx : const0_rtx;
2402     case LT:
2403     case UNLT:
2404       return op0lt ? const_true_rtx : const0_rtx;
2405     case GT:
2406     case UNGT:
2407       return op1lt ? const_true_rtx : const0_rtx;
2408     case LTU:
2409       return op0ltu ? const_true_rtx : const0_rtx;
2410     case GTU:
2411       return op1ltu ? const_true_rtx : const0_rtx;
2412     case LE:
2413     case UNLE:
2414       return equal || op0lt ? const_true_rtx : const0_rtx;
2415     case GE:
2416     case UNGE:
2417       return equal || op1lt ? const_true_rtx : const0_rtx;
2418     case LEU:
2419       return equal || op0ltu ? const_true_rtx : const0_rtx;
2420     case GEU:
2421       return equal || op1ltu ? const_true_rtx : const0_rtx;
2422     case ORDERED:
2423       return const_true_rtx;
2424     case UNORDERED:
2425       return const0_rtx;
2426     default:
2427       abort ();
2428     }
2429 }
2430 \f
2431 /* Simplify CODE, an operation with result mode MODE and three operands,
2432    OP0, OP1, and OP2.  OP0_MODE was the mode of OP0 before it became
2433    a constant.  Return 0 if no simplifications is possible.  */
2434
2435 rtx
2436 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
2437      enum rtx_code code;
2438      enum machine_mode mode, op0_mode;
2439      rtx op0, op1, op2;
2440 {
2441   unsigned int width = GET_MODE_BITSIZE (mode);
2442
2443   /* VOIDmode means "infinite" precision.  */
2444   if (width == 0)
2445     width = HOST_BITS_PER_WIDE_INT;
2446
2447   switch (code)
2448     {
2449     case SIGN_EXTRACT:
2450     case ZERO_EXTRACT:
2451       if (GET_CODE (op0) == CONST_INT
2452           && GET_CODE (op1) == CONST_INT
2453           && GET_CODE (op2) == CONST_INT
2454           && ((unsigned) INTVAL (op1) + (unsigned) INTVAL (op2) <= width)
2455           && width <= (unsigned) HOST_BITS_PER_WIDE_INT)
2456         {
2457           /* Extracting a bit-field from a constant */
2458           HOST_WIDE_INT val = INTVAL (op0);
2459
2460           if (BITS_BIG_ENDIAN)
2461             val >>= (GET_MODE_BITSIZE (op0_mode)
2462                      - INTVAL (op2) - INTVAL (op1));
2463           else
2464             val >>= INTVAL (op2);
2465
2466           if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
2467             {
2468               /* First zero-extend.  */
2469               val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
2470               /* If desired, propagate sign bit.  */
2471               if (code == SIGN_EXTRACT
2472                   && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
2473                 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
2474             }
2475
2476           /* Clear the bits that don't belong in our mode,
2477              unless they and our sign bit are all one.
2478              So we get either a reasonable negative value or a reasonable
2479              unsigned value for this mode.  */
2480           if (width < HOST_BITS_PER_WIDE_INT
2481               && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
2482                   != ((HOST_WIDE_INT) (-1) << (width - 1))))
2483             val &= ((HOST_WIDE_INT) 1 << width) - 1;
2484
2485           return GEN_INT (val);
2486         }
2487       break;
2488
2489     case IF_THEN_ELSE:
2490       if (GET_CODE (op0) == CONST_INT)
2491         return op0 != const0_rtx ? op1 : op2;
2492
2493       /* Convert a == b ? b : a to "a".  */
2494       if (GET_CODE (op0) == NE && ! side_effects_p (op0)
2495           && !HONOR_NANS (mode)
2496           && rtx_equal_p (XEXP (op0, 0), op1)
2497           && rtx_equal_p (XEXP (op0, 1), op2))
2498         return op1;
2499       else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
2500           && !HONOR_NANS (mode)
2501           && rtx_equal_p (XEXP (op0, 1), op1)
2502           && rtx_equal_p (XEXP (op0, 0), op2))
2503         return op2;
2504       else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
2505         {
2506           enum machine_mode cmp_mode = (GET_MODE (XEXP (op0, 0)) == VOIDmode
2507                                         ? GET_MODE (XEXP (op0, 1))
2508                                         : GET_MODE (XEXP (op0, 0)));
2509           rtx temp;
2510           if (cmp_mode == VOIDmode)
2511             cmp_mode = op0_mode;
2512           temp = simplify_relational_operation (GET_CODE (op0), cmp_mode,
2513                                                 XEXP (op0, 0), XEXP (op0, 1));
2514
2515           /* See if any simplifications were possible.  */
2516           if (temp == const0_rtx)
2517             return op2;
2518           else if (temp == const1_rtx)
2519             return op1;
2520           else if (temp)
2521             op0 = temp;
2522
2523           /* Look for happy constants in op1 and op2.  */
2524           if (GET_CODE (op1) == CONST_INT && GET_CODE (op2) == CONST_INT)
2525             {
2526               HOST_WIDE_INT t = INTVAL (op1);
2527               HOST_WIDE_INT f = INTVAL (op2);
2528
2529               if (t == STORE_FLAG_VALUE && f == 0)
2530                 code = GET_CODE (op0);
2531               else if (t == 0 && f == STORE_FLAG_VALUE)
2532                 {
2533                   enum rtx_code tmp;
2534                   tmp = reversed_comparison_code (op0, NULL_RTX);
2535                   if (tmp == UNKNOWN)
2536                     break;
2537                   code = tmp;
2538                 }
2539               else
2540                 break;
2541
2542               return gen_rtx_fmt_ee (code, mode, XEXP (op0, 0), XEXP (op0, 1));
2543             }
2544         }
2545       break;
2546     case VEC_MERGE:
2547       if (GET_MODE (op0) != mode
2548           || GET_MODE (op1) != mode
2549           || !VECTOR_MODE_P (mode))
2550         abort ();
2551       op2 = avoid_constant_pool_reference (op2);
2552       if (GET_CODE (op2) == CONST_INT)
2553         {
2554           int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
2555           unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
2556           int mask = (1<<n_elts) - 1;
2557
2558           if (!(INTVAL (op2) & mask))
2559             return op1;
2560           if ((INTVAL (op2) & mask) == mask)
2561             return op0;
2562
2563           op0 = avoid_constant_pool_reference (op0);
2564           op1 = avoid_constant_pool_reference (op1);
2565           if (GET_CODE (op0) == CONST_VECTOR
2566               && GET_CODE (op1) == CONST_VECTOR)
2567             {
2568               rtvec v = rtvec_alloc (n_elts);
2569               unsigned int i;
2570
2571               for (i = 0; i < n_elts; i++)
2572                 RTVEC_ELT (v, i) = (INTVAL (op2) & (1 << i)
2573                                     ? CONST_VECTOR_ELT (op0, i)
2574                                     : CONST_VECTOR_ELT (op1, i));
2575               return gen_rtx_CONST_VECTOR (mode, v);
2576             }
2577         }
2578       break;
2579
2580     default:
2581       abort ();
2582     }
2583
2584   return 0;
2585 }
2586
2587 /* Simplify SUBREG:OUTERMODE(OP:INNERMODE, BYTE)
2588    Return 0 if no simplifications is possible.  */
2589 rtx
2590 simplify_subreg (outermode, op, innermode, byte)
2591      rtx op;
2592      unsigned int byte;
2593      enum machine_mode outermode, innermode;
2594 {
2595   /* Little bit of sanity checking.  */
2596   if (innermode == VOIDmode || outermode == VOIDmode
2597       || innermode == BLKmode || outermode == BLKmode)
2598     abort ();
2599
2600   if (GET_MODE (op) != innermode
2601       && GET_MODE (op) != VOIDmode)
2602     abort ();
2603
2604   if (byte % GET_MODE_SIZE (outermode)
2605       || byte >= GET_MODE_SIZE (innermode))
2606     abort ();
2607
2608   if (outermode == innermode && !byte)
2609     return op;
2610
2611   /* Simplify subregs of vector constants.  */
2612   if (GET_CODE (op) == CONST_VECTOR)
2613     {
2614       int elt_size = GET_MODE_SIZE (GET_MODE_INNER (innermode));
2615       const unsigned int offset = byte / elt_size;
2616       rtx elt;
2617
2618       if (GET_MODE_INNER (innermode) == outermode)
2619         {
2620           elt = CONST_VECTOR_ELT (op, offset);
2621
2622           /* ?? We probably don't need this copy_rtx because constants
2623              can be shared.  ?? */
2624
2625           return copy_rtx (elt);
2626         }
2627       else if (GET_MODE_INNER (innermode) == GET_MODE_INNER (outermode)
2628                && GET_MODE_SIZE (innermode) > GET_MODE_SIZE (outermode))
2629         {
2630           return (gen_rtx_CONST_VECTOR
2631                   (outermode,
2632                    gen_rtvec_v (GET_MODE_NUNITS (outermode),
2633                                 &CONST_VECTOR_ELT (op, offset))));
2634         }
2635       else if (GET_MODE_CLASS (outermode) == MODE_INT
2636                && (GET_MODE_SIZE (outermode) % elt_size == 0))
2637         {
2638           /* This happens when the target register size is smaller then
2639              the vector mode, and we synthesize operations with vectors
2640              of elements that are smaller than the register size.  */
2641           HOST_WIDE_INT sum = 0, high = 0;
2642           unsigned n_elts = (GET_MODE_SIZE (outermode) / elt_size);
2643           unsigned i = BYTES_BIG_ENDIAN ? offset : offset + n_elts - 1;
2644           unsigned step = BYTES_BIG_ENDIAN ? 1 : -1;
2645           int shift = BITS_PER_UNIT * elt_size;
2646
2647           for (; n_elts--; i += step)
2648             {
2649               elt = CONST_VECTOR_ELT (op, i);
2650               if (GET_CODE (elt) == CONST_DOUBLE
2651                   && GET_MODE_CLASS (GET_MODE (elt)) == MODE_FLOAT)
2652                 {
2653                   elt = gen_lowpart_common (int_mode_for_mode (GET_MODE (elt)),
2654                                             elt);
2655                   if (! elt)
2656                     return NULL_RTX;
2657                 }
2658               if (GET_CODE (elt) != CONST_INT)
2659                 return NULL_RTX;
2660               /* Avoid overflow.  */
2661               if (high >> (HOST_BITS_PER_WIDE_INT - shift))
2662                 return NULL_RTX;
2663               high = high << shift | sum >> (HOST_BITS_PER_WIDE_INT - shift);
2664               sum = (sum << shift) + INTVAL (elt);
2665             }
2666           if (GET_MODE_BITSIZE (outermode) <= HOST_BITS_PER_WIDE_INT)
2667             return GEN_INT (trunc_int_for_mode (sum, outermode));
2668           else if (GET_MODE_BITSIZE (outermode) == 2* HOST_BITS_PER_WIDE_INT)
2669             return immed_double_const (sum, high, outermode);
2670           else
2671             return NULL_RTX;
2672         }
2673       else if (GET_MODE_CLASS (outermode) == MODE_INT
2674                && (elt_size % GET_MODE_SIZE (outermode) == 0))
2675         {
2676           enum machine_mode new_mode
2677             = int_mode_for_mode (GET_MODE_INNER (innermode));
2678           int subbyte = byte % elt_size;
2679
2680           op = simplify_subreg (new_mode, op, innermode, byte - subbyte);
2681             if (! op)
2682               return NULL_RTX;
2683           return simplify_subreg (outermode, op, new_mode, subbyte);
2684         }
2685       else if (GET_MODE_CLASS (outermode) == MODE_INT)
2686         /* This shouldn't happen, but let's not do anything stupid.  */
2687         return NULL_RTX;
2688     }
2689
2690   /* Attempt to simplify constant to non-SUBREG expression.  */
2691   if (CONSTANT_P (op))
2692     {
2693       int offset, part;
2694       unsigned HOST_WIDE_INT val = 0;
2695
2696       if (GET_MODE_CLASS (outermode) == MODE_VECTOR_INT
2697           || GET_MODE_CLASS (outermode) == MODE_VECTOR_FLOAT)
2698         {
2699           /* Construct a CONST_VECTOR from individual subregs.  */
2700           enum machine_mode submode = GET_MODE_INNER (outermode);
2701           int subsize = GET_MODE_UNIT_SIZE (outermode);
2702           int i, elts = GET_MODE_NUNITS (outermode);
2703           rtvec v = rtvec_alloc (elts);
2704           rtx elt;
2705
2706           for (i = 0; i < elts; i++, byte += subsize)
2707             {
2708               /* This might fail, e.g. if taking a subreg from a SYMBOL_REF.  */
2709               /* ??? It would be nice if we could actually make such subregs
2710                  on targets that allow such relocations.  */
2711               if (byte >= GET_MODE_UNIT_SIZE (innermode))
2712                 elt = CONST0_RTX (submode);
2713               else
2714                 elt = simplify_subreg (submode, op, innermode, byte);
2715               if (! elt)
2716                 return NULL_RTX;
2717               RTVEC_ELT (v, i) = elt;
2718             }
2719           return gen_rtx_CONST_VECTOR (outermode, v);
2720         }
2721
2722       /* ??? This code is partly redundant with code below, but can handle
2723          the subregs of floats and similar corner cases.
2724          Later it we should move all simplification code here and rewrite
2725          GEN_LOWPART_IF_POSSIBLE, GEN_HIGHPART, OPERAND_SUBWORD and friends
2726          using SIMPLIFY_SUBREG.  */
2727       if (subreg_lowpart_offset (outermode, innermode) == byte
2728           && GET_CODE (op) != CONST_VECTOR)
2729         {
2730           rtx new = gen_lowpart_if_possible (outermode, op);
2731           if (new)
2732             return new;
2733         }
2734
2735       /* Similar comment as above apply here.  */
2736       if (GET_MODE_SIZE (outermode) == UNITS_PER_WORD
2737           && GET_MODE_SIZE (innermode) > UNITS_PER_WORD
2738           && GET_MODE_CLASS (outermode) == MODE_INT)
2739         {
2740           rtx new = constant_subword (op,
2741                                       (byte / UNITS_PER_WORD),
2742                                       innermode);
2743           if (new)
2744             return new;
2745         }
2746
2747       if (GET_MODE_CLASS (outermode) != MODE_INT
2748           && GET_MODE_CLASS (outermode) != MODE_CC)
2749         {
2750           enum machine_mode new_mode = int_mode_for_mode (outermode);
2751
2752           if (new_mode != innermode || byte != 0)
2753             {
2754               op = simplify_subreg (new_mode, op, innermode, byte);
2755               if (! op)
2756                 return NULL_RTX;
2757               return simplify_subreg (outermode, op, new_mode, 0);
2758             }
2759         }
2760
2761       offset = byte * BITS_PER_UNIT;
2762       switch (GET_CODE (op))
2763         {
2764         case CONST_DOUBLE:
2765           if (GET_MODE (op) != VOIDmode)
2766             break;
2767
2768           /* We can't handle this case yet.  */
2769           if (GET_MODE_BITSIZE (outermode) >= HOST_BITS_PER_WIDE_INT)
2770             return NULL_RTX;
2771
2772           part = offset >= HOST_BITS_PER_WIDE_INT;
2773           if ((BITS_PER_WORD > HOST_BITS_PER_WIDE_INT
2774                && BYTES_BIG_ENDIAN)
2775               || (BITS_PER_WORD <= HOST_BITS_PER_WIDE_INT
2776                   && WORDS_BIG_ENDIAN))
2777             part = !part;
2778           val = part ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op);
2779           offset %= HOST_BITS_PER_WIDE_INT;
2780
2781           /* We've already picked the word we want from a double, so
2782              pretend this is actually an integer.  */
2783           innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
2784
2785           /* FALLTHROUGH */
2786         case CONST_INT:
2787           if (GET_CODE (op) == CONST_INT)
2788             val = INTVAL (op);
2789
2790           /* We don't handle synthesizing of non-integral constants yet.  */
2791           if (GET_MODE_CLASS (outermode) != MODE_INT)
2792             return NULL_RTX;
2793
2794           if (BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
2795             {
2796               if (WORDS_BIG_ENDIAN)
2797                 offset = (GET_MODE_BITSIZE (innermode)
2798                           - GET_MODE_BITSIZE (outermode) - offset);
2799               if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN
2800                   && GET_MODE_SIZE (outermode) < UNITS_PER_WORD)
2801                 offset = (offset + BITS_PER_WORD - GET_MODE_BITSIZE (outermode)
2802                           - 2 * (offset % BITS_PER_WORD));
2803             }
2804
2805           if (offset >= HOST_BITS_PER_WIDE_INT)
2806             return ((HOST_WIDE_INT) val < 0) ? constm1_rtx : const0_rtx;
2807           else
2808             {
2809               val >>= offset;
2810               if (GET_MODE_BITSIZE (outermode) < HOST_BITS_PER_WIDE_INT)
2811                 val = trunc_int_for_mode (val, outermode);
2812               return GEN_INT (val);
2813             }
2814         default:
2815           break;
2816         }
2817     }
2818
2819   /* Changing mode twice with SUBREG => just change it once,
2820      or not at all if changing back op starting mode.  */
2821   if (GET_CODE (op) == SUBREG)
2822     {
2823       enum machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
2824       int final_offset = byte + SUBREG_BYTE (op);
2825       rtx new;
2826
2827       if (outermode == innermostmode
2828           && byte == 0 && SUBREG_BYTE (op) == 0)
2829         return SUBREG_REG (op);
2830
2831       /* The SUBREG_BYTE represents offset, as if the value were stored
2832          in memory.  Irritating exception is paradoxical subreg, where
2833          we define SUBREG_BYTE to be 0.  On big endian machines, this
2834          value should be negative.  For a moment, undo this exception.  */
2835       if (byte == 0 && GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
2836         {
2837           int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
2838           if (WORDS_BIG_ENDIAN)
2839             final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2840           if (BYTES_BIG_ENDIAN)
2841             final_offset += difference % UNITS_PER_WORD;
2842         }
2843       if (SUBREG_BYTE (op) == 0
2844           && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
2845         {
2846           int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
2847           if (WORDS_BIG_ENDIAN)
2848             final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2849           if (BYTES_BIG_ENDIAN)
2850             final_offset += difference % UNITS_PER_WORD;
2851         }
2852
2853       /* See whether resulting subreg will be paradoxical.  */
2854       if (GET_MODE_SIZE (innermostmode) > GET_MODE_SIZE (outermode))
2855         {
2856           /* In nonparadoxical subregs we can't handle negative offsets.  */
2857           if (final_offset < 0)
2858             return NULL_RTX;
2859           /* Bail out in case resulting subreg would be incorrect.  */
2860           if (final_offset % GET_MODE_SIZE (outermode)
2861               || (unsigned) final_offset >= GET_MODE_SIZE (innermostmode))
2862             return NULL_RTX;
2863         }
2864       else
2865         {
2866           int offset = 0;
2867           int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (outermode));
2868
2869           /* In paradoxical subreg, see if we are still looking on lower part.
2870              If so, our SUBREG_BYTE will be 0.  */
2871           if (WORDS_BIG_ENDIAN)
2872             offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2873           if (BYTES_BIG_ENDIAN)
2874             offset += difference % UNITS_PER_WORD;
2875           if (offset == final_offset)
2876             final_offset = 0;
2877           else
2878             return NULL_RTX;
2879         }
2880
2881       /* Recurse for futher possible simplifications.  */
2882       new = simplify_subreg (outermode, SUBREG_REG (op),
2883                              GET_MODE (SUBREG_REG (op)),
2884                              final_offset);
2885       if (new)
2886         return new;
2887       return gen_rtx_SUBREG (outermode, SUBREG_REG (op), final_offset);
2888     }
2889
2890   /* SUBREG of a hard register => just change the register number
2891      and/or mode.  If the hard register is not valid in that mode,
2892      suppress this simplification.  If the hard register is the stack,
2893      frame, or argument pointer, leave this as a SUBREG.  */
2894
2895   if (REG_P (op)
2896       && (! REG_FUNCTION_VALUE_P (op)
2897           || ! rtx_equal_function_value_matters)
2898       && REGNO (op) < FIRST_PSEUDO_REGISTER
2899 #ifdef CANNOT_CHANGE_MODE_CLASS
2900       && ! (REG_CANNOT_CHANGE_MODE_P (REGNO (op), innermode, outermode)
2901             && GET_MODE_CLASS (innermode) != MODE_COMPLEX_INT
2902             && GET_MODE_CLASS (innermode) != MODE_COMPLEX_FLOAT)
2903 #endif
2904       && ((reload_completed && !frame_pointer_needed)
2905           || (REGNO (op) != FRAME_POINTER_REGNUM
2906 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2907               && REGNO (op) != HARD_FRAME_POINTER_REGNUM
2908 #endif
2909              ))
2910 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2911       && REGNO (op) != ARG_POINTER_REGNUM
2912 #endif
2913       && REGNO (op) != STACK_POINTER_REGNUM)
2914     {
2915       int final_regno = subreg_hard_regno (gen_rtx_SUBREG (outermode, op, byte),
2916                                            0);
2917
2918       /* ??? We do allow it if the current REG is not valid for
2919          its mode.  This is a kludge to work around how float/complex
2920          arguments are passed on 32-bit SPARC and should be fixed.  */
2921       if (HARD_REGNO_MODE_OK (final_regno, outermode)
2922           || ! HARD_REGNO_MODE_OK (REGNO (op), innermode))
2923         {
2924           rtx x = gen_rtx_REG_offset (op, outermode, final_regno, byte);
2925
2926           /* Propagate original regno.  We don't have any way to specify
2927              the offset inside original regno, so do so only for lowpart.
2928              The information is used only by alias analysis that can not
2929              grog partial register anyway.  */
2930
2931           if (subreg_lowpart_offset (outermode, innermode) == byte)
2932             ORIGINAL_REGNO (x) = ORIGINAL_REGNO (op);
2933           return x;
2934         }
2935     }
2936
2937   /* If we have a SUBREG of a register that we are replacing and we are
2938      replacing it with a MEM, make a new MEM and try replacing the
2939      SUBREG with it.  Don't do this if the MEM has a mode-dependent address
2940      or if we would be widening it.  */
2941
2942   if (GET_CODE (op) == MEM
2943       && ! mode_dependent_address_p (XEXP (op, 0))
2944       /* Allow splitting of volatile memory references in case we don't
2945          have instruction to move the whole thing.  */
2946       && (! MEM_VOLATILE_P (op)
2947           || ! have_insn_for (SET, innermode))
2948       && GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (GET_MODE (op)))
2949     return adjust_address_nv (op, outermode, byte);
2950
2951   /* Handle complex values represented as CONCAT
2952      of real and imaginary part.  */
2953   if (GET_CODE (op) == CONCAT)
2954     {
2955       int is_realpart = byte < GET_MODE_UNIT_SIZE (innermode);
2956       rtx part = is_realpart ? XEXP (op, 0) : XEXP (op, 1);
2957       unsigned int final_offset;
2958       rtx res;
2959
2960       final_offset = byte % (GET_MODE_UNIT_SIZE (innermode));
2961       res = simplify_subreg (outermode, part, GET_MODE (part), final_offset);
2962       if (res)
2963         return res;
2964       /* We can at least simplify it by referring directly to the relevant part.  */
2965       return gen_rtx_SUBREG (outermode, part, final_offset);
2966     }
2967
2968   return NULL_RTX;
2969 }
2970 /* Make a SUBREG operation or equivalent if it folds.  */
2971
2972 rtx
2973 simplify_gen_subreg (outermode, op, innermode, byte)
2974      rtx op;
2975      unsigned int byte;
2976      enum machine_mode outermode, innermode;
2977 {
2978   rtx new;
2979   /* Little bit of sanity checking.  */
2980   if (innermode == VOIDmode || outermode == VOIDmode
2981       || innermode == BLKmode || outermode == BLKmode)
2982     abort ();
2983
2984   if (GET_MODE (op) != innermode
2985       && GET_MODE (op) != VOIDmode)
2986     abort ();
2987
2988   if (byte % GET_MODE_SIZE (outermode)
2989       || byte >= GET_MODE_SIZE (innermode))
2990     abort ();
2991
2992   if (GET_CODE (op) == QUEUED)
2993     return NULL_RTX;
2994
2995   new = simplify_subreg (outermode, op, innermode, byte);
2996   if (new)
2997     return new;
2998
2999   if (GET_CODE (op) == SUBREG || GET_MODE (op) == VOIDmode)
3000     return NULL_RTX;
3001
3002   return gen_rtx_SUBREG (outermode, op, byte);
3003 }
3004 /* Simplify X, an rtx expression.
3005
3006    Return the simplified expression or NULL if no simplifications
3007    were possible.
3008
3009    This is the preferred entry point into the simplification routines;
3010    however, we still allow passes to call the more specific routines.
3011
3012    Right now GCC has three (yes, three) major bodies of RTL simplification
3013    code that need to be unified.
3014
3015         1. fold_rtx in cse.c.  This code uses various CSE specific
3016            information to aid in RTL simplification.
3017
3018         2. simplify_rtx in combine.c.  Similar to fold_rtx, except that
3019            it uses combine specific information to aid in RTL
3020            simplification.
3021
3022         3. The routines in this file.
3023
3024
3025    Long term we want to only have one body of simplification code; to
3026    get to that state I recommend the following steps:
3027
3028         1. Pour over fold_rtx & simplify_rtx and move any simplifications
3029            which are not pass dependent state into these routines.
3030
3031         2. As code is moved by #1, change fold_rtx & simplify_rtx to
3032            use this routine whenever possible.
3033
3034         3. Allow for pass dependent state to be provided to these
3035            routines and add simplifications based on the pass dependent
3036            state.  Remove code from cse.c & combine.c that becomes
3037            redundant/dead.
3038
3039     It will take time, but ultimately the compiler will be easier to
3040     maintain and improve.  It's totally silly that when we add a
3041     simplification that it needs to be added to 4 places (3 for RTL
3042     simplification and 1 for tree simplification.  */
3043
3044 rtx
3045 simplify_rtx (x)
3046      rtx x;
3047 {
3048   enum rtx_code code = GET_CODE (x);
3049   enum machine_mode mode = GET_MODE (x);
3050
3051   switch (GET_RTX_CLASS (code))
3052     {
3053     case '1':
3054       return simplify_unary_operation (code, mode,
3055                                        XEXP (x, 0), GET_MODE (XEXP (x, 0)));
3056     case 'c':
3057       if (swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
3058         {
3059           rtx tem;
3060
3061           tem = XEXP (x, 0);
3062           XEXP (x, 0) = XEXP (x, 1);
3063           XEXP (x, 1) = tem;
3064           return simplify_binary_operation (code, mode,
3065                                             XEXP (x, 0), XEXP (x, 1));
3066         }
3067
3068     case '2':
3069       return simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
3070
3071     case '3':
3072     case 'b':
3073       return simplify_ternary_operation (code, mode, GET_MODE (XEXP (x, 0)),
3074                                          XEXP (x, 0), XEXP (x, 1),
3075                                          XEXP (x, 2));
3076
3077     case '<':
3078       return simplify_relational_operation (code,
3079                                             ((GET_MODE (XEXP (x, 0))
3080                                               != VOIDmode)
3081                                              ? GET_MODE (XEXP (x, 0))
3082                                              : GET_MODE (XEXP (x, 1))),
3083                                             XEXP (x, 0), XEXP (x, 1));
3084     case 'x':
3085       if (code == SUBREG)
3086         return simplify_gen_subreg (mode, SUBREG_REG (x),
3087                                     GET_MODE (SUBREG_REG (x)),
3088                                     SUBREG_BYTE (x));
3089       if (code == CONSTANT_P_RTX)
3090         {
3091           if (CONSTANT_P (XEXP (x,0)))
3092             return const1_rtx;
3093         }
3094       return NULL;
3095     default:
3096       return NULL;
3097     }
3098 }