1 /* PR rtl-optimization/28982. Function foo() does the equivalent of:
3 float tmp_results[NVARS];
4 for (int i = 0; i < NVARS; i++)
7 float *ptr = ptrs[i], result = 0;
8 for (int j = 0; j < n; j++)
9 result += *ptr, ptr += inc;
10 tmp_results[i] = result;
12 memcpy (results, tmp_results, sizeof (results));
14 but without the outermost loop. The idea is to create high register
15 pressure and ensure that some INC and PTR variables are spilled.
17 On ARM targets, sequences like "result += *ptr, ptr += inc" can
18 usually be implemented using (mem (post_modify ...)), and we do
19 indeed create such MEMs before reload for this testcase. However,
20 (post_modify ...) is not a valid address for coprocessor loads, so
21 for -mfloat-abi=softfp, reload reloads the POST_MODIFY into a base
22 register. GCC did not deal correctly with cases where the base and
23 index of the POST_MODIFY are themselves reloaded. */
27 X( 0), X( 1), X( 2), X( 3), X( 4), X( 5), X( 6), X( 7), X( 8), X( 9), \
28 X(10), X(11), X(12), X(13), X(14), X(15), X(16), X(17), X(18), X(19)
30 #define DECLAREI(INDEX) inc##INDEX = incs[INDEX]
31 #define DECLAREF(INDEX) *ptr##INDEX = ptrs[INDEX], result##INDEX = 0
32 #define LOOP(INDEX) result##INDEX += *ptr##INDEX, ptr##INDEX += inc##INDEX
33 #define COPYOUT(INDEX) results[INDEX] = result##INDEX
39 void __attribute__((noinline
))
43 float MULTI (DECLAREF
);
49 float input
[NITER
* NVARS
];
56 for (i
= 0; i
< NVARS
; i
++)
57 ptrs
[i
] = input
+ i
, incs
[i
] = i
;
58 for (i
= 0; i
< NITER
* NVARS
; i
++)
61 for (i
= 0; i
< NVARS
; i
++)
62 if (results
[i
] != i
* NITER
* (NITER
+ 1) / 2)