gcc/lra-spills.c

   1 /* Change pseudos by memory.
   2    Copyright (C) 2010-2014 Free Software Foundation, Inc.
   3    Contributed by Vladimir Makarov <vmakarov@redhat.com>.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify it under
   8 the terms of the GNU General Public License as published by the Free
   9 Software Foundation; either version 3, or (at your option) any later
  10 version.
  11
  12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING3.  If not see
  19 <http://www.gnu.org/licenses/>.  */
  20
  21
  22 /* This file contains code for a pass to change spilled pseudos into
  23    memory.
  24
  25    The pass creates necessary stack slots and assigns spilled pseudos
  26    to the stack slots in following way:
  27
  28    for all spilled pseudos P most frequently used first do
  29      for all stack slots S do
  30        if P doesn't conflict with pseudos assigned to S then
  31          assign S to P and goto to the next pseudo process
  32        end
  33      end
  34      create new stack slot S and assign P to S
  35    end
  36
  37    The actual algorithm is bit more complicated because of different
  38    pseudo sizes.
  39
  40    After that the code changes spilled pseudos (except ones created
  41    from scratches) by corresponding stack slot memory in RTL.
  42
  43    If at least one stack slot was created, we need to run more passes
  44    because we have new addresses which should be checked and because
  45    the old address displacements might change and address constraints
  46    (or insn memory constraints) might not be satisfied any more.
  47
  48    For some targets, the pass can spill some pseudos into hard
  49    registers of different class (usually into vector registers)
  50    instead of spilling them into memory if it is possible and
  51    profitable.  Spilling GENERAL_REGS pseudo into SSE registers for
  52    Intel Corei7 is an example of such optimization.  And this is
  53    actually recommended by Intel optimization guide.
  54
  55    The file also contains code for final change of pseudos on hard
  56    regs correspondingly assigned to them.  */
  57
  58 #include "config.h"
  59 #include "system.h"
  60 #include "coretypes.h"
  61 #include "tm.h"
  62 #include "rtl.h"
  63 #include "tm_p.h"
  64 #include "insn-config.h"
  65 #include "recog.h"
  66 #include "output.h"
  67 #include "regs.h"
  68 #include "hard-reg-set.h"
  69 #include "flags.h"
  70 #include "function.h"
  71 #include "expr.h"
  72 #include "basic-block.h"
  73 #include "except.h"
  74 #include "timevar.h"
  75 #include "target.h"
  76 #include "lra-int.h"
  77 #include "ira.h"
  78 #include "df.h"
  79
  80
  81 /* Max regno at the start of the pass.  */
  82 static int regs_num;
  83
  84 /* Map spilled regno -> hard regno used instead of memory for
  85    spilling.  */
  86 static rtx *spill_hard_reg;
  87
  88 /* The structure describes stack slot of a spilled pseudo.  */
  89 struct pseudo_slot
  90 {
  91   /* Number (0, 1, ...) of the stack slot to which given pseudo
  92      belongs.  */
  93   int slot_num;
  94   /* First or next slot with the same slot number.  */
  95   struct pseudo_slot *next, *first;
  96   /* Memory representing the spilled pseudo.  */
  97   rtx mem;
  98 };
  99
 100 /* The stack slots for each spilled pseudo.  Indexed by regnos.  */
 101 static struct pseudo_slot *pseudo_slots;
 102
 103 /* The structure describes a register or a stack slot which can be
 104    used for several spilled pseudos.  */
 105 struct slot
 106 {
 107   /* First pseudo with given stack slot.  */
 108   int regno;
 109   /* Hard reg into which the slot pseudos are spilled.  The value is
 110      negative for pseudos spilled into memory.  */
 111   int hard_regno;
 112   /* Memory representing the all stack slot.  It can be different from
 113      memory representing a pseudo belonging to give stack slot because
 114      pseudo can be placed in a part of the corresponding stack slot.
 115      The value is NULL for pseudos spilled into a hard reg.  */
 116   rtx mem;
 117   /* Combined live ranges of all pseudos belonging to given slot.  It
 118      is used to figure out that a new spilled pseudo can use given
 119      stack slot.  */
 120   lra_live_range_t live_ranges;
 121 };
 122
 123 /* Array containing info about the stack slots.  The array element is
 124    indexed by the stack slot number in the range [0..slots_num).  */
 125 static struct slot *slots;
 126 /* The number of the stack slots currently existing.  */
 127 static int slots_num;
 128
 129 /* Set up memory of the spilled pseudo I.  The function can allocate
 130    the corresponding stack slot if it is not done yet.  */
 131 static void
 132 assign_mem_slot (int i)
 133 {
 134   rtx x = NULL_RTX;
 135   enum machine_mode mode = GET_MODE (regno_reg_rtx[i]);
 136   unsigned int inherent_size = PSEUDO_REGNO_BYTES (i);
 137   unsigned int inherent_align = GET_MODE_ALIGNMENT (mode);
 138   unsigned int max_ref_width = GET_MODE_SIZE (lra_reg_info[i].biggest_mode);
 139   unsigned int total_size = MAX (inherent_size, max_ref_width);
 140   unsigned int min_align = max_ref_width * BITS_PER_UNIT;
 141   int adjust = 0;
 142
 143   lra_assert (regno_reg_rtx[i] != NULL_RTX && REG_P (regno_reg_rtx[i])
 144               && lra_reg_info[i].nrefs != 0 && reg_renumber[i] < 0);
 145
 146   x = slots[pseudo_slots[i].slot_num].mem;
 147
 148   /* We can use a slot already allocated because it is guaranteed the
 149      slot provides both enough inherent space and enough total
 150      space.  */
 151   if (x)
 152     ;
 153   /* Each pseudo has an inherent size which comes from its own mode,
 154      and a total size which provides room for paradoxical subregs
 155      which refer to the pseudo reg in wider modes.  We allocate a new
 156      slot, making sure that it has enough inherent space and total
 157      space.  */
 158   else
 159     {
 160       rtx stack_slot;
 161
 162       /* No known place to spill from => no slot to reuse.  */
 163       x = assign_stack_local (mode, total_size,
 164                               min_align > inherent_align
 165                               || total_size > inherent_size ? -1 : 0);
 166       stack_slot = x;
 167       /* Cancel the big-endian correction done in assign_stack_local.
 168          Get the address of the beginning of the slot.  This is so we
 169          can do a big-endian correction unconditionally below.  */
 170       if (BYTES_BIG_ENDIAN)
 171         {
 172           adjust = inherent_size - total_size;
 173           if (adjust)
 174             stack_slot
 175               = adjust_address_nv (x,
 176                                    mode_for_size (total_size * BITS_PER_UNIT,
 177                                                   MODE_INT, 1),
 178                                    adjust);
 179         }
 180       slots[pseudo_slots[i].slot_num].mem = stack_slot;
 181     }
 182
 183   /* On a big endian machine, the "address" of the slot is the address
 184      of the low part that fits its inherent mode.  */
 185   if (BYTES_BIG_ENDIAN && inherent_size < total_size)
 186     adjust += (total_size - inherent_size);
 187
 188   x = adjust_address_nv (x, GET_MODE (regno_reg_rtx[i]), adjust);
 189
 190   /* Set all of the memory attributes as appropriate for a spill.  */
 191   set_mem_attrs_for_spill (x);
 192   pseudo_slots[i].mem = x;
 193 }
 194
 195 /* Sort pseudos according their usage frequencies.  */
 196 static int
 197 regno_freq_compare (const void *v1p, const void *v2p)
 198 {
 199   const int regno1 = *(const int *) v1p;
 200   const int regno2 = *(const int *) v2p;
 201   int diff;
 202
 203   if ((diff = lra_reg_info[regno2].freq - lra_reg_info[regno1].freq) != 0)
 204     return diff;
 205   return regno1 - regno2;
 206 }
 207
 208 /* Redefine STACK_GROWS_DOWNWARD in terms of 0 or 1.  */
 209 #ifdef STACK_GROWS_DOWNWARD
 210 # undef STACK_GROWS_DOWNWARD
 211 # define STACK_GROWS_DOWNWARD 1
 212 #else
 213 # define STACK_GROWS_DOWNWARD 0
 214 #endif
 215
 216 /* Sort pseudos according to their slots, putting the slots in the order
 217    that they should be allocated.  Slots with lower numbers have the highest
 218    priority and should get the smallest displacement from the stack or
 219    frame pointer (whichever is being used).
 220
 221    The first allocated slot is always closest to the frame pointer,
 222    so prefer lower slot numbers when frame_pointer_needed.  If the stack
 223    and frame grow in the same direction, then the first allocated slot is
 224    always closest to the initial stack pointer and furthest away from the
 225    final stack pointer, so allocate higher numbers first when using the
 226    stack pointer in that case.  The reverse is true if the stack and
 227    frame grow in opposite directions.  */
 228 static int
 229 pseudo_reg_slot_compare (const void *v1p, const void *v2p)
 230 {
 231   const int regno1 = *(const int *) v1p;
 232   const int regno2 = *(const int *) v2p;
 233   int diff, slot_num1, slot_num2;
 234   int total_size1, total_size2;
 235
 236   slot_num1 = pseudo_slots[regno1].slot_num;
 237   slot_num2 = pseudo_slots[regno2].slot_num;
 238   if ((diff = slot_num1 - slot_num2) != 0)
 239     return (frame_pointer_needed
 240             || !FRAME_GROWS_DOWNWARD == STACK_GROWS_DOWNWARD ? diff : -diff);
 241   total_size1 = GET_MODE_SIZE (lra_reg_info[regno1].biggest_mode);
 242   total_size2 = GET_MODE_SIZE (lra_reg_info[regno2].biggest_mode);
 243   if ((diff = total_size2 - total_size1) != 0)
 244     return diff;
 245   return regno1 - regno2;
 246 }
 247
 248 /* Assign spill hard registers to N pseudos in PSEUDO_REGNOS which is
 249    sorted in order of highest frequency first.  Put the pseudos which
 250    did not get a spill hard register at the beginning of array
 251    PSEUDO_REGNOS.  Return the number of such pseudos.  */
 252 static int
 253 assign_spill_hard_regs (int *pseudo_regnos, int n)
 254 {
 255   int i, k, p, regno, res, spill_class_size, hard_regno, nr;
 256   enum reg_class rclass, spill_class;
 257   enum machine_mode mode;
 258   lra_live_range_t r;
 259   rtx insn, set;
 260   basic_block bb;
 261   HARD_REG_SET conflict_hard_regs;
 262   bitmap_head ok_insn_bitmap;
 263   bitmap setjump_crosses = regstat_get_setjmp_crosses ();
 264   /* Hard registers which can not be used for any purpose at given
 265      program point because they are unallocatable or already allocated
 266      for other pseudos.  */
 267   HARD_REG_SET *reserved_hard_regs;
 268
 269   if (! lra_reg_spill_p)
 270     return n;
 271   /* Set up reserved hard regs for every program point.  */
 272   reserved_hard_regs = XNEWVEC (HARD_REG_SET, lra_live_max_point);
 273   for (p = 0; p < lra_live_max_point; p++)
 274     COPY_HARD_REG_SET (reserved_hard_regs[p], lra_no_alloc_regs);
 275   for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
 276     if (lra_reg_info[i].nrefs != 0
 277         && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
 278       for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
 279         for (p = r->start; p <= r->finish; p++)
 280           add_to_hard_reg_set (&reserved_hard_regs[p],
 281                                lra_reg_info[i].biggest_mode, hard_regno);
 282   bitmap_initialize (&ok_insn_bitmap, &reg_obstack);
 283   FOR_EACH_BB_FN (bb, cfun)
 284     FOR_BB_INSNS (bb, insn)
 285       if (DEBUG_INSN_P (insn)
 286           || ((set = single_set (insn)) != NULL_RTX
 287               && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set))))
 288         bitmap_set_bit (&ok_insn_bitmap, INSN_UID (insn));
 289   for (res = i = 0; i < n; i++)
 290     {
 291       regno = pseudo_regnos[i];
 292       rclass = lra_get_allocno_class (regno);
 293       if (bitmap_bit_p (setjump_crosses, regno)
 294           || (spill_class
 295               = ((enum reg_class)
 296                  targetm.spill_class ((reg_class_t) rclass,
 297                                       PSEUDO_REGNO_MODE (regno)))) == NO_REGS
 298           || bitmap_intersect_compl_p (&lra_reg_info[regno].insn_bitmap,
 299                                        &ok_insn_bitmap))
 300         {
 301           pseudo_regnos[res++] = regno;
 302           continue;
 303         }
 304       lra_assert (spill_class != NO_REGS);
 305       COPY_HARD_REG_SET (conflict_hard_regs,
 306                          lra_reg_info[regno].conflict_hard_regs);
 307       for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
 308         for (p = r->start; p <= r->finish; p++)
 309           IOR_HARD_REG_SET (conflict_hard_regs, reserved_hard_regs[p]);
 310       spill_class_size = ira_class_hard_regs_num[spill_class];
 311       mode = lra_reg_info[regno].biggest_mode;
 312       for (k = 0; k < spill_class_size; k++)
 313         {
 314           hard_regno = ira_class_hard_regs[spill_class][k];
 315           if (! overlaps_hard_reg_set_p (conflict_hard_regs, mode, hard_regno))
 316             break;
 317         }
 318       if (k >= spill_class_size)
 319         {
 320            /* There is no available regs -- assign memory later.  */
 321           pseudo_regnos[res++] = regno;
 322           continue;
 323         }
 324       if (lra_dump_file != NULL)
 325         fprintf (lra_dump_file, "  Spill r%d into hr%d\n", regno, hard_regno);
 326       /* Update reserved_hard_regs.  */
 327       for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
 328         for (p = r->start; p <= r->finish; p++)
 329           add_to_hard_reg_set (&reserved_hard_regs[p],
 330                                lra_reg_info[regno].biggest_mode, hard_regno);
 331       spill_hard_reg[regno]
 332         = gen_raw_REG (PSEUDO_REGNO_MODE (regno), hard_regno);
 333       for (nr = 0;
 334            nr < hard_regno_nregs[hard_regno][lra_reg_info[regno].biggest_mode];
 335            nr++)
 336         /* Just loop.  */
 337         df_set_regs_ever_live (hard_regno + nr, true);
 338     }
 339   bitmap_clear (&ok_insn_bitmap);
 340   free (reserved_hard_regs);
 341   return res;
 342 }
 343
 344 /* Add pseudo REGNO to slot SLOT_NUM.  */
 345 static void
 346 add_pseudo_to_slot (int regno, int slot_num)
 347 {
 348   struct pseudo_slot *first;
 349
 350   if (slots[slot_num].regno < 0)
 351     {
 352       /* It is the first pseudo in the slot.  */
 353       slots[slot_num].regno = regno;
 354       pseudo_slots[regno].first = &pseudo_slots[regno];
 355       pseudo_slots[regno].next = NULL;
 356     }
 357   else
 358     {
 359       first = pseudo_slots[regno].first = &pseudo_slots[slots[slot_num].regno];
 360       pseudo_slots[regno].next = first->next;
 361       first->next = &pseudo_slots[regno];
 362     }
 363   pseudo_slots[regno].mem = NULL_RTX;
 364   pseudo_slots[regno].slot_num = slot_num;
 365   slots[slot_num].live_ranges
 366     = lra_merge_live_ranges (slots[slot_num].live_ranges,
 367                              lra_copy_live_range_list
 368                              (lra_reg_info[regno].live_ranges));
 369 }
 370
 371 /* Assign stack slot numbers to pseudos in array PSEUDO_REGNOS of
 372    length N.  Sort pseudos in PSEUDO_REGNOS for subsequent assigning
 373    memory stack slots.  */
 374 static void
 375 assign_stack_slot_num_and_sort_pseudos (int *pseudo_regnos, int n)
 376 {
 377   int i, j, regno;
 378
 379   slots_num = 0;
 380   /* Assign stack slot numbers to spilled pseudos, use smaller numbers
 381      for most frequently used pseudos.  */
 382   for (i = 0; i < n; i++)
 383     {
 384       regno = pseudo_regnos[i];
 385       if (! flag_ira_share_spill_slots)
 386         j = slots_num;
 387       else
 388         {
 389           for (j = 0; j < slots_num; j++)
 390             if (slots[j].hard_regno < 0
 391                 && ! (lra_intersected_live_ranges_p
 392                       (slots[j].live_ranges,
 393                        lra_reg_info[regno].live_ranges)))
 394               break;
 395         }
 396       if (j >= slots_num)
 397         {
 398           /* New slot.  */
 399           slots[j].live_ranges = NULL;
 400           slots[j].regno = slots[j].hard_regno = -1;
 401           slots[j].mem = NULL_RTX;
 402           slots_num++;
 403         }
 404       add_pseudo_to_slot (regno, j);
 405     }
 406   /* Sort regnos according to their slot numbers.  */
 407   qsort (pseudo_regnos, n, sizeof (int), pseudo_reg_slot_compare);
 408 }
 409
 410 /* Recursively process LOC in INSN and change spilled pseudos to the
 411    corresponding memory or spilled hard reg.  Ignore spilled pseudos
 412    created from the scratches.  */
 413 static void
 414 remove_pseudos (rtx *loc, rtx insn)
 415 {
 416   int i;
 417   rtx hard_reg;
 418   const char *fmt;
 419   enum rtx_code code;
 420
 421   if (*loc == NULL_RTX)
 422     return;
 423   code = GET_CODE (*loc);
 424   if (code == REG && (i = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
 425       && lra_get_regno_hard_regno (i) < 0
 426       /* We do not want to assign memory for former scratches because
 427          it might result in an address reload for some targets.  In
 428          any case we transform such pseudos not getting hard registers
 429          into scratches back.  */
 430       && ! lra_former_scratch_p (i))
 431     {
 432       if ((hard_reg = spill_hard_reg[i]) != NULL_RTX)
 433         *loc = copy_rtx (hard_reg);
 434       else
 435         {
 436           rtx x = lra_eliminate_regs_1 (insn, pseudo_slots[i].mem,
 437                                         GET_MODE (pseudo_slots[i].mem),
 438                                         false, false, true);
 439           *loc = x != pseudo_slots[i].mem ? x : copy_rtx (x);
 440         }
 441       return;
 442     }
 443
 444   fmt = GET_RTX_FORMAT (code);
 445   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
 446     {
 447       if (fmt[i] == 'e')
 448         remove_pseudos (&XEXP (*loc, i), insn);
 449       else if (fmt[i] == 'E')
 450         {
 451           int j;
 452
 453           for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
 454             remove_pseudos (&XVECEXP (*loc, i, j), insn);
 455         }
 456     }
 457 }
 458
 459 /* Convert spilled pseudos into their stack slots or spill hard regs,
 460    put insns to process on the constraint stack (that is all insns in
 461    which pseudos were changed to memory or spill hard regs).   */
 462 static void
 463 spill_pseudos (void)
 464 {
 465   basic_block bb;
 466   rtx insn;
 467   int i;
 468   bitmap_head spilled_pseudos, changed_insns;
 469
 470   bitmap_initialize (&spilled_pseudos, &reg_obstack);
 471   bitmap_initialize (&changed_insns, &reg_obstack);
 472   for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
 473     {
 474       if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
 475           && ! lra_former_scratch_p (i))
 476         {
 477           bitmap_set_bit (&spilled_pseudos, i);
 478           bitmap_ior_into (&changed_insns, &lra_reg_info[i].insn_bitmap);
 479         }
 480     }
 481   FOR_EACH_BB_FN (bb, cfun)
 482     {
 483       FOR_BB_INSNS (bb, insn)
 484         if (bitmap_bit_p (&changed_insns, INSN_UID (insn)))
 485           {
 486             rtx *link_loc, link;
 487             remove_pseudos (&PATTERN (insn), insn);
 488             if (CALL_P (insn))
 489               remove_pseudos (&CALL_INSN_FUNCTION_USAGE (insn), insn);
 490             for (link_loc = &REG_NOTES (insn);
 491                  (link = *link_loc) != NULL_RTX;
 492                  link_loc = &XEXP (link, 1))
 493               {
 494                 switch (REG_NOTE_KIND (link))
 495                   {
 496                   case REG_FRAME_RELATED_EXPR:
 497                   case REG_CFA_DEF_CFA:
 498                   case REG_CFA_ADJUST_CFA:
 499                   case REG_CFA_OFFSET:
 500                   case REG_CFA_REGISTER:
 501                   case REG_CFA_EXPRESSION:
 502                   case REG_CFA_RESTORE:
 503                   case REG_CFA_SET_VDRAP:
 504                     remove_pseudos (&XEXP (link, 0), insn);
 505                     break;
 506                   default:
 507                     break;
 508                   }
 509               }
 510             if (lra_dump_file != NULL)
 511               fprintf (lra_dump_file,
 512                        "Changing spilled pseudos to memory in insn #%u\n",
 513                        INSN_UID (insn));
 514             lra_push_insn (insn);
 515             if (lra_reg_spill_p || targetm.different_addr_displacement_p ())
 516               lra_set_used_insn_alternative (insn, -1);
 517           }
 518         else if (CALL_P (insn))
 519           /* Presence of any pseudo in CALL_INSN_FUNCTION_USAGE does
 520              not affect value of insn_bitmap of the corresponding
 521              lra_reg_info.  That is because we don't need to reload
 522              pseudos in CALL_INSN_FUNCTION_USAGEs.  So if we process
 523              only insns in the insn_bitmap of given pseudo here, we
 524              can miss the pseudo in some
 525              CALL_INSN_FUNCTION_USAGEs.  */
 526           remove_pseudos (&CALL_INSN_FUNCTION_USAGE (insn), insn);
 527       bitmap_and_compl_into (df_get_live_in (bb), &spilled_pseudos);
 528       bitmap_and_compl_into (df_get_live_out (bb), &spilled_pseudos);
 529     }
 530   bitmap_clear (&spilled_pseudos);
 531   bitmap_clear (&changed_insns);
 532 }
 533
 534 /* Return true if we need to change some pseudos into memory.  */
 535 bool
 536 lra_need_for_spills_p (void)
 537 {
 538   int i; max_regno = max_reg_num ();
 539
 540   for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
 541     if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
 542         && ! lra_former_scratch_p (i))
 543       return true;
 544   return false;
 545 }
 546
 547 /* Change spilled pseudos into memory or spill hard regs.  Put changed
 548    insns on the constraint stack (these insns will be considered on
 549    the next constraint pass).  The changed insns are all insns in
 550    which pseudos were changed.  */
 551 void
 552 lra_spill (void)
 553 {
 554   int i, n, curr_regno;
 555   int *pseudo_regnos;
 556
 557   regs_num = max_reg_num ();
 558   spill_hard_reg = XNEWVEC (rtx, regs_num);
 559   pseudo_regnos = XNEWVEC (int, regs_num);
 560   for (n = 0, i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
 561     if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
 562         /* We do not want to assign memory for former scratches.  */
 563         && ! lra_former_scratch_p (i))
 564       {
 565         spill_hard_reg[i] = NULL_RTX;
 566         pseudo_regnos[n++] = i;
 567       }
 568   lra_assert (n > 0);
 569   pseudo_slots = XNEWVEC (struct pseudo_slot, regs_num);
 570   slots = XNEWVEC (struct slot, regs_num);
 571   /* Sort regnos according their usage frequencies.  */
 572   qsort (pseudo_regnos, n, sizeof (int), regno_freq_compare);
 573   n = assign_spill_hard_regs (pseudo_regnos, n);
 574   assign_stack_slot_num_and_sort_pseudos (pseudo_regnos, n);
 575   for (i = 0; i < n; i++)
 576     if (pseudo_slots[pseudo_regnos[i]].mem == NULL_RTX)
 577       assign_mem_slot (pseudo_regnos[i]);
 578   if (n > 0 && crtl->stack_alignment_needed)
 579     /* If we have a stack frame, we must align it now.  The stack size
 580        may be a part of the offset computation for register
 581        elimination.  */
 582     assign_stack_local (BLKmode, 0, crtl->stack_alignment_needed);
 583   if (lra_dump_file != NULL)
 584     {
 585       for (i = 0; i < slots_num; i++)
 586         {
 587           fprintf (lra_dump_file, "  Slot %d regnos (width = %d):", i,
 588                    GET_MODE_SIZE (GET_MODE (slots[i].mem)));
 589           for (curr_regno = slots[i].regno;;
 590                curr_regno = pseudo_slots[curr_regno].next - pseudo_slots)
 591             {
 592               fprintf (lra_dump_file, "  %d", curr_regno);
 593               if (pseudo_slots[curr_regno].next == NULL)
 594                 break;
 595             }
 596           fprintf (lra_dump_file, "\n");
 597         }
 598     }
 599   spill_pseudos ();
 600   free (slots);
 601   free (pseudo_slots);
 602   free (pseudo_regnos);
 603   free (spill_hard_reg);
 604 }
 605
 606 /* Apply alter_subreg for subregs of regs in *LOC.  Use FINAL_P for
 607    alter_subreg calls. Return true if any subreg of reg is
 608    processed.  */
 609 static bool
 610 alter_subregs (rtx *loc, bool final_p)
 611 {
 612   int i;
 613   rtx x = *loc;
 614   bool res;
 615   const char *fmt;
 616   enum rtx_code code;
 617
 618   if (x == NULL_RTX)
 619     return false;
 620   code = GET_CODE (x);
 621   if (code == SUBREG && REG_P (SUBREG_REG (x)))
 622     {
 623       lra_assert (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER);
 624       alter_subreg (loc, final_p);
 625       return true;
 626     }
 627   fmt = GET_RTX_FORMAT (code);
 628   res = false;
 629   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
 630     {
 631       if (fmt[i] == 'e')
 632         {
 633           if (alter_subregs (&XEXP (x, i), final_p))
 634             res = true;
 635         }
 636       else if (fmt[i] == 'E')
 637         {
 638           int j;
 639
 640           for (j = XVECLEN (x, i) - 1; j >= 0; j--)
 641             if (alter_subregs (&XVECEXP (x, i, j), final_p))
 642               res = true;
 643         }
 644     }
 645   return res;
 646 }
 647
 648 /* Return true if REGNO is used for return in the current
 649    function.  */
 650 static bool
 651 return_regno_p (unsigned int regno)
 652 {
 653   rtx outgoing = crtl->return_rtx;
 654
 655   if (! outgoing)
 656     return false;
 657
 658   if (REG_P (outgoing))
 659     return REGNO (outgoing) == regno;
 660   else if (GET_CODE (outgoing) == PARALLEL)
 661     {
 662       int i;
 663
 664       for (i = 0; i < XVECLEN (outgoing, 0); i++)
 665         {
 666           rtx x = XEXP (XVECEXP (outgoing, 0, i), 0);
 667
 668           if (REG_P (x) && REGNO (x) == regno)
 669             return true;
 670         }
 671     }
 672   return false;
 673 }
 674
 675 /* Final change of pseudos got hard registers into the corresponding
 676    hard registers and removing temporary clobbers.  */
 677 void
 678 lra_final_code_change (void)
 679 {
 680   int i, hard_regno;
 681   basic_block bb;
 682   rtx insn, curr;
 683   int max_regno = max_reg_num ();
 684
 685   for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
 686     if (lra_reg_info[i].nrefs != 0
 687         && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
 688       SET_REGNO (regno_reg_rtx[i], hard_regno);
 689   FOR_EACH_BB_FN (bb, cfun)
 690     FOR_BB_INSNS_SAFE (bb, insn, curr)
 691       if (INSN_P (insn))
 692         {
 693           rtx pat = PATTERN (insn);
 694
 695           if (GET_CODE (pat) == CLOBBER && LRA_TEMP_CLOBBER_P (pat))
 696             {
 697               /* Remove clobbers temporarily created in LRA.  We don't
 698                  need them anymore and don't want to waste compiler
 699                  time processing them in a few subsequent passes.  */
 700               lra_invalidate_insn_data (insn);
 701               delete_insn (insn);
 702               continue;
 703             }
 704
 705           /* IRA can generate move insns involving pseudos.  It is
 706              better remove them earlier to speed up compiler a bit.
 707              It is also better to do it here as they might not pass
 708              final RTL check in LRA, (e.g. insn moving a control
 709              register into itself).  So remove an useless move insn
 710              unless next insn is USE marking the return reg (we should
 711              save this as some subsequent optimizations assume that
 712              such original insns are saved).  */
 713           if (NONJUMP_INSN_P (insn) && GET_CODE (pat) == SET
 714               && REG_P (SET_SRC (pat)) && REG_P (SET_DEST (pat))
 715               && REGNO (SET_SRC (pat)) == REGNO (SET_DEST (pat))
 716               && ! return_regno_p (REGNO (SET_SRC (pat))))
 717             {
 718               lra_invalidate_insn_data (insn);
 719               delete_insn (insn);
 720               continue;
 721             }
 722
 723           lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
 724           struct lra_static_insn_data *static_id = id->insn_static_data;
 725           bool insn_change_p = false;
 726
 727           for (i = id->insn_static_data->n_operands - 1; i >= 0; i--)
 728             if ((DEBUG_INSN_P (insn) || ! static_id->operand[i].is_operator)
 729                 && alter_subregs (id->operand_loc[i], ! DEBUG_INSN_P (insn)))
 730               {
 731                 lra_update_dup (id, i);
 732                 insn_change_p = true;
 733               }
 734           if (insn_change_p)
 735             lra_update_operator_dups (id);
 736         }
 737 }