1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
24 #include "coretypes.h"
28 #include "insn-config.h"
30 #include "hard-reg-set.h"
32 #include "basic-block.h"
38 #include "addresses.h"
41 #define MAX_MOVE_MAX MOVE_MAX
44 #ifndef MIN_UNITS_PER_WORD
45 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
48 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
50 /* Modes for each hard register that we can save. The smallest mode is wide
51 enough to save the entire contents of the register. When saving the
52 register because it is live we first try to save in multi-register modes.
53 If that is not possible the save is done one register at a time. */
55 static enum machine_mode
56 regno_save_mode
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
58 /* For each hard register, a place on the stack where it can be saved,
62 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
64 /* We will only make a register eligible for caller-save if it can be
65 saved in its widest mode with a simple SET insn as long as the memory
66 address is valid. We record the INSN_CODE is those insns here since
67 when we emit them, the addresses might not be valid, so they might not
71 reg_save_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
73 reg_restore_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
75 /* Set of hard regs currently residing in save area (during insn scan). */
77 static HARD_REG_SET hard_regs_saved
;
79 /* Number of registers currently in hard_regs_saved. */
81 static int n_regs_saved
;
83 /* Computed by mark_referenced_regs, all regs referenced in a given
85 static HARD_REG_SET referenced_regs
;
88 static void mark_set_regs (rtx
, rtx
, void *);
89 static void mark_referenced_regs (rtx
);
90 static int insert_save (struct insn_chain
*, int, int, HARD_REG_SET
*,
92 static int insert_restore (struct insn_chain
*, int, int, int,
94 static struct insn_chain
*insert_one_insn (struct insn_chain
*, int, int,
96 static void add_stored_regs (rtx
, rtx
, void *);
98 /* Initialize for caller-save.
100 Look at all the hard registers that are used by a call and for which
101 regclass.c has not already excluded from being used across a call.
103 Ensure that we can find a mode to save the register and that there is a
104 simple insn to save and restore the register. This latter check avoids
105 problems that would occur if we tried to save the MQ register of some
106 machines directly into memory. */
109 init_caller_save (void)
115 enum machine_mode mode
;
116 rtx savepat
, restpat
;
117 rtx test_reg
, test_mem
;
118 rtx saveinsn
, restinsn
;
120 /* First find all the registers that we need to deal with and all
121 the modes that they can have. If we can't find a mode to use,
122 we can't have the register live over calls. */
124 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
126 if (call_used_regs
[i
] && ! call_fixed_regs
[i
])
128 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
130 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
,
132 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
134 call_fixed_regs
[i
] = 1;
135 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
140 regno_save_mode
[i
][1] = VOIDmode
;
143 /* The following code tries to approximate the conditions under which
144 we can easily save and restore a register without scratch registers or
145 other complexities. It will usually work, except under conditions where
146 the validity of an insn operand is dependent on the address offset.
147 No such cases are currently known.
149 We first find a typical offset from some BASE_REG_CLASS register.
150 This address is chosen by finding the first register in the class
151 and by finding the smallest power of two that is a valid offset from
152 that register in every mode we will use to save registers. */
154 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
155 if (TEST_HARD_REG_BIT
157 [(int) base_reg_class (regno_save_mode
[i
][1], PLUS
, CONST_INT
)], i
))
160 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
162 addr_reg
= gen_rtx_REG (Pmode
, i
);
164 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
166 address
= gen_rtx_PLUS (Pmode
, addr_reg
, GEN_INT (offset
));
168 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
169 if (regno_save_mode
[i
][1] != VOIDmode
170 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
173 if (i
== FIRST_PSEUDO_REGISTER
)
177 /* If we didn't find a valid address, we must use register indirect. */
181 /* Next we try to form an insn to save and restore the register. We
182 see if such an insn is recognized and meets its constraints.
184 To avoid lots of unnecessary RTL allocation, we construct all the RTL
185 once, then modify the memory and register operands in-place. */
187 test_reg
= gen_rtx_REG (VOIDmode
, 0);
188 test_mem
= gen_rtx_MEM (VOIDmode
, address
);
189 savepat
= gen_rtx_SET (VOIDmode
, test_mem
, test_reg
);
190 restpat
= gen_rtx_SET (VOIDmode
, test_reg
, test_mem
);
192 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, savepat
, -1, 0, 0);
193 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, restpat
, -1, 0, 0);
195 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
196 for (mode
= 0 ; mode
< MAX_MACHINE_MODE
; mode
++)
197 if (HARD_REGNO_MODE_OK (i
, mode
))
201 /* Update the register number and modes of the register
202 and memory operand. */
203 REGNO (test_reg
) = i
;
204 PUT_MODE (test_reg
, mode
);
205 PUT_MODE (test_mem
, mode
);
207 /* Force re-recognition of the modified insns. */
208 INSN_CODE (saveinsn
) = -1;
209 INSN_CODE (restinsn
) = -1;
211 reg_save_code
[i
][mode
] = recog_memoized (saveinsn
);
212 reg_restore_code
[i
][mode
] = recog_memoized (restinsn
);
214 /* Now extract both insns and see if we can meet their
216 ok
= (reg_save_code
[i
][mode
] != -1
217 && reg_restore_code
[i
][mode
] != -1);
220 extract_insn (saveinsn
);
221 ok
= constrain_operands (1);
222 extract_insn (restinsn
);
223 ok
&= constrain_operands (1);
228 reg_save_code
[i
][mode
] = -1;
229 reg_restore_code
[i
][mode
] = -1;
234 reg_save_code
[i
][mode
] = -1;
235 reg_restore_code
[i
][mode
] = -1;
238 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
239 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
240 if (reg_save_code
[i
][regno_save_mode
[i
][j
]] == -1)
242 regno_save_mode
[i
][j
] = VOIDmode
;
245 call_fixed_regs
[i
] = 1;
246 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
251 /* Initialize save areas by showing that we haven't allocated any yet. */
254 init_save_areas (void)
258 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
259 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
260 regno_save_mem
[i
][j
] = 0;
263 /* Allocate save areas for any hard registers that might need saving.
264 We take a conservative approach here and look for call-clobbered hard
265 registers that are assigned to pseudos that cross calls. This may
266 overestimate slightly (especially if some of these registers are later
267 used as spill registers), but it should not be significant.
271 In the fallback case we should iterate backwards across all possible
272 modes for the save, choosing the largest available one instead of
273 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
275 We do not try to use "move multiple" instructions that exist
276 on some machines (such as the 68k moveml). It could be a win to try
277 and use them when possible. The hard part is doing it in a way that is
278 machine independent since they might be saving non-consecutive
279 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
282 setup_save_areas (void)
286 HARD_REG_SET hard_regs_used
;
288 /* Allocate space in the save area for the largest multi-register
289 pseudos first, then work backwards to single register
292 /* Find and record all call-used hard-registers in this function. */
293 CLEAR_HARD_REG_SET (hard_regs_used
);
294 for (i
= FIRST_PSEUDO_REGISTER
; i
< max_regno
; i
++)
295 if (reg_renumber
[i
] >= 0 && REG_N_CALLS_CROSSED (i
) > 0)
297 unsigned int regno
= reg_renumber
[i
];
298 unsigned int endregno
299 = regno
+ hard_regno_nregs
[regno
][GET_MODE (regno_reg_rtx
[i
])];
301 for (r
= regno
; r
< endregno
; r
++)
302 if (call_used_regs
[r
])
303 SET_HARD_REG_BIT (hard_regs_used
, r
);
306 /* Now run through all the call-used hard-registers and allocate
307 space for them in the caller-save area. Try to allocate space
308 in a manner which allows multi-register saves/restores to be done. */
310 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
311 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
315 /* If no mode exists for this size, try another. Also break out
316 if we have already saved this hard register. */
317 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
320 /* See if any register in this group has been saved. */
321 for (k
= 0; k
< j
; k
++)
322 if (regno_save_mem
[i
+ k
][1])
330 for (k
= 0; k
< j
; k
++)
331 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
339 /* We have found an acceptable mode to store in. */
341 = assign_stack_local (regno_save_mode
[i
][j
],
342 GET_MODE_SIZE (regno_save_mode
[i
][j
]), 0);
344 /* Setup single word save area just in case... */
345 for (k
= 0; k
< j
; k
++)
346 /* This should not depend on WORDS_BIG_ENDIAN.
347 The order of words in regs is the same as in memory. */
348 regno_save_mem
[i
+ k
][1]
349 = adjust_address_nv (regno_save_mem
[i
][j
],
350 regno_save_mode
[i
+ k
][1],
354 /* Now loop again and set the alias set of any save areas we made to
355 the alias set used to represent frame objects. */
356 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
357 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
358 if (regno_save_mem
[i
][j
] != 0)
359 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
362 /* Find the places where hard regs are live across calls and save them. */
365 save_call_clobbered_regs (void)
367 struct insn_chain
*chain
, *next
;
368 enum machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
370 /* Computed in mark_set_regs, holds all registers set by the current
372 HARD_REG_SET this_insn_sets
;
374 CLEAR_HARD_REG_SET (hard_regs_saved
);
377 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
379 rtx insn
= chain
->insn
;
380 enum rtx_code code
= GET_CODE (insn
);
384 gcc_assert (!chain
->is_caller_save_insn
);
388 /* If some registers have been saved, see if INSN references
389 any of them. We must restore them before the insn if so. */
395 if (code
== JUMP_INSN
)
396 /* Restore all registers if this is a JUMP_INSN. */
397 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
400 CLEAR_HARD_REG_SET (referenced_regs
);
401 mark_referenced_regs (PATTERN (insn
));
402 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
405 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
406 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
407 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
, save_mode
);
410 if (code
== CALL_INSN
411 && ! SIBLING_CALL_P (insn
)
412 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
415 HARD_REG_SET hard_regs_to_save
;
416 reg_set_iterator rsi
;
418 /* Use the register life information in CHAIN to compute which
419 regs are live during the call. */
420 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
421 &chain
->live_throughout
);
422 /* Save hard registers always in the widest mode available. */
423 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
424 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
425 save_mode
[regno
] = regno_save_mode
[regno
][1];
427 save_mode
[regno
] = VOIDmode
;
429 /* Look through all live pseudos, mark their hard registers
430 and choose proper mode for saving. */
431 EXECUTE_IF_SET_IN_REG_SET
432 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
434 int r
= reg_renumber
[regno
];
436 enum machine_mode mode
;
439 nregs
= hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
440 mode
= HARD_REGNO_CALLER_SAVE_MODE
441 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
442 if (GET_MODE_BITSIZE (mode
)
443 > GET_MODE_BITSIZE (save_mode
[r
]))
446 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
449 /* Record all registers set in this call insn. These don't need
450 to be saved. N.B. the call insn might set a subreg of a
451 multi-hard-reg pseudo; then the pseudo is considered live
452 during the call, but the subreg that is set isn't. */
453 CLEAR_HARD_REG_SET (this_insn_sets
);
454 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
456 /* Compute which hard regs must be saved before this call. */
457 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
458 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
459 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
460 AND_HARD_REG_SET (hard_regs_to_save
, call_used_reg_set
);
462 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
463 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
464 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
, save_mode
);
466 /* Must recompute n_regs_saved. */
468 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
469 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
474 if (chain
->next
== 0 || chain
->next
->block
> chain
->block
)
477 /* At the end of the basic block, we must restore any registers that
478 remain saved. If the last insn in the block is a JUMP_INSN, put
479 the restore before the insn, otherwise, put it after the insn. */
482 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
483 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
484 regno
+= insert_restore (chain
, JUMP_P (insn
),
485 regno
, MOVE_MAX_WORDS
, save_mode
);
490 /* Here from note_stores, or directly from save_call_clobbered_regs, when
491 an insn stores a value in a register.
492 Set the proper bit or bits in this_insn_sets. All pseudos that have
493 been assigned hard regs have had their register number changed already,
494 so we can ignore pseudos. */
496 mark_set_regs (rtx reg
, rtx setter ATTRIBUTE_UNUSED
, void *data
)
498 int regno
, endregno
, i
;
499 enum machine_mode mode
= GET_MODE (reg
);
500 HARD_REG_SET
*this_insn_sets
= data
;
502 if (GET_CODE (reg
) == SUBREG
)
504 rtx inner
= SUBREG_REG (reg
);
505 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
507 regno
= subreg_regno (reg
);
508 endregno
= regno
+ subreg_nregs (reg
);
511 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
514 endregno
= regno
+ hard_regno_nregs
[regno
][mode
];
519 for (i
= regno
; i
< endregno
; i
++)
520 SET_HARD_REG_BIT (*this_insn_sets
, i
);
523 /* Here from note_stores when an insn stores a value in a register.
524 Set the proper bit or bits in the passed regset. All pseudos that have
525 been assigned hard regs have had their register number changed already,
526 so we can ignore pseudos. */
528 add_stored_regs (rtx reg
, rtx setter
, void *data
)
530 int regno
, endregno
, i
;
531 enum machine_mode mode
= GET_MODE (reg
);
534 if (GET_CODE (setter
) == CLOBBER
)
537 if (GET_CODE (reg
) == SUBREG
538 && REG_P (SUBREG_REG (reg
))
539 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
541 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
542 GET_MODE (SUBREG_REG (reg
)),
545 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
546 endregno
= regno
+ subreg_nregs (reg
);
550 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
553 regno
= REGNO (reg
) + offset
;
554 endregno
= regno
+ hard_regno_nregs
[regno
][mode
];
557 for (i
= regno
; i
< endregno
; i
++)
558 SET_REGNO_REG_SET ((regset
) data
, i
);
561 /* Walk X and record all referenced registers in REFERENCED_REGS. */
563 mark_referenced_regs (rtx x
)
565 enum rtx_code code
= GET_CODE (x
);
570 mark_referenced_regs (SET_SRC (x
));
571 if (code
== SET
|| code
== CLOBBER
)
575 if ((code
== REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
576 || code
== PC
|| code
== CC0
577 || (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
578 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
579 /* If we're setting only part of a multi-word register,
580 we shall mark it as referenced, because the words
581 that are not being set should be restored. */
582 && ((GET_MODE_SIZE (GET_MODE (x
))
583 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
584 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
585 <= UNITS_PER_WORD
))))
588 if (code
== MEM
|| code
== SUBREG
)
596 int regno
= REGNO (x
);
597 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
598 : reg_renumber
[regno
]);
602 int nregs
= hard_regno_nregs
[hardregno
][GET_MODE (x
)];
604 SET_HARD_REG_BIT (referenced_regs
, hardregno
+ nregs
);
606 /* If this is a pseudo that did not get a hard register, scan its
607 memory location, since it might involve the use of another
608 register, which might be saved. */
609 else if (reg_equiv_mem
[regno
] != 0)
610 mark_referenced_regs (XEXP (reg_equiv_mem
[regno
], 0));
611 else if (reg_equiv_address
[regno
] != 0)
612 mark_referenced_regs (reg_equiv_address
[regno
]);
616 fmt
= GET_RTX_FORMAT (code
);
617 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
620 mark_referenced_regs (XEXP (x
, i
));
621 else if (fmt
[i
] == 'E')
622 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
623 mark_referenced_regs (XVECEXP (x
, i
, j
));
627 /* Insert a sequence of insns to restore. Place these insns in front of
628 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
629 the maximum number of registers which should be restored during this call.
630 It should never be less than 1 since we only work with entire registers.
632 Note that we have verified in init_caller_save that we can do this
633 with a simple SET, so use it. Set INSN_CODE to what we save there
634 since the address might not be valid so the insn might not be recognized.
635 These insns will be reloaded and have register elimination done by
636 find_reload, so we need not worry about that here.
638 Return the extra number of registers saved. */
641 insert_restore (struct insn_chain
*chain
, int before_p
, int regno
,
642 int maxrestore
, enum machine_mode
*save_mode
)
647 unsigned int numregs
= 0;
648 struct insn_chain
*new;
651 /* A common failure mode if register status is not correct in the
652 RTL is for this routine to be called with a REGNO we didn't
653 expect to save. That will cause us to write an insn with a (nil)
654 SET_DEST or SET_SRC. Instead of doing so and causing a crash
655 later, check for this common case here instead. This will remove
656 one step in debugging such problems. */
657 gcc_assert (regno_save_mem
[regno
][1]);
659 /* Get the pattern to emit and update our status.
661 See if we can restore `maxrestore' registers at once. Work
662 backwards to the single register case. */
663 for (i
= maxrestore
; i
> 0; i
--)
668 if (regno_save_mem
[regno
][i
] == 0)
671 for (j
= 0; j
< i
; j
++)
672 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
677 /* Must do this one restore at a time. */
685 mem
= regno_save_mem
[regno
][numregs
];
686 if (save_mode
[regno
] != VOIDmode
687 && save_mode
[regno
] != GET_MODE (mem
)
688 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
689 mem
= adjust_address (mem
, save_mode
[regno
], 0);
691 mem
= copy_rtx (mem
);
692 pat
= gen_rtx_SET (VOIDmode
,
693 gen_rtx_REG (GET_MODE (mem
),
695 code
= reg_restore_code
[regno
][GET_MODE (mem
)];
696 new = insert_one_insn (chain
, before_p
, code
, pat
);
698 /* Clear status for all registers we restored. */
699 for (k
= 0; k
< i
; k
++)
701 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
702 SET_REGNO_REG_SET (&new->dead_or_set
, regno
+ k
);
706 /* Tell our callers how many extra registers we saved/restored. */
710 /* Like insert_restore above, but save registers instead. */
713 insert_save (struct insn_chain
*chain
, int before_p
, int regno
,
714 HARD_REG_SET (*to_save
), enum machine_mode
*save_mode
)
720 unsigned int numregs
= 0;
721 struct insn_chain
*new;
724 /* A common failure mode if register status is not correct in the
725 RTL is for this routine to be called with a REGNO we didn't
726 expect to save. That will cause us to write an insn with a (nil)
727 SET_DEST or SET_SRC. Instead of doing so and causing a crash
728 later, check for this common case here. This will remove one
729 step in debugging such problems. */
730 gcc_assert (regno_save_mem
[regno
][1]);
732 /* Get the pattern to emit and update our status.
734 See if we can save several registers with a single instruction.
735 Work backwards to the single register case. */
736 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
740 if (regno_save_mem
[regno
][i
] == 0)
743 for (j
= 0; j
< i
; j
++)
744 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
749 /* Must do this one save at a time. */
757 mem
= regno_save_mem
[regno
][numregs
];
758 if (save_mode
[regno
] != VOIDmode
759 && save_mode
[regno
] != GET_MODE (mem
)
760 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
761 mem
= adjust_address (mem
, save_mode
[regno
], 0);
763 mem
= copy_rtx (mem
);
764 pat
= gen_rtx_SET (VOIDmode
, mem
,
765 gen_rtx_REG (GET_MODE (mem
),
767 code
= reg_save_code
[regno
][GET_MODE (mem
)];
768 new = insert_one_insn (chain
, before_p
, code
, pat
);
770 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
771 for (k
= 0; k
< numregs
; k
++)
773 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
774 SET_REGNO_REG_SET (&new->dead_or_set
, regno
+ k
);
778 /* Tell our callers how many extra registers we saved/restored. */
782 /* Emit a new caller-save insn and set the code. */
783 static struct insn_chain
*
784 insert_one_insn (struct insn_chain
*chain
, int before_p
, int code
, rtx pat
)
786 rtx insn
= chain
->insn
;
787 struct insn_chain
*new;
790 /* If INSN references CC0, put our insns in front of the insn that sets
791 CC0. This is always safe, since the only way we could be passed an
792 insn that references CC0 is for a restore, and doing a restore earlier
793 isn't a problem. We do, however, assume here that CALL_INSNs don't
794 reference CC0. Guard against non-INSN's like CODE_LABEL. */
796 if ((NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
798 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
799 chain
= chain
->prev
, insn
= chain
->insn
;
802 new = new_insn_chain ();
807 new->prev
= chain
->prev
;
809 new->prev
->next
= new;
811 reload_insn_chain
= new;
815 new->insn
= emit_insn_before (pat
, insn
);
816 /* ??? It would be nice if we could exclude the already / still saved
817 registers from the live sets. */
818 COPY_REG_SET (&new->live_throughout
, &chain
->live_throughout
);
819 /* Registers that die in CHAIN->INSN still live in the new insn. */
820 for (link
= REG_NOTES (chain
->insn
); link
; link
= XEXP (link
, 1))
822 if (REG_NOTE_KIND (link
) == REG_DEAD
)
824 rtx reg
= XEXP (link
, 0);
827 gcc_assert (REG_P (reg
));
829 if (regno
>= FIRST_PSEUDO_REGISTER
)
830 regno
= reg_renumber
[regno
];
833 for (i
= hard_regno_nregs
[regno
][GET_MODE (reg
)] - 1;
835 SET_REGNO_REG_SET (&new->live_throughout
, regno
+ i
);
838 CLEAR_REG_SET (&new->dead_or_set
);
839 if (chain
->insn
== BB_HEAD (BASIC_BLOCK (chain
->block
)))
840 BB_HEAD (BASIC_BLOCK (chain
->block
)) = new->insn
;
844 new->next
= chain
->next
;
846 new->next
->prev
= new;
849 new->insn
= emit_insn_after (pat
, insn
);
850 /* ??? It would be nice if we could exclude the already / still saved
851 registers from the live sets, and observe REG_UNUSED notes. */
852 COPY_REG_SET (&new->live_throughout
, &chain
->live_throughout
);
853 /* Registers that are set in CHAIN->INSN live in the new insn.
854 (Unless there is a REG_UNUSED note for them, but we don't
855 look for them here.) */
856 note_stores (PATTERN (chain
->insn
), add_stored_regs
,
857 &new->live_throughout
);
858 CLEAR_REG_SET (&new->dead_or_set
);
859 if (chain
->insn
== BB_END (BASIC_BLOCK (chain
->block
)))
860 BB_END (BASIC_BLOCK (chain
->block
)) = new->insn
;
862 new->block
= chain
->block
;
863 new->is_caller_save_insn
= 1;
865 INSN_CODE (new->insn
) = code
;