1 /* If-conversion support.
2 Copyright (C) 2000-2016 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "cfgcleanup.h"
42 #include "tree-pass.h"
44 #include "shrink-wrap.h"
49 #ifndef MAX_CONDITIONAL_EXECUTE
50 #define MAX_CONDITIONAL_EXECUTE \
51 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
55 #define IFCVT_MULTIPLE_DUMPS 1
57 #define NULL_BLOCK ((basic_block) NULL)
59 /* True if after combine pass. */
60 static bool ifcvt_after_combine
;
62 /* True if the target has the cbranchcc4 optab. */
63 static bool have_cbranchcc4
;
65 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
66 static int num_possible_if_blocks
;
68 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
70 static int num_updated_if_blocks
;
72 /* # of changes made. */
73 static int num_true_changes
;
75 /* Whether conditional execution changes were made. */
76 static int cond_exec_changed_p
;
78 /* Forward references. */
79 static int count_bb_insns (const_basic_block
);
80 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
81 static rtx_insn
*first_active_insn (basic_block
);
82 static rtx_insn
*last_active_insn (basic_block
, int);
83 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
84 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
85 static basic_block
block_fallthru (basic_block
);
86 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
88 static rtx
cond_exec_get_condition (rtx_insn
*);
89 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
90 static int noce_operand_ok (const_rtx
);
91 static void merge_if_block (ce_if_block
*);
92 static int find_cond_trap (basic_block
, edge
, edge
);
93 static basic_block
find_if_header (basic_block
, int);
94 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
95 static int noce_find_if_block (basic_block
, edge
, edge
, int);
96 static int cond_exec_find_if_block (ce_if_block
*);
97 static int find_if_case_1 (basic_block
, edge
, edge
);
98 static int find_if_case_2 (basic_block
, edge
, edge
);
99 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
101 static void noce_emit_move_insn (rtx
, rtx
);
102 static rtx_insn
*block_has_only_trap (basic_block
);
104 /* Count the number of non-jump active insns in BB. */
107 count_bb_insns (const_basic_block bb
)
110 rtx_insn
*insn
= BB_HEAD (bb
);
114 if (active_insn_p (insn
) && !JUMP_P (insn
))
117 if (insn
== BB_END (bb
))
119 insn
= NEXT_INSN (insn
);
125 /* Determine whether the total insn_rtx_cost on non-jump insns in
126 basic block BB is less than MAX_COST. This function returns
127 false if the cost of any instruction could not be estimated.
129 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
130 as those insns are being speculated. MAX_COST is scaled with SCALE
131 plus a small fudge factor. */
134 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
137 rtx_insn
*insn
= BB_HEAD (bb
);
138 bool speed
= optimize_bb_for_speed_p (bb
);
140 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
141 applied to insn_rtx_cost when optimizing for size. Only do
142 this after combine because if-conversion might interfere with
143 passes before combine.
145 Use optimize_function_for_speed_p instead of the pre-defined
146 variable speed to make sure it is set to same value for all
147 basic blocks in one if-conversion transformation. */
148 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
149 scale
= REG_BR_PROB_BASE
;
150 /* Our branch probability/scaling factors are just estimates and don't
151 account for cases where we can get speculation for free and other
152 secondary benefits. So we fudge the scale factor to make speculating
153 appear a little more profitable when optimizing for performance. */
155 scale
+= REG_BR_PROB_BASE
/ 8;
162 if (NONJUMP_INSN_P (insn
))
164 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
168 /* If this instruction is the load or set of a "stack" register,
169 such as a floating point register on x87, then the cost of
170 speculatively executing this insn may need to include
171 the additional cost of popping its result off of the
172 register stack. Unfortunately, correctly recognizing and
173 accounting for this additional overhead is tricky, so for
174 now we simply prohibit such speculative execution. */
177 rtx set
= single_set (insn
);
178 if (set
&& STACK_REG_P (SET_DEST (set
)))
184 if (count
>= max_cost
)
187 else if (CALL_P (insn
))
190 if (insn
== BB_END (bb
))
192 insn
= NEXT_INSN (insn
);
198 /* Return the first non-jump active insn in the basic block. */
201 first_active_insn (basic_block bb
)
203 rtx_insn
*insn
= BB_HEAD (bb
);
207 if (insn
== BB_END (bb
))
209 insn
= NEXT_INSN (insn
);
212 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
214 if (insn
== BB_END (bb
))
216 insn
= NEXT_INSN (insn
);
225 /* Return the last non-jump active (non-jump) insn in the basic block. */
228 last_active_insn (basic_block bb
, int skip_use_p
)
230 rtx_insn
*insn
= BB_END (bb
);
231 rtx_insn
*head
= BB_HEAD (bb
);
235 || DEBUG_INSN_P (insn
)
237 && NONJUMP_INSN_P (insn
)
238 && GET_CODE (PATTERN (insn
)) == USE
))
242 insn
= PREV_INSN (insn
);
251 /* Return the active insn before INSN inside basic block CURR_BB. */
254 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
256 if (!insn
|| insn
== BB_HEAD (curr_bb
))
259 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
261 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
264 /* No other active insn all the way to the start of the basic block. */
265 if (insn
== BB_HEAD (curr_bb
))
272 /* Return the active insn after INSN inside basic block CURR_BB. */
275 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
277 if (!insn
|| insn
== BB_END (curr_bb
))
280 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
282 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
285 /* No other active insn all the way to the end of the basic block. */
286 if (insn
== BB_END (curr_bb
))
293 /* Return the basic block reached by falling though the basic block BB. */
296 block_fallthru (basic_block bb
)
298 edge e
= find_fallthru_edge (bb
->succs
);
300 return (e
) ? e
->dest
: NULL_BLOCK
;
303 /* Return true if RTXs A and B can be safely interchanged. */
306 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
308 if (!rtx_equal_p (a
, b
))
311 if (GET_CODE (a
) != MEM
)
314 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
315 reference is not. Interchanging a dead type-unsafe memory reference with
316 a live type-safe one creates a live type-unsafe memory reference, in other
317 words, it makes the program illegal.
318 We check here conservatively whether the two memory references have equal
319 memory attributes. */
321 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
325 /* Go through a bunch of insns, converting them to conditional
326 execution format if possible. Return TRUE if all of the non-note
327 insns were processed. */
330 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
331 /* if block information */rtx_insn
*start
,
332 /* first insn to look at */rtx end
,
333 /* last insn to look at */rtx test
,
334 /* conditional execution test */int prob_val
,
335 /* probability of branch taken. */int mod_ok
)
337 int must_be_last
= FALSE
;
345 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
347 /* dwarf2out can't cope with conditional prologues. */
348 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
351 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
354 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
356 /* dwarf2out can't cope with conditional unwind info. */
357 if (RTX_FRAME_RELATED_P (insn
))
360 /* Remove USE insns that get in the way. */
361 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
363 /* ??? Ug. Actually unlinking the thing is problematic,
364 given what we'd have to coordinate with our callers. */
365 SET_INSN_DELETED (insn
);
369 /* Last insn wasn't last? */
373 if (modified_in_p (test
, insn
))
380 /* Now build the conditional form of the instruction. */
381 pattern
= PATTERN (insn
);
382 xtest
= copy_rtx (test
);
384 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
386 if (GET_CODE (pattern
) == COND_EXEC
)
388 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
391 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
392 COND_EXEC_TEST (pattern
));
393 pattern
= COND_EXEC_CODE (pattern
);
396 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
398 /* If the machine needs to modify the insn being conditionally executed,
399 say for example to force a constant integer operand into a temp
400 register, do so here. */
401 #ifdef IFCVT_MODIFY_INSN
402 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
407 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
409 if (CALL_P (insn
) && prob_val
>= 0)
410 validate_change (insn
, ®_NOTES (insn
),
411 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
412 prob_val
, REG_NOTES (insn
)), 1);
422 /* Return the condition for a jump. Do not do any special processing. */
425 cond_exec_get_condition (rtx_insn
*jump
)
429 if (any_condjump_p (jump
))
430 test_if
= SET_SRC (pc_set (jump
));
433 cond
= XEXP (test_if
, 0);
435 /* If this branches to JUMP_LABEL when the condition is false,
436 reverse the condition. */
437 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
438 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
440 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
444 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
451 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
452 to conditional execution. Return TRUE if we were successful at
453 converting the block. */
456 cond_exec_process_if_block (ce_if_block
* ce_info
,
457 /* if block information */int do_multiple_p
)
459 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
460 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
461 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
462 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
463 rtx_insn
*then_start
; /* first insn in THEN block */
464 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
465 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
466 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
467 int max
; /* max # of insns to convert. */
468 int then_mod_ok
; /* whether conditional mods are ok in THEN */
469 rtx true_expr
; /* test for else block insns */
470 rtx false_expr
; /* test for then block insns */
471 int true_prob_val
; /* probability of else block */
472 int false_prob_val
; /* probability of then block */
473 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
474 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
475 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
476 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
477 int then_n_insns
, else_n_insns
, n_insns
;
478 enum rtx_code false_code
;
481 /* If test is comprised of && or || elements, and we've failed at handling
482 all of them together, just use the last test if it is the special case of
483 && elements without an ELSE block. */
484 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
486 if (else_bb
|| ! ce_info
->and_and_p
)
489 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
490 ce_info
->num_multiple_test_blocks
= 0;
491 ce_info
->num_and_and_blocks
= 0;
492 ce_info
->num_or_or_blocks
= 0;
495 /* Find the conditional jump to the ELSE or JOIN part, and isolate
497 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
501 /* If the conditional jump is more than just a conditional jump,
502 then we can not do conditional execution conversion on this block. */
503 if (! onlyjump_p (BB_END (test_bb
)))
506 /* Collect the bounds of where we're to search, skipping any labels, jumps
507 and notes at the beginning and end of the block. Then count the total
508 number of insns and see if it is small enough to convert. */
509 then_start
= first_active_insn (then_bb
);
510 then_end
= last_active_insn (then_bb
, TRUE
);
511 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
512 n_insns
= then_n_insns
;
513 max
= MAX_CONDITIONAL_EXECUTE
;
520 else_start
= first_active_insn (else_bb
);
521 else_end
= last_active_insn (else_bb
, TRUE
);
522 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
523 n_insns
+= else_n_insns
;
525 /* Look for matching sequences at the head and tail of the two blocks,
526 and limit the range of insns to be converted if possible. */
527 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
528 &then_first_tail
, &else_first_tail
,
530 if (then_first_tail
== BB_HEAD (then_bb
))
531 then_start
= then_end
= NULL
;
532 if (else_first_tail
== BB_HEAD (else_bb
))
533 else_start
= else_end
= NULL
;
538 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
540 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
541 n_insns
-= 2 * n_matching
;
546 && then_n_insns
> n_matching
547 && else_n_insns
> n_matching
)
549 int longest_match
= MIN (then_n_insns
- n_matching
,
550 else_n_insns
- n_matching
);
552 = flow_find_head_matching_sequence (then_bb
, else_bb
,
561 /* We won't pass the insns in the head sequence to
562 cond_exec_process_insns, so we need to test them here
563 to make sure that they don't clobber the condition. */
564 for (insn
= BB_HEAD (then_bb
);
565 insn
!= NEXT_INSN (then_last_head
);
566 insn
= NEXT_INSN (insn
))
567 if (!LABEL_P (insn
) && !NOTE_P (insn
)
568 && !DEBUG_INSN_P (insn
)
569 && modified_in_p (test_expr
, insn
))
573 if (then_last_head
== then_end
)
574 then_start
= then_end
= NULL
;
575 if (else_last_head
== else_end
)
576 else_start
= else_end
= NULL
;
581 then_start
= find_active_insn_after (then_bb
, then_last_head
);
583 else_start
= find_active_insn_after (else_bb
, else_last_head
);
584 n_insns
-= 2 * n_matching
;
592 /* Map test_expr/test_jump into the appropriate MD tests to use on
593 the conditionally executed code. */
595 true_expr
= test_expr
;
597 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
598 if (false_code
!= UNKNOWN
)
599 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
600 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
602 false_expr
= NULL_RTX
;
604 #ifdef IFCVT_MODIFY_TESTS
605 /* If the machine description needs to modify the tests, such as setting a
606 conditional execution register from a comparison, it can do so here. */
607 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
609 /* See if the conversion failed. */
610 if (!true_expr
|| !false_expr
)
614 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
617 true_prob_val
= XINT (note
, 0);
618 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
626 /* If we have && or || tests, do them here. These tests are in the adjacent
627 blocks after the first block containing the test. */
628 if (ce_info
->num_multiple_test_blocks
> 0)
630 basic_block bb
= test_bb
;
631 basic_block last_test_bb
= ce_info
->last_test_bb
;
638 rtx_insn
*start
, *end
;
640 enum rtx_code f_code
;
642 bb
= block_fallthru (bb
);
643 start
= first_active_insn (bb
);
644 end
= last_active_insn (bb
, TRUE
);
646 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
647 false_prob_val
, FALSE
))
650 /* If the conditional jump is more than just a conditional jump, then
651 we can not do conditional execution conversion on this block. */
652 if (! onlyjump_p (BB_END (bb
)))
655 /* Find the conditional jump and isolate the test. */
656 t
= cond_exec_get_condition (BB_END (bb
));
660 f_code
= reversed_comparison_code (t
, BB_END (bb
));
661 if (f_code
== UNKNOWN
)
664 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
665 if (ce_info
->and_and_p
)
667 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
668 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
672 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
673 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
676 /* If the machine description needs to modify the tests, such as
677 setting a conditional execution register from a comparison, it can
679 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
680 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
682 /* See if the conversion failed. */
690 while (bb
!= last_test_bb
);
693 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
694 on then THEN block. */
695 then_mod_ok
= (else_bb
== NULL_BLOCK
);
697 /* Go through the THEN and ELSE blocks converting the insns if possible
698 to conditional execution. */
702 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
703 false_expr
, false_prob_val
,
707 if (else_bb
&& else_end
708 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
709 true_expr
, true_prob_val
, TRUE
))
712 /* If we cannot apply the changes, fail. Do not go through the normal fail
713 processing, since apply_change_group will call cancel_changes. */
714 if (! apply_change_group ())
716 #ifdef IFCVT_MODIFY_CANCEL
717 /* Cancel any machine dependent changes. */
718 IFCVT_MODIFY_CANCEL (ce_info
);
723 #ifdef IFCVT_MODIFY_FINAL
724 /* Do any machine dependent final modifications. */
725 IFCVT_MODIFY_FINAL (ce_info
);
728 /* Conversion succeeded. */
730 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
731 n_insns
, (n_insns
== 1) ? " was" : "s were");
733 /* Merge the blocks! If we had matching sequences, make sure to delete one
734 copy at the appropriate location first: delete the copy in the THEN branch
735 for a tail sequence so that the remaining one is executed last for both
736 branches, and delete the copy in the ELSE branch for a head sequence so
737 that the remaining one is executed first for both branches. */
740 rtx_insn
*from
= then_first_tail
;
742 from
= find_active_insn_after (then_bb
, from
);
743 delete_insn_chain (from
, get_last_bb_insn (then_bb
), false);
746 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
748 merge_if_block (ce_info
);
749 cond_exec_changed_p
= TRUE
;
753 #ifdef IFCVT_MODIFY_CANCEL
754 /* Cancel any machine dependent changes. */
755 IFCVT_MODIFY_CANCEL (ce_info
);
762 /* Used by noce_process_if_block to communicate with its subroutines.
764 The subroutines know that A and B may be evaluated freely. They
765 know that X is a register. They should insert new instructions
766 before cond_earliest. */
770 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
771 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
773 /* The jump that ends TEST_BB. */
776 /* The jump condition. */
779 /* New insns should be inserted before this one. */
780 rtx_insn
*cond_earliest
;
782 /* Insns in the THEN and ELSE block. There is always just this
783 one insns in those blocks. The insns are single_set insns.
784 If there was no ELSE block, INSN_B is the last insn before
785 COND_EARLIEST, or NULL_RTX. In the former case, the insn
786 operands are still valid, as if INSN_B was moved down below
788 rtx_insn
*insn_a
, *insn_b
;
790 /* The SET_SRC of INSN_A and INSN_B. */
793 /* The SET_DEST of INSN_A. */
796 /* The original set destination that the THEN and ELSE basic blocks finally
797 write their result to. */
799 /* True if this if block is not canonical. In the canonical form of
800 if blocks, the THEN_BB is the block reached via the fallthru edge
801 from TEST_BB. For the noce transformations, we allow the symmetric
803 bool then_else_reversed
;
805 /* True if the contents of then_bb and else_bb are a
806 simple single set instruction. */
810 /* The total rtx cost of the instructions in then_bb and else_bb. */
811 unsigned int then_cost
;
812 unsigned int else_cost
;
814 /* Estimated cost of the particular branch instruction. */
815 unsigned int branch_cost
;
818 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
819 static int noce_try_move (struct noce_if_info
*);
820 static int noce_try_store_flag (struct noce_if_info
*);
821 static int noce_try_addcc (struct noce_if_info
*);
822 static int noce_try_store_flag_constants (struct noce_if_info
*);
823 static int noce_try_store_flag_mask (struct noce_if_info
*);
824 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
826 static int noce_try_cmove (struct noce_if_info
*);
827 static int noce_try_cmove_arith (struct noce_if_info
*);
828 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
829 static int noce_try_minmax (struct noce_if_info
*);
830 static int noce_try_abs (struct noce_if_info
*);
831 static int noce_try_sign_mask (struct noce_if_info
*);
833 /* Helper function for noce_try_store_flag*. */
836 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
839 rtx cond
= if_info
->cond
;
843 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
844 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
846 /* If earliest == jump, or when the condition is complex, try to
847 build the store_flag insn directly. */
851 rtx set
= pc_set (if_info
->jump
);
852 cond
= XEXP (SET_SRC (set
), 0);
853 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
854 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
855 reversep
= !reversep
;
856 if (if_info
->then_else_reversed
)
857 reversep
= !reversep
;
861 code
= reversed_comparison_code (cond
, if_info
->jump
);
863 code
= GET_CODE (cond
);
865 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
866 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
868 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
870 rtx set
= gen_rtx_SET (x
, src
);
873 rtx_insn
*insn
= emit_insn (set
);
875 if (recog_memoized (insn
) >= 0)
877 rtx_insn
*seq
= get_insns ();
881 if_info
->cond_earliest
= if_info
->jump
;
889 /* Don't even try if the comparison operands or the mode of X are weird. */
890 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
893 return emit_store_flag (x
, code
, XEXP (cond
, 0),
894 XEXP (cond
, 1), VOIDmode
,
895 (code
== LTU
|| code
== LEU
896 || code
== GEU
|| code
== GTU
), normalize
);
899 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
900 X is the destination/target and Y is the value to copy. */
903 noce_emit_move_insn (rtx x
, rtx y
)
905 machine_mode outmode
;
909 if (GET_CODE (x
) != STRICT_LOW_PART
)
911 rtx_insn
*seq
, *insn
;
916 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
917 otherwise construct a suitable SET pattern ourselves. */
918 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
919 ? emit_move_insn (x
, y
)
920 : emit_insn (gen_rtx_SET (x
, y
));
924 if (recog_memoized (insn
) <= 0)
926 if (GET_CODE (x
) == ZERO_EXTRACT
)
928 rtx op
= XEXP (x
, 0);
929 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
930 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
932 /* store_bit_field expects START to be relative to
933 BYTES_BIG_ENDIAN and adjusts this value for machines with
934 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
935 invoke store_bit_field again it is necessary to have the START
936 value from the first call. */
937 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
940 start
= BITS_PER_UNIT
- start
- size
;
943 gcc_assert (REG_P (op
));
944 start
= BITS_PER_WORD
- start
- size
;
948 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
949 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
953 switch (GET_RTX_CLASS (GET_CODE (y
)))
956 ot
= code_to_optab (GET_CODE (y
));
960 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
961 if (target
!= NULL_RTX
)
964 emit_move_insn (x
, target
);
973 ot
= code_to_optab (GET_CODE (y
));
977 target
= expand_binop (GET_MODE (y
), ot
,
978 XEXP (y
, 0), XEXP (y
, 1),
980 if (target
!= NULL_RTX
)
983 emit_move_insn (x
, target
);
1000 inner
= XEXP (outer
, 0);
1001 outmode
= GET_MODE (outer
);
1002 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1003 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1004 0, 0, outmode
, y
, false);
1007 /* Return the CC reg if it is used in COND. */
1010 cc_in_cond (rtx cond
)
1012 if (have_cbranchcc4
&& cond
1013 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1014 return XEXP (cond
, 0);
1019 /* Return sequence of instructions generated by if conversion. This
1020 function calls end_sequence() to end the current stream, ensures
1021 that the instructions are unshared, recognizable non-jump insns.
1022 On failure, this function returns a NULL_RTX. */
1025 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1028 rtx_insn
*seq
= get_insns ();
1029 rtx cc
= cc_in_cond (if_info
->cond
);
1031 set_used_flags (if_info
->x
);
1032 set_used_flags (if_info
->cond
);
1033 set_used_flags (if_info
->a
);
1034 set_used_flags (if_info
->b
);
1036 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1037 set_used_flags (insn
);
1039 unshare_all_rtl_in_chain (seq
);
1042 /* Make sure that all of the instructions emitted are recognizable,
1043 and that we haven't introduced a new jump instruction.
1044 As an exercise for the reader, build a general mechanism that
1045 allows proper placement of required clobbers. */
1046 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1048 || recog_memoized (insn
) == -1
1049 /* Make sure new generated code does not clobber CC. */
1050 || (cc
&& set_of (cc
, insn
)))
1056 /* Return true iff the then and else basic block (if it exists)
1057 consist of a single simple set instruction. */
1060 noce_simple_bbs (struct noce_if_info
*if_info
)
1062 if (!if_info
->then_simple
)
1065 if (if_info
->else_bb
)
1066 return if_info
->else_simple
;
1071 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1072 "if (a == b) x = a; else x = b" into "x = b". */
1075 noce_try_move (struct noce_if_info
*if_info
)
1077 rtx cond
= if_info
->cond
;
1078 enum rtx_code code
= GET_CODE (cond
);
1082 if (code
!= NE
&& code
!= EQ
)
1085 if (!noce_simple_bbs (if_info
))
1088 /* This optimization isn't valid if either A or B could be a NaN
1089 or a signed zero. */
1090 if (HONOR_NANS (if_info
->x
)
1091 || HONOR_SIGNED_ZEROS (if_info
->x
))
1094 /* Check whether the operands of the comparison are A and in
1096 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1097 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1098 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1099 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1101 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1104 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1106 /* Avoid generating the move if the source is the destination. */
1107 if (! rtx_equal_p (if_info
->x
, y
))
1110 noce_emit_move_insn (if_info
->x
, y
);
1111 seq
= end_ifcvt_sequence (if_info
);
1115 emit_insn_before_setloc (seq
, if_info
->jump
,
1116 INSN_LOCATION (if_info
->insn_a
));
1123 /* Convert "if (test) x = 1; else x = 0".
1125 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1126 tried in noce_try_store_flag_constants after noce_try_cmove has had
1127 a go at the conversion. */
1130 noce_try_store_flag (struct noce_if_info
*if_info
)
1136 if (!noce_simple_bbs (if_info
))
1139 if (CONST_INT_P (if_info
->b
)
1140 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1141 && if_info
->a
== const0_rtx
)
1143 else if (if_info
->b
== const0_rtx
1144 && CONST_INT_P (if_info
->a
)
1145 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1146 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1154 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1157 if (target
!= if_info
->x
)
1158 noce_emit_move_insn (if_info
->x
, target
);
1160 seq
= end_ifcvt_sequence (if_info
);
1164 emit_insn_before_setloc (seq
, if_info
->jump
,
1165 INSN_LOCATION (if_info
->insn_a
));
1176 /* Convert "if (test) x = -A; else x = A" into
1177 x = A; if (test) x = -x if the machine can do the
1178 conditional negate form of this cheaply.
1179 Try this before noce_try_cmove that will just load the
1180 immediates into two registers and do a conditional select
1181 between them. If the target has a conditional negate or
1182 conditional invert operation we can save a potentially
1183 expensive constant synthesis. */
1186 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1188 if (!noce_simple_bbs (if_info
))
1191 if (!CONST_INT_P (if_info
->a
)
1192 || !CONST_INT_P (if_info
->b
)
1193 || !REG_P (if_info
->x
))
1196 machine_mode mode
= GET_MODE (if_info
->x
);
1198 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1199 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1201 rtx cond
= if_info
->cond
;
1209 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1211 else if (val_a
== ~val_b
)
1219 rtx tmp
= gen_reg_rtx (mode
);
1220 noce_emit_move_insn (tmp
, if_info
->a
);
1222 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1226 rtx_insn
*seq
= get_insns ();
1234 if (target
!= if_info
->x
)
1235 noce_emit_move_insn (if_info
->x
, target
);
1237 seq
= end_ifcvt_sequence (if_info
);
1242 emit_insn_before_setloc (seq
, if_info
->jump
,
1243 INSN_LOCATION (if_info
->insn_a
));
1252 /* Convert "if (test) x = a; else x = b", for A and B constant.
1253 Also allow A = y + c1, B = y + c2, with a common y between A
1257 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1262 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1265 machine_mode mode
= GET_MODE (if_info
->x
);;
1266 rtx common
= NULL_RTX
;
1271 /* Handle cases like x := test ? y + 3 : y + 4. */
1272 if (GET_CODE (a
) == PLUS
1273 && GET_CODE (b
) == PLUS
1274 && CONST_INT_P (XEXP (a
, 1))
1275 && CONST_INT_P (XEXP (b
, 1))
1276 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1277 && noce_operand_ok (XEXP (a
, 0))
1278 && if_info
->branch_cost
>= 2)
1280 common
= XEXP (a
, 0);
1285 if (!noce_simple_bbs (if_info
))
1291 ifalse
= INTVAL (a
);
1293 bool subtract_flag_p
= false;
1295 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1296 /* Make sure we can represent the difference between the two values. */
1298 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1301 diff
= trunc_int_for_mode (diff
, mode
);
1303 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1307 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1310 /* We could collapse these cases but it is easier to follow the
1311 diff/STORE_FLAG_VALUE combinations when they are listed
1315 => 4 + (test != 0). */
1316 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1319 => can_reverse | 4 + (test == 0)
1320 !can_reverse | 3 - (test != 0). */
1321 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1323 reversep
= can_reverse
;
1324 subtract_flag_p
= !can_reverse
;
1325 /* If we need to subtract the flag and we have PLUS-immediate
1326 A and B then it is unlikely to be beneficial to play tricks
1328 if (subtract_flag_p
&& common
)
1332 => can_reverse | 3 + (test == 0)
1333 !can_reverse | 4 - (test != 0). */
1334 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1336 reversep
= can_reverse
;
1337 subtract_flag_p
= !can_reverse
;
1338 /* If we need to subtract the flag and we have PLUS-immediate
1339 A and B then it is unlikely to be beneficial to play tricks
1341 if (subtract_flag_p
&& common
)
1345 => 4 + (test != 0). */
1346 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1351 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1352 && (STORE_FLAG_VALUE
== 1
1353 || if_info
->branch_cost
>= 2))
1355 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1356 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1361 else if (itrue
== -1
1362 && (STORE_FLAG_VALUE
== -1
1363 || if_info
->branch_cost
>= 2))
1365 else if (ifalse
== -1 && can_reverse
1366 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1376 std::swap (itrue
, ifalse
);
1377 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1382 /* If we have x := test ? x + 3 : x + 4 then move the original
1383 x out of the way while we store flags. */
1384 if (common
&& rtx_equal_p (common
, if_info
->x
))
1386 common
= gen_reg_rtx (mode
);
1387 noce_emit_move_insn (common
, if_info
->x
);
1390 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1397 /* if (test) x = 3; else x = 4;
1398 => x = 3 + (test == 0); */
1399 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1401 /* Add the common part now. This may allow combine to merge this
1402 with the store flag operation earlier into some sort of conditional
1403 increment/decrement if the target allows it. */
1405 target
= expand_simple_binop (mode
, PLUS
,
1407 target
, 0, OPTAB_WIDEN
);
1409 /* Always use ifalse here. It should have been swapped with itrue
1410 when appropriate when reversep is true. */
1411 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1412 gen_int_mode (ifalse
, mode
), target
,
1413 if_info
->x
, 0, OPTAB_WIDEN
);
1415 /* Other cases are not beneficial when the original A and B are PLUS
1422 /* if (test) x = 8; else x = 0;
1423 => x = (test != 0) << 3; */
1424 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1426 target
= expand_simple_binop (mode
, ASHIFT
,
1427 target
, GEN_INT (tmp
), if_info
->x
, 0,
1431 /* if (test) x = -1; else x = b;
1432 => x = -(test != 0) | b; */
1433 else if (itrue
== -1)
1435 target
= expand_simple_binop (mode
, IOR
,
1436 target
, gen_int_mode (ifalse
, mode
),
1437 if_info
->x
, 0, OPTAB_WIDEN
);
1451 if (target
!= if_info
->x
)
1452 noce_emit_move_insn (if_info
->x
, target
);
1454 seq
= end_ifcvt_sequence (if_info
);
1458 emit_insn_before_setloc (seq
, if_info
->jump
,
1459 INSN_LOCATION (if_info
->insn_a
));
1466 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1467 similarly for "foo--". */
1470 noce_try_addcc (struct noce_if_info
*if_info
)
1474 int subtract
, normalize
;
1476 if (!noce_simple_bbs (if_info
))
1479 if (GET_CODE (if_info
->a
) == PLUS
1480 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1481 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1484 rtx cond
= if_info
->cond
;
1485 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1487 /* First try to use addcc pattern. */
1488 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1489 && general_operand (XEXP (cond
, 1), VOIDmode
))
1492 target
= emit_conditional_add (if_info
->x
, code
,
1497 XEXP (if_info
->a
, 1),
1498 GET_MODE (if_info
->x
),
1499 (code
== LTU
|| code
== GEU
1500 || code
== LEU
|| code
== GTU
));
1503 if (target
!= if_info
->x
)
1504 noce_emit_move_insn (if_info
->x
, target
);
1506 seq
= end_ifcvt_sequence (if_info
);
1510 emit_insn_before_setloc (seq
, if_info
->jump
,
1511 INSN_LOCATION (if_info
->insn_a
));
1517 /* If that fails, construct conditional increment or decrement using
1519 if (if_info
->branch_cost
>= 2
1520 && (XEXP (if_info
->a
, 1) == const1_rtx
1521 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1524 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1525 subtract
= 0, normalize
= 0;
1526 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1527 subtract
= 1, normalize
= 0;
1529 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1532 target
= noce_emit_store_flag (if_info
,
1533 gen_reg_rtx (GET_MODE (if_info
->x
)),
1537 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1538 subtract
? MINUS
: PLUS
,
1539 if_info
->b
, target
, if_info
->x
,
1543 if (target
!= if_info
->x
)
1544 noce_emit_move_insn (if_info
->x
, target
);
1546 seq
= end_ifcvt_sequence (if_info
);
1550 emit_insn_before_setloc (seq
, if_info
->jump
,
1551 INSN_LOCATION (if_info
->insn_a
));
1561 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1564 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1570 if (!noce_simple_bbs (if_info
))
1574 if ((if_info
->branch_cost
>= 2
1575 || STORE_FLAG_VALUE
== -1)
1576 && ((if_info
->a
== const0_rtx
1577 && rtx_equal_p (if_info
->b
, if_info
->x
))
1578 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1581 && if_info
->b
== const0_rtx
1582 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1585 target
= noce_emit_store_flag (if_info
,
1586 gen_reg_rtx (GET_MODE (if_info
->x
)),
1589 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1591 target
, if_info
->x
, 0,
1596 int old_cost
, new_cost
, insn_cost
;
1599 if (target
!= if_info
->x
)
1600 noce_emit_move_insn (if_info
->x
, target
);
1602 seq
= end_ifcvt_sequence (if_info
);
1606 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1607 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1608 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1609 new_cost
= seq_cost (seq
, speed_p
);
1611 if (new_cost
> old_cost
)
1614 emit_insn_before_setloc (seq
, if_info
->jump
,
1615 INSN_LOCATION (if_info
->insn_a
));
1625 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1628 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1629 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1631 rtx target ATTRIBUTE_UNUSED
;
1632 int unsignedp ATTRIBUTE_UNUSED
;
1634 /* If earliest == jump, try to build the cmove insn directly.
1635 This is helpful when combine has created some complex condition
1636 (like for alpha's cmovlbs) that we can't hope to regenerate
1637 through the normal interface. */
1639 if (if_info
->cond_earliest
== if_info
->jump
)
1641 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1642 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1643 cond
, vtrue
, vfalse
);
1644 rtx set
= gen_rtx_SET (x
, if_then_else
);
1647 rtx_insn
*insn
= emit_insn (set
);
1649 if (recog_memoized (insn
) >= 0)
1651 rtx_insn
*seq
= get_insns ();
1661 /* Don't even try if the comparison operands are weird
1662 except that the target supports cbranchcc4. */
1663 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1664 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1666 if (!have_cbranchcc4
1667 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1668 || cmp_b
!= const0_rtx
)
1672 unsignedp
= (code
== LTU
|| code
== GEU
1673 || code
== LEU
|| code
== GTU
);
1675 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1676 vtrue
, vfalse
, GET_MODE (x
),
1681 /* We might be faced with a situation like:
1684 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1685 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1687 We can't do a conditional move in mode M, but it's possible that we
1688 could do a conditional move in mode N instead and take a subreg of
1691 If we can't create new pseudos, though, don't bother. */
1692 if (reload_completed
)
1695 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1697 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1698 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1699 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1700 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1701 rtx promoted_target
;
1703 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1704 || byte_vtrue
!= byte_vfalse
1705 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1706 != SUBREG_PROMOTED_VAR_P (vfalse
))
1707 || (SUBREG_PROMOTED_GET (vtrue
)
1708 != SUBREG_PROMOTED_GET (vfalse
)))
1711 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1713 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1714 VOIDmode
, reg_vtrue
, reg_vfalse
,
1715 GET_MODE (reg_vtrue
), unsignedp
);
1716 /* Nope, couldn't do it in that mode either. */
1720 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1721 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1722 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1723 emit_move_insn (x
, target
);
1730 /* Try only simple constants and registers here. More complex cases
1731 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1732 has had a go at it. */
1735 noce_try_cmove (struct noce_if_info
*if_info
)
1741 if (!noce_simple_bbs (if_info
))
1744 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1745 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1749 code
= GET_CODE (if_info
->cond
);
1750 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1751 XEXP (if_info
->cond
, 0),
1752 XEXP (if_info
->cond
, 1),
1753 if_info
->a
, if_info
->b
);
1757 if (target
!= if_info
->x
)
1758 noce_emit_move_insn (if_info
->x
, target
);
1760 seq
= end_ifcvt_sequence (if_info
);
1764 emit_insn_before_setloc (seq
, if_info
->jump
,
1765 INSN_LOCATION (if_info
->insn_a
));
1768 /* If both a and b are constants try a last-ditch transformation:
1769 if (test) x = a; else x = b;
1770 => x = (-(test != 0) & (b - a)) + a;
1771 Try this only if the target-specific expansion above has failed.
1772 The target-specific expander may want to generate sequences that
1773 we don't know about, so give them a chance before trying this
1775 else if (!targetm
.have_conditional_execution ()
1776 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1777 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1778 || if_info
->branch_cost
>= 3))
1780 machine_mode mode
= GET_MODE (if_info
->x
);
1781 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1782 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1783 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1790 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1791 /* Make sure we can represent the difference
1792 between the two values. */
1794 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1800 diff
= trunc_int_for_mode (diff
, mode
);
1801 target
= expand_simple_binop (mode
, AND
,
1802 target
, gen_int_mode (diff
, mode
),
1803 if_info
->x
, 0, OPTAB_WIDEN
);
1805 target
= expand_simple_binop (mode
, PLUS
,
1806 target
, gen_int_mode (ifalse
, mode
),
1807 if_info
->x
, 0, OPTAB_WIDEN
);
1810 if (target
!= if_info
->x
)
1811 noce_emit_move_insn (if_info
->x
, target
);
1813 seq
= end_ifcvt_sequence (if_info
);
1817 emit_insn_before_setloc (seq
, if_info
->jump
,
1818 INSN_LOCATION (if_info
->insn_a
));
1834 /* Return true if X contains a conditional code mode rtx. */
1837 contains_ccmode_rtx_p (rtx x
)
1839 subrtx_iterator::array_type array
;
1840 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1841 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1847 /* Helper for bb_valid_for_noce_process_p. Validate that
1848 the rtx insn INSN is a single set that does not set
1849 the conditional register CC and is in general valid for
1853 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1856 || !NONJUMP_INSN_P (insn
)
1857 || (cc
&& set_of (cc
, insn
)))
1860 rtx sset
= single_set (insn
);
1862 /* Currently support only simple single sets in test_bb. */
1864 || !noce_operand_ok (SET_DEST (sset
))
1865 || contains_ccmode_rtx_p (SET_DEST (sset
))
1866 || !noce_operand_ok (SET_SRC (sset
)))
1873 /* Return true iff the registers that the insns in BB_A set do not get
1874 used in BB_B. If TO_RENAME is non-NULL then it is a location that will be
1875 renamed later by the caller and so conflicts on it should be ignored
1876 in this function. */
1879 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
, rtx to_rename
)
1882 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1887 FOR_BB_INSNS (bb_a
, a_insn
)
1889 if (!active_insn_p (a_insn
))
1892 rtx sset_a
= single_set (a_insn
);
1896 BITMAP_FREE (bba_sets
);
1899 /* Record all registers that BB_A sets. */
1900 FOR_EACH_INSN_DEF (def
, a_insn
)
1901 if (!(to_rename
&& DF_REF_REG (def
) == to_rename
))
1902 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1907 FOR_BB_INSNS (bb_b
, b_insn
)
1909 if (!active_insn_p (b_insn
))
1912 rtx sset_b
= single_set (b_insn
);
1916 BITMAP_FREE (bba_sets
);
1920 /* Make sure this is a REG and not some instance
1921 of ZERO_EXTRACT or SUBREG or other dangerous stuff.
1922 If we have a memory destination then we have a pair of simple
1923 basic blocks performing an operation of the form [addr] = c ? a : b.
1924 bb_valid_for_noce_process_p will have ensured that these are
1925 the only stores present. In that case [addr] should be the location
1926 to be renamed. Assert that the callers set this up properly. */
1927 if (MEM_P (SET_DEST (sset_b
)))
1928 gcc_assert (rtx_equal_p (SET_DEST (sset_b
), to_rename
));
1929 else if (!REG_P (SET_DEST (sset_b
)))
1931 BITMAP_FREE (bba_sets
);
1935 /* If the insn uses a reg set in BB_A return false. */
1936 FOR_EACH_INSN_USE (use
, b_insn
)
1938 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1940 BITMAP_FREE (bba_sets
);
1947 BITMAP_FREE (bba_sets
);
1951 /* Emit copies of all the active instructions in BB except the last.
1952 This is a helper for noce_try_cmove_arith. */
1955 noce_emit_all_but_last (basic_block bb
)
1957 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
1959 FOR_BB_INSNS (bb
, insn
)
1961 if (insn
!= last
&& active_insn_p (insn
))
1963 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
1965 emit_insn (PATTERN (to_emit
));
1970 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
1971 the resulting insn or NULL if it's not a valid insn. */
1974 noce_emit_insn (rtx to_emit
)
1976 gcc_assert (to_emit
);
1977 rtx_insn
*insn
= emit_insn (to_emit
);
1979 if (recog_memoized (insn
) < 0)
1985 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
1986 and including the penultimate one in BB if it is not simple
1987 (as indicated by SIMPLE). Then emit LAST_INSN as the last
1988 insn in the block. The reason for that is that LAST_INSN may
1989 have been modified by the preparation in noce_try_cmove_arith. */
1992 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
1995 noce_emit_all_but_last (bb
);
1997 if (last_insn
&& !noce_emit_insn (last_insn
))
2003 /* Try more complex cases involving conditional_move. */
2006 noce_try_cmove_arith (struct noce_if_info
*if_info
)
2012 rtx_insn
*insn_a
, *insn_b
;
2013 bool a_simple
= if_info
->then_simple
;
2014 bool b_simple
= if_info
->else_simple
;
2015 basic_block then_bb
= if_info
->then_bb
;
2016 basic_block else_bb
= if_info
->else_bb
;
2020 rtx_insn
*ifcvt_seq
;
2022 /* A conditional move from two memory sources is equivalent to a
2023 conditional on their addresses followed by a load. Don't do this
2024 early because it'll screw alias analysis. Note that we've
2025 already checked for no side effects. */
2026 /* ??? FIXME: Magic number 5. */
2027 if (cse_not_expected
2028 && MEM_P (a
) && MEM_P (b
)
2029 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
2030 && if_info
->branch_cost
>= 5)
2032 machine_mode address_mode
= get_address_mode (a
);
2036 x
= gen_reg_rtx (address_mode
);
2040 /* ??? We could handle this if we knew that a load from A or B could
2041 not trap or fault. This is also true if we've already loaded
2042 from the address along the path from ENTRY. */
2043 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2046 /* if (test) x = a + b; else x = c - d;
2053 code
= GET_CODE (if_info
->cond
);
2054 insn_a
= if_info
->insn_a
;
2055 insn_b
= if_info
->insn_b
;
2057 machine_mode x_mode
= GET_MODE (x
);
2059 if (!can_conditionally_move_p (x_mode
))
2062 unsigned int then_cost
;
2063 unsigned int else_cost
;
2065 then_cost
= if_info
->then_cost
;
2070 else_cost
= if_info
->else_cost
;
2074 /* We're going to execute one of the basic blocks anyway, so
2075 bail out if the most expensive of the two blocks is unacceptable. */
2076 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
2079 /* Possibly rearrange operands to make things come out more natural. */
2080 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
2083 if (rtx_equal_p (b
, x
))
2085 else if (general_operand (b
, GET_MODE (b
)))
2090 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2092 std::swap (insn_a
, insn_b
);
2093 std::swap (a_simple
, b_simple
);
2094 std::swap (then_bb
, else_bb
);
2098 if (then_bb
&& else_bb
2099 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
, if_info
->orig_x
)
2100 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
, if_info
->orig_x
)))
2105 /* If one of the blocks is empty then the corresponding B or A value
2106 came from the test block. The non-empty complex block that we will
2107 emit might clobber the register used by B or A, so move it to a pseudo
2110 rtx tmp_a
= NULL_RTX
;
2111 rtx tmp_b
= NULL_RTX
;
2113 if (b_simple
|| !else_bb
)
2114 tmp_b
= gen_reg_rtx (x_mode
);
2116 if (a_simple
|| !then_bb
)
2117 tmp_a
= gen_reg_rtx (x_mode
);
2122 rtx emit_a
= NULL_RTX
;
2123 rtx emit_b
= NULL_RTX
;
2124 rtx_insn
*tmp_insn
= NULL
;
2125 bool modified_in_a
= false;
2126 bool modified_in_b
= false;
2127 /* If either operand is complex, load it into a register first.
2128 The best way to do this is to copy the original insn. In this
2129 way we preserve any clobbers etc that the insn may have had.
2130 This is of course not possible in the IS_MEM case. */
2132 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2137 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2138 emit_a
= gen_rtx_SET (reg
, a
);
2144 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2146 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2147 rtx set
= single_set (copy_of_a
);
2150 emit_a
= PATTERN (copy_of_a
);
2154 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2155 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2161 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2165 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2166 emit_b
= gen_rtx_SET (reg
, b
);
2172 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2173 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2174 rtx set
= single_set (copy_of_b
);
2177 emit_b
= PATTERN (copy_of_b
);
2181 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2182 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2188 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2189 if (tmp_b
&& then_bb
)
2191 FOR_BB_INSNS (then_bb
, tmp_insn
)
2192 /* Don't check inside insn_a. We will have changed it to emit_a
2193 with a destination that doesn't conflict. */
2194 if (!(insn_a
&& tmp_insn
== insn_a
)
2195 && modified_in_p (orig_b
, tmp_insn
))
2197 modified_in_a
= true;
2203 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2204 if (tmp_a
&& else_bb
)
2206 FOR_BB_INSNS (else_bb
, tmp_insn
)
2207 /* Don't check inside insn_b. We will have changed it to emit_b
2208 with a destination that doesn't conflict. */
2209 if (!(insn_b
&& tmp_insn
== insn_b
)
2210 && modified_in_p (orig_a
, tmp_insn
))
2212 modified_in_b
= true;
2217 /* If insn to set up A clobbers any registers B depends on, try to
2218 swap insn that sets up A with the one that sets up B. If even
2219 that doesn't help, punt. */
2220 if (modified_in_a
&& !modified_in_b
)
2222 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2223 goto end_seq_and_fail
;
2225 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2226 goto end_seq_and_fail
;
2228 else if (!modified_in_a
)
2230 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2231 goto end_seq_and_fail
;
2233 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2234 goto end_seq_and_fail
;
2237 goto end_seq_and_fail
;
2239 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2240 XEXP (if_info
->cond
, 1), a
, b
);
2243 goto end_seq_and_fail
;
2245 /* If we're handling a memory for above, emit the load now. */
2248 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2250 /* Copy over flags as appropriate. */
2251 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2252 MEM_VOLATILE_P (mem
) = 1;
2253 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2254 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2256 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2258 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2259 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2261 noce_emit_move_insn (if_info
->x
, mem
);
2263 else if (target
!= x
)
2264 noce_emit_move_insn (x
, target
);
2266 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2270 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2271 INSN_LOCATION (if_info
->insn_a
));
2279 /* For most cases, the simplified condition we found is the best
2280 choice, but this is not the case for the min/max/abs transforms.
2281 For these we wish to know that it is A or B in the condition. */
2284 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2285 rtx_insn
**earliest
)
2291 /* If target is already mentioned in the known condition, return it. */
2292 if (reg_mentioned_p (target
, if_info
->cond
))
2294 *earliest
= if_info
->cond_earliest
;
2295 return if_info
->cond
;
2298 set
= pc_set (if_info
->jump
);
2299 cond
= XEXP (SET_SRC (set
), 0);
2301 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2302 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2303 if (if_info
->then_else_reversed
)
2306 /* If we're looking for a constant, try to make the conditional
2307 have that constant in it. There are two reasons why it may
2308 not have the constant we want:
2310 1. GCC may have needed to put the constant in a register, because
2311 the target can't compare directly against that constant. For
2312 this case, we look for a SET immediately before the comparison
2313 that puts a constant in that register.
2315 2. GCC may have canonicalized the conditional, for example
2316 replacing "if x < 4" with "if x <= 3". We can undo that (or
2317 make equivalent types of changes) to get the constants we need
2318 if they're off by one in the right direction. */
2320 if (CONST_INT_P (target
))
2322 enum rtx_code code
= GET_CODE (if_info
->cond
);
2323 rtx op_a
= XEXP (if_info
->cond
, 0);
2324 rtx op_b
= XEXP (if_info
->cond
, 1);
2325 rtx_insn
*prev_insn
;
2327 /* First, look to see if we put a constant in a register. */
2328 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2330 && BLOCK_FOR_INSN (prev_insn
)
2331 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2332 && INSN_P (prev_insn
)
2333 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2335 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2337 src
= SET_SRC (PATTERN (prev_insn
));
2338 if (CONST_INT_P (src
))
2340 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2342 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2345 if (CONST_INT_P (op_a
))
2347 std::swap (op_a
, op_b
);
2348 code
= swap_condition (code
);
2353 /* Now, look to see if we can get the right constant by
2354 adjusting the conditional. */
2355 if (CONST_INT_P (op_b
))
2357 HOST_WIDE_INT desired_val
= INTVAL (target
);
2358 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2363 if (actual_val
== desired_val
+ 1)
2366 op_b
= GEN_INT (desired_val
);
2370 if (actual_val
== desired_val
- 1)
2373 op_b
= GEN_INT (desired_val
);
2377 if (actual_val
== desired_val
- 1)
2380 op_b
= GEN_INT (desired_val
);
2384 if (actual_val
== desired_val
+ 1)
2387 op_b
= GEN_INT (desired_val
);
2395 /* If we made any changes, generate a new conditional that is
2396 equivalent to what we started with, but has the right
2398 if (code
!= GET_CODE (if_info
->cond
)
2399 || op_a
!= XEXP (if_info
->cond
, 0)
2400 || op_b
!= XEXP (if_info
->cond
, 1))
2402 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2403 *earliest
= if_info
->cond_earliest
;
2408 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2409 earliest
, target
, have_cbranchcc4
, true);
2410 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2413 /* We almost certainly searched back to a different place.
2414 Need to re-verify correct lifetimes. */
2416 /* X may not be mentioned in the range (cond_earliest, jump]. */
2417 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2418 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2421 /* A and B may not be modified in the range [cond_earliest, jump). */
2422 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2424 && (modified_in_p (if_info
->a
, insn
)
2425 || modified_in_p (if_info
->b
, insn
)))
2431 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2434 noce_try_minmax (struct noce_if_info
*if_info
)
2437 rtx_insn
*earliest
, *seq
;
2438 enum rtx_code code
, op
;
2441 if (!noce_simple_bbs (if_info
))
2444 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2445 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2446 to get the target to tell us... */
2447 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2448 || HONOR_NANS (if_info
->x
))
2451 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2455 /* Verify the condition is of the form we expect, and canonicalize
2456 the comparison code. */
2457 code
= GET_CODE (cond
);
2458 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2460 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2463 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2465 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2467 code
= swap_condition (code
);
2472 /* Determine what sort of operation this is. Note that the code is for
2473 a taken branch, so the code->operation mapping appears backwards. */
2506 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2507 if_info
->a
, if_info
->b
,
2508 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2514 if (target
!= if_info
->x
)
2515 noce_emit_move_insn (if_info
->x
, target
);
2517 seq
= end_ifcvt_sequence (if_info
);
2521 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2522 if_info
->cond
= cond
;
2523 if_info
->cond_earliest
= earliest
;
2528 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2529 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2533 noce_try_abs (struct noce_if_info
*if_info
)
2535 rtx cond
, target
, a
, b
, c
;
2536 rtx_insn
*earliest
, *seq
;
2538 bool one_cmpl
= false;
2540 if (!noce_simple_bbs (if_info
))
2543 /* Reject modes with signed zeros. */
2544 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2547 /* Recognize A and B as constituting an ABS or NABS. The canonical
2548 form is a branch around the negation, taken when the object is the
2549 first operand of a comparison against 0 that evaluates to true. */
2552 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2554 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2559 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2564 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2573 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2577 /* Verify the condition is of the form we expect. */
2578 if (rtx_equal_p (XEXP (cond
, 0), b
))
2580 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2588 /* Verify that C is zero. Search one step backward for a
2589 REG_EQUAL note or a simple source if necessary. */
2593 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2595 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2596 && (set
= single_set (insn
))
2597 && rtx_equal_p (SET_DEST (set
), c
))
2599 rtx note
= find_reg_equal_equiv_note (insn
);
2609 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2610 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2611 c
= get_pool_constant (XEXP (c
, 0));
2613 /* Work around funny ideas get_condition has wrt canonicalization.
2614 Note that these rtx constants are known to be CONST_INT, and
2615 therefore imply integer comparisons.
2616 The one_cmpl case is more complicated, as we want to handle
2617 only x < 0 ? ~x : x or x >= 0 ? x : ~x to one_cmpl_abs (x)
2618 and x < 0 ? x : ~x or x >= 0 ? ~x : x to ~one_cmpl_abs (x),
2619 but not other cases (x > -1 is equivalent of x >= 0). */
2620 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2622 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2627 else if (c
== CONST0_RTX (GET_MODE (b
)))
2630 && GET_CODE (cond
) != GE
2631 && GET_CODE (cond
) != LT
)
2637 /* Determine what sort of operation this is. */
2638 switch (GET_CODE (cond
))
2657 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2660 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2662 /* ??? It's a quandary whether cmove would be better here, especially
2663 for integers. Perhaps combine will clean things up. */
2664 if (target
&& negate
)
2667 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2670 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2680 if (target
!= if_info
->x
)
2681 noce_emit_move_insn (if_info
->x
, target
);
2683 seq
= end_ifcvt_sequence (if_info
);
2687 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2688 if_info
->cond
= cond
;
2689 if_info
->cond_earliest
= earliest
;
2694 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2697 noce_try_sign_mask (struct noce_if_info
*if_info
)
2703 bool t_unconditional
;
2705 if (!noce_simple_bbs (if_info
))
2708 cond
= if_info
->cond
;
2709 code
= GET_CODE (cond
);
2714 if (if_info
->a
== const0_rtx
)
2716 if ((code
== LT
&& c
== const0_rtx
)
2717 || (code
== LE
&& c
== constm1_rtx
))
2720 else if (if_info
->b
== const0_rtx
)
2722 if ((code
== GE
&& c
== const0_rtx
)
2723 || (code
== GT
&& c
== constm1_rtx
))
2727 if (! t
|| side_effects_p (t
))
2730 /* We currently don't handle different modes. */
2731 mode
= GET_MODE (t
);
2732 if (GET_MODE (m
) != mode
)
2735 /* This is only profitable if T is unconditionally executed/evaluated in the
2736 original insn sequence or T is cheap. The former happens if B is the
2737 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2738 INSN_B which can happen for e.g. conditional stores to memory. For the
2739 cost computation use the block TEST_BB where the evaluation will end up
2740 after the transformation. */
2743 && (if_info
->insn_b
== NULL_RTX
2744 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2745 if (!(t_unconditional
2746 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2747 < COSTS_N_INSNS (2))))
2751 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2752 "(signed) m >> 31" directly. This benefits targets with specialized
2753 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2754 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2755 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2764 noce_emit_move_insn (if_info
->x
, t
);
2766 seq
= end_ifcvt_sequence (if_info
);
2770 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2775 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2779 noce_try_bitop (struct noce_if_info
*if_info
)
2781 rtx cond
, x
, a
, result
;
2788 cond
= if_info
->cond
;
2789 code
= GET_CODE (cond
);
2791 if (!noce_simple_bbs (if_info
))
2794 /* Check for no else condition. */
2795 if (! rtx_equal_p (x
, if_info
->b
))
2798 /* Check for a suitable condition. */
2799 if (code
!= NE
&& code
!= EQ
)
2801 if (XEXP (cond
, 1) != const0_rtx
)
2803 cond
= XEXP (cond
, 0);
2805 /* ??? We could also handle AND here. */
2806 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2808 if (XEXP (cond
, 1) != const1_rtx
2809 || !CONST_INT_P (XEXP (cond
, 2))
2810 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2812 bitnum
= INTVAL (XEXP (cond
, 2));
2813 mode
= GET_MODE (x
);
2814 if (BITS_BIG_ENDIAN
)
2815 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2816 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2823 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2825 /* Check for "if (X & C) x = x op C". */
2826 if (! rtx_equal_p (x
, XEXP (a
, 0))
2827 || !CONST_INT_P (XEXP (a
, 1))
2828 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2829 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2832 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2833 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2834 if (GET_CODE (a
) == IOR
)
2835 result
= (code
== NE
) ? a
: NULL_RTX
;
2836 else if (code
== NE
)
2838 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2839 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2840 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2844 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2845 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2846 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2849 else if (GET_CODE (a
) == AND
)
2851 /* Check for "if (X & C) x &= ~C". */
2852 if (! rtx_equal_p (x
, XEXP (a
, 0))
2853 || !CONST_INT_P (XEXP (a
, 1))
2854 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2855 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2858 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2859 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2860 result
= (code
== EQ
) ? a
: NULL_RTX
;
2868 noce_emit_move_insn (x
, result
);
2869 seq
= end_ifcvt_sequence (if_info
);
2873 emit_insn_before_setloc (seq
, if_info
->jump
,
2874 INSN_LOCATION (if_info
->insn_a
));
2880 /* Similar to get_condition, only the resulting condition must be
2881 valid at JUMP, instead of at EARLIEST.
2883 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2884 THEN block of the caller, and we have to reverse the condition. */
2887 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2892 if (! any_condjump_p (jump
))
2895 set
= pc_set (jump
);
2897 /* If this branches to JUMP_LABEL when the condition is false,
2898 reverse the condition. */
2899 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2900 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2902 /* We may have to reverse because the caller's if block is not canonical,
2903 i.e. the THEN block isn't the fallthrough block for the TEST block
2904 (see find_if_header). */
2905 if (then_else_reversed
)
2908 /* If the condition variable is a register and is MODE_INT, accept it. */
2910 cond
= XEXP (SET_SRC (set
), 0);
2911 tmp
= XEXP (cond
, 0);
2912 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2913 && (GET_MODE (tmp
) != BImode
2914 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2919 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2920 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2924 /* Otherwise, fall back on canonicalize_condition to do the dirty
2925 work of manipulating MODE_CC values and COMPARE rtx codes. */
2926 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2927 NULL_RTX
, have_cbranchcc4
, true);
2929 /* We don't handle side-effects in the condition, like handling
2930 REG_INC notes and making sure no duplicate conditions are emitted. */
2931 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2937 /* Return true if OP is ok for if-then-else processing. */
2940 noce_operand_ok (const_rtx op
)
2942 if (side_effects_p (op
))
2945 /* We special-case memories, so handle any of them with
2946 no address side effects. */
2948 return ! side_effects_p (XEXP (op
, 0));
2950 return ! may_trap_p (op
);
2953 /* Return true if X contains a MEM subrtx. */
2956 contains_mem_rtx_p (rtx x
)
2958 subrtx_iterator::array_type array
;
2959 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
2966 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
2967 The condition used in this if-conversion is in COND.
2968 In practice, check that TEST_BB ends with a single set
2969 x := a and all previous computations
2970 in TEST_BB don't produce any values that are live after TEST_BB.
2971 In other words, all the insns in TEST_BB are there only
2972 to compute a value for x. Put the rtx cost of the insns
2973 in TEST_BB into COST. Record whether TEST_BB is a single simple
2974 set instruction in SIMPLE_P. */
2977 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
2978 unsigned int *cost
, bool *simple_p
)
2983 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
2984 rtx last_set
= NULL_RTX
;
2986 rtx cc
= cc_in_cond (cond
);
2988 if (!insn_valid_noce_process_p (last_insn
, cc
))
2990 last_set
= single_set (last_insn
);
2992 rtx x
= SET_DEST (last_set
);
2993 rtx_insn
*first_insn
= first_active_insn (test_bb
);
2994 rtx first_set
= single_set (first_insn
);
2999 /* We have a single simple set, that's okay. */
3000 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3002 if (first_insn
== last_insn
)
3004 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3005 *cost
= insn_rtx_cost (first_set
, speed_p
);
3009 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3010 gcc_assert (prev_last_insn
);
3012 /* For now, disallow setting x multiple times in test_bb. */
3013 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3016 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3018 /* The regs that are live out of test_bb. */
3019 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3021 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
3023 FOR_BB_INSNS (test_bb
, insn
)
3025 if (insn
!= last_insn
)
3027 if (!active_insn_p (insn
))
3030 if (!insn_valid_noce_process_p (insn
, cc
))
3031 goto free_bitmap_and_fail
;
3033 rtx sset
= single_set (insn
);
3036 if (contains_mem_rtx_p (SET_SRC (sset
))
3037 || !REG_P (SET_DEST (sset
))
3038 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3039 goto free_bitmap_and_fail
;
3041 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3042 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3046 /* If any of the intermediate results in test_bb are live after test_bb
3048 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3049 goto free_bitmap_and_fail
;
3051 BITMAP_FREE (test_bb_temps
);
3052 *cost
= potential_cost
;
3056 free_bitmap_and_fail
:
3057 BITMAP_FREE (test_bb_temps
);
3061 /* We have something like:
3064 { i = a; j = b; k = c; }
3068 tmp_i = (x > y) ? a : i;
3069 tmp_j = (x > y) ? b : j;
3070 tmp_k = (x > y) ? c : k;
3075 Subsequent passes are expected to clean up the extra moves.
3077 Look for special cases such as writes to one register which are
3078 read back in another SET, as might occur in a swap idiom or
3087 Which we want to rewrite to:
3089 tmp_i = (x > y) ? a : i;
3090 tmp_j = (x > y) ? tmp_i : j;
3094 We can catch these when looking at (SET x y) by keeping a list of the
3095 registers we would have targeted before if-conversion and looking back
3096 through it for an overlap with Y. If we find one, we rewire the
3097 conditional set to use the temporary we introduced earlier.
3099 IF_INFO contains the useful information about the block structure and
3100 jump instructions. */
3103 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3105 basic_block test_bb
= if_info
->test_bb
;
3106 basic_block then_bb
= if_info
->then_bb
;
3107 basic_block join_bb
= if_info
->join_bb
;
3108 rtx_insn
*jump
= if_info
->jump
;
3109 rtx_insn
*cond_earliest
;
3114 /* Decompose the condition attached to the jump. */
3115 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3116 rtx x
= XEXP (cond
, 0);
3117 rtx y
= XEXP (cond
, 1);
3118 rtx_code cond_code
= GET_CODE (cond
);
3120 /* The true targets for a conditional move. */
3121 auto_vec
<rtx
> targets
;
3122 /* The temporaries introduced to allow us to not consider register
3124 auto_vec
<rtx
> temporaries
;
3125 /* The insns we've emitted. */
3126 auto_vec
<rtx_insn
*> unmodified_insns
;
3129 FOR_BB_INSNS (then_bb
, insn
)
3131 /* Skip over non-insns. */
3132 if (!active_insn_p (insn
))
3135 rtx set
= single_set (insn
);
3136 gcc_checking_assert (set
);
3138 rtx target
= SET_DEST (set
);
3139 rtx temp
= gen_reg_rtx (GET_MODE (target
));
3140 rtx new_val
= SET_SRC (set
);
3141 rtx old_val
= target
;
3143 /* If we were supposed to read from an earlier write in this block,
3144 we've changed the register allocation. Rewire the read. While
3145 we are looking, also try to catch a swap idiom. */
3146 for (int i
= count
- 1; i
>= 0; --i
)
3147 if (reg_overlap_mentioned_p (new_val
, targets
[i
]))
3149 /* Catch a "swap" style idiom. */
3150 if (find_reg_note (insn
, REG_DEAD
, new_val
) != NULL_RTX
)
3151 /* The write to targets[i] is only live until the read
3152 here. As the condition codes match, we can propagate
3154 new_val
= SET_SRC (single_set (unmodified_insns
[i
]));
3156 new_val
= temporaries
[i
];
3160 /* If we had a non-canonical conditional jump (i.e. one where
3161 the fallthrough is to the "else" case) we need to reverse
3162 the conditional select. */
3163 if (if_info
->then_else_reversed
)
3164 std::swap (old_val
, new_val
);
3166 /* Actually emit the conditional move. */
3167 rtx temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3168 x
, y
, new_val
, old_val
);
3170 /* If we failed to expand the conditional move, drop out and don't
3172 if (temp_dest
== NULL_RTX
)
3180 targets
.safe_push (target
);
3181 temporaries
.safe_push (temp_dest
);
3182 unmodified_insns
.safe_push (insn
);
3185 /* We must have seen some sort of insn to insert, otherwise we were
3186 given an empty BB to convert, and we can't handle that. */
3187 gcc_assert (!unmodified_insns
.is_empty ());
3189 /* Now fixup the assignments. */
3190 for (int i
= 0; i
< count
; i
++)
3191 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3193 /* Actually emit the sequence. */
3194 rtx_insn
*seq
= get_insns ();
3196 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3197 set_used_flags (insn
);
3199 /* Mark all our temporaries and targets as used. */
3200 for (int i
= 0; i
< count
; i
++)
3202 set_used_flags (temporaries
[i
]);
3203 set_used_flags (targets
[i
]);
3206 set_used_flags (cond
);
3210 unshare_all_rtl_in_chain (seq
);
3216 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3218 || recog_memoized (insn
) == -1)
3221 emit_insn_before_setloc (seq
, if_info
->jump
,
3222 INSN_LOCATION (unmodified_insns
.last ()));
3224 /* Clean up THEN_BB and the edges in and out of it. */
3225 remove_edge (find_edge (test_bb
, join_bb
));
3226 remove_edge (find_edge (then_bb
, join_bb
));
3227 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3228 delete_basic_block (then_bb
);
3231 /* Maybe merge blocks now the jump is simple enough. */
3232 if (can_merge_blocks_p (test_bb
, join_bb
))
3234 merge_blocks (test_bb
, join_bb
);
3238 num_updated_if_blocks
++;
3242 /* Return true iff basic block TEST_BB is comprised of only
3243 (SET (REG) (REG)) insns suitable for conversion to a series
3244 of conditional moves. FORNOW: Use II to find the expected cost of
3245 the branch into/over TEST_BB.
3247 TODO: This creates an implicit "magic number" for branch_cost.
3248 II->branch_cost now guides the maximum number of set instructions in
3249 a basic block which is considered profitable to completely
3253 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
,
3254 struct noce_if_info
*ii
)
3258 unsigned param
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3259 unsigned limit
= MIN (ii
->branch_cost
, param
);
3261 FOR_BB_INSNS (test_bb
, insn
)
3263 /* Skip over notes etc. */
3264 if (!active_insn_p (insn
))
3267 /* We only handle SET insns. */
3268 rtx set
= single_set (insn
);
3269 if (set
== NULL_RTX
)
3272 rtx dest
= SET_DEST (set
);
3273 rtx src
= SET_SRC (set
);
3275 /* We can possibly relax this, but for now only handle REG to REG
3276 moves. This avoids any issues that might come from introducing
3277 loads/stores that might violate data-race-freedom guarantees. */
3278 if (!(REG_P (src
) && REG_P (dest
)))
3281 /* Destination must be appropriate for a conditional write. */
3282 if (!noce_operand_ok (dest
))
3285 /* We must be able to conditionally move in this mode. */
3286 if (!can_conditionally_move_p (GET_MODE (dest
)))
3292 /* FORNOW: Our cost model is a count of the number of instructions we
3293 would if-convert. This is suboptimal, and should be improved as part
3294 of a wider rework of branch_cost. */
3301 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3302 it without using conditional execution. Return TRUE if we were successful
3303 at converting the block. */
3306 noce_process_if_block (struct noce_if_info
*if_info
)
3308 basic_block test_bb
= if_info
->test_bb
; /* test block */
3309 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3310 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3311 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3312 rtx_insn
*jump
= if_info
->jump
;
3313 rtx cond
= if_info
->cond
;
3314 rtx_insn
*insn_a
, *insn_b
;
3316 rtx orig_x
, x
, a
, b
;
3318 /* We're looking for patterns of the form
3320 (1) if (...) x = a; else x = b;
3321 (2) x = b; if (...) x = a;
3322 (3) if (...) x = a; // as if with an initial x = x.
3323 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3324 The later patterns require jumps to be more expensive.
3325 For the if (...) x = a; else x = b; case we allow multiple insns
3326 inside the then and else blocks as long as their only effect is
3327 to calculate a value for x.
3328 ??? For future expansion, further expand the "multiple X" rules. */
3330 /* First look for multiple SETS. */
3332 && HAVE_conditional_move
3334 && bb_ok_for_noce_convert_multiple_sets (then_bb
, if_info
))
3336 if (noce_convert_multiple_sets (if_info
))
3340 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3341 &if_info
->then_simple
))
3345 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3346 &if_info
->else_simple
))
3349 insn_a
= last_active_insn (then_bb
, FALSE
);
3350 set_a
= single_set (insn_a
);
3353 x
= SET_DEST (set_a
);
3354 a
= SET_SRC (set_a
);
3356 /* Look for the other potential set. Make sure we've got equivalent
3358 /* ??? This is overconservative. Storing to two different mems is
3359 as easy as conditionally computing the address. Storing to a
3360 single mem merely requires a scratch memory to use as one of the
3361 destination addresses; often the memory immediately below the
3362 stack pointer is available for this. */
3366 insn_b
= last_active_insn (else_bb
, FALSE
);
3367 set_b
= single_set (insn_b
);
3370 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3375 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3376 /* We're going to be moving the evaluation of B down from above
3377 COND_EARLIEST to JUMP. Make sure the relevant data is still
3380 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3381 || !NONJUMP_INSN_P (insn_b
)
3382 || (set_b
= single_set (insn_b
)) == NULL_RTX
3383 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3384 || ! noce_operand_ok (SET_SRC (set_b
))
3385 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3386 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3387 /* Avoid extending the lifetime of hard registers on small
3388 register class machines. */
3389 || (REG_P (SET_SRC (set_b
))
3390 && HARD_REGISTER_P (SET_SRC (set_b
))
3391 && targetm
.small_register_classes_for_mode_p
3392 (GET_MODE (SET_SRC (set_b
))))
3393 /* Likewise with X. In particular this can happen when
3394 noce_get_condition looks farther back in the instruction
3395 stream than one might expect. */
3396 || reg_overlap_mentioned_p (x
, cond
)
3397 || reg_overlap_mentioned_p (x
, a
)
3398 || modified_between_p (x
, insn_b
, jump
))
3405 /* If x has side effects then only the if-then-else form is safe to
3406 convert. But even in that case we would need to restore any notes
3407 (such as REG_INC) at then end. That can be tricky if
3408 noce_emit_move_insn expands to more than one insn, so disable the
3409 optimization entirely for now if there are side effects. */
3410 if (side_effects_p (x
))
3413 b
= (set_b
? SET_SRC (set_b
) : x
);
3415 /* Only operate on register destinations, and even then avoid extending
3416 the lifetime of hard registers on small register class machines. */
3418 if_info
->orig_x
= orig_x
;
3420 || (HARD_REGISTER_P (x
)
3421 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3423 if (GET_MODE (x
) == BLKmode
)
3426 if (GET_CODE (x
) == ZERO_EXTRACT
3427 && (!CONST_INT_P (XEXP (x
, 1))
3428 || !CONST_INT_P (XEXP (x
, 2))))
3431 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3432 ? XEXP (x
, 0) : x
));
3435 /* Don't operate on sources that may trap or are volatile. */
3436 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3440 /* Set up the info block for our subroutines. */
3441 if_info
->insn_a
= insn_a
;
3442 if_info
->insn_b
= insn_b
;
3447 /* Try optimizations in some approximation of a useful order. */
3448 /* ??? Should first look to see if X is live incoming at all. If it
3449 isn't, we don't need anything but an unconditional set. */
3451 /* Look and see if A and B are really the same. Avoid creating silly
3452 cmove constructs that no one will fix up later. */
3453 if (noce_simple_bbs (if_info
)
3454 && rtx_interchangeable_p (a
, b
))
3456 /* If we have an INSN_B, we don't have to create any new rtl. Just
3457 move the instruction that we already have. If we don't have an
3458 INSN_B, that means that A == X, and we've got a noop move. In
3459 that case don't do anything and let the code below delete INSN_A. */
3460 if (insn_b
&& else_bb
)
3464 if (else_bb
&& insn_b
== BB_END (else_bb
))
3465 BB_END (else_bb
) = PREV_INSN (insn_b
);
3466 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3468 /* If there was a REG_EQUAL note, delete it since it may have been
3469 true due to this insn being after a jump. */
3470 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3471 remove_note (insn_b
, note
);
3475 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3476 x must be executed twice. */
3477 else if (insn_b
&& side_effects_p (orig_x
))
3484 if (!set_b
&& MEM_P (orig_x
))
3485 /* We want to avoid store speculation to avoid cases like
3486 if (pthread_mutex_trylock(mutex))
3488 Rather than go to much effort here, we rely on the SSA optimizers,
3489 which do a good enough job these days. */
3492 if (noce_try_move (if_info
))
3494 if (noce_try_store_flag (if_info
))
3496 if (noce_try_bitop (if_info
))
3498 if (noce_try_minmax (if_info
))
3500 if (noce_try_abs (if_info
))
3502 if (noce_try_inverse_constants (if_info
))
3504 if (!targetm
.have_conditional_execution ()
3505 && noce_try_store_flag_constants (if_info
))
3507 if (HAVE_conditional_move
3508 && noce_try_cmove (if_info
))
3510 if (! targetm
.have_conditional_execution ())
3512 if (noce_try_addcc (if_info
))
3514 if (noce_try_store_flag_mask (if_info
))
3516 if (HAVE_conditional_move
3517 && noce_try_cmove_arith (if_info
))
3519 if (noce_try_sign_mask (if_info
))
3523 if (!else_bb
&& set_b
)
3535 /* If we used a temporary, fix it up now. */
3541 noce_emit_move_insn (orig_x
, x
);
3543 set_used_flags (orig_x
);
3544 unshare_all_rtl_in_chain (seq
);
3547 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3550 /* The original THEN and ELSE blocks may now be removed. The test block
3551 must now jump to the join block. If the test block and the join block
3552 can be merged, do so. */
3555 delete_basic_block (else_bb
);
3559 remove_edge (find_edge (test_bb
, join_bb
));
3561 remove_edge (find_edge (then_bb
, join_bb
));
3562 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3563 delete_basic_block (then_bb
);
3566 if (can_merge_blocks_p (test_bb
, join_bb
))
3568 merge_blocks (test_bb
, join_bb
);
3572 num_updated_if_blocks
++;
3576 /* Check whether a block is suitable for conditional move conversion.
3577 Every insn must be a simple set of a register to a constant or a
3578 register. For each assignment, store the value in the pointer map
3579 VALS, keyed indexed by register pointer, then store the register
3580 pointer in REGS. COND is the condition we will test. */
3583 check_cond_move_block (basic_block bb
,
3584 hash_map
<rtx
, rtx
> *vals
,
3589 rtx cc
= cc_in_cond (cond
);
3591 /* We can only handle simple jumps at the end of the basic block.
3592 It is almost impossible to update the CFG otherwise. */
3594 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3597 FOR_BB_INSNS (bb
, insn
)
3601 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3603 set
= single_set (insn
);
3607 dest
= SET_DEST (set
);
3608 src
= SET_SRC (set
);
3610 || (HARD_REGISTER_P (dest
)
3611 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3614 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3617 if (side_effects_p (src
) || side_effects_p (dest
))
3620 if (may_trap_p (src
) || may_trap_p (dest
))
3623 /* Don't try to handle this if the source register was
3624 modified earlier in the block. */
3627 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3628 && vals
->get (SUBREG_REG (src
))))
3631 /* Don't try to handle this if the destination register was
3632 modified earlier in the block. */
3633 if (vals
->get (dest
))
3636 /* Don't try to handle this if the condition uses the
3637 destination register. */
3638 if (reg_overlap_mentioned_p (dest
, cond
))
3641 /* Don't try to handle this if the source register is modified
3642 later in the block. */
3643 if (!CONSTANT_P (src
)
3644 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3647 /* Skip it if the instruction to be moved might clobber CC. */
3648 if (cc
&& set_of (cc
, insn
))
3651 vals
->put (dest
, src
);
3653 regs
->safe_push (dest
);
3659 /* Given a basic block BB suitable for conditional move conversion,
3660 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3661 the register values depending on COND, emit the insns in the block as
3662 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3663 processed. The caller has started a sequence for the conversion.
3664 Return true if successful, false if something goes wrong. */
3667 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3668 basic_block bb
, rtx cond
,
3669 hash_map
<rtx
, rtx
> *then_vals
,
3670 hash_map
<rtx
, rtx
> *else_vals
,
3675 rtx cond_arg0
, cond_arg1
;
3677 code
= GET_CODE (cond
);
3678 cond_arg0
= XEXP (cond
, 0);
3679 cond_arg1
= XEXP (cond
, 1);
3681 FOR_BB_INSNS (bb
, insn
)
3683 rtx set
, target
, dest
, t
, e
;
3685 /* ??? Maybe emit conditional debug insn? */
3686 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3688 set
= single_set (insn
);
3689 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3691 dest
= SET_DEST (set
);
3693 rtx
*then_slot
= then_vals
->get (dest
);
3694 rtx
*else_slot
= else_vals
->get (dest
);
3695 t
= then_slot
? *then_slot
: NULL_RTX
;
3696 e
= else_slot
? *else_slot
: NULL_RTX
;
3700 /* If this register was set in the then block, we already
3701 handled this case there. */
3714 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3720 noce_emit_move_insn (dest
, target
);
3726 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3727 it using only conditional moves. Return TRUE if we were successful at
3728 converting the block. */
3731 cond_move_process_if_block (struct noce_if_info
*if_info
)
3733 basic_block test_bb
= if_info
->test_bb
;
3734 basic_block then_bb
= if_info
->then_bb
;
3735 basic_block else_bb
= if_info
->else_bb
;
3736 basic_block join_bb
= if_info
->join_bb
;
3737 rtx_insn
*jump
= if_info
->jump
;
3738 rtx cond
= if_info
->cond
;
3739 rtx_insn
*seq
, *loc_insn
;
3742 vec
<rtx
> then_regs
= vNULL
;
3743 vec
<rtx
> else_regs
= vNULL
;
3745 int success_p
= FALSE
;
3746 int limit
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3748 /* Build a mapping for each block to the value used for each
3750 hash_map
<rtx
, rtx
> then_vals
;
3751 hash_map
<rtx
, rtx
> else_vals
;
3753 /* Make sure the blocks are suitable. */
3754 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3756 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3759 /* Make sure the blocks can be used together. If the same register
3760 is set in both blocks, and is not set to a constant in both
3761 cases, then both blocks must set it to the same register. We
3762 have already verified that if it is set to a register, that the
3763 source register does not change after the assignment. Also count
3764 the number of registers set in only one of the blocks. */
3766 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3768 rtx
*then_slot
= then_vals
.get (reg
);
3769 rtx
*else_slot
= else_vals
.get (reg
);
3771 gcc_checking_assert (then_slot
);
3776 rtx then_val
= *then_slot
;
3777 rtx else_val
= *else_slot
;
3778 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3779 && !rtx_equal_p (then_val
, else_val
))
3784 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3785 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3787 gcc_checking_assert (else_vals
.get (reg
));
3788 if (!then_vals
.get (reg
))
3792 /* Make sure it is reasonable to convert this block. What matters
3793 is the number of assignments currently made in only one of the
3794 branches, since if we convert we are going to always execute
3796 if (c
> MAX_CONDITIONAL_EXECUTE
3800 /* Try to emit the conditional moves. First do the then block,
3801 then do anything left in the else blocks. */
3803 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3804 &then_vals
, &else_vals
, false)
3806 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3807 &then_vals
, &else_vals
, true)))
3812 seq
= end_ifcvt_sequence (if_info
);
3816 loc_insn
= first_active_insn (then_bb
);
3819 loc_insn
= first_active_insn (else_bb
);
3820 gcc_assert (loc_insn
);
3822 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3826 delete_basic_block (else_bb
);
3830 remove_edge (find_edge (test_bb
, join_bb
));
3832 remove_edge (find_edge (then_bb
, join_bb
));
3833 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3834 delete_basic_block (then_bb
);
3837 if (can_merge_blocks_p (test_bb
, join_bb
))
3839 merge_blocks (test_bb
, join_bb
);
3843 num_updated_if_blocks
++;
3847 then_regs
.release ();
3848 else_regs
.release ();
3853 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3854 IF-THEN-ELSE-JOIN block.
3856 If so, we'll try to convert the insns to not require the branch,
3857 using only transformations that do not require conditional execution.
3859 Return TRUE if we were successful at converting the block. */
3862 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3865 basic_block then_bb
, else_bb
, join_bb
;
3866 bool then_else_reversed
= false;
3869 rtx_insn
*cond_earliest
;
3870 struct noce_if_info if_info
;
3872 /* We only ever should get here before reload. */
3873 gcc_assert (!reload_completed
);
3875 /* Recognize an IF-THEN-ELSE-JOIN block. */
3876 if (single_pred_p (then_edge
->dest
)
3877 && single_succ_p (then_edge
->dest
)
3878 && single_pred_p (else_edge
->dest
)
3879 && single_succ_p (else_edge
->dest
)
3880 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3882 then_bb
= then_edge
->dest
;
3883 else_bb
= else_edge
->dest
;
3884 join_bb
= single_succ (then_bb
);
3886 /* Recognize an IF-THEN-JOIN block. */
3887 else if (single_pred_p (then_edge
->dest
)
3888 && single_succ_p (then_edge
->dest
)
3889 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3891 then_bb
= then_edge
->dest
;
3892 else_bb
= NULL_BLOCK
;
3893 join_bb
= else_edge
->dest
;
3895 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3896 of basic blocks in cfglayout mode does not matter, so the fallthrough
3897 edge can go to any basic block (and not just to bb->next_bb, like in
3899 else if (single_pred_p (else_edge
->dest
)
3900 && single_succ_p (else_edge
->dest
)
3901 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3903 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3904 To make this work, we have to invert the THEN and ELSE blocks
3905 and reverse the jump condition. */
3906 then_bb
= else_edge
->dest
;
3907 else_bb
= NULL_BLOCK
;
3908 join_bb
= single_succ (then_bb
);
3909 then_else_reversed
= true;
3912 /* Not a form we can handle. */
3915 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3916 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3919 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3922 num_possible_if_blocks
++;
3927 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3928 (else_bb
) ? "-ELSE" : "",
3929 pass
, test_bb
->index
, then_bb
->index
);
3932 fprintf (dump_file
, ", else %d", else_bb
->index
);
3934 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3937 /* If the conditional jump is more than just a conditional
3938 jump, then we can not do if-conversion on this block. */
3939 jump
= BB_END (test_bb
);
3940 if (! onlyjump_p (jump
))
3943 /* If this is not a standard conditional jump, we can't parse it. */
3944 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3948 /* We must be comparing objects whose modes imply the size. */
3949 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3952 /* Initialize an IF_INFO struct to pass around. */
3953 memset (&if_info
, 0, sizeof if_info
);
3954 if_info
.test_bb
= test_bb
;
3955 if_info
.then_bb
= then_bb
;
3956 if_info
.else_bb
= else_bb
;
3957 if_info
.join_bb
= join_bb
;
3958 if_info
.cond
= cond
;
3959 if_info
.cond_earliest
= cond_earliest
;
3960 if_info
.jump
= jump
;
3961 if_info
.then_else_reversed
= then_else_reversed
;
3962 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3963 predictable_edge_p (then_edge
));
3965 /* Do the real work. */
3967 if (noce_process_if_block (&if_info
))
3970 if (HAVE_conditional_move
3971 && cond_move_process_if_block (&if_info
))
3978 /* Merge the blocks and mark for local life update. */
3981 merge_if_block (struct ce_if_block
* ce_info
)
3983 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3984 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3985 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3986 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3987 basic_block combo_bb
;
3989 /* All block merging is done into the lower block numbers. */
3992 df_set_bb_dirty (test_bb
);
3994 /* Merge any basic blocks to handle && and || subtests. Each of
3995 the blocks are on the fallthru path from the predecessor block. */
3996 if (ce_info
->num_multiple_test_blocks
> 0)
3998 basic_block bb
= test_bb
;
3999 basic_block last_test_bb
= ce_info
->last_test_bb
;
4000 basic_block fallthru
= block_fallthru (bb
);
4005 fallthru
= block_fallthru (bb
);
4006 merge_blocks (combo_bb
, bb
);
4009 while (bb
!= last_test_bb
);
4012 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4013 label, but it might if there were || tests. That label's count should be
4014 zero, and it normally should be removed. */
4018 /* If THEN_BB has no successors, then there's a BARRIER after it.
4019 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4020 is no longer needed, and in fact it is incorrect to leave it in
4022 if (EDGE_COUNT (then_bb
->succs
) == 0
4023 && EDGE_COUNT (combo_bb
->succs
) > 1)
4025 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4026 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4027 end
= NEXT_INSN (end
);
4029 if (end
&& BARRIER_P (end
))
4032 merge_blocks (combo_bb
, then_bb
);
4036 /* The ELSE block, if it existed, had a label. That label count
4037 will almost always be zero, but odd things can happen when labels
4038 get their addresses taken. */
4041 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4042 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4043 is no longer needed, and in fact it is incorrect to leave it in
4045 if (EDGE_COUNT (else_bb
->succs
) == 0
4046 && EDGE_COUNT (combo_bb
->succs
) > 1)
4048 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4049 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4050 end
= NEXT_INSN (end
);
4052 if (end
&& BARRIER_P (end
))
4055 merge_blocks (combo_bb
, else_bb
);
4059 /* If there was no join block reported, that means it was not adjacent
4060 to the others, and so we cannot merge them. */
4064 rtx_insn
*last
= BB_END (combo_bb
);
4066 /* The outgoing edge for the current COMBO block should already
4067 be correct. Verify this. */
4068 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4069 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4070 || (NONJUMP_INSN_P (last
)
4071 && GET_CODE (PATTERN (last
)) == TRAP_IF
4072 && (TRAP_CONDITION (PATTERN (last
))
4073 == const_true_rtx
)));
4076 /* There should still be something at the end of the THEN or ELSE
4077 blocks taking us to our final destination. */
4078 gcc_assert (JUMP_P (last
)
4079 || (EDGE_SUCC (combo_bb
, 0)->dest
4080 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4082 && SIBLING_CALL_P (last
))
4083 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4084 && can_throw_internal (last
)));
4087 /* The JOIN block may have had quite a number of other predecessors too.
4088 Since we've already merged the TEST, THEN and ELSE blocks, we should
4089 have only one remaining edge from our if-then-else diamond. If there
4090 is more than one remaining edge, it must come from elsewhere. There
4091 may be zero incoming edges if the THEN block didn't actually join
4092 back up (as with a call to a non-return function). */
4093 else if (EDGE_COUNT (join_bb
->preds
) < 2
4094 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4096 /* We can merge the JOIN cleanly and update the dataflow try
4097 again on this pass.*/
4098 merge_blocks (combo_bb
, join_bb
);
4103 /* We cannot merge the JOIN. */
4105 /* The outgoing edge for the current COMBO block should already
4106 be correct. Verify this. */
4107 gcc_assert (single_succ_p (combo_bb
)
4108 && single_succ (combo_bb
) == join_bb
);
4110 /* Remove the jump and cruft from the end of the COMBO block. */
4111 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4112 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4115 num_updated_if_blocks
++;
4118 /* Find a block ending in a simple IF condition and try to transform it
4119 in some way. When converting a multi-block condition, put the new code
4120 in the first such block and delete the rest. Return a pointer to this
4121 first block if some transformation was done. Return NULL otherwise. */
4124 find_if_header (basic_block test_bb
, int pass
)
4126 ce_if_block ce_info
;
4130 /* The kind of block we're looking for has exactly two successors. */
4131 if (EDGE_COUNT (test_bb
->succs
) != 2)
4134 then_edge
= EDGE_SUCC (test_bb
, 0);
4135 else_edge
= EDGE_SUCC (test_bb
, 1);
4137 if (df_get_bb_dirty (then_edge
->dest
))
4139 if (df_get_bb_dirty (else_edge
->dest
))
4142 /* Neither edge should be abnormal. */
4143 if ((then_edge
->flags
& EDGE_COMPLEX
)
4144 || (else_edge
->flags
& EDGE_COMPLEX
))
4147 /* Nor exit the loop. */
4148 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4149 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4152 /* The THEN edge is canonically the one that falls through. */
4153 if (then_edge
->flags
& EDGE_FALLTHRU
)
4155 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4156 std::swap (then_edge
, else_edge
);
4158 /* Otherwise this must be a multiway branch of some sort. */
4161 memset (&ce_info
, 0, sizeof (ce_info
));
4162 ce_info
.test_bb
= test_bb
;
4163 ce_info
.then_bb
= then_edge
->dest
;
4164 ce_info
.else_bb
= else_edge
->dest
;
4165 ce_info
.pass
= pass
;
4167 #ifdef IFCVT_MACHDEP_INIT
4168 IFCVT_MACHDEP_INIT (&ce_info
);
4171 if (!reload_completed
4172 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4175 if (reload_completed
4176 && targetm
.have_conditional_execution ()
4177 && cond_exec_find_if_block (&ce_info
))
4180 if (targetm
.have_trap ()
4181 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4182 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4185 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4186 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4188 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4190 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4198 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4199 /* Set this so we continue looking. */
4200 cond_exec_changed_p
= TRUE
;
4201 return ce_info
.test_bb
;
4204 /* Return true if a block has two edges, one of which falls through to the next
4205 block, and the other jumps to a specific block, so that we can tell if the
4206 block is part of an && test or an || test. Returns either -1 or the number
4207 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4210 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4213 int fallthru_p
= FALSE
;
4220 if (!cur_bb
|| !target_bb
)
4223 /* If no edges, obviously it doesn't jump or fallthru. */
4224 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4227 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4229 if (cur_edge
->flags
& EDGE_COMPLEX
)
4230 /* Anything complex isn't what we want. */
4233 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4236 else if (cur_edge
->dest
== target_bb
)
4243 if ((jump_p
& fallthru_p
) == 0)
4246 /* Don't allow calls in the block, since this is used to group && and ||
4247 together for conditional execution support. ??? we should support
4248 conditional execution support across calls for IA-64 some day, but
4249 for now it makes the code simpler. */
4250 end
= BB_END (cur_bb
);
4251 insn
= BB_HEAD (cur_bb
);
4253 while (insn
!= NULL_RTX
)
4260 && !DEBUG_INSN_P (insn
)
4261 && GET_CODE (PATTERN (insn
)) != USE
4262 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4268 insn
= NEXT_INSN (insn
);
4274 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4275 block. If so, we'll try to convert the insns to not require the branch.
4276 Return TRUE if we were successful at converting the block. */
4279 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4281 basic_block test_bb
= ce_info
->test_bb
;
4282 basic_block then_bb
= ce_info
->then_bb
;
4283 basic_block else_bb
= ce_info
->else_bb
;
4284 basic_block join_bb
= NULL_BLOCK
;
4289 ce_info
->last_test_bb
= test_bb
;
4291 /* We only ever should get here after reload,
4292 and if we have conditional execution. */
4293 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4295 /* Discover if any fall through predecessors of the current test basic block
4296 were && tests (which jump to the else block) or || tests (which jump to
4298 if (single_pred_p (test_bb
)
4299 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4301 basic_block bb
= single_pred (test_bb
);
4302 basic_block target_bb
;
4303 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4306 /* Determine if the preceding block is an && or || block. */
4307 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4309 ce_info
->and_and_p
= TRUE
;
4310 target_bb
= else_bb
;
4312 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4314 ce_info
->and_and_p
= FALSE
;
4315 target_bb
= then_bb
;
4318 target_bb
= NULL_BLOCK
;
4320 if (target_bb
&& n_insns
<= max_insns
)
4322 int total_insns
= 0;
4325 ce_info
->last_test_bb
= test_bb
;
4327 /* Found at least one && or || block, look for more. */
4330 ce_info
->test_bb
= test_bb
= bb
;
4331 total_insns
+= n_insns
;
4334 if (!single_pred_p (bb
))
4337 bb
= single_pred (bb
);
4338 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4340 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4342 ce_info
->num_multiple_test_blocks
= blocks
;
4343 ce_info
->num_multiple_test_insns
= total_insns
;
4345 if (ce_info
->and_and_p
)
4346 ce_info
->num_and_and_blocks
= blocks
;
4348 ce_info
->num_or_or_blocks
= blocks
;
4352 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4353 other than any || blocks which jump to the THEN block. */
4354 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4357 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4358 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4360 if (cur_edge
->flags
& EDGE_COMPLEX
)
4364 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4366 if (cur_edge
->flags
& EDGE_COMPLEX
)
4370 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4371 if (EDGE_COUNT (then_bb
->succs
) > 0
4372 && (!single_succ_p (then_bb
)
4373 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4374 || (epilogue_completed
4375 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4378 /* If the THEN block has no successors, conditional execution can still
4379 make a conditional call. Don't do this unless the ELSE block has
4380 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4381 Check for the last insn of the THEN block being an indirect jump, which
4382 is listed as not having any successors, but confuses the rest of the CE
4383 code processing. ??? we should fix this in the future. */
4384 if (EDGE_COUNT (then_bb
->succs
) == 0)
4386 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4388 rtx_insn
*last_insn
= BB_END (then_bb
);
4391 && NOTE_P (last_insn
)
4392 && last_insn
!= BB_HEAD (then_bb
))
4393 last_insn
= PREV_INSN (last_insn
);
4396 && JUMP_P (last_insn
)
4397 && ! simplejump_p (last_insn
))
4401 else_bb
= NULL_BLOCK
;
4407 /* If the THEN block's successor is the other edge out of the TEST block,
4408 then we have an IF-THEN combo without an ELSE. */
4409 else if (single_succ (then_bb
) == else_bb
)
4412 else_bb
= NULL_BLOCK
;
4415 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4416 has exactly one predecessor and one successor, and the outgoing edge
4417 is not complex, then we have an IF-THEN-ELSE combo. */
4418 else if (single_succ_p (else_bb
)
4419 && single_succ (then_bb
) == single_succ (else_bb
)
4420 && single_pred_p (else_bb
)
4421 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4422 && !(epilogue_completed
4423 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4424 join_bb
= single_succ (else_bb
);
4426 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4430 num_possible_if_blocks
++;
4435 "\nIF-THEN%s block found, pass %d, start block %d "
4436 "[insn %d], then %d [%d]",
4437 (else_bb
) ? "-ELSE" : "",
4440 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4442 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4445 fprintf (dump_file
, ", else %d [%d]",
4447 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4449 fprintf (dump_file
, ", join %d [%d]",
4451 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4453 if (ce_info
->num_multiple_test_blocks
> 0)
4454 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4455 ce_info
->num_multiple_test_blocks
,
4456 (ce_info
->and_and_p
) ? "&&" : "||",
4457 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4458 ce_info
->last_test_bb
->index
,
4459 ((BB_HEAD (ce_info
->last_test_bb
))
4460 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4463 fputc ('\n', dump_file
);
4466 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4467 first condition for free, since we've already asserted that there's a
4468 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4469 we checked the FALLTHRU flag, those are already adjacent to the last IF
4471 /* ??? As an enhancement, move the ELSE block. Have to deal with
4472 BLOCK notes, if by no other means than backing out the merge if they
4473 exist. Sticky enough I don't want to think about it now. */
4475 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4477 if ((next
= next
->next_bb
) != join_bb
4478 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4486 /* Do the real work. */
4488 ce_info
->else_bb
= else_bb
;
4489 ce_info
->join_bb
= join_bb
;
4491 /* If we have && and || tests, try to first handle combining the && and ||
4492 tests into the conditional code, and if that fails, go back and handle
4493 it without the && and ||, which at present handles the && case if there
4494 was no ELSE block. */
4495 if (cond_exec_process_if_block (ce_info
, TRUE
))
4498 if (ce_info
->num_multiple_test_blocks
)
4502 if (cond_exec_process_if_block (ce_info
, FALSE
))
4509 /* Convert a branch over a trap, or a branch
4510 to a trap, into a conditional trap. */
4513 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4515 basic_block then_bb
= then_edge
->dest
;
4516 basic_block else_bb
= else_edge
->dest
;
4517 basic_block other_bb
, trap_bb
;
4518 rtx_insn
*trap
, *jump
;
4520 rtx_insn
*cond_earliest
;
4523 /* Locate the block with the trap instruction. */
4524 /* ??? While we look for no successors, we really ought to allow
4525 EH successors. Need to fix merge_if_block for that to work. */
4526 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4527 trap_bb
= then_bb
, other_bb
= else_bb
;
4528 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4529 trap_bb
= else_bb
, other_bb
= then_bb
;
4535 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4536 test_bb
->index
, trap_bb
->index
);
4539 /* If this is not a standard conditional jump, we can't parse it. */
4540 jump
= BB_END (test_bb
);
4541 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4545 /* If the conditional jump is more than just a conditional jump, then
4546 we can not do if-conversion on this block. Give up for returnjump_p,
4547 changing a conditional return followed by unconditional trap for
4548 conditional trap followed by unconditional return is likely not
4549 beneficial and harder to handle. */
4550 if (! onlyjump_p (jump
) || returnjump_p (jump
))
4553 /* We must be comparing objects whose modes imply the size. */
4554 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4557 /* Reverse the comparison code, if necessary. */
4558 code
= GET_CODE (cond
);
4559 if (then_bb
== trap_bb
)
4561 code
= reversed_comparison_code (cond
, jump
);
4562 if (code
== UNKNOWN
)
4566 /* Attempt to generate the conditional trap. */
4567 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4568 copy_rtx (XEXP (cond
, 1)),
4569 TRAP_CODE (PATTERN (trap
)));
4573 /* Emit the new insns before cond_earliest. */
4574 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4576 /* Delete the trap block if possible. */
4577 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4578 df_set_bb_dirty (test_bb
);
4579 df_set_bb_dirty (then_bb
);
4580 df_set_bb_dirty (else_bb
);
4582 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4584 delete_basic_block (trap_bb
);
4588 /* Wire together the blocks again. */
4589 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4590 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4591 else if (trap_bb
== then_bb
)
4593 rtx lab
= JUMP_LABEL (jump
);
4594 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4595 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4596 LABEL_NUSES (lab
) += 1;
4597 JUMP_LABEL (newjump
) = lab
;
4598 emit_barrier_after (newjump
);
4602 if (can_merge_blocks_p (test_bb
, other_bb
))
4604 merge_blocks (test_bb
, other_bb
);
4608 num_updated_if_blocks
++;
4612 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4616 block_has_only_trap (basic_block bb
)
4620 /* We're not the exit block. */
4621 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4624 /* The block must have no successors. */
4625 if (EDGE_COUNT (bb
->succs
) > 0)
4628 /* The only instruction in the THEN block must be the trap. */
4629 trap
= first_active_insn (bb
);
4630 if (! (trap
== BB_END (bb
)
4631 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4632 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4638 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4639 transformable, but not necessarily the other. There need be no
4642 Return TRUE if we were successful at converting the block.
4644 Cases we'd like to look at:
4647 if (test) goto over; // x not live
4655 if (! test) goto label;
4658 if (test) goto E; // x not live
4672 (3) // This one's really only interesting for targets that can do
4673 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4674 // it results in multiple branches on a cache line, which often
4675 // does not sit well with predictors.
4677 if (test1) goto E; // predicted not taken
4693 (A) Don't do (2) if the branch is predicted against the block we're
4694 eliminating. Do it anyway if we can eliminate a branch; this requires
4695 that the sole successor of the eliminated block postdominate the other
4698 (B) With CE, on (3) we can steal from both sides of the if, creating
4707 Again, this is most useful if J postdominates.
4709 (C) CE substitutes for helpful life information.
4711 (D) These heuristics need a lot of work. */
4713 /* Tests for case 1 above. */
4716 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4718 basic_block then_bb
= then_edge
->dest
;
4719 basic_block else_bb
= else_edge
->dest
;
4721 int then_bb_index
, then_prob
;
4722 rtx else_target
= NULL_RTX
;
4724 /* If we are partitioning hot/cold basic blocks, we don't want to
4725 mess up unconditional or indirect jumps that cross between hot
4728 Basic block partitioning may result in some jumps that appear to
4729 be optimizable (or blocks that appear to be mergeable), but which really
4730 must be left untouched (they are required to make it safely across
4731 partition boundaries). See the comments at the top of
4732 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4734 if ((BB_END (then_bb
)
4735 && JUMP_P (BB_END (then_bb
))
4736 && CROSSING_JUMP_P (BB_END (then_bb
)))
4737 || (BB_END (test_bb
)
4738 && JUMP_P (BB_END (test_bb
))
4739 && CROSSING_JUMP_P (BB_END (test_bb
)))
4740 || (BB_END (else_bb
)
4741 && JUMP_P (BB_END (else_bb
))
4742 && CROSSING_JUMP_P (BB_END (else_bb
))))
4745 /* THEN has one successor. */
4746 if (!single_succ_p (then_bb
))
4749 /* THEN does not fall through, but is not strange either. */
4750 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4753 /* THEN has one predecessor. */
4754 if (!single_pred_p (then_bb
))
4757 /* THEN must do something. */
4758 if (forwarder_block_p (then_bb
))
4761 num_possible_if_blocks
++;
4764 "\nIF-CASE-1 found, start %d, then %d\n",
4765 test_bb
->index
, then_bb
->index
);
4767 if (then_edge
->probability
)
4768 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4770 then_prob
= REG_BR_PROB_BASE
/ 2;
4772 /* We're speculating from the THEN path, we want to make sure the cost
4773 of speculation is within reason. */
4774 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4775 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4776 predictable_edge_p (then_edge
)))))
4779 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4781 rtx_insn
*jump
= BB_END (else_edge
->src
);
4782 gcc_assert (JUMP_P (jump
));
4783 else_target
= JUMP_LABEL (jump
);
4786 /* Registers set are dead, or are predicable. */
4787 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4788 single_succ_edge (then_bb
), 1))
4791 /* Conversion went ok, including moving the insns and fixing up the
4792 jump. Adjust the CFG to match. */
4794 /* We can avoid creating a new basic block if then_bb is immediately
4795 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4796 through to else_bb. */
4798 if (then_bb
->next_bb
== else_bb
4799 && then_bb
->prev_bb
== test_bb
4800 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4802 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4805 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4806 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4807 else_bb
, else_target
);
4809 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4812 df_set_bb_dirty (test_bb
);
4813 df_set_bb_dirty (else_bb
);
4815 then_bb_index
= then_bb
->index
;
4816 delete_basic_block (then_bb
);
4818 /* Make rest of code believe that the newly created block is the THEN_BB
4819 block we removed. */
4822 df_bb_replace (then_bb_index
, new_bb
);
4823 /* This should have been done above via force_nonfallthru_and_redirect
4824 (possibly called from redirect_edge_and_branch_force). */
4825 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4829 num_updated_if_blocks
++;
4833 /* Test for case 2 above. */
4836 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4838 basic_block then_bb
= then_edge
->dest
;
4839 basic_block else_bb
= else_edge
->dest
;
4841 int then_prob
, else_prob
;
4843 /* We do not want to speculate (empty) loop latches. */
4845 && else_bb
->loop_father
->latch
== else_bb
)
4848 /* If we are partitioning hot/cold basic blocks, we don't want to
4849 mess up unconditional or indirect jumps that cross between hot
4852 Basic block partitioning may result in some jumps that appear to
4853 be optimizable (or blocks that appear to be mergeable), but which really
4854 must be left untouched (they are required to make it safely across
4855 partition boundaries). See the comments at the top of
4856 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4858 if ((BB_END (then_bb
)
4859 && JUMP_P (BB_END (then_bb
))
4860 && CROSSING_JUMP_P (BB_END (then_bb
)))
4861 || (BB_END (test_bb
)
4862 && JUMP_P (BB_END (test_bb
))
4863 && CROSSING_JUMP_P (BB_END (test_bb
)))
4864 || (BB_END (else_bb
)
4865 && JUMP_P (BB_END (else_bb
))
4866 && CROSSING_JUMP_P (BB_END (else_bb
))))
4869 /* ELSE has one successor. */
4870 if (!single_succ_p (else_bb
))
4873 else_succ
= single_succ_edge (else_bb
);
4875 /* ELSE outgoing edge is not complex. */
4876 if (else_succ
->flags
& EDGE_COMPLEX
)
4879 /* ELSE has one predecessor. */
4880 if (!single_pred_p (else_bb
))
4883 /* THEN is not EXIT. */
4884 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4887 if (else_edge
->probability
)
4889 else_prob
= else_edge
->probability
;
4890 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4894 else_prob
= REG_BR_PROB_BASE
/ 2;
4895 then_prob
= REG_BR_PROB_BASE
/ 2;
4898 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4899 if (else_prob
> then_prob
)
4901 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4902 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4908 num_possible_if_blocks
++;
4911 "\nIF-CASE-2 found, start %d, else %d\n",
4912 test_bb
->index
, else_bb
->index
);
4914 /* We're speculating from the ELSE path, we want to make sure the cost
4915 of speculation is within reason. */
4916 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4917 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4918 predictable_edge_p (else_edge
)))))
4921 /* Registers set are dead, or are predicable. */
4922 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4925 /* Conversion went ok, including moving the insns and fixing up the
4926 jump. Adjust the CFG to match. */
4928 df_set_bb_dirty (test_bb
);
4929 df_set_bb_dirty (then_bb
);
4930 delete_basic_block (else_bb
);
4933 num_updated_if_blocks
++;
4935 /* ??? We may now fallthru from one of THEN's successors into a join
4936 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4941 /* Used by the code above to perform the actual rtl transformations.
4942 Return TRUE if successful.
4944 TEST_BB is the block containing the conditional branch. MERGE_BB
4945 is the block containing the code to manipulate. DEST_EDGE is an
4946 edge representing a jump to the join block; after the conversion,
4947 TEST_BB should be branching to its destination.
4948 REVERSEP is true if the sense of the branch should be reversed. */
4951 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4952 basic_block other_bb
, edge dest_edge
, int reversep
)
4954 basic_block new_dest
= dest_edge
->dest
;
4955 rtx_insn
*head
, *end
, *jump
;
4956 rtx_insn
*earliest
= NULL
;
4958 bitmap merge_set
= NULL
;
4959 /* Number of pending changes. */
4960 int n_validated_changes
= 0;
4961 rtx new_dest_label
= NULL_RTX
;
4963 jump
= BB_END (test_bb
);
4965 /* Find the extent of the real code in the merge block. */
4966 head
= BB_HEAD (merge_bb
);
4967 end
= BB_END (merge_bb
);
4969 while (DEBUG_INSN_P (end
) && end
!= head
)
4970 end
= PREV_INSN (end
);
4972 /* If merge_bb ends with a tablejump, predicating/moving insn's
4973 into test_bb and then deleting merge_bb will result in the jumptable
4974 that follows merge_bb being removed along with merge_bb and then we
4975 get an unresolved reference to the jumptable. */
4976 if (tablejump_p (end
, NULL
, NULL
))
4980 head
= NEXT_INSN (head
);
4981 while (DEBUG_INSN_P (head
) && head
!= end
)
4982 head
= NEXT_INSN (head
);
4990 head
= NEXT_INSN (head
);
4991 while (DEBUG_INSN_P (head
) && head
!= end
)
4992 head
= NEXT_INSN (head
);
4997 if (!onlyjump_p (end
))
5004 end
= PREV_INSN (end
);
5005 while (DEBUG_INSN_P (end
) && end
!= head
)
5006 end
= PREV_INSN (end
);
5009 /* Don't move frame-related insn across the conditional branch. This
5010 can lead to one of the paths of the branch having wrong unwind info. */
5011 if (epilogue_completed
)
5013 rtx_insn
*insn
= head
;
5016 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5020 insn
= NEXT_INSN (insn
);
5024 /* Disable handling dead code by conditional execution if the machine needs
5025 to do anything funny with the tests, etc. */
5026 #ifndef IFCVT_MODIFY_TESTS
5027 if (targetm
.have_conditional_execution ())
5029 /* In the conditional execution case, we have things easy. We know
5030 the condition is reversible. We don't have to check life info
5031 because we're going to conditionally execute the code anyway.
5032 All that's left is making sure the insns involved can actually
5037 cond
= cond_exec_get_condition (jump
);
5041 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5042 int prob_val
= (note
? XINT (note
, 0) : -1);
5046 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5049 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5052 prob_val
= REG_BR_PROB_BASE
- prob_val
;
5055 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5056 && verify_changes (0))
5057 n_validated_changes
= num_validated_changes ();
5065 /* If we allocated new pseudos (e.g. in the conditional move
5066 expander called from noce_emit_cmove), we must resize the
5068 if (max_regno
< max_reg_num ())
5069 max_regno
= max_reg_num ();
5071 /* Try the NCE path if the CE path did not result in any changes. */
5072 if (n_validated_changes
== 0)
5079 /* In the non-conditional execution case, we have to verify that there
5080 are no trapping operations, no calls, no references to memory, and
5081 that any registers modified are dead at the branch site. */
5083 if (!any_condjump_p (jump
))
5086 /* Find the extent of the conditional. */
5087 cond
= noce_get_condition (jump
, &earliest
, false);
5091 live
= BITMAP_ALLOC (®_obstack
);
5092 simulate_backwards_to_point (merge_bb
, live
, end
);
5093 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5095 df_get_live_in (other_bb
), NULL
);
5100 /* Collect the set of registers set in MERGE_BB. */
5101 merge_set
= BITMAP_ALLOC (®_obstack
);
5103 FOR_BB_INSNS (merge_bb
, insn
)
5104 if (NONDEBUG_INSN_P (insn
))
5105 df_simulate_find_defs (insn
, merge_set
);
5107 /* If shrink-wrapping, disable this optimization when test_bb is
5108 the first basic block and merge_bb exits. The idea is to not
5109 move code setting up a return register as that may clobber a
5110 register used to pass function parameters, which then must be
5111 saved in caller-saved regs. A caller-saved reg requires the
5112 prologue, killing a shrink-wrap opportunity. */
5113 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5114 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5115 && single_succ_p (new_dest
)
5116 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5117 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5122 return_regs
= BITMAP_ALLOC (®_obstack
);
5124 /* Start off with the intersection of regs used to pass
5125 params and regs used to return values. */
5126 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5127 if (FUNCTION_ARG_REGNO_P (i
)
5128 && targetm
.calls
.function_value_regno_p (i
))
5129 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5131 bitmap_and_into (return_regs
,
5132 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5133 bitmap_and_into (return_regs
,
5134 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5135 if (!bitmap_empty_p (return_regs
))
5137 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5138 if (NONDEBUG_INSN_P (insn
))
5142 /* If this insn sets any reg in return_regs, add all
5143 reg uses to the set of regs we're interested in. */
5144 FOR_EACH_INSN_DEF (def
, insn
)
5145 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5147 df_simulate_uses (insn
, return_regs
);
5151 if (bitmap_intersect_p (merge_set
, return_regs
))
5153 BITMAP_FREE (return_regs
);
5154 BITMAP_FREE (merge_set
);
5158 BITMAP_FREE (return_regs
);
5163 /* We don't want to use normal invert_jump or redirect_jump because
5164 we don't want to delete_insn called. Also, we want to do our own
5165 change group management. */
5167 old_dest
= JUMP_LABEL (jump
);
5168 if (other_bb
!= new_dest
)
5170 if (!any_condjump_p (jump
))
5173 if (JUMP_P (BB_END (dest_edge
->src
)))
5174 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5175 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5176 new_dest_label
= ret_rtx
;
5178 new_dest_label
= block_label (new_dest
);
5180 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5182 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5183 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5187 if (verify_changes (n_validated_changes
))
5188 confirm_change_group ();
5192 if (other_bb
!= new_dest
)
5194 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5197 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5200 std::swap (BRANCH_EDGE (test_bb
)->count
,
5201 FALLTHRU_EDGE (test_bb
)->count
);
5202 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5203 FALLTHRU_EDGE (test_bb
)->probability
);
5204 update_br_prob_note (test_bb
);
5208 /* Move the insns out of MERGE_BB to before the branch. */
5213 if (end
== BB_END (merge_bb
))
5214 BB_END (merge_bb
) = PREV_INSN (head
);
5216 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5217 notes being moved might become invalid. */
5223 if (! INSN_P (insn
))
5225 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5228 remove_note (insn
, note
);
5229 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5231 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5232 notes referring to the registers being set might become invalid. */
5238 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5239 remove_reg_equal_equiv_notes_for_regno (i
);
5241 BITMAP_FREE (merge_set
);
5244 reorder_insns (head
, end
, PREV_INSN (earliest
));
5247 /* Remove the jump and edge if we can. */
5248 if (other_bb
== new_dest
)
5251 remove_edge (BRANCH_EDGE (test_bb
));
5252 /* ??? Can't merge blocks here, as then_bb is still in use.
5253 At minimum, the merge will get done just before bb-reorder. */
5262 BITMAP_FREE (merge_set
);
5267 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5268 we are after combine pass. */
5271 if_convert (bool after_combine
)
5278 df_live_add_problem ();
5279 df_live_set_all_dirty ();
5282 /* Record whether we are after combine pass. */
5283 ifcvt_after_combine
= after_combine
;
5284 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5285 != CODE_FOR_nothing
);
5286 num_possible_if_blocks
= 0;
5287 num_updated_if_blocks
= 0;
5288 num_true_changes
= 0;
5290 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5291 mark_loop_exit_edges ();
5292 loop_optimizer_finalize ();
5293 free_dominance_info (CDI_DOMINATORS
);
5295 /* Compute postdominators. */
5296 calculate_dominance_info (CDI_POST_DOMINATORS
);
5298 df_set_flags (DF_LR_RUN_DCE
);
5300 /* Go through each of the basic blocks looking for things to convert. If we
5301 have conditional execution, we make multiple passes to allow us to handle
5302 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5307 /* Only need to do dce on the first pass. */
5308 df_clear_flags (DF_LR_RUN_DCE
);
5309 cond_exec_changed_p
= FALSE
;
5312 #ifdef IFCVT_MULTIPLE_DUMPS
5313 if (dump_file
&& pass
> 1)
5314 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5317 FOR_EACH_BB_FN (bb
, cfun
)
5320 while (!df_get_bb_dirty (bb
)
5321 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5325 #ifdef IFCVT_MULTIPLE_DUMPS
5326 if (dump_file
&& cond_exec_changed_p
)
5327 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5330 while (cond_exec_changed_p
);
5332 #ifdef IFCVT_MULTIPLE_DUMPS
5334 fprintf (dump_file
, "\n\n========== no more changes\n");
5337 free_dominance_info (CDI_POST_DOMINATORS
);
5342 clear_aux_for_blocks ();
5344 /* If we allocated new pseudos, we must resize the array for sched1. */
5345 if (max_regno
< max_reg_num ())
5346 max_regno
= max_reg_num ();
5348 /* Write the final stats. */
5349 if (dump_file
&& num_possible_if_blocks
> 0)
5352 "\n%d possible IF blocks searched.\n",
5353 num_possible_if_blocks
);
5355 "%d IF blocks converted.\n",
5356 num_updated_if_blocks
);
5358 "%d true changes made.\n\n\n",
5363 df_remove_problem (df_live
);
5365 checking_verify_flow_info ();
5368 /* If-conversion and CFG cleanup. */
5370 rest_of_handle_if_conversion (void)
5372 if (flag_if_conversion
)
5376 dump_reg_info (dump_file
);
5377 dump_flow_info (dump_file
, dump_flags
);
5379 cleanup_cfg (CLEANUP_EXPENSIVE
);
5389 const pass_data pass_data_rtl_ifcvt
=
5391 RTL_PASS
, /* type */
5393 OPTGROUP_NONE
, /* optinfo_flags */
5394 TV_IFCVT
, /* tv_id */
5395 0, /* properties_required */
5396 0, /* properties_provided */
5397 0, /* properties_destroyed */
5398 0, /* todo_flags_start */
5399 TODO_df_finish
, /* todo_flags_finish */
5402 class pass_rtl_ifcvt
: public rtl_opt_pass
5405 pass_rtl_ifcvt (gcc::context
*ctxt
)
5406 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5409 /* opt_pass methods: */
5410 virtual bool gate (function
*)
5412 return (optimize
> 0) && dbg_cnt (if_conversion
);
5415 virtual unsigned int execute (function
*)
5417 return rest_of_handle_if_conversion ();
5420 }; // class pass_rtl_ifcvt
5425 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5427 return new pass_rtl_ifcvt (ctxt
);
5431 /* Rerun if-conversion, as combine may have simplified things enough
5432 to now meet sequence length restrictions. */
5436 const pass_data pass_data_if_after_combine
=
5438 RTL_PASS
, /* type */
5440 OPTGROUP_NONE
, /* optinfo_flags */
5441 TV_IFCVT
, /* tv_id */
5442 0, /* properties_required */
5443 0, /* properties_provided */
5444 0, /* properties_destroyed */
5445 0, /* todo_flags_start */
5446 TODO_df_finish
, /* todo_flags_finish */
5449 class pass_if_after_combine
: public rtl_opt_pass
5452 pass_if_after_combine (gcc::context
*ctxt
)
5453 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5456 /* opt_pass methods: */
5457 virtual bool gate (function
*)
5459 return optimize
> 0 && flag_if_conversion
5460 && dbg_cnt (if_after_combine
);
5463 virtual unsigned int execute (function
*)
5469 }; // class pass_if_after_combine
5474 make_pass_if_after_combine (gcc::context
*ctxt
)
5476 return new pass_if_after_combine (ctxt
);
5482 const pass_data pass_data_if_after_reload
=
5484 RTL_PASS
, /* type */
5486 OPTGROUP_NONE
, /* optinfo_flags */
5487 TV_IFCVT2
, /* tv_id */
5488 0, /* properties_required */
5489 0, /* properties_provided */
5490 0, /* properties_destroyed */
5491 0, /* todo_flags_start */
5492 TODO_df_finish
, /* todo_flags_finish */
5495 class pass_if_after_reload
: public rtl_opt_pass
5498 pass_if_after_reload (gcc::context
*ctxt
)
5499 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5502 /* opt_pass methods: */
5503 virtual bool gate (function
*)
5505 return optimize
> 0 && flag_if_conversion2
5506 && dbg_cnt (if_after_reload
);
5509 virtual unsigned int execute (function
*)
5515 }; // class pass_if_after_reload
5520 make_pass_if_after_reload (gcc::context
*ctxt
)
5522 return new pass_if_after_reload (ctxt
);