1 ;; Predicate definitions for IA-32 and x86-64.
2 ;; Copyright (C) 2004, 2005 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 2, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING. If not, write to
18 ;; the Free Software Foundation, 59 Temple Place - Suite 330,
19 ;; Boston, MA 02111-1307, USA.
21 ;; Return nonzero if OP is either a i387 or SSE fp register.
22 (define_predicate "any_fp_register_operand"
23 (and (match_code "reg")
24 (match_test "ANY_FP_REGNO_P (REGNO (op))")))
26 ;; Return nonzero if OP is an i387 fp register.
27 (define_predicate "fp_register_operand"
28 (and (match_code "reg")
29 (match_test "FP_REGNO_P (REGNO (op))")))
31 ;; Return nonzero if OP is a non-fp register_operand.
32 (define_predicate "register_and_not_any_fp_reg_operand"
33 (and (match_code "reg")
34 (not (match_test "ANY_FP_REGNO_P (REGNO (op))"))))
36 ;; Return nonzero if OP is a register operand other than an i387 fp register.
37 (define_predicate "register_and_not_fp_reg_operand"
38 (and (match_code "reg")
39 (not (match_test "FP_REGNO_P (REGNO (op))"))))
41 ;; True if the operand is an MMX register.
42 (define_predicate "mmx_reg_operand"
43 (and (match_code "reg")
44 (match_test "MMX_REGNO_P (REGNO (op))")))
46 ;; True if the operand is a Q_REGS class register.
47 (define_predicate "q_regs_operand"
48 (match_operand 0 "register_operand")
50 if (GET_CODE (op) == SUBREG)
52 return ANY_QI_REG_P (op);
55 ;; Return true if op is a NON_Q_REGS class register.
56 (define_predicate "non_q_regs_operand"
57 (match_operand 0 "register_operand")
59 if (GET_CODE (op) == SUBREG)
61 return NON_QI_REG_P (op);
64 ;; Match an SI or HImode register for a zero_extract.
65 (define_special_predicate "ext_register_operand"
66 (match_operand 0 "register_operand")
68 if ((!TARGET_64BIT || GET_MODE (op) != DImode)
69 && GET_MODE (op) != SImode && GET_MODE (op) != HImode)
71 if (GET_CODE (op) == SUBREG)
74 /* Be careful to accept only registers having upper parts. */
75 return REGNO (op) > LAST_VIRTUAL_REGISTER || REGNO (op) < 4;
78 ;; Return true if op is the flags register.
79 (define_predicate "flags_reg_operand"
80 (and (match_code "reg")
81 (match_test "REGNO (op) == FLAGS_REG")))
83 ;; Return 1 if VALUE can be stored in a sign extended immediate field.
84 (define_predicate "x86_64_immediate_operand"
85 (match_code "const_int,symbol_ref,label_ref,const")
88 return immediate_operand (op, mode);
90 switch (GET_CODE (op))
93 /* CONST_DOUBLES never match, since HOST_BITS_PER_WIDE_INT is known
94 to be at least 32 and this all acceptable constants are
95 represented as CONST_INT. */
96 if (HOST_BITS_PER_WIDE_INT == 32)
100 HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
101 return trunc_int_for_mode (val, SImode) == val;
106 /* For certain code models, the symbolic references are known to fit.
107 in CM_SMALL_PIC model we know it fits if it is local to the shared
108 library. Don't count TLS SYMBOL_REFs here, since they should fit
109 only if inside of UNSPEC handled below. */
110 /* TLS symbols are not constant. */
111 if (tls_symbolic_operand (op, Pmode))
113 return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_KERNEL);
116 /* For certain code models, the code is near as well. */
117 return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM
118 || ix86_cmodel == CM_KERNEL);
121 /* We also may accept the offsetted memory references in certain
123 if (GET_CODE (XEXP (op, 0)) == UNSPEC)
124 switch (XINT (XEXP (op, 0), 1))
126 case UNSPEC_GOTPCREL:
128 case UNSPEC_GOTNTPOFF:
135 if (GET_CODE (XEXP (op, 0)) == PLUS)
137 rtx op1 = XEXP (XEXP (op, 0), 0);
138 rtx op2 = XEXP (XEXP (op, 0), 1);
139 HOST_WIDE_INT offset;
141 if (ix86_cmodel == CM_LARGE)
143 if (GET_CODE (op2) != CONST_INT)
145 offset = trunc_int_for_mode (INTVAL (op2), DImode);
146 switch (GET_CODE (op1))
149 /* For CM_SMALL assume that latest object is 16MB before
150 end of 31bits boundary. We may also accept pretty
151 large negative constants knowing that all objects are
152 in the positive half of address space. */
153 if (ix86_cmodel == CM_SMALL
154 && offset < 16*1024*1024
155 && trunc_int_for_mode (offset, SImode) == offset)
157 /* For CM_KERNEL we know that all object resist in the
158 negative half of 32bits address space. We may not
159 accept negative offsets, since they may be just off
160 and we may accept pretty large positive ones. */
161 if (ix86_cmodel == CM_KERNEL
163 && trunc_int_for_mode (offset, SImode) == offset)
168 /* These conditions are similar to SYMBOL_REF ones, just the
169 constraints for code models differ. */
170 if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
171 && offset < 16*1024*1024
172 && trunc_int_for_mode (offset, SImode) == offset)
174 if (ix86_cmodel == CM_KERNEL
176 && trunc_int_for_mode (offset, SImode) == offset)
181 switch (XINT (op1, 1))
186 && trunc_int_for_mode (offset, SImode) == offset)
204 ;; Return 1 if VALUE can be stored in the zero extended immediate field.
205 (define_predicate "x86_64_zext_immediate_operand"
206 (match_code "const_double,const_int,symbol_ref,label_ref,const")
208 switch (GET_CODE (op))
211 if (HOST_BITS_PER_WIDE_INT == 32)
212 return (GET_MODE (op) == VOIDmode && !CONST_DOUBLE_HIGH (op));
217 if (HOST_BITS_PER_WIDE_INT == 32)
218 return INTVAL (op) >= 0;
220 return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
223 /* For certain code models, the symbolic references are known to fit. */
224 /* TLS symbols are not constant. */
225 if (tls_symbolic_operand (op, Pmode))
227 return ix86_cmodel == CM_SMALL;
230 /* For certain code models, the code is near as well. */
231 return ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM;
234 /* We also may accept the offsetted memory references in certain
236 if (GET_CODE (XEXP (op, 0)) == PLUS)
238 rtx op1 = XEXP (XEXP (op, 0), 0);
239 rtx op2 = XEXP (XEXP (op, 0), 1);
241 if (ix86_cmodel == CM_LARGE)
243 switch (GET_CODE (op1))
246 /* For small code model we may accept pretty large positive
247 offsets, since one bit is available for free. Negative
248 offsets are limited by the size of NULL pointer area
249 specified by the ABI. */
250 if (ix86_cmodel == CM_SMALL
251 && GET_CODE (op2) == CONST_INT
252 && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
253 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
255 /* ??? For the kernel, we may accept adjustment of
256 -0x10000000, since we know that it will just convert
257 negative address space to positive, but perhaps this
258 is not worthwhile. */
262 /* These conditions are similar to SYMBOL_REF ones, just the
263 constraints for code models differ. */
264 if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
265 && GET_CODE (op2) == CONST_INT
266 && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
267 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
283 ;; Return nonzero if OP is general operand representable on x86_64.
284 (define_predicate "x86_64_general_operand"
285 (if_then_else (match_test "TARGET_64BIT")
286 (ior (match_operand 0 "nonimmediate_operand")
287 (match_operand 0 "x86_64_immediate_operand"))
288 (match_operand 0 "general_operand")))
290 ;; Return nonzero if OP is general operand representable on x86_64
291 ;; as either sign extended or zero extended constant.
292 (define_predicate "x86_64_szext_general_operand"
293 (if_then_else (match_test "TARGET_64BIT")
294 (ior (match_operand 0 "nonimmediate_operand")
295 (ior (match_operand 0 "x86_64_immediate_operand")
296 (match_operand 0 "x86_64_zext_immediate_operand")))
297 (match_operand 0 "general_operand")))
299 ;; Return nonzero if OP is nonmemory operand representable on x86_64.
300 (define_predicate "x86_64_nonmemory_operand"
301 (if_then_else (match_test "TARGET_64BIT")
302 (ior (match_operand 0 "register_operand")
303 (match_operand 0 "x86_64_immediate_operand"))
304 (match_operand 0 "nonmemory_operand")))
306 ;; Return nonzero if OP is nonmemory operand representable on x86_64.
307 (define_predicate "x86_64_szext_nonmemory_operand"
308 (if_then_else (match_test "TARGET_64BIT")
309 (ior (match_operand 0 "register_operand")
310 (ior (match_operand 0 "x86_64_immediate_operand")
311 (match_operand 0 "x86_64_zext_immediate_operand")))
312 (match_operand 0 "nonmemory_operand")))
314 ;; Return nonzero if OP is nonmemory operand acceptable by movabs patterns.
315 (define_predicate "x86_64_movabs_operand"
316 (if_then_else (match_test "!TARGET_64BIT || !flag_pic")
317 (match_operand 0 "nonmemory_operand")
318 (ior (match_operand 0 "register_operand")
319 (and (match_operand 0 "const_double_operand")
320 (match_test "GET_MODE_SIZE (mode) <= 8")))))
322 ;; Returns nonzero if OP is either a symbol reference or a sum of a symbol
323 ;; reference and a constant.
324 (define_predicate "symbolic_operand"
325 (match_code "symbol_ref,label_ref,const")
327 switch (GET_CODE (op))
335 if (GET_CODE (op) == SYMBOL_REF
336 || GET_CODE (op) == LABEL_REF
337 || (GET_CODE (op) == UNSPEC
338 && (XINT (op, 1) == UNSPEC_GOT
339 || XINT (op, 1) == UNSPEC_GOTOFF
340 || XINT (op, 1) == UNSPEC_GOTPCREL)))
342 if (GET_CODE (op) != PLUS
343 || GET_CODE (XEXP (op, 1)) != CONST_INT)
347 if (GET_CODE (op) == SYMBOL_REF
348 || GET_CODE (op) == LABEL_REF)
350 /* Only @GOTOFF gets offsets. */
351 if (GET_CODE (op) != UNSPEC
352 || XINT (op, 1) != UNSPEC_GOTOFF)
355 op = XVECEXP (op, 0, 0);
356 if (GET_CODE (op) == SYMBOL_REF
357 || GET_CODE (op) == LABEL_REF)
366 ;; Return true if the operand contains a @GOT or @GOTOFF reference.
367 (define_predicate "pic_symbolic_operand"
373 if (GET_CODE (op) == UNSPEC
374 && XINT (op, 1) == UNSPEC_GOTPCREL)
376 if (GET_CODE (op) == PLUS
377 && GET_CODE (XEXP (op, 0)) == UNSPEC
378 && XINT (XEXP (op, 0), 1) == UNSPEC_GOTPCREL)
383 if (GET_CODE (op) == UNSPEC)
385 if (GET_CODE (op) != PLUS
386 || GET_CODE (XEXP (op, 1)) != CONST_INT)
389 if (GET_CODE (op) == UNSPEC)
395 ;; Return true if OP is a symbolic operand that resolves locally.
396 (define_predicate "local_symbolic_operand"
397 (match_code "const,label_ref,symbol_ref")
399 if (GET_CODE (op) == CONST
400 && GET_CODE (XEXP (op, 0)) == PLUS
401 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
402 op = XEXP (XEXP (op, 0), 0);
404 if (GET_CODE (op) == LABEL_REF)
407 if (GET_CODE (op) != SYMBOL_REF)
410 if (SYMBOL_REF_LOCAL_P (op))
413 /* There is, however, a not insubstantial body of code in the rest of
414 the compiler that assumes it can just stick the results of
415 ASM_GENERATE_INTERNAL_LABEL in a symbol_ref and have done. */
416 /* ??? This is a hack. Should update the body of the compiler to
417 always create a DECL an invoke targetm.encode_section_info. */
418 if (strncmp (XSTR (op, 0), internal_label_prefix,
419 internal_label_prefix_len) == 0)
425 ;; Test for various thread-local symbols.
426 (define_predicate "tls_symbolic_operand"
427 (and (match_code "symbol_ref")
428 (match_test "SYMBOL_REF_TLS_MODEL (op) != 0")))
430 (define_predicate "global_dynamic_symbolic_operand"
431 (and (match_code "symbol_ref")
432 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC")))
434 (define_predicate "local_dynamic_symbolic_operand"
435 (and (match_code "symbol_ref")
436 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
438 (define_predicate "initial_exec_symbolic_operand"
439 (and (match_code "symbol_ref")
440 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC")))
442 (define_predicate "local_exec_symbolic_operand"
443 (and (match_code "symbol_ref")
444 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC")))
446 ;; Test for a pc-relative call operand
447 (define_predicate "constant_call_address_operand"
448 (ior (match_code "symbol_ref")
449 (match_operand 0 "local_symbolic_operand")))
451 ;; True for any non-virtual or eliminable register. Used in places where
452 ;; instantiation of such a register may cause the pattern to not be recognized.
453 (define_predicate "register_no_elim_operand"
454 (match_operand 0 "register_operand")
456 if (GET_CODE (op) == SUBREG)
457 op = SUBREG_REG (op);
458 return !(op == arg_pointer_rtx
459 || op == frame_pointer_rtx
460 || (REGNO (op) >= FIRST_PSEUDO_REGISTER
461 && REGNO (op) <= LAST_VIRTUAL_REGISTER));
464 ;; Similarly, but include the stack pointer. This is used to prevent esp
465 ;; from being used as an index reg.
466 (define_predicate "index_register_operand"
467 (match_operand 0 "register_operand")
469 if (GET_CODE (op) == SUBREG)
470 op = SUBREG_REG (op);
471 if (reload_in_progress || reload_completed)
472 return REG_OK_FOR_INDEX_STRICT_P (op);
474 return REG_OK_FOR_INDEX_NONSTRICT_P (op);
477 ;; Return false if this is any eliminable register. Otherwise general_operand.
478 (define_predicate "general_no_elim_operand"
479 (if_then_else (match_code "reg,subreg")
480 (match_operand 0 "register_no_elim_operand")
481 (match_operand 0 "general_operand")))
483 ;; Return false if this is any eliminable register. Otherwise
484 ;; register_operand or a constant.
485 (define_predicate "nonmemory_no_elim_operand"
486 (ior (match_operand 0 "register_no_elim_operand")
487 (match_operand 0 "immediate_operand")))
489 ;; Test for a valid operand for a call instruction.
490 (define_predicate "call_insn_operand"
491 (ior (match_operand 0 "constant_call_address_operand")
492 (ior (match_operand 0 "register_no_elim_operand")
493 (match_operand 0 "memory_operand"))))
495 ;; Simiarly, but for tail calls, in which we cannot allow memory references.
496 (define_predicate "sibcall_insn_operand"
497 (ior (match_operand 0 "constant_call_address_operand")
498 (match_operand 0 "register_no_elim_operand")))
500 ;; Match exactly zero.
501 (define_predicate "const0_operand"
502 (and (match_code "const_int,const_double,const_vector")
503 (match_test "op == CONST0_RTX (mode)")))
505 ;; Match exactly one.
506 (define_predicate "const1_operand"
507 (and (match_code "const_int")
508 (match_test "op == const1_rtx")))
510 ;; Match 2, 4, or 8. Used for leal multiplicands.
511 (define_predicate "const248_operand"
512 (match_code "const_int")
514 HOST_WIDE_INT i = INTVAL (op);
515 return i == 2 || i == 4 || i == 8;
519 (define_predicate "const_0_to_1_operand"
520 (and (match_code "const_int")
521 (match_test "op == const0_rtx || op == const1_rtx")))
524 (define_predicate "const_0_to_3_operand"
525 (and (match_code "const_int")
526 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 3")))
529 (define_predicate "const_0_to_7_operand"
530 (and (match_code "const_int")
531 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))
534 (define_predicate "const_0_to_15_operand"
535 (and (match_code "const_int")
536 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 15")))
539 (define_predicate "const_0_to_63_operand"
540 (and (match_code "const_int")
541 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 63")))
544 (define_predicate "const_0_to_255_operand"
545 (and (match_code "const_int")
546 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 255")))
548 ;; Match (0 to 255) * 8
549 (define_predicate "const_0_to_255_mul_8_operand"
550 (match_code "const_int")
552 unsigned HOST_WIDE_INT val = INTVAL (op);
553 return val <= 255*8 && val % 8 == 0;
556 ;; Return nonzero if OP is CONST_INT >= 1 and <= 31 (a valid operand
557 ;; for shift & compare patterns, as shifting by 0 does not change flags).
558 (define_predicate "const_1_to_31_operand"
559 (and (match_code "const_int")
560 (match_test "INTVAL (op) >= 1 && INTVAL (op) <= 31")))
563 (define_predicate "const_2_to_3_operand"
564 (and (match_code "const_int")
565 (match_test "INTVAL (op) == 2 || INTVAL (op) == 3")))
568 (define_predicate "const_4_to_7_operand"
569 (and (match_code "const_int")
570 (match_test "INTVAL (op) >= 4 && INTVAL (op) <= 7")))
572 ;; Match exactly one bit in 4-bit mask.
573 (define_predicate "const_pow2_1_to_8_operand"
574 (match_code "const_int")
576 unsigned int log = exact_log2 (INTVAL (op));
580 ;; Match exactly one bit in 8-bit mask.
581 (define_predicate "const_pow2_1_to_128_operand"
582 (match_code "const_int")
584 unsigned int log = exact_log2 (INTVAL (op));
588 ;; True if this is a constant appropriate for an increment or decrement.
589 (define_predicate "incdec_operand"
590 (match_code "const_int")
592 /* On Pentium4, the inc and dec operations causes extra dependency on flag
593 registers, since carry flag is not set. */
594 if ((TARGET_PENTIUM4 || TARGET_NOCONA) && !optimize_size)
596 return op == const1_rtx || op == constm1_rtx;
599 ;; True for registers, or 1 or -1. Used to optimize double-word shifts.
600 (define_predicate "reg_or_pm1_operand"
601 (ior (match_operand 0 "register_operand")
602 (and (match_code "const_int")
603 (match_test "op == const1_rtx || op == constm1_rtx"))))
605 ;; True if OP is acceptable as operand of DImode shift expander.
606 (define_predicate "shiftdi_operand"
607 (if_then_else (match_test "TARGET_64BIT")
608 (match_operand 0 "nonimmediate_operand")
609 (match_operand 0 "register_operand")))
611 (define_predicate "ashldi_input_operand"
612 (if_then_else (match_test "TARGET_64BIT")
613 (match_operand 0 "nonimmediate_operand")
614 (match_operand 0 "reg_or_pm1_operand")))
616 ;; Return true if OP is a vector load from the constant pool with just
617 ;; the first element nonzero.
618 (define_predicate "zero_extended_scalar_load_operand"
622 op = maybe_get_pool_constant (op);
625 if (GET_CODE (op) != CONST_VECTOR)
628 (GET_MODE_SIZE (GET_MODE (op)) /
629 GET_MODE_SIZE (GET_MODE_INNER (GET_MODE (op))));
630 for (n_elts--; n_elts > 0; n_elts--)
632 rtx elt = CONST_VECTOR_ELT (op, n_elts);
633 if (elt != CONST0_RTX (GET_MODE_INNER (GET_MODE (op))))
639 ;; Return 1 when OP is operand acceptable for standard SSE move.
640 (define_predicate "vector_move_operand"
641 (ior (match_operand 0 "nonimmediate_operand")
642 (match_operand 0 "const0_operand")))
644 ;; Return true if OP is a register or a zero.
645 (define_predicate "reg_or_0_operand"
646 (ior (match_operand 0 "register_operand")
647 (match_operand 0 "const0_operand")))
649 ;; Return true if op if a valid address, and does not contain
650 ;; a segment override.
651 (define_special_predicate "no_seg_address_operand"
652 (match_operand 0 "address_operand")
654 struct ix86_address parts;
655 if (! ix86_decompose_address (op, &parts))
657 return parts.seg == SEG_DEFAULT;
660 ;; Return nonzero if the rtx is known aligned.
661 (define_predicate "aligned_operand"
662 (match_operand 0 "general_operand")
664 struct ix86_address parts;
666 /* Registers and immediate operands are always "aligned". */
667 if (GET_CODE (op) != MEM)
670 /* Don't even try to do any aligned optimizations with volatiles. */
671 if (MEM_VOLATILE_P (op))
675 /* Pushes and pops are only valid on the stack pointer. */
676 if (GET_CODE (op) == PRE_DEC
677 || GET_CODE (op) == POST_INC)
680 /* Decode the address. */
681 if (!ix86_decompose_address (op, &parts))
684 /* Look for some component that isn't known to be aligned. */
687 if (REGNO_POINTER_ALIGN (REGNO (parts.index)) * parts.scale < 32)
692 if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 32)
697 if (GET_CODE (parts.disp) != CONST_INT
698 || (INTVAL (parts.disp) & 3) != 0)
702 /* Didn't find one -- this must be an aligned address. */
706 ;; Returns 1 if OP is memory operand with a displacement.
707 (define_predicate "memory_displacement_operand"
708 (match_operand 0 "memory_operand")
710 struct ix86_address parts;
711 if (!ix86_decompose_address (XEXP (op, 0), &parts))
713 return parts.disp != NULL_RTX;
716 ;; Returns 1 if OP is memory operand that cannot be represented
717 ;; by the modRM array.
718 (define_predicate "long_memory_operand"
719 (and (match_operand 0 "memory_operand")
720 (match_test "memory_address_length (op) != 0")))
722 ;; Return 1 if OP is a comparison operator that can be issued by fcmov.
723 (define_predicate "fcmov_comparison_operator"
724 (match_operand 0 "comparison_operator")
726 enum machine_mode inmode = GET_MODE (XEXP (op, 0));
727 enum rtx_code code = GET_CODE (op);
729 if (inmode == CCFPmode || inmode == CCFPUmode)
731 enum rtx_code second_code, bypass_code;
732 ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
733 if (bypass_code != UNKNOWN || second_code != UNKNOWN)
735 code = ix86_fp_compare_code_to_integer (code);
737 /* i387 supports just limited amount of conditional codes. */
740 case LTU: case GTU: case LEU: case GEU:
741 if (inmode == CCmode || inmode == CCFPmode || inmode == CCFPUmode)
744 case ORDERED: case UNORDERED:
752 ;; Return 1 if OP is a comparison that can be used in the CMPSS/CMPPS insns.
753 ;; The first set are supported directly; the second set can't be done with
754 ;; full IEEE support, i.e. NaNs.
756 ;; ??? It would seem that we have a lot of uses of this predicate that pass
757 ;; it the wrong mode. We got away with this because the old function didn't
758 ;; check the mode at all. Mirror that for now by calling this a special
761 (define_special_predicate "sse_comparison_operator"
762 (match_code "eq,lt,le,unordered,ne,unge,ungt,ordered"))
764 ;; Return 1 if OP is a valid comparison operator in valid mode.
765 (define_predicate "ix86_comparison_operator"
766 (match_operand 0 "comparison_operator")
768 enum machine_mode inmode = GET_MODE (XEXP (op, 0));
769 enum rtx_code code = GET_CODE (op);
771 if (inmode == CCFPmode || inmode == CCFPUmode)
773 enum rtx_code second_code, bypass_code;
774 ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
775 return (bypass_code == UNKNOWN && second_code == UNKNOWN);
782 if (inmode == CCmode || inmode == CCGCmode
783 || inmode == CCGOCmode || inmode == CCNOmode)
786 case LTU: case GTU: case LEU: case ORDERED: case UNORDERED: case GEU:
787 if (inmode == CCmode)
791 if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
799 ;; Return 1 if OP is a valid comparison operator testing carry flag to be set.
800 (define_predicate "ix86_carry_flag_operator"
801 (match_code "ltu,lt,unlt,gt,ungt,le,unle,ge,unge,ltgt,uneq")
803 enum machine_mode inmode = GET_MODE (XEXP (op, 0));
804 enum rtx_code code = GET_CODE (op);
806 if (GET_CODE (XEXP (op, 0)) != REG
807 || REGNO (XEXP (op, 0)) != FLAGS_REG
808 || XEXP (op, 1) != const0_rtx)
811 if (inmode == CCFPmode || inmode == CCFPUmode)
813 enum rtx_code second_code, bypass_code;
814 ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
815 if (bypass_code != UNKNOWN || second_code != UNKNOWN)
817 code = ix86_fp_compare_code_to_integer (code);
819 else if (inmode != CCmode)
825 ;; Nearly general operand, but accept any const_double, since we wish
826 ;; to be able to drop them into memory rather than have them get pulled
828 (define_predicate "cmp_fp_expander_operand"
829 (ior (match_code "const_double")
830 (match_operand 0 "general_operand")))
832 ;; Return true if this is a valid binary floating-point operation.
833 (define_predicate "binary_fp_operator"
834 (match_code "plus,minus,mult,div"))
836 ;; Return true if this is a multiply operation.
837 (define_predicate "mult_operator"
840 ;; Return true if this is a division operation.
841 (define_predicate "div_operator"
844 ;; Return true if this is a float extend operation.
845 (define_predicate "float_operator"
846 (match_code "float"))
848 ;; Return true for ARITHMETIC_P.
849 (define_predicate "arith_or_logical_operator"
850 (match_code "plus,mult,and,ior,xor,smin,smax,umin,umax,compare,minus,div,
851 mod,udiv,umod,ashift,rotate,ashiftrt,lshiftrt,rotatert"))
853 ;; Return 1 if OP is a binary operator that can be promoted to wider mode.
854 ;; Modern CPUs have same latency for HImode and SImode multiply,
855 ;; but 386 and 486 do HImode multiply faster. */
856 (define_predicate "promotable_binary_operator"
857 (ior (match_code "plus,and,ior,xor,ashift")
858 (and (match_code "mult")
859 (match_test "ix86_tune > PROCESSOR_I486"))))
861 ;; To avoid problems when jump re-emits comparisons like testqi_ext_ccno_0,
862 ;; re-recognize the operand to avoid a copy_to_mode_reg that will fail.
864 ;; ??? It seems likely that this will only work because cmpsi is an
865 ;; expander, and no actual insns use this.
867 (define_predicate "cmpsi_operand_1"
870 return (GET_MODE (op) == SImode
871 && GET_CODE (XEXP (op, 0)) == ZERO_EXTRACT
872 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT
873 && GET_CODE (XEXP (XEXP (op, 0), 2)) == CONST_INT
874 && INTVAL (XEXP (XEXP (op, 0), 1)) == 8
875 && INTVAL (XEXP (XEXP (op, 0), 2)) == 8
876 && GET_CODE (XEXP (op, 1)) == CONST_INT);
879 (define_predicate "cmpsi_operand"
880 (ior (match_operand 0 "nonimmediate_operand")
881 (match_operand 0 "cmpsi_operand_1")))
883 (define_predicate "compare_operator"
884 (match_code "compare"))
886 (define_predicate "absneg_operator"
887 (match_code "abs,neg"))