gcc/testsuite/gcc.target/aarch64/vect_saddl_1.c

   1 /* { dg-do run } */
   2 /* { dg-options "-O3 -fno-inline -save-temps -fno-vect-cost-model -fno-ipa-icf" } */
   3
   4 typedef signed char S8_t;
   5 typedef signed short S16_t;
   6 typedef signed int S32_t;
   7 typedef signed long long S64_t;
   8
   9 typedef signed char *__restrict__ pS8_t;
  10 typedef signed short *__restrict__ pS16_t;
  11 typedef signed int *__restrict__ pS32_t;
  12 typedef signed long long *__restrict__ pS64_t;
  13
  14 typedef unsigned char U8_t;
  15 typedef unsigned short U16_t;
  16 typedef unsigned int U32_t;
  17 typedef unsigned long long U64_t;
  18
  19 typedef unsigned char *__restrict__ pU8_t;
  20 typedef unsigned short *__restrict__ pU16_t;
  21 typedef unsigned int *__restrict__ pU32_t;
  22 typedef unsigned long long *__restrict__ pU64_t;
  23
  24 extern void abort ();
  25
  26 void
  27 test_addl_S64_S32_4 (pS64_t a, pS32_t b, pS32_t c)
  28 {
  29   int i;
  30   for (i = 0; i < 4; i++)
  31     a[i] = (S64_t) b[i] + (S64_t) c[i];
  32 }
  33 /* "saddl\tv\[0-9\]+\.2d,\ v\[0-9\]+\.2s,\ v\[0-9\]+\.2s" */
  34 /* "saddl2\tv\[0-9\]+\.2d,\ v\[0-9\]+\.4s,\ v\[0-9\]+\.4s" */
  35
  36 /* a = -b + c => a = c - b */
  37 void
  38 test_addl_S64_S32_4_neg0 (pS64_t a, pS32_t b, pS32_t c)
  39 {
  40   int i;
  41   for (i = 0; i < 4; i++)
  42     a[i] = -(S64_t) b[i] + (S64_t) c[i];
  43 }
  44 /* "ssubl\tv\[0-9\]+\.2d,\ v\[0-9\]+\.2s,\ v\[0-9\]+\.2s" */
  45 /* "ssubl2\tv\[0-9\]+\.2d,\ v\[0-9\]+\.4s,\ v\[0-9\]+\.4s" */
  46
  47 /* a = b + -c => a = b - c */
  48 void
  49 test_addl_S64_S32_4_neg1 (pS64_t a, pS32_t b, pS32_t c)
  50 {
  51   int i;
  52   for (i = 0; i < 4; i++)
  53     a[i] = (S64_t) b[i] + -(S64_t) c[i];
  54 }
  55 /* "ssubl\tv\[0-9\]+\.2d,\ v\[0-9\]+\.2s,\ v\[0-9\]+\.2s" */
  56 /* "ssubl2\tv\[0-9\]+\.2d,\ v\[0-9\]+\.4s,\ v\[0-9\]+\.4s" */
  57
  58 void
  59 test_addl_S32_S16_8 (pS32_t a, pS16_t b, pS16_t c)
  60 {
  61   int i;
  62   for (i = 0; i < 8; i++)
  63     a[i] = (S32_t) b[i] + (S32_t) c[i];
  64 }
  65 /* { dg-final { scan-assembler "saddl\tv\[0-9\]+\.4s,\ v\[0-9\]+\.4h,\ v\[0-9\]+\.4h" } } */
  66 /* { dg-final { scan-assembler "saddl2\tv\[0-9\]+\.4s,\ v\[0-9\]+\.8h,\ v\[0-9\]+\.8h" } } */
  67
  68 void
  69 test_addl_S16_S8_16 (pS16_t a, pS8_t b, pS8_t c)
  70 {
  71   int i;
  72   for (i = 0; i < 16; i++)
  73     a[i] = (S16_t) b[i] + (S16_t) c[i];
  74 }
  75 /* { dg-final { scan-assembler "saddl\tv\[0-9\]+\.8h,\ v\[0-9\]+\.8b,\ v\[0-9\]+\.8b" } } */
  76 /* { dg-final { scan-assembler "saddl2\tv\[0-9\]+\.8h,\ v\[0-9\]+\.16b,\ v\[0-9\]+\.16b" } } */
  77
  78 void
  79 test_addl_U64_U32_4 (pU64_t a, pU32_t b, pU32_t c)
  80 {
  81   int i;
  82   for (i = 0; i < 4; i++)
  83     a[i] = (U64_t) b[i] + (U64_t) c[i];
  84 }
  85 /* { dg-final { scan-assembler "uaddl\tv\[0-9\]+\.2d,\ v\[0-9\]+\.2s,\ v\[0-9\]+\.2s" } } */
  86 /* { dg-final { scan-assembler "uaddl2\tv\[0-9\]+\.2d,\ v\[0-9\]+\.4s,\ v\[0-9\]+\.4s" } } */
  87
  88 void
  89 test_addl_U32_U16_8 (pU32_t a, pU16_t b, pU16_t c)
  90 {
  91   int i;
  92   for (i = 0; i < 8; i++)
  93     a[i] = (U32_t) b[i] + (U32_t) c[i];
  94 }
  95 /* { dg-final { scan-assembler "uaddl\tv\[0-9\]+\.4s,\ v\[0-9\]+\.4h,\ v\[0-9\]+\.4h" } } */
  96 /* { dg-final { scan-assembler "uaddl2\tv\[0-9\]+\.4s,\ v\[0-9\]+\.8h,\ v\[0-9\]+\.8h" } } */
  97
  98 void
  99 test_addl_U16_U8_16 (pU16_t a, pU8_t b, pU8_t c)
 100 {
 101   int i;
 102   for (i = 0; i < 16; i++)
 103     a[i] = (U16_t) b[i] + (U16_t) c[i];
 104 }
 105 /* { dg-final { scan-assembler "uaddl\tv\[0-9\]+\.8h,\ v\[0-9\]+\.8b,\ v\[0-9\]+\.8b" } } */
 106 /* { dg-final { scan-assembler "uaddl2\tv\[0-9\]+\.8h,\ v\[0-9\]+\.16b,\ v\[0-9\]+\.16b" } } */
 107
 108 void
 109 test_subl_S64_S32_4 (pS64_t a, pS32_t b, pS32_t c)
 110 {
 111   int i;
 112   for (i = 0; i < 4; i++)
 113     a[i] = (S64_t) b[i] - (S64_t) c[i];
 114 }
 115 /* "ssubl\tv\[0-9\]+\.2d,\ v\[0-9\]+\.2s,\ v\[0-9\]+\.2s" */
 116 /* "ssubl2\tv\[0-9\]+\.2d,\ v\[0-9\]+\.4s,\ v\[0-9\]+\.4s" */
 117
 118 /* a = b - -c => a = b + c */
 119 void
 120 test_subl_S64_S32_4_neg0 (pS64_t a, pS32_t b, pS32_t c)
 121 {
 122   int i;
 123   for (i = 0; i < 4; i++)
 124     a[i] = (S64_t) b[i] - -(S64_t) c[i];
 125 }
 126 /* { dg-final { scan-assembler-times "saddl\tv\[0-9\]+\.2d,\ v\[0-9\]+\.2s,\ v\[0-9\]+\.2s" 2 } } */
 127 /* { dg-final { scan-assembler-times "saddl2\tv\[0-9\]+\.2d,\ v\[0-9\]+\.4s,\ v\[0-9\]+\.4s" 2 } } */
 128
 129 /* a = -b - -c => a = c - b */
 130 void
 131 test_subl_S64_S32_4_neg1 (pS64_t a, pS32_t b, pS32_t c)
 132 {
 133   int i;
 134   for (i = 0; i < 4; i++)
 135     a[i] = -(S64_t) b[i] - -(S64_t) c[i];
 136 }
 137 /* "ssubl\tv\[0-9\]+\.2d,\ v\[0-9\]+\.2s,\ v\[0-9\]+\.2s" */
 138 /* "ssubl2\tv\[0-9\]+\.2d,\ v\[0-9\]+\.4s,\ v\[0-9\]+\.4s" */
 139
 140 /* a = -(b - c) => a = c - b */
 141 void
 142 test_subl_S64_S32_4_neg2 (pS64_t a, pS32_t b, pS32_t c)
 143 {
 144   int i;
 145   for (i = 0; i < 4; i++)
 146     a[i] = -((S64_t) b[i] - (S64_t) c[i]);
 147 }
 148 /* { dg-final { scan-assembler-times "ssubl\tv\[0-9\]+\.2d,\ v\[0-9\]+\.2s,\ v\[0-9\]+\.2s" 5 } } */
 149 /* { dg-final { scan-assembler-times "ssubl2\tv\[0-9\]+\.2d,\ v\[0-9\]+\.4s,\ v\[0-9\]+\.4s" 5 } } */
 150
 151 void
 152 test_subl_S32_S16_8 (pS32_t a, pS16_t b, pS16_t c)
 153 {
 154   int i;
 155   for (i = 0; i < 8; i++)
 156     a[i] = (S32_t) b[i] - (S32_t) c[i];
 157 }
 158 /* { dg-final { scan-assembler "ssubl\tv\[0-9\]+\.4s,\ v\[0-9\]+\.4h,\ v\[0-9\]+\.4h" } } */
 159 /* { dg-final { scan-assembler "ssubl2\tv\[0-9\]+\.4s,\ v\[0-9\]+\.8h,\ v\[0-9\]+\.8h" } } */
 160
 161 void
 162 test_subl_S16_S8_16 (pS16_t a, pS8_t b, pS8_t c)
 163 {
 164   int i;
 165   for (i = 0; i < 16; i++)
 166     a[i] = (S16_t) b[i] - (S16_t) c[i];
 167 }
 168 /* { dg-final { scan-assembler "ssubl\tv\[0-9\]+\.8h,\ v\[0-9\]+\.8b,\ v\[0-9\]+\.8b" } } */
 169 /* { dg-final { scan-assembler "ssubl2\tv\[0-9\]+\.8h,\ v\[0-9\]+\.16b,\ v\[0-9\]+\.16b" } } */
 170
 171 void
 172 test_subl_U64_U32_4 (pU64_t a, pU32_t b, pU32_t c)
 173 {
 174   int i;
 175   for (i = 0; i < 4; i++)
 176     a[i] = (U64_t) b[i] - (U64_t) c[i];
 177 }
 178 /* { dg-final { scan-assembler "usubl\tv\[0-9\]+\.2d,\ v\[0-9\]+\.2s,\ v\[0-9\]+\.2s" } } */
 179 /* { dg-final { scan-assembler "usubl2\tv\[0-9\]+\.2d,\ v\[0-9\]+\.4s,\ v\[0-9\]+\.4s" } } */
 180
 181 void
 182 test_subl_U32_U16_8 (pU32_t a, pU16_t b, pU16_t c)
 183 {
 184   int i;
 185   for (i = 0; i < 8; i++)
 186     a[i] = (U32_t) b[i] - (U32_t) c[i];
 187 }
 188 /* { dg-final { scan-assembler "usubl\tv\[0-9\]+\.4s,\ v\[0-9\]+\.4h,\ v\[0-9\]+\.4h" } } */
 189 /* { dg-final { scan-assembler "usubl2\tv\[0-9\]+\.4s,\ v\[0-9\]+\.8h,\ v\[0-9\]+\.8h" } } */
 190
 191 void
 192 test_subl_U16_U8_16 (pU16_t a, pU8_t b, pU8_t c)
 193 {
 194   int i;
 195   for (i = 0; i < 16; i++)
 196     a[i] = (U16_t) b[i] - (U16_t) c[i];
 197 }
 198 /* { dg-final { scan-assembler "usubl\tv\[0-9\]+\.8h,\ v\[0-9\]+\.8b,\ v\[0-9\]+\.8b" } } */
 199 /* { dg-final { scan-assembler "usubl2\tv\[0-9\]+\.8h,\ v\[0-9\]+\.16b,\ v\[0-9\]+\.16b" } } */
 200
 201 /* input values */
 202
 203 S64_t S64_ta[4];
 204 S32_t S32_tb[4] = { 0, 1, 2, 3 };
 205 S32_t S32_tc[4] = { 2, 2, -2, -2 };
 206
 207 S32_t S32_ta[8];
 208 S16_t S16_tb[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
 209 S16_t S16_tc[8] = { 2, 2, -2, -2, 2, 2, -2, -2 };
 210
 211 S16_t S16_ta[16];
 212 S8_t S8_tb[16] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
 213 S8_t S8_tc[16] = { 2, 2, -2, -2, 2, 2, -2, -2, 2, 2, -2, -2, 2, 2, -2, -2 };
 214
 215 /* expected output */
 216
 217 S64_t addl_rS64[] = { 2, 3, 0, 1 };
 218 S64_t neg_r[] = { 2, 1, -4, -5 };
 219 S32_t addl_rS32[] = { 2, 3, 0, 1, 6, 7, 4, 5 };
 220 S16_t addl_rS16[] = { 2, 3, 0, 1, 6, 7, 4, 5, 10, 11, 8, 9, 14, 15, 12, 13 };
 221 S64_t subl_rS64[] = { -2, -1, 4, 5 };
 222 S32_t subl_rS32[] = { -2, -1, 4, 5, 2, 3, 8, 9 };
 223 S16_t subl_rS16[] =
 224   { -2, -1, 4, 5, 2, 3, 8, 9, 6, 7, 12, 13, 10, 11, 16, 17 };
 225 U64_t addl_rU64[] = { 2, 3, 0x100000000, 0x100000001 };
 226 U32_t addl_rU32[] = { 2, 3, 0x10000, 0x10001, 6, 7, 0x10004, 0x10005 };
 227 U16_t addl_rU16[] =
 228 {
 229   0x0002, 0x0003, 0x0100, 0x0101, 0x0006, 0x0007, 0x0104, 0x0105,
 230   0x000a, 0x000b, 0x0108, 0x0109, 0x000e, 0x000f, 0x010c, 0x010d
 231 };
 232 U64_t subl_rU64[] =
 233 {
 234   0xfffffffffffffffe, 0xffffffffffffffff,
 235   0xffffffff00000004, 0xffffffff00000005
 236 };
 237 U32_t subl_rU32[] =
 238 {
 239   0xfffffffe, 0xffffffff, 0xffff0004, 0xffff0005,
 240   0x00000002, 0x00000003, 0xffff0008, 0xffff0009
 241 };
 242 U16_t subl_rU16[] =
 243 {
 244   0xfffe, 0xffff, 0xff04, 0xff05, 0x0002, 0x0003, 0xff08, 0xff09,
 245   0x0006, 0x0007, 0xff0c, 0xff0d, 0x000a, 0x000b, 0xff10, 0xff11
 246 };
 247
 248 #define CHECK(T,N,AS,US)                                 \
 249 do                                                       \
 250   {                                                      \
 251     for (i = 0; i < N; i++)                              \
 252       if ((US##T##_t)S##T##_ta[i] != AS##_##r##US##T[i]) \
 253         abort();                                         \
 254   }                                                      \
 255 while (0)
 256
 257 #define NCHECK(RES)                           \
 258 do                                            \
 259   {                                           \
 260     for (i = 0; i < 4; i++)                   \
 261       if (S64_ta[i] != RES[i])                \
 262         abort ();                             \
 263   }                                           \
 264 while (0)
 265
 266 #define SCHECK(T,N,AS) CHECK(T,N,AS,S)
 267 #define UCHECK(T,N,AS) CHECK(T,N,AS,U)
 268
 269 int
 270 main ()
 271 {
 272   int i;
 273
 274   test_addl_S64_S32_4 (S64_ta, S32_tb, S32_tc);
 275   SCHECK (64, 4, addl);
 276   test_addl_S32_S16_8 (S32_ta, S16_tb, S16_tc);
 277   SCHECK (32, 8, addl);
 278   test_addl_S16_S8_16 (S16_ta, S8_tb, S8_tc);
 279   SCHECK (16, 16, addl);
 280   test_subl_S64_S32_4 (S64_ta, S32_tb, S32_tc);
 281   SCHECK (64, 4, subl);
 282   test_subl_S32_S16_8 (S32_ta, S16_tb, S16_tc);
 283   SCHECK (32, 8, subl);
 284   test_subl_S16_S8_16 (S16_ta, S8_tb, S8_tc);
 285   SCHECK (16, 16, subl);
 286
 287   test_addl_U64_U32_4 (S64_ta, S32_tb, S32_tc);
 288   UCHECK (64, 4, addl);
 289   test_addl_U32_U16_8 (S32_ta, S16_tb, S16_tc);
 290   UCHECK (32, 8, addl);
 291   test_addl_U16_U8_16 (S16_ta, S8_tb, S8_tc);
 292   UCHECK (16, 16, addl);
 293   test_subl_U64_U32_4 (S64_ta, S32_tb, S32_tc);
 294   UCHECK (64, 4, subl);
 295   test_subl_U32_U16_8 (S32_ta, S16_tb, S16_tc);
 296   UCHECK (32, 8, subl);
 297   test_subl_U16_U8_16 (S16_ta, S8_tb, S8_tc);
 298   UCHECK (16, 16, subl);
 299
 300   test_addl_S64_S32_4_neg0 (S64_ta, S32_tb, S32_tc);
 301   NCHECK (neg_r);
 302   test_addl_S64_S32_4_neg1 (S64_ta, S32_tb, S32_tc);
 303   NCHECK (subl_rS64);
 304   test_subl_S64_S32_4_neg0 (S64_ta, S32_tb, S32_tc);
 305   NCHECK (addl_rS64);
 306   test_subl_S64_S32_4_neg1 (S64_ta, S32_tb, S32_tc);
 307   NCHECK (neg_r);
 308   test_subl_S64_S32_4_neg2 (S64_ta, S32_tb, S32_tc);
 309   NCHECK (neg_r);
 310
 311   return 0;
 312 }
 313
 314 /* { dg-final { cleanup-saved-temps } } */
 315