gcc/testsuite/gcc.target/aarch64/singleton_intrinsics_1.c

   1 /* { dg-do assemble } */
   2 /* { dg-options "-O2 -dp --save-temps" } */
   3
   4 /* Test the [u]int64x1_t intrinsics.  */
   5
   6 #include <arm_neon.h>
   7
   8 /* { dg-final { scan-assembler-times "\\tadd\\td\[0-9\]+" 2 } } */
   9
  10 uint64x1_t
  11 test_vadd_u64 (uint64x1_t a, uint64x1_t b)
  12 {
  13   return vadd_u64 (a, b);
  14 }
  15
  16 int64x1_t
  17 test_vadd_s64 (int64x1_t a, int64x1_t b)
  18 {
  19   return vadd_s64 (a, b);
  20 }
  21
  22 /* { dg-final { scan-assembler-times "\\tabs\\td\[0-9\]+, d\[0-9\]+" 1 } } */
  23
  24 int64x1_t
  25 test_vabs_s64 (int64x1_t a)
  26 {
  27   return vabs_s64 (a);
  28 }
  29
  30 /* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
  31
  32 uint64x1_t
  33 test_vceq_s64 (int64x1_t a, int64x1_t b)
  34 {
  35   return vceq_s64 (a, b);
  36 }
  37
  38 /* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
  39
  40 uint64x1_t
  41 test_vceqz_s64 (int64x1_t a)
  42 {
  43   return vceqz_s64 (a);
  44 }
  45
  46 /* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
  47
  48 uint64x1_t
  49 test_vcge_s64 (int64x1_t a, int64x1_t b)
  50 {
  51   return vcge_s64 (a, b);
  52 }
  53
  54 uint64x1_t
  55 test_vcle_s64 (int64x1_t a, int64x1_t b)
  56 {
  57   return vcle_s64 (a, b);
  58 }
  59
  60 /* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
  61
  62 uint64x1_t
  63 test_vcgez_s64 (int64x1_t a)
  64 {
  65   return vcgez_s64 (a);
  66 }
  67
  68 /* { dg-final { scan-assembler-times "\\tcmhs\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
  69
  70 uint64x1_t
  71 test_vcge_u64 (uint64x1_t a, uint64x1_t b)
  72 {
  73   return vcge_u64 (a, b);
  74 }
  75
  76 /* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
  77
  78 uint64x1_t
  79 test_vcgt_s64 (int64x1_t a, int64x1_t b)
  80 {
  81   return vcgt_s64 (a, b);
  82 }
  83
  84 uint64x1_t
  85 test_vclt_s64 (int64x1_t a, int64x1_t b)
  86 {
  87   return vclt_s64 (a, b);
  88 }
  89
  90 /* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
  91
  92 uint64x1_t
  93 test_vcgtz_s64 (int64x1_t a)
  94 {
  95   return vcgtz_s64 (a);
  96 }
  97
  98 /* { dg-final { scan-assembler-times "\\tcmhi\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
  99
 100 uint64x1_t
 101 test_vcgt_u64 (uint64x1_t a, uint64x1_t b)
 102 {
 103   return vcgt_u64 (a, b);
 104 }
 105
 106 /* { dg-final { scan-assembler-times "\\tcmle\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
 107
 108 uint64x1_t
 109 test_vclez_s64 (int64x1_t a)
 110 {
 111   return vclez_s64 (a);
 112 }
 113
 114 /* Compiling with "-dp" outputs the name of each .md pattern into the assembler.
 115    This is what we look for here.  */
 116 /* { dg-final { scan-assembler-times "aarch64_get_lanev2di" 2 } } */
 117
 118 int64x1_t
 119 test_vdup_laneq_s64 (int64x2_t a)
 120 {
 121   return vdup_laneq_s64 (a, 1);
 122 }
 123
 124 uint64x1_t
 125 test_vdup_laneq_u64 (uint64x2_t a)
 126 {
 127   return vdup_laneq_u64 (a, 1);
 128 }
 129
 130 /* { dg-final { scan-assembler-times "\\tcmtst\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
 131
 132 uint64x1_t
 133 test_vtst_s64 (int64x1_t a, int64x1_t b)
 134 {
 135   return vtst_s64 (a, b);
 136 }
 137
 138 uint64x1_t
 139 test_vtst_u64 (uint64x1_t a, uint64x1_t b)
 140 {
 141   return vtst_u64 (a, b);
 142 }
 143
 144 /* { dg-final { scan-assembler-times "\\tuqadd\\td\[0-9\]+" 1 } } */
 145
 146 uint64x1_t
 147 test_vqadd_u64 (uint64x1_t a, uint64x1_t b)
 148 {
 149   return vqadd_u64 (a, b);
 150 }
 151
 152 /* { dg-final { scan-assembler-times "\\tsqadd\\td\[0-9\]+" 1 } } */
 153
 154 int64x1_t
 155 test_vqadd_s64 (int64x1_t a, int64x1_t b)
 156 {
 157   return vqadd_s64 (a, b);
 158 }
 159
 160 /* { dg-final { scan-assembler-times "\\tsuqadd\\td\[0-9\]+" 1 } } */
 161
 162 int64x1_t
 163 test_vuqadd_s64 (int64x1_t a, uint64x1_t b)
 164 {
 165   return vuqadd_s64 (a, b);
 166 }
 167
 168 /* { dg-final { scan-assembler-times "\\tusqadd\\td\[0-9\]+" 1 } } */
 169
 170 uint64x1_t
 171 test_vsqadd_u64 (uint64x1_t a, int64x1_t b)
 172 {
 173   return vsqadd_u64 (a, b);
 174 }
 175
 176 /* { dg-final { scan-assembler-times "\\tsub\\td\[0-9\]+" 2 } } */
 177
 178 uint64x1_t
 179 test_vsub_u64 (uint64x1_t a, uint64x1_t b)
 180 {
 181   return vsub_u64 (a, b);
 182 }
 183
 184 int64x1_t
 185 test_vsub_s64 (int64x1_t a, int64x1_t b)
 186 {
 187   return vsub_s64 (a, b);
 188 }
 189
 190 /* { dg-final { scan-assembler-times "\\tuqsub\\td\[0-9\]+" 1 } } */
 191
 192 uint64x1_t
 193 test_vqsub_u64 (uint64x1_t a, uint64x1_t b)
 194 {
 195   return vqsub_u64 (a, b);
 196 }
 197
 198 /* { dg-final { scan-assembler-times "\\tsqsub\\td\[0-9\]+" 1 } } */
 199
 200 int64x1_t
 201 test_vqsub_s64 (int64x1_t a, int64x1_t b)
 202 {
 203   return vqsub_s64 (a, b);
 204 }
 205
 206 /* { dg-final { scan-assembler-times "\\tsshl\\td\[0-9\]+" 1 } } */
 207
 208 int64x1_t
 209 test_vshl_s64 (int64x1_t a, int64x1_t b)
 210 {
 211   return vshl_s64 (a, b);
 212 }
 213
 214 /* { dg-final { scan-assembler-times "\\tushl\\td\[0-9\]+" 1 } } */
 215
 216 uint64x1_t
 217 test_vshl_u64 (uint64x1_t a, int64x1_t b)
 218 {
 219   return vshl_u64 (a, b);
 220 }
 221
 222 /* { dg-final { scan-assembler-times "\\tsrshl\\td\[0-9\]+" 1 } } */
 223
 224 int64x1_t
 225 test_vrshl_s64 (int64x1_t a, int64x1_t b)
 226 {
 227   return vrshl_s64 (a, b);
 228 }
 229
 230 /* { dg-final { scan-assembler-times "\\turshl\\td\[0-9\]+" 1 } } */
 231
 232 uint64x1_t
 233 test_vrshl_u64 (uint64x1_t a, int64x1_t b)
 234 {
 235   return vrshl_u64 (a, b);
 236 }
 237
 238 /* For int64x1_t, sshr...#63 is output instead of the equivalent cmlt...#0.  */
 239 /* { dg-final { scan-assembler-times "\\tsshr\\td\[0-9\]+" 2 } } */
 240
 241 int64x1_t
 242 test_vshr_n_s64 (int64x1_t a)
 243 {
 244   return vshr_n_s64 (a, 5);
 245 }
 246
 247 uint64x1_t
 248 test_vcltz_s64 (int64x1_t a)
 249 {
 250   return vcltz_s64 (a);
 251 }
 252
 253 /* { dg-final { scan-assembler-times "\\tushr\\td\[0-9\]+" 1 } } */
 254
 255 uint64x1_t
 256 test_vshr_n_u64 (uint64x1_t a)
 257 {
 258   return vshr_n_u64 (a, 3);
 259 }
 260
 261 /* { dg-final { scan-assembler-times "\\tssra\\td\[0-9\]+" 1 } } */
 262
 263 int64x1_t
 264 test_vsra_n_s64 (int64x1_t a, int64x1_t b)
 265 {
 266   return vsra_n_s64 (a, b, 2);
 267 }
 268
 269 /* { dg-final { scan-assembler-times "\\tusra\\td\[0-9\]+" 1 } } */
 270
 271 uint64x1_t
 272 test_vsra_n_u64 (uint64x1_t a, uint64x1_t b)
 273 {
 274   return vsra_n_u64 (a, b, 5);
 275 }
 276
 277 /* { dg-final { scan-assembler-times "\\tsrshr\\td\[0-9\]+" 1 } } */
 278
 279 int64x1_t
 280 test_vrshr_n_s64 (int64x1_t a)
 281 {
 282   return vrshr_n_s64 (a, 5);
 283 }
 284
 285 /* { dg-final { scan-assembler-times "\\turshr\\td\[0-9\]+" 1 } } */
 286
 287 uint64x1_t
 288 test_vrshr_n_u64 (uint64x1_t a)
 289 {
 290   return vrshr_n_u64 (a, 3);
 291 }
 292
 293 /* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */
 294
 295 int64x1_t
 296 test_vrsra_n_s64 (int64x1_t a, int64x1_t b)
 297 {
 298   return vrsra_n_s64 (a, b, 3);
 299 }
 300
 301 /* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */
 302
 303 uint64x1_t
 304 test_vrsra_n_u64 (uint64x1_t a, uint64x1_t b)
 305 {
 306   return vrsra_n_u64 (a, b, 4);
 307 }
 308
 309 /* { dg-final { scan-assembler-times "\\tsqrshl\\td\[0-9\]+" 1 } } */
 310
 311 int64x1_t
 312 test_vqrshl_s64 (int64x1_t a, int64x1_t b)
 313 {
 314   return vqrshl_s64 (a, b);
 315 }
 316
 317 /* { dg-final { scan-assembler-times "\\tuqrshl\\td\[0-9\]+" 1 } } */
 318
 319 uint64x1_t
 320 test_vqrshl_u64 (uint64x1_t a, int64x1_t b)
 321 {
 322   return vqrshl_u64 (a, b);
 323 }
 324
 325 /* { dg-final { scan-assembler-times "\\tsqshlu\\td\[0-9\]+" 1 } } */
 326
 327 uint64x1_t
 328 test_vqshlu_n_s64 (int64x1_t a)
 329 {
 330   return vqshlu_n_s64 (a, 6);
 331 }
 332
 333 /* { dg-final { scan-assembler-times "\\tsqshl\\td\[0-9\]+" 2 } } */
 334
 335 int64x1_t
 336 test_vqshl_s64 (int64x1_t a, int64x1_t b)
 337 {
 338   return vqshl_s64 (a, b);
 339 }
 340
 341 int64x1_t
 342 test_vqshl_n_s64 (int64x1_t a)
 343 {
 344   return vqshl_n_s64 (a, 5);
 345 }
 346
 347 /* { dg-final { scan-assembler-times "\\tuqshl\\td\[0-9\]+" 2 } } */
 348
 349 uint64x1_t
 350 test_vqshl_u64 (uint64x1_t a, int64x1_t b)
 351 {
 352   return vqshl_u64 (a, b);
 353 }
 354
 355 uint64x1_t
 356 test_vqshl_n_u64 (uint64x1_t a)
 357 {
 358   return vqshl_n_u64 (a, 5);
 359 }
 360
 361 /* { dg-final { scan-assembler-times "\\tshl\\td\[0-9\]+" 2 } } */
 362
 363 int64x1_t
 364 test_vshl_n_s64 (int64x1_t a)
 365 {
 366   return vshl_n_s64 (a, 9);
 367 }
 368
 369 uint64x1_t
 370 test_vshl_n_u64 (uint64x1_t a)
 371 {
 372   return vshl_n_u64 (a, 9);
 373 }
 374
 375 /* { dg-final { scan-assembler-times "\\tsli\\td\[0-9\]+" 2 } } */
 376
 377 int64x1_t
 378 test_vsli_n_s64 (int64x1_t a, int64x1_t b)
 379 {
 380   return vsli_n_s64 (a, b, 9);
 381 }
 382
 383 uint64x1_t
 384 test_vsli_n_u64 (uint64x1_t a, uint64x1_t b)
 385 {
 386   return vsli_n_u64 (a, b, 9);
 387 }
 388
 389 /* { dg-final { scan-assembler-times "\\tsri\\td\[0-9\]+" 2 } } */
 390
 391 int64x1_t
 392 test_vsri_n_s64 (int64x1_t a, int64x1_t b)
 393 {
 394   return vsri_n_s64 (a, b, 9);
 395 }
 396
 397 uint64x1_t
 398 test_vsri_n_u64 (uint64x1_t a, uint64x1_t b)
 399 {
 400   return vsri_n_u64 (a, b, 9);
 401 }
 402
 403 /* { dg-final { cleanup-saved-temps } } */
 404