1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* Datastructures maintained for currently processed function in RTL form. */
71 struct rtl_data x_rtl
;
73 /* Indexed by pseudo register number, gives the rtx for that pseudo.
74 Allocated in parallel with regno_pointer_align.
75 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
76 with length attribute nested in top level structures. */
80 /* This is *not* reset after each function. It gives each CODE_LABEL
81 in the entire compilation a unique label number. */
83 static GTY(()) int label_num
= 1;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconstm1
;
114 REAL_VALUE_TYPE dconsthalf
;
116 /* Record fixed-point constant 0 and 1. */
117 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
118 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
157 htab_t const_int_htab
;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
161 htab_t mem_attrs_htab
;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
165 htab_t reg_attrs_htab
;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
169 htab_t const_double_htab
;
171 /* A hash table storing all CONST_FIXEDs. */
172 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
173 htab_t const_fixed_htab
;
175 #define first_insn (crtl->emit.x_first_insn)
176 #define last_insn (crtl->emit.x_last_insn)
177 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
178 #define last_location (crtl->emit.x_last_location)
179 #define first_label_num (crtl->emit.x_first_label_num)
181 static rtx
make_call_insn_raw (rtx
);
182 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
183 static void set_used_decls (tree
);
184 static void mark_label_nuses (rtx
);
185 static hashval_t
const_int_htab_hash (const void *);
186 static int const_int_htab_eq (const void *, const void *);
187 static hashval_t
const_double_htab_hash (const void *);
188 static int const_double_htab_eq (const void *, const void *);
189 static rtx
lookup_const_double (rtx
);
190 static hashval_t
const_fixed_htab_hash (const void *);
191 static int const_fixed_htab_eq (const void *, const void *);
192 static rtx
lookup_const_fixed (rtx
);
193 static hashval_t
mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs
*get_mem_attrs (alias_set_type
, tree
, rtx
, rtx
, unsigned int,
197 static hashval_t
reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs
*get_reg_attrs (tree
, int);
200 static tree
component_ref_for_mem_expr (tree
);
201 static rtx
gen_const_vector (enum machine_mode
, int);
202 static void copy_rtx_if_shared_1 (rtx
*orig
);
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability
= -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_htab_hash (const void *x
)
213 return (hashval_t
) INTVAL ((const_rtx
) x
);
216 /* Returns nonzero if the value represented by X (which is really a
217 CONST_INT) is the same as that given by Y (which is really a
221 const_int_htab_eq (const void *x
, const void *y
)
223 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
226 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
228 const_double_htab_hash (const void *x
)
230 const_rtx
const value
= (const_rtx
) x
;
233 if (GET_MODE (value
) == VOIDmode
)
234 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
237 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
238 /* MODE is used in the comparison, so it should be in the hash. */
239 h
^= GET_MODE (value
);
244 /* Returns nonzero if the value represented by X (really a ...)
245 is the same as that represented by Y (really a ...) */
247 const_double_htab_eq (const void *x
, const void *y
)
249 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
251 if (GET_MODE (a
) != GET_MODE (b
))
253 if (GET_MODE (a
) == VOIDmode
)
254 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
255 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
257 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
258 CONST_DOUBLE_REAL_VALUE (b
));
261 /* Returns a hash code for X (which is really a CONST_FIXED). */
264 const_fixed_htab_hash (const void *x
)
266 const_rtx
const value
= (const_rtx
) x
;
269 h
= fixed_hash (CONST_FIXED_VALUE (value
));
270 /* MODE is used in the comparison, so it should be in the hash. */
271 h
^= GET_MODE (value
);
275 /* Returns nonzero if the value represented by X (really a ...)
276 is the same as that represented by Y (really a ...). */
279 const_fixed_htab_eq (const void *x
, const void *y
)
281 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
283 if (GET_MODE (a
) != GET_MODE (b
))
285 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
288 /* Returns a hash code for X (which is a really a mem_attrs *). */
291 mem_attrs_htab_hash (const void *x
)
293 const mem_attrs
*const p
= (const mem_attrs
*) x
;
295 return (p
->alias
^ (p
->align
* 1000)
296 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
297 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
298 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
301 /* Returns nonzero if the value represented by X (which is really a
302 mem_attrs *) is the same as that given by Y (which is also really a
306 mem_attrs_htab_eq (const void *x
, const void *y
)
308 const mem_attrs
*const p
= (const mem_attrs
*) x
;
309 const mem_attrs
*const q
= (const mem_attrs
*) y
;
311 return (p
->alias
== q
->alias
&& p
->offset
== q
->offset
312 && p
->size
== q
->size
&& p
->align
== q
->align
313 && (p
->expr
== q
->expr
314 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
315 && operand_equal_p (p
->expr
, q
->expr
, 0))));
318 /* Allocate a new mem_attrs structure and insert it into the hash table if
319 one identical to it is not already in the table. We are doing this for
323 get_mem_attrs (alias_set_type alias
, tree expr
, rtx offset
, rtx size
,
324 unsigned int align
, enum machine_mode mode
)
329 /* If everything is the default, we can just return zero.
330 This must match what the corresponding MEM_* macros return when the
331 field is not present. */
332 if (alias
== 0 && expr
== 0 && offset
== 0
334 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
335 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
336 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
341 attrs
.offset
= offset
;
345 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
348 *slot
= ggc_alloc (sizeof (mem_attrs
));
349 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
358 reg_attrs_htab_hash (const void *x
)
360 const reg_attrs
*const p
= (const reg_attrs
*) x
;
362 return ((p
->offset
* 1000) ^ (long) p
->decl
);
365 /* Returns nonzero if the value represented by X (which is really a
366 reg_attrs *) is the same as that given by Y (which is also really a
370 reg_attrs_htab_eq (const void *x
, const void *y
)
372 const reg_attrs
*const p
= (const reg_attrs
*) x
;
373 const reg_attrs
*const q
= (const reg_attrs
*) y
;
375 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
377 /* Allocate a new reg_attrs structure and insert it into the hash table if
378 one identical to it is not already in the table. We are doing this for
382 get_reg_attrs (tree decl
, int offset
)
387 /* If everything is the default, we can just return zero. */
388 if (decl
== 0 && offset
== 0)
392 attrs
.offset
= offset
;
394 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
397 *slot
= ggc_alloc (sizeof (reg_attrs
));
398 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
406 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
412 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
413 MEM_VOLATILE_P (x
) = true;
419 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
420 don't attempt to share with the various global pieces of rtl (such as
421 frame_pointer_rtx). */
424 gen_raw_REG (enum machine_mode mode
, int regno
)
426 rtx x
= gen_rtx_raw_REG (mode
, regno
);
427 ORIGINAL_REGNO (x
) = regno
;
431 /* There are some RTL codes that require special attention; the generation
432 functions do the raw handling. If you add to this list, modify
433 special_rtx in gengenrtl.c as well. */
436 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
440 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
441 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
443 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
444 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
445 return const_true_rtx
;
448 /* Look up the CONST_INT in the hash table. */
449 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
450 (hashval_t
) arg
, INSERT
);
452 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
458 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
460 return GEN_INT (trunc_int_for_mode (c
, mode
));
463 /* CONST_DOUBLEs might be created from pairs of integers, or from
464 REAL_VALUE_TYPEs. Also, their length is known only at run time,
465 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
467 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
468 hash table. If so, return its counterpart; otherwise add it
469 to the hash table and return it. */
471 lookup_const_double (rtx real
)
473 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
480 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
481 VALUE in mode MODE. */
483 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
485 rtx real
= rtx_alloc (CONST_DOUBLE
);
486 PUT_MODE (real
, mode
);
490 return lookup_const_double (real
);
493 /* Determine whether FIXED, a CONST_FIXED, already exists in the
494 hash table. If so, return its counterpart; otherwise add it
495 to the hash table and return it. */
498 lookup_const_fixed (rtx fixed
)
500 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
507 /* Return a CONST_FIXED rtx for a fixed-point value specified by
508 VALUE in mode MODE. */
511 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
513 rtx fixed
= rtx_alloc (CONST_FIXED
);
514 PUT_MODE (fixed
, mode
);
518 return lookup_const_fixed (fixed
);
521 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
522 of ints: I0 is the low-order word and I1 is the high-order word.
523 Do not use this routine for non-integer modes; convert to
524 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
527 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
532 /* There are the following cases (note that there are no modes with
533 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
535 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
537 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
538 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
539 from copies of the sign bit, and sign of i0 and i1 are the same), then
540 we return a CONST_INT for i0.
541 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
542 if (mode
!= VOIDmode
)
544 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
545 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
546 /* We can get a 0 for an error mark. */
547 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
548 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
550 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
551 return gen_int_mode (i0
, mode
);
553 gcc_assert (GET_MODE_BITSIZE (mode
) == 2 * HOST_BITS_PER_WIDE_INT
);
556 /* If this integer fits in one word, return a CONST_INT. */
557 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
560 /* We use VOIDmode for integers. */
561 value
= rtx_alloc (CONST_DOUBLE
);
562 PUT_MODE (value
, VOIDmode
);
564 CONST_DOUBLE_LOW (value
) = i0
;
565 CONST_DOUBLE_HIGH (value
) = i1
;
567 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
568 XWINT (value
, i
) = 0;
570 return lookup_const_double (value
);
574 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
576 /* In case the MD file explicitly references the frame pointer, have
577 all such references point to the same frame pointer. This is
578 used during frame pointer elimination to distinguish the explicit
579 references to these registers from pseudos that happened to be
582 If we have eliminated the frame pointer or arg pointer, we will
583 be using it as a normal register, for example as a spill
584 register. In such cases, we might be accessing it in a mode that
585 is not Pmode and therefore cannot use the pre-allocated rtx.
587 Also don't do this when we are making new REGs in reload, since
588 we don't want to get confused with the real pointers. */
590 if (mode
== Pmode
&& !reload_in_progress
)
592 if (regno
== FRAME_POINTER_REGNUM
593 && (!reload_completed
|| frame_pointer_needed
))
594 return frame_pointer_rtx
;
595 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
596 if (regno
== HARD_FRAME_POINTER_REGNUM
597 && (!reload_completed
|| frame_pointer_needed
))
598 return hard_frame_pointer_rtx
;
600 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
601 if (regno
== ARG_POINTER_REGNUM
)
602 return arg_pointer_rtx
;
604 #ifdef RETURN_ADDRESS_POINTER_REGNUM
605 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
606 return return_address_pointer_rtx
;
608 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
609 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
610 return pic_offset_table_rtx
;
611 if (regno
== STACK_POINTER_REGNUM
)
612 return stack_pointer_rtx
;
616 /* If the per-function register table has been set up, try to re-use
617 an existing entry in that table to avoid useless generation of RTL.
619 This code is disabled for now until we can fix the various backends
620 which depend on having non-shared hard registers in some cases. Long
621 term we want to re-enable this code as it can significantly cut down
622 on the amount of useless RTL that gets generated.
624 We'll also need to fix some code that runs after reload that wants to
625 set ORIGINAL_REGNO. */
630 && regno
< FIRST_PSEUDO_REGISTER
631 && reg_raw_mode
[regno
] == mode
)
632 return regno_reg_rtx
[regno
];
635 return gen_raw_REG (mode
, regno
);
639 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
641 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
643 /* This field is not cleared by the mere allocation of the rtx, so
650 /* Generate a memory referring to non-trapping constant memory. */
653 gen_const_mem (enum machine_mode mode
, rtx addr
)
655 rtx mem
= gen_rtx_MEM (mode
, addr
);
656 MEM_READONLY_P (mem
) = 1;
657 MEM_NOTRAP_P (mem
) = 1;
661 /* Generate a MEM referring to fixed portions of the frame, e.g., register
665 gen_frame_mem (enum machine_mode mode
, rtx addr
)
667 rtx mem
= gen_rtx_MEM (mode
, addr
);
668 MEM_NOTRAP_P (mem
) = 1;
669 set_mem_alias_set (mem
, get_frame_alias_set ());
673 /* Generate a MEM referring to a temporary use of the stack, not part
674 of the fixed stack frame. For example, something which is pushed
675 by a target splitter. */
677 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
679 rtx mem
= gen_rtx_MEM (mode
, addr
);
680 MEM_NOTRAP_P (mem
) = 1;
681 if (!current_function_calls_alloca
)
682 set_mem_alias_set (mem
, get_frame_alias_set ());
686 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
687 this construct would be valid, and false otherwise. */
690 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
691 const_rtx reg
, unsigned int offset
)
693 unsigned int isize
= GET_MODE_SIZE (imode
);
694 unsigned int osize
= GET_MODE_SIZE (omode
);
696 /* All subregs must be aligned. */
697 if (offset
% osize
!= 0)
700 /* The subreg offset cannot be outside the inner object. */
704 /* ??? This should not be here. Temporarily continue to allow word_mode
705 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
706 Generally, backends are doing something sketchy but it'll take time to
708 if (omode
== word_mode
)
710 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
711 is the culprit here, and not the backends. */
712 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
714 /* Allow component subregs of complex and vector. Though given the below
715 extraction rules, it's not always clear what that means. */
716 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
717 && GET_MODE_INNER (imode
) == omode
)
719 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
720 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
721 represent this. It's questionable if this ought to be represented at
722 all -- why can't this all be hidden in post-reload splitters that make
723 arbitrarily mode changes to the registers themselves. */
724 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
726 /* Subregs involving floating point modes are not allowed to
727 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
728 (subreg:SI (reg:DF) 0) isn't. */
729 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
735 /* Paradoxical subregs must have offset zero. */
739 /* This is a normal subreg. Verify that the offset is representable. */
741 /* For hard registers, we already have most of these rules collected in
742 subreg_offset_representable_p. */
743 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
745 unsigned int regno
= REGNO (reg
);
747 #ifdef CANNOT_CHANGE_MODE_CLASS
748 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
749 && GET_MODE_INNER (imode
) == omode
)
751 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
755 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
758 /* For pseudo registers, we want most of the same checks. Namely:
759 If the register no larger than a word, the subreg must be lowpart.
760 If the register is larger than a word, the subreg must be the lowpart
761 of a subword. A subreg does *not* perform arbitrary bit extraction.
762 Given that we've already checked mode/offset alignment, we only have
763 to check subword subregs here. */
764 if (osize
< UNITS_PER_WORD
)
766 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
767 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
768 if (offset
% UNITS_PER_WORD
!= low_off
)
775 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
777 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
778 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
781 /* Generate a SUBREG representing the least-significant part of REG if MODE
782 is smaller than mode of REG, otherwise paradoxical SUBREG. */
785 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
787 enum machine_mode inmode
;
789 inmode
= GET_MODE (reg
);
790 if (inmode
== VOIDmode
)
792 return gen_rtx_SUBREG (mode
, reg
,
793 subreg_lowpart_offset (mode
, inmode
));
796 /* gen_rtvec (n, [rt1, ..., rtn])
798 ** This routine creates an rtvec and stores within it the
799 ** pointers to rtx's which are its arguments.
804 gen_rtvec (int n
, ...)
813 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
815 vector
= alloca (n
* sizeof (rtx
));
817 for (i
= 0; i
< n
; i
++)
818 vector
[i
] = va_arg (p
, rtx
);
820 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
824 return gen_rtvec_v (save_n
, vector
);
828 gen_rtvec_v (int n
, rtx
*argp
)
834 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
836 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
838 for (i
= 0; i
< n
; i
++)
839 rt_val
->elem
[i
] = *argp
++;
844 /* Return the number of bytes between the start of an OUTER_MODE
845 in-memory value and the start of an INNER_MODE in-memory value,
846 given that the former is a lowpart of the latter. It may be a
847 paradoxical lowpart, in which case the offset will be negative
848 on big-endian targets. */
851 byte_lowpart_offset (enum machine_mode outer_mode
,
852 enum machine_mode inner_mode
)
854 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
855 return subreg_lowpart_offset (outer_mode
, inner_mode
);
857 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
860 /* Generate a REG rtx for a new pseudo register of mode MODE.
861 This pseudo is assigned the next sequential register number. */
864 gen_reg_rtx (enum machine_mode mode
)
868 gcc_assert (can_create_pseudo_p ());
870 if (generating_concat_p
871 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
872 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
874 /* For complex modes, don't make a single pseudo.
875 Instead, make a CONCAT of two pseudos.
876 This allows noncontiguous allocation of the real and imaginary parts,
877 which makes much better code. Besides, allocating DCmode
878 pseudos overstrains reload on some machines like the 386. */
879 rtx realpart
, imagpart
;
880 enum machine_mode partmode
= GET_MODE_INNER (mode
);
882 realpart
= gen_reg_rtx (partmode
);
883 imagpart
= gen_reg_rtx (partmode
);
884 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
887 /* Make sure regno_pointer_align, and regno_reg_rtx are large
888 enough to have an element for this pseudo reg number. */
890 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
892 int old_size
= crtl
->emit
.regno_pointer_align_length
;
896 new = xrealloc (crtl
->emit
.regno_pointer_align
, old_size
* 2);
897 memset (new + old_size
, 0, old_size
);
898 crtl
->emit
.regno_pointer_align
= (unsigned char *) new;
900 new1
= ggc_realloc (regno_reg_rtx
,
901 old_size
* 2 * sizeof (rtx
));
902 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
903 regno_reg_rtx
= new1
;
905 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
908 val
= gen_raw_REG (mode
, reg_rtx_no
);
909 regno_reg_rtx
[reg_rtx_no
++] = val
;
913 /* Update NEW with the same attributes as REG, but with OFFSET added
914 to the REG_OFFSET. */
917 update_reg_offset (rtx
new, rtx reg
, int offset
)
919 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
920 REG_OFFSET (reg
) + offset
);
923 /* Generate a register with same attributes as REG, but with OFFSET
924 added to the REG_OFFSET. */
927 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
930 rtx
new = gen_rtx_REG (mode
, regno
);
932 update_reg_offset (new, reg
, offset
);
936 /* Generate a new pseudo-register with the same attributes as REG, but
937 with OFFSET added to the REG_OFFSET. */
940 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
942 rtx
new = gen_reg_rtx (mode
);
944 update_reg_offset (new, reg
, offset
);
948 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
949 new register is a (possibly paradoxical) lowpart of the old one. */
952 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
954 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
955 PUT_MODE (reg
, mode
);
958 /* Copy REG's attributes from X, if X has any attributes. If REG and X
959 have different modes, REG is a (possibly paradoxical) lowpart of X. */
962 set_reg_attrs_from_value (rtx reg
, rtx x
)
966 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
969 if (MEM_OFFSET (x
) && GET_CODE (MEM_OFFSET (x
)) == CONST_INT
)
971 = get_reg_attrs (MEM_EXPR (x
), INTVAL (MEM_OFFSET (x
)) + offset
);
973 mark_reg_pointer (reg
, MEM_ALIGN (x
));
978 update_reg_offset (reg
, x
, offset
);
980 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
984 /* Generate a REG rtx for a new pseudo register, copying the mode
985 and attributes from X. */
988 gen_reg_rtx_and_attrs (rtx x
)
990 rtx reg
= gen_reg_rtx (GET_MODE (x
));
991 set_reg_attrs_from_value (reg
, x
);
995 /* Set the register attributes for registers contained in PARM_RTX.
996 Use needed values from memory attributes of MEM. */
999 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1001 if (REG_P (parm_rtx
))
1002 set_reg_attrs_from_value (parm_rtx
, mem
);
1003 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1005 /* Check for a NULL entry in the first slot, used to indicate that the
1006 parameter goes both on the stack and in registers. */
1007 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1008 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1010 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1011 if (REG_P (XEXP (x
, 0)))
1012 REG_ATTRS (XEXP (x
, 0))
1013 = get_reg_attrs (MEM_EXPR (mem
),
1014 INTVAL (XEXP (x
, 1)));
1019 /* Set the REG_ATTRS for registers in value X, given that X represents
1023 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1025 if (GET_CODE (x
) == SUBREG
)
1027 gcc_assert (subreg_lowpart_p (x
));
1032 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1034 if (GET_CODE (x
) == CONCAT
)
1036 if (REG_P (XEXP (x
, 0)))
1037 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1038 if (REG_P (XEXP (x
, 1)))
1039 REG_ATTRS (XEXP (x
, 1))
1040 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1042 if (GET_CODE (x
) == PARALLEL
)
1046 /* Check for a NULL entry, used to indicate that the parameter goes
1047 both on the stack and in registers. */
1048 if (XEXP (XVECEXP (x
, 0, 0), 0))
1053 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1055 rtx y
= XVECEXP (x
, 0, i
);
1056 if (REG_P (XEXP (y
, 0)))
1057 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1062 /* Assign the RTX X to declaration T. */
1065 set_decl_rtl (tree t
, rtx x
)
1067 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1069 set_reg_attrs_for_decl_rtl (t
, x
);
1072 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1073 if the ABI requires the parameter to be passed by reference. */
1076 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1078 DECL_INCOMING_RTL (t
) = x
;
1079 if (x
&& !by_reference_p
)
1080 set_reg_attrs_for_decl_rtl (t
, x
);
1083 /* Identify REG (which may be a CONCAT) as a user register. */
1086 mark_user_reg (rtx reg
)
1088 if (GET_CODE (reg
) == CONCAT
)
1090 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1091 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1095 gcc_assert (REG_P (reg
));
1096 REG_USERVAR_P (reg
) = 1;
1100 /* Identify REG as a probable pointer register and show its alignment
1101 as ALIGN, if nonzero. */
1104 mark_reg_pointer (rtx reg
, int align
)
1106 if (! REG_POINTER (reg
))
1108 REG_POINTER (reg
) = 1;
1111 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1113 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1114 /* We can no-longer be sure just how aligned this pointer is. */
1115 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1118 /* Return 1 plus largest pseudo reg number used in the current function. */
1126 /* Return 1 + the largest label number used so far in the current function. */
1129 max_label_num (void)
1134 /* Return first label number used in this function (if any were used). */
1137 get_first_label_num (void)
1139 return first_label_num
;
1142 /* If the rtx for label was created during the expansion of a nested
1143 function, then first_label_num won't include this label number.
1144 Fix this now so that array indicies work later. */
1147 maybe_set_first_label_num (rtx x
)
1149 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1150 first_label_num
= CODE_LABEL_NUMBER (x
);
1153 /* Return a value representing some low-order bits of X, where the number
1154 of low-order bits is given by MODE. Note that no conversion is done
1155 between floating-point and fixed-point values, rather, the bit
1156 representation is returned.
1158 This function handles the cases in common between gen_lowpart, below,
1159 and two variants in cse.c and combine.c. These are the cases that can
1160 be safely handled at all points in the compilation.
1162 If this is not a case we can handle, return 0. */
1165 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1167 int msize
= GET_MODE_SIZE (mode
);
1170 enum machine_mode innermode
;
1172 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1173 so we have to make one up. Yuk. */
1174 innermode
= GET_MODE (x
);
1175 if (GET_CODE (x
) == CONST_INT
1176 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1177 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1178 else if (innermode
== VOIDmode
)
1179 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1181 xsize
= GET_MODE_SIZE (innermode
);
1183 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1185 if (innermode
== mode
)
1188 /* MODE must occupy no more words than the mode of X. */
1189 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1190 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1193 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1194 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1197 offset
= subreg_lowpart_offset (mode
, innermode
);
1199 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1200 && (GET_MODE_CLASS (mode
) == MODE_INT
1201 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1203 /* If we are getting the low-order part of something that has been
1204 sign- or zero-extended, we can either just use the object being
1205 extended or make a narrower extension. If we want an even smaller
1206 piece than the size of the object being extended, call ourselves
1209 This case is used mostly by combine and cse. */
1211 if (GET_MODE (XEXP (x
, 0)) == mode
)
1213 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1214 return gen_lowpart_common (mode
, XEXP (x
, 0));
1215 else if (msize
< xsize
)
1216 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1218 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1219 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1220 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1221 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1223 /* Otherwise, we can't do this. */
1228 gen_highpart (enum machine_mode mode
, rtx x
)
1230 unsigned int msize
= GET_MODE_SIZE (mode
);
1233 /* This case loses if X is a subreg. To catch bugs early,
1234 complain if an invalid MODE is used even in other cases. */
1235 gcc_assert (msize
<= UNITS_PER_WORD
1236 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1238 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1239 subreg_highpart_offset (mode
, GET_MODE (x
)));
1240 gcc_assert (result
);
1242 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1243 the target if we have a MEM. gen_highpart must return a valid operand,
1244 emitting code if necessary to do so. */
1247 result
= validize_mem (result
);
1248 gcc_assert (result
);
1254 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1255 be VOIDmode constant. */
1257 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1259 if (GET_MODE (exp
) != VOIDmode
)
1261 gcc_assert (GET_MODE (exp
) == innermode
);
1262 return gen_highpart (outermode
, exp
);
1264 return simplify_gen_subreg (outermode
, exp
, innermode
,
1265 subreg_highpart_offset (outermode
, innermode
));
1268 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1271 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1273 unsigned int offset
= 0;
1274 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1278 if (WORDS_BIG_ENDIAN
)
1279 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1280 if (BYTES_BIG_ENDIAN
)
1281 offset
+= difference
% UNITS_PER_WORD
;
1287 /* Return offset in bytes to get OUTERMODE high part
1288 of the value in mode INNERMODE stored in memory in target format. */
1290 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1292 unsigned int offset
= 0;
1293 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1295 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1299 if (! WORDS_BIG_ENDIAN
)
1300 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1301 if (! BYTES_BIG_ENDIAN
)
1302 offset
+= difference
% UNITS_PER_WORD
;
1308 /* Return 1 iff X, assumed to be a SUBREG,
1309 refers to the least significant part of its containing reg.
1310 If X is not a SUBREG, always return 1 (it is its own low part!). */
1313 subreg_lowpart_p (const_rtx x
)
1315 if (GET_CODE (x
) != SUBREG
)
1317 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1320 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1321 == SUBREG_BYTE (x
));
1324 /* Return subword OFFSET of operand OP.
1325 The word number, OFFSET, is interpreted as the word number starting
1326 at the low-order address. OFFSET 0 is the low-order word if not
1327 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1329 If we cannot extract the required word, we return zero. Otherwise,
1330 an rtx corresponding to the requested word will be returned.
1332 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1333 reload has completed, a valid address will always be returned. After
1334 reload, if a valid address cannot be returned, we return zero.
1336 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1337 it is the responsibility of the caller.
1339 MODE is the mode of OP in case it is a CONST_INT.
1341 ??? This is still rather broken for some cases. The problem for the
1342 moment is that all callers of this thing provide no 'goal mode' to
1343 tell us to work with. This exists because all callers were written
1344 in a word based SUBREG world.
1345 Now use of this function can be deprecated by simplify_subreg in most
1350 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1352 if (mode
== VOIDmode
)
1353 mode
= GET_MODE (op
);
1355 gcc_assert (mode
!= VOIDmode
);
1357 /* If OP is narrower than a word, fail. */
1359 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1362 /* If we want a word outside OP, return zero. */
1364 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1367 /* Form a new MEM at the requested address. */
1370 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1372 if (! validate_address
)
1375 else if (reload_completed
)
1377 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1381 return replace_equiv_address (new, XEXP (new, 0));
1384 /* Rest can be handled by simplify_subreg. */
1385 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1388 /* Similar to `operand_subword', but never return 0. If we can't
1389 extract the required subword, put OP into a register and try again.
1390 The second attempt must succeed. We always validate the address in
1393 MODE is the mode of OP, in case it is CONST_INT. */
1396 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1398 rtx result
= operand_subword (op
, offset
, 1, mode
);
1403 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1405 /* If this is a register which can not be accessed by words, copy it
1406 to a pseudo register. */
1408 op
= copy_to_reg (op
);
1410 op
= force_reg (mode
, op
);
1413 result
= operand_subword (op
, offset
, 1, mode
);
1414 gcc_assert (result
);
1419 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1420 or (2) a component ref of something variable. Represent the later with
1421 a NULL expression. */
1424 component_ref_for_mem_expr (tree ref
)
1426 tree inner
= TREE_OPERAND (ref
, 0);
1428 if (TREE_CODE (inner
) == COMPONENT_REF
)
1429 inner
= component_ref_for_mem_expr (inner
);
1432 /* Now remove any conversions: they don't change what the underlying
1433 object is. Likewise for SAVE_EXPR. */
1434 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1435 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1436 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1437 || TREE_CODE (inner
) == SAVE_EXPR
)
1438 inner
= TREE_OPERAND (inner
, 0);
1440 if (! DECL_P (inner
))
1444 if (inner
== TREE_OPERAND (ref
, 0))
1447 return build3 (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1448 TREE_OPERAND (ref
, 1), NULL_TREE
);
1451 /* Returns 1 if both MEM_EXPR can be considered equal
1455 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1460 if (! expr1
|| ! expr2
)
1463 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1466 if (TREE_CODE (expr1
) == COMPONENT_REF
)
1468 mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1469 TREE_OPERAND (expr2
, 0))
1470 && mem_expr_equal_p (TREE_OPERAND (expr1
, 1), /* field decl */
1471 TREE_OPERAND (expr2
, 1));
1473 if (INDIRECT_REF_P (expr1
))
1474 return mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1475 TREE_OPERAND (expr2
, 0));
1477 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1478 have been resolved here. */
1479 gcc_assert (DECL_P (expr1
));
1481 /* Decls with different pointers can't be equal. */
1485 /* Given REF, a MEM, and T, either the type of X or the expression
1486 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1487 if we are making a new object of this type. BITPOS is nonzero if
1488 there is an offset outstanding on T that will be applied later. */
1491 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1492 HOST_WIDE_INT bitpos
)
1494 alias_set_type alias
= MEM_ALIAS_SET (ref
);
1495 tree expr
= MEM_EXPR (ref
);
1496 rtx offset
= MEM_OFFSET (ref
);
1497 rtx size
= MEM_SIZE (ref
);
1498 unsigned int align
= MEM_ALIGN (ref
);
1499 HOST_WIDE_INT apply_bitpos
= 0;
1502 /* It can happen that type_for_mode was given a mode for which there
1503 is no language-level type. In which case it returns NULL, which
1508 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1509 if (type
== error_mark_node
)
1512 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1513 wrong answer, as it assumes that DECL_RTL already has the right alias
1514 info. Callers should not set DECL_RTL until after the call to
1515 set_mem_attributes. */
1516 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1518 /* Get the alias set from the expression or type (perhaps using a
1519 front-end routine) and use it. */
1520 alias
= get_alias_set (t
);
1522 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1523 MEM_IN_STRUCT_P (ref
)
1524 = AGGREGATE_TYPE_P (type
) || TREE_CODE (type
) == COMPLEX_TYPE
;
1525 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1527 /* If we are making an object of this type, or if this is a DECL, we know
1528 that it is a scalar if the type is not an aggregate. */
1529 if ((objectp
|| DECL_P (t
))
1530 && ! AGGREGATE_TYPE_P (type
)
1531 && TREE_CODE (type
) != COMPLEX_TYPE
)
1532 MEM_SCALAR_P (ref
) = 1;
1534 /* We can set the alignment from the type if we are making an object,
1535 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1536 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
1537 || TREE_CODE (t
) == ALIGN_INDIRECT_REF
1538 || TYPE_ALIGN_OK (type
))
1539 align
= MAX (align
, TYPE_ALIGN (type
));
1541 if (TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1543 if (integer_zerop (TREE_OPERAND (t
, 1)))
1544 /* We don't know anything about the alignment. */
1545 align
= BITS_PER_UNIT
;
1547 align
= tree_low_cst (TREE_OPERAND (t
, 1), 1);
1550 /* If the size is known, we can set that. */
1551 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1552 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1554 /* If T is not a type, we may be able to deduce some more information about
1560 if (TREE_THIS_VOLATILE (t
))
1561 MEM_VOLATILE_P (ref
) = 1;
1563 /* Now remove any conversions: they don't change what the underlying
1564 object is. Likewise for SAVE_EXPR. */
1565 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1566 || TREE_CODE (t
) == NON_LVALUE_EXPR
1567 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1568 || TREE_CODE (t
) == SAVE_EXPR
)
1569 t
= TREE_OPERAND (t
, 0);
1571 /* We may look through structure-like accesses for the purposes of
1572 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1574 while (TREE_CODE (base
) == COMPONENT_REF
1575 || TREE_CODE (base
) == REALPART_EXPR
1576 || TREE_CODE (base
) == IMAGPART_EXPR
1577 || TREE_CODE (base
) == BIT_FIELD_REF
)
1578 base
= TREE_OPERAND (base
, 0);
1582 if (CODE_CONTAINS_STRUCT (TREE_CODE (base
), TS_DECL_WITH_VIS
))
1583 MEM_NOTRAP_P (ref
) = !DECL_WEAK (base
);
1585 MEM_NOTRAP_P (ref
) = 1;
1588 MEM_NOTRAP_P (ref
) = TREE_THIS_NOTRAP (base
);
1590 base
= get_base_address (base
);
1591 if (base
&& DECL_P (base
)
1592 && TREE_READONLY (base
)
1593 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
)))
1595 tree base_type
= TREE_TYPE (base
);
1596 gcc_assert (!(base_type
&& TYPE_NEEDS_CONSTRUCTING (base_type
))
1597 || DECL_ARTIFICIAL (base
));
1598 MEM_READONLY_P (ref
) = 1;
1601 /* If this expression uses it's parent's alias set, mark it such
1602 that we won't change it. */
1603 if (component_uses_parent_alias_set (t
))
1604 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1606 /* If this is a decl, set the attributes of the MEM from it. */
1610 offset
= const0_rtx
;
1611 apply_bitpos
= bitpos
;
1612 size
= (DECL_SIZE_UNIT (t
)
1613 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1614 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1615 align
= DECL_ALIGN (t
);
1618 /* If this is a constant, we know the alignment. */
1619 else if (CONSTANT_CLASS_P (t
))
1621 align
= TYPE_ALIGN (type
);
1622 #ifdef CONSTANT_ALIGNMENT
1623 align
= CONSTANT_ALIGNMENT (t
, align
);
1627 /* If this is a field reference and not a bit-field, record it. */
1628 /* ??? There is some information that can be gleened from bit-fields,
1629 such as the word offset in the structure that might be modified.
1630 But skip it for now. */
1631 else if (TREE_CODE (t
) == COMPONENT_REF
1632 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1634 expr
= component_ref_for_mem_expr (t
);
1635 offset
= const0_rtx
;
1636 apply_bitpos
= bitpos
;
1637 /* ??? Any reason the field size would be different than
1638 the size we got from the type? */
1641 /* If this is an array reference, look for an outer field reference. */
1642 else if (TREE_CODE (t
) == ARRAY_REF
)
1644 tree off_tree
= size_zero_node
;
1645 /* We can't modify t, because we use it at the end of the
1651 tree index
= TREE_OPERAND (t2
, 1);
1652 tree low_bound
= array_ref_low_bound (t2
);
1653 tree unit_size
= array_ref_element_size (t2
);
1655 /* We assume all arrays have sizes that are a multiple of a byte.
1656 First subtract the lower bound, if any, in the type of the
1657 index, then convert to sizetype and multiply by the size of
1658 the array element. */
1659 if (! integer_zerop (low_bound
))
1660 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1663 off_tree
= size_binop (PLUS_EXPR
,
1664 size_binop (MULT_EXPR
,
1665 fold_convert (sizetype
,
1669 t2
= TREE_OPERAND (t2
, 0);
1671 while (TREE_CODE (t2
) == ARRAY_REF
);
1677 if (host_integerp (off_tree
, 1))
1679 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1680 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1681 align
= DECL_ALIGN (t2
);
1682 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1684 offset
= GEN_INT (ioff
);
1685 apply_bitpos
= bitpos
;
1688 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1690 expr
= component_ref_for_mem_expr (t2
);
1691 if (host_integerp (off_tree
, 1))
1693 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1694 apply_bitpos
= bitpos
;
1696 /* ??? Any reason the field size would be different than
1697 the size we got from the type? */
1699 else if (flag_argument_noalias
> 1
1700 && (INDIRECT_REF_P (t2
))
1701 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1708 /* If this is a Fortran indirect argument reference, record the
1710 else if (flag_argument_noalias
> 1
1711 && (INDIRECT_REF_P (t
))
1712 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1719 /* If we modified OFFSET based on T, then subtract the outstanding
1720 bit position offset. Similarly, increase the size of the accessed
1721 object to contain the negative offset. */
1724 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1726 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1729 if (TREE_CODE (t
) == ALIGN_INDIRECT_REF
)
1731 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1732 we're overlapping. */
1737 /* Now set the attributes we computed above. */
1739 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1741 /* If this is already known to be a scalar or aggregate, we are done. */
1742 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1745 /* If it is a reference into an aggregate, this is part of an aggregate.
1746 Otherwise we don't know. */
1747 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1748 || TREE_CODE (t
) == ARRAY_RANGE_REF
1749 || TREE_CODE (t
) == BIT_FIELD_REF
)
1750 MEM_IN_STRUCT_P (ref
) = 1;
1754 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1756 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1759 /* Set MEM to the decl that REG refers to. */
1762 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1765 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1766 GEN_INT (REG_OFFSET (reg
)),
1767 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1770 /* Set the alias set of MEM to SET. */
1773 set_mem_alias_set (rtx mem
, alias_set_type set
)
1775 #ifdef ENABLE_CHECKING
1776 /* If the new and old alias sets don't conflict, something is wrong. */
1777 gcc_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1780 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1781 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1785 /* Set the alignment of MEM to ALIGN bits. */
1788 set_mem_align (rtx mem
, unsigned int align
)
1790 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1791 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1795 /* Set the expr for MEM to EXPR. */
1798 set_mem_expr (rtx mem
, tree expr
)
1801 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1802 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1805 /* Set the offset of MEM to OFFSET. */
1808 set_mem_offset (rtx mem
, rtx offset
)
1810 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1811 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1815 /* Set the size of MEM to SIZE. */
1818 set_mem_size (rtx mem
, rtx size
)
1820 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1821 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1825 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1826 and its address changed to ADDR. (VOIDmode means don't change the mode.
1827 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1828 returned memory location is required to be valid. The memory
1829 attributes are not changed. */
1832 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1836 gcc_assert (MEM_P (memref
));
1837 if (mode
== VOIDmode
)
1838 mode
= GET_MODE (memref
);
1840 addr
= XEXP (memref
, 0);
1841 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1842 && (!validate
|| memory_address_p (mode
, addr
)))
1847 if (reload_in_progress
|| reload_completed
)
1848 gcc_assert (memory_address_p (mode
, addr
));
1850 addr
= memory_address (mode
, addr
);
1853 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1856 new = gen_rtx_MEM (mode
, addr
);
1857 MEM_COPY_ATTRIBUTES (new, memref
);
1861 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1862 way we are changing MEMREF, so we only preserve the alias set. */
1865 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1867 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1868 enum machine_mode mmode
= GET_MODE (new);
1871 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1872 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1874 /* If there are no changes, just return the original memory reference. */
1877 if (MEM_ATTRS (memref
) == 0
1878 || (MEM_EXPR (memref
) == NULL
1879 && MEM_OFFSET (memref
) == NULL
1880 && MEM_SIZE (memref
) == size
1881 && MEM_ALIGN (memref
) == align
))
1884 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1885 MEM_COPY_ATTRIBUTES (new, memref
);
1889 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1894 /* Return a memory reference like MEMREF, but with its mode changed
1895 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1896 nonzero, the memory address is forced to be valid.
1897 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1898 and caller is responsible for adjusting MEMREF base register. */
1901 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1902 int validate
, int adjust
)
1904 rtx addr
= XEXP (memref
, 0);
1906 rtx memoffset
= MEM_OFFSET (memref
);
1908 unsigned int memalign
= MEM_ALIGN (memref
);
1910 /* If there are no changes, just return the original memory reference. */
1911 if (mode
== GET_MODE (memref
) && !offset
1912 && (!validate
|| memory_address_p (mode
, addr
)))
1915 /* ??? Prefer to create garbage instead of creating shared rtl.
1916 This may happen even if offset is nonzero -- consider
1917 (plus (plus reg reg) const_int) -- so do this always. */
1918 addr
= copy_rtx (addr
);
1922 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1923 object, we can merge it into the LO_SUM. */
1924 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1926 && (unsigned HOST_WIDE_INT
) offset
1927 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1928 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1929 plus_constant (XEXP (addr
, 1), offset
));
1931 addr
= plus_constant (addr
, offset
);
1934 new = change_address_1 (memref
, mode
, addr
, validate
);
1936 /* Compute the new values of the memory attributes due to this adjustment.
1937 We add the offsets and update the alignment. */
1939 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1941 /* Compute the new alignment by taking the MIN of the alignment and the
1942 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1947 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1949 /* We can compute the size in a number of ways. */
1950 if (GET_MODE (new) != BLKmode
)
1951 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1952 else if (MEM_SIZE (memref
))
1953 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1955 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1956 memoffset
, size
, memalign
, GET_MODE (new));
1958 /* At some point, we should validate that this offset is within the object,
1959 if all the appropriate values are known. */
1963 /* Return a memory reference like MEMREF, but with its mode changed
1964 to MODE and its address changed to ADDR, which is assumed to be
1965 MEMREF offseted by OFFSET bytes. If VALIDATE is
1966 nonzero, the memory address is forced to be valid. */
1969 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1970 HOST_WIDE_INT offset
, int validate
)
1972 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1973 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1976 /* Return a memory reference like MEMREF, but whose address is changed by
1977 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1978 known to be in OFFSET (possibly 1). */
1981 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1983 rtx
new, addr
= XEXP (memref
, 0);
1985 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1987 /* At this point we don't know _why_ the address is invalid. It
1988 could have secondary memory references, multiplies or anything.
1990 However, if we did go and rearrange things, we can wind up not
1991 being able to recognize the magic around pic_offset_table_rtx.
1992 This stuff is fragile, and is yet another example of why it is
1993 bad to expose PIC machinery too early. */
1994 if (! memory_address_p (GET_MODE (memref
), new)
1995 && GET_CODE (addr
) == PLUS
1996 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1998 addr
= force_reg (GET_MODE (addr
), addr
);
1999 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2002 update_temp_slot_address (XEXP (memref
, 0), new);
2003 new = change_address_1 (memref
, VOIDmode
, new, 1);
2005 /* If there are no changes, just return the original memory reference. */
2009 /* Update the alignment to reflect the offset. Reset the offset, which
2012 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2013 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2018 /* Return a memory reference like MEMREF, but with its address changed to
2019 ADDR. The caller is asserting that the actual piece of memory pointed
2020 to is the same, just the form of the address is being changed, such as
2021 by putting something into a register. */
2024 replace_equiv_address (rtx memref
, rtx addr
)
2026 /* change_address_1 copies the memory attribute structure without change
2027 and that's exactly what we want here. */
2028 update_temp_slot_address (XEXP (memref
, 0), addr
);
2029 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2032 /* Likewise, but the reference is not required to be valid. */
2035 replace_equiv_address_nv (rtx memref
, rtx addr
)
2037 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2040 /* Return a memory reference like MEMREF, but with its mode widened to
2041 MODE and offset by OFFSET. This would be used by targets that e.g.
2042 cannot issue QImode memory operations and have to use SImode memory
2043 operations plus masking logic. */
2046 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2048 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2049 tree expr
= MEM_EXPR (new);
2050 rtx memoffset
= MEM_OFFSET (new);
2051 unsigned int size
= GET_MODE_SIZE (mode
);
2053 /* If there are no changes, just return the original memory reference. */
2057 /* If we don't know what offset we were at within the expression, then
2058 we can't know if we've overstepped the bounds. */
2064 if (TREE_CODE (expr
) == COMPONENT_REF
)
2066 tree field
= TREE_OPERAND (expr
, 1);
2067 tree offset
= component_ref_field_offset (expr
);
2069 if (! DECL_SIZE_UNIT (field
))
2075 /* Is the field at least as large as the access? If so, ok,
2076 otherwise strip back to the containing structure. */
2077 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2078 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2079 && INTVAL (memoffset
) >= 0)
2082 if (! host_integerp (offset
, 1))
2088 expr
= TREE_OPERAND (expr
, 0);
2090 = (GEN_INT (INTVAL (memoffset
)
2091 + tree_low_cst (offset
, 1)
2092 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2095 /* Similarly for the decl. */
2096 else if (DECL_P (expr
)
2097 && DECL_SIZE_UNIT (expr
)
2098 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2099 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2100 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2104 /* The widened memory access overflows the expression, which means
2105 that it could alias another expression. Zap it. */
2112 memoffset
= NULL_RTX
;
2114 /* The widened memory may alias other stuff, so zap the alias set. */
2115 /* ??? Maybe use get_alias_set on any remaining expression. */
2117 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2118 MEM_ALIGN (new), mode
);
2123 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2126 gen_label_rtx (void)
2128 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2129 NULL
, label_num
++, NULL
);
2132 /* For procedure integration. */
2134 /* Install new pointers to the first and last insns in the chain.
2135 Also, set cur_insn_uid to one higher than the last in use.
2136 Used for an inline-procedure after copying the insn chain. */
2139 set_new_first_and_last_insn (rtx first
, rtx last
)
2147 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2148 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2153 /* Go through all the RTL insn bodies and copy any invalid shared
2154 structure. This routine should only be called once. */
2157 unshare_all_rtl_1 (rtx insn
)
2159 /* Unshare just about everything else. */
2160 unshare_all_rtl_in_chain (insn
);
2162 /* Make sure the addresses of stack slots found outside the insn chain
2163 (such as, in DECL_RTL of a variable) are not shared
2164 with the insn chain.
2166 This special care is necessary when the stack slot MEM does not
2167 actually appear in the insn chain. If it does appear, its address
2168 is unshared from all else at that point. */
2169 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2172 /* Go through all the RTL insn bodies and copy any invalid shared
2173 structure, again. This is a fairly expensive thing to do so it
2174 should be done sparingly. */
2177 unshare_all_rtl_again (rtx insn
)
2182 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2185 reset_used_flags (PATTERN (p
));
2186 reset_used_flags (REG_NOTES (p
));
2189 /* Make sure that virtual stack slots are not shared. */
2190 set_used_decls (DECL_INITIAL (cfun
->decl
));
2192 /* Make sure that virtual parameters are not shared. */
2193 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2194 set_used_flags (DECL_RTL (decl
));
2196 reset_used_flags (stack_slot_list
);
2198 unshare_all_rtl_1 (insn
);
2202 unshare_all_rtl (void)
2204 unshare_all_rtl_1 (get_insns ());
2208 struct rtl_opt_pass pass_unshare_all_rtl
=
2212 "unshare", /* name */
2214 unshare_all_rtl
, /* execute */
2217 0, /* static_pass_number */
2219 0, /* properties_required */
2220 0, /* properties_provided */
2221 0, /* properties_destroyed */
2222 0, /* todo_flags_start */
2223 TODO_dump_func
| TODO_verify_rtl_sharing
/* todo_flags_finish */
2228 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2229 Recursively does the same for subexpressions. */
2232 verify_rtx_sharing (rtx orig
, rtx insn
)
2237 const char *format_ptr
;
2242 code
= GET_CODE (x
);
2244 /* These types may be freely shared. */
2260 /* SCRATCH must be shared because they represent distinct values. */
2262 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2267 if (shared_const_p (orig
))
2272 /* A MEM is allowed to be shared if its address is constant. */
2273 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2274 || reload_completed
|| reload_in_progress
)
2283 /* This rtx may not be shared. If it has already been seen,
2284 replace it with a copy of itself. */
2285 #ifdef ENABLE_CHECKING
2286 if (RTX_FLAG (x
, used
))
2288 error ("invalid rtl sharing found in the insn");
2290 error ("shared rtx");
2292 internal_error ("internal consistency failure");
2295 gcc_assert (!RTX_FLAG (x
, used
));
2297 RTX_FLAG (x
, used
) = 1;
2299 /* Now scan the subexpressions recursively. */
2301 format_ptr
= GET_RTX_FORMAT (code
);
2303 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2305 switch (*format_ptr
++)
2308 verify_rtx_sharing (XEXP (x
, i
), insn
);
2312 if (XVEC (x
, i
) != NULL
)
2315 int len
= XVECLEN (x
, i
);
2317 for (j
= 0; j
< len
; j
++)
2319 /* We allow sharing of ASM_OPERANDS inside single
2321 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2322 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2324 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2326 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2335 /* Go through all the RTL insn bodies and check that there is no unexpected
2336 sharing in between the subexpressions. */
2339 verify_rtl_sharing (void)
2343 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2346 reset_used_flags (PATTERN (p
));
2347 reset_used_flags (REG_NOTES (p
));
2348 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2351 rtx q
, sequence
= PATTERN (p
);
2353 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2355 q
= XVECEXP (sequence
, 0, i
);
2356 gcc_assert (INSN_P (q
));
2357 reset_used_flags (PATTERN (q
));
2358 reset_used_flags (REG_NOTES (q
));
2363 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2366 verify_rtx_sharing (PATTERN (p
), p
);
2367 verify_rtx_sharing (REG_NOTES (p
), p
);
2371 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2372 Assumes the mark bits are cleared at entry. */
2375 unshare_all_rtl_in_chain (rtx insn
)
2377 for (; insn
; insn
= NEXT_INSN (insn
))
2380 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2381 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2385 /* Go through all virtual stack slots of a function and mark them as
2386 shared. We never replace the DECL_RTLs themselves with a copy,
2387 but expressions mentioned into a DECL_RTL cannot be shared with
2388 expressions in the instruction stream.
2390 Note that reload may convert pseudo registers into memories in-place.
2391 Pseudo registers are always shared, but MEMs never are. Thus if we
2392 reset the used flags on MEMs in the instruction stream, we must set
2393 them again on MEMs that appear in DECL_RTLs. */
2396 set_used_decls (tree blk
)
2401 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2402 if (DECL_RTL_SET_P (t
))
2403 set_used_flags (DECL_RTL (t
));
2405 /* Now process sub-blocks. */
2406 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2410 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2411 Recursively does the same for subexpressions. Uses
2412 copy_rtx_if_shared_1 to reduce stack space. */
2415 copy_rtx_if_shared (rtx orig
)
2417 copy_rtx_if_shared_1 (&orig
);
2421 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2422 use. Recursively does the same for subexpressions. */
2425 copy_rtx_if_shared_1 (rtx
*orig1
)
2431 const char *format_ptr
;
2435 /* Repeat is used to turn tail-recursion into iteration. */
2442 code
= GET_CODE (x
);
2444 /* These types may be freely shared. */
2459 /* SCRATCH must be shared because they represent distinct values. */
2462 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2467 if (shared_const_p (x
))
2476 /* The chain of insns is not being copied. */
2483 /* This rtx may not be shared. If it has already been seen,
2484 replace it with a copy of itself. */
2486 if (RTX_FLAG (x
, used
))
2488 x
= shallow_copy_rtx (x
);
2491 RTX_FLAG (x
, used
) = 1;
2493 /* Now scan the subexpressions recursively.
2494 We can store any replaced subexpressions directly into X
2495 since we know X is not shared! Any vectors in X
2496 must be copied if X was copied. */
2498 format_ptr
= GET_RTX_FORMAT (code
);
2499 length
= GET_RTX_LENGTH (code
);
2502 for (i
= 0; i
< length
; i
++)
2504 switch (*format_ptr
++)
2508 copy_rtx_if_shared_1 (last_ptr
);
2509 last_ptr
= &XEXP (x
, i
);
2513 if (XVEC (x
, i
) != NULL
)
2516 int len
= XVECLEN (x
, i
);
2518 /* Copy the vector iff I copied the rtx and the length
2520 if (copied
&& len
> 0)
2521 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2523 /* Call recursively on all inside the vector. */
2524 for (j
= 0; j
< len
; j
++)
2527 copy_rtx_if_shared_1 (last_ptr
);
2528 last_ptr
= &XVECEXP (x
, i
, j
);
2543 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2544 to look for shared sub-parts. */
2547 reset_used_flags (rtx x
)
2551 const char *format_ptr
;
2554 /* Repeat is used to turn tail-recursion into iteration. */
2559 code
= GET_CODE (x
);
2561 /* These types may be freely shared so we needn't do any resetting
2583 /* The chain of insns is not being copied. */
2590 RTX_FLAG (x
, used
) = 0;
2592 format_ptr
= GET_RTX_FORMAT (code
);
2593 length
= GET_RTX_LENGTH (code
);
2595 for (i
= 0; i
< length
; i
++)
2597 switch (*format_ptr
++)
2605 reset_used_flags (XEXP (x
, i
));
2609 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2610 reset_used_flags (XVECEXP (x
, i
, j
));
2616 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2617 to look for shared sub-parts. */
2620 set_used_flags (rtx x
)
2624 const char *format_ptr
;
2629 code
= GET_CODE (x
);
2631 /* These types may be freely shared so we needn't do any resetting
2653 /* The chain of insns is not being copied. */
2660 RTX_FLAG (x
, used
) = 1;
2662 format_ptr
= GET_RTX_FORMAT (code
);
2663 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2665 switch (*format_ptr
++)
2668 set_used_flags (XEXP (x
, i
));
2672 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2673 set_used_flags (XVECEXP (x
, i
, j
));
2679 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2680 Return X or the rtx for the pseudo reg the value of X was copied into.
2681 OTHER must be valid as a SET_DEST. */
2684 make_safe_from (rtx x
, rtx other
)
2687 switch (GET_CODE (other
))
2690 other
= SUBREG_REG (other
);
2692 case STRICT_LOW_PART
:
2695 other
= XEXP (other
, 0);
2704 && GET_CODE (x
) != SUBREG
)
2706 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2707 || reg_mentioned_p (other
, x
))))
2709 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2710 emit_move_insn (temp
, x
);
2716 /* Emission of insns (adding them to the doubly-linked list). */
2718 /* Return the first insn of the current sequence or current function. */
2726 /* Specify a new insn as the first in the chain. */
2729 set_first_insn (rtx insn
)
2731 gcc_assert (!PREV_INSN (insn
));
2735 /* Return the last insn emitted in current sequence or current function. */
2738 get_last_insn (void)
2743 /* Specify a new insn as the last in the chain. */
2746 set_last_insn (rtx insn
)
2748 gcc_assert (!NEXT_INSN (insn
));
2752 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2755 get_last_insn_anywhere (void)
2757 struct sequence_stack
*stack
;
2760 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2761 if (stack
->last
!= 0)
2766 /* Return the first nonnote insn emitted in current sequence or current
2767 function. This routine looks inside SEQUENCEs. */
2770 get_first_nonnote_insn (void)
2772 rtx insn
= first_insn
;
2777 for (insn
= next_insn (insn
);
2778 insn
&& NOTE_P (insn
);
2779 insn
= next_insn (insn
))
2783 if (NONJUMP_INSN_P (insn
)
2784 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2785 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2792 /* Return the last nonnote insn emitted in current sequence or current
2793 function. This routine looks inside SEQUENCEs. */
2796 get_last_nonnote_insn (void)
2798 rtx insn
= last_insn
;
2803 for (insn
= previous_insn (insn
);
2804 insn
&& NOTE_P (insn
);
2805 insn
= previous_insn (insn
))
2809 if (NONJUMP_INSN_P (insn
)
2810 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2811 insn
= XVECEXP (PATTERN (insn
), 0,
2812 XVECLEN (PATTERN (insn
), 0) - 1);
2819 /* Return a number larger than any instruction's uid in this function. */
2824 return cur_insn_uid
;
2827 /* Return the next insn. If it is a SEQUENCE, return the first insn
2831 next_insn (rtx insn
)
2835 insn
= NEXT_INSN (insn
);
2836 if (insn
&& NONJUMP_INSN_P (insn
)
2837 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2838 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2844 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2848 previous_insn (rtx insn
)
2852 insn
= PREV_INSN (insn
);
2853 if (insn
&& NONJUMP_INSN_P (insn
)
2854 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2855 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2861 /* Return the next insn after INSN that is not a NOTE. This routine does not
2862 look inside SEQUENCEs. */
2865 next_nonnote_insn (rtx insn
)
2869 insn
= NEXT_INSN (insn
);
2870 if (insn
== 0 || !NOTE_P (insn
))
2877 /* Return the previous insn before INSN that is not a NOTE. This routine does
2878 not look inside SEQUENCEs. */
2881 prev_nonnote_insn (rtx insn
)
2885 insn
= PREV_INSN (insn
);
2886 if (insn
== 0 || !NOTE_P (insn
))
2893 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2894 or 0, if there is none. This routine does not look inside
2898 next_real_insn (rtx insn
)
2902 insn
= NEXT_INSN (insn
);
2903 if (insn
== 0 || INSN_P (insn
))
2910 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2911 or 0, if there is none. This routine does not look inside
2915 prev_real_insn (rtx insn
)
2919 insn
= PREV_INSN (insn
);
2920 if (insn
== 0 || INSN_P (insn
))
2927 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2928 This routine does not look inside SEQUENCEs. */
2931 last_call_insn (void)
2935 for (insn
= get_last_insn ();
2936 insn
&& !CALL_P (insn
);
2937 insn
= PREV_INSN (insn
))
2943 /* Find the next insn after INSN that really does something. This routine
2944 does not look inside SEQUENCEs. Until reload has completed, this is the
2945 same as next_real_insn. */
2948 active_insn_p (const_rtx insn
)
2950 return (CALL_P (insn
) || JUMP_P (insn
)
2951 || (NONJUMP_INSN_P (insn
)
2952 && (! reload_completed
2953 || (GET_CODE (PATTERN (insn
)) != USE
2954 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2958 next_active_insn (rtx insn
)
2962 insn
= NEXT_INSN (insn
);
2963 if (insn
== 0 || active_insn_p (insn
))
2970 /* Find the last insn before INSN that really does something. This routine
2971 does not look inside SEQUENCEs. Until reload has completed, this is the
2972 same as prev_real_insn. */
2975 prev_active_insn (rtx insn
)
2979 insn
= PREV_INSN (insn
);
2980 if (insn
== 0 || active_insn_p (insn
))
2987 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2990 next_label (rtx insn
)
2994 insn
= NEXT_INSN (insn
);
2995 if (insn
== 0 || LABEL_P (insn
))
3002 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3005 prev_label (rtx insn
)
3009 insn
= PREV_INSN (insn
);
3010 if (insn
== 0 || LABEL_P (insn
))
3017 /* Return the last label to mark the same position as LABEL. Return null
3018 if LABEL itself is null. */
3021 skip_consecutive_labels (rtx label
)
3025 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3033 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3034 and REG_CC_USER notes so we can find it. */
3037 link_cc0_insns (rtx insn
)
3039 rtx user
= next_nonnote_insn (insn
);
3041 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3042 user
= XVECEXP (PATTERN (user
), 0, 0);
3044 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3046 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3049 /* Return the next insn that uses CC0 after INSN, which is assumed to
3050 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3051 applied to the result of this function should yield INSN).
3053 Normally, this is simply the next insn. However, if a REG_CC_USER note
3054 is present, it contains the insn that uses CC0.
3056 Return 0 if we can't find the insn. */
3059 next_cc0_user (rtx insn
)
3061 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3064 return XEXP (note
, 0);
3066 insn
= next_nonnote_insn (insn
);
3067 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3068 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3070 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3076 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3077 note, it is the previous insn. */
3080 prev_cc0_setter (rtx insn
)
3082 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3085 return XEXP (note
, 0);
3087 insn
= prev_nonnote_insn (insn
);
3088 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3095 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3098 find_auto_inc (rtx
*xp
, void *data
)
3103 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3106 switch (GET_CODE (x
))
3114 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3125 /* Increment the label uses for all labels present in rtx. */
3128 mark_label_nuses (rtx x
)
3134 code
= GET_CODE (x
);
3135 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3136 LABEL_NUSES (XEXP (x
, 0))++;
3138 fmt
= GET_RTX_FORMAT (code
);
3139 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3142 mark_label_nuses (XEXP (x
, i
));
3143 else if (fmt
[i
] == 'E')
3144 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3145 mark_label_nuses (XVECEXP (x
, i
, j
));
3150 /* Try splitting insns that can be split for better scheduling.
3151 PAT is the pattern which might split.
3152 TRIAL is the insn providing PAT.
3153 LAST is nonzero if we should return the last insn of the sequence produced.
3155 If this routine succeeds in splitting, it returns the first or last
3156 replacement insn depending on the value of LAST. Otherwise, it
3157 returns TRIAL. If the insn to be returned can be split, it will be. */
3160 try_split (rtx pat
, rtx trial
, int last
)
3162 rtx before
= PREV_INSN (trial
);
3163 rtx after
= NEXT_INSN (trial
);
3164 int has_barrier
= 0;
3165 rtx tem
, note_retval
, note_libcall
;
3168 rtx insn_last
, insn
;
3171 if (any_condjump_p (trial
)
3172 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3173 split_branch_probability
= INTVAL (XEXP (note
, 0));
3174 probability
= split_branch_probability
;
3176 seq
= split_insns (pat
, trial
);
3178 split_branch_probability
= -1;
3180 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3181 We may need to handle this specially. */
3182 if (after
&& BARRIER_P (after
))
3185 after
= NEXT_INSN (after
);
3191 /* Avoid infinite loop if any insn of the result matches
3192 the original pattern. */
3196 if (INSN_P (insn_last
)
3197 && rtx_equal_p (PATTERN (insn_last
), pat
))
3199 if (!NEXT_INSN (insn_last
))
3201 insn_last
= NEXT_INSN (insn_last
);
3204 /* We will be adding the new sequence to the function. The splitters
3205 may have introduced invalid RTL sharing, so unshare the sequence now. */
3206 unshare_all_rtl_in_chain (seq
);
3209 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3213 mark_jump_label (PATTERN (insn
), insn
, 0);
3215 if (probability
!= -1
3216 && any_condjump_p (insn
)
3217 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3219 /* We can preserve the REG_BR_PROB notes only if exactly
3220 one jump is created, otherwise the machine description
3221 is responsible for this step using
3222 split_branch_probability variable. */
3223 gcc_assert (njumps
== 1);
3225 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3226 GEN_INT (probability
),
3232 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3233 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3236 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3239 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3242 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3243 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3247 /* Copy notes, particularly those related to the CFG. */
3248 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3250 switch (REG_NOTE_KIND (note
))
3253 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3256 || (flag_non_call_exceptions
&& INSN_P (insn
)
3257 && may_trap_p (PATTERN (insn
))))
3259 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3267 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3271 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3277 case REG_NON_LOCAL_GOTO
:
3278 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3282 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3290 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3292 rtx reg
= XEXP (note
, 0);
3293 if (!FIND_REG_INC_NOTE (insn
, reg
)
3294 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3295 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_INC
, reg
,
3302 /* Relink the insns with REG_LIBCALL note and with REG_RETVAL note
3304 REG_NOTES (insn_last
)
3305 = gen_rtx_INSN_LIST (REG_LIBCALL
,
3307 REG_NOTES (insn_last
));
3309 note_retval
= find_reg_note (XEXP (note
, 0), REG_RETVAL
, NULL
);
3310 XEXP (note_retval
, 0) = insn_last
;
3314 /* Relink the insns with REG_LIBCALL note and with REG_RETVAL note
3316 REG_NOTES (insn_last
)
3317 = gen_rtx_INSN_LIST (REG_RETVAL
,
3319 REG_NOTES (insn_last
));
3321 note_libcall
= find_reg_note (XEXP (note
, 0), REG_LIBCALL
, NULL
);
3322 XEXP (note_libcall
, 0) = insn_last
;
3330 /* If there are LABELS inside the split insns increment the
3331 usage count so we don't delete the label. */
3335 while (insn
!= NULL_RTX
)
3337 /* JUMP_P insns have already been "marked" above. */
3338 if (NONJUMP_INSN_P (insn
))
3339 mark_label_nuses (PATTERN (insn
));
3341 insn
= PREV_INSN (insn
);
3345 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3347 delete_insn (trial
);
3349 emit_barrier_after (tem
);
3351 /* Recursively call try_split for each new insn created; by the
3352 time control returns here that insn will be fully split, so
3353 set LAST and continue from the insn after the one returned.
3354 We can't use next_active_insn here since AFTER may be a note.
3355 Ignore deleted insns, which can be occur if not optimizing. */
3356 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3357 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3358 tem
= try_split (PATTERN (tem
), tem
, 1);
3360 /* Return either the first or the last insn, depending on which was
3363 ? (after
? PREV_INSN (after
) : last_insn
)
3364 : NEXT_INSN (before
);
3367 /* Make and return an INSN rtx, initializing all its slots.
3368 Store PATTERN in the pattern slots. */
3371 make_insn_raw (rtx pattern
)
3375 insn
= rtx_alloc (INSN
);
3377 INSN_UID (insn
) = cur_insn_uid
++;
3378 PATTERN (insn
) = pattern
;
3379 INSN_CODE (insn
) = -1;
3380 REG_NOTES (insn
) = NULL
;
3381 INSN_LOCATOR (insn
) = curr_insn_locator ();
3382 BLOCK_FOR_INSN (insn
) = NULL
;
3384 #ifdef ENABLE_RTL_CHECKING
3387 && (returnjump_p (insn
)
3388 || (GET_CODE (insn
) == SET
3389 && SET_DEST (insn
) == pc_rtx
)))
3391 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3399 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3402 make_jump_insn_raw (rtx pattern
)
3406 insn
= rtx_alloc (JUMP_INSN
);
3407 INSN_UID (insn
) = cur_insn_uid
++;
3409 PATTERN (insn
) = pattern
;
3410 INSN_CODE (insn
) = -1;
3411 REG_NOTES (insn
) = NULL
;
3412 JUMP_LABEL (insn
) = NULL
;
3413 INSN_LOCATOR (insn
) = curr_insn_locator ();
3414 BLOCK_FOR_INSN (insn
) = NULL
;
3419 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3422 make_call_insn_raw (rtx pattern
)
3426 insn
= rtx_alloc (CALL_INSN
);
3427 INSN_UID (insn
) = cur_insn_uid
++;
3429 PATTERN (insn
) = pattern
;
3430 INSN_CODE (insn
) = -1;
3431 REG_NOTES (insn
) = NULL
;
3432 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3433 INSN_LOCATOR (insn
) = curr_insn_locator ();
3434 BLOCK_FOR_INSN (insn
) = NULL
;
3439 /* Add INSN to the end of the doubly-linked list.
3440 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3445 PREV_INSN (insn
) = last_insn
;
3446 NEXT_INSN (insn
) = 0;
3448 if (NULL
!= last_insn
)
3449 NEXT_INSN (last_insn
) = insn
;
3451 if (NULL
== first_insn
)
3457 /* Add INSN into the doubly-linked list after insn AFTER. This and
3458 the next should be the only functions called to insert an insn once
3459 delay slots have been filled since only they know how to update a
3463 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3465 rtx next
= NEXT_INSN (after
);
3467 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3469 NEXT_INSN (insn
) = next
;
3470 PREV_INSN (insn
) = after
;
3474 PREV_INSN (next
) = insn
;
3475 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3476 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3478 else if (last_insn
== after
)
3482 struct sequence_stack
*stack
= seq_stack
;
3483 /* Scan all pending sequences too. */
3484 for (; stack
; stack
= stack
->next
)
3485 if (after
== stack
->last
)
3494 if (!BARRIER_P (after
)
3495 && !BARRIER_P (insn
)
3496 && (bb
= BLOCK_FOR_INSN (after
)))
3498 set_block_for_insn (insn
, bb
);
3500 df_insn_rescan (insn
);
3501 /* Should not happen as first in the BB is always
3502 either NOTE or LABEL. */
3503 if (BB_END (bb
) == after
3504 /* Avoid clobbering of structure when creating new BB. */
3505 && !BARRIER_P (insn
)
3506 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3510 NEXT_INSN (after
) = insn
;
3511 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3513 rtx sequence
= PATTERN (after
);
3514 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3518 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3519 the previous should be the only functions called to insert an insn
3520 once delay slots have been filled since only they know how to
3521 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3525 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3527 rtx prev
= PREV_INSN (before
);
3529 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3531 PREV_INSN (insn
) = prev
;
3532 NEXT_INSN (insn
) = before
;
3536 NEXT_INSN (prev
) = insn
;
3537 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3539 rtx sequence
= PATTERN (prev
);
3540 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3543 else if (first_insn
== before
)
3547 struct sequence_stack
*stack
= seq_stack
;
3548 /* Scan all pending sequences too. */
3549 for (; stack
; stack
= stack
->next
)
3550 if (before
== stack
->first
)
3552 stack
->first
= insn
;
3560 && !BARRIER_P (before
)
3561 && !BARRIER_P (insn
))
3562 bb
= BLOCK_FOR_INSN (before
);
3566 set_block_for_insn (insn
, bb
);
3568 df_insn_rescan (insn
);
3569 /* Should not happen as first in the BB is always either NOTE or
3571 gcc_assert (BB_HEAD (bb
) != insn
3572 /* Avoid clobbering of structure when creating new BB. */
3574 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3577 PREV_INSN (before
) = insn
;
3578 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3579 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3583 /* Replace insn with an deleted instruction note. */
3585 void set_insn_deleted (rtx insn
)
3587 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3588 PUT_CODE (insn
, NOTE
);
3589 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3593 /* Remove an insn from its doubly-linked list. This function knows how
3594 to handle sequences. */
3596 remove_insn (rtx insn
)
3598 rtx next
= NEXT_INSN (insn
);
3599 rtx prev
= PREV_INSN (insn
);
3602 /* Later in the code, the block will be marked dirty. */
3603 df_insn_delete (NULL
, INSN_UID (insn
));
3607 NEXT_INSN (prev
) = next
;
3608 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3610 rtx sequence
= PATTERN (prev
);
3611 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3614 else if (first_insn
== insn
)
3618 struct sequence_stack
*stack
= seq_stack
;
3619 /* Scan all pending sequences too. */
3620 for (; stack
; stack
= stack
->next
)
3621 if (insn
== stack
->first
)
3623 stack
->first
= next
;
3632 PREV_INSN (next
) = prev
;
3633 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3634 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3636 else if (last_insn
== insn
)
3640 struct sequence_stack
*stack
= seq_stack
;
3641 /* Scan all pending sequences too. */
3642 for (; stack
; stack
= stack
->next
)
3643 if (insn
== stack
->last
)
3651 if (!BARRIER_P (insn
)
3652 && (bb
= BLOCK_FOR_INSN (insn
)))
3655 df_set_bb_dirty (bb
);
3656 if (BB_HEAD (bb
) == insn
)
3658 /* Never ever delete the basic block note without deleting whole
3660 gcc_assert (!NOTE_P (insn
));
3661 BB_HEAD (bb
) = next
;
3663 if (BB_END (bb
) == insn
)
3668 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3671 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3673 gcc_assert (call_insn
&& CALL_P (call_insn
));
3675 /* Put the register usage information on the CALL. If there is already
3676 some usage information, put ours at the end. */
3677 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3681 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3682 link
= XEXP (link
, 1))
3685 XEXP (link
, 1) = call_fusage
;
3688 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3691 /* Delete all insns made since FROM.
3692 FROM becomes the new last instruction. */
3695 delete_insns_since (rtx from
)
3700 NEXT_INSN (from
) = 0;
3704 /* This function is deprecated, please use sequences instead.
3706 Move a consecutive bunch of insns to a different place in the chain.
3707 The insns to be moved are those between FROM and TO.
3708 They are moved to a new position after the insn AFTER.
3709 AFTER must not be FROM or TO or any insn in between.
3711 This function does not know about SEQUENCEs and hence should not be
3712 called after delay-slot filling has been done. */
3715 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3717 /* Splice this bunch out of where it is now. */
3718 if (PREV_INSN (from
))
3719 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3721 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3722 if (last_insn
== to
)
3723 last_insn
= PREV_INSN (from
);
3724 if (first_insn
== from
)
3725 first_insn
= NEXT_INSN (to
);
3727 /* Make the new neighbors point to it and it to them. */
3728 if (NEXT_INSN (after
))
3729 PREV_INSN (NEXT_INSN (after
)) = to
;
3731 NEXT_INSN (to
) = NEXT_INSN (after
);
3732 PREV_INSN (from
) = after
;
3733 NEXT_INSN (after
) = from
;
3734 if (after
== last_insn
)
3738 /* Same as function above, but take care to update BB boundaries. */
3740 reorder_insns (rtx from
, rtx to
, rtx after
)
3742 rtx prev
= PREV_INSN (from
);
3743 basic_block bb
, bb2
;
3745 reorder_insns_nobb (from
, to
, after
);
3747 if (!BARRIER_P (after
)
3748 && (bb
= BLOCK_FOR_INSN (after
)))
3751 df_set_bb_dirty (bb
);
3753 if (!BARRIER_P (from
)
3754 && (bb2
= BLOCK_FOR_INSN (from
)))
3756 if (BB_END (bb2
) == to
)
3757 BB_END (bb2
) = prev
;
3758 df_set_bb_dirty (bb2
);
3761 if (BB_END (bb
) == after
)
3764 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3766 df_insn_change_bb (x
, bb
);
3771 /* Emit insn(s) of given code and pattern
3772 at a specified place within the doubly-linked list.
3774 All of the emit_foo global entry points accept an object
3775 X which is either an insn list or a PATTERN of a single
3778 There are thus a few canonical ways to generate code and
3779 emit it at a specific place in the instruction stream. For
3780 example, consider the instruction named SPOT and the fact that
3781 we would like to emit some instructions before SPOT. We might
3785 ... emit the new instructions ...
3786 insns_head = get_insns ();
3789 emit_insn_before (insns_head, SPOT);
3791 It used to be common to generate SEQUENCE rtl instead, but that
3792 is a relic of the past which no longer occurs. The reason is that
3793 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3794 generated would almost certainly die right after it was created. */
3796 /* Make X be output before the instruction BEFORE. */
3799 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
3804 gcc_assert (before
);
3809 switch (GET_CODE (x
))
3820 rtx next
= NEXT_INSN (insn
);
3821 add_insn_before (insn
, before
, bb
);
3827 #ifdef ENABLE_RTL_CHECKING
3834 last
= make_insn_raw (x
);
3835 add_insn_before (last
, before
, bb
);
3842 /* Make an instruction with body X and code JUMP_INSN
3843 and output it before the instruction BEFORE. */
3846 emit_jump_insn_before_noloc (rtx x
, rtx before
)
3848 rtx insn
, last
= NULL_RTX
;
3850 gcc_assert (before
);
3852 switch (GET_CODE (x
))
3863 rtx next
= NEXT_INSN (insn
);
3864 add_insn_before (insn
, before
, NULL
);
3870 #ifdef ENABLE_RTL_CHECKING
3877 last
= make_jump_insn_raw (x
);
3878 add_insn_before (last
, before
, NULL
);
3885 /* Make an instruction with body X and code CALL_INSN
3886 and output it before the instruction BEFORE. */
3889 emit_call_insn_before_noloc (rtx x
, rtx before
)
3891 rtx last
= NULL_RTX
, insn
;
3893 gcc_assert (before
);
3895 switch (GET_CODE (x
))
3906 rtx next
= NEXT_INSN (insn
);
3907 add_insn_before (insn
, before
, NULL
);
3913 #ifdef ENABLE_RTL_CHECKING
3920 last
= make_call_insn_raw (x
);
3921 add_insn_before (last
, before
, NULL
);
3928 /* Make an insn of code BARRIER
3929 and output it before the insn BEFORE. */
3932 emit_barrier_before (rtx before
)
3934 rtx insn
= rtx_alloc (BARRIER
);
3936 INSN_UID (insn
) = cur_insn_uid
++;
3938 add_insn_before (insn
, before
, NULL
);
3942 /* Emit the label LABEL before the insn BEFORE. */
3945 emit_label_before (rtx label
, rtx before
)
3947 /* This can be called twice for the same label as a result of the
3948 confusion that follows a syntax error! So make it harmless. */
3949 if (INSN_UID (label
) == 0)
3951 INSN_UID (label
) = cur_insn_uid
++;
3952 add_insn_before (label
, before
, NULL
);
3958 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3961 emit_note_before (enum insn_note subtype
, rtx before
)
3963 rtx note
= rtx_alloc (NOTE
);
3964 INSN_UID (note
) = cur_insn_uid
++;
3965 NOTE_KIND (note
) = subtype
;
3966 BLOCK_FOR_INSN (note
) = NULL
;
3967 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3969 add_insn_before (note
, before
, NULL
);
3973 /* Helper for emit_insn_after, handles lists of instructions
3977 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
3981 if (!bb
&& !BARRIER_P (after
))
3982 bb
= BLOCK_FOR_INSN (after
);
3986 df_set_bb_dirty (bb
);
3987 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3988 if (!BARRIER_P (last
))
3990 set_block_for_insn (last
, bb
);
3991 df_insn_rescan (last
);
3993 if (!BARRIER_P (last
))
3995 set_block_for_insn (last
, bb
);
3996 df_insn_rescan (last
);
3998 if (BB_END (bb
) == after
)
4002 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4005 after_after
= NEXT_INSN (after
);
4007 NEXT_INSN (after
) = first
;
4008 PREV_INSN (first
) = after
;
4009 NEXT_INSN (last
) = after_after
;
4011 PREV_INSN (after_after
) = last
;
4013 if (after
== last_insn
)
4018 /* Make X be output after the insn AFTER and set the BB of insn. If
4019 BB is NULL, an attempt is made to infer the BB from AFTER. */
4022 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4031 switch (GET_CODE (x
))
4039 last
= emit_insn_after_1 (x
, after
, bb
);
4042 #ifdef ENABLE_RTL_CHECKING
4049 last
= make_insn_raw (x
);
4050 add_insn_after (last
, after
, bb
);
4058 /* Make an insn of code JUMP_INSN with body X
4059 and output it after the insn AFTER. */
4062 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4068 switch (GET_CODE (x
))
4076 last
= emit_insn_after_1 (x
, after
, NULL
);
4079 #ifdef ENABLE_RTL_CHECKING
4086 last
= make_jump_insn_raw (x
);
4087 add_insn_after (last
, after
, NULL
);
4094 /* Make an instruction with body X and code CALL_INSN
4095 and output it after the instruction AFTER. */
4098 emit_call_insn_after_noloc (rtx x
, rtx after
)
4104 switch (GET_CODE (x
))
4112 last
= emit_insn_after_1 (x
, after
, NULL
);
4115 #ifdef ENABLE_RTL_CHECKING
4122 last
= make_call_insn_raw (x
);
4123 add_insn_after (last
, after
, NULL
);
4130 /* Make an insn of code BARRIER
4131 and output it after the insn AFTER. */
4134 emit_barrier_after (rtx after
)
4136 rtx insn
= rtx_alloc (BARRIER
);
4138 INSN_UID (insn
) = cur_insn_uid
++;
4140 add_insn_after (insn
, after
, NULL
);
4144 /* Emit the label LABEL after the insn AFTER. */
4147 emit_label_after (rtx label
, rtx after
)
4149 /* This can be called twice for the same label
4150 as a result of the confusion that follows a syntax error!
4151 So make it harmless. */
4152 if (INSN_UID (label
) == 0)
4154 INSN_UID (label
) = cur_insn_uid
++;
4155 add_insn_after (label
, after
, NULL
);
4161 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4164 emit_note_after (enum insn_note subtype
, rtx after
)
4166 rtx note
= rtx_alloc (NOTE
);
4167 INSN_UID (note
) = cur_insn_uid
++;
4168 NOTE_KIND (note
) = subtype
;
4169 BLOCK_FOR_INSN (note
) = NULL
;
4170 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4171 add_insn_after (note
, after
, NULL
);
4175 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4177 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4179 rtx last
= emit_insn_after_noloc (pattern
, after
, NULL
);
4181 if (pattern
== NULL_RTX
|| !loc
)
4184 after
= NEXT_INSN (after
);
4187 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4188 INSN_LOCATOR (after
) = loc
;
4191 after
= NEXT_INSN (after
);
4196 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4198 emit_insn_after (rtx pattern
, rtx after
)
4201 return emit_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4203 return emit_insn_after_noloc (pattern
, after
, NULL
);
4206 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4208 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4210 rtx last
= emit_jump_insn_after_noloc (pattern
, after
);
4212 if (pattern
== NULL_RTX
|| !loc
)
4215 after
= NEXT_INSN (after
);
4218 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4219 INSN_LOCATOR (after
) = loc
;
4222 after
= NEXT_INSN (after
);
4227 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4229 emit_jump_insn_after (rtx pattern
, rtx after
)
4232 return emit_jump_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4234 return emit_jump_insn_after_noloc (pattern
, after
);
4237 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4239 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4241 rtx last
= emit_call_insn_after_noloc (pattern
, after
);
4243 if (pattern
== NULL_RTX
|| !loc
)
4246 after
= NEXT_INSN (after
);
4249 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4250 INSN_LOCATOR (after
) = loc
;
4253 after
= NEXT_INSN (after
);
4258 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4260 emit_call_insn_after (rtx pattern
, rtx after
)
4263 return emit_call_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4265 return emit_call_insn_after_noloc (pattern
, after
);
4268 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4270 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4272 rtx first
= PREV_INSN (before
);
4273 rtx last
= emit_insn_before_noloc (pattern
, before
, NULL
);
4275 if (pattern
== NULL_RTX
|| !loc
)
4279 first
= get_insns ();
4281 first
= NEXT_INSN (first
);
4284 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4285 INSN_LOCATOR (first
) = loc
;
4288 first
= NEXT_INSN (first
);
4293 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4295 emit_insn_before (rtx pattern
, rtx before
)
4297 if (INSN_P (before
))
4298 return emit_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4300 return emit_insn_before_noloc (pattern
, before
, NULL
);
4303 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4305 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4307 rtx first
= PREV_INSN (before
);
4308 rtx last
= emit_jump_insn_before_noloc (pattern
, before
);
4310 if (pattern
== NULL_RTX
)
4313 first
= NEXT_INSN (first
);
4316 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4317 INSN_LOCATOR (first
) = loc
;
4320 first
= NEXT_INSN (first
);
4325 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4327 emit_jump_insn_before (rtx pattern
, rtx before
)
4329 if (INSN_P (before
))
4330 return emit_jump_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4332 return emit_jump_insn_before_noloc (pattern
, before
);
4335 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4337 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4339 rtx first
= PREV_INSN (before
);
4340 rtx last
= emit_call_insn_before_noloc (pattern
, before
);
4342 if (pattern
== NULL_RTX
)
4345 first
= NEXT_INSN (first
);
4348 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4349 INSN_LOCATOR (first
) = loc
;
4352 first
= NEXT_INSN (first
);
4357 /* like emit_call_insn_before_noloc,
4358 but set insn_locator according to before. */
4360 emit_call_insn_before (rtx pattern
, rtx before
)
4362 if (INSN_P (before
))
4363 return emit_call_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4365 return emit_call_insn_before_noloc (pattern
, before
);
4368 /* Take X and emit it at the end of the doubly-linked
4371 Returns the last insn emitted. */
4376 rtx last
= last_insn
;
4382 switch (GET_CODE (x
))
4393 rtx next
= NEXT_INSN (insn
);
4400 #ifdef ENABLE_RTL_CHECKING
4407 last
= make_insn_raw (x
);
4415 /* Make an insn of code JUMP_INSN with pattern X
4416 and add it to the end of the doubly-linked list. */
4419 emit_jump_insn (rtx x
)
4421 rtx last
= NULL_RTX
, insn
;
4423 switch (GET_CODE (x
))
4434 rtx next
= NEXT_INSN (insn
);
4441 #ifdef ENABLE_RTL_CHECKING
4448 last
= make_jump_insn_raw (x
);
4456 /* Make an insn of code CALL_INSN with pattern X
4457 and add it to the end of the doubly-linked list. */
4460 emit_call_insn (rtx x
)
4464 switch (GET_CODE (x
))
4472 insn
= emit_insn (x
);
4475 #ifdef ENABLE_RTL_CHECKING
4482 insn
= make_call_insn_raw (x
);
4490 /* Add the label LABEL to the end of the doubly-linked list. */
4493 emit_label (rtx label
)
4495 /* This can be called twice for the same label
4496 as a result of the confusion that follows a syntax error!
4497 So make it harmless. */
4498 if (INSN_UID (label
) == 0)
4500 INSN_UID (label
) = cur_insn_uid
++;
4506 /* Make an insn of code BARRIER
4507 and add it to the end of the doubly-linked list. */
4512 rtx barrier
= rtx_alloc (BARRIER
);
4513 INSN_UID (barrier
) = cur_insn_uid
++;
4518 /* Emit a copy of note ORIG. */
4521 emit_note_copy (rtx orig
)
4525 note
= rtx_alloc (NOTE
);
4527 INSN_UID (note
) = cur_insn_uid
++;
4528 NOTE_DATA (note
) = NOTE_DATA (orig
);
4529 NOTE_KIND (note
) = NOTE_KIND (orig
);
4530 BLOCK_FOR_INSN (note
) = NULL
;
4536 /* Make an insn of code NOTE or type NOTE_NO
4537 and add it to the end of the doubly-linked list. */
4540 emit_note (enum insn_note kind
)
4544 note
= rtx_alloc (NOTE
);
4545 INSN_UID (note
) = cur_insn_uid
++;
4546 NOTE_KIND (note
) = kind
;
4547 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4548 BLOCK_FOR_INSN (note
) = NULL
;
4553 /* Cause next statement to emit a line note even if the line number
4557 force_next_line_note (void)
4562 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4563 note of this type already exists, remove it first. */
4566 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4568 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4569 rtx new_note
= NULL
;
4575 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4576 has multiple sets (some callers assume single_set
4577 means the insn only has one set, when in fact it
4578 means the insn only has one * useful * set). */
4579 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4585 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4586 It serves no useful purpose and breaks eliminate_regs. */
4587 if (GET_CODE (datum
) == ASM_OPERANDS
)
4592 XEXP (note
, 0) = datum
;
4593 df_notes_rescan (insn
);
4601 XEXP (note
, 0) = datum
;
4607 new_note
= gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4608 REG_NOTES (insn
) = new_note
;
4614 df_notes_rescan (insn
);
4620 return REG_NOTES (insn
);
4623 /* Return an indication of which type of insn should have X as a body.
4624 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4626 static enum rtx_code
4627 classify_insn (rtx x
)
4631 if (GET_CODE (x
) == CALL
)
4633 if (GET_CODE (x
) == RETURN
)
4635 if (GET_CODE (x
) == SET
)
4637 if (SET_DEST (x
) == pc_rtx
)
4639 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4644 if (GET_CODE (x
) == PARALLEL
)
4647 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4648 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4650 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4651 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4653 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4654 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4660 /* Emit the rtl pattern X as an appropriate kind of insn.
4661 If X is a label, it is simply added into the insn chain. */
4666 enum rtx_code code
= classify_insn (x
);
4671 return emit_label (x
);
4673 return emit_insn (x
);
4676 rtx insn
= emit_jump_insn (x
);
4677 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4678 return emit_barrier ();
4682 return emit_call_insn (x
);
4688 /* Space for free sequence stack entries. */
4689 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
4691 /* Begin emitting insns to a sequence. If this sequence will contain
4692 something that might cause the compiler to pop arguments to function
4693 calls (because those pops have previously been deferred; see
4694 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4695 before calling this function. That will ensure that the deferred
4696 pops are not accidentally emitted in the middle of this sequence. */
4699 start_sequence (void)
4701 struct sequence_stack
*tem
;
4703 if (free_sequence_stack
!= NULL
)
4705 tem
= free_sequence_stack
;
4706 free_sequence_stack
= tem
->next
;
4709 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4711 tem
->next
= seq_stack
;
4712 tem
->first
= first_insn
;
4713 tem
->last
= last_insn
;
4721 /* Set up the insn chain starting with FIRST as the current sequence,
4722 saving the previously current one. See the documentation for
4723 start_sequence for more information about how to use this function. */
4726 push_to_sequence (rtx first
)
4732 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4738 /* Like push_to_sequence, but take the last insn as an argument to avoid
4739 looping through the list. */
4742 push_to_sequence2 (rtx first
, rtx last
)
4750 /* Set up the outer-level insn chain
4751 as the current sequence, saving the previously current one. */
4754 push_topmost_sequence (void)
4756 struct sequence_stack
*stack
, *top
= NULL
;
4760 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4763 first_insn
= top
->first
;
4764 last_insn
= top
->last
;
4767 /* After emitting to the outer-level insn chain, update the outer-level
4768 insn chain, and restore the previous saved state. */
4771 pop_topmost_sequence (void)
4773 struct sequence_stack
*stack
, *top
= NULL
;
4775 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4778 top
->first
= first_insn
;
4779 top
->last
= last_insn
;
4784 /* After emitting to a sequence, restore previous saved state.
4786 To get the contents of the sequence just made, you must call
4787 `get_insns' *before* calling here.
4789 If the compiler might have deferred popping arguments while
4790 generating this sequence, and this sequence will not be immediately
4791 inserted into the instruction stream, use do_pending_stack_adjust
4792 before calling get_insns. That will ensure that the deferred
4793 pops are inserted into this sequence, and not into some random
4794 location in the instruction stream. See INHIBIT_DEFER_POP for more
4795 information about deferred popping of arguments. */
4800 struct sequence_stack
*tem
= seq_stack
;
4802 first_insn
= tem
->first
;
4803 last_insn
= tem
->last
;
4804 seq_stack
= tem
->next
;
4806 memset (tem
, 0, sizeof (*tem
));
4807 tem
->next
= free_sequence_stack
;
4808 free_sequence_stack
= tem
;
4811 /* Return 1 if currently emitting into a sequence. */
4814 in_sequence_p (void)
4816 return seq_stack
!= 0;
4819 /* Put the various virtual registers into REGNO_REG_RTX. */
4822 init_virtual_regs (void)
4824 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4825 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4826 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4827 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4828 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4832 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4833 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4834 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4835 static int copy_insn_n_scratches
;
4837 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4838 copied an ASM_OPERANDS.
4839 In that case, it is the original input-operand vector. */
4840 static rtvec orig_asm_operands_vector
;
4842 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4843 copied an ASM_OPERANDS.
4844 In that case, it is the copied input-operand vector. */
4845 static rtvec copy_asm_operands_vector
;
4847 /* Likewise for the constraints vector. */
4848 static rtvec orig_asm_constraints_vector
;
4849 static rtvec copy_asm_constraints_vector
;
4851 /* Recursively create a new copy of an rtx for copy_insn.
4852 This function differs from copy_rtx in that it handles SCRATCHes and
4853 ASM_OPERANDs properly.
4854 Normally, this function is not used directly; use copy_insn as front end.
4855 However, you could first copy an insn pattern with copy_insn and then use
4856 this function afterwards to properly copy any REG_NOTEs containing
4860 copy_insn_1 (rtx orig
)
4865 const char *format_ptr
;
4867 code
= GET_CODE (orig
);
4882 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
4887 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4888 if (copy_insn_scratch_in
[i
] == orig
)
4889 return copy_insn_scratch_out
[i
];
4893 if (shared_const_p (orig
))
4897 /* A MEM with a constant address is not sharable. The problem is that
4898 the constant address may need to be reloaded. If the mem is shared,
4899 then reloading one copy of this mem will cause all copies to appear
4900 to have been reloaded. */
4906 /* Copy the various flags, fields, and other information. We assume
4907 that all fields need copying, and then clear the fields that should
4908 not be copied. That is the sensible default behavior, and forces
4909 us to explicitly document why we are *not* copying a flag. */
4910 copy
= shallow_copy_rtx (orig
);
4912 /* We do not copy the USED flag, which is used as a mark bit during
4913 walks over the RTL. */
4914 RTX_FLAG (copy
, used
) = 0;
4916 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4919 RTX_FLAG (copy
, jump
) = 0;
4920 RTX_FLAG (copy
, call
) = 0;
4921 RTX_FLAG (copy
, frame_related
) = 0;
4924 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
4926 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
4927 switch (*format_ptr
++)
4930 if (XEXP (orig
, i
) != NULL
)
4931 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
4936 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
4937 XVEC (copy
, i
) = copy_asm_constraints_vector
;
4938 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
4939 XVEC (copy
, i
) = copy_asm_operands_vector
;
4940 else if (XVEC (orig
, i
) != NULL
)
4942 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
4943 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
4944 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
4955 /* These are left unchanged. */
4962 if (code
== SCRATCH
)
4964 i
= copy_insn_n_scratches
++;
4965 gcc_assert (i
< MAX_RECOG_OPERANDS
);
4966 copy_insn_scratch_in
[i
] = orig
;
4967 copy_insn_scratch_out
[i
] = copy
;
4969 else if (code
== ASM_OPERANDS
)
4971 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
4972 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
4973 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
4974 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
4980 /* Create a new copy of an rtx.
4981 This function differs from copy_rtx in that it handles SCRATCHes and
4982 ASM_OPERANDs properly.
4983 INSN doesn't really have to be a full INSN; it could be just the
4986 copy_insn (rtx insn
)
4988 copy_insn_n_scratches
= 0;
4989 orig_asm_operands_vector
= 0;
4990 orig_asm_constraints_vector
= 0;
4991 copy_asm_operands_vector
= 0;
4992 copy_asm_constraints_vector
= 0;
4993 return copy_insn_1 (insn
);
4996 /* Initialize data structures and variables in this file
4997 before generating rtl for each function. */
5005 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5006 last_location
= UNKNOWN_LOCATION
;
5007 first_label_num
= label_num
;
5010 /* Init the tables that describe all the pseudo regs. */
5012 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5014 crtl
->emit
.regno_pointer_align
5015 = xcalloc (crtl
->emit
.regno_pointer_align_length
5016 * sizeof (unsigned char), 1);
5019 = ggc_alloc (crtl
->emit
.regno_pointer_align_length
* sizeof (rtx
));
5021 /* Put copies of all the hard registers into regno_reg_rtx. */
5022 memcpy (regno_reg_rtx
,
5023 static_regno_reg_rtx
,
5024 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5026 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5027 init_virtual_regs ();
5029 /* Indicate that the virtual registers and stack locations are
5031 REG_POINTER (stack_pointer_rtx
) = 1;
5032 REG_POINTER (frame_pointer_rtx
) = 1;
5033 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5034 REG_POINTER (arg_pointer_rtx
) = 1;
5036 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5037 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5038 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5039 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5040 REG_POINTER (virtual_cfa_rtx
) = 1;
5042 #ifdef STACK_BOUNDARY
5043 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5044 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5045 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5046 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5048 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5049 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5050 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5051 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5052 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5055 #ifdef INIT_EXPANDERS
5060 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5063 gen_const_vector (enum machine_mode mode
, int constant
)
5068 enum machine_mode inner
;
5070 units
= GET_MODE_NUNITS (mode
);
5071 inner
= GET_MODE_INNER (mode
);
5073 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5075 v
= rtvec_alloc (units
);
5077 /* We need to call this function after we set the scalar const_tiny_rtx
5079 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5081 for (i
= 0; i
< units
; ++i
)
5082 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5084 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5088 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5089 all elements are zero, and the one vector when all elements are one. */
5091 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5093 enum machine_mode inner
= GET_MODE_INNER (mode
);
5094 int nunits
= GET_MODE_NUNITS (mode
);
5098 /* Check to see if all of the elements have the same value. */
5099 x
= RTVEC_ELT (v
, nunits
- 1);
5100 for (i
= nunits
- 2; i
>= 0; i
--)
5101 if (RTVEC_ELT (v
, i
) != x
)
5104 /* If the values are all the same, check to see if we can use one of the
5105 standard constant vectors. */
5108 if (x
== CONST0_RTX (inner
))
5109 return CONST0_RTX (mode
);
5110 else if (x
== CONST1_RTX (inner
))
5111 return CONST1_RTX (mode
);
5114 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5117 /* Initialise global register information required by all functions. */
5120 init_emit_regs (void)
5124 /* Reset register attributes */
5125 htab_empty (reg_attrs_htab
);
5127 /* We need reg_raw_mode, so initialize the modes now. */
5128 init_reg_modes_target ();
5130 /* Assign register numbers to the globally defined register rtx. */
5131 pc_rtx
= gen_rtx_PC (VOIDmode
);
5132 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5133 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5134 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5135 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5136 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5137 virtual_incoming_args_rtx
=
5138 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5139 virtual_stack_vars_rtx
=
5140 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5141 virtual_stack_dynamic_rtx
=
5142 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5143 virtual_outgoing_args_rtx
=
5144 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5145 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5147 /* Initialize RTL for commonly used hard registers. These are
5148 copied into regno_reg_rtx as we begin to compile each function. */
5149 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5150 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5152 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5153 return_address_pointer_rtx
5154 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5157 #ifdef STATIC_CHAIN_REGNUM
5158 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5160 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5161 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5162 static_chain_incoming_rtx
5163 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5166 static_chain_incoming_rtx
= static_chain_rtx
;
5170 static_chain_rtx
= STATIC_CHAIN
;
5172 #ifdef STATIC_CHAIN_INCOMING
5173 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5175 static_chain_incoming_rtx
= static_chain_rtx
;
5179 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5180 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5182 pic_offset_table_rtx
= NULL_RTX
;
5185 /* Create some permanent unique rtl objects shared between all functions.
5186 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5189 init_emit_once (int line_numbers
)
5192 enum machine_mode mode
;
5193 enum machine_mode double_mode
;
5195 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5197 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5198 const_int_htab_eq
, NULL
);
5200 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5201 const_double_htab_eq
, NULL
);
5203 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5204 const_fixed_htab_eq
, NULL
);
5206 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5207 mem_attrs_htab_eq
, NULL
);
5208 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5209 reg_attrs_htab_eq
, NULL
);
5211 no_line_numbers
= ! line_numbers
;
5213 /* Compute the word and byte modes. */
5215 byte_mode
= VOIDmode
;
5216 word_mode
= VOIDmode
;
5217 double_mode
= VOIDmode
;
5219 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5221 mode
= GET_MODE_WIDER_MODE (mode
))
5223 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5224 && byte_mode
== VOIDmode
)
5227 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5228 && word_mode
== VOIDmode
)
5232 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5234 mode
= GET_MODE_WIDER_MODE (mode
))
5236 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5237 && double_mode
== VOIDmode
)
5241 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5243 #ifdef INIT_EXPANDERS
5244 /* This is to initialize {init|mark|free}_machine_status before the first
5245 call to push_function_context_to. This is needed by the Chill front
5246 end which calls push_function_context_to before the first call to
5247 init_function_start. */
5251 /* Create the unique rtx's for certain rtx codes and operand values. */
5253 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5254 tries to use these variables. */
5255 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5256 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5257 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5259 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5260 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5261 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5263 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5265 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5266 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5267 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5272 dconsthalf
= dconst1
;
5273 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5275 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5277 const REAL_VALUE_TYPE
*const r
=
5278 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5280 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5282 mode
= GET_MODE_WIDER_MODE (mode
))
5283 const_tiny_rtx
[i
][(int) mode
] =
5284 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5286 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5288 mode
= GET_MODE_WIDER_MODE (mode
))
5289 const_tiny_rtx
[i
][(int) mode
] =
5290 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5292 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5294 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5296 mode
= GET_MODE_WIDER_MODE (mode
))
5297 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5299 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5301 mode
= GET_MODE_WIDER_MODE (mode
))
5302 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5305 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5307 mode
= GET_MODE_WIDER_MODE (mode
))
5309 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5310 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5313 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5315 mode
= GET_MODE_WIDER_MODE (mode
))
5317 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5318 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5321 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5323 mode
= GET_MODE_WIDER_MODE (mode
))
5325 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5326 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5329 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5331 mode
= GET_MODE_WIDER_MODE (mode
))
5333 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5334 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5337 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5339 mode
= GET_MODE_WIDER_MODE (mode
))
5341 FCONST0(mode
).data
.high
= 0;
5342 FCONST0(mode
).data
.low
= 0;
5343 FCONST0(mode
).mode
= mode
;
5344 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5345 FCONST0 (mode
), mode
);
5348 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5350 mode
= GET_MODE_WIDER_MODE (mode
))
5352 FCONST0(mode
).data
.high
= 0;
5353 FCONST0(mode
).data
.low
= 0;
5354 FCONST0(mode
).mode
= mode
;
5355 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5356 FCONST0 (mode
), mode
);
5359 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5361 mode
= GET_MODE_WIDER_MODE (mode
))
5363 FCONST0(mode
).data
.high
= 0;
5364 FCONST0(mode
).data
.low
= 0;
5365 FCONST0(mode
).mode
= mode
;
5366 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5367 FCONST0 (mode
), mode
);
5369 /* We store the value 1. */
5370 FCONST1(mode
).data
.high
= 0;
5371 FCONST1(mode
).data
.low
= 0;
5372 FCONST1(mode
).mode
= mode
;
5373 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5374 2 * HOST_BITS_PER_WIDE_INT
,
5375 &FCONST1(mode
).data
.low
,
5376 &FCONST1(mode
).data
.high
,
5377 SIGNED_FIXED_POINT_MODE_P (mode
));
5378 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5379 FCONST1 (mode
), mode
);
5382 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5384 mode
= GET_MODE_WIDER_MODE (mode
))
5386 FCONST0(mode
).data
.high
= 0;
5387 FCONST0(mode
).data
.low
= 0;
5388 FCONST0(mode
).mode
= mode
;
5389 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5390 FCONST0 (mode
), mode
);
5392 /* We store the value 1. */
5393 FCONST1(mode
).data
.high
= 0;
5394 FCONST1(mode
).data
.low
= 0;
5395 FCONST1(mode
).mode
= mode
;
5396 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5397 2 * HOST_BITS_PER_WIDE_INT
,
5398 &FCONST1(mode
).data
.low
,
5399 &FCONST1(mode
).data
.high
,
5400 SIGNED_FIXED_POINT_MODE_P (mode
));
5401 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5402 FCONST1 (mode
), mode
);
5405 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5407 mode
= GET_MODE_WIDER_MODE (mode
))
5409 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5412 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5414 mode
= GET_MODE_WIDER_MODE (mode
))
5416 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5419 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5421 mode
= GET_MODE_WIDER_MODE (mode
))
5423 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5424 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5427 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5429 mode
= GET_MODE_WIDER_MODE (mode
))
5431 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5432 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5435 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5436 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5437 const_tiny_rtx
[0][i
] = const0_rtx
;
5439 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5440 if (STORE_FLAG_VALUE
== 1)
5441 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5444 /* Produce exact duplicate of insn INSN after AFTER.
5445 Care updating of libcall regions if present. */
5448 emit_copy_of_insn_after (rtx insn
, rtx after
)
5451 rtx note1
, note2
, link
;
5453 switch (GET_CODE (insn
))
5456 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5460 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5464 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5465 if (CALL_INSN_FUNCTION_USAGE (insn
))
5466 CALL_INSN_FUNCTION_USAGE (new)
5467 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5468 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5469 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5476 /* Update LABEL_NUSES. */
5477 mark_jump_label (PATTERN (new), new, 0);
5479 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5481 /* If the old insn is frame related, then so is the new one. This is
5482 primarily needed for IA-64 unwind info which marks epilogue insns,
5483 which may be duplicated by the basic block reordering code. */
5484 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn
);
5486 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5487 will make them. REG_LABEL_TARGETs are created there too, but are
5488 supposed to be sticky, so we copy them. */
5489 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5490 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5492 if (GET_CODE (link
) == EXPR_LIST
)
5494 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5495 copy_insn_1 (XEXP (link
, 0)), REG_NOTES (new));
5498 = gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5499 XEXP (link
, 0), REG_NOTES (new));
5502 /* Fix the libcall sequences. */
5503 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5506 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5508 XEXP (note1
, 0) = p
;
5509 XEXP (note2
, 0) = new;
5511 INSN_CODE (new) = INSN_CODE (insn
);
5515 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5517 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5519 if (hard_reg_clobbers
[mode
][regno
])
5520 return hard_reg_clobbers
[mode
][regno
];
5522 return (hard_reg_clobbers
[mode
][regno
] =
5523 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5526 #include "gt-emit-rtl.h"