* testsuite/libgomp.fortran/vla7.f90: Add -w to options.
[official-gcc.git] / gcc / global.c
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1 /* Allocate registers for pseudo-registers that span basic blocks.
2 Copyright (C) 1987, 1988, 1991, 1994, 1996, 1997, 1998,
3 1999, 2000, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "machmode.h"
28 #include "hard-reg-set.h"
29 #include "rtl.h"
30 #include "tm_p.h"
31 #include "flags.h"
32 #include "regs.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "reload.h"
37 #include "output.h"
38 #include "toplev.h"
39 #include "tree-pass.h"
40 #include "timevar.h"
42 /* This pass of the compiler performs global register allocation.
43 It assigns hard register numbers to all the pseudo registers
44 that were not handled in local_alloc. Assignments are recorded
45 in the vector reg_renumber, not by changing the rtl code.
46 (Such changes are made by final). The entry point is
47 the function global_alloc.
49 After allocation is complete, the reload pass is run as a subroutine
50 of this pass, so that when a pseudo reg loses its hard reg due to
51 spilling it is possible to make a second attempt to find a hard
52 reg for it. The reload pass is independent in other respects
53 and it is run even when stupid register allocation is in use.
55 1. Assign allocation-numbers (allocnos) to the pseudo-registers
56 still needing allocations and to the pseudo-registers currently
57 allocated by local-alloc which may be spilled by reload.
58 Set up tables reg_allocno and allocno_reg to map
59 reg numbers to allocnos and vice versa.
60 max_allocno gets the number of allocnos in use.
62 2. Allocate a max_allocno by max_allocno conflict bit matrix and clear it.
63 Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix
64 for conflicts between allocnos and explicit hard register use
65 (which includes use of pseudo-registers allocated by local_alloc).
67 3. For each basic block
68 walk forward through the block, recording which
69 pseudo-registers and which hardware registers are live.
70 Build the conflict matrix between the pseudo-registers
71 and another of pseudo-registers versus hardware registers.
72 Also record the preferred hardware registers
73 for each pseudo-register.
75 4. Sort a table of the allocnos into order of
76 desirability of the variables.
78 5. Allocate the variables in that order; each if possible into
79 a preferred register, else into another register. */
81 /* Number of pseudo-registers which are candidates for allocation. */
83 static int max_allocno;
85 /* Indexed by (pseudo) reg number, gives the allocno, or -1
86 for pseudo registers which are not to be allocated. */
88 static int *reg_allocno;
90 struct allocno
92 int reg;
93 /* Gives the number of consecutive hard registers needed by that
94 pseudo reg. */
95 int size;
97 /* Number of calls crossed by each allocno. */
98 int calls_crossed;
100 /* Number of calls that might throw crossed by each allocno. */
101 int throwing_calls_crossed;
103 /* Number of refs to each allocno. */
104 int n_refs;
106 /* Frequency of uses of each allocno. */
107 int freq;
109 /* Guess at live length of each allocno.
110 This is actually the max of the live lengths of the regs. */
111 int live_length;
113 /* Set of hard regs conflicting with allocno N. */
115 HARD_REG_SET hard_reg_conflicts;
117 /* Set of hard regs preferred by allocno N.
118 This is used to make allocnos go into regs that are copied to or from them,
119 when possible, to reduce register shuffling. */
121 HARD_REG_SET hard_reg_preferences;
123 /* Similar, but just counts register preferences made in simple copy
124 operations, rather than arithmetic. These are given priority because
125 we can always eliminate an insn by using these, but using a register
126 in the above list won't always eliminate an insn. */
128 HARD_REG_SET hard_reg_copy_preferences;
130 /* Similar to hard_reg_preferences, but includes bits for subsequent
131 registers when an allocno is multi-word. The above variable is used for
132 allocation while this is used to build reg_someone_prefers, below. */
134 HARD_REG_SET hard_reg_full_preferences;
136 /* Set of hard registers that some later allocno has a preference for. */
138 HARD_REG_SET regs_someone_prefers;
140 #ifdef STACK_REGS
141 /* Set to true if allocno can't be allocated in the stack register. */
142 bool no_stack_reg;
143 #endif
146 static struct allocno *allocno;
148 /* A vector of the integers from 0 to max_allocno-1,
149 sorted in the order of first-to-be-allocated first. */
151 static int *allocno_order;
153 /* Indexed by (pseudo) reg number, gives the number of another
154 lower-numbered pseudo reg which can share a hard reg with this pseudo
155 *even if the two pseudos would otherwise appear to conflict*. */
157 static int *reg_may_share;
159 /* Define the number of bits in each element of `conflicts' and what
160 type that element has. We use the largest integer format on the
161 host machine. */
163 #define INT_BITS HOST_BITS_PER_WIDE_INT
164 #define INT_TYPE HOST_WIDE_INT
166 /* max_allocno by max_allocno array of bits,
167 recording whether two allocno's conflict (can't go in the same
168 hardware register).
170 `conflicts' is symmetric after the call to mirror_conflicts. */
172 static INT_TYPE *conflicts;
174 /* Number of ints required to hold max_allocno bits.
175 This is the length of a row in `conflicts'. */
177 static int allocno_row_words;
179 /* Two macros to test or store 1 in an element of `conflicts'. */
181 #define CONFLICTP(I, J) \
182 (conflicts[(I) * allocno_row_words + (unsigned) (J) / INT_BITS] \
183 & ((INT_TYPE) 1 << ((unsigned) (J) % INT_BITS)))
185 /* For any allocno set in ALLOCNO_SET, set ALLOCNO to that allocno,
186 and execute CODE. */
187 #define EXECUTE_IF_SET_IN_ALLOCNO_SET(ALLOCNO_SET, ALLOCNO, CODE) \
188 do { \
189 int i_; \
190 int allocno_; \
191 INT_TYPE *p_ = (ALLOCNO_SET); \
193 for (i_ = allocno_row_words - 1, allocno_ = 0; i_ >= 0; \
194 i_--, allocno_ += INT_BITS) \
196 unsigned INT_TYPE word_ = (unsigned INT_TYPE) *p_++; \
198 for ((ALLOCNO) = allocno_; word_; word_ >>= 1, (ALLOCNO)++) \
200 if (word_ & 1) \
201 {CODE;} \
204 } while (0)
206 /* This doesn't work for non-GNU C due to the way CODE is macro expanded. */
207 #if 0
208 /* For any allocno that conflicts with IN_ALLOCNO, set OUT_ALLOCNO to
209 the conflicting allocno, and execute CODE. This macro assumes that
210 mirror_conflicts has been run. */
211 #define EXECUTE_IF_CONFLICT(IN_ALLOCNO, OUT_ALLOCNO, CODE)\
212 EXECUTE_IF_SET_IN_ALLOCNO_SET (conflicts + (IN_ALLOCNO) * allocno_row_words,\
213 OUT_ALLOCNO, (CODE))
214 #endif
216 /* Set of hard regs currently live (during scan of all insns). */
218 static HARD_REG_SET hard_regs_live;
220 /* Set of registers that global-alloc isn't supposed to use. */
222 static HARD_REG_SET no_global_alloc_regs;
224 /* Set of registers used so far. */
226 static HARD_REG_SET regs_used_so_far;
228 /* Number of refs to each hard reg, as used by local alloc.
229 It is zero for a reg that contains global pseudos or is explicitly used. */
231 static int local_reg_n_refs[FIRST_PSEUDO_REGISTER];
233 /* Frequency of uses of given hard reg. */
234 static int local_reg_freq[FIRST_PSEUDO_REGISTER];
236 /* Guess at live length of each hard reg, as used by local alloc.
237 This is actually the sum of the live lengths of the specific regs. */
239 static int local_reg_live_length[FIRST_PSEUDO_REGISTER];
241 /* Set to 1 a bit in a vector TABLE of HARD_REG_SETs, for vector
242 element I, and hard register number J. */
244 #define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (allocno[I].TABLE, J)
246 /* Bit mask for allocnos live at current point in the scan. */
248 static INT_TYPE *allocnos_live;
250 /* Test, set or clear bit number I in allocnos_live,
251 a bit vector indexed by allocno. */
253 #define SET_ALLOCNO_LIVE(I) \
254 (allocnos_live[(unsigned) (I) / INT_BITS] \
255 |= ((INT_TYPE) 1 << ((unsigned) (I) % INT_BITS)))
257 #define CLEAR_ALLOCNO_LIVE(I) \
258 (allocnos_live[(unsigned) (I) / INT_BITS] \
259 &= ~((INT_TYPE) 1 << ((unsigned) (I) % INT_BITS)))
261 /* This is turned off because it doesn't work right for DImode.
262 (And it is only used for DImode, so the other cases are worthless.)
263 The problem is that it isn't true that there is NO possibility of conflict;
264 only that there is no conflict if the two pseudos get the exact same regs.
265 If they were allocated with a partial overlap, there would be a conflict.
266 We can't safely turn off the conflict unless we have another way to
267 prevent the partial overlap.
269 Idea: change hard_reg_conflicts so that instead of recording which
270 hard regs the allocno may not overlap, it records where the allocno
271 may not start. Change both where it is used and where it is updated.
272 Then there is a way to record that (reg:DI 108) may start at 10
273 but not at 9 or 11. There is still the question of how to record
274 this semi-conflict between two pseudos. */
275 #if 0
276 /* Reg pairs for which conflict after the current insn
277 is inhibited by a REG_NO_CONFLICT note.
278 If the table gets full, we ignore any other notes--that is conservative. */
279 #define NUM_NO_CONFLICT_PAIRS 4
280 /* Number of pairs in use in this insn. */
281 int n_no_conflict_pairs;
282 static struct { int allocno1, allocno2;}
283 no_conflict_pairs[NUM_NO_CONFLICT_PAIRS];
284 #endif /* 0 */
286 /* Record all regs that are set in any one insn.
287 Communication from mark_reg_{store,clobber} and global_conflicts. */
289 static rtx *regs_set;
290 static int n_regs_set;
292 /* All registers that can be eliminated. */
294 static HARD_REG_SET eliminable_regset;
296 static int allocno_compare (const void *, const void *);
297 static void global_conflicts (void);
298 static void mirror_conflicts (void);
299 static void expand_preferences (void);
300 static void prune_preferences (void);
301 static void find_reg (int, HARD_REG_SET, int, int, int);
302 static void record_one_conflict (int);
303 static void record_conflicts (int *, int);
304 static void mark_reg_store (rtx, rtx, void *);
305 static void mark_reg_clobber (rtx, rtx, void *);
306 static void mark_reg_conflicts (rtx);
307 static void mark_reg_death (rtx);
308 static void mark_reg_live_nc (int, enum machine_mode);
309 static void set_preference (rtx, rtx);
310 static void dump_conflicts (FILE *);
311 static void reg_becomes_live (rtx, rtx, void *);
312 static void reg_dies (int, enum machine_mode, struct insn_chain *);
314 static void allocate_bb_info (void);
315 static void free_bb_info (void);
316 static bool check_earlyclobber (rtx);
317 static void mark_reg_use_for_earlyclobber_1 (rtx *, void *);
318 static int mark_reg_use_for_earlyclobber (rtx *, void *);
319 static void calculate_local_reg_bb_info (void);
320 static void set_up_bb_rts_numbers (void);
321 static int rpost_cmp (const void *, const void *);
322 static void calculate_reg_pav (void);
323 static void modify_reg_pav (void);
324 static void make_accurate_live_analysis (void);
328 /* Perform allocation of pseudo-registers not allocated by local_alloc.
329 FILE is a file to output debugging information on,
330 or zero if such output is not desired.
332 Return value is nonzero if reload failed
333 and we must not do any more for this function. */
335 static int
336 global_alloc (FILE *file)
338 int retval;
339 #ifdef ELIMINABLE_REGS
340 static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS;
341 #endif
342 int need_fp
343 = (! flag_omit_frame_pointer
344 || (current_function_calls_alloca && EXIT_IGNORE_STACK)
345 || FRAME_POINTER_REQUIRED);
347 size_t i;
348 rtx x;
350 make_accurate_live_analysis ();
352 max_allocno = 0;
354 /* A machine may have certain hard registers that
355 are safe to use only within a basic block. */
357 CLEAR_HARD_REG_SET (no_global_alloc_regs);
359 /* Build the regset of all eliminable registers and show we can't use those
360 that we already know won't be eliminated. */
361 #ifdef ELIMINABLE_REGS
362 for (i = 0; i < ARRAY_SIZE (eliminables); i++)
364 bool cannot_elim
365 = (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to)
366 || (eliminables[i].to == STACK_POINTER_REGNUM && need_fp));
368 if (!regs_asm_clobbered[eliminables[i].from])
370 SET_HARD_REG_BIT (eliminable_regset, eliminables[i].from);
372 if (cannot_elim)
373 SET_HARD_REG_BIT (no_global_alloc_regs, eliminables[i].from);
375 else if (cannot_elim)
376 error ("%s cannot be used in asm here",
377 reg_names[eliminables[i].from]);
378 else
379 regs_ever_live[eliminables[i].from] = 1;
381 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
382 if (!regs_asm_clobbered[HARD_FRAME_POINTER_REGNUM])
384 SET_HARD_REG_BIT (eliminable_regset, HARD_FRAME_POINTER_REGNUM);
385 if (need_fp)
386 SET_HARD_REG_BIT (no_global_alloc_regs, HARD_FRAME_POINTER_REGNUM);
388 else if (need_fp)
389 error ("%s cannot be used in asm here",
390 reg_names[HARD_FRAME_POINTER_REGNUM]);
391 else
392 regs_ever_live[HARD_FRAME_POINTER_REGNUM] = 1;
393 #endif
395 #else
396 if (!regs_asm_clobbered[FRAME_POINTER_REGNUM])
398 SET_HARD_REG_BIT (eliminable_regset, FRAME_POINTER_REGNUM);
399 if (need_fp)
400 SET_HARD_REG_BIT (no_global_alloc_regs, FRAME_POINTER_REGNUM);
402 else if (need_fp)
403 error ("%s cannot be used in asm here", reg_names[FRAME_POINTER_REGNUM]);
404 else
405 regs_ever_live[FRAME_POINTER_REGNUM] = 1;
406 #endif
408 /* Track which registers have already been used. Start with registers
409 explicitly in the rtl, then registers allocated by local register
410 allocation. */
412 CLEAR_HARD_REG_SET (regs_used_so_far);
413 #ifdef LEAF_REGISTERS
414 /* If we are doing the leaf function optimization, and this is a leaf
415 function, it means that the registers that take work to save are those
416 that need a register window. So prefer the ones that can be used in
417 a leaf function. */
419 const char *cheap_regs;
420 const char *const leaf_regs = LEAF_REGISTERS;
422 if (only_leaf_regs_used () && leaf_function_p ())
423 cheap_regs = leaf_regs;
424 else
425 cheap_regs = call_used_regs;
426 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
427 if (regs_ever_live[i] || cheap_regs[i])
428 SET_HARD_REG_BIT (regs_used_so_far, i);
430 #else
431 /* We consider registers that do not have to be saved over calls as if
432 they were already used since there is no cost in using them. */
433 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
434 if (regs_ever_live[i] || call_used_regs[i])
435 SET_HARD_REG_BIT (regs_used_so_far, i);
436 #endif
438 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
439 if (reg_renumber[i] >= 0)
440 SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]);
442 /* Establish mappings from register number to allocation number
443 and vice versa. In the process, count the allocnos. */
445 reg_allocno = XNEWVEC (int, max_regno);
447 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
448 reg_allocno[i] = -1;
450 /* Initialize the shared-hard-reg mapping
451 from the list of pairs that may share. */
452 reg_may_share = XCNEWVEC (int, max_regno);
453 for (x = regs_may_share; x; x = XEXP (XEXP (x, 1), 1))
455 int r1 = REGNO (XEXP (x, 0));
456 int r2 = REGNO (XEXP (XEXP (x, 1), 0));
457 if (r1 > r2)
458 reg_may_share[r1] = r2;
459 else
460 reg_may_share[r2] = r1;
463 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
464 /* Note that reg_live_length[i] < 0 indicates a "constant" reg
465 that we are supposed to refrain from putting in a hard reg.
466 -2 means do make an allocno but don't allocate it. */
467 if (REG_N_REFS (i) != 0 && REG_LIVE_LENGTH (i) != -1
468 /* Don't allocate pseudos that cross calls,
469 if this function receives a nonlocal goto. */
470 && (! current_function_has_nonlocal_label
471 || REG_N_CALLS_CROSSED (i) == 0))
473 if (reg_renumber[i] < 0
474 && reg_may_share[i] && reg_allocno[reg_may_share[i]] >= 0)
475 reg_allocno[i] = reg_allocno[reg_may_share[i]];
476 else
477 reg_allocno[i] = max_allocno++;
478 gcc_assert (REG_LIVE_LENGTH (i));
480 else
481 reg_allocno[i] = -1;
483 allocno = XCNEWVEC (struct allocno, max_allocno);
485 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
486 if (reg_allocno[i] >= 0)
488 int num = reg_allocno[i];
489 allocno[num].reg = i;
490 allocno[num].size = PSEUDO_REGNO_SIZE (i);
491 allocno[num].calls_crossed += REG_N_CALLS_CROSSED (i);
492 allocno[num].throwing_calls_crossed
493 += REG_N_THROWING_CALLS_CROSSED (i);
494 allocno[num].n_refs += REG_N_REFS (i);
495 allocno[num].freq += REG_FREQ (i);
496 if (allocno[num].live_length < REG_LIVE_LENGTH (i))
497 allocno[num].live_length = REG_LIVE_LENGTH (i);
500 /* Calculate amount of usage of each hard reg by pseudos
501 allocated by local-alloc. This is to see if we want to
502 override it. */
503 memset (local_reg_live_length, 0, sizeof local_reg_live_length);
504 memset (local_reg_n_refs, 0, sizeof local_reg_n_refs);
505 memset (local_reg_freq, 0, sizeof local_reg_freq);
506 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
507 if (reg_renumber[i] >= 0)
509 int regno = reg_renumber[i];
510 int endregno = regno + hard_regno_nregs[regno][PSEUDO_REGNO_MODE (i)];
511 int j;
513 for (j = regno; j < endregno; j++)
515 local_reg_n_refs[j] += REG_N_REFS (i);
516 local_reg_freq[j] += REG_FREQ (i);
517 local_reg_live_length[j] += REG_LIVE_LENGTH (i);
521 /* We can't override local-alloc for a reg used not just by local-alloc. */
522 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
523 if (regs_ever_live[i])
524 local_reg_n_refs[i] = 0, local_reg_freq[i] = 0;
526 allocno_row_words = (max_allocno + INT_BITS - 1) / INT_BITS;
528 /* We used to use alloca here, but the size of what it would try to
529 allocate would occasionally cause it to exceed the stack limit and
530 cause unpredictable core dumps. Some examples were > 2Mb in size. */
531 conflicts = XCNEWVEC (INT_TYPE, max_allocno * allocno_row_words);
533 allocnos_live = XNEWVEC (INT_TYPE, allocno_row_words);
535 /* If there is work to be done (at least one reg to allocate),
536 perform global conflict analysis and allocate the regs. */
538 if (max_allocno > 0)
540 /* Scan all the insns and compute the conflicts among allocnos
541 and between allocnos and hard regs. */
543 global_conflicts ();
545 mirror_conflicts ();
547 /* Eliminate conflicts between pseudos and eliminable registers. If
548 the register is not eliminated, the pseudo won't really be able to
549 live in the eliminable register, so the conflict doesn't matter.
550 If we do eliminate the register, the conflict will no longer exist.
551 So in either case, we can ignore the conflict. Likewise for
552 preferences. */
554 for (i = 0; i < (size_t) max_allocno; i++)
556 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_conflicts,
557 eliminable_regset);
558 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_copy_preferences,
559 eliminable_regset);
560 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_preferences,
561 eliminable_regset);
564 /* Try to expand the preferences by merging them between allocnos. */
566 expand_preferences ();
568 /* Determine the order to allocate the remaining pseudo registers. */
570 allocno_order = XNEWVEC (int, max_allocno);
571 for (i = 0; i < (size_t) max_allocno; i++)
572 allocno_order[i] = i;
574 /* Default the size to 1, since allocno_compare uses it to divide by.
575 Also convert allocno_live_length of zero to -1. A length of zero
576 can occur when all the registers for that allocno have reg_live_length
577 equal to -2. In this case, we want to make an allocno, but not
578 allocate it. So avoid the divide-by-zero and set it to a low
579 priority. */
581 for (i = 0; i < (size_t) max_allocno; i++)
583 if (allocno[i].size == 0)
584 allocno[i].size = 1;
585 if (allocno[i].live_length == 0)
586 allocno[i].live_length = -1;
589 qsort (allocno_order, max_allocno, sizeof (int), allocno_compare);
591 prune_preferences ();
593 if (file)
594 dump_conflicts (file);
596 /* Try allocating them, one by one, in that order,
597 except for parameters marked with reg_live_length[regno] == -2. */
599 for (i = 0; i < (size_t) max_allocno; i++)
600 if (reg_renumber[allocno[allocno_order[i]].reg] < 0
601 && REG_LIVE_LENGTH (allocno[allocno_order[i]].reg) >= 0)
603 /* If we have more than one register class,
604 first try allocating in the class that is cheapest
605 for this pseudo-reg. If that fails, try any reg. */
606 if (N_REG_CLASSES > 1)
608 find_reg (allocno_order[i], 0, 0, 0, 0);
609 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
610 continue;
612 if (reg_alternate_class (allocno[allocno_order[i]].reg) != NO_REGS)
613 find_reg (allocno_order[i], 0, 1, 0, 0);
616 free (allocno_order);
619 /* Do the reloads now while the allocno data still exists, so that we can
620 try to assign new hard regs to any pseudo regs that are spilled. */
622 #if 0 /* We need to eliminate regs even if there is no rtl code,
623 for the sake of debugging information. */
624 if (n_basic_blocks > NUM_FIXED_BLOCKS)
625 #endif
627 build_insn_chain (get_insns ());
628 retval = reload (get_insns (), 1);
631 /* Clean up. */
632 free (reg_allocno);
633 free (reg_may_share);
634 free (allocno);
635 free (conflicts);
636 free (allocnos_live);
638 return retval;
641 /* Sort predicate for ordering the allocnos.
642 Returns -1 (1) if *v1 should be allocated before (after) *v2. */
644 static int
645 allocno_compare (const void *v1p, const void *v2p)
647 int v1 = *(const int *)v1p, v2 = *(const int *)v2p;
648 /* Note that the quotient will never be bigger than
649 the value of floor_log2 times the maximum number of
650 times a register can occur in one insn (surely less than 100)
651 weighted by the frequency (maximally REG_FREQ_MAX).
652 Multiplying this by 10000/REG_FREQ_MAX can't overflow. */
653 int pri1
654 = (((double) (floor_log2 (allocno[v1].n_refs) * allocno[v1].freq)
655 / allocno[v1].live_length)
656 * (10000 / REG_FREQ_MAX) * allocno[v1].size);
657 int pri2
658 = (((double) (floor_log2 (allocno[v2].n_refs) * allocno[v2].freq)
659 / allocno[v2].live_length)
660 * (10000 / REG_FREQ_MAX) * allocno[v2].size);
661 if (pri2 - pri1)
662 return pri2 - pri1;
664 /* If regs are equally good, sort by allocno,
665 so that the results of qsort leave nothing to chance. */
666 return v1 - v2;
669 /* Scan the rtl code and record all conflicts and register preferences in the
670 conflict matrices and preference tables. */
672 static void
673 global_conflicts (void)
675 unsigned i;
676 basic_block b;
677 rtx insn;
678 int *block_start_allocnos;
680 /* Make a vector that mark_reg_{store,clobber} will store in. */
681 regs_set = XNEWVEC (rtx, max_parallel * 2);
683 block_start_allocnos = XNEWVEC (int, max_allocno);
685 FOR_EACH_BB (b)
687 memset (allocnos_live, 0, allocno_row_words * sizeof (INT_TYPE));
689 /* Initialize table of registers currently live
690 to the state at the beginning of this basic block.
691 This also marks the conflicts among hard registers
692 and any allocnos that are live.
694 For pseudo-regs, there is only one bit for each one
695 no matter how many hard regs it occupies.
696 This is ok; we know the size from PSEUDO_REGNO_SIZE.
697 For explicit hard regs, we cannot know the size that way
698 since one hard reg can be used with various sizes.
699 Therefore, we must require that all the hard regs
700 implicitly live as part of a multi-word hard reg
701 be explicitly marked in basic_block_live_at_start. */
704 regset old = b->il.rtl->global_live_at_start;
705 int ax = 0;
706 reg_set_iterator rsi;
708 REG_SET_TO_HARD_REG_SET (hard_regs_live, old);
709 EXECUTE_IF_SET_IN_REG_SET (old, FIRST_PSEUDO_REGISTER, i, rsi)
711 int a = reg_allocno[i];
712 if (a >= 0)
714 SET_ALLOCNO_LIVE (a);
715 block_start_allocnos[ax++] = a;
717 else if ((a = reg_renumber[i]) >= 0)
718 mark_reg_live_nc (a, PSEUDO_REGNO_MODE (i));
721 /* Record that each allocno now live conflicts with each hard reg
722 now live.
724 It is not necessary to mark any conflicts between pseudos at
725 this point, even for pseudos which are live at the start of
726 the basic block.
728 Given two pseudos X and Y and any point in the CFG P.
730 On any path to point P where X and Y are live one of the
731 following conditions must be true:
733 1. X is live at some instruction on the path that
734 evaluates Y.
736 2. Y is live at some instruction on the path that
737 evaluates X.
739 3. Either X or Y is not evaluated on the path to P
740 (i.e. it is used uninitialized) and thus the
741 conflict can be ignored.
743 In cases #1 and #2 the conflict will be recorded when we
744 scan the instruction that makes either X or Y become live. */
745 record_conflicts (block_start_allocnos, ax);
747 /* Pseudos can't go in stack regs at the start of a basic block that
748 is reached by an abnormal edge. Likewise for call clobbered regs,
749 because caller-save, fixup_abnormal_edges and possibly the table
750 driven EH machinery are not quite ready to handle such regs live
751 across such edges. */
753 edge e;
754 edge_iterator ei;
756 FOR_EACH_EDGE (e, ei, b->preds)
757 if (e->flags & EDGE_ABNORMAL)
758 break;
760 if (e != NULL)
762 #ifdef STACK_REGS
763 EXECUTE_IF_SET_IN_ALLOCNO_SET (allocnos_live, ax,
765 allocno[ax].no_stack_reg = 1;
767 for (ax = FIRST_STACK_REG; ax <= LAST_STACK_REG; ax++)
768 record_one_conflict (ax);
769 #endif
771 /* No need to record conflicts for call clobbered regs if we have
772 nonlocal labels around, as we don't ever try to allocate such
773 regs in this case. */
774 if (! current_function_has_nonlocal_label)
775 for (ax = 0; ax < FIRST_PSEUDO_REGISTER; ax++)
776 if (call_used_regs [ax])
777 record_one_conflict (ax);
782 insn = BB_HEAD (b);
784 /* Scan the code of this basic block, noting which allocnos
785 and hard regs are born or die. When one is born,
786 record a conflict with all others currently live. */
788 while (1)
790 RTX_CODE code = GET_CODE (insn);
791 rtx link;
793 /* Make regs_set an empty set. */
795 n_regs_set = 0;
797 if (code == INSN || code == CALL_INSN || code == JUMP_INSN)
800 #if 0
801 int i = 0;
802 for (link = REG_NOTES (insn);
803 link && i < NUM_NO_CONFLICT_PAIRS;
804 link = XEXP (link, 1))
805 if (REG_NOTE_KIND (link) == REG_NO_CONFLICT)
807 no_conflict_pairs[i].allocno1
808 = reg_allocno[REGNO (SET_DEST (PATTERN (insn)))];
809 no_conflict_pairs[i].allocno2
810 = reg_allocno[REGNO (XEXP (link, 0))];
811 i++;
813 #endif /* 0 */
815 /* Mark any registers clobbered by INSN as live,
816 so they conflict with the inputs. */
818 note_stores (PATTERN (insn), mark_reg_clobber, NULL);
820 /* Mark any registers dead after INSN as dead now. */
822 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
823 if (REG_NOTE_KIND (link) == REG_DEAD)
824 mark_reg_death (XEXP (link, 0));
826 /* Mark any registers set in INSN as live,
827 and mark them as conflicting with all other live regs.
828 Clobbers are processed again, so they conflict with
829 the registers that are set. */
831 note_stores (PATTERN (insn), mark_reg_store, NULL);
833 #ifdef AUTO_INC_DEC
834 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
835 if (REG_NOTE_KIND (link) == REG_INC)
836 mark_reg_store (XEXP (link, 0), NULL_RTX, NULL);
837 #endif
839 /* If INSN has multiple outputs, then any reg that dies here
840 and is used inside of an output
841 must conflict with the other outputs.
843 It is unsafe to use !single_set here since it will ignore an
844 unused output. Just because an output is unused does not mean
845 the compiler can assume the side effect will not occur.
846 Consider if REG appears in the address of an output and we
847 reload the output. If we allocate REG to the same hard
848 register as an unused output we could set the hard register
849 before the output reload insn. */
850 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
851 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
852 if (REG_NOTE_KIND (link) == REG_DEAD)
854 int used_in_output = 0;
855 int i;
856 rtx reg = XEXP (link, 0);
858 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
860 rtx set = XVECEXP (PATTERN (insn), 0, i);
861 if (GET_CODE (set) == SET
862 && !REG_P (SET_DEST (set))
863 && !rtx_equal_p (reg, SET_DEST (set))
864 && reg_overlap_mentioned_p (reg, SET_DEST (set)))
865 used_in_output = 1;
867 if (used_in_output)
868 mark_reg_conflicts (reg);
871 /* Mark any registers set in INSN and then never used. */
873 while (n_regs_set-- > 0)
875 rtx note = find_regno_note (insn, REG_UNUSED,
876 REGNO (regs_set[n_regs_set]));
877 if (note)
878 mark_reg_death (XEXP (note, 0));
882 if (insn == BB_END (b))
883 break;
884 insn = NEXT_INSN (insn);
888 /* Clean up. */
889 free (block_start_allocnos);
890 free (regs_set);
892 /* Expand the preference information by looking for cases where one allocno
893 dies in an insn that sets an allocno. If those two allocnos don't conflict,
894 merge any preferences between those allocnos. */
896 static void
897 expand_preferences (void)
899 rtx insn;
900 rtx link;
901 rtx set;
903 /* We only try to handle the most common cases here. Most of the cases
904 where this wins are reg-reg copies. */
906 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
907 if (INSN_P (insn)
908 && (set = single_set (insn)) != 0
909 && REG_P (SET_DEST (set))
910 && reg_allocno[REGNO (SET_DEST (set))] >= 0)
911 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
912 if (REG_NOTE_KIND (link) == REG_DEAD
913 && REG_P (XEXP (link, 0))
914 && reg_allocno[REGNO (XEXP (link, 0))] >= 0
915 && ! CONFLICTP (reg_allocno[REGNO (SET_DEST (set))],
916 reg_allocno[REGNO (XEXP (link, 0))]))
918 int a1 = reg_allocno[REGNO (SET_DEST (set))];
919 int a2 = reg_allocno[REGNO (XEXP (link, 0))];
921 if (XEXP (link, 0) == SET_SRC (set))
923 IOR_HARD_REG_SET (allocno[a1].hard_reg_copy_preferences,
924 allocno[a2].hard_reg_copy_preferences);
925 IOR_HARD_REG_SET (allocno[a2].hard_reg_copy_preferences,
926 allocno[a1].hard_reg_copy_preferences);
929 IOR_HARD_REG_SET (allocno[a1].hard_reg_preferences,
930 allocno[a2].hard_reg_preferences);
931 IOR_HARD_REG_SET (allocno[a2].hard_reg_preferences,
932 allocno[a1].hard_reg_preferences);
933 IOR_HARD_REG_SET (allocno[a1].hard_reg_full_preferences,
934 allocno[a2].hard_reg_full_preferences);
935 IOR_HARD_REG_SET (allocno[a2].hard_reg_full_preferences,
936 allocno[a1].hard_reg_full_preferences);
940 /* Prune the preferences for global registers to exclude registers that cannot
941 be used.
943 Compute `regs_someone_prefers', which is a bitmask of the hard registers
944 that are preferred by conflicting registers of lower priority. If possible,
945 we will avoid using these registers. */
947 static void
948 prune_preferences (void)
950 int i;
951 int num;
952 int *allocno_to_order = XNEWVEC (int, max_allocno);
954 /* Scan least most important to most important.
955 For each allocno, remove from preferences registers that cannot be used,
956 either because of conflicts or register type. Then compute all registers
957 preferred by each lower-priority register that conflicts. */
959 for (i = max_allocno - 1; i >= 0; i--)
961 HARD_REG_SET temp;
963 num = allocno_order[i];
964 allocno_to_order[num] = i;
965 COPY_HARD_REG_SET (temp, allocno[num].hard_reg_conflicts);
967 if (allocno[num].calls_crossed == 0)
968 IOR_HARD_REG_SET (temp, fixed_reg_set);
969 else
970 IOR_HARD_REG_SET (temp, call_used_reg_set);
972 IOR_COMPL_HARD_REG_SET
973 (temp,
974 reg_class_contents[(int) reg_preferred_class (allocno[num].reg)]);
976 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, temp);
977 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, temp);
978 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_full_preferences, temp);
981 for (i = max_allocno - 1; i >= 0; i--)
983 /* Merge in the preferences of lower-priority registers (they have
984 already been pruned). If we also prefer some of those registers,
985 don't exclude them unless we are of a smaller size (in which case
986 we want to give the lower-priority allocno the first chance for
987 these registers). */
988 HARD_REG_SET temp, temp2;
989 int allocno2;
991 num = allocno_order[i];
993 CLEAR_HARD_REG_SET (temp);
994 CLEAR_HARD_REG_SET (temp2);
996 EXECUTE_IF_SET_IN_ALLOCNO_SET (conflicts + num * allocno_row_words,
997 allocno2,
999 if (allocno_to_order[allocno2] > i)
1001 if (allocno[allocno2].size <= allocno[num].size)
1002 IOR_HARD_REG_SET (temp,
1003 allocno[allocno2].hard_reg_full_preferences);
1004 else
1005 IOR_HARD_REG_SET (temp2,
1006 allocno[allocno2].hard_reg_full_preferences);
1010 AND_COMPL_HARD_REG_SET (temp, allocno[num].hard_reg_full_preferences);
1011 IOR_HARD_REG_SET (temp, temp2);
1012 COPY_HARD_REG_SET (allocno[num].regs_someone_prefers, temp);
1014 free (allocno_to_order);
1017 /* Assign a hard register to allocno NUM; look for one that is the beginning
1018 of a long enough stretch of hard regs none of which conflicts with ALLOCNO.
1019 The registers marked in PREFREGS are tried first.
1021 LOSERS, if nonzero, is a HARD_REG_SET indicating registers that cannot
1022 be used for this allocation.
1024 If ALT_REGS_P is zero, consider only the preferred class of ALLOCNO's reg.
1025 Otherwise ignore that preferred class and use the alternate class.
1027 If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that
1028 will have to be saved and restored at calls.
1030 RETRYING is nonzero if this is called from retry_global_alloc.
1032 If we find one, record it in reg_renumber.
1033 If not, do nothing. */
1035 static void
1036 find_reg (int num, HARD_REG_SET losers, int alt_regs_p, int accept_call_clobbered, int retrying)
1038 int i, best_reg, pass;
1039 HARD_REG_SET used, used1, used2;
1041 enum reg_class class = (alt_regs_p
1042 ? reg_alternate_class (allocno[num].reg)
1043 : reg_preferred_class (allocno[num].reg));
1044 enum machine_mode mode = PSEUDO_REGNO_MODE (allocno[num].reg);
1046 if (accept_call_clobbered)
1047 COPY_HARD_REG_SET (used1, call_fixed_reg_set);
1048 else if (allocno[num].calls_crossed == 0)
1049 COPY_HARD_REG_SET (used1, fixed_reg_set);
1050 else
1051 COPY_HARD_REG_SET (used1, call_used_reg_set);
1053 /* Some registers should not be allocated in global-alloc. */
1054 IOR_HARD_REG_SET (used1, no_global_alloc_regs);
1055 if (losers)
1056 IOR_HARD_REG_SET (used1, losers);
1058 IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) class]);
1059 COPY_HARD_REG_SET (used2, used1);
1061 IOR_HARD_REG_SET (used1, allocno[num].hard_reg_conflicts);
1063 #ifdef CANNOT_CHANGE_MODE_CLASS
1064 cannot_change_mode_set_regs (&used1, mode, allocno[num].reg);
1065 #endif
1067 /* Try each hard reg to see if it fits. Do this in two passes.
1068 In the first pass, skip registers that are preferred by some other pseudo
1069 to give it a better chance of getting one of those registers. Only if
1070 we can't get a register when excluding those do we take one of them.
1071 However, we never allocate a register for the first time in pass 0. */
1073 COPY_HARD_REG_SET (used, used1);
1074 IOR_COMPL_HARD_REG_SET (used, regs_used_so_far);
1075 IOR_HARD_REG_SET (used, allocno[num].regs_someone_prefers);
1077 best_reg = -1;
1078 for (i = FIRST_PSEUDO_REGISTER, pass = 0;
1079 pass <= 1 && i >= FIRST_PSEUDO_REGISTER;
1080 pass++)
1082 if (pass == 1)
1083 COPY_HARD_REG_SET (used, used1);
1084 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1086 #ifdef REG_ALLOC_ORDER
1087 int regno = reg_alloc_order[i];
1088 #else
1089 int regno = i;
1090 #endif
1091 if (! TEST_HARD_REG_BIT (used, regno)
1092 && HARD_REGNO_MODE_OK (regno, mode)
1093 && (allocno[num].calls_crossed == 0
1094 || accept_call_clobbered
1095 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
1097 int j;
1098 int lim = regno + hard_regno_nregs[regno][mode];
1099 for (j = regno + 1;
1100 (j < lim
1101 && ! TEST_HARD_REG_BIT (used, j));
1102 j++);
1103 if (j == lim)
1105 best_reg = regno;
1106 break;
1108 #ifndef REG_ALLOC_ORDER
1109 i = j; /* Skip starting points we know will lose */
1110 #endif
1115 /* See if there is a preferred register with the same class as the register
1116 we allocated above. Making this restriction prevents register
1117 preferencing from creating worse register allocation.
1119 Remove from the preferred registers and conflicting registers. Note that
1120 additional conflicts may have been added after `prune_preferences' was
1121 called.
1123 First do this for those register with copy preferences, then all
1124 preferred registers. */
1126 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, used);
1127 GO_IF_HARD_REG_SUBSET (allocno[num].hard_reg_copy_preferences,
1128 reg_class_contents[(int) NO_REGS], no_copy_prefs);
1130 if (best_reg >= 0)
1132 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1133 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_copy_preferences, i)
1134 && HARD_REGNO_MODE_OK (i, mode)
1135 && (allocno[num].calls_crossed == 0
1136 || accept_call_clobbered
1137 || ! HARD_REGNO_CALL_PART_CLOBBERED (i, mode))
1138 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1139 || reg_class_subset_p (REGNO_REG_CLASS (i),
1140 REGNO_REG_CLASS (best_reg))
1141 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1142 REGNO_REG_CLASS (i))))
1144 int j;
1145 int lim = i + hard_regno_nregs[i][mode];
1146 for (j = i + 1;
1147 (j < lim
1148 && ! TEST_HARD_REG_BIT (used, j)
1149 && (REGNO_REG_CLASS (j)
1150 == REGNO_REG_CLASS (best_reg + (j - i))
1151 || reg_class_subset_p (REGNO_REG_CLASS (j),
1152 REGNO_REG_CLASS (best_reg + (j - i)))
1153 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1154 REGNO_REG_CLASS (j))));
1155 j++);
1156 if (j == lim)
1158 best_reg = i;
1159 goto no_prefs;
1163 no_copy_prefs:
1165 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, used);
1166 GO_IF_HARD_REG_SUBSET (allocno[num].hard_reg_preferences,
1167 reg_class_contents[(int) NO_REGS], no_prefs);
1169 if (best_reg >= 0)
1171 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1172 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_preferences, i)
1173 && HARD_REGNO_MODE_OK (i, mode)
1174 && (allocno[num].calls_crossed == 0
1175 || accept_call_clobbered
1176 || ! HARD_REGNO_CALL_PART_CLOBBERED (i, mode))
1177 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1178 || reg_class_subset_p (REGNO_REG_CLASS (i),
1179 REGNO_REG_CLASS (best_reg))
1180 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1181 REGNO_REG_CLASS (i))))
1183 int j;
1184 int lim = i + hard_regno_nregs[i][mode];
1185 for (j = i + 1;
1186 (j < lim
1187 && ! TEST_HARD_REG_BIT (used, j)
1188 && (REGNO_REG_CLASS (j)
1189 == REGNO_REG_CLASS (best_reg + (j - i))
1190 || reg_class_subset_p (REGNO_REG_CLASS (j),
1191 REGNO_REG_CLASS (best_reg + (j - i)))
1192 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1193 REGNO_REG_CLASS (j))));
1194 j++);
1195 if (j == lim)
1197 best_reg = i;
1198 break;
1202 no_prefs:
1204 /* If we haven't succeeded yet, try with caller-saves.
1205 We need not check to see if the current function has nonlocal
1206 labels because we don't put any pseudos that are live over calls in
1207 registers in that case. */
1209 if (flag_caller_saves && best_reg < 0)
1211 /* Did not find a register. If it would be profitable to
1212 allocate a call-clobbered register and save and restore it
1213 around calls, do that. Don't do this if it crosses any calls
1214 that might throw. */
1215 if (! accept_call_clobbered
1216 && allocno[num].calls_crossed != 0
1217 && allocno[num].throwing_calls_crossed == 0
1218 && CALLER_SAVE_PROFITABLE (allocno[num].n_refs,
1219 allocno[num].calls_crossed))
1221 HARD_REG_SET new_losers;
1222 if (! losers)
1223 CLEAR_HARD_REG_SET (new_losers);
1224 else
1225 COPY_HARD_REG_SET (new_losers, losers);
1227 IOR_HARD_REG_SET(new_losers, losing_caller_save_reg_set);
1228 find_reg (num, new_losers, alt_regs_p, 1, retrying);
1229 if (reg_renumber[allocno[num].reg] >= 0)
1231 caller_save_needed = 1;
1232 return;
1237 /* If we haven't succeeded yet,
1238 see if some hard reg that conflicts with us
1239 was utilized poorly by local-alloc.
1240 If so, kick out the regs that were put there by local-alloc
1241 so we can use it instead. */
1242 if (best_reg < 0 && !retrying
1243 /* Let's not bother with multi-reg allocnos. */
1244 && allocno[num].size == 1
1245 && REG_BASIC_BLOCK (allocno[num].reg) == REG_BLOCK_GLOBAL)
1247 /* Count from the end, to find the least-used ones first. */
1248 for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
1250 #ifdef REG_ALLOC_ORDER
1251 int regno = reg_alloc_order[i];
1252 #else
1253 int regno = i;
1254 #endif
1256 if (local_reg_n_refs[regno] != 0
1257 /* Don't use a reg no good for this pseudo. */
1258 && ! TEST_HARD_REG_BIT (used2, regno)
1259 && HARD_REGNO_MODE_OK (regno, mode)
1260 /* The code below assumes that we need only a single
1261 register, but the check of allocno[num].size above
1262 was not enough. Sometimes we need more than one
1263 register for a single-word value. */
1264 && hard_regno_nregs[regno][mode] == 1
1265 && (allocno[num].calls_crossed == 0
1266 || accept_call_clobbered
1267 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
1268 #ifdef CANNOT_CHANGE_MODE_CLASS
1269 && ! invalid_mode_change_p (regno, REGNO_REG_CLASS (regno),
1270 mode)
1271 #endif
1272 #ifdef STACK_REGS
1273 && (!allocno[num].no_stack_reg
1274 || regno < FIRST_STACK_REG || regno > LAST_STACK_REG)
1275 #endif
1278 /* We explicitly evaluate the divide results into temporary
1279 variables so as to avoid excess precision problems that occur
1280 on an i386-unknown-sysv4.2 (unixware) host. */
1282 double tmp1 = ((double) local_reg_freq[regno] * local_reg_n_refs[regno]
1283 / local_reg_live_length[regno]);
1284 double tmp2 = ((double) allocno[num].freq * allocno[num].n_refs
1285 / allocno[num].live_length);
1287 if (tmp1 < tmp2)
1289 /* Hard reg REGNO was used less in total by local regs
1290 than it would be used by this one allocno! */
1291 int k;
1292 if (dump_file)
1294 fprintf (dump_file, "Regno %d better for global %d, ",
1295 regno, allocno[num].reg);
1296 fprintf (dump_file, "fr:%d, ll:%d, nr:%d ",
1297 allocno[num].freq, allocno[num].live_length,
1298 allocno[num].n_refs);
1299 fprintf (dump_file, "(was: fr:%d, ll:%d, nr:%d)\n",
1300 local_reg_freq[regno],
1301 local_reg_live_length[regno],
1302 local_reg_n_refs[regno]);
1305 for (k = 0; k < max_regno; k++)
1306 if (reg_renumber[k] >= 0)
1308 int r = reg_renumber[k];
1309 int endregno
1310 = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (k)];
1312 if (regno >= r && regno < endregno)
1314 if (dump_file)
1315 fprintf (dump_file,
1316 "Local Reg %d now on stack\n", k);
1317 reg_renumber[k] = -1;
1321 best_reg = regno;
1322 break;
1328 /* Did we find a register? */
1330 if (best_reg >= 0)
1332 int lim, j;
1333 HARD_REG_SET this_reg;
1335 /* Yes. Record it as the hard register of this pseudo-reg. */
1336 reg_renumber[allocno[num].reg] = best_reg;
1337 /* Also of any pseudo-regs that share with it. */
1338 if (reg_may_share[allocno[num].reg])
1339 for (j = FIRST_PSEUDO_REGISTER; j < max_regno; j++)
1340 if (reg_allocno[j] == num)
1341 reg_renumber[j] = best_reg;
1343 /* Make a set of the hard regs being allocated. */
1344 CLEAR_HARD_REG_SET (this_reg);
1345 lim = best_reg + hard_regno_nregs[best_reg][mode];
1346 for (j = best_reg; j < lim; j++)
1348 SET_HARD_REG_BIT (this_reg, j);
1349 SET_HARD_REG_BIT (regs_used_so_far, j);
1350 /* This is no longer a reg used just by local regs. */
1351 local_reg_n_refs[j] = 0;
1352 local_reg_freq[j] = 0;
1354 /* For each other pseudo-reg conflicting with this one,
1355 mark it as conflicting with the hard regs this one occupies. */
1356 lim = num;
1357 EXECUTE_IF_SET_IN_ALLOCNO_SET (conflicts + lim * allocno_row_words, j,
1359 IOR_HARD_REG_SET (allocno[j].hard_reg_conflicts, this_reg);
1364 /* Called from `reload' to look for a hard reg to put pseudo reg REGNO in.
1365 Perhaps it had previously seemed not worth a hard reg,
1366 or perhaps its old hard reg has been commandeered for reloads.
1367 FORBIDDEN_REGS indicates certain hard regs that may not be used, even if
1368 they do not appear to be allocated.
1369 If FORBIDDEN_REGS is zero, no regs are forbidden. */
1371 void
1372 retry_global_alloc (int regno, HARD_REG_SET forbidden_regs)
1374 int alloc_no = reg_allocno[regno];
1375 if (alloc_no >= 0)
1377 /* If we have more than one register class,
1378 first try allocating in the class that is cheapest
1379 for this pseudo-reg. If that fails, try any reg. */
1380 if (N_REG_CLASSES > 1)
1381 find_reg (alloc_no, forbidden_regs, 0, 0, 1);
1382 if (reg_renumber[regno] < 0
1383 && reg_alternate_class (regno) != NO_REGS)
1384 find_reg (alloc_no, forbidden_regs, 1, 0, 1);
1386 /* If we found a register, modify the RTL for the register to
1387 show the hard register, and mark that register live. */
1388 if (reg_renumber[regno] >= 0)
1390 REGNO (regno_reg_rtx[regno]) = reg_renumber[regno];
1391 mark_home_live (regno);
1396 /* Record a conflict between register REGNO
1397 and everything currently live.
1398 REGNO must not be a pseudo reg that was allocated
1399 by local_alloc; such numbers must be translated through
1400 reg_renumber before calling here. */
1402 static void
1403 record_one_conflict (int regno)
1405 int j;
1407 if (regno < FIRST_PSEUDO_REGISTER)
1408 /* When a hard register becomes live,
1409 record conflicts with live pseudo regs. */
1410 EXECUTE_IF_SET_IN_ALLOCNO_SET (allocnos_live, j,
1412 SET_HARD_REG_BIT (allocno[j].hard_reg_conflicts, regno);
1414 else
1415 /* When a pseudo-register becomes live,
1416 record conflicts first with hard regs,
1417 then with other pseudo regs. */
1419 int ialloc = reg_allocno[regno];
1420 int ialloc_prod = ialloc * allocno_row_words;
1422 IOR_HARD_REG_SET (allocno[ialloc].hard_reg_conflicts, hard_regs_live);
1423 for (j = allocno_row_words - 1; j >= 0; j--)
1424 conflicts[ialloc_prod + j] |= allocnos_live[j];
1428 /* Record all allocnos currently live as conflicting
1429 with all hard regs currently live.
1431 ALLOCNO_VEC is a vector of LEN allocnos, all allocnos that
1432 are currently live. Their bits are also flagged in allocnos_live. */
1434 static void
1435 record_conflicts (int *allocno_vec, int len)
1437 while (--len >= 0)
1438 IOR_HARD_REG_SET (allocno[allocno_vec[len]].hard_reg_conflicts,
1439 hard_regs_live);
1442 /* If CONFLICTP (i, j) is true, make sure CONFLICTP (j, i) is also true. */
1443 static void
1444 mirror_conflicts (void)
1446 int i, j;
1447 int rw = allocno_row_words;
1448 int rwb = rw * INT_BITS;
1449 INT_TYPE *p = conflicts;
1450 INT_TYPE *q0 = conflicts, *q1, *q2;
1451 unsigned INT_TYPE mask;
1453 for (i = max_allocno - 1, mask = 1; i >= 0; i--, mask <<= 1)
1455 if (! mask)
1457 mask = 1;
1458 q0++;
1460 for (j = allocno_row_words - 1, q1 = q0; j >= 0; j--, q1 += rwb)
1462 unsigned INT_TYPE word;
1464 for (word = (unsigned INT_TYPE) *p++, q2 = q1; word;
1465 word >>= 1, q2 += rw)
1467 if (word & 1)
1468 *q2 |= mask;
1474 /* Handle the case where REG is set by the insn being scanned,
1475 during the forward scan to accumulate conflicts.
1476 Store a 1 in regs_live or allocnos_live for this register, record how many
1477 consecutive hardware registers it actually needs,
1478 and record a conflict with all other registers already live.
1480 Note that even if REG does not remain alive after this insn,
1481 we must mark it here as live, to ensure a conflict between
1482 REG and any other regs set in this insn that really do live.
1483 This is because those other regs could be considered after this.
1485 REG might actually be something other than a register;
1486 if so, we do nothing.
1488 SETTER is 0 if this register was modified by an auto-increment (i.e.,
1489 a REG_INC note was found for it). */
1491 static void
1492 mark_reg_store (rtx reg, rtx setter, void *data ATTRIBUTE_UNUSED)
1494 int regno;
1496 if (GET_CODE (reg) == SUBREG)
1497 reg = SUBREG_REG (reg);
1499 if (!REG_P (reg))
1500 return;
1502 regs_set[n_regs_set++] = reg;
1504 if (setter && GET_CODE (setter) != CLOBBER)
1505 set_preference (reg, SET_SRC (setter));
1507 regno = REGNO (reg);
1509 /* Either this is one of the max_allocno pseudo regs not allocated,
1510 or it is or has a hardware reg. First handle the pseudo-regs. */
1511 if (regno >= FIRST_PSEUDO_REGISTER)
1513 if (reg_allocno[regno] >= 0)
1515 SET_ALLOCNO_LIVE (reg_allocno[regno]);
1516 record_one_conflict (regno);
1520 if (reg_renumber[regno] >= 0)
1521 regno = reg_renumber[regno];
1523 /* Handle hardware regs (and pseudos allocated to hard regs). */
1524 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
1526 int last = regno + hard_regno_nregs[regno][GET_MODE (reg)];
1527 while (regno < last)
1529 record_one_conflict (regno);
1530 SET_HARD_REG_BIT (hard_regs_live, regno);
1531 regno++;
1536 /* Like mark_reg_store except notice just CLOBBERs; ignore SETs. */
1538 static void
1539 mark_reg_clobber (rtx reg, rtx setter, void *data)
1541 if (GET_CODE (setter) == CLOBBER)
1542 mark_reg_store (reg, setter, data);
1545 /* Record that REG has conflicts with all the regs currently live.
1546 Do not mark REG itself as live. */
1548 static void
1549 mark_reg_conflicts (rtx reg)
1551 int regno;
1553 if (GET_CODE (reg) == SUBREG)
1554 reg = SUBREG_REG (reg);
1556 if (!REG_P (reg))
1557 return;
1559 regno = REGNO (reg);
1561 /* Either this is one of the max_allocno pseudo regs not allocated,
1562 or it is or has a hardware reg. First handle the pseudo-regs. */
1563 if (regno >= FIRST_PSEUDO_REGISTER)
1565 if (reg_allocno[regno] >= 0)
1566 record_one_conflict (regno);
1569 if (reg_renumber[regno] >= 0)
1570 regno = reg_renumber[regno];
1572 /* Handle hardware regs (and pseudos allocated to hard regs). */
1573 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
1575 int last = regno + hard_regno_nregs[regno][GET_MODE (reg)];
1576 while (regno < last)
1578 record_one_conflict (regno);
1579 regno++;
1584 /* Mark REG as being dead (following the insn being scanned now).
1585 Store a 0 in regs_live or allocnos_live for this register. */
1587 static void
1588 mark_reg_death (rtx reg)
1590 int regno = REGNO (reg);
1592 /* Either this is one of the max_allocno pseudo regs not allocated,
1593 or it is a hardware reg. First handle the pseudo-regs. */
1594 if (regno >= FIRST_PSEUDO_REGISTER)
1596 if (reg_allocno[regno] >= 0)
1597 CLEAR_ALLOCNO_LIVE (reg_allocno[regno]);
1600 /* For pseudo reg, see if it has been assigned a hardware reg. */
1601 if (reg_renumber[regno] >= 0)
1602 regno = reg_renumber[regno];
1604 /* Handle hardware regs (and pseudos allocated to hard regs). */
1605 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
1607 /* Pseudo regs already assigned hardware regs are treated
1608 almost the same as explicit hardware regs. */
1609 int last = regno + hard_regno_nregs[regno][GET_MODE (reg)];
1610 while (regno < last)
1612 CLEAR_HARD_REG_BIT (hard_regs_live, regno);
1613 regno++;
1618 /* Mark hard reg REGNO as currently live, assuming machine mode MODE
1619 for the value stored in it. MODE determines how many consecutive
1620 registers are actually in use. Do not record conflicts;
1621 it is assumed that the caller will do that. */
1623 static void
1624 mark_reg_live_nc (int regno, enum machine_mode mode)
1626 int last = regno + hard_regno_nregs[regno][mode];
1627 while (regno < last)
1629 SET_HARD_REG_BIT (hard_regs_live, regno);
1630 regno++;
1634 /* Try to set a preference for an allocno to a hard register.
1635 We are passed DEST and SRC which are the operands of a SET. It is known
1636 that SRC is a register. If SRC or the first operand of SRC is a register,
1637 try to set a preference. If one of the two is a hard register and the other
1638 is a pseudo-register, mark the preference.
1640 Note that we are not as aggressive as local-alloc in trying to tie a
1641 pseudo-register to a hard register. */
1643 static void
1644 set_preference (rtx dest, rtx src)
1646 unsigned int src_regno, dest_regno;
1647 /* Amount to add to the hard regno for SRC, or subtract from that for DEST,
1648 to compensate for subregs in SRC or DEST. */
1649 int offset = 0;
1650 unsigned int i;
1651 int copy = 1;
1653 if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e')
1654 src = XEXP (src, 0), copy = 0;
1656 /* Get the reg number for both SRC and DEST.
1657 If neither is a reg, give up. */
1659 if (REG_P (src))
1660 src_regno = REGNO (src);
1661 else if (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)))
1663 src_regno = REGNO (SUBREG_REG (src));
1665 if (REGNO (SUBREG_REG (src)) < FIRST_PSEUDO_REGISTER)
1666 offset += subreg_regno_offset (REGNO (SUBREG_REG (src)),
1667 GET_MODE (SUBREG_REG (src)),
1668 SUBREG_BYTE (src),
1669 GET_MODE (src));
1670 else
1671 offset += (SUBREG_BYTE (src)
1672 / REGMODE_NATURAL_SIZE (GET_MODE (src)));
1674 else
1675 return;
1677 if (REG_P (dest))
1678 dest_regno = REGNO (dest);
1679 else if (GET_CODE (dest) == SUBREG && REG_P (SUBREG_REG (dest)))
1681 dest_regno = REGNO (SUBREG_REG (dest));
1683 if (REGNO (SUBREG_REG (dest)) < FIRST_PSEUDO_REGISTER)
1684 offset -= subreg_regno_offset (REGNO (SUBREG_REG (dest)),
1685 GET_MODE (SUBREG_REG (dest)),
1686 SUBREG_BYTE (dest),
1687 GET_MODE (dest));
1688 else
1689 offset -= (SUBREG_BYTE (dest)
1690 / REGMODE_NATURAL_SIZE (GET_MODE (dest)));
1692 else
1693 return;
1695 /* Convert either or both to hard reg numbers. */
1697 if (reg_renumber[src_regno] >= 0)
1698 src_regno = reg_renumber[src_regno];
1700 if (reg_renumber[dest_regno] >= 0)
1701 dest_regno = reg_renumber[dest_regno];
1703 /* Now if one is a hard reg and the other is a global pseudo
1704 then give the other a preference. */
1706 if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER
1707 && reg_allocno[src_regno] >= 0)
1709 dest_regno -= offset;
1710 if (dest_regno < FIRST_PSEUDO_REGISTER)
1712 if (copy)
1713 SET_REGBIT (hard_reg_copy_preferences,
1714 reg_allocno[src_regno], dest_regno);
1716 SET_REGBIT (hard_reg_preferences,
1717 reg_allocno[src_regno], dest_regno);
1718 for (i = dest_regno;
1719 i < dest_regno + hard_regno_nregs[dest_regno][GET_MODE (dest)];
1720 i++)
1721 SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i);
1725 if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER
1726 && reg_allocno[dest_regno] >= 0)
1728 src_regno += offset;
1729 if (src_regno < FIRST_PSEUDO_REGISTER)
1731 if (copy)
1732 SET_REGBIT (hard_reg_copy_preferences,
1733 reg_allocno[dest_regno], src_regno);
1735 SET_REGBIT (hard_reg_preferences,
1736 reg_allocno[dest_regno], src_regno);
1737 for (i = src_regno;
1738 i < src_regno + hard_regno_nregs[src_regno][GET_MODE (src)];
1739 i++)
1740 SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i);
1745 /* Indicate that hard register number FROM was eliminated and replaced with
1746 an offset from hard register number TO. The status of hard registers live
1747 at the start of a basic block is updated by replacing a use of FROM with
1748 a use of TO. */
1750 void
1751 mark_elimination (int from, int to)
1753 basic_block bb;
1755 FOR_EACH_BB (bb)
1757 regset r = bb->il.rtl->global_live_at_start;
1758 if (REGNO_REG_SET_P (r, from))
1760 CLEAR_REGNO_REG_SET (r, from);
1761 SET_REGNO_REG_SET (r, to);
1766 /* Used for communication between the following functions. Holds the
1767 current life information. */
1768 static regset live_relevant_regs;
1770 /* Record in live_relevant_regs and REGS_SET that register REG became live.
1771 This is called via note_stores. */
1772 static void
1773 reg_becomes_live (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *regs_set)
1775 int regno;
1777 if (GET_CODE (reg) == SUBREG)
1778 reg = SUBREG_REG (reg);
1780 if (!REG_P (reg))
1781 return;
1783 regno = REGNO (reg);
1784 if (regno < FIRST_PSEUDO_REGISTER)
1786 int nregs = hard_regno_nregs[regno][GET_MODE (reg)];
1787 while (nregs-- > 0)
1789 SET_REGNO_REG_SET (live_relevant_regs, regno);
1790 if (! fixed_regs[regno])
1791 SET_REGNO_REG_SET ((regset) regs_set, regno);
1792 regno++;
1795 else if (reg_renumber[regno] >= 0)
1797 SET_REGNO_REG_SET (live_relevant_regs, regno);
1798 SET_REGNO_REG_SET ((regset) regs_set, regno);
1802 /* Record in live_relevant_regs that register REGNO died. */
1803 static void
1804 reg_dies (int regno, enum machine_mode mode, struct insn_chain *chain)
1806 if (regno < FIRST_PSEUDO_REGISTER)
1808 int nregs = hard_regno_nregs[regno][mode];
1809 while (nregs-- > 0)
1811 CLEAR_REGNO_REG_SET (live_relevant_regs, regno);
1812 if (! fixed_regs[regno])
1813 SET_REGNO_REG_SET (&chain->dead_or_set, regno);
1814 regno++;
1817 else
1819 CLEAR_REGNO_REG_SET (live_relevant_regs, regno);
1820 if (reg_renumber[regno] >= 0)
1821 SET_REGNO_REG_SET (&chain->dead_or_set, regno);
1825 /* Walk the insns of the current function and build reload_insn_chain,
1826 and record register life information. */
1827 void
1828 build_insn_chain (rtx first)
1830 struct insn_chain **p = &reload_insn_chain;
1831 struct insn_chain *prev = 0;
1832 basic_block b = ENTRY_BLOCK_PTR->next_bb;
1834 live_relevant_regs = ALLOC_REG_SET (&reg_obstack);
1836 for (; first; first = NEXT_INSN (first))
1838 struct insn_chain *c;
1840 if (first == BB_HEAD (b))
1842 unsigned i;
1843 bitmap_iterator bi;
1845 CLEAR_REG_SET (live_relevant_regs);
1847 EXECUTE_IF_SET_IN_BITMAP (b->il.rtl->global_live_at_start, 0, i, bi)
1849 if (i < FIRST_PSEUDO_REGISTER
1850 ? ! TEST_HARD_REG_BIT (eliminable_regset, i)
1851 : reg_renumber[i] >= 0)
1852 SET_REGNO_REG_SET (live_relevant_regs, i);
1856 if (!NOTE_P (first) && !BARRIER_P (first))
1858 c = new_insn_chain ();
1859 c->prev = prev;
1860 prev = c;
1861 *p = c;
1862 p = &c->next;
1863 c->insn = first;
1864 c->block = b->index;
1866 if (INSN_P (first))
1868 rtx link;
1870 /* Mark the death of everything that dies in this instruction. */
1872 for (link = REG_NOTES (first); link; link = XEXP (link, 1))
1873 if (REG_NOTE_KIND (link) == REG_DEAD
1874 && REG_P (XEXP (link, 0)))
1875 reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)),
1878 COPY_REG_SET (&c->live_throughout, live_relevant_regs);
1880 /* Mark everything born in this instruction as live. */
1882 note_stores (PATTERN (first), reg_becomes_live,
1883 &c->dead_or_set);
1885 else
1886 COPY_REG_SET (&c->live_throughout, live_relevant_regs);
1888 if (INSN_P (first))
1890 rtx link;
1892 /* Mark anything that is set in this insn and then unused as dying. */
1894 for (link = REG_NOTES (first); link; link = XEXP (link, 1))
1895 if (REG_NOTE_KIND (link) == REG_UNUSED
1896 && REG_P (XEXP (link, 0)))
1897 reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)),
1902 if (first == BB_END (b))
1903 b = b->next_bb;
1905 /* Stop after we pass the end of the last basic block. Verify that
1906 no real insns are after the end of the last basic block.
1908 We may want to reorganize the loop somewhat since this test should
1909 always be the right exit test. Allow an ADDR_VEC or ADDR_DIF_VEC if
1910 the previous real insn is a JUMP_INSN. */
1911 if (b == EXIT_BLOCK_PTR)
1913 #ifdef ENABLE_CHECKING
1914 for (first = NEXT_INSN (first); first; first = NEXT_INSN (first))
1915 gcc_assert (!INSN_P (first)
1916 || GET_CODE (PATTERN (first)) == USE
1917 || ((GET_CODE (PATTERN (first)) == ADDR_VEC
1918 || GET_CODE (PATTERN (first)) == ADDR_DIFF_VEC)
1919 && prev_real_insn (first) != 0
1920 && JUMP_P (prev_real_insn (first))));
1921 #endif
1922 break;
1925 FREE_REG_SET (live_relevant_regs);
1926 *p = 0;
1929 /* Print debugging trace information if -dg switch is given,
1930 showing the information on which the allocation decisions are based. */
1932 static void
1933 dump_conflicts (FILE *file)
1935 int i;
1936 int has_preferences;
1937 int nregs;
1938 nregs = 0;
1939 for (i = 0; i < max_allocno; i++)
1941 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
1942 continue;
1943 nregs++;
1945 fprintf (file, ";; %d regs to allocate:", nregs);
1946 for (i = 0; i < max_allocno; i++)
1948 int j;
1949 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
1950 continue;
1951 fprintf (file, " %d", allocno[allocno_order[i]].reg);
1952 for (j = 0; j < max_regno; j++)
1953 if (reg_allocno[j] == allocno_order[i]
1954 && j != allocno[allocno_order[i]].reg)
1955 fprintf (file, "+%d", j);
1956 if (allocno[allocno_order[i]].size != 1)
1957 fprintf (file, " (%d)", allocno[allocno_order[i]].size);
1959 fprintf (file, "\n");
1961 for (i = 0; i < max_allocno; i++)
1963 int j;
1964 fprintf (file, ";; %d conflicts:", allocno[i].reg);
1965 for (j = 0; j < max_allocno; j++)
1966 if (CONFLICTP (j, i))
1967 fprintf (file, " %d", allocno[j].reg);
1968 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1969 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_conflicts, j))
1970 fprintf (file, " %d", j);
1971 fprintf (file, "\n");
1973 has_preferences = 0;
1974 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1975 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
1976 has_preferences = 1;
1978 if (! has_preferences)
1979 continue;
1980 fprintf (file, ";; %d preferences:", allocno[i].reg);
1981 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1982 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
1983 fprintf (file, " %d", j);
1984 fprintf (file, "\n");
1986 fprintf (file, "\n");
1989 void
1990 dump_global_regs (FILE *file)
1992 int i, j;
1994 fprintf (file, ";; Register dispositions:\n");
1995 for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++)
1996 if (reg_renumber[i] >= 0)
1998 fprintf (file, "%d in %d ", i, reg_renumber[i]);
1999 if (++j % 6 == 0)
2000 fprintf (file, "\n");
2003 fprintf (file, "\n\n;; Hard regs used: ");
2004 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2005 if (regs_ever_live[i])
2006 fprintf (file, " %d", i);
2007 fprintf (file, "\n\n");
2012 /* This page contains code to make live information more accurate.
2013 The accurate register liveness at program point P means:
2014 o there is a path from P to usage of the register and the
2015 register is not redefined or killed on the path.
2016 o register at P is partially available, i.e. there is a path from
2017 a register definition to the point P and the register is not
2018 killed (clobbered) on the path
2020 The standard GCC live information means only the first condition.
2021 Without the partial availability, there will be more register
2022 conflicts and as a consequence worse register allocation. The
2023 typical example where the information can be different is a
2024 register initialized in the loop at the basic block preceding the
2025 loop in CFG. */
2027 /* The following structure contains basic block data flow information
2028 used to calculate partial availability of registers. */
2030 struct bb_info
2032 /* The basic block reverse post-order number. */
2033 int rts_number;
2034 /* Registers used uninitialized in an insn in which there is an
2035 early clobbered register might get the same hard register. */
2036 bitmap earlyclobber;
2037 /* Registers correspondingly killed (clobbered) and defined but not
2038 killed afterward in the basic block. */
2039 bitmap killed, avloc;
2040 /* Registers partially available and living (in other words whose
2041 values were calculated and used) correspondingly at the start
2042 and end of the basic block. */
2043 bitmap live_pavin, live_pavout;
2046 /* Macros for accessing data flow information of basic blocks. */
2048 #define BB_INFO(BB) ((struct bb_info *) (BB)->aux)
2049 #define BB_INFO_BY_INDEX(N) BB_INFO (BASIC_BLOCK(N))
2051 /* The function allocates the info structures of each basic block. It
2052 also initialized LIVE_PAVIN and LIVE_PAVOUT as if all hard
2053 registers were partially available. */
2055 static void
2056 allocate_bb_info (void)
2058 int i;
2059 basic_block bb;
2060 struct bb_info *bb_info;
2061 bitmap init;
2063 alloc_aux_for_blocks (sizeof (struct bb_info));
2064 init = BITMAP_ALLOC (NULL);
2065 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2066 bitmap_set_bit (init, i);
2067 FOR_EACH_BB (bb)
2069 bb_info = bb->aux;
2070 bb_info->earlyclobber = BITMAP_ALLOC (NULL);
2071 bb_info->avloc = BITMAP_ALLOC (NULL);
2072 bb_info->killed = BITMAP_ALLOC (NULL);
2073 bb_info->live_pavin = BITMAP_ALLOC (NULL);
2074 bb_info->live_pavout = BITMAP_ALLOC (NULL);
2075 bitmap_copy (bb_info->live_pavin, init);
2076 bitmap_copy (bb_info->live_pavout, init);
2078 BITMAP_FREE (init);
2081 /* The function frees the allocated info of all basic blocks. */
2083 static void
2084 free_bb_info (void)
2086 basic_block bb;
2087 struct bb_info *bb_info;
2089 FOR_EACH_BB (bb)
2091 bb_info = BB_INFO (bb);
2092 BITMAP_FREE (bb_info->live_pavout);
2093 BITMAP_FREE (bb_info->live_pavin);
2094 BITMAP_FREE (bb_info->killed);
2095 BITMAP_FREE (bb_info->avloc);
2096 BITMAP_FREE (bb_info->earlyclobber);
2098 free_aux_for_blocks ();
2101 /* The function modifies local info for register REG being changed in
2102 SETTER. DATA is used to pass the current basic block info. */
2104 static void
2105 mark_reg_change (rtx reg, rtx setter, void *data)
2107 int regno;
2108 basic_block bb = data;
2109 struct bb_info *bb_info = BB_INFO (bb);
2111 if (GET_CODE (reg) == SUBREG)
2112 reg = SUBREG_REG (reg);
2114 if (!REG_P (reg))
2115 return;
2117 regno = REGNO (reg);
2118 bitmap_set_bit (bb_info->killed, regno);
2120 if (GET_CODE (setter) != CLOBBER)
2121 bitmap_set_bit (bb_info->avloc, regno);
2122 else
2123 bitmap_clear_bit (bb_info->avloc, regno);
2126 /* Classes of registers which could be early clobbered in the current
2127 insn. */
2129 DEF_VEC_I(int);
2130 DEF_VEC_ALLOC_I(int,heap);
2132 static VEC(int,heap) *earlyclobber_regclass;
2134 /* This function finds and stores register classes that could be early
2135 clobbered in INSN. If any earlyclobber classes are found, the function
2136 returns TRUE, in all other cases it returns FALSE. */
2138 static bool
2139 check_earlyclobber (rtx insn)
2141 int opno;
2142 bool found = false;
2144 extract_insn (insn);
2146 VEC_truncate (int, earlyclobber_regclass, 0);
2147 for (opno = 0; opno < recog_data.n_operands; opno++)
2149 char c;
2150 bool amp_p;
2151 int i;
2152 enum reg_class class;
2153 const char *p = recog_data.constraints[opno];
2155 class = NO_REGS;
2156 amp_p = false;
2157 for (;;)
2159 c = *p;
2160 switch (c)
2162 case '=': case '+': case '?':
2163 case '#': case '!':
2164 case '*': case '%':
2165 case 'm': case '<': case '>': case 'V': case 'o':
2166 case 'E': case 'F': case 'G': case 'H':
2167 case 's': case 'i': case 'n':
2168 case 'I': case 'J': case 'K': case 'L':
2169 case 'M': case 'N': case 'O': case 'P':
2170 case 'X':
2171 case '0': case '1': case '2': case '3': case '4':
2172 case '5': case '6': case '7': case '8': case '9':
2173 /* These don't say anything we care about. */
2174 break;
2176 case '&':
2177 amp_p = true;
2178 break;
2179 case '\0':
2180 case ',':
2181 if (amp_p && class != NO_REGS)
2183 int rc;
2185 found = true;
2186 for (i = 0;
2187 VEC_iterate (int, earlyclobber_regclass, i, rc);
2188 i++)
2190 if (rc == (int) class)
2191 goto found_rc;
2194 /* We use VEC_quick_push here because
2195 earlyclobber_regclass holds no more than
2196 N_REG_CLASSES elements. */
2197 VEC_quick_push (int, earlyclobber_regclass, (int) class);
2198 found_rc:
2202 amp_p = false;
2203 class = NO_REGS;
2204 break;
2206 case 'r':
2207 class = GENERAL_REGS;
2208 break;
2210 default:
2211 class = REG_CLASS_FROM_CONSTRAINT (c, p);
2212 break;
2214 if (c == '\0')
2215 break;
2216 p += CONSTRAINT_LEN (c, p);
2220 return found;
2223 /* The function checks that pseudo-register *X has a class
2224 intersecting with the class of pseudo-register could be early
2225 clobbered in the same insn.
2226 This function is a no-op if earlyclobber_regclass is empty. */
2228 static int
2229 mark_reg_use_for_earlyclobber (rtx *x, void *data ATTRIBUTE_UNUSED)
2231 enum reg_class pref_class, alt_class;
2232 int i, regno;
2233 basic_block bb = data;
2234 struct bb_info *bb_info = BB_INFO (bb);
2236 if (REG_P (*x) && REGNO (*x) >= FIRST_PSEUDO_REGISTER)
2238 int rc;
2240 regno = REGNO (*x);
2241 if (bitmap_bit_p (bb_info->killed, regno)
2242 || bitmap_bit_p (bb_info->avloc, regno))
2243 return 0;
2244 pref_class = reg_preferred_class (regno);
2245 alt_class = reg_alternate_class (regno);
2246 for (i = 0; VEC_iterate (int, earlyclobber_regclass, i, rc); i++)
2248 if (reg_classes_intersect_p (rc, pref_class)
2249 || (rc != NO_REGS
2250 && reg_classes_intersect_p (rc, alt_class)))
2252 bitmap_set_bit (bb_info->earlyclobber, regno);
2253 break;
2257 return 0;
2260 /* The function processes all pseudo-registers in *X with the aid of
2261 previous function. */
2263 static void
2264 mark_reg_use_for_earlyclobber_1 (rtx *x, void *data)
2266 for_each_rtx (x, mark_reg_use_for_earlyclobber, data);
2269 /* The function calculates local info for each basic block. */
2271 static void
2272 calculate_local_reg_bb_info (void)
2274 basic_block bb;
2275 rtx insn, bound;
2277 /* We know that earlyclobber_regclass holds no more than
2278 N_REG_CLASSES elements. See check_earlyclobber. */
2279 earlyclobber_regclass = VEC_alloc (int, heap, N_REG_CLASSES);
2280 FOR_EACH_BB (bb)
2282 bound = NEXT_INSN (BB_END (bb));
2283 for (insn = BB_HEAD (bb); insn != bound; insn = NEXT_INSN (insn))
2284 if (INSN_P (insn))
2286 note_stores (PATTERN (insn), mark_reg_change, bb);
2287 if (check_earlyclobber (insn))
2288 note_uses (&PATTERN (insn), mark_reg_use_for_earlyclobber_1, bb);
2291 VEC_free (int, heap, earlyclobber_regclass);
2294 /* The function sets up reverse post-order number of each basic
2295 block. */
2297 static void
2298 set_up_bb_rts_numbers (void)
2300 int i;
2301 int *rts_order;
2303 rts_order = XNEWVEC (int, n_basic_blocks - NUM_FIXED_BLOCKS);
2304 post_order_compute (rts_order, false);
2305 for (i = 0; i < n_basic_blocks - NUM_FIXED_BLOCKS; i++)
2306 BB_INFO_BY_INDEX (rts_order [i])->rts_number = i;
2307 free (rts_order);
2310 /* Compare function for sorting blocks in reverse postorder. */
2312 static int
2313 rpost_cmp (const void *bb1, const void *bb2)
2315 basic_block b1 = *(basic_block *) bb1, b2 = *(basic_block *) bb2;
2317 return BB_INFO (b2)->rts_number - BB_INFO (b1)->rts_number;
2320 /* Temporary bitmap used for live_pavin, live_pavout calculation. */
2321 static bitmap temp_bitmap;
2323 /* The function calculates partial register availability according to
2324 the following equations:
2326 bb.live_pavin
2327 = empty for entry block
2328 | union (live_pavout of predecessors) & global_live_at_start
2329 bb.live_pavout = union (bb.live_pavin - bb.killed, bb.avloc)
2330 & global_live_at_end */
2332 static void
2333 calculate_reg_pav (void)
2335 basic_block bb, succ;
2336 edge e;
2337 int i, nel;
2338 VEC(basic_block,heap) *bbs, *new_bbs, *temp;
2339 basic_block *bb_array;
2340 sbitmap wset;
2342 bbs = VEC_alloc (basic_block, heap, n_basic_blocks);
2343 new_bbs = VEC_alloc (basic_block, heap, n_basic_blocks);
2344 temp_bitmap = BITMAP_ALLOC (NULL);
2345 FOR_EACH_BB (bb)
2347 VEC_quick_push (basic_block, bbs, bb);
2349 wset = sbitmap_alloc (n_basic_blocks + 1);
2350 while (VEC_length (basic_block, bbs))
2352 bb_array = VEC_address (basic_block, bbs);
2353 nel = VEC_length (basic_block, bbs);
2354 qsort (bb_array, nel, sizeof (basic_block), rpost_cmp);
2355 sbitmap_zero (wset);
2356 for (i = 0; i < nel; i++)
2358 edge_iterator ei;
2359 struct bb_info *bb_info;
2360 bitmap bb_live_pavin, bb_live_pavout;
2362 bb = bb_array [i];
2363 bb_info = BB_INFO (bb);
2364 bb_live_pavin = bb_info->live_pavin;
2365 bb_live_pavout = bb_info->live_pavout;
2366 FOR_EACH_EDGE (e, ei, bb->preds)
2368 basic_block pred = e->src;
2370 if (pred->index != ENTRY_BLOCK)
2371 bitmap_ior_into (bb_live_pavin, BB_INFO (pred)->live_pavout);
2373 bitmap_and_into (bb_live_pavin, bb->il.rtl->global_live_at_start);
2374 bitmap_ior_and_compl (temp_bitmap, bb_info->avloc,
2375 bb_live_pavin, bb_info->killed);
2376 bitmap_and_into (temp_bitmap, bb->il.rtl->global_live_at_end);
2377 if (! bitmap_equal_p (temp_bitmap, bb_live_pavout))
2379 bitmap_copy (bb_live_pavout, temp_bitmap);
2380 FOR_EACH_EDGE (e, ei, bb->succs)
2382 succ = e->dest;
2383 if (succ->index != EXIT_BLOCK
2384 && !TEST_BIT (wset, succ->index))
2386 SET_BIT (wset, succ->index);
2387 VEC_quick_push (basic_block, new_bbs, succ);
2392 temp = bbs;
2393 bbs = new_bbs;
2394 new_bbs = temp;
2395 VEC_truncate (basic_block, new_bbs, 0);
2397 sbitmap_free (wset);
2398 BITMAP_FREE (temp_bitmap);
2399 VEC_free (basic_block, heap, new_bbs);
2400 VEC_free (basic_block, heap, bbs);
2403 /* The function modifies partial availability information for two
2404 special cases to prevent incorrect work of the subsequent passes
2405 with the accurate live information based on the partial
2406 availability. */
2408 static void
2409 modify_reg_pav (void)
2411 basic_block bb;
2412 struct bb_info *bb_info;
2413 #ifdef STACK_REGS
2414 int i;
2415 HARD_REG_SET zero, stack_hard_regs, used;
2416 bitmap stack_regs;
2418 CLEAR_HARD_REG_SET (zero);
2419 CLEAR_HARD_REG_SET (stack_hard_regs);
2420 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
2421 SET_HARD_REG_BIT(stack_hard_regs, i);
2422 stack_regs = BITMAP_ALLOC (NULL);
2423 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
2425 COPY_HARD_REG_SET (used, reg_class_contents[reg_preferred_class (i)]);
2426 IOR_HARD_REG_SET (used, reg_class_contents[reg_alternate_class (i)]);
2427 AND_HARD_REG_SET (used, stack_hard_regs);
2428 GO_IF_HARD_REG_EQUAL(used, zero, skip);
2429 bitmap_set_bit (stack_regs, i);
2430 skip:
2433 #endif
2434 FOR_EACH_BB (bb)
2436 bb_info = BB_INFO (bb);
2438 /* Reload can assign the same hard register to uninitialized
2439 pseudo-register and early clobbered pseudo-register in an
2440 insn if the pseudo-register is used first time in given BB
2441 and not lived at the BB start. To prevent this we don't
2442 change life information for such pseudo-registers. */
2443 bitmap_ior_into (bb_info->live_pavin, bb_info->earlyclobber);
2444 #ifdef STACK_REGS
2445 /* We can not use the same stack register for uninitialized
2446 pseudo-register and another living pseudo-register because if the
2447 uninitialized pseudo-register dies, subsequent pass reg-stack
2448 will be confused (it will believe that the other register
2449 dies). */
2450 bitmap_ior_into (bb_info->live_pavin, stack_regs);
2451 #endif
2453 #ifdef STACK_REGS
2454 BITMAP_FREE (stack_regs);
2455 #endif
2458 /* The following function makes live information more accurate by
2459 modifying global_live_at_start and global_live_at_end of basic
2460 blocks.
2462 The standard GCC life analysis permits registers to live
2463 uninitialized, for example:
2465 R is never used
2466 .....
2467 Loop:
2468 R is defined
2470 R is used.
2472 With normal life_analysis, R would be live before "Loop:".
2473 The result is that R causes many interferences that do not
2474 serve any purpose.
2476 After the function call a register lives at a program point
2477 only if it is initialized on a path from CFG entry to the
2478 program point. */
2480 static void
2481 make_accurate_live_analysis (void)
2483 basic_block bb;
2484 struct bb_info *bb_info;
2486 max_regno = max_reg_num ();
2487 compact_blocks ();
2488 allocate_bb_info ();
2489 calculate_local_reg_bb_info ();
2490 set_up_bb_rts_numbers ();
2491 calculate_reg_pav ();
2492 modify_reg_pav ();
2493 FOR_EACH_BB (bb)
2495 bb_info = BB_INFO (bb);
2497 bitmap_and_into (bb->il.rtl->global_live_at_start, bb_info->live_pavin);
2498 bitmap_and_into (bb->il.rtl->global_live_at_end, bb_info->live_pavout);
2500 free_bb_info ();
2502 /* Run old register allocator. Return TRUE if we must exit
2503 rest_of_compilation upon return. */
2504 static void
2505 rest_of_handle_global_alloc (void)
2507 bool failure;
2509 /* If optimizing, allocate remaining pseudo-regs. Do the reload
2510 pass fixing up any insns that are invalid. */
2512 if (optimize)
2513 failure = global_alloc (dump_file);
2514 else
2516 build_insn_chain (get_insns ());
2517 failure = reload (get_insns (), 0);
2520 if (dump_enabled_p (pass_global_alloc.static_pass_number))
2522 timevar_push (TV_DUMP);
2523 dump_global_regs (dump_file);
2524 timevar_pop (TV_DUMP);
2527 gcc_assert (reload_completed || failure);
2528 reload_completed = !failure;
2531 struct tree_opt_pass pass_global_alloc =
2533 "greg", /* name */
2534 NULL, /* gate */
2535 rest_of_handle_global_alloc, /* execute */
2536 NULL, /* sub */
2537 NULL, /* next */
2538 0, /* static_pass_number */
2539 TV_GLOBAL_ALLOC, /* tv_id */
2540 0, /* properties_required */
2541 0, /* properties_provided */
2542 0, /* properties_destroyed */
2543 0, /* todo_flags_start */
2544 TODO_dump_func |
2545 TODO_ggc_collect, /* todo_flags_finish */
2546 'g' /* letter */