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1 /* Local Register Allocator (LRA) intercommunication header file.
2 Copyright (C) 2010-2015 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #ifndef GCC_LRA_INT_H
22 #define GCC_LRA_INT_H
24 #define lra_assert(c) gcc_checking_assert (c)
26 /* The parameter used to prevent infinite reloading for an insn. Each
27 insn operands might require a reload and, if it is a memory, its
28 base and index registers might require a reload too. */
29 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
31 typedef struct lra_live_range *lra_live_range_t;
33 /* The structure describes program points where a given pseudo lives.
34 The live ranges can be used to find conflicts with other pseudos.
35 If the live ranges of two pseudos are intersected, the pseudos are
36 in conflict. */
37 struct lra_live_range
39 /* Pseudo regno whose live range is described by given
40 structure. */
41 int regno;
42 /* Program point range. */
43 int start, finish;
44 /* Next structure describing program points where the pseudo
45 lives. */
46 lra_live_range_t next;
47 /* Pointer to structures with the same start. */
48 lra_live_range_t start_next;
50 /* Pool allocation new operator. */
51 inline void *operator new (size_t)
53 return pool.allocate ();
56 /* Delete operator utilizing pool allocation. */
57 inline void operator delete (void *ptr)
59 pool.remove ((lra_live_range *) ptr);
62 /* Memory allocation pool. */
63 static pool_allocator<lra_live_range> pool;
66 typedef struct lra_copy *lra_copy_t;
68 /* Copy between pseudos which affects assigning hard registers. */
69 struct lra_copy
71 /* True if regno1 is the destination of the copy. */
72 bool regno1_dest_p;
73 /* Execution frequency of the copy. */
74 int freq;
75 /* Pseudos connected by the copy. REGNO1 < REGNO2. */
76 int regno1, regno2;
77 /* Next copy with correspondingly REGNO1 and REGNO2. */
78 lra_copy_t regno1_next, regno2_next;
80 /* Pool allocation new operator. */
81 inline void *operator new (size_t)
83 return pool.allocate ();
86 /* Delete operator utilizing pool allocation. */
87 inline void operator delete (void *ptr)
89 pool.remove ((lra_copy *) ptr);
92 /* Memory allocation pool. */
93 static pool_allocator<lra_copy> pool;
97 /* Common info about a register (pseudo or hard register). */
98 struct lra_reg
100 /* Bitmap of UIDs of insns (including debug insns) referring the
101 reg. */
102 bitmap_head insn_bitmap;
103 /* The following fields are defined only for pseudos. */
104 /* Hard registers with which the pseudo conflicts. */
105 HARD_REG_SET conflict_hard_regs;
106 /* Call used registers with which the pseudo conflicts, taking into account
107 the registers used by functions called from calls which cross the
108 pseudo. */
109 HARD_REG_SET actual_call_used_reg_set;
110 /* We assign hard registers to reload pseudos which can occur in few
111 places. So two hard register preferences are enough for them.
112 The following fields define the preferred hard registers. If
113 there are no such hard registers the first field value is
114 negative. If there is only one preferred hard register, the 2nd
115 field is negative. */
116 int preferred_hard_regno1, preferred_hard_regno2;
117 /* Profits to use the corresponding preferred hard registers. If
118 the both hard registers defined, the first hard register has not
119 less profit than the second one. */
120 int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
121 #ifdef STACK_REGS
122 /* True if the pseudo should not be assigned to a stack register. */
123 bool no_stack_p;
124 #endif
125 #ifdef ENABLE_CHECKING
126 /* True if the pseudo crosses a call. It is setup in lra-lives.c
127 and used to check that the pseudo crossing a call did not get a
128 call used hard register. */
129 bool call_p;
130 #endif
131 /* Number of references and execution frequencies of the register in
132 *non-debug* insns. */
133 int nrefs, freq;
134 int last_reload;
135 /* Regno used to undo the inheritance. It can be non-zero only
136 between couple of inheritance and undo inheritance passes. */
137 int restore_regno;
138 /* Value holding by register. If the pseudos have the same value
139 they do not conflict. */
140 int val;
141 /* Offset from relative eliminate register to pesudo reg. */
142 int offset;
143 /* These members are set up in lra-lives.c and updated in
144 lra-coalesce.c. */
145 /* The biggest size mode in which each pseudo reg is referred in
146 whole function (possibly via subreg). */
147 machine_mode biggest_mode;
148 /* Live ranges of the pseudo. */
149 lra_live_range_t live_ranges;
150 /* This member is set up in lra-lives.c for subsequent
151 assignments. */
152 lra_copy_t copies;
155 /* References to the common info about each register. */
156 extern struct lra_reg *lra_reg_info;
158 /* Static info about each insn operand (common for all insns with the
159 same ICODE). Warning: if the structure definition is changed, the
160 initializer for debug_operand_data in lra.c should be changed
161 too. */
162 struct lra_operand_data
164 /* The machine description constraint string of the operand. */
165 const char *constraint;
166 /* It is taken only from machine description (which is different
167 from recog_data.operand_mode) and can be of VOIDmode. */
168 ENUM_BITFIELD(machine_mode) mode : 16;
169 /* The type of the operand (in/out/inout). */
170 ENUM_BITFIELD (op_type) type : 8;
171 /* Through if accessed through STRICT_LOW. */
172 unsigned int strict_low : 1;
173 /* True if the operand is an operator. */
174 unsigned int is_operator : 1;
175 /* True if there is an early clobber alternative for this operand.
176 This field is set up every time when corresponding
177 operand_alternative in lra_static_insn_data is set up. */
178 unsigned int early_clobber : 1;
179 /* True if the operand is an address. */
180 unsigned int is_address : 1;
183 /* Info about register occurrence in an insn. */
184 struct lra_insn_reg
186 /* The biggest mode through which the insn refers to the register
187 occurrence (remember the register can be accessed through a
188 subreg in the insn). */
189 ENUM_BITFIELD(machine_mode) biggest_mode : 16;
190 /* The type of the corresponding operand which is the register. */
191 ENUM_BITFIELD (op_type) type : 8;
192 /* True if the reg is accessed through a subreg and the subreg is
193 just a part of the register. */
194 unsigned int subreg_p : 1;
195 /* True if there is an early clobber alternative for this
196 operand. */
197 unsigned int early_clobber : 1;
198 /* The corresponding regno of the register. */
199 int regno;
200 /* Next reg info of the same insn. */
201 struct lra_insn_reg *next;
203 /* Pool allocation new operator. */
204 inline void *operator new (size_t)
206 return pool.allocate ();
209 /* Delete operator utilizing pool allocation. */
210 inline void operator delete (void *ptr)
212 pool.remove ((lra_insn_reg *) ptr);
215 /* Memory allocation pool. */
216 static pool_allocator<lra_insn_reg> pool;
219 /* Static part (common info for insns with the same ICODE) of LRA
220 internal insn info. It exists in at most one exemplar for each
221 non-negative ICODE. There is only one exception. Each asm insn has
222 own structure. Warning: if the structure definition is changed,
223 the initializer for debug_insn_static_data in lra.c should be
224 changed too. */
225 struct lra_static_insn_data
227 /* Static info about each insn operand. */
228 struct lra_operand_data *operand;
229 /* Each duplication refers to the number of the corresponding
230 operand which is duplicated. */
231 int *dup_num;
232 /* The number of an operand marked as commutative, -1 otherwise. */
233 int commutative;
234 /* Number of operands, duplications, and alternatives of the
235 insn. */
236 char n_operands;
237 char n_dups;
238 char n_alternatives;
239 /* Insns in machine description (or clobbers in asm) may contain
240 explicit hard regs which are not operands. The following list
241 describes such hard registers. */
242 struct lra_insn_reg *hard_regs;
243 /* Array [n_alternatives][n_operand] of static constraint info for
244 given operand in given alternative. This info can be changed if
245 the target reg info is changed. */
246 const struct operand_alternative *operand_alternative;
249 /* LRA internal info about an insn (LRA internal insn
250 representation). */
251 struct lra_insn_recog_data
253 /* The insn code. */
254 int icode;
255 /* The alternative should be used for the insn, -1 if invalid, or we
256 should try to use any alternative, or the insn is a debug
257 insn. */
258 int used_insn_alternative;
259 /* SP offset before the insn relative to one at the func start. */
260 HOST_WIDE_INT sp_offset;
261 /* The insn itself. */
262 rtx_insn *insn;
263 /* Common data for insns with the same ICODE. Asm insns (their
264 ICODE is negative) do not share such structures. */
265 struct lra_static_insn_data *insn_static_data;
266 /* Two arrays of size correspondingly equal to the operand and the
267 duplication numbers: */
268 rtx **operand_loc; /* The operand locations, NULL if no operands. */
269 rtx **dup_loc; /* The dup locations, NULL if no dups. */
270 /* Number of hard registers implicitly used/clobbered in given call
271 insn. The value can be NULL or points to array of the hard
272 register numbers ending with a negative value. To differ
273 clobbered and used hard regs, clobbered hard regs are incremented
274 by FIRST_PSEUDO_REGISTER. */
275 int *arg_hard_regs;
276 /* Cached value of get_preferred_alternatives. */
277 alternative_mask preferred_alternatives;
278 /* The following member value is always NULL for a debug insn. */
279 struct lra_insn_reg *regs;
282 typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
284 /* Whether the clobber is used temporary in LRA. */
285 #define LRA_TEMP_CLOBBER_P(x) \
286 (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
288 /* Cost factor for each additional reload and maximal cost reject for
289 insn reloads. One might ask about such strange numbers. Their
290 values occurred historically from former reload pass. */
291 #define LRA_LOSER_COST_FACTOR 6
292 #define LRA_MAX_REJECT 600
294 /* Maximum allowed number of assignment pass iterations after the
295 latest spill pass when any former reload pseudo was spilled. It is
296 for preventing LRA cycling in a bug case. */
297 #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30
299 /* The maximal number of inheritance/split passes in LRA. It should
300 be more 1 in order to perform caller saves transformations and much
301 less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
302 as permitted constraint passes in some complicated cases. The
303 first inheritance/split pass has a biggest impact on generated code
304 quality. Each subsequent affects generated code in less degree.
305 For example, the 3rd pass does not change generated SPEC2000 code
306 at all on x86-64. */
307 #define LRA_MAX_INHERITANCE_PASSES 2
309 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
310 || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
311 #error wrong LRA_MAX_INHERITANCE_PASSES value
312 #endif
314 /* Analogous macro to the above one but for rematerialization. */
315 #define LRA_MAX_REMATERIALIZATION_PASSES 2
317 #if LRA_MAX_REMATERIALIZATION_PASSES <= 0 \
318 || LRA_MAX_REMATERIALIZATION_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
319 #error wrong LRA_MAX_REMATERIALIZATION_PASSES value
320 #endif
322 /* lra.c: */
324 extern FILE *lra_dump_file;
326 extern bool lra_reg_spill_p;
328 extern HARD_REG_SET lra_no_alloc_regs;
330 extern int lra_insn_recog_data_len;
331 extern lra_insn_recog_data_t *lra_insn_recog_data;
333 extern int lra_curr_reload_num;
335 extern void lra_dump_bitmap_with_title (const char *, bitmap, int);
336 extern void lra_push_insn (rtx_insn *);
337 extern void lra_push_insn_by_uid (unsigned int);
338 extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *);
339 extern rtx_insn *lra_pop_insn (void);
340 extern unsigned int lra_insn_stack_length (void);
342 extern rtx lra_create_new_reg_with_unique_value (machine_mode, rtx,
343 enum reg_class, const char *);
344 extern void lra_set_regno_unique_value (int);
345 extern void lra_invalidate_insn_data (rtx_insn *);
346 extern void lra_set_insn_deleted (rtx_insn *);
347 extern void lra_delete_dead_insn (rtx_insn *);
348 extern void lra_emit_add (rtx, rtx, rtx);
349 extern void lra_emit_move (rtx, rtx);
350 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
352 extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *,
353 const char *);
355 extern bool lra_substitute_pseudo (rtx *, int, rtx, bool);
356 extern bool lra_substitute_pseudo_within_insn (rtx_insn *, int, rtx, bool);
358 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *);
359 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *);
360 extern void lra_set_used_insn_alternative (rtx_insn *, int);
361 extern void lra_set_used_insn_alternative_by_uid (int, int);
363 extern void lra_invalidate_insn_regno_info (rtx_insn *);
364 extern void lra_update_insn_regno_info (rtx_insn *);
365 extern struct lra_insn_reg *lra_get_insn_regs (int);
367 extern void lra_free_copies (void);
368 extern void lra_create_copy (int, int, int);
369 extern lra_copy_t lra_get_copy (int);
370 extern bool lra_former_scratch_p (int);
371 extern bool lra_former_scratch_operand_p (rtx_insn *, int);
372 extern void lra_register_new_scratch_op (rtx_insn *, int);
374 extern int lra_new_regno_start;
375 extern int lra_constraint_new_regno_start;
376 extern int lra_bad_spill_regno_start;
377 extern bitmap_head lra_inheritance_pseudos;
378 extern bitmap_head lra_split_regs;
379 extern bitmap_head lra_subreg_reload_pseudos;
380 extern bitmap_head lra_optional_reload_pseudos;
382 /* lra-constraints.c: */
384 extern void lra_init_equiv (void);
385 extern int lra_constraint_offset (int, machine_mode);
387 extern int lra_constraint_iter;
388 extern bool lra_risky_transformations_p;
389 extern int lra_inheritance_iter;
390 extern int lra_undo_inheritance_iter;
391 extern bool lra_constrain_insn (rtx_insn *);
392 extern bool lra_constraints (bool);
393 extern void lra_constraints_init (void);
394 extern void lra_constraints_finish (void);
395 extern void lra_inheritance (void);
396 extern bool lra_undo_inheritance (void);
398 /* lra-lives.c: */
400 extern int lra_live_max_point;
401 extern int *lra_point_freq;
403 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
405 extern int lra_live_range_iter;
406 extern void lra_create_live_ranges (bool, bool);
407 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
408 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
409 lra_live_range_t);
410 extern bool lra_intersected_live_ranges_p (lra_live_range_t,
411 lra_live_range_t);
412 extern void lra_print_live_range_list (FILE *, lra_live_range_t);
413 extern void debug (lra_live_range &ref);
414 extern void debug (lra_live_range *ptr);
415 extern void lra_debug_live_range_list (lra_live_range_t);
416 extern void lra_debug_pseudo_live_ranges (int);
417 extern void lra_debug_live_ranges (void);
418 extern void lra_clear_live_ranges (void);
419 extern void lra_live_ranges_init (void);
420 extern void lra_live_ranges_finish (void);
421 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
423 /* lra-assigns.c: */
425 extern int lra_assignment_iter;
426 extern int lra_assignment_iter_after_spill;
427 extern void lra_setup_reg_renumber (int, int, bool);
428 extern bool lra_assign (void);
431 /* lra-coalesce.c: */
433 extern int lra_coalesce_iter;
434 extern bool lra_coalesce (void);
436 /* lra-spills.c: */
438 extern bool lra_need_for_spills_p (void);
439 extern void lra_spill (void);
440 extern void lra_final_code_change (void);
442 /* lra-remat.c: */
444 extern int lra_rematerialization_iter;
445 extern bool lra_remat (void);
447 /* lra-elimination.c: */
449 extern void lra_debug_elim_table (void);
450 extern int lra_get_elimination_hard_regno (int);
451 extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, machine_mode,
452 bool, bool, HOST_WIDE_INT, bool);
453 extern void eliminate_regs_in_insn (rtx_insn *insn, bool, bool, HOST_WIDE_INT);
454 extern void lra_eliminate (bool, bool);
456 extern void lra_eliminate_reg_if_possible (rtx *);
460 /* Return the hard register which given pseudo REGNO assigned to.
461 Negative value means that the register got memory or we don't know
462 allocation yet. */
463 static inline int
464 lra_get_regno_hard_regno (int regno)
466 resize_reg_info ();
467 return reg_renumber[regno];
470 /* Change class of pseudo REGNO to NEW_CLASS. Print info about it
471 using TITLE. Output a new line if NL_P. */
472 static void inline
473 lra_change_class (int regno, enum reg_class new_class,
474 const char *title, bool nl_p)
476 lra_assert (regno >= FIRST_PSEUDO_REGISTER);
477 if (lra_dump_file != NULL)
478 fprintf (lra_dump_file, "%s class %s for r%d",
479 title, reg_class_names[new_class], regno);
480 setup_reg_classes (regno, new_class, NO_REGS, new_class);
481 if (lra_dump_file != NULL && nl_p)
482 fprintf (lra_dump_file, "\n");
485 /* Update insn operands which are duplication of NOP operand. The
486 insn is represented by its LRA internal representation ID. */
487 static inline void
488 lra_update_dup (lra_insn_recog_data_t id, int nop)
490 int i;
491 struct lra_static_insn_data *static_id = id->insn_static_data;
493 for (i = 0; i < static_id->n_dups; i++)
494 if (static_id->dup_num[i] == nop)
495 *id->dup_loc[i] = *id->operand_loc[nop];
498 /* Process operator duplications in insn with ID. We do it after the
499 operands processing. Generally speaking, we could do this probably
500 simultaneously with operands processing because a common practice
501 is to enumerate the operators after their operands. */
502 static inline void
503 lra_update_operator_dups (lra_insn_recog_data_t id)
505 int i;
506 struct lra_static_insn_data *static_id = id->insn_static_data;
508 for (i = 0; i < static_id->n_dups; i++)
510 int ndup = static_id->dup_num[i];
512 if (static_id->operand[ndup].is_operator)
513 *id->dup_loc[i] = *id->operand_loc[ndup];
517 /* Return info about INSN. Set up the info if it is not done yet. */
518 static inline lra_insn_recog_data_t
519 lra_get_insn_recog_data (rtx_insn *insn)
521 lra_insn_recog_data_t data;
522 unsigned int uid = INSN_UID (insn);
524 if (lra_insn_recog_data_len > (int) uid
525 && (data = lra_insn_recog_data[uid]) != NULL)
527 /* Check that we did not change insn without updating the insn
528 info. */
529 lra_assert (data->insn == insn
530 && (INSN_CODE (insn) < 0
531 || data->icode == INSN_CODE (insn)));
532 return data;
534 return lra_set_insn_recog_data (insn);
537 /* Update offset from pseudos with VAL by INCR. */
538 static inline void
539 lra_update_reg_val_offset (int val, int incr)
541 int i;
543 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
545 if (lra_reg_info[i].val == val)
546 lra_reg_info[i].offset += incr;
550 /* Return true if register content is equal to VAL with OFFSET. */
551 static inline bool
552 lra_reg_val_equal_p (int regno, int val, int offset)
554 if (lra_reg_info[regno].val == val
555 && lra_reg_info[regno].offset == offset)
556 return true;
558 return false;
561 /* Assign value of register FROM to TO. */
562 static inline void
563 lra_assign_reg_val (int from, int to)
565 lra_reg_info[to].val = lra_reg_info[from].val;
566 lra_reg_info[to].offset = lra_reg_info[from].offset;
569 #endif /* GCC_LRA_INT_H */