Fix bootstrap/PR63632
[official-gcc.git] / gcc / config / i386 / i386-c.c
bloba3858edb2407c3941c8875ce28ffff141395393c
1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "tree.h"
25 #include "tm_p.h"
26 #include "flags.h"
27 #include "c-family/c-common.h"
28 #include "ggc.h"
29 #include "target.h"
30 #include "target-def.h"
31 #include "cpplib.h"
32 #include "c-family/c-pragma.h"
34 static bool ix86_pragma_target_parse (tree, tree);
35 static void ix86_target_macros_internal
36 (HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
37 void (*def_or_undef) (cpp_reader *, const char *));
40 /* Internal function to either define or undef the appropriate system
41 macros. */
42 static void
43 ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
44 enum processor_type arch,
45 enum processor_type tune,
46 enum fpmath_unit fpmath,
47 void (*def_or_undef) (cpp_reader *,
48 const char *))
50 /* For some of the k6/pentium varients there weren't separate ISA bits to
51 identify which tune/arch flag was passed, so figure it out here. */
52 size_t arch_len = strlen (ix86_arch_string);
53 size_t tune_len = strlen (ix86_tune_string);
54 int last_arch_char = ix86_arch_string[arch_len - 1];
55 int last_tune_char = ix86_tune_string[tune_len - 1];
57 /* Built-ins based on -march=. */
58 switch (arch)
60 case PROCESSOR_I386:
61 break;
62 case PROCESSOR_I486:
63 def_or_undef (parse_in, "__i486");
64 def_or_undef (parse_in, "__i486__");
65 break;
66 case PROCESSOR_PENTIUM:
67 def_or_undef (parse_in, "__i586");
68 def_or_undef (parse_in, "__i586__");
69 def_or_undef (parse_in, "__pentium");
70 def_or_undef (parse_in, "__pentium__");
71 if (isa_flag & OPTION_MASK_ISA_MMX)
72 def_or_undef (parse_in, "__pentium_mmx__");
73 break;
74 case PROCESSOR_PENTIUMPRO:
75 def_or_undef (parse_in, "__i686");
76 def_or_undef (parse_in, "__i686__");
77 def_or_undef (parse_in, "__pentiumpro");
78 def_or_undef (parse_in, "__pentiumpro__");
79 break;
80 case PROCESSOR_GEODE:
81 def_or_undef (parse_in, "__geode");
82 def_or_undef (parse_in, "__geode__");
83 break;
84 case PROCESSOR_K6:
85 def_or_undef (parse_in, "__k6");
86 def_or_undef (parse_in, "__k6__");
87 if (last_arch_char == '2')
88 def_or_undef (parse_in, "__k6_2__");
89 else if (last_arch_char == '3')
90 def_or_undef (parse_in, "__k6_3__");
91 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
92 def_or_undef (parse_in, "__k6_3__");
93 break;
94 case PROCESSOR_ATHLON:
95 def_or_undef (parse_in, "__athlon");
96 def_or_undef (parse_in, "__athlon__");
97 if (isa_flag & OPTION_MASK_ISA_SSE)
98 def_or_undef (parse_in, "__athlon_sse__");
99 break;
100 case PROCESSOR_K8:
101 def_or_undef (parse_in, "__k8");
102 def_or_undef (parse_in, "__k8__");
103 break;
104 case PROCESSOR_AMDFAM10:
105 def_or_undef (parse_in, "__amdfam10");
106 def_or_undef (parse_in, "__amdfam10__");
107 break;
108 case PROCESSOR_BDVER1:
109 def_or_undef (parse_in, "__bdver1");
110 def_or_undef (parse_in, "__bdver1__");
111 break;
112 case PROCESSOR_BDVER2:
113 def_or_undef (parse_in, "__bdver2");
114 def_or_undef (parse_in, "__bdver2__");
115 break;
116 case PROCESSOR_BDVER3:
117 def_or_undef (parse_in, "__bdver3");
118 def_or_undef (parse_in, "__bdver3__");
119 break;
120 case PROCESSOR_BDVER4:
121 def_or_undef (parse_in, "__bdver4");
122 def_or_undef (parse_in, "__bdver4__");
123 break;
124 case PROCESSOR_BTVER1:
125 def_or_undef (parse_in, "__btver1");
126 def_or_undef (parse_in, "__btver1__");
127 break;
128 case PROCESSOR_BTVER2:
129 def_or_undef (parse_in, "__btver2");
130 def_or_undef (parse_in, "__btver2__");
131 break;
132 case PROCESSOR_PENTIUM4:
133 def_or_undef (parse_in, "__pentium4");
134 def_or_undef (parse_in, "__pentium4__");
135 break;
136 case PROCESSOR_NOCONA:
137 def_or_undef (parse_in, "__nocona");
138 def_or_undef (parse_in, "__nocona__");
139 break;
140 case PROCESSOR_CORE2:
141 def_or_undef (parse_in, "__core2");
142 def_or_undef (parse_in, "__core2__");
143 break;
144 case PROCESSOR_NEHALEM:
145 def_or_undef (parse_in, "__corei7");
146 def_or_undef (parse_in, "__corei7__");
147 def_or_undef (parse_in, "__nehalem");
148 def_or_undef (parse_in, "__nehalem__");
149 break;
150 case PROCESSOR_SANDYBRIDGE:
151 def_or_undef (parse_in, "__corei7_avx");
152 def_or_undef (parse_in, "__corei7_avx__");
153 def_or_undef (parse_in, "__sandybridge");
154 def_or_undef (parse_in, "__sandybridge__");
155 break;
156 case PROCESSOR_HASWELL:
157 def_or_undef (parse_in, "__core_avx2");
158 def_or_undef (parse_in, "__core_avx2__");
159 def_or_undef (parse_in, "__haswell");
160 def_or_undef (parse_in, "__haswell__");
161 break;
162 case PROCESSOR_BONNELL:
163 def_or_undef (parse_in, "__atom");
164 def_or_undef (parse_in, "__atom__");
165 def_or_undef (parse_in, "__bonnell");
166 def_or_undef (parse_in, "__bonnell__");
167 break;
168 case PROCESSOR_SILVERMONT:
169 def_or_undef (parse_in, "__slm");
170 def_or_undef (parse_in, "__slm__");
171 def_or_undef (parse_in, "__silvermont");
172 def_or_undef (parse_in, "__silvermont__");
173 break;
174 /* use PROCESSOR_max to not set/unset the arch macro. */
175 case PROCESSOR_max:
176 break;
177 case PROCESSOR_INTEL:
178 case PROCESSOR_GENERIC:
179 gcc_unreachable ();
182 /* Built-ins based on -mtune=. */
183 switch (tune)
185 case PROCESSOR_I386:
186 def_or_undef (parse_in, "__tune_i386__");
187 break;
188 case PROCESSOR_I486:
189 def_or_undef (parse_in, "__tune_i486__");
190 break;
191 case PROCESSOR_PENTIUM:
192 def_or_undef (parse_in, "__tune_i586__");
193 def_or_undef (parse_in, "__tune_pentium__");
194 if (last_tune_char == 'x')
195 def_or_undef (parse_in, "__tune_pentium_mmx__");
196 break;
197 case PROCESSOR_PENTIUMPRO:
198 def_or_undef (parse_in, "__tune_i686__");
199 def_or_undef (parse_in, "__tune_pentiumpro__");
200 switch (last_tune_char)
202 case '3':
203 def_or_undef (parse_in, "__tune_pentium3__");
204 /* FALLTHRU */
205 case '2':
206 def_or_undef (parse_in, "__tune_pentium2__");
207 break;
209 break;
210 case PROCESSOR_GEODE:
211 def_or_undef (parse_in, "__tune_geode__");
212 break;
213 case PROCESSOR_K6:
214 def_or_undef (parse_in, "__tune_k6__");
215 if (last_tune_char == '2')
216 def_or_undef (parse_in, "__tune_k6_2__");
217 else if (last_tune_char == '3')
218 def_or_undef (parse_in, "__tune_k6_3__");
219 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
220 def_or_undef (parse_in, "__tune_k6_3__");
221 break;
222 case PROCESSOR_ATHLON:
223 def_or_undef (parse_in, "__tune_athlon__");
224 if (isa_flag & OPTION_MASK_ISA_SSE)
225 def_or_undef (parse_in, "__tune_athlon_sse__");
226 break;
227 case PROCESSOR_K8:
228 def_or_undef (parse_in, "__tune_k8__");
229 break;
230 case PROCESSOR_AMDFAM10:
231 def_or_undef (parse_in, "__tune_amdfam10__");
232 break;
233 case PROCESSOR_BDVER1:
234 def_or_undef (parse_in, "__tune_bdver1__");
235 break;
236 case PROCESSOR_BDVER2:
237 def_or_undef (parse_in, "__tune_bdver2__");
238 break;
239 case PROCESSOR_BDVER3:
240 def_or_undef (parse_in, "__tune_bdver3__");
241 break;
242 case PROCESSOR_BDVER4:
243 def_or_undef (parse_in, "__tune_bdver4__");
244 break;
245 case PROCESSOR_BTVER1:
246 def_or_undef (parse_in, "__tune_btver1__");
247 break;
248 case PROCESSOR_BTVER2:
249 def_or_undef (parse_in, "__tune_btver2__");
250 break;
251 case PROCESSOR_PENTIUM4:
252 def_or_undef (parse_in, "__tune_pentium4__");
253 break;
254 case PROCESSOR_NOCONA:
255 def_or_undef (parse_in, "__tune_nocona__");
256 break;
257 case PROCESSOR_CORE2:
258 def_or_undef (parse_in, "__tune_core2__");
259 break;
260 case PROCESSOR_NEHALEM:
261 def_or_undef (parse_in, "__tune_corei7__");
262 def_or_undef (parse_in, "__tune_nehalem__");
263 break;
264 case PROCESSOR_SANDYBRIDGE:
265 def_or_undef (parse_in, "__tune_corei7_avx__");
266 def_or_undef (parse_in, "__tune_sandybridge__");
267 break;
268 case PROCESSOR_HASWELL:
269 def_or_undef (parse_in, "__tune_core_avx2__");
270 def_or_undef (parse_in, "__tune_haswell__");
271 break;
272 case PROCESSOR_BONNELL:
273 def_or_undef (parse_in, "__tune_atom__");
274 def_or_undef (parse_in, "__tune_bonnell__");
275 break;
276 case PROCESSOR_SILVERMONT:
277 def_or_undef (parse_in, "__tune_slm__");
278 def_or_undef (parse_in, "__tune_silvermont__");
279 break;
280 case PROCESSOR_INTEL:
281 case PROCESSOR_GENERIC:
282 break;
283 /* use PROCESSOR_max to not set/unset the tune macro. */
284 case PROCESSOR_max:
285 break;
288 switch (ix86_cmodel)
290 case CM_SMALL:
291 case CM_SMALL_PIC:
292 def_or_undef (parse_in, "__code_model_small__");
293 break;
294 case CM_MEDIUM:
295 case CM_MEDIUM_PIC:
296 def_or_undef (parse_in, "__code_model_medium__");
297 break;
298 case CM_LARGE:
299 case CM_LARGE_PIC:
300 def_or_undef (parse_in, "__code_model_large__");
301 break;
302 case CM_32:
303 def_or_undef (parse_in, "__code_model_32__");
304 break;
305 case CM_KERNEL:
306 def_or_undef (parse_in, "__code_model_kernel__");
307 break;
308 default:
312 if (isa_flag & OPTION_MASK_ISA_MMX)
313 def_or_undef (parse_in, "__MMX__");
314 if (isa_flag & OPTION_MASK_ISA_3DNOW)
315 def_or_undef (parse_in, "__3dNOW__");
316 if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
317 def_or_undef (parse_in, "__3dNOW_A__");
318 if (isa_flag & OPTION_MASK_ISA_SSE)
319 def_or_undef (parse_in, "__SSE__");
320 if (isa_flag & OPTION_MASK_ISA_SSE2)
321 def_or_undef (parse_in, "__SSE2__");
322 if (isa_flag & OPTION_MASK_ISA_SSE3)
323 def_or_undef (parse_in, "__SSE3__");
324 if (isa_flag & OPTION_MASK_ISA_SSSE3)
325 def_or_undef (parse_in, "__SSSE3__");
326 if (isa_flag & OPTION_MASK_ISA_SSE4_1)
327 def_or_undef (parse_in, "__SSE4_1__");
328 if (isa_flag & OPTION_MASK_ISA_SSE4_2)
329 def_or_undef (parse_in, "__SSE4_2__");
330 if (isa_flag & OPTION_MASK_ISA_AES)
331 def_or_undef (parse_in, "__AES__");
332 if (isa_flag & OPTION_MASK_ISA_SHA)
333 def_or_undef (parse_in, "__SHA__");
334 if (isa_flag & OPTION_MASK_ISA_PCLMUL)
335 def_or_undef (parse_in, "__PCLMUL__");
336 if (isa_flag & OPTION_MASK_ISA_AVX)
337 def_or_undef (parse_in, "__AVX__");
338 if (isa_flag & OPTION_MASK_ISA_AVX2)
339 def_or_undef (parse_in, "__AVX2__");
340 if (isa_flag & OPTION_MASK_ISA_AVX512F)
341 def_or_undef (parse_in, "__AVX512F__");
342 if (isa_flag & OPTION_MASK_ISA_AVX512ER)
343 def_or_undef (parse_in, "__AVX512ER__");
344 if (isa_flag & OPTION_MASK_ISA_AVX512CD)
345 def_or_undef (parse_in, "__AVX512CD__");
346 if (isa_flag & OPTION_MASK_ISA_AVX512PF)
347 def_or_undef (parse_in, "__AVX512PF__");
348 if (isa_flag & OPTION_MASK_ISA_AVX512DQ)
349 def_or_undef (parse_in, "__AVX512DQ__");
350 if (isa_flag & OPTION_MASK_ISA_AVX512BW)
351 def_or_undef (parse_in, "__AVX512BW__");
352 if (isa_flag & OPTION_MASK_ISA_AVX512VL)
353 def_or_undef (parse_in, "__AVX512VL__");
354 if (isa_flag & OPTION_MASK_ISA_FMA)
355 def_or_undef (parse_in, "__FMA__");
356 if (isa_flag & OPTION_MASK_ISA_RTM)
357 def_or_undef (parse_in, "__RTM__");
358 if (isa_flag & OPTION_MASK_ISA_SSE4A)
359 def_or_undef (parse_in, "__SSE4A__");
360 if (isa_flag & OPTION_MASK_ISA_FMA4)
361 def_or_undef (parse_in, "__FMA4__");
362 if (isa_flag & OPTION_MASK_ISA_XOP)
363 def_or_undef (parse_in, "__XOP__");
364 if (isa_flag & OPTION_MASK_ISA_LWP)
365 def_or_undef (parse_in, "__LWP__");
366 if (isa_flag & OPTION_MASK_ISA_ABM)
367 def_or_undef (parse_in, "__ABM__");
368 if (isa_flag & OPTION_MASK_ISA_BMI)
369 def_or_undef (parse_in, "__BMI__");
370 if (isa_flag & OPTION_MASK_ISA_BMI2)
371 def_or_undef (parse_in, "__BMI2__");
372 if (isa_flag & OPTION_MASK_ISA_LZCNT)
373 def_or_undef (parse_in, "__LZCNT__");
374 if (isa_flag & OPTION_MASK_ISA_TBM)
375 def_or_undef (parse_in, "__TBM__");
376 if (isa_flag & OPTION_MASK_ISA_POPCNT)
377 def_or_undef (parse_in, "__POPCNT__");
378 if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
379 def_or_undef (parse_in, "__FSGSBASE__");
380 if (isa_flag & OPTION_MASK_ISA_RDRND)
381 def_or_undef (parse_in, "__RDRND__");
382 if (isa_flag & OPTION_MASK_ISA_F16C)
383 def_or_undef (parse_in, "__F16C__");
384 if (isa_flag & OPTION_MASK_ISA_RDSEED)
385 def_or_undef (parse_in, "__RDSEED__");
386 if (isa_flag & OPTION_MASK_ISA_PRFCHW)
387 def_or_undef (parse_in, "__PRFCHW__");
388 if (isa_flag & OPTION_MASK_ISA_ADX)
389 def_or_undef (parse_in, "__ADX__");
390 if (isa_flag & OPTION_MASK_ISA_FXSR)
391 def_or_undef (parse_in, "__FXSR__");
392 if (isa_flag & OPTION_MASK_ISA_XSAVE)
393 def_or_undef (parse_in, "__XSAVE__");
394 if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
395 def_or_undef (parse_in, "__XSAVEOPT__");
396 if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1)
397 def_or_undef (parse_in, "__PREFETCHWT1__");
398 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
399 def_or_undef (parse_in, "__SSE_MATH__");
400 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
401 def_or_undef (parse_in, "__SSE2_MATH__");
402 if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
403 def_or_undef (parse_in, "__CLFLUSHOPT__");
404 if (isa_flag & OPTION_MASK_ISA_XSAVEC)
405 def_or_undef (parse_in, "__XSAVEC__");
406 if (isa_flag & OPTION_MASK_ISA_XSAVES)
407 def_or_undef (parse_in, "__XSAVES__");
411 /* Hook to validate the current #pragma GCC target and set the state, and
412 update the macros based on what was changed. If ARGS is NULL, then
413 POP_TARGET is used to reset the options. */
415 static bool
416 ix86_pragma_target_parse (tree args, tree pop_target)
418 tree prev_tree = build_target_option_node (&global_options);
419 tree cur_tree;
420 struct cl_target_option *prev_opt;
421 struct cl_target_option *cur_opt;
422 HOST_WIDE_INT prev_isa;
423 HOST_WIDE_INT cur_isa;
424 HOST_WIDE_INT diff_isa;
425 enum processor_type prev_arch;
426 enum processor_type prev_tune;
427 enum processor_type cur_arch;
428 enum processor_type cur_tune;
430 if (! args)
432 cur_tree = (pop_target ? pop_target : target_option_default_node);
433 cl_target_option_restore (&global_options,
434 TREE_TARGET_OPTION (cur_tree));
436 else
438 cur_tree = ix86_valid_target_attribute_tree (args, &global_options,
439 &global_options_set);
440 if (!cur_tree || cur_tree == error_mark_node)
442 cl_target_option_restore (&global_options,
443 TREE_TARGET_OPTION (prev_tree));
444 return false;
448 target_option_current_node = cur_tree;
449 ix86_reset_previous_fndecl ();
451 /* Figure out the previous/current isa, arch, tune and the differences. */
452 prev_opt = TREE_TARGET_OPTION (prev_tree);
453 cur_opt = TREE_TARGET_OPTION (cur_tree);
454 prev_isa = prev_opt->x_ix86_isa_flags;
455 cur_isa = cur_opt->x_ix86_isa_flags;
456 diff_isa = (prev_isa ^ cur_isa);
457 prev_arch = (enum processor_type) prev_opt->arch;
458 prev_tune = (enum processor_type) prev_opt->tune;
459 cur_arch = (enum processor_type) cur_opt->arch;
460 cur_tune = (enum processor_type) cur_opt->tune;
462 /* If the same processor is used for both previous and current options, don't
463 change the macros. */
464 if (cur_arch == prev_arch)
465 cur_arch = prev_arch = PROCESSOR_max;
467 if (cur_tune == prev_tune)
468 cur_tune = prev_tune = PROCESSOR_max;
470 /* Undef all of the macros for that are no longer current. */
471 ix86_target_macros_internal (prev_isa & diff_isa,
472 prev_arch,
473 prev_tune,
474 (enum fpmath_unit) prev_opt->x_ix86_fpmath,
475 cpp_undef);
477 /* For the definitions, ensure all newly defined macros are considered
478 as used for -Wunused-macros. There is no point warning about the
479 compiler predefined macros. */
480 cpp_options *cpp_opts = cpp_get_options (parse_in);
481 unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
482 cpp_opts->warn_unused_macros = 0;
484 /* Define all of the macros for new options that were just turned on. */
485 ix86_target_macros_internal (cur_isa & diff_isa,
486 cur_arch,
487 cur_tune,
488 (enum fpmath_unit) cur_opt->x_ix86_fpmath,
489 cpp_define);
491 cpp_opts->warn_unused_macros = saved_warn_unused_macros;
493 return true;
496 /* Function to tell the preprocessor about the defines for the current target. */
498 void
499 ix86_target_macros (void)
501 /* 32/64-bit won't change with target specific options, so do the assert and
502 builtin_define_std calls here. */
503 if (TARGET_64BIT)
505 cpp_assert (parse_in, "cpu=x86_64");
506 cpp_assert (parse_in, "machine=x86_64");
507 cpp_define (parse_in, "__amd64");
508 cpp_define (parse_in, "__amd64__");
509 cpp_define (parse_in, "__x86_64");
510 cpp_define (parse_in, "__x86_64__");
511 if (TARGET_X32)
513 cpp_define (parse_in, "_ILP32");
514 cpp_define (parse_in, "__ILP32__");
517 else
519 cpp_assert (parse_in, "cpu=i386");
520 cpp_assert (parse_in, "machine=i386");
521 builtin_define_std ("i386");
524 if (!TARGET_80387)
525 cpp_define (parse_in, "_SOFT_FLOAT");
527 if (TARGET_LONG_DOUBLE_64)
528 cpp_define (parse_in, "__LONG_DOUBLE_64__");
530 if (TARGET_LONG_DOUBLE_128)
531 cpp_define (parse_in, "__LONG_DOUBLE_128__");
533 if (TARGET_128BIT_LONG_DOUBLE)
534 cpp_define (parse_in, "__SIZEOF_FLOAT80__=16");
535 else
536 cpp_define (parse_in, "__SIZEOF_FLOAT80__=12");
538 cpp_define (parse_in, "__SIZEOF_FLOAT128__=16");
540 cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE);
541 cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE);
543 ix86_target_macros_internal (ix86_isa_flags,
544 ix86_arch,
545 ix86_tune,
546 ix86_fpmath,
547 cpp_define);
551 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
552 option here rather than in i386.c since it will pull in various preprocessor
553 functions, and those are not present in languages like fortran without a
554 preprocessor. */
556 void
557 ix86_register_pragmas (void)
559 /* Update pragma hook to allow parsing #pragma GCC target. */
560 targetm.target_option.pragma_parse = ix86_pragma_target_parse;
562 #ifdef REGISTER_SUBTARGET_PRAGMAS
563 REGISTER_SUBTARGET_PRAGMAS ();
564 #endif