1 /* Test the `vld3_lanef32' ARM Neon intrinsic. */
2 /* This file was autogenerated by neon-testgen. */
4 /* { dg-do assemble } */
5 /* { dg-require-effective-target arm_neon_ok } */
6 /* { dg-options "-save-temps -O0" } */
7 /* { dg-add-options arm_neon } */
11 void test_vld3_lanef32 (void)
13 float32x2x3_t out_float32x2x3_t
;
14 float32x2x3_t arg1_float32x2x3_t
;
16 out_float32x2x3_t
= vld3_lane_f32 (0, arg1_float32x2x3_t
, 1);
19 /* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */