gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c

   1 /* Test the `vld3Qf32' ARM Neon intrinsic.  */
   2 /* This file was autogenerated by neon-testgen.  */
   3
   4 /* { dg-do assemble } */
   5 /* { dg-require-effective-target arm_neon_ok } */
   6 /* { dg-options "-save-temps -O0" } */
   7 /* { dg-add-options arm_neon } */
   8
   9 #include "arm_neon.h"
  10
  11 void test_vld3Qf32 (void)
  12 {
  13   float32x4x3_t out_float32x4x3_t;
  14
  15   out_float32x4x3_t = vld3q_f32 (0);
  16 }
  17
  18 /* { dg-final { scan-assembler "vld3\.32\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  19 /* { dg-final { scan-assembler "vld3\.32\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */