1 /* Analyze RTL for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011, 2012 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
27 #include "diagnostic-core.h"
28 #include "hard-reg-set.h"
30 #include "insn-config.h"
40 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
42 /* Forward declarations */
43 static void set_of_1 (rtx
, const_rtx
, void *);
44 static bool covers_regno_p (const_rtx
, unsigned int);
45 static bool covers_regno_no_parallel_p (const_rtx
, unsigned int);
46 static int rtx_referenced_p_1 (rtx
*, void *);
47 static int computed_jump_p_1 (const_rtx
);
48 static void parms_set (rtx
, const_rtx
, void *);
50 static unsigned HOST_WIDE_INT
cached_nonzero_bits (const_rtx
, enum machine_mode
,
51 const_rtx
, enum machine_mode
,
52 unsigned HOST_WIDE_INT
);
53 static unsigned HOST_WIDE_INT
nonzero_bits1 (const_rtx
, enum machine_mode
,
54 const_rtx
, enum machine_mode
,
55 unsigned HOST_WIDE_INT
);
56 static unsigned int cached_num_sign_bit_copies (const_rtx
, enum machine_mode
, const_rtx
,
59 static unsigned int num_sign_bit_copies1 (const_rtx
, enum machine_mode
, const_rtx
,
60 enum machine_mode
, unsigned int);
62 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
63 -1 if a code has no such operand. */
64 static int non_rtx_starting_operands
[NUM_RTX_CODE
];
66 /* Truncation narrows the mode from SOURCE mode to DESTINATION mode.
67 If TARGET_MODE_REP_EXTENDED (DESTINATION, DESTINATION_REP) is
68 SIGN_EXTEND then while narrowing we also have to enforce the
69 representation and sign-extend the value to mode DESTINATION_REP.
71 If the value is already sign-extended to DESTINATION_REP mode we
72 can just switch to DESTINATION mode on it. For each pair of
73 integral modes SOURCE and DESTINATION, when truncating from SOURCE
74 to DESTINATION, NUM_SIGN_BIT_COPIES_IN_REP[SOURCE][DESTINATION]
75 contains the number of high-order bits in SOURCE that have to be
76 copies of the sign-bit so that we can do this mode-switch to
80 num_sign_bit_copies_in_rep
[MAX_MODE_INT
+ 1][MAX_MODE_INT
+ 1];
82 /* Return 1 if the value of X is unstable
83 (would be different at a different point in the program).
84 The frame pointer, arg pointer, etc. are considered stable
85 (within one function) and so is anything marked `unchanging'. */
88 rtx_unstable_p (const_rtx x
)
90 const RTX_CODE code
= GET_CODE (x
);
97 return !MEM_READONLY_P (x
) || rtx_unstable_p (XEXP (x
, 0));
109 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
110 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
111 /* The arg pointer varies if it is not a fixed register. */
112 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
114 /* ??? When call-clobbered, the value is stable modulo the restore
115 that must happen after a call. This currently screws up local-alloc
116 into believing that the restore is not needed. */
117 if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
&& x
== pic_offset_table_rtx
)
122 if (MEM_VOLATILE_P (x
))
131 fmt
= GET_RTX_FORMAT (code
);
132 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
135 if (rtx_unstable_p (XEXP (x
, i
)))
138 else if (fmt
[i
] == 'E')
141 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
142 if (rtx_unstable_p (XVECEXP (x
, i
, j
)))
149 /* Return 1 if X has a value that can vary even between two
150 executions of the program. 0 means X can be compared reliably
151 against certain constants or near-constants.
152 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
153 zero, we are slightly more conservative.
154 The frame pointer and the arg pointer are considered constant. */
157 rtx_varies_p (const_rtx x
, bool for_alias
)
170 return !MEM_READONLY_P (x
) || rtx_varies_p (XEXP (x
, 0), for_alias
);
182 /* Note that we have to test for the actual rtx used for the frame
183 and arg pointers and not just the register number in case we have
184 eliminated the frame and/or arg pointer and are using it
186 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
187 /* The arg pointer varies if it is not a fixed register. */
188 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
190 if (x
== pic_offset_table_rtx
191 /* ??? When call-clobbered, the value is stable modulo the restore
192 that must happen after a call. This currently screws up
193 local-alloc into believing that the restore is not needed, so we
194 must return 0 only if we are called from alias analysis. */
195 && (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|| for_alias
))
200 /* The operand 0 of a LO_SUM is considered constant
201 (in fact it is related specifically to operand 1)
202 during alias analysis. */
203 return (! for_alias
&& rtx_varies_p (XEXP (x
, 0), for_alias
))
204 || rtx_varies_p (XEXP (x
, 1), for_alias
);
207 if (MEM_VOLATILE_P (x
))
216 fmt
= GET_RTX_FORMAT (code
);
217 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
220 if (rtx_varies_p (XEXP (x
, i
), for_alias
))
223 else if (fmt
[i
] == 'E')
226 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
227 if (rtx_varies_p (XVECEXP (x
, i
, j
), for_alias
))
234 /* Return nonzero if the use of X as an address in a MEM can cause a trap.
235 MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls
236 whether nonzero is returned for unaligned memory accesses on strict
237 alignment machines. */
240 rtx_addr_can_trap_p_1 (const_rtx x
, HOST_WIDE_INT offset
, HOST_WIDE_INT size
,
241 enum machine_mode mode
, bool unaligned_mems
)
243 enum rtx_code code
= GET_CODE (x
);
247 && GET_MODE_SIZE (mode
) != 0)
249 HOST_WIDE_INT actual_offset
= offset
;
250 #ifdef SPARC_STACK_BOUNDARY_HACK
251 /* ??? The SPARC port may claim a STACK_BOUNDARY higher than
252 the real alignment of %sp. However, when it does this, the
253 alignment of %sp+STACK_POINTER_OFFSET is STACK_BOUNDARY. */
254 if (SPARC_STACK_BOUNDARY_HACK
255 && (x
== stack_pointer_rtx
|| x
== hard_frame_pointer_rtx
))
256 actual_offset
-= STACK_POINTER_OFFSET
;
259 if (actual_offset
% GET_MODE_SIZE (mode
) != 0)
266 if (SYMBOL_REF_WEAK (x
))
268 if (!CONSTANT_POOL_ADDRESS_P (x
))
271 HOST_WIDE_INT decl_size
;
276 size
= GET_MODE_SIZE (mode
);
280 /* If the size of the access or of the symbol is unknown,
282 decl
= SYMBOL_REF_DECL (x
);
284 /* Else check that the access is in bounds. TODO: restructure
285 expr_size/tree_expr_size/int_expr_size and just use the latter. */
288 else if (DECL_P (decl
) && DECL_SIZE_UNIT (decl
))
289 decl_size
= (host_integerp (DECL_SIZE_UNIT (decl
), 0)
290 ? tree_low_cst (DECL_SIZE_UNIT (decl
), 0)
292 else if (TREE_CODE (decl
) == STRING_CST
)
293 decl_size
= TREE_STRING_LENGTH (decl
);
294 else if (TYPE_SIZE_UNIT (TREE_TYPE (decl
)))
295 decl_size
= int_size_in_bytes (TREE_TYPE (decl
));
299 return (decl_size
<= 0 ? offset
!= 0 : offset
+ size
> decl_size
);
308 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
309 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
310 || x
== stack_pointer_rtx
311 /* The arg pointer varies if it is not a fixed register. */
312 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
314 /* All of the virtual frame registers are stack references. */
315 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
316 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
321 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
322 mode
, unaligned_mems
);
325 /* An address is assumed not to trap if:
326 - it is the pic register plus a constant. */
327 if (XEXP (x
, 0) == pic_offset_table_rtx
&& CONSTANT_P (XEXP (x
, 1)))
330 /* - or it is an address that can't trap plus a constant integer,
331 with the proper remainder modulo the mode size if we are
332 considering unaligned memory references. */
333 if (CONST_INT_P (XEXP (x
, 1))
334 && !rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
+ INTVAL (XEXP (x
, 1)),
335 size
, mode
, unaligned_mems
))
342 return rtx_addr_can_trap_p_1 (XEXP (x
, 1), offset
, size
,
343 mode
, unaligned_mems
);
350 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
351 mode
, unaligned_mems
);
357 /* If it isn't one of the case above, it can cause a trap. */
361 /* Return nonzero if the use of X as an address in a MEM can cause a trap. */
364 rtx_addr_can_trap_p (const_rtx x
)
366 return rtx_addr_can_trap_p_1 (x
, 0, 0, VOIDmode
, false);
369 /* Return true if X is an address that is known to not be zero. */
372 nonzero_address_p (const_rtx x
)
374 const enum rtx_code code
= GET_CODE (x
);
379 return !SYMBOL_REF_WEAK (x
);
385 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
386 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
387 || x
== stack_pointer_rtx
388 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
390 /* All of the virtual frame registers are stack references. */
391 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
392 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
397 return nonzero_address_p (XEXP (x
, 0));
400 if (CONST_INT_P (XEXP (x
, 1)))
401 return nonzero_address_p (XEXP (x
, 0));
402 /* Handle PIC references. */
403 else if (XEXP (x
, 0) == pic_offset_table_rtx
404 && CONSTANT_P (XEXP (x
, 1)))
409 /* Similar to the above; allow positive offsets. Further, since
410 auto-inc is only allowed in memories, the register must be a
412 if (CONST_INT_P (XEXP (x
, 1))
413 && INTVAL (XEXP (x
, 1)) > 0)
415 return nonzero_address_p (XEXP (x
, 0));
418 /* Similarly. Further, the offset is always positive. */
425 return nonzero_address_p (XEXP (x
, 0));
428 return nonzero_address_p (XEXP (x
, 1));
434 /* If it isn't one of the case above, might be zero. */
438 /* Return 1 if X refers to a memory location whose address
439 cannot be compared reliably with constant addresses,
440 or if X refers to a BLKmode memory object.
441 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
442 zero, we are slightly more conservative. */
445 rtx_addr_varies_p (const_rtx x
, bool for_alias
)
456 return GET_MODE (x
) == BLKmode
|| rtx_varies_p (XEXP (x
, 0), for_alias
);
458 fmt
= GET_RTX_FORMAT (code
);
459 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
462 if (rtx_addr_varies_p (XEXP (x
, i
), for_alias
))
465 else if (fmt
[i
] == 'E')
468 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
469 if (rtx_addr_varies_p (XVECEXP (x
, i
, j
), for_alias
))
475 /* Return the value of the integer term in X, if one is apparent;
477 Only obvious integer terms are detected.
478 This is used in cse.c with the `related_value' field. */
481 get_integer_term (const_rtx x
)
483 if (GET_CODE (x
) == CONST
)
486 if (GET_CODE (x
) == MINUS
487 && CONST_INT_P (XEXP (x
, 1)))
488 return - INTVAL (XEXP (x
, 1));
489 if (GET_CODE (x
) == PLUS
490 && CONST_INT_P (XEXP (x
, 1)))
491 return INTVAL (XEXP (x
, 1));
495 /* If X is a constant, return the value sans apparent integer term;
497 Only obvious integer terms are detected. */
500 get_related_value (const_rtx x
)
502 if (GET_CODE (x
) != CONST
)
505 if (GET_CODE (x
) == PLUS
506 && CONST_INT_P (XEXP (x
, 1)))
508 else if (GET_CODE (x
) == MINUS
509 && CONST_INT_P (XEXP (x
, 1)))
514 /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
515 to somewhere in the same object or object_block as SYMBOL. */
518 offset_within_block_p (const_rtx symbol
, HOST_WIDE_INT offset
)
522 if (GET_CODE (symbol
) != SYMBOL_REF
)
530 if (CONSTANT_POOL_ADDRESS_P (symbol
)
531 && offset
< (int) GET_MODE_SIZE (get_pool_mode (symbol
)))
534 decl
= SYMBOL_REF_DECL (symbol
);
535 if (decl
&& offset
< int_size_in_bytes (TREE_TYPE (decl
)))
539 if (SYMBOL_REF_HAS_BLOCK_INFO_P (symbol
)
540 && SYMBOL_REF_BLOCK (symbol
)
541 && SYMBOL_REF_BLOCK_OFFSET (symbol
) >= 0
542 && ((unsigned HOST_WIDE_INT
) offset
+ SYMBOL_REF_BLOCK_OFFSET (symbol
)
543 < (unsigned HOST_WIDE_INT
) SYMBOL_REF_BLOCK (symbol
)->size
))
549 /* Split X into a base and a constant offset, storing them in *BASE_OUT
550 and *OFFSET_OUT respectively. */
553 split_const (rtx x
, rtx
*base_out
, rtx
*offset_out
)
555 if (GET_CODE (x
) == CONST
)
558 if (GET_CODE (x
) == PLUS
&& CONST_INT_P (XEXP (x
, 1)))
560 *base_out
= XEXP (x
, 0);
561 *offset_out
= XEXP (x
, 1);
566 *offset_out
= const0_rtx
;
569 /* Return the number of places FIND appears within X. If COUNT_DEST is
570 zero, we do not count occurrences inside the destination of a SET. */
573 count_occurrences (const_rtx x
, const_rtx find
, int count_dest
)
577 const char *format_ptr
;
599 count
= count_occurrences (XEXP (x
, 0), find
, count_dest
);
601 count
+= count_occurrences (XEXP (x
, 1), find
, count_dest
);
605 if (MEM_P (find
) && rtx_equal_p (x
, find
))
610 if (SET_DEST (x
) == find
&& ! count_dest
)
611 return count_occurrences (SET_SRC (x
), find
, count_dest
);
618 format_ptr
= GET_RTX_FORMAT (code
);
621 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
623 switch (*format_ptr
++)
626 count
+= count_occurrences (XEXP (x
, i
), find
, count_dest
);
630 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
631 count
+= count_occurrences (XVECEXP (x
, i
, j
), find
, count_dest
);
639 /* Return TRUE if OP is a register or subreg of a register that
640 holds an unsigned quantity. Otherwise, return FALSE. */
643 unsigned_reg_p (rtx op
)
647 && TYPE_UNSIGNED (TREE_TYPE (REG_EXPR (op
))))
650 if (GET_CODE (op
) == SUBREG
651 && SUBREG_PROMOTED_UNSIGNED_P (op
))
658 /* Nonzero if register REG appears somewhere within IN.
659 Also works if REG is not a register; in this case it checks
660 for a subexpression of IN that is Lisp "equal" to REG. */
663 reg_mentioned_p (const_rtx reg
, const_rtx in
)
675 if (GET_CODE (in
) == LABEL_REF
)
676 return reg
== XEXP (in
, 0);
678 code
= GET_CODE (in
);
682 /* Compare registers by number. */
684 return REG_P (reg
) && REGNO (in
) == REGNO (reg
);
686 /* These codes have no constituent expressions
697 /* These are kept unique for a given value. */
704 if (GET_CODE (reg
) == code
&& rtx_equal_p (reg
, in
))
707 fmt
= GET_RTX_FORMAT (code
);
709 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
714 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
715 if (reg_mentioned_p (reg
, XVECEXP (in
, i
, j
)))
718 else if (fmt
[i
] == 'e'
719 && reg_mentioned_p (reg
, XEXP (in
, i
)))
725 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
726 no CODE_LABEL insn. */
729 no_labels_between_p (const_rtx beg
, const_rtx end
)
734 for (p
= NEXT_INSN (beg
); p
!= end
; p
= NEXT_INSN (p
))
740 /* Nonzero if register REG is used in an insn between
741 FROM_INSN and TO_INSN (exclusive of those two). */
744 reg_used_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
748 if (from_insn
== to_insn
)
751 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
752 if (NONDEBUG_INSN_P (insn
)
753 && (reg_overlap_mentioned_p (reg
, PATTERN (insn
))
754 || (CALL_P (insn
) && find_reg_fusage (insn
, USE
, reg
))))
759 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
760 is entirely replaced by a new value and the only use is as a SET_DEST,
761 we do not consider it a reference. */
764 reg_referenced_p (const_rtx x
, const_rtx body
)
768 switch (GET_CODE (body
))
771 if (reg_overlap_mentioned_p (x
, SET_SRC (body
)))
774 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
775 of a REG that occupies all of the REG, the insn references X if
776 it is mentioned in the destination. */
777 if (GET_CODE (SET_DEST (body
)) != CC0
778 && GET_CODE (SET_DEST (body
)) != PC
779 && !REG_P (SET_DEST (body
))
780 && ! (GET_CODE (SET_DEST (body
)) == SUBREG
781 && REG_P (SUBREG_REG (SET_DEST (body
)))
782 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body
))))
783 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
784 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body
)))
785 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
786 && reg_overlap_mentioned_p (x
, SET_DEST (body
)))
791 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
792 if (reg_overlap_mentioned_p (x
, ASM_OPERANDS_INPUT (body
, i
)))
799 return reg_overlap_mentioned_p (x
, body
);
802 return reg_overlap_mentioned_p (x
, TRAP_CONDITION (body
));
805 return reg_overlap_mentioned_p (x
, XEXP (body
, 0));
808 case UNSPEC_VOLATILE
:
809 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
810 if (reg_overlap_mentioned_p (x
, XVECEXP (body
, 0, i
)))
815 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
816 if (reg_referenced_p (x
, XVECEXP (body
, 0, i
)))
821 if (MEM_P (XEXP (body
, 0)))
822 if (reg_overlap_mentioned_p (x
, XEXP (XEXP (body
, 0), 0)))
827 if (reg_overlap_mentioned_p (x
, COND_EXEC_TEST (body
)))
829 return reg_referenced_p (x
, COND_EXEC_CODE (body
));
836 /* Nonzero if register REG is set or clobbered in an insn between
837 FROM_INSN and TO_INSN (exclusive of those two). */
840 reg_set_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
844 if (from_insn
== to_insn
)
847 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
848 if (INSN_P (insn
) && reg_set_p (reg
, insn
))
853 /* Internals of reg_set_between_p. */
855 reg_set_p (const_rtx reg
, const_rtx insn
)
857 /* We can be passed an insn or part of one. If we are passed an insn,
858 check if a side-effect of the insn clobbers REG. */
860 && (FIND_REG_INC_NOTE (insn
, reg
)
863 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
864 && overlaps_hard_reg_set_p (regs_invalidated_by_call
,
865 GET_MODE (reg
), REGNO (reg
)))
867 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
870 return set_of (reg
, insn
) != NULL_RTX
;
873 /* Similar to reg_set_between_p, but check all registers in X. Return 0
874 only if none of them are modified between START and END. Return 1 if
875 X contains a MEM; this routine does use memory aliasing. */
878 modified_between_p (const_rtx x
, const_rtx start
, const_rtx end
)
880 const enum rtx_code code
= GET_CODE (x
);
904 if (modified_between_p (XEXP (x
, 0), start
, end
))
906 if (MEM_READONLY_P (x
))
908 for (insn
= NEXT_INSN (start
); insn
!= end
; insn
= NEXT_INSN (insn
))
909 if (memory_modified_in_insn_p (x
, insn
))
915 return reg_set_between_p (x
, start
, end
);
921 fmt
= GET_RTX_FORMAT (code
);
922 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
924 if (fmt
[i
] == 'e' && modified_between_p (XEXP (x
, i
), start
, end
))
927 else if (fmt
[i
] == 'E')
928 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
929 if (modified_between_p (XVECEXP (x
, i
, j
), start
, end
))
936 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
937 of them are modified in INSN. Return 1 if X contains a MEM; this routine
938 does use memory aliasing. */
941 modified_in_p (const_rtx x
, const_rtx insn
)
943 const enum rtx_code code
= GET_CODE (x
);
963 if (modified_in_p (XEXP (x
, 0), insn
))
965 if (MEM_READONLY_P (x
))
967 if (memory_modified_in_insn_p (x
, insn
))
973 return reg_set_p (x
, insn
);
979 fmt
= GET_RTX_FORMAT (code
);
980 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
982 if (fmt
[i
] == 'e' && modified_in_p (XEXP (x
, i
), insn
))
985 else if (fmt
[i
] == 'E')
986 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
987 if (modified_in_p (XVECEXP (x
, i
, j
), insn
))
994 /* Helper function for set_of. */
1002 set_of_1 (rtx x
, const_rtx pat
, void *data1
)
1004 struct set_of_data
*const data
= (struct set_of_data
*) (data1
);
1005 if (rtx_equal_p (x
, data
->pat
)
1006 || (!MEM_P (x
) && reg_overlap_mentioned_p (data
->pat
, x
)))
1010 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
1011 (either directly or via STRICT_LOW_PART and similar modifiers). */
1013 set_of (const_rtx pat
, const_rtx insn
)
1015 struct set_of_data data
;
1016 data
.found
= NULL_RTX
;
1018 note_stores (INSN_P (insn
) ? PATTERN (insn
) : insn
, set_of_1
, &data
);
1022 /* This function, called through note_stores, collects sets and
1023 clobbers of hard registers in a HARD_REG_SET, which is pointed to
1026 record_hard_reg_sets (rtx x
, const_rtx pat ATTRIBUTE_UNUSED
, void *data
)
1028 HARD_REG_SET
*pset
= (HARD_REG_SET
*)data
;
1029 if (REG_P (x
) && HARD_REGISTER_P (x
))
1030 add_to_hard_reg_set (pset
, GET_MODE (x
), REGNO (x
));
1033 /* Examine INSN, and compute the set of hard registers written by it.
1034 Store it in *PSET. Should only be called after reload. */
1036 find_all_hard_reg_sets (const_rtx insn
, HARD_REG_SET
*pset
)
1040 CLEAR_HARD_REG_SET (*pset
);
1041 note_stores (PATTERN (insn
), record_hard_reg_sets
, pset
);
1043 IOR_HARD_REG_SET (*pset
, call_used_reg_set
);
1044 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1045 if (REG_NOTE_KIND (link
) == REG_INC
)
1046 record_hard_reg_sets (XEXP (link
, 0), NULL
, pset
);
1049 /* A for_each_rtx subroutine of record_hard_reg_uses. */
1051 record_hard_reg_uses_1 (rtx
*px
, void *data
)
1054 HARD_REG_SET
*pused
= (HARD_REG_SET
*)data
;
1056 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1058 int nregs
= hard_regno_nregs
[REGNO (x
)][GET_MODE (x
)];
1060 SET_HARD_REG_BIT (*pused
, REGNO (x
) + nregs
);
1065 /* Like record_hard_reg_sets, but called through note_uses. */
1067 record_hard_reg_uses (rtx
*px
, void *data
)
1069 for_each_rtx (px
, record_hard_reg_uses_1
, data
);
1072 /* Given an INSN, return a SET expression if this insn has only a single SET.
1073 It may also have CLOBBERs, USEs, or SET whose output
1074 will not be used, which we ignore. */
1077 single_set_2 (const_rtx insn
, const_rtx pat
)
1080 int set_verified
= 1;
1083 if (GET_CODE (pat
) == PARALLEL
)
1085 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1087 rtx sub
= XVECEXP (pat
, 0, i
);
1088 switch (GET_CODE (sub
))
1095 /* We can consider insns having multiple sets, where all
1096 but one are dead as single set insns. In common case
1097 only single set is present in the pattern so we want
1098 to avoid checking for REG_UNUSED notes unless necessary.
1100 When we reach set first time, we just expect this is
1101 the single set we are looking for and only when more
1102 sets are found in the insn, we check them. */
1105 if (find_reg_note (insn
, REG_UNUSED
, SET_DEST (set
))
1106 && !side_effects_p (set
))
1112 set
= sub
, set_verified
= 0;
1113 else if (!find_reg_note (insn
, REG_UNUSED
, SET_DEST (sub
))
1114 || side_effects_p (sub
))
1126 /* Given an INSN, return nonzero if it has more than one SET, else return
1130 multiple_sets (const_rtx insn
)
1135 /* INSN must be an insn. */
1136 if (! INSN_P (insn
))
1139 /* Only a PARALLEL can have multiple SETs. */
1140 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
1142 for (i
= 0, found
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1143 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
1145 /* If we have already found a SET, then return now. */
1153 /* Either zero or one SET. */
1157 /* Return nonzero if the destination of SET equals the source
1158 and there are no side effects. */
1161 set_noop_p (const_rtx set
)
1163 rtx src
= SET_SRC (set
);
1164 rtx dst
= SET_DEST (set
);
1166 if (dst
== pc_rtx
&& src
== pc_rtx
)
1169 if (MEM_P (dst
) && MEM_P (src
))
1170 return rtx_equal_p (dst
, src
) && !side_effects_p (dst
);
1172 if (GET_CODE (dst
) == ZERO_EXTRACT
)
1173 return rtx_equal_p (XEXP (dst
, 0), src
)
1174 && ! BYTES_BIG_ENDIAN
&& XEXP (dst
, 2) == const0_rtx
1175 && !side_effects_p (src
);
1177 if (GET_CODE (dst
) == STRICT_LOW_PART
)
1178 dst
= XEXP (dst
, 0);
1180 if (GET_CODE (src
) == SUBREG
&& GET_CODE (dst
) == SUBREG
)
1182 if (SUBREG_BYTE (src
) != SUBREG_BYTE (dst
))
1184 src
= SUBREG_REG (src
);
1185 dst
= SUBREG_REG (dst
);
1188 return (REG_P (src
) && REG_P (dst
)
1189 && REGNO (src
) == REGNO (dst
));
1192 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1196 noop_move_p (const_rtx insn
)
1198 rtx pat
= PATTERN (insn
);
1200 if (INSN_CODE (insn
) == NOOP_MOVE_INSN_CODE
)
1203 /* Insns carrying these notes are useful later on. */
1204 if (find_reg_note (insn
, REG_EQUAL
, NULL_RTX
))
1207 if (GET_CODE (pat
) == SET
&& set_noop_p (pat
))
1210 if (GET_CODE (pat
) == PARALLEL
)
1213 /* If nothing but SETs of registers to themselves,
1214 this insn can also be deleted. */
1215 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1217 rtx tem
= XVECEXP (pat
, 0, i
);
1219 if (GET_CODE (tem
) == USE
1220 || GET_CODE (tem
) == CLOBBER
)
1223 if (GET_CODE (tem
) != SET
|| ! set_noop_p (tem
))
1233 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1234 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1235 If the object was modified, if we hit a partial assignment to X, or hit a
1236 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1237 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1241 find_last_value (rtx x
, rtx
*pinsn
, rtx valid_to
, int allow_hwreg
)
1245 for (p
= PREV_INSN (*pinsn
); p
&& !LABEL_P (p
);
1249 rtx set
= single_set (p
);
1250 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1252 if (set
&& rtx_equal_p (x
, SET_DEST (set
)))
1254 rtx src
= SET_SRC (set
);
1256 if (note
&& GET_CODE (XEXP (note
, 0)) != EXPR_LIST
)
1257 src
= XEXP (note
, 0);
1259 if ((valid_to
== NULL_RTX
1260 || ! modified_between_p (src
, PREV_INSN (p
), valid_to
))
1261 /* Reject hard registers because we don't usually want
1262 to use them; we'd rather use a pseudo. */
1264 && REGNO (src
) < FIRST_PSEUDO_REGISTER
) || allow_hwreg
))
1271 /* If set in non-simple way, we don't have a value. */
1272 if (reg_set_p (x
, p
))
1279 /* Return nonzero if register in range [REGNO, ENDREGNO)
1280 appears either explicitly or implicitly in X
1281 other than being stored into.
1283 References contained within the substructure at LOC do not count.
1284 LOC may be zero, meaning don't ignore anything. */
1287 refers_to_regno_p (unsigned int regno
, unsigned int endregno
, const_rtx x
,
1291 unsigned int x_regno
;
1296 /* The contents of a REG_NONNEG note is always zero, so we must come here
1297 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1301 code
= GET_CODE (x
);
1306 x_regno
= REGNO (x
);
1308 /* If we modifying the stack, frame, or argument pointer, it will
1309 clobber a virtual register. In fact, we could be more precise,
1310 but it isn't worth it. */
1311 if ((x_regno
== STACK_POINTER_REGNUM
1312 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1313 || x_regno
== ARG_POINTER_REGNUM
1315 || x_regno
== FRAME_POINTER_REGNUM
)
1316 && regno
>= FIRST_VIRTUAL_REGISTER
&& regno
<= LAST_VIRTUAL_REGISTER
)
1319 return endregno
> x_regno
&& regno
< END_REGNO (x
);
1322 /* If this is a SUBREG of a hard reg, we can see exactly which
1323 registers are being modified. Otherwise, handle normally. */
1324 if (REG_P (SUBREG_REG (x
))
1325 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
1327 unsigned int inner_regno
= subreg_regno (x
);
1328 unsigned int inner_endregno
1329 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
1330 ? subreg_nregs (x
) : 1);
1332 return endregno
> inner_regno
&& regno
< inner_endregno
;
1338 if (&SET_DEST (x
) != loc
1339 /* Note setting a SUBREG counts as referring to the REG it is in for
1340 a pseudo but not for hard registers since we can
1341 treat each word individually. */
1342 && ((GET_CODE (SET_DEST (x
)) == SUBREG
1343 && loc
!= &SUBREG_REG (SET_DEST (x
))
1344 && REG_P (SUBREG_REG (SET_DEST (x
)))
1345 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
1346 && refers_to_regno_p (regno
, endregno
,
1347 SUBREG_REG (SET_DEST (x
)), loc
))
1348 || (!REG_P (SET_DEST (x
))
1349 && refers_to_regno_p (regno
, endregno
, SET_DEST (x
), loc
))))
1352 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
1361 /* X does not match, so try its subexpressions. */
1363 fmt
= GET_RTX_FORMAT (code
);
1364 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1366 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
1374 if (refers_to_regno_p (regno
, endregno
, XEXP (x
, i
), loc
))
1377 else if (fmt
[i
] == 'E')
1380 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1381 if (loc
!= &XVECEXP (x
, i
, j
)
1382 && refers_to_regno_p (regno
, endregno
, XVECEXP (x
, i
, j
), loc
))
1389 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1390 we check if any register number in X conflicts with the relevant register
1391 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1392 contains a MEM (we don't bother checking for memory addresses that can't
1393 conflict because we expect this to be a rare case. */
1396 reg_overlap_mentioned_p (const_rtx x
, const_rtx in
)
1398 unsigned int regno
, endregno
;
1400 /* If either argument is a constant, then modifying X can not
1401 affect IN. Here we look at IN, we can profitably combine
1402 CONSTANT_P (x) with the switch statement below. */
1403 if (CONSTANT_P (in
))
1407 switch (GET_CODE (x
))
1409 case STRICT_LOW_PART
:
1412 /* Overly conservative. */
1417 regno
= REGNO (SUBREG_REG (x
));
1418 if (regno
< FIRST_PSEUDO_REGISTER
)
1419 regno
= subreg_regno (x
);
1420 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
1421 ? subreg_nregs (x
) : 1);
1426 endregno
= END_REGNO (x
);
1428 return refers_to_regno_p (regno
, endregno
, in
, (rtx
*) 0);
1438 fmt
= GET_RTX_FORMAT (GET_CODE (in
));
1439 for (i
= GET_RTX_LENGTH (GET_CODE (in
)) - 1; i
>= 0; i
--)
1442 if (reg_overlap_mentioned_p (x
, XEXP (in
, i
)))
1445 else if (fmt
[i
] == 'E')
1448 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; --j
)
1449 if (reg_overlap_mentioned_p (x
, XVECEXP (in
, i
, j
)))
1459 return reg_mentioned_p (x
, in
);
1465 /* If any register in here refers to it we return true. */
1466 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1467 if (XEXP (XVECEXP (x
, 0, i
), 0) != 0
1468 && reg_overlap_mentioned_p (XEXP (XVECEXP (x
, 0, i
), 0), in
))
1474 gcc_assert (CONSTANT_P (x
));
1479 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1480 (X would be the pattern of an insn). DATA is an arbitrary pointer,
1481 ignored by note_stores, but passed to FUN.
1483 FUN receives three arguments:
1484 1. the REG, MEM, CC0 or PC being stored in or clobbered,
1485 2. the SET or CLOBBER rtx that does the store,
1486 3. the pointer DATA provided to note_stores.
1488 If the item being stored in or clobbered is a SUBREG of a hard register,
1489 the SUBREG will be passed. */
1492 note_stores (const_rtx x
, void (*fun
) (rtx
, const_rtx
, void *), void *data
)
1496 if (GET_CODE (x
) == COND_EXEC
)
1497 x
= COND_EXEC_CODE (x
);
1499 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1501 rtx dest
= SET_DEST (x
);
1503 while ((GET_CODE (dest
) == SUBREG
1504 && (!REG_P (SUBREG_REG (dest
))
1505 || REGNO (SUBREG_REG (dest
)) >= FIRST_PSEUDO_REGISTER
))
1506 || GET_CODE (dest
) == ZERO_EXTRACT
1507 || GET_CODE (dest
) == STRICT_LOW_PART
)
1508 dest
= XEXP (dest
, 0);
1510 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1511 each of whose first operand is a register. */
1512 if (GET_CODE (dest
) == PARALLEL
)
1514 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1515 if (XEXP (XVECEXP (dest
, 0, i
), 0) != 0)
1516 (*fun
) (XEXP (XVECEXP (dest
, 0, i
), 0), x
, data
);
1519 (*fun
) (dest
, x
, data
);
1522 else if (GET_CODE (x
) == PARALLEL
)
1523 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1524 note_stores (XVECEXP (x
, 0, i
), fun
, data
);
1527 /* Like notes_stores, but call FUN for each expression that is being
1528 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1529 FUN for each expression, not any interior subexpressions. FUN receives a
1530 pointer to the expression and the DATA passed to this function.
1532 Note that this is not quite the same test as that done in reg_referenced_p
1533 since that considers something as being referenced if it is being
1534 partially set, while we do not. */
1537 note_uses (rtx
*pbody
, void (*fun
) (rtx
*, void *), void *data
)
1542 switch (GET_CODE (body
))
1545 (*fun
) (&COND_EXEC_TEST (body
), data
);
1546 note_uses (&COND_EXEC_CODE (body
), fun
, data
);
1550 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1551 note_uses (&XVECEXP (body
, 0, i
), fun
, data
);
1555 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1556 note_uses (&PATTERN (XVECEXP (body
, 0, i
)), fun
, data
);
1560 (*fun
) (&XEXP (body
, 0), data
);
1564 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
1565 (*fun
) (&ASM_OPERANDS_INPUT (body
, i
), data
);
1569 (*fun
) (&TRAP_CONDITION (body
), data
);
1573 (*fun
) (&XEXP (body
, 0), data
);
1577 case UNSPEC_VOLATILE
:
1578 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1579 (*fun
) (&XVECEXP (body
, 0, i
), data
);
1583 if (MEM_P (XEXP (body
, 0)))
1584 (*fun
) (&XEXP (XEXP (body
, 0), 0), data
);
1589 rtx dest
= SET_DEST (body
);
1591 /* For sets we replace everything in source plus registers in memory
1592 expression in store and operands of a ZERO_EXTRACT. */
1593 (*fun
) (&SET_SRC (body
), data
);
1595 if (GET_CODE (dest
) == ZERO_EXTRACT
)
1597 (*fun
) (&XEXP (dest
, 1), data
);
1598 (*fun
) (&XEXP (dest
, 2), data
);
1601 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
)
1602 dest
= XEXP (dest
, 0);
1605 (*fun
) (&XEXP (dest
, 0), data
);
1610 /* All the other possibilities never store. */
1611 (*fun
) (pbody
, data
);
1616 /* Return nonzero if X's old contents don't survive after INSN.
1617 This will be true if X is (cc0) or if X is a register and
1618 X dies in INSN or because INSN entirely sets X.
1620 "Entirely set" means set directly and not through a SUBREG, or
1621 ZERO_EXTRACT, so no trace of the old contents remains.
1622 Likewise, REG_INC does not count.
1624 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1625 but for this use that makes no difference, since regs don't overlap
1626 during their lifetimes. Therefore, this function may be used
1627 at any time after deaths have been computed.
1629 If REG is a hard reg that occupies multiple machine registers, this
1630 function will only return 1 if each of those registers will be replaced
1634 dead_or_set_p (const_rtx insn
, const_rtx x
)
1636 unsigned int regno
, end_regno
;
1639 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1640 if (GET_CODE (x
) == CC0
)
1643 gcc_assert (REG_P (x
));
1646 end_regno
= END_REGNO (x
);
1647 for (i
= regno
; i
< end_regno
; i
++)
1648 if (! dead_or_set_regno_p (insn
, i
))
1654 /* Return TRUE iff DEST is a register or subreg of a register and
1655 doesn't change the number of words of the inner register, and any
1656 part of the register is TEST_REGNO. */
1659 covers_regno_no_parallel_p (const_rtx dest
, unsigned int test_regno
)
1661 unsigned int regno
, endregno
;
1663 if (GET_CODE (dest
) == SUBREG
1664 && (((GET_MODE_SIZE (GET_MODE (dest
))
1665 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)
1666 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
)))
1667 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)))
1668 dest
= SUBREG_REG (dest
);
1673 regno
= REGNO (dest
);
1674 endregno
= END_REGNO (dest
);
1675 return (test_regno
>= regno
&& test_regno
< endregno
);
1678 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1679 any member matches the covers_regno_no_parallel_p criteria. */
1682 covers_regno_p (const_rtx dest
, unsigned int test_regno
)
1684 if (GET_CODE (dest
) == PARALLEL
)
1686 /* Some targets place small structures in registers for return
1687 values of functions, and those registers are wrapped in
1688 PARALLELs that we may see as the destination of a SET. */
1691 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1693 rtx inner
= XEXP (XVECEXP (dest
, 0, i
), 0);
1694 if (inner
!= NULL_RTX
1695 && covers_regno_no_parallel_p (inner
, test_regno
))
1702 return covers_regno_no_parallel_p (dest
, test_regno
);
1705 /* Utility function for dead_or_set_p to check an individual register. */
1708 dead_or_set_regno_p (const_rtx insn
, unsigned int test_regno
)
1712 /* See if there is a death note for something that includes TEST_REGNO. */
1713 if (find_regno_note (insn
, REG_DEAD
, test_regno
))
1717 && find_regno_fusage (insn
, CLOBBER
, test_regno
))
1720 pattern
= PATTERN (insn
);
1722 if (GET_CODE (pattern
) == COND_EXEC
)
1723 pattern
= COND_EXEC_CODE (pattern
);
1725 if (GET_CODE (pattern
) == SET
)
1726 return covers_regno_p (SET_DEST (pattern
), test_regno
);
1727 else if (GET_CODE (pattern
) == PARALLEL
)
1731 for (i
= XVECLEN (pattern
, 0) - 1; i
>= 0; i
--)
1733 rtx body
= XVECEXP (pattern
, 0, i
);
1735 if (GET_CODE (body
) == COND_EXEC
)
1736 body
= COND_EXEC_CODE (body
);
1738 if ((GET_CODE (body
) == SET
|| GET_CODE (body
) == CLOBBER
)
1739 && covers_regno_p (SET_DEST (body
), test_regno
))
1747 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1748 If DATUM is nonzero, look for one whose datum is DATUM. */
1751 find_reg_note (const_rtx insn
, enum reg_note kind
, const_rtx datum
)
1755 gcc_checking_assert (insn
);
1757 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1758 if (! INSN_P (insn
))
1762 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1763 if (REG_NOTE_KIND (link
) == kind
)
1768 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1769 if (REG_NOTE_KIND (link
) == kind
&& datum
== XEXP (link
, 0))
1774 /* Return the reg-note of kind KIND in insn INSN which applies to register
1775 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1776 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1777 it might be the case that the note overlaps REGNO. */
1780 find_regno_note (const_rtx insn
, enum reg_note kind
, unsigned int regno
)
1784 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1785 if (! INSN_P (insn
))
1788 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1789 if (REG_NOTE_KIND (link
) == kind
1790 /* Verify that it is a register, so that scratch and MEM won't cause a
1792 && REG_P (XEXP (link
, 0))
1793 && REGNO (XEXP (link
, 0)) <= regno
1794 && END_REGNO (XEXP (link
, 0)) > regno
)
1799 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1803 find_reg_equal_equiv_note (const_rtx insn
)
1810 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1811 if (REG_NOTE_KIND (link
) == REG_EQUAL
1812 || REG_NOTE_KIND (link
) == REG_EQUIV
)
1814 /* FIXME: We should never have REG_EQUAL/REG_EQUIV notes on
1815 insns that have multiple sets. Checking single_set to
1816 make sure of this is not the proper check, as explained
1817 in the comment in set_unique_reg_note.
1819 This should be changed into an assert. */
1820 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
1827 /* Check whether INSN is a single_set whose source is known to be
1828 equivalent to a constant. Return that constant if so, otherwise
1832 find_constant_src (const_rtx insn
)
1836 set
= single_set (insn
);
1839 x
= avoid_constant_pool_reference (SET_SRC (set
));
1844 note
= find_reg_equal_equiv_note (insn
);
1845 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1846 return XEXP (note
, 0);
1851 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1852 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1855 find_reg_fusage (const_rtx insn
, enum rtx_code code
, const_rtx datum
)
1857 /* If it's not a CALL_INSN, it can't possibly have a
1858 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1868 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
1870 link
= XEXP (link
, 1))
1871 if (GET_CODE (XEXP (link
, 0)) == code
1872 && rtx_equal_p (datum
, XEXP (XEXP (link
, 0), 0)))
1877 unsigned int regno
= REGNO (datum
);
1879 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1880 to pseudo registers, so don't bother checking. */
1882 if (regno
< FIRST_PSEUDO_REGISTER
)
1884 unsigned int end_regno
= END_HARD_REGNO (datum
);
1887 for (i
= regno
; i
< end_regno
; i
++)
1888 if (find_regno_fusage (insn
, code
, i
))
1896 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1897 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1900 find_regno_fusage (const_rtx insn
, enum rtx_code code
, unsigned int regno
)
1904 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1905 to pseudo registers, so don't bother checking. */
1907 if (regno
>= FIRST_PSEUDO_REGISTER
1911 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1915 if (GET_CODE (op
= XEXP (link
, 0)) == code
1916 && REG_P (reg
= XEXP (op
, 0))
1917 && REGNO (reg
) <= regno
1918 && END_HARD_REGNO (reg
) > regno
)
1926 /* Allocate a register note with kind KIND and datum DATUM. LIST is
1927 stored as the pointer to the next register note. */
1930 alloc_reg_note (enum reg_note kind
, rtx datum
, rtx list
)
1938 case REG_LABEL_TARGET
:
1939 case REG_LABEL_OPERAND
:
1941 /* These types of register notes use an INSN_LIST rather than an
1942 EXPR_LIST, so that copying is done right and dumps look
1944 note
= alloc_INSN_LIST (datum
, list
);
1945 PUT_REG_NOTE_KIND (note
, kind
);
1949 note
= alloc_EXPR_LIST (kind
, datum
, list
);
1956 /* Add register note with kind KIND and datum DATUM to INSN. */
1959 add_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
1961 REG_NOTES (insn
) = alloc_reg_note (kind
, datum
, REG_NOTES (insn
));
1964 /* Remove register note NOTE from the REG_NOTES of INSN. */
1967 remove_note (rtx insn
, const_rtx note
)
1971 if (note
== NULL_RTX
)
1974 if (REG_NOTES (insn
) == note
)
1975 REG_NOTES (insn
) = XEXP (note
, 1);
1977 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1978 if (XEXP (link
, 1) == note
)
1980 XEXP (link
, 1) = XEXP (note
, 1);
1984 switch (REG_NOTE_KIND (note
))
1988 df_notes_rescan (insn
);
1995 /* Remove REG_EQUAL and/or REG_EQUIV notes if INSN has such notes. */
1998 remove_reg_equal_equiv_notes (rtx insn
)
2002 loc
= ®_NOTES (insn
);
2005 enum reg_note kind
= REG_NOTE_KIND (*loc
);
2006 if (kind
== REG_EQUAL
|| kind
== REG_EQUIV
)
2007 *loc
= XEXP (*loc
, 1);
2009 loc
= &XEXP (*loc
, 1);
2013 /* Remove all REG_EQUAL and REG_EQUIV notes referring to REGNO. */
2016 remove_reg_equal_equiv_notes_for_regno (unsigned int regno
)
2023 /* This loop is a little tricky. We cannot just go down the chain because
2024 it is being modified by some actions in the loop. So we just iterate
2025 over the head. We plan to drain the list anyway. */
2026 while ((eq_use
= DF_REG_EQ_USE_CHAIN (regno
)) != NULL
)
2028 rtx insn
= DF_REF_INSN (eq_use
);
2029 rtx note
= find_reg_equal_equiv_note (insn
);
2031 /* This assert is generally triggered when someone deletes a REG_EQUAL
2032 or REG_EQUIV note by hacking the list manually rather than calling
2036 remove_note (insn
, note
);
2040 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
2041 return 1 if it is found. A simple equality test is used to determine if
2045 in_expr_list_p (const_rtx listp
, const_rtx node
)
2049 for (x
= listp
; x
; x
= XEXP (x
, 1))
2050 if (node
== XEXP (x
, 0))
2056 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
2057 remove that entry from the list if it is found.
2059 A simple equality test is used to determine if NODE matches. */
2062 remove_node_from_expr_list (const_rtx node
, rtx
*listp
)
2065 rtx prev
= NULL_RTX
;
2069 if (node
== XEXP (temp
, 0))
2071 /* Splice the node out of the list. */
2073 XEXP (prev
, 1) = XEXP (temp
, 1);
2075 *listp
= XEXP (temp
, 1);
2081 temp
= XEXP (temp
, 1);
2085 /* Nonzero if X contains any volatile instructions. These are instructions
2086 which may cause unpredictable machine state instructions, and thus no
2087 instructions should be moved or combined across them. This includes
2088 only volatile asms and UNSPEC_VOLATILE instructions. */
2091 volatile_insn_p (const_rtx x
)
2093 const RTX_CODE code
= GET_CODE (x
);
2114 case UNSPEC_VOLATILE
:
2115 /* case TRAP_IF: This isn't clear yet. */
2120 if (MEM_VOLATILE_P (x
))
2127 /* Recursively scan the operands of this expression. */
2130 const char *const fmt
= GET_RTX_FORMAT (code
);
2133 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2137 if (volatile_insn_p (XEXP (x
, i
)))
2140 else if (fmt
[i
] == 'E')
2143 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2144 if (volatile_insn_p (XVECEXP (x
, i
, j
)))
2152 /* Nonzero if X contains any volatile memory references
2153 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2156 volatile_refs_p (const_rtx x
)
2158 const RTX_CODE code
= GET_CODE (x
);
2177 case UNSPEC_VOLATILE
:
2183 if (MEM_VOLATILE_P (x
))
2190 /* Recursively scan the operands of this expression. */
2193 const char *const fmt
= GET_RTX_FORMAT (code
);
2196 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2200 if (volatile_refs_p (XEXP (x
, i
)))
2203 else if (fmt
[i
] == 'E')
2206 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2207 if (volatile_refs_p (XVECEXP (x
, i
, j
)))
2215 /* Similar to above, except that it also rejects register pre- and post-
2219 side_effects_p (const_rtx x
)
2221 const RTX_CODE code
= GET_CODE (x
);
2241 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2242 when some combination can't be done. If we see one, don't think
2243 that we can simplify the expression. */
2244 return (GET_MODE (x
) != VOIDmode
);
2253 case UNSPEC_VOLATILE
:
2254 /* case TRAP_IF: This isn't clear yet. */
2260 if (MEM_VOLATILE_P (x
))
2267 /* Recursively scan the operands of this expression. */
2270 const char *fmt
= GET_RTX_FORMAT (code
);
2273 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2277 if (side_effects_p (XEXP (x
, i
)))
2280 else if (fmt
[i
] == 'E')
2283 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2284 if (side_effects_p (XVECEXP (x
, i
, j
)))
2292 /* Return nonzero if evaluating rtx X might cause a trap.
2293 FLAGS controls how to consider MEMs. A nonzero means the context
2294 of the access may have changed from the original, such that the
2295 address may have become invalid. */
2298 may_trap_p_1 (const_rtx x
, unsigned flags
)
2304 /* We make no distinction currently, but this function is part of
2305 the internal target-hooks ABI so we keep the parameter as
2306 "unsigned flags". */
2307 bool code_changed
= flags
!= 0;
2311 code
= GET_CODE (x
);
2314 /* Handle these cases quickly. */
2329 case UNSPEC_VOLATILE
:
2330 return targetm
.unspec_may_trap_p (x
, flags
);
2337 return MEM_VOLATILE_P (x
);
2339 /* Memory ref can trap unless it's a static var or a stack slot. */
2341 /* Recognize specific pattern of stack checking probes. */
2342 if (flag_stack_check
2343 && MEM_VOLATILE_P (x
)
2344 && XEXP (x
, 0) == stack_pointer_rtx
)
2346 if (/* MEM_NOTRAP_P only relates to the actual position of the memory
2347 reference; moving it out of context such as when moving code
2348 when optimizing, might cause its address to become invalid. */
2350 || !MEM_NOTRAP_P (x
))
2352 HOST_WIDE_INT size
= MEM_SIZE_KNOWN_P (x
) ? MEM_SIZE (x
) : 0;
2353 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), 0, size
,
2354 GET_MODE (x
), code_changed
);
2359 /* Division by a non-constant might trap. */
2364 if (HONOR_SNANS (GET_MODE (x
)))
2366 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
)))
2367 return flag_trapping_math
;
2368 if (!CONSTANT_P (XEXP (x
, 1)) || (XEXP (x
, 1) == const0_rtx
))
2373 /* An EXPR_LIST is used to represent a function call. This
2374 certainly may trap. */
2383 /* Some floating point comparisons may trap. */
2384 if (!flag_trapping_math
)
2386 /* ??? There is no machine independent way to check for tests that trap
2387 when COMPARE is used, though many targets do make this distinction.
2388 For instance, sparc uses CCFPE for compares which generate exceptions
2389 and CCFP for compares which do not generate exceptions. */
2390 if (HONOR_NANS (GET_MODE (x
)))
2392 /* But often the compare has some CC mode, so check operand
2394 if (HONOR_NANS (GET_MODE (XEXP (x
, 0)))
2395 || HONOR_NANS (GET_MODE (XEXP (x
, 1))))
2401 if (HONOR_SNANS (GET_MODE (x
)))
2403 /* Often comparison is CC mode, so check operand modes. */
2404 if (HONOR_SNANS (GET_MODE (XEXP (x
, 0)))
2405 || HONOR_SNANS (GET_MODE (XEXP (x
, 1))))
2410 /* Conversion of floating point might trap. */
2411 if (flag_trapping_math
&& HONOR_NANS (GET_MODE (XEXP (x
, 0))))
2418 /* These operations don't trap even with floating point. */
2422 /* Any floating arithmetic may trap. */
2423 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
))
2424 && flag_trapping_math
)
2428 fmt
= GET_RTX_FORMAT (code
);
2429 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2433 if (may_trap_p_1 (XEXP (x
, i
), flags
))
2436 else if (fmt
[i
] == 'E')
2439 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2440 if (may_trap_p_1 (XVECEXP (x
, i
, j
), flags
))
2447 /* Return nonzero if evaluating rtx X might cause a trap. */
2450 may_trap_p (const_rtx x
)
2452 return may_trap_p_1 (x
, 0);
2455 /* Same as above, but additionally return nonzero if evaluating rtx X might
2456 cause a fault. We define a fault for the purpose of this function as a
2457 erroneous execution condition that cannot be encountered during the normal
2458 execution of a valid program; the typical example is an unaligned memory
2459 access on a strict alignment machine. The compiler guarantees that it
2460 doesn't generate code that will fault from a valid program, but this
2461 guarantee doesn't mean anything for individual instructions. Consider
2462 the following example:
2464 struct S { int d; union { char *cp; int *ip; }; };
2466 int foo(struct S *s)
2474 on a strict alignment machine. In a valid program, foo will never be
2475 invoked on a structure for which d is equal to 1 and the underlying
2476 unique field of the union not aligned on a 4-byte boundary, but the
2477 expression *s->ip might cause a fault if considered individually.
2479 At the RTL level, potentially problematic expressions will almost always
2480 verify may_trap_p; for example, the above dereference can be emitted as
2481 (mem:SI (reg:P)) and this expression is may_trap_p for a generic register.
2482 However, suppose that foo is inlined in a caller that causes s->cp to
2483 point to a local character variable and guarantees that s->d is not set
2484 to 1; foo may have been effectively translated into pseudo-RTL as:
2487 (set (reg:SI) (mem:SI (%fp - 7)))
2489 (set (reg:QI) (mem:QI (%fp - 7)))
2491 Now (mem:SI (%fp - 7)) is considered as not may_trap_p since it is a
2492 memory reference to a stack slot, but it will certainly cause a fault
2493 on a strict alignment machine. */
2496 may_trap_or_fault_p (const_rtx x
)
2498 return may_trap_p_1 (x
, 1);
2501 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2502 i.e., an inequality. */
2505 inequality_comparisons_p (const_rtx x
)
2509 const enum rtx_code code
= GET_CODE (x
);
2540 len
= GET_RTX_LENGTH (code
);
2541 fmt
= GET_RTX_FORMAT (code
);
2543 for (i
= 0; i
< len
; i
++)
2547 if (inequality_comparisons_p (XEXP (x
, i
)))
2550 else if (fmt
[i
] == 'E')
2553 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2554 if (inequality_comparisons_p (XVECEXP (x
, i
, j
)))
2562 /* Replace any occurrence of FROM in X with TO. The function does
2563 not enter into CONST_DOUBLE for the replace.
2565 Note that copying is not done so X must not be shared unless all copies
2566 are to be modified. */
2569 replace_rtx (rtx x
, rtx from
, rtx to
)
2574 /* The following prevents loops occurrence when we change MEM in
2575 CONST_DOUBLE onto the same CONST_DOUBLE. */
2576 if (x
!= 0 && GET_CODE (x
) == CONST_DOUBLE
)
2582 /* Allow this function to make replacements in EXPR_LISTs. */
2586 if (GET_CODE (x
) == SUBREG
)
2588 rtx new_rtx
= replace_rtx (SUBREG_REG (x
), from
, to
);
2590 if (CONST_INT_P (new_rtx
))
2592 x
= simplify_subreg (GET_MODE (x
), new_rtx
,
2593 GET_MODE (SUBREG_REG (x
)),
2598 SUBREG_REG (x
) = new_rtx
;
2602 else if (GET_CODE (x
) == ZERO_EXTEND
)
2604 rtx new_rtx
= replace_rtx (XEXP (x
, 0), from
, to
);
2606 if (CONST_INT_P (new_rtx
))
2608 x
= simplify_unary_operation (ZERO_EXTEND
, GET_MODE (x
),
2609 new_rtx
, GET_MODE (XEXP (x
, 0)));
2613 XEXP (x
, 0) = new_rtx
;
2618 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2619 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2622 XEXP (x
, i
) = replace_rtx (XEXP (x
, i
), from
, to
);
2623 else if (fmt
[i
] == 'E')
2624 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2625 XVECEXP (x
, i
, j
) = replace_rtx (XVECEXP (x
, i
, j
), from
, to
);
2631 /* Replace occurrences of the old label in *X with the new one.
2632 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2635 replace_label (rtx
*x
, void *data
)
2638 rtx old_label
= ((replace_label_data
*) data
)->r1
;
2639 rtx new_label
= ((replace_label_data
*) data
)->r2
;
2640 bool update_label_nuses
= ((replace_label_data
*) data
)->update_label_nuses
;
2645 if (GET_CODE (l
) == SYMBOL_REF
2646 && CONSTANT_POOL_ADDRESS_P (l
))
2648 rtx c
= get_pool_constant (l
);
2649 if (rtx_referenced_p (old_label
, c
))
2652 replace_label_data
*d
= (replace_label_data
*) data
;
2654 /* Create a copy of constant C; replace the label inside
2655 but do not update LABEL_NUSES because uses in constant pool
2657 new_c
= copy_rtx (c
);
2658 d
->update_label_nuses
= false;
2659 for_each_rtx (&new_c
, replace_label
, data
);
2660 d
->update_label_nuses
= update_label_nuses
;
2662 /* Add the new constant NEW_C to constant pool and replace
2663 the old reference to constant by new reference. */
2664 new_l
= XEXP (force_const_mem (get_pool_mode (l
), new_c
), 0);
2665 *x
= replace_rtx (l
, l
, new_l
);
2670 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2671 field. This is not handled by for_each_rtx because it doesn't
2672 handle unprinted ('0') fields. */
2673 if (JUMP_P (l
) && JUMP_LABEL (l
) == old_label
)
2674 JUMP_LABEL (l
) = new_label
;
2676 if ((GET_CODE (l
) == LABEL_REF
2677 || GET_CODE (l
) == INSN_LIST
)
2678 && XEXP (l
, 0) == old_label
)
2680 XEXP (l
, 0) = new_label
;
2681 if (update_label_nuses
)
2683 ++LABEL_NUSES (new_label
);
2684 --LABEL_NUSES (old_label
);
2692 /* When *BODY is equal to X or X is directly referenced by *BODY
2693 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2694 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2697 rtx_referenced_p_1 (rtx
*body
, void *x
)
2701 if (*body
== NULL_RTX
)
2702 return y
== NULL_RTX
;
2704 /* Return true if a label_ref *BODY refers to label Y. */
2705 if (GET_CODE (*body
) == LABEL_REF
&& LABEL_P (y
))
2706 return XEXP (*body
, 0) == y
;
2708 /* If *BODY is a reference to pool constant traverse the constant. */
2709 if (GET_CODE (*body
) == SYMBOL_REF
2710 && CONSTANT_POOL_ADDRESS_P (*body
))
2711 return rtx_referenced_p (y
, get_pool_constant (*body
));
2713 /* By default, compare the RTL expressions. */
2714 return rtx_equal_p (*body
, y
);
2717 /* Return true if X is referenced in BODY. */
2720 rtx_referenced_p (rtx x
, rtx body
)
2722 return for_each_rtx (&body
, rtx_referenced_p_1
, x
);
2725 /* If INSN is a tablejump return true and store the label (before jump table) to
2726 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2729 tablejump_p (const_rtx insn
, rtx
*labelp
, rtx
*tablep
)
2736 label
= JUMP_LABEL (insn
);
2737 if (label
!= NULL_RTX
&& !ANY_RETURN_P (label
)
2738 && (table
= next_active_insn (label
)) != NULL_RTX
2739 && JUMP_TABLE_DATA_P (table
))
2750 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2751 constant that is not in the constant pool and not in the condition
2752 of an IF_THEN_ELSE. */
2755 computed_jump_p_1 (const_rtx x
)
2757 const enum rtx_code code
= GET_CODE (x
);
2777 return ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
2778 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)));
2781 return (computed_jump_p_1 (XEXP (x
, 1))
2782 || computed_jump_p_1 (XEXP (x
, 2)));
2788 fmt
= GET_RTX_FORMAT (code
);
2789 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2792 && computed_jump_p_1 (XEXP (x
, i
)))
2795 else if (fmt
[i
] == 'E')
2796 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2797 if (computed_jump_p_1 (XVECEXP (x
, i
, j
)))
2804 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2806 Tablejumps and casesi insns are not considered indirect jumps;
2807 we can recognize them by a (use (label_ref)). */
2810 computed_jump_p (const_rtx insn
)
2815 rtx pat
= PATTERN (insn
);
2817 /* If we have a JUMP_LABEL set, we're not a computed jump. */
2818 if (JUMP_LABEL (insn
) != NULL
)
2821 if (GET_CODE (pat
) == PARALLEL
)
2823 int len
= XVECLEN (pat
, 0);
2824 int has_use_labelref
= 0;
2826 for (i
= len
- 1; i
>= 0; i
--)
2827 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
2828 && (GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0))
2830 has_use_labelref
= 1;
2832 if (! has_use_labelref
)
2833 for (i
= len
- 1; i
>= 0; i
--)
2834 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
2835 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
2836 && computed_jump_p_1 (SET_SRC (XVECEXP (pat
, 0, i
))))
2839 else if (GET_CODE (pat
) == SET
2840 && SET_DEST (pat
) == pc_rtx
2841 && computed_jump_p_1 (SET_SRC (pat
)))
2847 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2848 calls. Processes the subexpressions of EXP and passes them to F. */
2850 for_each_rtx_1 (rtx exp
, int n
, rtx_function f
, void *data
)
2853 const char *format
= GET_RTX_FORMAT (GET_CODE (exp
));
2856 for (; format
[n
] != '\0'; n
++)
2863 result
= (*f
) (x
, data
);
2865 /* Do not traverse sub-expressions. */
2867 else if (result
!= 0)
2868 /* Stop the traversal. */
2872 /* There are no sub-expressions. */
2875 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2878 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2886 if (XVEC (exp
, n
) == 0)
2888 for (j
= 0; j
< XVECLEN (exp
, n
); ++j
)
2891 x
= &XVECEXP (exp
, n
, j
);
2892 result
= (*f
) (x
, data
);
2894 /* Do not traverse sub-expressions. */
2896 else if (result
!= 0)
2897 /* Stop the traversal. */
2901 /* There are no sub-expressions. */
2904 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2907 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2915 /* Nothing to do. */
2923 /* Traverse X via depth-first search, calling F for each
2924 sub-expression (including X itself). F is also passed the DATA.
2925 If F returns -1, do not traverse sub-expressions, but continue
2926 traversing the rest of the tree. If F ever returns any other
2927 nonzero value, stop the traversal, and return the value returned
2928 by F. Otherwise, return 0. This function does not traverse inside
2929 tree structure that contains RTX_EXPRs, or into sub-expressions
2930 whose format code is `0' since it is not known whether or not those
2931 codes are actually RTL.
2933 This routine is very general, and could (should?) be used to
2934 implement many of the other routines in this file. */
2937 for_each_rtx (rtx
*x
, rtx_function f
, void *data
)
2943 result
= (*f
) (x
, data
);
2945 /* Do not traverse sub-expressions. */
2947 else if (result
!= 0)
2948 /* Stop the traversal. */
2952 /* There are no sub-expressions. */
2955 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2959 return for_each_rtx_1 (*x
, i
, f
, data
);
2964 /* Data structure that holds the internal state communicated between
2965 for_each_inc_dec, for_each_inc_dec_find_mem and
2966 for_each_inc_dec_find_inc_dec. */
2968 struct for_each_inc_dec_ops
{
2969 /* The function to be called for each autoinc operation found. */
2970 for_each_inc_dec_fn fn
;
2971 /* The opaque argument to be passed to it. */
2973 /* The MEM we're visiting, if any. */
2977 static int for_each_inc_dec_find_mem (rtx
*r
, void *d
);
2979 /* Find PRE/POST-INC/DEC/MODIFY operations within *R, extract the
2980 operands of the equivalent add insn and pass the result to the
2981 operator specified by *D. */
2984 for_each_inc_dec_find_inc_dec (rtx
*r
, void *d
)
2987 struct for_each_inc_dec_ops
*data
= (struct for_each_inc_dec_ops
*)d
;
2989 switch (GET_CODE (x
))
2994 int size
= GET_MODE_SIZE (GET_MODE (data
->mem
));
2995 rtx r1
= XEXP (x
, 0);
2996 rtx c
= gen_int_mode (size
, GET_MODE (r1
));
2997 return data
->fn (data
->mem
, x
, r1
, r1
, c
, data
->arg
);
3003 int size
= GET_MODE_SIZE (GET_MODE (data
->mem
));
3004 rtx r1
= XEXP (x
, 0);
3005 rtx c
= gen_int_mode (-size
, GET_MODE (r1
));
3006 return data
->fn (data
->mem
, x
, r1
, r1
, c
, data
->arg
);
3012 rtx r1
= XEXP (x
, 0);
3013 rtx add
= XEXP (x
, 1);
3014 return data
->fn (data
->mem
, x
, r1
, add
, NULL
, data
->arg
);
3019 rtx save
= data
->mem
;
3020 int ret
= for_each_inc_dec_find_mem (r
, d
);
3030 /* If *R is a MEM, find PRE/POST-INC/DEC/MODIFY operations within its
3031 address, extract the operands of the equivalent add insn and pass
3032 the result to the operator specified by *D. */
3035 for_each_inc_dec_find_mem (rtx
*r
, void *d
)
3038 if (x
!= NULL_RTX
&& MEM_P (x
))
3040 struct for_each_inc_dec_ops
*data
= (struct for_each_inc_dec_ops
*) d
;
3045 result
= for_each_rtx (&XEXP (x
, 0), for_each_inc_dec_find_inc_dec
,
3055 /* Traverse *X looking for MEMs, and for autoinc operations within
3056 them. For each such autoinc operation found, call FN, passing it
3057 the innermost enclosing MEM, the operation itself, the RTX modified
3058 by the operation, two RTXs (the second may be NULL) that, once
3059 added, represent the value to be held by the modified RTX
3060 afterwards, and ARG. FN is to return -1 to skip looking for other
3061 autoinc operations within the visited operation, 0 to continue the
3062 traversal, or any other value to have it returned to the caller of
3063 for_each_inc_dec. */
3066 for_each_inc_dec (rtx
*x
,
3067 for_each_inc_dec_fn fn
,
3070 struct for_each_inc_dec_ops data
;
3076 return for_each_rtx (x
, for_each_inc_dec_find_mem
, &data
);
3080 /* Searches X for any reference to REGNO, returning the rtx of the
3081 reference found if any. Otherwise, returns NULL_RTX. */
3084 regno_use_in (unsigned int regno
, rtx x
)
3090 if (REG_P (x
) && REGNO (x
) == regno
)
3093 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
3094 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
3098 if ((tem
= regno_use_in (regno
, XEXP (x
, i
))))
3101 else if (fmt
[i
] == 'E')
3102 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3103 if ((tem
= regno_use_in (regno
, XVECEXP (x
, i
, j
))))
3110 /* Return a value indicating whether OP, an operand of a commutative
3111 operation, is preferred as the first or second operand. The higher
3112 the value, the stronger the preference for being the first operand.
3113 We use negative values to indicate a preference for the first operand
3114 and positive values for the second operand. */
3117 commutative_operand_precedence (rtx op
)
3119 enum rtx_code code
= GET_CODE (op
);
3121 /* Constants always come the second operand. Prefer "nice" constants. */
3122 if (code
== CONST_INT
)
3124 if (code
== CONST_DOUBLE
)
3126 if (code
== CONST_FIXED
)
3128 op
= avoid_constant_pool_reference (op
);
3129 code
= GET_CODE (op
);
3131 switch (GET_RTX_CLASS (code
))
3134 if (code
== CONST_INT
)
3136 if (code
== CONST_DOUBLE
)
3138 if (code
== CONST_FIXED
)
3143 /* SUBREGs of objects should come second. */
3144 if (code
== SUBREG
&& OBJECT_P (SUBREG_REG (op
)))
3149 /* Complex expressions should be the first, so decrease priority
3150 of objects. Prefer pointer objects over non pointer objects. */
3151 if ((REG_P (op
) && REG_POINTER (op
))
3152 || (MEM_P (op
) && MEM_POINTER (op
)))
3156 case RTX_COMM_ARITH
:
3157 /* Prefer operands that are themselves commutative to be first.
3158 This helps to make things linear. In particular,
3159 (and (and (reg) (reg)) (not (reg))) is canonical. */
3163 /* If only one operand is a binary expression, it will be the first
3164 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
3165 is canonical, although it will usually be further simplified. */
3169 /* Then prefer NEG and NOT. */
3170 if (code
== NEG
|| code
== NOT
)
3178 /* Return 1 iff it is necessary to swap operands of commutative operation
3179 in order to canonicalize expression. */
3182 swap_commutative_operands_p (rtx x
, rtx y
)
3184 return (commutative_operand_precedence (x
)
3185 < commutative_operand_precedence (y
));
3188 /* Return 1 if X is an autoincrement side effect and the register is
3189 not the stack pointer. */
3191 auto_inc_p (const_rtx x
)
3193 switch (GET_CODE (x
))
3201 /* There are no REG_INC notes for SP. */
3202 if (XEXP (x
, 0) != stack_pointer_rtx
)
3210 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
3212 loc_mentioned_in_p (rtx
*loc
, const_rtx in
)
3221 code
= GET_CODE (in
);
3222 fmt
= GET_RTX_FORMAT (code
);
3223 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3227 if (loc
== &XEXP (in
, i
) || loc_mentioned_in_p (loc
, XEXP (in
, i
)))
3230 else if (fmt
[i
] == 'E')
3231 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
3232 if (loc
== &XVECEXP (in
, i
, j
)
3233 || loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
3239 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
3240 and SUBREG_BYTE, return the bit offset where the subreg begins
3241 (counting from the least significant bit of the operand). */
3244 subreg_lsb_1 (enum machine_mode outer_mode
,
3245 enum machine_mode inner_mode
,
3246 unsigned int subreg_byte
)
3248 unsigned int bitpos
;
3252 /* A paradoxical subreg begins at bit position 0. */
3253 if (GET_MODE_PRECISION (outer_mode
) > GET_MODE_PRECISION (inner_mode
))
3256 if (WORDS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
3257 /* If the subreg crosses a word boundary ensure that
3258 it also begins and ends on a word boundary. */
3259 gcc_assert (!((subreg_byte
% UNITS_PER_WORD
3260 + GET_MODE_SIZE (outer_mode
)) > UNITS_PER_WORD
3261 && (subreg_byte
% UNITS_PER_WORD
3262 || GET_MODE_SIZE (outer_mode
) % UNITS_PER_WORD
)));
3264 if (WORDS_BIG_ENDIAN
)
3265 word
= (GET_MODE_SIZE (inner_mode
)
3266 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) / UNITS_PER_WORD
;
3268 word
= subreg_byte
/ UNITS_PER_WORD
;
3269 bitpos
= word
* BITS_PER_WORD
;
3271 if (BYTES_BIG_ENDIAN
)
3272 byte
= (GET_MODE_SIZE (inner_mode
)
3273 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) % UNITS_PER_WORD
;
3275 byte
= subreg_byte
% UNITS_PER_WORD
;
3276 bitpos
+= byte
* BITS_PER_UNIT
;
3281 /* Given a subreg X, return the bit offset where the subreg begins
3282 (counting from the least significant bit of the reg). */
3285 subreg_lsb (const_rtx x
)
3287 return subreg_lsb_1 (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)),
3291 /* Fill in information about a subreg of a hard register.
3292 xregno - A regno of an inner hard subreg_reg (or what will become one).
3293 xmode - The mode of xregno.
3294 offset - The byte offset.
3295 ymode - The mode of a top level SUBREG (or what may become one).
3296 info - Pointer to structure to fill in. */
3298 subreg_get_info (unsigned int xregno
, enum machine_mode xmode
,
3299 unsigned int offset
, enum machine_mode ymode
,
3300 struct subreg_info
*info
)
3302 int nregs_xmode
, nregs_ymode
;
3303 int mode_multiple
, nregs_multiple
;
3304 int offset_adj
, y_offset
, y_offset_adj
;
3305 int regsize_xmode
, regsize_ymode
;
3308 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3312 /* If there are holes in a non-scalar mode in registers, we expect
3313 that it is made up of its units concatenated together. */
3314 if (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
))
3316 enum machine_mode xmode_unit
;
3318 nregs_xmode
= HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode
);
3319 if (GET_MODE_INNER (xmode
) == VOIDmode
)
3322 xmode_unit
= GET_MODE_INNER (xmode
);
3323 gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode_unit
));
3324 gcc_assert (nregs_xmode
3325 == (GET_MODE_NUNITS (xmode
)
3326 * HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode_unit
)));
3327 gcc_assert (hard_regno_nregs
[xregno
][xmode
]
3328 == (hard_regno_nregs
[xregno
][xmode_unit
]
3329 * GET_MODE_NUNITS (xmode
)));
3331 /* You can only ask for a SUBREG of a value with holes in the middle
3332 if you don't cross the holes. (Such a SUBREG should be done by
3333 picking a different register class, or doing it in memory if
3334 necessary.) An example of a value with holes is XCmode on 32-bit
3335 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
3336 3 for each part, but in memory it's two 128-bit parts.
3337 Padding is assumed to be at the end (not necessarily the 'high part')
3339 if ((offset
/ GET_MODE_SIZE (xmode_unit
) + 1
3340 < GET_MODE_NUNITS (xmode
))
3341 && (offset
/ GET_MODE_SIZE (xmode_unit
)
3342 != ((offset
+ GET_MODE_SIZE (ymode
) - 1)
3343 / GET_MODE_SIZE (xmode_unit
))))
3345 info
->representable_p
= false;
3350 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3352 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3354 /* Paradoxical subregs are otherwise valid. */
3357 && GET_MODE_PRECISION (ymode
) > GET_MODE_PRECISION (xmode
))
3359 info
->representable_p
= true;
3360 /* If this is a big endian paradoxical subreg, which uses more
3361 actual hard registers than the original register, we must
3362 return a negative offset so that we find the proper highpart
3364 if (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3365 ? REG_WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
3366 info
->offset
= nregs_xmode
- nregs_ymode
;
3369 info
->nregs
= nregs_ymode
;
3373 /* If registers store different numbers of bits in the different
3374 modes, we cannot generally form this subreg. */
3375 if (!HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
)
3376 && !HARD_REGNO_NREGS_HAS_PADDING (xregno
, ymode
)
3377 && (GET_MODE_SIZE (xmode
) % nregs_xmode
) == 0
3378 && (GET_MODE_SIZE (ymode
) % nregs_ymode
) == 0)
3380 regsize_xmode
= GET_MODE_SIZE (xmode
) / nregs_xmode
;
3381 regsize_ymode
= GET_MODE_SIZE (ymode
) / nregs_ymode
;
3382 if (!rknown
&& regsize_xmode
> regsize_ymode
&& nregs_ymode
> 1)
3384 info
->representable_p
= false;
3386 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3387 info
->offset
= offset
/ regsize_xmode
;
3390 if (!rknown
&& regsize_ymode
> regsize_xmode
&& nregs_xmode
> 1)
3392 info
->representable_p
= false;
3394 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3395 info
->offset
= offset
/ regsize_xmode
;
3400 /* Lowpart subregs are otherwise valid. */
3401 if (!rknown
&& offset
== subreg_lowpart_offset (ymode
, xmode
))
3403 info
->representable_p
= true;
3406 if (offset
== 0 || nregs_xmode
== nregs_ymode
)
3409 info
->nregs
= nregs_ymode
;
3414 /* This should always pass, otherwise we don't know how to verify
3415 the constraint. These conditions may be relaxed but
3416 subreg_regno_offset would need to be redesigned. */
3417 gcc_assert ((GET_MODE_SIZE (xmode
) % GET_MODE_SIZE (ymode
)) == 0);
3418 gcc_assert ((nregs_xmode
% nregs_ymode
) == 0);
3420 if (WORDS_BIG_ENDIAN
!= REG_WORDS_BIG_ENDIAN
3421 && GET_MODE_SIZE (xmode
) > UNITS_PER_WORD
)
3423 HOST_WIDE_INT xsize
= GET_MODE_SIZE (xmode
);
3424 HOST_WIDE_INT ysize
= GET_MODE_SIZE (ymode
);
3425 HOST_WIDE_INT off_low
= offset
& (ysize
- 1);
3426 HOST_WIDE_INT off_high
= offset
& ~(ysize
- 1);
3427 offset
= (xsize
- ysize
- off_high
) | off_low
;
3429 /* The XMODE value can be seen as a vector of NREGS_XMODE
3430 values. The subreg must represent a lowpart of given field.
3431 Compute what field it is. */
3432 offset_adj
= offset
;
3433 offset_adj
-= subreg_lowpart_offset (ymode
,
3434 mode_for_size (GET_MODE_BITSIZE (xmode
)
3438 /* Size of ymode must not be greater than the size of xmode. */
3439 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3440 gcc_assert (mode_multiple
!= 0);
3442 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3443 y_offset_adj
= offset_adj
/ GET_MODE_SIZE (ymode
);
3444 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3446 gcc_assert ((offset_adj
% GET_MODE_SIZE (ymode
)) == 0);
3447 gcc_assert ((mode_multiple
% nregs_multiple
) == 0);
3451 info
->representable_p
= (!(y_offset_adj
% (mode_multiple
/ nregs_multiple
)));
3454 info
->offset
= (y_offset
/ (mode_multiple
/ nregs_multiple
)) * nregs_ymode
;
3455 info
->nregs
= nregs_ymode
;
3458 /* This function returns the regno offset of a subreg expression.
3459 xregno - A regno of an inner hard subreg_reg (or what will become one).
3460 xmode - The mode of xregno.
3461 offset - The byte offset.
3462 ymode - The mode of a top level SUBREG (or what may become one).
3463 RETURN - The regno offset which would be used. */
3465 subreg_regno_offset (unsigned int xregno
, enum machine_mode xmode
,
3466 unsigned int offset
, enum machine_mode ymode
)
3468 struct subreg_info info
;
3469 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3473 /* This function returns true when the offset is representable via
3474 subreg_offset in the given regno.
3475 xregno - A regno of an inner hard subreg_reg (or what will become one).
3476 xmode - The mode of xregno.
3477 offset - The byte offset.
3478 ymode - The mode of a top level SUBREG (or what may become one).
3479 RETURN - Whether the offset is representable. */
3481 subreg_offset_representable_p (unsigned int xregno
, enum machine_mode xmode
,
3482 unsigned int offset
, enum machine_mode ymode
)
3484 struct subreg_info info
;
3485 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3486 return info
.representable_p
;
3489 /* Return the number of a YMODE register to which
3491 (subreg:YMODE (reg:XMODE XREGNO) OFFSET)
3493 can be simplified. Return -1 if the subreg can't be simplified.
3495 XREGNO is a hard register number. */
3498 simplify_subreg_regno (unsigned int xregno
, enum machine_mode xmode
,
3499 unsigned int offset
, enum machine_mode ymode
)
3501 struct subreg_info info
;
3502 unsigned int yregno
;
3504 #ifdef CANNOT_CHANGE_MODE_CLASS
3505 /* Give the backend a chance to disallow the mode change. */
3506 if (GET_MODE_CLASS (xmode
) != MODE_COMPLEX_INT
3507 && GET_MODE_CLASS (xmode
) != MODE_COMPLEX_FLOAT
3508 && REG_CANNOT_CHANGE_MODE_P (xregno
, xmode
, ymode
))
3512 /* We shouldn't simplify stack-related registers. */
3513 if ((!reload_completed
|| frame_pointer_needed
)
3514 && xregno
== FRAME_POINTER_REGNUM
)
3517 if (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
3518 && xregno
== ARG_POINTER_REGNUM
)
3521 if (xregno
== STACK_POINTER_REGNUM
)
3524 /* Try to get the register offset. */
3525 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3526 if (!info
.representable_p
)
3529 /* Make sure that the offsetted register value is in range. */
3530 yregno
= xregno
+ info
.offset
;
3531 if (!HARD_REGISTER_NUM_P (yregno
))
3534 /* See whether (reg:YMODE YREGNO) is valid.
3536 ??? We allow invalid registers if (reg:XMODE XREGNO) is also invalid.
3537 This is a kludge to work around how complex FP arguments are passed
3538 on IA-64 and should be fixed. See PR target/49226. */
3539 if (!HARD_REGNO_MODE_OK (yregno
, ymode
)
3540 && HARD_REGNO_MODE_OK (xregno
, xmode
))
3543 return (int) yregno
;
3546 /* Return the final regno that a subreg expression refers to. */
3548 subreg_regno (const_rtx x
)
3551 rtx subreg
= SUBREG_REG (x
);
3552 int regno
= REGNO (subreg
);
3554 ret
= regno
+ subreg_regno_offset (regno
,
3562 /* Return the number of registers that a subreg expression refers
3565 subreg_nregs (const_rtx x
)
3567 return subreg_nregs_with_regno (REGNO (SUBREG_REG (x
)), x
);
3570 /* Return the number of registers that a subreg REG with REGNO
3571 expression refers to. This is a copy of the rtlanal.c:subreg_nregs
3572 changed so that the regno can be passed in. */
3575 subreg_nregs_with_regno (unsigned int regno
, const_rtx x
)
3577 struct subreg_info info
;
3578 rtx subreg
= SUBREG_REG (x
);
3580 subreg_get_info (regno
, GET_MODE (subreg
), SUBREG_BYTE (x
), GET_MODE (x
),
3586 struct parms_set_data
3592 /* Helper function for noticing stores to parameter registers. */
3594 parms_set (rtx x
, const_rtx pat ATTRIBUTE_UNUSED
, void *data
)
3596 struct parms_set_data
*const d
= (struct parms_set_data
*) data
;
3597 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
3598 && TEST_HARD_REG_BIT (d
->regs
, REGNO (x
)))
3600 CLEAR_HARD_REG_BIT (d
->regs
, REGNO (x
));
3605 /* Look backward for first parameter to be loaded.
3606 Note that loads of all parameters will not necessarily be
3607 found if CSE has eliminated some of them (e.g., an argument
3608 to the outer function is passed down as a parameter).
3609 Do not skip BOUNDARY. */
3611 find_first_parameter_load (rtx call_insn
, rtx boundary
)
3613 struct parms_set_data parm
;
3614 rtx p
, before
, first_set
;
3616 /* Since different machines initialize their parameter registers
3617 in different orders, assume nothing. Collect the set of all
3618 parameter registers. */
3619 CLEAR_HARD_REG_SET (parm
.regs
);
3621 for (p
= CALL_INSN_FUNCTION_USAGE (call_insn
); p
; p
= XEXP (p
, 1))
3622 if (GET_CODE (XEXP (p
, 0)) == USE
3623 && REG_P (XEXP (XEXP (p
, 0), 0)))
3625 gcc_assert (REGNO (XEXP (XEXP (p
, 0), 0)) < FIRST_PSEUDO_REGISTER
);
3627 /* We only care about registers which can hold function
3629 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p
, 0), 0))))
3632 SET_HARD_REG_BIT (parm
.regs
, REGNO (XEXP (XEXP (p
, 0), 0)));
3636 first_set
= call_insn
;
3638 /* Search backward for the first set of a register in this set. */
3639 while (parm
.nregs
&& before
!= boundary
)
3641 before
= PREV_INSN (before
);
3643 /* It is possible that some loads got CSEed from one call to
3644 another. Stop in that case. */
3645 if (CALL_P (before
))
3648 /* Our caller needs either ensure that we will find all sets
3649 (in case code has not been optimized yet), or take care
3650 for possible labels in a way by setting boundary to preceding
3652 if (LABEL_P (before
))
3654 gcc_assert (before
== boundary
);
3658 if (INSN_P (before
))
3660 int nregs_old
= parm
.nregs
;
3661 note_stores (PATTERN (before
), parms_set
, &parm
);
3662 /* If we found something that did not set a parameter reg,
3663 we're done. Do not keep going, as that might result
3664 in hoisting an insn before the setting of a pseudo
3665 that is used by the hoisted insn. */
3666 if (nregs_old
!= parm
.nregs
)
3675 /* Return true if we should avoid inserting code between INSN and preceding
3676 call instruction. */
3679 keep_with_call_p (const_rtx insn
)
3683 if (INSN_P (insn
) && (set
= single_set (insn
)) != NULL
)
3685 if (REG_P (SET_DEST (set
))
3686 && REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
3687 && fixed_regs
[REGNO (SET_DEST (set
))]
3688 && general_operand (SET_SRC (set
), VOIDmode
))
3690 if (REG_P (SET_SRC (set
))
3691 && targetm
.calls
.function_value_regno_p (REGNO (SET_SRC (set
)))
3692 && REG_P (SET_DEST (set
))
3693 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3695 /* There may be a stack pop just after the call and before the store
3696 of the return register. Search for the actual store when deciding
3697 if we can break or not. */
3698 if (SET_DEST (set
) == stack_pointer_rtx
)
3700 /* This CONST_CAST is okay because next_nonnote_insn just
3701 returns its argument and we assign it to a const_rtx
3703 const_rtx i2
= next_nonnote_insn (CONST_CAST_RTX(insn
));
3704 if (i2
&& keep_with_call_p (i2
))
3711 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3712 to non-complex jumps. That is, direct unconditional, conditional,
3713 and tablejumps, but not computed jumps or returns. It also does
3714 not apply to the fallthru case of a conditional jump. */
3717 label_is_jump_target_p (const_rtx label
, const_rtx jump_insn
)
3719 rtx tmp
= JUMP_LABEL (jump_insn
);
3724 if (tablejump_p (jump_insn
, NULL
, &tmp
))
3726 rtvec vec
= XVEC (PATTERN (tmp
),
3727 GET_CODE (PATTERN (tmp
)) == ADDR_DIFF_VEC
);
3728 int i
, veclen
= GET_NUM_ELEM (vec
);
3730 for (i
= 0; i
< veclen
; ++i
)
3731 if (XEXP (RTVEC_ELT (vec
, i
), 0) == label
)
3735 if (find_reg_note (jump_insn
, REG_LABEL_TARGET
, label
))
3742 /* Return an estimate of the cost of computing rtx X.
3743 One use is in cse, to decide which expression to keep in the hash table.
3744 Another is in rtl generation, to pick the cheapest way to multiply.
3745 Other uses like the latter are expected in the future.
3747 X appears as operand OPNO in an expression with code OUTER_CODE.
3748 SPEED specifies whether costs optimized for speed or size should
3752 rtx_cost (rtx x
, enum rtx_code outer_code
, int opno
, bool speed
)
3763 /* A size N times larger than UNITS_PER_WORD likely needs N times as
3764 many insns, taking N times as long. */
3765 factor
= GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
;
3769 /* Compute the default costs of certain things.
3770 Note that targetm.rtx_costs can override the defaults. */
3772 code
= GET_CODE (x
);
3776 /* Multiplication has time-complexity O(N*N), where N is the
3777 number of units (translated from digits) when using
3778 schoolbook long multiplication. */
3779 total
= factor
* factor
* COSTS_N_INSNS (5);
3785 /* Similarly, complexity for schoolbook long division. */
3786 total
= factor
* factor
* COSTS_N_INSNS (7);
3789 /* Used in combine.c as a marker. */
3793 /* A SET doesn't have a mode, so let's look at the SET_DEST to get
3794 the mode for the factor. */
3795 factor
= GET_MODE_SIZE (GET_MODE (SET_DEST (x
))) / UNITS_PER_WORD
;
3800 total
= factor
* COSTS_N_INSNS (1);
3810 /* If we can't tie these modes, make this expensive. The larger
3811 the mode, the more expensive it is. */
3812 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
3813 return COSTS_N_INSNS (2 + factor
);
3817 if (targetm
.rtx_costs (x
, code
, outer_code
, opno
, &total
, speed
))
3822 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3823 which is already in total. */
3825 fmt
= GET_RTX_FORMAT (code
);
3826 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3828 total
+= rtx_cost (XEXP (x
, i
), code
, i
, speed
);
3829 else if (fmt
[i
] == 'E')
3830 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3831 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
, i
, speed
);
3836 /* Fill in the structure C with information about both speed and size rtx
3837 costs for X, which is operand OPNO in an expression with code OUTER. */
3840 get_full_rtx_cost (rtx x
, enum rtx_code outer
, int opno
,
3841 struct full_rtx_costs
*c
)
3843 c
->speed
= rtx_cost (x
, outer
, opno
, true);
3844 c
->size
= rtx_cost (x
, outer
, opno
, false);
3848 /* Return cost of address expression X.
3849 Expect that X is properly formed address reference.
3851 SPEED parameter specify whether costs optimized for speed or size should
3855 address_cost (rtx x
, enum machine_mode mode
, addr_space_t as
, bool speed
)
3857 /* We may be asked for cost of various unusual addresses, such as operands
3858 of push instruction. It is not worthwhile to complicate writing
3859 of the target hook by such cases. */
3861 if (!memory_address_addr_space_p (mode
, x
, as
))
3864 return targetm
.address_cost (x
, speed
);
3867 /* If the target doesn't override, compute the cost as with arithmetic. */
3870 default_address_cost (rtx x
, bool speed
)
3872 return rtx_cost (x
, MEM
, 0, speed
);
3876 unsigned HOST_WIDE_INT
3877 nonzero_bits (const_rtx x
, enum machine_mode mode
)
3879 return cached_nonzero_bits (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3883 num_sign_bit_copies (const_rtx x
, enum machine_mode mode
)
3885 return cached_num_sign_bit_copies (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3888 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3889 It avoids exponential behavior in nonzero_bits1 when X has
3890 identical subexpressions on the first or the second level. */
3892 static unsigned HOST_WIDE_INT
3893 cached_nonzero_bits (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3894 enum machine_mode known_mode
,
3895 unsigned HOST_WIDE_INT known_ret
)
3897 if (x
== known_x
&& mode
== known_mode
)
3900 /* Try to find identical subexpressions. If found call
3901 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3902 precomputed value for the subexpression as KNOWN_RET. */
3904 if (ARITHMETIC_P (x
))
3906 rtx x0
= XEXP (x
, 0);
3907 rtx x1
= XEXP (x
, 1);
3909 /* Check the first level. */
3911 return nonzero_bits1 (x
, mode
, x0
, mode
,
3912 cached_nonzero_bits (x0
, mode
, known_x
,
3913 known_mode
, known_ret
));
3915 /* Check the second level. */
3916 if (ARITHMETIC_P (x0
)
3917 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3918 return nonzero_bits1 (x
, mode
, x1
, mode
,
3919 cached_nonzero_bits (x1
, mode
, known_x
,
3920 known_mode
, known_ret
));
3922 if (ARITHMETIC_P (x1
)
3923 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
3924 return nonzero_bits1 (x
, mode
, x0
, mode
,
3925 cached_nonzero_bits (x0
, mode
, known_x
,
3926 known_mode
, known_ret
));
3929 return nonzero_bits1 (x
, mode
, known_x
, known_mode
, known_ret
);
3932 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3933 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3934 is less useful. We can't allow both, because that results in exponential
3935 run time recursion. There is a nullstone testcase that triggered
3936 this. This macro avoids accidental uses of num_sign_bit_copies. */
3937 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3939 /* Given an expression, X, compute which bits in X can be nonzero.
3940 We don't care about bits outside of those defined in MODE.
3942 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3943 an arithmetic operation, we can do better. */
3945 static unsigned HOST_WIDE_INT
3946 nonzero_bits1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3947 enum machine_mode known_mode
,
3948 unsigned HOST_WIDE_INT known_ret
)
3950 unsigned HOST_WIDE_INT nonzero
= GET_MODE_MASK (mode
);
3951 unsigned HOST_WIDE_INT inner_nz
;
3953 enum machine_mode inner_mode
;
3954 unsigned int mode_width
= GET_MODE_PRECISION (mode
);
3956 /* For floating-point and vector values, assume all bits are needed. */
3957 if (FLOAT_MODE_P (GET_MODE (x
)) || FLOAT_MODE_P (mode
)
3958 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
3961 /* If X is wider than MODE, use its mode instead. */
3962 if (GET_MODE_PRECISION (GET_MODE (x
)) > mode_width
)
3964 mode
= GET_MODE (x
);
3965 nonzero
= GET_MODE_MASK (mode
);
3966 mode_width
= GET_MODE_PRECISION (mode
);
3969 if (mode_width
> HOST_BITS_PER_WIDE_INT
)
3970 /* Our only callers in this case look for single bit values. So
3971 just return the mode mask. Those tests will then be false. */
3974 #ifndef WORD_REGISTER_OPERATIONS
3975 /* If MODE is wider than X, but both are a single word for both the host
3976 and target machines, we can compute this from which bits of the
3977 object might be nonzero in its own mode, taking into account the fact
3978 that on many CISC machines, accessing an object in a wider mode
3979 causes the high-order bits to become undefined. So they are
3980 not known to be zero. */
3982 if (GET_MODE (x
) != VOIDmode
&& GET_MODE (x
) != mode
3983 && GET_MODE_PRECISION (GET_MODE (x
)) <= BITS_PER_WORD
3984 && GET_MODE_PRECISION (GET_MODE (x
)) <= HOST_BITS_PER_WIDE_INT
3985 && GET_MODE_PRECISION (mode
) > GET_MODE_PRECISION (GET_MODE (x
)))
3987 nonzero
&= cached_nonzero_bits (x
, GET_MODE (x
),
3988 known_x
, known_mode
, known_ret
);
3989 nonzero
|= GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
));
3994 code
= GET_CODE (x
);
3998 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3999 /* If pointers extend unsigned and this is a pointer in Pmode, say that
4000 all the bits above ptr_mode are known to be zero. */
4001 /* As we do not know which address space the pointer is referring to,
4002 we can do this only if the target does not support different pointer
4003 or address modes depending on the address space. */
4004 if (target_default_pointer_address_modes_p ()
4005 && POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4007 nonzero
&= GET_MODE_MASK (ptr_mode
);
4010 /* Include declared information about alignment of pointers. */
4011 /* ??? We don't properly preserve REG_POINTER changes across
4012 pointer-to-integer casts, so we can't trust it except for
4013 things that we know must be pointers. See execute/960116-1.c. */
4014 if ((x
== stack_pointer_rtx
4015 || x
== frame_pointer_rtx
4016 || x
== arg_pointer_rtx
)
4017 && REGNO_POINTER_ALIGN (REGNO (x
)))
4019 unsigned HOST_WIDE_INT alignment
4020 = REGNO_POINTER_ALIGN (REGNO (x
)) / BITS_PER_UNIT
;
4022 #ifdef PUSH_ROUNDING
4023 /* If PUSH_ROUNDING is defined, it is possible for the
4024 stack to be momentarily aligned only to that amount,
4025 so we pick the least alignment. */
4026 if (x
== stack_pointer_rtx
&& PUSH_ARGS
)
4027 alignment
= MIN ((unsigned HOST_WIDE_INT
) PUSH_ROUNDING (1),
4031 nonzero
&= ~(alignment
- 1);
4035 unsigned HOST_WIDE_INT nonzero_for_hook
= nonzero
;
4036 rtx new_rtx
= rtl_hooks
.reg_nonzero_bits (x
, mode
, known_x
,
4037 known_mode
, known_ret
,
4041 nonzero_for_hook
&= cached_nonzero_bits (new_rtx
, mode
, known_x
,
4042 known_mode
, known_ret
);
4044 return nonzero_for_hook
;
4048 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
4049 /* If X is negative in MODE, sign-extend the value. */
4051 && mode_width
< BITS_PER_WORD
4052 && (UINTVAL (x
) & ((unsigned HOST_WIDE_INT
) 1 << (mode_width
- 1)))
4054 return UINTVAL (x
) | ((unsigned HOST_WIDE_INT
) (-1) << mode_width
);
4060 #ifdef LOAD_EXTEND_OP
4061 /* In many, if not most, RISC machines, reading a byte from memory
4062 zeros the rest of the register. Noticing that fact saves a lot
4063 of extra zero-extends. */
4064 if (LOAD_EXTEND_OP (GET_MODE (x
)) == ZERO_EXTEND
)
4065 nonzero
&= GET_MODE_MASK (GET_MODE (x
));
4070 case UNEQ
: case LTGT
:
4071 case GT
: case GTU
: case UNGT
:
4072 case LT
: case LTU
: case UNLT
:
4073 case GE
: case GEU
: case UNGE
:
4074 case LE
: case LEU
: case UNLE
:
4075 case UNORDERED
: case ORDERED
:
4076 /* If this produces an integer result, we know which bits are set.
4077 Code here used to clear bits outside the mode of X, but that is
4079 /* Mind that MODE is the mode the caller wants to look at this
4080 operation in, and not the actual operation mode. We can wind
4081 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
4082 that describes the results of a vector compare. */
4083 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
4084 && mode_width
<= HOST_BITS_PER_WIDE_INT
)
4085 nonzero
= STORE_FLAG_VALUE
;
4090 /* Disabled to avoid exponential mutual recursion between nonzero_bits
4091 and num_sign_bit_copies. */
4092 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
4093 == GET_MODE_PRECISION (GET_MODE (x
)))
4097 if (GET_MODE_PRECISION (GET_MODE (x
)) < mode_width
)
4098 nonzero
|= (GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
)));
4103 /* Disabled to avoid exponential mutual recursion between nonzero_bits
4104 and num_sign_bit_copies. */
4105 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
4106 == GET_MODE_PRECISION (GET_MODE (x
)))
4112 nonzero
&= (cached_nonzero_bits (XEXP (x
, 0), mode
,
4113 known_x
, known_mode
, known_ret
)
4114 & GET_MODE_MASK (mode
));
4118 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
4119 known_x
, known_mode
, known_ret
);
4120 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
4121 nonzero
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
4125 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
4126 Otherwise, show all the bits in the outer mode but not the inner
4128 inner_nz
= cached_nonzero_bits (XEXP (x
, 0), mode
,
4129 known_x
, known_mode
, known_ret
);
4130 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
4132 inner_nz
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
4133 if (val_signbit_known_set_p (GET_MODE (XEXP (x
, 0)), inner_nz
))
4134 inner_nz
|= (GET_MODE_MASK (mode
)
4135 & ~GET_MODE_MASK (GET_MODE (XEXP (x
, 0))));
4138 nonzero
&= inner_nz
;
4142 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
4143 known_x
, known_mode
, known_ret
)
4144 & cached_nonzero_bits (XEXP (x
, 1), mode
,
4145 known_x
, known_mode
, known_ret
);
4149 case UMIN
: case UMAX
: case SMIN
: case SMAX
:
4151 unsigned HOST_WIDE_INT nonzero0
4152 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4153 known_x
, known_mode
, known_ret
);
4155 /* Don't call nonzero_bits for the second time if it cannot change
4157 if ((nonzero
& nonzero0
) != nonzero
)
4159 | cached_nonzero_bits (XEXP (x
, 1), mode
,
4160 known_x
, known_mode
, known_ret
);
4164 case PLUS
: case MINUS
:
4166 case DIV
: case UDIV
:
4167 case MOD
: case UMOD
:
4168 /* We can apply the rules of arithmetic to compute the number of
4169 high- and low-order zero bits of these operations. We start by
4170 computing the width (position of the highest-order nonzero bit)
4171 and the number of low-order zero bits for each value. */
4173 unsigned HOST_WIDE_INT nz0
4174 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4175 known_x
, known_mode
, known_ret
);
4176 unsigned HOST_WIDE_INT nz1
4177 = cached_nonzero_bits (XEXP (x
, 1), mode
,
4178 known_x
, known_mode
, known_ret
);
4179 int sign_index
= GET_MODE_PRECISION (GET_MODE (x
)) - 1;
4180 int width0
= floor_log2 (nz0
) + 1;
4181 int width1
= floor_log2 (nz1
) + 1;
4182 int low0
= floor_log2 (nz0
& -nz0
);
4183 int low1
= floor_log2 (nz1
& -nz1
);
4184 unsigned HOST_WIDE_INT op0_maybe_minusp
4185 = nz0
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
4186 unsigned HOST_WIDE_INT op1_maybe_minusp
4187 = nz1
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
4188 unsigned int result_width
= mode_width
;
4194 result_width
= MAX (width0
, width1
) + 1;
4195 result_low
= MIN (low0
, low1
);
4198 result_low
= MIN (low0
, low1
);
4201 result_width
= width0
+ width1
;
4202 result_low
= low0
+ low1
;
4207 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
4208 result_width
= width0
;
4213 result_width
= width0
;
4218 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
4219 result_width
= MIN (width0
, width1
);
4220 result_low
= MIN (low0
, low1
);
4225 result_width
= MIN (width0
, width1
);
4226 result_low
= MIN (low0
, low1
);
4232 if (result_width
< mode_width
)
4233 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << result_width
) - 1;
4236 nonzero
&= ~(((unsigned HOST_WIDE_INT
) 1 << result_low
) - 1);
4241 if (CONST_INT_P (XEXP (x
, 1))
4242 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
4243 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << INTVAL (XEXP (x
, 1))) - 1;
4247 /* If this is a SUBREG formed for a promoted variable that has
4248 been zero-extended, we know that at least the high-order bits
4249 are zero, though others might be too. */
4251 if (SUBREG_PROMOTED_VAR_P (x
) && SUBREG_PROMOTED_UNSIGNED_P (x
) > 0)
4252 nonzero
= GET_MODE_MASK (GET_MODE (x
))
4253 & cached_nonzero_bits (SUBREG_REG (x
), GET_MODE (x
),
4254 known_x
, known_mode
, known_ret
);
4256 inner_mode
= GET_MODE (SUBREG_REG (x
));
4257 /* If the inner mode is a single word for both the host and target
4258 machines, we can compute this from which bits of the inner
4259 object might be nonzero. */
4260 if (GET_MODE_PRECISION (inner_mode
) <= BITS_PER_WORD
4261 && (GET_MODE_PRECISION (inner_mode
) <= HOST_BITS_PER_WIDE_INT
))
4263 nonzero
&= cached_nonzero_bits (SUBREG_REG (x
), mode
,
4264 known_x
, known_mode
, known_ret
);
4266 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
4267 /* If this is a typical RISC machine, we only have to worry
4268 about the way loads are extended. */
4269 if ((LOAD_EXTEND_OP (inner_mode
) == SIGN_EXTEND
4270 ? val_signbit_known_set_p (inner_mode
, nonzero
)
4271 : LOAD_EXTEND_OP (inner_mode
) != ZERO_EXTEND
)
4272 || !MEM_P (SUBREG_REG (x
)))
4275 /* On many CISC machines, accessing an object in a wider mode
4276 causes the high-order bits to become undefined. So they are
4277 not known to be zero. */
4278 if (GET_MODE_PRECISION (GET_MODE (x
))
4279 > GET_MODE_PRECISION (inner_mode
))
4280 nonzero
|= (GET_MODE_MASK (GET_MODE (x
))
4281 & ~GET_MODE_MASK (inner_mode
));
4290 /* The nonzero bits are in two classes: any bits within MODE
4291 that aren't in GET_MODE (x) are always significant. The rest of the
4292 nonzero bits are those that are significant in the operand of
4293 the shift when shifted the appropriate number of bits. This
4294 shows that high-order bits are cleared by the right shift and
4295 low-order bits by left shifts. */
4296 if (CONST_INT_P (XEXP (x
, 1))
4297 && INTVAL (XEXP (x
, 1)) >= 0
4298 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
4299 && INTVAL (XEXP (x
, 1)) < GET_MODE_PRECISION (GET_MODE (x
)))
4301 enum machine_mode inner_mode
= GET_MODE (x
);
4302 unsigned int width
= GET_MODE_PRECISION (inner_mode
);
4303 int count
= INTVAL (XEXP (x
, 1));
4304 unsigned HOST_WIDE_INT mode_mask
= GET_MODE_MASK (inner_mode
);
4305 unsigned HOST_WIDE_INT op_nonzero
4306 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4307 known_x
, known_mode
, known_ret
);
4308 unsigned HOST_WIDE_INT inner
= op_nonzero
& mode_mask
;
4309 unsigned HOST_WIDE_INT outer
= 0;
4311 if (mode_width
> width
)
4312 outer
= (op_nonzero
& nonzero
& ~mode_mask
);
4314 if (code
== LSHIFTRT
)
4316 else if (code
== ASHIFTRT
)
4320 /* If the sign bit may have been nonzero before the shift, we
4321 need to mark all the places it could have been copied to
4322 by the shift as possibly nonzero. */
4323 if (inner
& ((unsigned HOST_WIDE_INT
) 1 << (width
- 1 - count
)))
4324 inner
|= (((unsigned HOST_WIDE_INT
) 1 << count
) - 1)
4327 else if (code
== ASHIFT
)
4330 inner
= ((inner
<< (count
% width
)
4331 | (inner
>> (width
- (count
% width
)))) & mode_mask
);
4333 nonzero
&= (outer
| inner
);
4339 /* This is at most the number of bits in the mode. */
4340 nonzero
= ((unsigned HOST_WIDE_INT
) 2 << (floor_log2 (mode_width
))) - 1;
4344 /* If CLZ has a known value at zero, then the nonzero bits are
4345 that value, plus the number of bits in the mode minus one. */
4346 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4348 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4354 /* If CTZ has a known value at zero, then the nonzero bits are
4355 that value, plus the number of bits in the mode minus one. */
4356 if (CTZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4358 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4364 /* This is at most the number of bits in the mode minus 1. */
4365 nonzero
= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4374 unsigned HOST_WIDE_INT nonzero_true
4375 = cached_nonzero_bits (XEXP (x
, 1), mode
,
4376 known_x
, known_mode
, known_ret
);
4378 /* Don't call nonzero_bits for the second time if it cannot change
4380 if ((nonzero
& nonzero_true
) != nonzero
)
4381 nonzero
&= nonzero_true
4382 | cached_nonzero_bits (XEXP (x
, 2), mode
,
4383 known_x
, known_mode
, known_ret
);
4394 /* See the macro definition above. */
4395 #undef cached_num_sign_bit_copies
4398 /* The function cached_num_sign_bit_copies is a wrapper around
4399 num_sign_bit_copies1. It avoids exponential behavior in
4400 num_sign_bit_copies1 when X has identical subexpressions on the
4401 first or the second level. */
4404 cached_num_sign_bit_copies (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4405 enum machine_mode known_mode
,
4406 unsigned int known_ret
)
4408 if (x
== known_x
&& mode
== known_mode
)
4411 /* Try to find identical subexpressions. If found call
4412 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
4413 the precomputed value for the subexpression as KNOWN_RET. */
4415 if (ARITHMETIC_P (x
))
4417 rtx x0
= XEXP (x
, 0);
4418 rtx x1
= XEXP (x
, 1);
4420 /* Check the first level. */
4423 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4424 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4428 /* Check the second level. */
4429 if (ARITHMETIC_P (x0
)
4430 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
4432 num_sign_bit_copies1 (x
, mode
, x1
, mode
,
4433 cached_num_sign_bit_copies (x1
, mode
, known_x
,
4437 if (ARITHMETIC_P (x1
)
4438 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
4440 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4441 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4446 return num_sign_bit_copies1 (x
, mode
, known_x
, known_mode
, known_ret
);
4449 /* Return the number of bits at the high-order end of X that are known to
4450 be equal to the sign bit. X will be used in mode MODE; if MODE is
4451 VOIDmode, X will be used in its own mode. The returned value will always
4452 be between 1 and the number of bits in MODE. */
4455 num_sign_bit_copies1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4456 enum machine_mode known_mode
,
4457 unsigned int known_ret
)
4459 enum rtx_code code
= GET_CODE (x
);
4460 unsigned int bitwidth
= GET_MODE_PRECISION (mode
);
4461 int num0
, num1
, result
;
4462 unsigned HOST_WIDE_INT nonzero
;
4464 /* If we weren't given a mode, use the mode of X. If the mode is still
4465 VOIDmode, we don't know anything. Likewise if one of the modes is
4468 if (mode
== VOIDmode
)
4469 mode
= GET_MODE (x
);
4471 if (mode
== VOIDmode
|| FLOAT_MODE_P (mode
) || FLOAT_MODE_P (GET_MODE (x
))
4472 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
4475 /* For a smaller object, just ignore the high bits. */
4476 if (bitwidth
< GET_MODE_PRECISION (GET_MODE (x
)))
4478 num0
= cached_num_sign_bit_copies (x
, GET_MODE (x
),
4479 known_x
, known_mode
, known_ret
);
4481 num0
- (int) (GET_MODE_PRECISION (GET_MODE (x
)) - bitwidth
));
4484 if (GET_MODE (x
) != VOIDmode
&& bitwidth
> GET_MODE_PRECISION (GET_MODE (x
)))
4486 #ifndef WORD_REGISTER_OPERATIONS
4487 /* If this machine does not do all register operations on the entire
4488 register and MODE is wider than the mode of X, we can say nothing
4489 at all about the high-order bits. */
4492 /* Likewise on machines that do, if the mode of the object is smaller
4493 than a word and loads of that size don't sign extend, we can say
4494 nothing about the high order bits. */
4495 if (GET_MODE_PRECISION (GET_MODE (x
)) < BITS_PER_WORD
4496 #ifdef LOAD_EXTEND_OP
4497 && LOAD_EXTEND_OP (GET_MODE (x
)) != SIGN_EXTEND
4508 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4509 /* If pointers extend signed and this is a pointer in Pmode, say that
4510 all the bits above ptr_mode are known to be sign bit copies. */
4511 /* As we do not know which address space the pointer is referring to,
4512 we can do this only if the target does not support different pointer
4513 or address modes depending on the address space. */
4514 if (target_default_pointer_address_modes_p ()
4515 && ! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4516 && mode
== Pmode
&& REG_POINTER (x
))
4517 return GET_MODE_PRECISION (Pmode
) - GET_MODE_PRECISION (ptr_mode
) + 1;
4521 unsigned int copies_for_hook
= 1, copies
= 1;
4522 rtx new_rtx
= rtl_hooks
.reg_num_sign_bit_copies (x
, mode
, known_x
,
4523 known_mode
, known_ret
,
4527 copies
= cached_num_sign_bit_copies (new_rtx
, mode
, known_x
,
4528 known_mode
, known_ret
);
4530 if (copies
> 1 || copies_for_hook
> 1)
4531 return MAX (copies
, copies_for_hook
);
4533 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4538 #ifdef LOAD_EXTEND_OP
4539 /* Some RISC machines sign-extend all loads of smaller than a word. */
4540 if (LOAD_EXTEND_OP (GET_MODE (x
)) == SIGN_EXTEND
)
4541 return MAX (1, ((int) bitwidth
4542 - (int) GET_MODE_PRECISION (GET_MODE (x
)) + 1));
4547 /* If the constant is negative, take its 1's complement and remask.
4548 Then see how many zero bits we have. */
4549 nonzero
= UINTVAL (x
) & GET_MODE_MASK (mode
);
4550 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4551 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4552 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4554 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4557 /* If this is a SUBREG for a promoted object that is sign-extended
4558 and we are looking at it in a wider mode, we know that at least the
4559 high-order bits are known to be sign bit copies. */
4561 if (SUBREG_PROMOTED_VAR_P (x
) && ! SUBREG_PROMOTED_UNSIGNED_P (x
))
4563 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4564 known_x
, known_mode
, known_ret
);
4565 return MAX ((int) bitwidth
4566 - (int) GET_MODE_PRECISION (GET_MODE (x
)) + 1,
4570 /* For a smaller object, just ignore the high bits. */
4571 if (bitwidth
<= GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))))
4573 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), VOIDmode
,
4574 known_x
, known_mode
, known_ret
);
4575 return MAX (1, (num0
4576 - (int) (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
)))
4580 #ifdef WORD_REGISTER_OPERATIONS
4581 #ifdef LOAD_EXTEND_OP
4582 /* For paradoxical SUBREGs on machines where all register operations
4583 affect the entire register, just look inside. Note that we are
4584 passing MODE to the recursive call, so the number of sign bit copies
4585 will remain relative to that mode, not the inner mode. */
4587 /* This works only if loads sign extend. Otherwise, if we get a
4588 reload for the inner part, it may be loaded from the stack, and
4589 then we lose all sign bit copies that existed before the store
4592 if (paradoxical_subreg_p (x
)
4593 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4594 && MEM_P (SUBREG_REG (x
)))
4595 return cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4596 known_x
, known_mode
, known_ret
);
4602 if (CONST_INT_P (XEXP (x
, 1)))
4603 return MAX (1, (int) bitwidth
- INTVAL (XEXP (x
, 1)));
4607 return (bitwidth
- GET_MODE_PRECISION (GET_MODE (XEXP (x
, 0)))
4608 + cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4609 known_x
, known_mode
, known_ret
));
4612 /* For a smaller object, just ignore the high bits. */
4613 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4614 known_x
, known_mode
, known_ret
);
4615 return MAX (1, (num0
- (int) (GET_MODE_PRECISION (GET_MODE (XEXP (x
, 0)))
4619 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4620 known_x
, known_mode
, known_ret
);
4622 case ROTATE
: case ROTATERT
:
4623 /* If we are rotating left by a number of bits less than the number
4624 of sign bit copies, we can just subtract that amount from the
4626 if (CONST_INT_P (XEXP (x
, 1))
4627 && INTVAL (XEXP (x
, 1)) >= 0
4628 && INTVAL (XEXP (x
, 1)) < (int) bitwidth
)
4630 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4631 known_x
, known_mode
, known_ret
);
4632 return MAX (1, num0
- (code
== ROTATE
? INTVAL (XEXP (x
, 1))
4633 : (int) bitwidth
- INTVAL (XEXP (x
, 1))));
4638 /* In general, this subtracts one sign bit copy. But if the value
4639 is known to be positive, the number of sign bit copies is the
4640 same as that of the input. Finally, if the input has just one bit
4641 that might be nonzero, all the bits are copies of the sign bit. */
4642 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4643 known_x
, known_mode
, known_ret
);
4644 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4645 return num0
> 1 ? num0
- 1 : 1;
4647 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4652 && (((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
))
4657 case IOR
: case AND
: case XOR
:
4658 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4659 /* Logical operations will preserve the number of sign-bit copies.
4660 MIN and MAX operations always return one of the operands. */
4661 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4662 known_x
, known_mode
, known_ret
);
4663 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4664 known_x
, known_mode
, known_ret
);
4666 /* If num1 is clearing some of the top bits then regardless of
4667 the other term, we are guaranteed to have at least that many
4668 high-order zero bits. */
4671 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4672 && CONST_INT_P (XEXP (x
, 1))
4673 && (UINTVAL (XEXP (x
, 1))
4674 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) == 0)
4677 /* Similarly for IOR when setting high-order bits. */
4680 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4681 && CONST_INT_P (XEXP (x
, 1))
4682 && (UINTVAL (XEXP (x
, 1))
4683 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4686 return MIN (num0
, num1
);
4688 case PLUS
: case MINUS
:
4689 /* For addition and subtraction, we can have a 1-bit carry. However,
4690 if we are subtracting 1 from a positive number, there will not
4691 be such a carry. Furthermore, if the positive number is known to
4692 be 0 or 1, we know the result is either -1 or 0. */
4694 if (code
== PLUS
&& XEXP (x
, 1) == constm1_rtx
4695 && bitwidth
<= HOST_BITS_PER_WIDE_INT
)
4697 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4698 if ((((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
) == 0)
4699 return (nonzero
== 1 || nonzero
== 0 ? bitwidth
4700 : bitwidth
- floor_log2 (nonzero
) - 1);
4703 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4704 known_x
, known_mode
, known_ret
);
4705 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4706 known_x
, known_mode
, known_ret
);
4707 result
= MAX (1, MIN (num0
, num1
) - 1);
4712 /* The number of bits of the product is the sum of the number of
4713 bits of both terms. However, unless one of the terms if known
4714 to be positive, we must allow for an additional bit since negating
4715 a negative number can remove one sign bit copy. */
4717 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4718 known_x
, known_mode
, known_ret
);
4719 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4720 known_x
, known_mode
, known_ret
);
4722 result
= bitwidth
- (bitwidth
- num0
) - (bitwidth
- num1
);
4724 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4725 || (((nonzero_bits (XEXP (x
, 0), mode
)
4726 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4727 && ((nonzero_bits (XEXP (x
, 1), mode
)
4728 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)))
4732 return MAX (1, result
);
4735 /* The result must be <= the first operand. If the first operand
4736 has the high bit set, we know nothing about the number of sign
4738 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4740 else if ((nonzero_bits (XEXP (x
, 0), mode
)
4741 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4744 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4745 known_x
, known_mode
, known_ret
);
4748 /* The result must be <= the second operand. If the second operand
4749 has (or just might have) the high bit set, we know nothing about
4750 the number of sign bit copies. */
4751 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4753 else if ((nonzero_bits (XEXP (x
, 1), mode
)
4754 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4757 return cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4758 known_x
, known_mode
, known_ret
);
4761 /* Similar to unsigned division, except that we have to worry about
4762 the case where the divisor is negative, in which case we have
4764 result
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4765 known_x
, known_mode
, known_ret
);
4767 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4768 || (nonzero_bits (XEXP (x
, 1), mode
)
4769 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4775 result
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4776 known_x
, known_mode
, known_ret
);
4778 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4779 || (nonzero_bits (XEXP (x
, 1), mode
)
4780 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4786 /* Shifts by a constant add to the number of bits equal to the
4788 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4789 known_x
, known_mode
, known_ret
);
4790 if (CONST_INT_P (XEXP (x
, 1))
4791 && INTVAL (XEXP (x
, 1)) > 0
4792 && INTVAL (XEXP (x
, 1)) < GET_MODE_PRECISION (GET_MODE (x
)))
4793 num0
= MIN ((int) bitwidth
, num0
+ INTVAL (XEXP (x
, 1)));
4798 /* Left shifts destroy copies. */
4799 if (!CONST_INT_P (XEXP (x
, 1))
4800 || INTVAL (XEXP (x
, 1)) < 0
4801 || INTVAL (XEXP (x
, 1)) >= (int) bitwidth
4802 || INTVAL (XEXP (x
, 1)) >= GET_MODE_PRECISION (GET_MODE (x
)))
4805 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4806 known_x
, known_mode
, known_ret
);
4807 return MAX (1, num0
- INTVAL (XEXP (x
, 1)));
4810 num0
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4811 known_x
, known_mode
, known_ret
);
4812 num1
= cached_num_sign_bit_copies (XEXP (x
, 2), mode
,
4813 known_x
, known_mode
, known_ret
);
4814 return MIN (num0
, num1
);
4816 case EQ
: case NE
: case GE
: case GT
: case LE
: case LT
:
4817 case UNEQ
: case LTGT
: case UNGE
: case UNGT
: case UNLE
: case UNLT
:
4818 case GEU
: case GTU
: case LEU
: case LTU
:
4819 case UNORDERED
: case ORDERED
:
4820 /* If the constant is negative, take its 1's complement and remask.
4821 Then see how many zero bits we have. */
4822 nonzero
= STORE_FLAG_VALUE
;
4823 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4824 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4825 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4827 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4833 /* If we haven't been able to figure it out by one of the above rules,
4834 see if some of the high-order bits are known to be zero. If so,
4835 count those bits and return one less than that amount. If we can't
4836 safely compute the mask for this mode, always return BITWIDTH. */
4838 bitwidth
= GET_MODE_PRECISION (mode
);
4839 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4842 nonzero
= nonzero_bits (x
, mode
);
4843 return nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))
4844 ? 1 : bitwidth
- floor_log2 (nonzero
) - 1;
4847 /* Calculate the rtx_cost of a single instruction. A return value of
4848 zero indicates an instruction pattern without a known cost. */
4851 insn_rtx_cost (rtx pat
, bool speed
)
4856 /* Extract the single set rtx from the instruction pattern.
4857 We can't use single_set since we only have the pattern. */
4858 if (GET_CODE (pat
) == SET
)
4860 else if (GET_CODE (pat
) == PARALLEL
)
4863 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
4865 rtx x
= XVECEXP (pat
, 0, i
);
4866 if (GET_CODE (x
) == SET
)
4879 cost
= set_src_cost (SET_SRC (set
), speed
);
4880 return cost
> 0 ? cost
: COSTS_N_INSNS (1);
4883 /* Given an insn INSN and condition COND, return the condition in a
4884 canonical form to simplify testing by callers. Specifically:
4886 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4887 (2) Both operands will be machine operands; (cc0) will have been replaced.
4888 (3) If an operand is a constant, it will be the second operand.
4889 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4890 for GE, GEU, and LEU.
4892 If the condition cannot be understood, or is an inequality floating-point
4893 comparison which needs to be reversed, 0 will be returned.
4895 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4897 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4898 insn used in locating the condition was found. If a replacement test
4899 of the condition is desired, it should be placed in front of that
4900 insn and we will be sure that the inputs are still valid.
4902 If WANT_REG is nonzero, we wish the condition to be relative to that
4903 register, if possible. Therefore, do not canonicalize the condition
4904 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4905 to be a compare to a CC mode register.
4907 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4911 canonicalize_condition (rtx insn
, rtx cond
, int reverse
, rtx
*earliest
,
4912 rtx want_reg
, int allow_cc_mode
, int valid_at_insn_p
)
4919 int reverse_code
= 0;
4920 enum machine_mode mode
;
4921 basic_block bb
= BLOCK_FOR_INSN (insn
);
4923 code
= GET_CODE (cond
);
4924 mode
= GET_MODE (cond
);
4925 op0
= XEXP (cond
, 0);
4926 op1
= XEXP (cond
, 1);
4929 code
= reversed_comparison_code (cond
, insn
);
4930 if (code
== UNKNOWN
)
4936 /* If we are comparing a register with zero, see if the register is set
4937 in the previous insn to a COMPARE or a comparison operation. Perform
4938 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4941 while ((GET_RTX_CLASS (code
) == RTX_COMPARE
4942 || GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
)
4943 && op1
== CONST0_RTX (GET_MODE (op0
))
4946 /* Set nonzero when we find something of interest. */
4950 /* If comparison with cc0, import actual comparison from compare
4954 if ((prev
= prev_nonnote_insn (prev
)) == 0
4955 || !NONJUMP_INSN_P (prev
)
4956 || (set
= single_set (prev
)) == 0
4957 || SET_DEST (set
) != cc0_rtx
)
4960 op0
= SET_SRC (set
);
4961 op1
= CONST0_RTX (GET_MODE (op0
));
4967 /* If this is a COMPARE, pick up the two things being compared. */
4968 if (GET_CODE (op0
) == COMPARE
)
4970 op1
= XEXP (op0
, 1);
4971 op0
= XEXP (op0
, 0);
4974 else if (!REG_P (op0
))
4977 /* Go back to the previous insn. Stop if it is not an INSN. We also
4978 stop if it isn't a single set or if it has a REG_INC note because
4979 we don't want to bother dealing with it. */
4981 prev
= prev_nonnote_nondebug_insn (prev
);
4984 || !NONJUMP_INSN_P (prev
)
4985 || FIND_REG_INC_NOTE (prev
, NULL_RTX
)
4986 /* In cfglayout mode, there do not have to be labels at the
4987 beginning of a block, or jumps at the end, so the previous
4988 conditions would not stop us when we reach bb boundary. */
4989 || BLOCK_FOR_INSN (prev
) != bb
)
4992 set
= set_of (op0
, prev
);
4995 && (GET_CODE (set
) != SET
4996 || !rtx_equal_p (SET_DEST (set
), op0
)))
4999 /* If this is setting OP0, get what it sets it to if it looks
5003 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
5004 #ifdef FLOAT_STORE_FLAG_VALUE
5005 REAL_VALUE_TYPE fsfv
;
5008 /* ??? We may not combine comparisons done in a CCmode with
5009 comparisons not done in a CCmode. This is to aid targets
5010 like Alpha that have an IEEE compliant EQ instruction, and
5011 a non-IEEE compliant BEQ instruction. The use of CCmode is
5012 actually artificial, simply to prevent the combination, but
5013 should not affect other platforms.
5015 However, we must allow VOIDmode comparisons to match either
5016 CCmode or non-CCmode comparison, because some ports have
5017 modeless comparisons inside branch patterns.
5019 ??? This mode check should perhaps look more like the mode check
5020 in simplify_comparison in combine. */
5022 if ((GET_CODE (SET_SRC (set
)) == COMPARE
5025 && val_signbit_known_set_p (inner_mode
,
5027 #ifdef FLOAT_STORE_FLAG_VALUE
5029 && SCALAR_FLOAT_MODE_P (inner_mode
)
5030 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
5031 REAL_VALUE_NEGATIVE (fsfv
)))
5034 && COMPARISON_P (SET_SRC (set
))))
5035 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
5036 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
5037 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
5039 else if (((code
== EQ
5041 && val_signbit_known_set_p (inner_mode
,
5043 #ifdef FLOAT_STORE_FLAG_VALUE
5045 && SCALAR_FLOAT_MODE_P (inner_mode
)
5046 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
5047 REAL_VALUE_NEGATIVE (fsfv
)))
5050 && COMPARISON_P (SET_SRC (set
))
5051 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
5052 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
5053 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
5063 else if (reg_set_p (op0
, prev
))
5064 /* If this sets OP0, but not directly, we have to give up. */
5069 /* If the caller is expecting the condition to be valid at INSN,
5070 make sure X doesn't change before INSN. */
5071 if (valid_at_insn_p
)
5072 if (modified_in_p (x
, prev
) || modified_between_p (x
, prev
, insn
))
5074 if (COMPARISON_P (x
))
5075 code
= GET_CODE (x
);
5078 code
= reversed_comparison_code (x
, prev
);
5079 if (code
== UNKNOWN
)
5084 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
5090 /* If constant is first, put it last. */
5091 if (CONSTANT_P (op0
))
5092 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
5094 /* If OP0 is the result of a comparison, we weren't able to find what
5095 was really being compared, so fail. */
5097 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
5100 /* Canonicalize any ordered comparison with integers involving equality
5101 if we can do computations in the relevant mode and we do not
5104 if (GET_MODE_CLASS (GET_MODE (op0
)) != MODE_CC
5105 && CONST_INT_P (op1
)
5106 && GET_MODE (op0
) != VOIDmode
5107 && GET_MODE_PRECISION (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
5109 HOST_WIDE_INT const_val
= INTVAL (op1
);
5110 unsigned HOST_WIDE_INT uconst_val
= const_val
;
5111 unsigned HOST_WIDE_INT max_val
5112 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
5117 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
5118 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
5121 /* When cross-compiling, const_val might be sign-extended from
5122 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
5124 if ((const_val
& max_val
)
5125 != ((unsigned HOST_WIDE_INT
) 1
5126 << (GET_MODE_PRECISION (GET_MODE (op0
)) - 1)))
5127 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
5131 if (uconst_val
< max_val
)
5132 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
5136 if (uconst_val
!= 0)
5137 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
5145 /* Never return CC0; return zero instead. */
5149 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
5152 /* Given a jump insn JUMP, return the condition that will cause it to branch
5153 to its JUMP_LABEL. If the condition cannot be understood, or is an
5154 inequality floating-point comparison which needs to be reversed, 0 will
5157 If EARLIEST is nonzero, it is a pointer to a place where the earliest
5158 insn used in locating the condition was found. If a replacement test
5159 of the condition is desired, it should be placed in front of that
5160 insn and we will be sure that the inputs are still valid. If EARLIEST
5161 is null, the returned condition will be valid at INSN.
5163 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
5164 compare CC mode register.
5166 VALID_AT_INSN_P is the same as for canonicalize_condition. */
5169 get_condition (rtx jump
, rtx
*earliest
, int allow_cc_mode
, int valid_at_insn_p
)
5175 /* If this is not a standard conditional jump, we can't parse it. */
5177 || ! any_condjump_p (jump
))
5179 set
= pc_set (jump
);
5181 cond
= XEXP (SET_SRC (set
), 0);
5183 /* If this branches to JUMP_LABEL when the condition is false, reverse
5186 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
5187 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
5189 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
,
5190 allow_cc_mode
, valid_at_insn_p
);
5193 /* Initialize the table NUM_SIGN_BIT_COPIES_IN_REP based on
5194 TARGET_MODE_REP_EXTENDED.
5196 Note that we assume that the property of
5197 TARGET_MODE_REP_EXTENDED(B, C) is sticky to the integral modes
5198 narrower than mode B. I.e., if A is a mode narrower than B then in
5199 order to be able to operate on it in mode B, mode A needs to
5200 satisfy the requirements set by the representation of mode B. */
5203 init_num_sign_bit_copies_in_rep (void)
5205 enum machine_mode mode
, in_mode
;
5207 for (in_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); in_mode
!= VOIDmode
;
5208 in_mode
= GET_MODE_WIDER_MODE (mode
))
5209 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= in_mode
;
5210 mode
= GET_MODE_WIDER_MODE (mode
))
5212 enum machine_mode i
;
5214 /* Currently, it is assumed that TARGET_MODE_REP_EXTENDED
5215 extends to the next widest mode. */
5216 gcc_assert (targetm
.mode_rep_extended (mode
, in_mode
) == UNKNOWN
5217 || GET_MODE_WIDER_MODE (mode
) == in_mode
);
5219 /* We are in in_mode. Count how many bits outside of mode
5220 have to be copies of the sign-bit. */
5221 for (i
= mode
; i
!= in_mode
; i
= GET_MODE_WIDER_MODE (i
))
5223 enum machine_mode wider
= GET_MODE_WIDER_MODE (i
);
5225 if (targetm
.mode_rep_extended (i
, wider
) == SIGN_EXTEND
5226 /* We can only check sign-bit copies starting from the
5227 top-bit. In order to be able to check the bits we
5228 have already seen we pretend that subsequent bits
5229 have to be sign-bit copies too. */
5230 || num_sign_bit_copies_in_rep
[in_mode
][mode
])
5231 num_sign_bit_copies_in_rep
[in_mode
][mode
]
5232 += GET_MODE_PRECISION (wider
) - GET_MODE_PRECISION (i
);
5237 /* Suppose that truncation from the machine mode of X to MODE is not a
5238 no-op. See if there is anything special about X so that we can
5239 assume it already contains a truncated value of MODE. */
5242 truncated_to_mode (enum machine_mode mode
, const_rtx x
)
5244 /* This register has already been used in MODE without explicit
5246 if (REG_P (x
) && rtl_hooks
.reg_truncated_to_mode (mode
, x
))
5249 /* See if we already satisfy the requirements of MODE. If yes we
5250 can just switch to MODE. */
5251 if (num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
]
5252 && (num_sign_bit_copies (x
, GET_MODE (x
))
5253 >= num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
] + 1))
5259 /* Initialize non_rtx_starting_operands, which is used to speed up
5265 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5267 const char *format
= GET_RTX_FORMAT (i
);
5268 const char *first
= strpbrk (format
, "eEV");
5269 non_rtx_starting_operands
[i
] = first
? first
- format
: -1;
5272 init_num_sign_bit_copies_in_rep ();
5275 /* Check whether this is a constant pool constant. */
5277 constant_pool_constant_p (rtx x
)
5279 x
= avoid_constant_pool_reference (x
);
5280 return GET_CODE (x
) == CONST_DOUBLE
;
5283 /* If M is a bitmask that selects a field of low-order bits within an item but
5284 not the entire word, return the length of the field. Return -1 otherwise.
5285 M is used in machine mode MODE. */
5288 low_bitmask_len (enum machine_mode mode
, unsigned HOST_WIDE_INT m
)
5290 if (mode
!= VOIDmode
)
5292 if (GET_MODE_PRECISION (mode
) > HOST_BITS_PER_WIDE_INT
)
5294 m
&= GET_MODE_MASK (mode
);
5297 return exact_log2 (m
+ 1);
5300 /* Return the mode of MEM's address. */
5303 get_address_mode (rtx mem
)
5305 enum machine_mode mode
;
5307 gcc_assert (MEM_P (mem
));
5308 mode
= GET_MODE (XEXP (mem
, 0));
5309 if (mode
!= VOIDmode
)
5311 return targetm
.addr_space
.address_mode (MEM_ADDR_SPACE (mem
));
5314 /* Split up a CONST_DOUBLE or integer constant rtx
5315 into two rtx's for single words,
5316 storing in *FIRST the word that comes first in memory in the target
5317 and in *SECOND the other. */
5320 split_double (rtx value
, rtx
*first
, rtx
*second
)
5322 if (CONST_INT_P (value
))
5324 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
5326 /* In this case the CONST_INT holds both target words.
5327 Extract the bits from it into two word-sized pieces.
5328 Sign extend each half to HOST_WIDE_INT. */
5329 unsigned HOST_WIDE_INT low
, high
;
5330 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
5331 unsigned bits_per_word
= BITS_PER_WORD
;
5333 /* Set sign_bit to the most significant bit of a word. */
5335 sign_bit
<<= bits_per_word
- 1;
5337 /* Set mask so that all bits of the word are set. We could
5338 have used 1 << BITS_PER_WORD instead of basing the
5339 calculation on sign_bit. However, on machines where
5340 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
5341 compiler warning, even though the code would never be
5343 mask
= sign_bit
<< 1;
5346 /* Set sign_extend as any remaining bits. */
5347 sign_extend
= ~mask
;
5349 /* Pick the lower word and sign-extend it. */
5350 low
= INTVAL (value
);
5355 /* Pick the higher word, shifted to the least significant
5356 bits, and sign-extend it. */
5357 high
= INTVAL (value
);
5358 high
>>= bits_per_word
- 1;
5361 if (high
& sign_bit
)
5362 high
|= sign_extend
;
5364 /* Store the words in the target machine order. */
5365 if (WORDS_BIG_ENDIAN
)
5367 *first
= GEN_INT (high
);
5368 *second
= GEN_INT (low
);
5372 *first
= GEN_INT (low
);
5373 *second
= GEN_INT (high
);
5378 /* The rule for using CONST_INT for a wider mode
5379 is that we regard the value as signed.
5380 So sign-extend it. */
5381 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
5382 if (WORDS_BIG_ENDIAN
)
5394 else if (GET_CODE (value
) != CONST_DOUBLE
)
5396 if (WORDS_BIG_ENDIAN
)
5398 *first
= const0_rtx
;
5404 *second
= const0_rtx
;
5407 else if (GET_MODE (value
) == VOIDmode
5408 /* This is the old way we did CONST_DOUBLE integers. */
5409 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
5411 /* In an integer, the words are defined as most and least significant.
5412 So order them by the target's convention. */
5413 if (WORDS_BIG_ENDIAN
)
5415 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
5416 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
5420 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
5421 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
5428 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
5430 /* Note, this converts the REAL_VALUE_TYPE to the target's
5431 format, splits up the floating point double and outputs
5432 exactly 32 bits of it into each of l[0] and l[1] --
5433 not necessarily BITS_PER_WORD bits. */
5434 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
5436 /* If 32 bits is an entire word for the target, but not for the host,
5437 then sign-extend on the host so that the number will look the same
5438 way on the host that it would on the target. See for instance
5439 simplify_unary_operation. The #if is needed to avoid compiler
5442 #if HOST_BITS_PER_LONG > 32
5443 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
5445 if (l
[0] & ((long) 1 << 31))
5446 l
[0] |= ((long) (-1) << 32);
5447 if (l
[1] & ((long) 1 << 31))
5448 l
[1] |= ((long) (-1) << 32);
5452 *first
= GEN_INT (l
[0]);
5453 *second
= GEN_INT (l
[1]);