1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992-2016 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
27 #include "tree-pass.h"
31 #include "stor-layout.h"
33 #include "dwarf2out.h"
34 #include "dwarf2asm.h"
35 #include "common/common-target.h"
37 #include "except.h" /* expand_builtin_dwarf_sp_column */
38 #include "expr.h" /* init_return_column_size */
39 #include "output.h" /* asm_out_file */
40 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
43 /* ??? Poison these here until it can be done generically. They've been
44 totally replaced in this file; make sure it stays that way. */
45 #undef DWARF2_UNWIND_INFO
46 #undef DWARF2_FRAME_INFO
47 #if (GCC_VERSION >= 3000)
48 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
51 #ifndef INCOMING_RETURN_ADDR_RTX
52 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
55 /* Maximum size (in bytes) of an artificially generated label. */
56 #define MAX_ARTIFICIAL_LABEL_BYTES 30
58 /* A collected description of an entire row of the abstract CFI table. */
59 struct GTY(()) dw_cfi_row
61 /* The expression that computes the CFA, expressed in two different ways.
62 The CFA member for the simple cases, and the full CFI expression for
63 the complex cases. The later will be a DW_CFA_cfa_expression. */
67 /* The expressions for any register column that is saved. */
71 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
72 struct GTY(()) reg_saved_in_data
{
78 /* Since we no longer have a proper CFG, we're going to create a facsimile
79 of one on the fly while processing the frame-related insns.
81 We create dw_trace_info structures for each extended basic block beginning
82 and ending at a "save point". Save points are labels, barriers, certain
83 notes, and of course the beginning and end of the function.
85 As we encounter control transfer insns, we propagate the "current"
86 row state across the edges to the starts of traces. When checking is
87 enabled, we validate that we propagate the same data from all sources.
89 All traces are members of the TRACE_INFO array, in the order in which
90 they appear in the instruction stream.
92 All save points are present in the TRACE_INDEX hash, mapping the insn
93 starting a trace to the dw_trace_info describing the trace. */
97 /* The insn that begins the trace. */
100 /* The row state at the beginning and end of the trace. */
101 dw_cfi_row
*beg_row
, *end_row
;
103 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
104 while scanning insns. However, the args_size value is irrelevant at
105 any point except can_throw_internal_p insns. Therefore the "delay"
106 sizes the values that must actually be emitted for this trace. */
107 HOST_WIDE_INT beg_true_args_size
, end_true_args_size
;
108 HOST_WIDE_INT beg_delay_args_size
, end_delay_args_size
;
110 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
113 /* The following variables contain data used in interpreting frame related
114 expressions. These are not part of the "real" row state as defined by
115 Dwarf, but it seems like they need to be propagated into a trace in case
116 frame related expressions have been sunk. */
117 /* ??? This seems fragile. These variables are fragments of a larger
118 expression. If we do not keep the entire expression together, we risk
119 not being able to put it together properly. Consider forcing targets
120 to generate self-contained expressions and dropping all of the magic
121 interpretation code in this file. Or at least refusing to shrink wrap
122 any frame related insn that doesn't contain a complete expression. */
124 /* The register used for saving registers to the stack, and its offset
126 dw_cfa_location cfa_store
;
128 /* A temporary register holding an integral value used in adjusting SP
129 or setting up the store_reg. The "offset" field holds the integer
130 value, not an offset. */
131 dw_cfa_location cfa_temp
;
133 /* A set of registers saved in other registers. This is the inverse of
134 the row->reg_save info, if the entry is a DW_CFA_register. This is
135 implemented as a flat array because it normally contains zero or 1
136 entry, depending on the target. IA-64 is the big spender here, using
137 a maximum of 5 entries. */
138 vec
<reg_saved_in_data
> regs_saved_in_regs
;
140 /* An identifier for this trace. Used only for debugging dumps. */
143 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
144 bool switch_sections
;
146 /* True if we've seen different values incoming to beg_true_args_size. */
147 bool args_size_undefined
;
151 /* Hashtable helpers. */
153 struct trace_info_hasher
: nofree_ptr_hash
<dw_trace_info
>
155 static inline hashval_t
hash (const dw_trace_info
*);
156 static inline bool equal (const dw_trace_info
*, const dw_trace_info
*);
160 trace_info_hasher::hash (const dw_trace_info
*ti
)
162 return INSN_UID (ti
->head
);
166 trace_info_hasher::equal (const dw_trace_info
*a
, const dw_trace_info
*b
)
168 return a
->head
== b
->head
;
172 /* The variables making up the pseudo-cfg, as described above. */
173 static vec
<dw_trace_info
> trace_info
;
174 static vec
<dw_trace_info
*> trace_work_list
;
175 static hash_table
<trace_info_hasher
> *trace_index
;
177 /* A vector of call frame insns for the CIE. */
180 /* The state of the first row of the FDE table, which includes the
181 state provided by the CIE. */
182 static GTY(()) dw_cfi_row
*cie_cfi_row
;
184 static GTY(()) reg_saved_in_data
*cie_return_save
;
186 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
188 /* The insn after which a new CFI note should be emitted. */
189 static rtx_insn
*add_cfi_insn
;
191 /* When non-null, add_cfi will add the CFI to this vector. */
192 static cfi_vec
*add_cfi_vec
;
194 /* The current instruction trace. */
195 static dw_trace_info
*cur_trace
;
197 /* The current, i.e. most recently generated, row of the CFI table. */
198 static dw_cfi_row
*cur_row
;
200 /* A copy of the current CFA, for use during the processing of a
202 static dw_cfa_location
*cur_cfa
;
204 /* We delay emitting a register save until either (a) we reach the end
205 of the prologue or (b) the register is clobbered. This clusters
206 register saves so that there are fewer pc advances. */
208 struct queued_reg_save
{
211 HOST_WIDE_INT cfa_offset
;
215 static vec
<queued_reg_save
> queued_reg_saves
;
217 /* True if any CFI directives were emitted at the current insn. */
218 static bool any_cfis_emitted
;
220 /* Short-hand for commonly used register numbers. */
221 static unsigned dw_stack_pointer_regnum
;
222 static unsigned dw_frame_pointer_regnum
;
224 /* Hook used by __throw. */
227 expand_builtin_dwarf_sp_column (void)
229 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
230 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
233 /* MEM is a memory reference for the register size table, each element of
234 which has mode MODE. Initialize column C as a return address column. */
237 init_return_column_size (machine_mode mode
, rtx mem
, unsigned int c
)
239 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
240 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
241 emit_move_insn (adjust_address (mem
, mode
, offset
),
242 gen_int_mode (size
, mode
));
245 /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
246 init_one_dwarf_reg_size to communicate on what has been done by the
249 struct init_one_dwarf_reg_state
251 /* Whether the dwarf return column was initialized. */
252 bool wrote_return_column
;
254 /* For each hard register REGNO, whether init_one_dwarf_reg_size
255 was given REGNO to process already. */
256 bool processed_regno
[FIRST_PSEUDO_REGISTER
];
260 /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
261 initialize the dwarf register size table entry corresponding to register
262 REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
263 use for the size entry to initialize, and INIT_STATE is the communication
264 datastructure conveying what we're doing to our caller. */
267 void init_one_dwarf_reg_size (int regno
, machine_mode regmode
,
268 rtx table
, machine_mode slotmode
,
269 init_one_dwarf_reg_state
*init_state
)
271 const unsigned int dnum
= DWARF_FRAME_REGNUM (regno
);
272 const unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
273 const unsigned int dcol
= DWARF_REG_TO_UNWIND_COLUMN (rnum
);
275 const HOST_WIDE_INT slotoffset
= dcol
* GET_MODE_SIZE (slotmode
);
276 const HOST_WIDE_INT regsize
= GET_MODE_SIZE (regmode
);
278 init_state
->processed_regno
[regno
] = true;
280 if (rnum
>= DWARF_FRAME_REGISTERS
)
283 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
285 if (regmode
== VOIDmode
)
287 init_state
->wrote_return_column
= true;
293 emit_move_insn (adjust_address (table
, slotmode
, slotoffset
),
294 gen_int_mode (regsize
, slotmode
));
297 /* Generate code to initialize the dwarf register size table located
298 at the provided ADDRESS. */
301 expand_builtin_init_dwarf_reg_sizes (tree address
)
304 machine_mode mode
= TYPE_MODE (char_type_node
);
305 rtx addr
= expand_normal (address
);
306 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
308 init_one_dwarf_reg_state init_state
;
310 memset ((char *)&init_state
, 0, sizeof (init_state
));
312 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
314 machine_mode save_mode
;
317 /* No point in processing a register multiple times. This could happen
318 with register spans, e.g. when a reg is first processed as a piece of
319 a span, then as a register on its own later on. */
321 if (init_state
.processed_regno
[i
])
324 save_mode
= targetm
.dwarf_frame_reg_mode (i
);
325 span
= targetm
.dwarf_register_span (gen_rtx_REG (save_mode
, i
));
328 init_one_dwarf_reg_size (i
, save_mode
, mem
, mode
, &init_state
);
331 for (int si
= 0; si
< XVECLEN (span
, 0); si
++)
333 rtx reg
= XVECEXP (span
, 0, si
);
335 init_one_dwarf_reg_size
336 (REGNO (reg
), GET_MODE (reg
), mem
, mode
, &init_state
);
341 if (!init_state
.wrote_return_column
)
342 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
344 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
345 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
348 targetm
.init_dwarf_reg_sizes_extra (address
);
352 static dw_trace_info
*
353 get_trace_info (rtx_insn
*insn
)
357 return trace_index
->find_with_hash (&dummy
, INSN_UID (insn
));
361 save_point_p (rtx_insn
*insn
)
363 /* Labels, except those that are really jump tables. */
365 return inside_basic_block_p (insn
);
367 /* We split traces at the prologue/epilogue notes because those
368 are points at which the unwind info is usually stable. This
369 makes it easier to find spots with identical unwind info so
370 that we can use remember/restore_state opcodes. */
372 switch (NOTE_KIND (insn
))
374 case NOTE_INSN_PROLOGUE_END
:
375 case NOTE_INSN_EPILOGUE_BEG
:
382 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
384 static inline HOST_WIDE_INT
385 div_data_align (HOST_WIDE_INT off
)
387 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
388 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
392 /* Return true if we need a signed version of a given opcode
393 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
396 need_data_align_sf_opcode (HOST_WIDE_INT off
)
398 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
401 /* Return a pointer to a newly allocated Call Frame Instruction. */
403 static inline dw_cfi_ref
406 dw_cfi_ref cfi
= ggc_alloc
<dw_cfi_node
> ();
408 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
409 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
414 /* Return a newly allocated CFI row, with no defined data. */
419 dw_cfi_row
*row
= ggc_cleared_alloc
<dw_cfi_row
> ();
421 row
->cfa
.reg
= INVALID_REGNUM
;
426 /* Return a copy of an existing CFI row. */
429 copy_cfi_row (dw_cfi_row
*src
)
431 dw_cfi_row
*dst
= ggc_alloc
<dw_cfi_row
> ();
434 dst
->reg_save
= vec_safe_copy (src
->reg_save
);
439 /* Generate a new label for the CFI info to refer to. */
442 dwarf2out_cfi_label (void)
444 int num
= dwarf2out_cfi_label_num
++;
447 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
449 return xstrdup (label
);
452 /* Add CFI either to the current insn stream or to a vector, or both. */
455 add_cfi (dw_cfi_ref cfi
)
457 any_cfis_emitted
= true;
459 if (add_cfi_insn
!= NULL
)
461 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
462 NOTE_CFI (add_cfi_insn
) = cfi
;
465 if (add_cfi_vec
!= NULL
)
466 vec_safe_push (*add_cfi_vec
, cfi
);
470 add_cfi_args_size (HOST_WIDE_INT size
)
472 dw_cfi_ref cfi
= new_cfi ();
474 /* While we can occasionally have args_size < 0 internally, this state
475 should not persist at a point we actually need an opcode. */
476 gcc_assert (size
>= 0);
478 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
479 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= size
;
485 add_cfi_restore (unsigned reg
)
487 dw_cfi_ref cfi
= new_cfi ();
489 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
490 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
495 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
496 that the register column is no longer saved. */
499 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
501 if (vec_safe_length (row
->reg_save
) <= column
)
502 vec_safe_grow_cleared (row
->reg_save
, column
+ 1);
503 (*row
->reg_save
)[column
] = cfi
;
506 /* This function fills in aa dw_cfa_location structure from a dwarf location
507 descriptor sequence. */
510 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_node
*loc
)
512 struct dw_loc_descr_node
*ptr
;
514 cfa
->base_offset
= 0;
518 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
520 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
556 cfa
->reg
= op
- DW_OP_reg0
;
559 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
593 cfa
->reg
= op
- DW_OP_breg0
;
594 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
597 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
598 cfa
->base_offset
= ptr
->dw_loc_oprnd2
.v
.val_int
;
603 case DW_OP_plus_uconst
:
604 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
612 /* Find the previous value for the CFA, iteratively. CFI is the opcode
613 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
614 one level of remember/restore state processing. */
617 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
619 switch (cfi
->dw_cfi_opc
)
621 case DW_CFA_def_cfa_offset
:
622 case DW_CFA_def_cfa_offset_sf
:
623 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
625 case DW_CFA_def_cfa_register
:
626 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
629 case DW_CFA_def_cfa_sf
:
630 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
631 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
633 case DW_CFA_def_cfa_expression
:
634 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
637 case DW_CFA_remember_state
:
638 gcc_assert (!remember
->in_use
);
640 remember
->in_use
= 1;
642 case DW_CFA_restore_state
:
643 gcc_assert (remember
->in_use
);
645 remember
->in_use
= 0;
653 /* Determine if two dw_cfa_location structures define the same data. */
656 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
658 return (loc1
->reg
== loc2
->reg
659 && loc1
->offset
== loc2
->offset
660 && loc1
->indirect
== loc2
->indirect
661 && (loc1
->indirect
== 0
662 || loc1
->base_offset
== loc2
->base_offset
));
665 /* Determine if two CFI operands are identical. */
668 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
672 case dw_cfi_oprnd_unused
:
674 case dw_cfi_oprnd_reg_num
:
675 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
676 case dw_cfi_oprnd_offset
:
677 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
678 case dw_cfi_oprnd_addr
:
679 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
680 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
681 case dw_cfi_oprnd_loc
:
682 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
687 /* Determine if two CFI entries are identical. */
690 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
692 enum dwarf_call_frame_info opc
;
694 /* Make things easier for our callers, including missing operands. */
697 if (a
== NULL
|| b
== NULL
)
700 /* Obviously, the opcodes must match. */
702 if (opc
!= b
->dw_cfi_opc
)
705 /* Compare the two operands, re-using the type of the operands as
706 already exposed elsewhere. */
707 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
708 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
709 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
710 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
713 /* Determine if two CFI_ROW structures are identical. */
716 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
718 size_t i
, n_a
, n_b
, n_max
;
722 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
725 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
728 n_a
= vec_safe_length (a
->reg_save
);
729 n_b
= vec_safe_length (b
->reg_save
);
730 n_max
= MAX (n_a
, n_b
);
732 for (i
= 0; i
< n_max
; ++i
)
734 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
737 r_a
= (*a
->reg_save
)[i
];
739 r_b
= (*b
->reg_save
)[i
];
741 if (!cfi_equal_p (r_a
, r_b
))
748 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
749 what opcode to emit. Returns the CFI opcode to effect the change, or
750 NULL if NEW_CFA == OLD_CFA. */
753 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
757 /* If nothing changed, no need to issue any call frame instructions. */
758 if (cfa_equal_p (old_cfa
, new_cfa
))
763 if (new_cfa
->reg
== old_cfa
->reg
&& !new_cfa
->indirect
&& !old_cfa
->indirect
)
765 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
766 the CFA register did not change but the offset did. The data
767 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
768 in the assembler via the .cfi_def_cfa_offset directive. */
769 if (new_cfa
->offset
< 0)
770 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
772 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
773 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= new_cfa
->offset
;
775 else if (new_cfa
->offset
== old_cfa
->offset
776 && old_cfa
->reg
!= INVALID_REGNUM
777 && !new_cfa
->indirect
778 && !old_cfa
->indirect
)
780 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
781 indicating the CFA register has changed to <register> but the
782 offset has not changed. */
783 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
784 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
786 else if (new_cfa
->indirect
== 0)
788 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
789 indicating the CFA register has changed to <register> with
790 the specified offset. The data factoring for DW_CFA_def_cfa_sf
791 happens in output_cfi, or in the assembler via the .cfi_def_cfa
793 if (new_cfa
->offset
< 0)
794 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
796 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
797 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
798 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= new_cfa
->offset
;
802 /* Construct a DW_CFA_def_cfa_expression instruction to
803 calculate the CFA using a full location expression since no
804 register-offset pair is available. */
805 struct dw_loc_descr_node
*loc_list
;
807 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
808 loc_list
= build_cfa_loc (new_cfa
, 0);
809 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
815 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
818 def_cfa_1 (dw_cfa_location
*new_cfa
)
822 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
823 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
825 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
828 cur_row
->cfa
= *new_cfa
;
829 cur_row
->cfa_cfi
= (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
836 /* Add the CFI for saving a register. REG is the CFA column number.
837 If SREG is -1, the register is saved at OFFSET from the CFA;
838 otherwise it is saved in SREG. */
841 reg_save (unsigned int reg
, unsigned int sreg
, HOST_WIDE_INT offset
)
843 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
844 dw_cfi_ref cfi
= new_cfi ();
846 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
848 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
850 && fde
->stack_realign
851 && sreg
== INVALID_REGNUM
)
853 cfi
->dw_cfi_opc
= DW_CFA_expression
;
854 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
855 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
856 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
857 fde
->stack_realignment
);
859 else if (sreg
== INVALID_REGNUM
)
861 if (need_data_align_sf_opcode (offset
))
862 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
863 else if (reg
& ~0x3f)
864 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
866 cfi
->dw_cfi_opc
= DW_CFA_offset
;
867 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= offset
;
869 else if (sreg
== reg
)
871 /* While we could emit something like DW_CFA_same_value or
872 DW_CFA_restore, we never expect to see something like that
873 in a prologue. This is more likely to be a bug. A backend
874 can always bypass this by using REG_CFA_RESTORE directly. */
879 cfi
->dw_cfi_opc
= DW_CFA_register
;
880 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
;
884 update_row_reg_save (cur_row
, reg
, cfi
);
887 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
888 and adjust data structures to match. */
891 notice_args_size (rtx_insn
*insn
)
893 HOST_WIDE_INT args_size
, delta
;
896 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL
);
900 args_size
= INTVAL (XEXP (note
, 0));
901 delta
= args_size
- cur_trace
->end_true_args_size
;
905 cur_trace
->end_true_args_size
= args_size
;
907 /* If the CFA is computed off the stack pointer, then we must adjust
908 the computation of the CFA as well. */
909 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
911 gcc_assert (!cur_cfa
->indirect
);
913 /* Convert a change in args_size (always a positive in the
914 direction of stack growth) to a change in stack pointer. */
915 if (!STACK_GROWS_DOWNWARD
)
918 cur_cfa
->offset
+= delta
;
922 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
923 data within the trace related to EH insns and args_size. */
926 notice_eh_throw (rtx_insn
*insn
)
928 HOST_WIDE_INT args_size
;
930 args_size
= cur_trace
->end_true_args_size
;
931 if (cur_trace
->eh_head
== NULL
)
933 cur_trace
->eh_head
= insn
;
934 cur_trace
->beg_delay_args_size
= args_size
;
935 cur_trace
->end_delay_args_size
= args_size
;
937 else if (cur_trace
->end_delay_args_size
!= args_size
)
939 cur_trace
->end_delay_args_size
= args_size
;
941 /* ??? If the CFA is the stack pointer, search backward for the last
942 CFI note and insert there. Given that the stack changed for the
943 args_size change, there *must* be such a note in between here and
945 add_cfi_args_size (args_size
);
949 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
950 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
951 used in places where rtl is prohibited. */
953 static inline unsigned
954 dwf_regno (const_rtx reg
)
956 gcc_assert (REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
957 return DWARF_FRAME_REGNUM (REGNO (reg
));
960 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
963 compare_reg_or_pc (rtx x
, rtx y
)
965 if (REG_P (x
) && REG_P (y
))
966 return REGNO (x
) == REGNO (y
);
970 /* Record SRC as being saved in DEST. DEST may be null to delete an
971 existing entry. SRC may be a register or PC_RTX. */
974 record_reg_saved_in_reg (rtx dest
, rtx src
)
976 reg_saved_in_data
*elt
;
979 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, elt
)
980 if (compare_reg_or_pc (elt
->orig_reg
, src
))
983 cur_trace
->regs_saved_in_regs
.unordered_remove (i
);
985 elt
->saved_in_reg
= dest
;
992 reg_saved_in_data e
= {src
, dest
};
993 cur_trace
->regs_saved_in_regs
.safe_push (e
);
996 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
997 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1000 queue_reg_save (rtx reg
, rtx sreg
, HOST_WIDE_INT offset
)
1003 queued_reg_save e
= {reg
, sreg
, offset
};
1006 /* Duplicates waste space, but it's also necessary to remove them
1007 for correctness, since the queue gets output in reverse order. */
1008 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1009 if (compare_reg_or_pc (q
->reg
, reg
))
1015 queued_reg_saves
.safe_push (e
);
1018 /* Output all the entries in QUEUED_REG_SAVES. */
1021 dwarf2out_flush_queued_reg_saves (void)
1026 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1028 unsigned int reg
, sreg
;
1030 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1032 if (q
->reg
== pc_rtx
)
1033 reg
= DWARF_FRAME_RETURN_COLUMN
;
1035 reg
= dwf_regno (q
->reg
);
1037 sreg
= dwf_regno (q
->saved_reg
);
1039 sreg
= INVALID_REGNUM
;
1040 reg_save (reg
, sreg
, q
->cfa_offset
);
1043 queued_reg_saves
.truncate (0);
1046 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1047 location for? Or, does it clobber a register which we've previously
1048 said that some other register is saved in, and for which we now
1049 have a new location for? */
1052 clobbers_queued_reg_save (const_rtx insn
)
1057 FOR_EACH_VEC_ELT (queued_reg_saves
, iq
, q
)
1060 reg_saved_in_data
*rir
;
1062 if (modified_in_p (q
->reg
, insn
))
1065 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, ir
, rir
)
1066 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1067 && modified_in_p (rir
->saved_in_reg
, insn
))
1074 /* What register, if any, is currently saved in REG? */
1077 reg_saved_in (rtx reg
)
1079 unsigned int regn
= REGNO (reg
);
1081 reg_saved_in_data
*rir
;
1084 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1085 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1088 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, rir
)
1089 if (regn
== REGNO (rir
->saved_in_reg
))
1090 return rir
->orig_reg
;
1095 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1098 dwarf2out_frame_debug_def_cfa (rtx pat
)
1100 memset (cur_cfa
, 0, sizeof (*cur_cfa
));
1102 if (GET_CODE (pat
) == PLUS
)
1104 cur_cfa
->offset
= INTVAL (XEXP (pat
, 1));
1105 pat
= XEXP (pat
, 0);
1109 cur_cfa
->indirect
= 1;
1110 pat
= XEXP (pat
, 0);
1111 if (GET_CODE (pat
) == PLUS
)
1113 cur_cfa
->base_offset
= INTVAL (XEXP (pat
, 1));
1114 pat
= XEXP (pat
, 0);
1117 /* ??? If this fails, we could be calling into the _loc functions to
1118 define a full expression. So far no port does that. */
1119 gcc_assert (REG_P (pat
));
1120 cur_cfa
->reg
= dwf_regno (pat
);
1123 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1126 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1130 gcc_assert (GET_CODE (pat
) == SET
);
1131 dest
= XEXP (pat
, 0);
1132 src
= XEXP (pat
, 1);
1134 switch (GET_CODE (src
))
1137 gcc_assert (dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
);
1138 cur_cfa
->offset
-= INTVAL (XEXP (src
, 1));
1148 cur_cfa
->reg
= dwf_regno (dest
);
1149 gcc_assert (cur_cfa
->indirect
== 0);
1152 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1155 dwarf2out_frame_debug_cfa_offset (rtx set
)
1157 HOST_WIDE_INT offset
;
1158 rtx src
, addr
, span
;
1159 unsigned int sregno
;
1161 src
= XEXP (set
, 1);
1162 addr
= XEXP (set
, 0);
1163 gcc_assert (MEM_P (addr
));
1164 addr
= XEXP (addr
, 0);
1166 /* As documented, only consider extremely simple addresses. */
1167 switch (GET_CODE (addr
))
1170 gcc_assert (dwf_regno (addr
) == cur_cfa
->reg
);
1171 offset
= -cur_cfa
->offset
;
1174 gcc_assert (dwf_regno (XEXP (addr
, 0)) == cur_cfa
->reg
);
1175 offset
= INTVAL (XEXP (addr
, 1)) - cur_cfa
->offset
;
1184 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1188 span
= targetm
.dwarf_register_span (src
);
1189 sregno
= dwf_regno (src
);
1192 /* ??? We'd like to use queue_reg_save, but we need to come up with
1193 a different flushing heuristic for epilogues. */
1195 reg_save (sregno
, INVALID_REGNUM
, offset
);
1198 /* We have a PARALLEL describing where the contents of SRC live.
1199 Adjust the offset for each piece of the PARALLEL. */
1200 HOST_WIDE_INT span_offset
= offset
;
1202 gcc_assert (GET_CODE (span
) == PARALLEL
);
1204 const int par_len
= XVECLEN (span
, 0);
1205 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1207 rtx elem
= XVECEXP (span
, 0, par_index
);
1208 sregno
= dwf_regno (src
);
1209 reg_save (sregno
, INVALID_REGNUM
, span_offset
);
1210 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1215 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1218 dwarf2out_frame_debug_cfa_register (rtx set
)
1221 unsigned sregno
, dregno
;
1223 src
= XEXP (set
, 1);
1224 dest
= XEXP (set
, 0);
1226 record_reg_saved_in_reg (dest
, src
);
1228 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1230 sregno
= dwf_regno (src
);
1232 dregno
= dwf_regno (dest
);
1234 /* ??? We'd like to use queue_reg_save, but we need to come up with
1235 a different flushing heuristic for epilogues. */
1236 reg_save (sregno
, dregno
, 0);
1239 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1242 dwarf2out_frame_debug_cfa_expression (rtx set
)
1244 rtx src
, dest
, span
;
1245 dw_cfi_ref cfi
= new_cfi ();
1248 dest
= SET_DEST (set
);
1249 src
= SET_SRC (set
);
1251 gcc_assert (REG_P (src
));
1252 gcc_assert (MEM_P (dest
));
1254 span
= targetm
.dwarf_register_span (src
);
1257 regno
= dwf_regno (src
);
1259 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1260 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1261 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1262 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1263 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1265 /* ??? We'd like to use queue_reg_save, were the interface different,
1266 and, as above, we could manage flushing for epilogues. */
1268 update_row_reg_save (cur_row
, regno
, cfi
);
1271 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_VAL_EXPRESSION
1275 dwarf2out_frame_debug_cfa_val_expression (rtx set
)
1277 rtx dest
= SET_DEST (set
);
1278 gcc_assert (REG_P (dest
));
1280 rtx span
= targetm
.dwarf_register_span (dest
);
1283 rtx src
= SET_SRC (set
);
1284 dw_cfi_ref cfi
= new_cfi ();
1285 cfi
->dw_cfi_opc
= DW_CFA_val_expression
;
1286 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= dwf_regno (dest
);
1287 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1288 = mem_loc_descriptor (src
, GET_MODE (src
),
1289 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1291 update_row_reg_save (cur_row
, dwf_regno (dest
), cfi
);
1294 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1297 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1299 gcc_assert (REG_P (reg
));
1301 rtx span
= targetm
.dwarf_register_span (reg
);
1304 unsigned int regno
= dwf_regno (reg
);
1305 add_cfi_restore (regno
);
1306 update_row_reg_save (cur_row
, regno
, NULL
);
1310 /* We have a PARALLEL describing where the contents of REG live.
1311 Restore the register for each piece of the PARALLEL. */
1312 gcc_assert (GET_CODE (span
) == PARALLEL
);
1314 const int par_len
= XVECLEN (span
, 0);
1315 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1317 reg
= XVECEXP (span
, 0, par_index
);
1318 gcc_assert (REG_P (reg
));
1319 unsigned int regno
= dwf_regno (reg
);
1320 add_cfi_restore (regno
);
1321 update_row_reg_save (cur_row
, regno
, NULL
);
1326 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1327 ??? Perhaps we should note in the CIE where windows are saved (instead of
1328 assuming 0(cfa)) and what registers are in the window. */
1331 dwarf2out_frame_debug_cfa_window_save (void)
1333 dw_cfi_ref cfi
= new_cfi ();
1335 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1339 /* Record call frame debugging information for an expression EXPR,
1340 which either sets SP or FP (adjusting how we calculate the frame
1341 address) or saves a register to the stack or another register.
1342 LABEL indicates the address of EXPR.
1344 This function encodes a state machine mapping rtxes to actions on
1345 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1346 users need not read the source code.
1348 The High-Level Picture
1350 Changes in the register we use to calculate the CFA: Currently we
1351 assume that if you copy the CFA register into another register, we
1352 should take the other one as the new CFA register; this seems to
1353 work pretty well. If it's wrong for some target, it's simple
1354 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1356 Changes in the register we use for saving registers to the stack:
1357 This is usually SP, but not always. Again, we deduce that if you
1358 copy SP into another register (and SP is not the CFA register),
1359 then the new register is the one we will be using for register
1360 saves. This also seems to work.
1362 Register saves: There's not much guesswork about this one; if
1363 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1364 register save, and the register used to calculate the destination
1365 had better be the one we think we're using for this purpose.
1366 It's also assumed that a copy from a call-saved register to another
1367 register is saving that register if RTX_FRAME_RELATED_P is set on
1368 that instruction. If the copy is from a call-saved register to
1369 the *same* register, that means that the register is now the same
1370 value as in the caller.
1372 Except: If the register being saved is the CFA register, and the
1373 offset is nonzero, we are saving the CFA, so we assume we have to
1374 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1375 the intent is to save the value of SP from the previous frame.
1377 In addition, if a register has previously been saved to a different
1380 Invariants / Summaries of Rules
1382 cfa current rule for calculating the CFA. It usually
1383 consists of a register and an offset. This is
1384 actually stored in *cur_cfa, but abbreviated
1385 for the purposes of this documentation.
1386 cfa_store register used by prologue code to save things to the stack
1387 cfa_store.offset is the offset from the value of
1388 cfa_store.reg to the actual CFA
1389 cfa_temp register holding an integral value. cfa_temp.offset
1390 stores the value, which will be used to adjust the
1391 stack pointer. cfa_temp is also used like cfa_store,
1392 to track stores to the stack via fp or a temp reg.
1394 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1395 with cfa.reg as the first operand changes the cfa.reg and its
1396 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1399 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1400 expression yielding a constant. This sets cfa_temp.reg
1401 and cfa_temp.offset.
1403 Rule 5: Create a new register cfa_store used to save items to the
1406 Rules 10-14: Save a register to the stack. Define offset as the
1407 difference of the original location and cfa_store's
1408 location (or cfa_temp's location if cfa_temp is used).
1410 Rules 16-20: If AND operation happens on sp in prologue, we assume
1411 stack is realigned. We will use a group of DW_OP_XXX
1412 expressions to represent the location of the stored
1413 register instead of CFA+offset.
1417 "{a,b}" indicates a choice of a xor b.
1418 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1421 (set <reg1> <reg2>:cfa.reg)
1422 effects: cfa.reg = <reg1>
1423 cfa.offset unchanged
1424 cfa_temp.reg = <reg1>
1425 cfa_temp.offset = cfa.offset
1428 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1429 {<const_int>,<reg>:cfa_temp.reg}))
1430 effects: cfa.reg = sp if fp used
1431 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1432 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1433 if cfa_store.reg==sp
1436 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1437 effects: cfa.reg = fp
1438 cfa_offset += +/- <const_int>
1441 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1442 constraints: <reg1> != fp
1444 effects: cfa.reg = <reg1>
1445 cfa_temp.reg = <reg1>
1446 cfa_temp.offset = cfa.offset
1449 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1450 constraints: <reg1> != fp
1452 effects: cfa_store.reg = <reg1>
1453 cfa_store.offset = cfa.offset - cfa_temp.offset
1456 (set <reg> <const_int>)
1457 effects: cfa_temp.reg = <reg>
1458 cfa_temp.offset = <const_int>
1461 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1462 effects: cfa_temp.reg = <reg1>
1463 cfa_temp.offset |= <const_int>
1466 (set <reg> (high <exp>))
1470 (set <reg> (lo_sum <exp> <const_int>))
1471 effects: cfa_temp.reg = <reg>
1472 cfa_temp.offset = <const_int>
1475 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1476 effects: cfa_store.offset -= <const_int>
1477 cfa.offset = cfa_store.offset if cfa.reg == sp
1479 cfa.base_offset = -cfa_store.offset
1482 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1483 effects: cfa_store.offset += -/+ mode_size(mem)
1484 cfa.offset = cfa_store.offset if cfa.reg == sp
1486 cfa.base_offset = -cfa_store.offset
1489 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1492 effects: cfa.reg = <reg1>
1493 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1496 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1497 effects: cfa.reg = <reg1>
1498 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1501 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1502 effects: cfa.reg = <reg1>
1503 cfa.base_offset = -cfa_temp.offset
1504 cfa_temp.offset -= mode_size(mem)
1507 (set <reg> {unspec, unspec_volatile})
1508 effects: target-dependent
1511 (set sp (and: sp <const_int>))
1512 constraints: cfa_store.reg == sp
1513 effects: cfun->fde.stack_realign = 1
1514 cfa_store.offset = 0
1515 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1518 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1519 effects: cfa_store.offset += -/+ mode_size(mem)
1522 (set (mem ({pre_inc, pre_dec} sp)) fp)
1523 constraints: fde->stack_realign == 1
1524 effects: cfa_store.offset = 0
1525 cfa.reg != HARD_FRAME_POINTER_REGNUM
1528 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1529 constraints: fde->stack_realign == 1
1531 && cfa.indirect == 0
1532 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1533 effects: Use DW_CFA_def_cfa_expression to define cfa
1534 cfa.reg == fde->drap_reg */
1537 dwarf2out_frame_debug_expr (rtx expr
)
1539 rtx src
, dest
, span
;
1540 HOST_WIDE_INT offset
;
1543 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1544 the PARALLEL independently. The first element is always processed if
1545 it is a SET. This is for backward compatibility. Other elements
1546 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1547 flag is set in them. */
1548 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1551 int limit
= XVECLEN (expr
, 0);
1554 /* PARALLELs have strict read-modify-write semantics, so we
1555 ought to evaluate every rvalue before changing any lvalue.
1556 It's cumbersome to do that in general, but there's an
1557 easy approximation that is enough for all current users:
1558 handle register saves before register assignments. */
1559 if (GET_CODE (expr
) == PARALLEL
)
1560 for (par_index
= 0; par_index
< limit
; par_index
++)
1562 elem
= XVECEXP (expr
, 0, par_index
);
1563 if (GET_CODE (elem
) == SET
1564 && MEM_P (SET_DEST (elem
))
1565 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1566 dwarf2out_frame_debug_expr (elem
);
1569 for (par_index
= 0; par_index
< limit
; par_index
++)
1571 elem
= XVECEXP (expr
, 0, par_index
);
1572 if (GET_CODE (elem
) == SET
1573 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1574 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1575 dwarf2out_frame_debug_expr (elem
);
1580 gcc_assert (GET_CODE (expr
) == SET
);
1582 src
= SET_SRC (expr
);
1583 dest
= SET_DEST (expr
);
1587 rtx rsi
= reg_saved_in (src
);
1594 switch (GET_CODE (dest
))
1597 switch (GET_CODE (src
))
1599 /* Setting FP from SP. */
1601 if (cur_cfa
->reg
== dwf_regno (src
))
1604 /* Update the CFA rule wrt SP or FP. Make sure src is
1605 relative to the current CFA register.
1607 We used to require that dest be either SP or FP, but the
1608 ARM copies SP to a temporary register, and from there to
1609 FP. So we just rely on the backends to only set
1610 RTX_FRAME_RELATED_P on appropriate insns. */
1611 cur_cfa
->reg
= dwf_regno (dest
);
1612 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1613 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1617 /* Saving a register in a register. */
1618 gcc_assert (!fixed_regs
[REGNO (dest
)]
1619 /* For the SPARC and its register window. */
1620 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1622 /* After stack is aligned, we can only save SP in FP
1623 if drap register is used. In this case, we have
1624 to restore stack pointer with the CFA value and we
1625 don't generate this DWARF information. */
1627 && fde
->stack_realign
1628 && REGNO (src
) == STACK_POINTER_REGNUM
)
1629 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1630 && fde
->drap_reg
!= INVALID_REGNUM
1631 && cur_cfa
->reg
!= dwf_regno (src
));
1633 queue_reg_save (src
, dest
, 0);
1640 if (dest
== stack_pointer_rtx
)
1644 switch (GET_CODE (XEXP (src
, 1)))
1647 offset
= INTVAL (XEXP (src
, 1));
1650 gcc_assert (dwf_regno (XEXP (src
, 1))
1651 == cur_trace
->cfa_temp
.reg
);
1652 offset
= cur_trace
->cfa_temp
.offset
;
1658 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1660 /* Restoring SP from FP in the epilogue. */
1661 gcc_assert (cur_cfa
->reg
== dw_frame_pointer_regnum
);
1662 cur_cfa
->reg
= dw_stack_pointer_regnum
;
1664 else if (GET_CODE (src
) == LO_SUM
)
1665 /* Assume we've set the source reg of the LO_SUM from sp. */
1668 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1670 if (GET_CODE (src
) != MINUS
)
1672 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1673 cur_cfa
->offset
+= offset
;
1674 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1675 cur_trace
->cfa_store
.offset
+= offset
;
1677 else if (dest
== hard_frame_pointer_rtx
)
1680 /* Either setting the FP from an offset of the SP,
1681 or adjusting the FP */
1682 gcc_assert (frame_pointer_needed
);
1684 gcc_assert (REG_P (XEXP (src
, 0))
1685 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1686 && CONST_INT_P (XEXP (src
, 1)));
1687 offset
= INTVAL (XEXP (src
, 1));
1688 if (GET_CODE (src
) != MINUS
)
1690 cur_cfa
->offset
+= offset
;
1691 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1695 gcc_assert (GET_CODE (src
) != MINUS
);
1698 if (REG_P (XEXP (src
, 0))
1699 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1700 && CONST_INT_P (XEXP (src
, 1)))
1702 /* Setting a temporary CFA register that will be copied
1703 into the FP later on. */
1704 offset
= - INTVAL (XEXP (src
, 1));
1705 cur_cfa
->offset
+= offset
;
1706 cur_cfa
->reg
= dwf_regno (dest
);
1707 /* Or used to save regs to the stack. */
1708 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1709 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1713 else if (REG_P (XEXP (src
, 0))
1714 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1715 && XEXP (src
, 1) == stack_pointer_rtx
)
1717 /* Setting a scratch register that we will use instead
1718 of SP for saving registers to the stack. */
1719 gcc_assert (cur_cfa
->reg
== dw_stack_pointer_regnum
);
1720 cur_trace
->cfa_store
.reg
= dwf_regno (dest
);
1721 cur_trace
->cfa_store
.offset
1722 = cur_cfa
->offset
- cur_trace
->cfa_temp
.offset
;
1726 else if (GET_CODE (src
) == LO_SUM
1727 && CONST_INT_P (XEXP (src
, 1)))
1729 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1730 cur_trace
->cfa_temp
.offset
= INTVAL (XEXP (src
, 1));
1739 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1740 cur_trace
->cfa_temp
.offset
= INTVAL (src
);
1745 gcc_assert (REG_P (XEXP (src
, 0))
1746 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1747 && CONST_INT_P (XEXP (src
, 1)));
1749 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1750 cur_trace
->cfa_temp
.offset
|= INTVAL (XEXP (src
, 1));
1753 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1754 which will fill in all of the bits. */
1761 case UNSPEC_VOLATILE
:
1762 /* All unspecs should be represented by REG_CFA_* notes. */
1768 /* If this AND operation happens on stack pointer in prologue,
1769 we assume the stack is realigned and we extract the
1771 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1773 /* We interpret reg_save differently with stack_realign set.
1774 Thus we must flush whatever we have queued first. */
1775 dwarf2out_flush_queued_reg_saves ();
1777 gcc_assert (cur_trace
->cfa_store
.reg
1778 == dwf_regno (XEXP (src
, 0)));
1779 fde
->stack_realign
= 1;
1780 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
1781 cur_trace
->cfa_store
.offset
= 0;
1783 if (cur_cfa
->reg
!= dw_stack_pointer_regnum
1784 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1785 fde
->drap_reg
= cur_cfa
->reg
;
1796 /* Saving a register to the stack. Make sure dest is relative to the
1798 switch (GET_CODE (XEXP (dest
, 0)))
1804 /* We can't handle variable size modifications. */
1805 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
1807 offset
= -INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
1809 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
1810 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1812 cur_trace
->cfa_store
.offset
+= offset
;
1813 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1814 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1816 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
1817 offset
-= cur_trace
->cfa_store
.offset
;
1819 offset
= -cur_trace
->cfa_store
.offset
;
1826 offset
= GET_MODE_SIZE (GET_MODE (dest
));
1827 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
1830 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
1831 == STACK_POINTER_REGNUM
)
1832 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1834 cur_trace
->cfa_store
.offset
+= offset
;
1836 /* Rule 18: If stack is aligned, we will use FP as a
1837 reference to represent the address of the stored
1840 && fde
->stack_realign
1842 && REGNO (src
) == HARD_FRAME_POINTER_REGNUM
)
1844 gcc_assert (cur_cfa
->reg
!= dw_frame_pointer_regnum
);
1845 cur_trace
->cfa_store
.offset
= 0;
1848 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1849 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1851 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
1852 offset
+= -cur_trace
->cfa_store
.offset
;
1854 offset
= -cur_trace
->cfa_store
.offset
;
1858 /* With an offset. */
1865 gcc_assert (CONST_INT_P (XEXP (XEXP (dest
, 0), 1))
1866 && REG_P (XEXP (XEXP (dest
, 0), 0)));
1867 offset
= INTVAL (XEXP (XEXP (dest
, 0), 1));
1868 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
1871 regno
= dwf_regno (XEXP (XEXP (dest
, 0), 0));
1873 if (cur_cfa
->reg
== regno
)
1874 offset
-= cur_cfa
->offset
;
1875 else if (cur_trace
->cfa_store
.reg
== regno
)
1876 offset
-= cur_trace
->cfa_store
.offset
;
1879 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1880 offset
-= cur_trace
->cfa_temp
.offset
;
1886 /* Without an offset. */
1889 unsigned int regno
= dwf_regno (XEXP (dest
, 0));
1891 if (cur_cfa
->reg
== regno
)
1892 offset
= -cur_cfa
->offset
;
1893 else if (cur_trace
->cfa_store
.reg
== regno
)
1894 offset
= -cur_trace
->cfa_store
.offset
;
1897 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1898 offset
= -cur_trace
->cfa_temp
.offset
;
1905 gcc_assert (cur_trace
->cfa_temp
.reg
1906 == dwf_regno (XEXP (XEXP (dest
, 0), 0)));
1907 offset
= -cur_trace
->cfa_temp
.offset
;
1908 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
1916 /* If the source operand of this MEM operation is a memory,
1917 we only care how much stack grew. */
1922 && REGNO (src
) != STACK_POINTER_REGNUM
1923 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
1924 && dwf_regno (src
) == cur_cfa
->reg
)
1926 /* We're storing the current CFA reg into the stack. */
1928 if (cur_cfa
->offset
== 0)
1931 /* If stack is aligned, putting CFA reg into stack means
1932 we can no longer use reg + offset to represent CFA.
1933 Here we use DW_CFA_def_cfa_expression instead. The
1934 result of this expression equals to the original CFA
1937 && fde
->stack_realign
1938 && cur_cfa
->indirect
== 0
1939 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1941 gcc_assert (fde
->drap_reg
== cur_cfa
->reg
);
1943 cur_cfa
->indirect
= 1;
1944 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1945 cur_cfa
->base_offset
= offset
;
1946 cur_cfa
->offset
= 0;
1948 fde
->drap_reg_saved
= 1;
1952 /* If the source register is exactly the CFA, assume
1953 we're saving SP like any other register; this happens
1955 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
1960 /* Otherwise, we'll need to look in the stack to
1961 calculate the CFA. */
1962 rtx x
= XEXP (dest
, 0);
1966 gcc_assert (REG_P (x
));
1968 cur_cfa
->reg
= dwf_regno (x
);
1969 cur_cfa
->base_offset
= offset
;
1970 cur_cfa
->indirect
= 1;
1976 span
= targetm
.dwarf_register_span (src
);
1981 queue_reg_save (src
, NULL_RTX
, offset
);
1984 /* We have a PARALLEL describing where the contents of SRC live.
1985 Queue register saves for each piece of the PARALLEL. */
1986 HOST_WIDE_INT span_offset
= offset
;
1988 gcc_assert (GET_CODE (span
) == PARALLEL
);
1990 const int par_len
= XVECLEN (span
, 0);
1991 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1993 rtx elem
= XVECEXP (span
, 0, par_index
);
1994 queue_reg_save (elem
, NULL_RTX
, span_offset
);
1995 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
2005 /* Record call frame debugging information for INSN, which either sets
2006 SP or FP (adjusting how we calculate the frame address) or saves a
2007 register to the stack. */
2010 dwarf2out_frame_debug (rtx_insn
*insn
)
2013 bool handled_one
= false;
2015 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2016 switch (REG_NOTE_KIND (note
))
2018 case REG_FRAME_RELATED_EXPR
:
2019 pat
= XEXP (note
, 0);
2022 case REG_CFA_DEF_CFA
:
2023 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2027 case REG_CFA_ADJUST_CFA
:
2032 if (GET_CODE (n
) == PARALLEL
)
2033 n
= XVECEXP (n
, 0, 0);
2035 dwarf2out_frame_debug_adjust_cfa (n
);
2039 case REG_CFA_OFFSET
:
2042 n
= single_set (insn
);
2043 dwarf2out_frame_debug_cfa_offset (n
);
2047 case REG_CFA_REGISTER
:
2052 if (GET_CODE (n
) == PARALLEL
)
2053 n
= XVECEXP (n
, 0, 0);
2055 dwarf2out_frame_debug_cfa_register (n
);
2059 case REG_CFA_EXPRESSION
:
2060 case REG_CFA_VAL_EXPRESSION
:
2063 n
= single_set (insn
);
2065 if (REG_NOTE_KIND (note
) == REG_CFA_EXPRESSION
)
2066 dwarf2out_frame_debug_cfa_expression (n
);
2068 dwarf2out_frame_debug_cfa_val_expression (n
);
2073 case REG_CFA_RESTORE
:
2078 if (GET_CODE (n
) == PARALLEL
)
2079 n
= XVECEXP (n
, 0, 0);
2082 dwarf2out_frame_debug_cfa_restore (n
);
2086 case REG_CFA_SET_VDRAP
:
2090 dw_fde_ref fde
= cfun
->fde
;
2093 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2095 fde
->vdrap_reg
= dwf_regno (n
);
2101 case REG_CFA_WINDOW_SAVE
:
2102 dwarf2out_frame_debug_cfa_window_save ();
2106 case REG_CFA_FLUSH_QUEUE
:
2107 /* The actual flush happens elsewhere. */
2117 pat
= PATTERN (insn
);
2119 dwarf2out_frame_debug_expr (pat
);
2121 /* Check again. A parallel can save and update the same register.
2122 We could probably check just once, here, but this is safer than
2123 removing the check at the start of the function. */
2124 if (clobbers_queued_reg_save (pat
))
2125 dwarf2out_flush_queued_reg_saves ();
2129 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2132 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2134 size_t i
, n_old
, n_new
, n_max
;
2137 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2138 add_cfi (new_row
->cfa_cfi
);
2141 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2146 n_old
= vec_safe_length (old_row
->reg_save
);
2147 n_new
= vec_safe_length (new_row
->reg_save
);
2148 n_max
= MAX (n_old
, n_new
);
2150 for (i
= 0; i
< n_max
; ++i
)
2152 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2155 r_old
= (*old_row
->reg_save
)[i
];
2157 r_new
= (*new_row
->reg_save
)[i
];
2161 else if (r_new
== NULL
)
2162 add_cfi_restore (i
);
2163 else if (!cfi_equal_p (r_old
, r_new
))
2168 /* Examine CFI and return true if a cfi label and set_loc is needed
2169 beforehand. Even when generating CFI assembler instructions, we
2170 still have to add the cfi to the list so that lookup_cfa_1 works
2171 later on. When -g2 and above we even need to force emitting of
2172 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2173 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2174 and so don't use convert_cfa_to_fb_loc_list. */
2177 cfi_label_required_p (dw_cfi_ref cfi
)
2179 if (!dwarf2out_do_cfi_asm ())
2182 if (dwarf_version
== 2
2183 && debug_info_level
> DINFO_LEVEL_TERSE
2184 && (write_symbols
== DWARF2_DEBUG
2185 || write_symbols
== VMS_AND_DWARF2_DEBUG
))
2187 switch (cfi
->dw_cfi_opc
)
2189 case DW_CFA_def_cfa_offset
:
2190 case DW_CFA_def_cfa_offset_sf
:
2191 case DW_CFA_def_cfa_register
:
2192 case DW_CFA_def_cfa
:
2193 case DW_CFA_def_cfa_sf
:
2194 case DW_CFA_def_cfa_expression
:
2195 case DW_CFA_restore_state
:
2204 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2205 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2208 add_cfis_to_fde (void)
2210 dw_fde_ref fde
= cfun
->fde
;
2211 rtx_insn
*insn
, *next
;
2212 /* We always start with a function_begin label. */
2215 for (insn
= get_insns (); insn
; insn
= next
)
2217 next
= NEXT_INSN (insn
);
2219 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2221 fde
->dw_fde_switch_cfi_index
= vec_safe_length (fde
->dw_fde_cfi
);
2222 /* Don't attempt to advance_loc4 between labels
2223 in different sections. */
2227 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2229 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2231 if (NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2233 required
|= cfi_label_required_p (NOTE_CFI (next
));
2234 next
= NEXT_INSN (next
);
2236 else if (active_insn_p (next
)
2237 || (NOTE_P (next
) && (NOTE_KIND (next
)
2238 == NOTE_INSN_SWITCH_TEXT_SECTIONS
)))
2241 next
= NEXT_INSN (next
);
2244 int num
= dwarf2out_cfi_label_num
;
2245 const char *label
= dwarf2out_cfi_label ();
2248 /* Set the location counter to the new label. */
2250 xcfi
->dw_cfi_opc
= (first
? DW_CFA_set_loc
2251 : DW_CFA_advance_loc4
);
2252 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2253 vec_safe_push (fde
->dw_fde_cfi
, xcfi
);
2255 rtx_note
*tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2256 NOTE_LABEL_NUMBER (tmp
) = num
;
2261 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2262 vec_safe_push (fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2263 insn
= NEXT_INSN (insn
);
2265 while (insn
!= next
);
2271 /* If LABEL is the start of a trace, then initialize the state of that
2272 trace from CUR_TRACE and CUR_ROW. */
2275 maybe_record_trace_start (rtx_insn
*start
, rtx_insn
*origin
)
2278 HOST_WIDE_INT args_size
;
2280 ti
= get_trace_info (start
);
2281 gcc_assert (ti
!= NULL
);
2285 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2286 cur_trace
->id
, ti
->id
,
2287 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2288 (origin
? INSN_UID (origin
) : 0));
2291 args_size
= cur_trace
->end_true_args_size
;
2292 if (ti
->beg_row
== NULL
)
2294 /* This is the first time we've encountered this trace. Propagate
2295 state across the edge and push the trace onto the work list. */
2296 ti
->beg_row
= copy_cfi_row (cur_row
);
2297 ti
->beg_true_args_size
= args_size
;
2299 ti
->cfa_store
= cur_trace
->cfa_store
;
2300 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2301 ti
->regs_saved_in_regs
= cur_trace
->regs_saved_in_regs
.copy ();
2303 trace_work_list
.safe_push (ti
);
2306 fprintf (dump_file
, "\tpush trace %u to worklist\n", ti
->id
);
2311 /* We ought to have the same state incoming to a given trace no
2312 matter how we arrive at the trace. Anything else means we've
2313 got some kind of optimization error. */
2314 gcc_checking_assert (cfi_row_equal_p (cur_row
, ti
->beg_row
));
2316 /* The args_size is allowed to conflict if it isn't actually used. */
2317 if (ti
->beg_true_args_size
!= args_size
)
2318 ti
->args_size_undefined
= true;
2322 /* Similarly, but handle the args_size and CFA reset across EH
2323 and non-local goto edges. */
2326 maybe_record_trace_start_abnormal (rtx_insn
*start
, rtx_insn
*origin
)
2328 HOST_WIDE_INT save_args_size
, delta
;
2329 dw_cfa_location save_cfa
;
2331 save_args_size
= cur_trace
->end_true_args_size
;
2332 if (save_args_size
== 0)
2334 maybe_record_trace_start (start
, origin
);
2338 delta
= -save_args_size
;
2339 cur_trace
->end_true_args_size
= 0;
2341 save_cfa
= cur_row
->cfa
;
2342 if (cur_row
->cfa
.reg
== dw_stack_pointer_regnum
)
2344 /* Convert a change in args_size (always a positive in the
2345 direction of stack growth) to a change in stack pointer. */
2346 if (!STACK_GROWS_DOWNWARD
)
2349 cur_row
->cfa
.offset
+= delta
;
2352 maybe_record_trace_start (start
, origin
);
2354 cur_trace
->end_true_args_size
= save_args_size
;
2355 cur_row
->cfa
= save_cfa
;
2358 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2359 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2362 create_trace_edges (rtx_insn
*insn
)
2369 rtx_jump_table_data
*table
;
2371 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2374 if (tablejump_p (insn
, NULL
, &table
))
2376 rtvec vec
= table
->get_labels ();
2378 n
= GET_NUM_ELEM (vec
);
2379 for (i
= 0; i
< n
; ++i
)
2381 rtx_insn
*lab
= as_a
<rtx_insn
*> (XEXP (RTVEC_ELT (vec
, i
), 0));
2382 maybe_record_trace_start (lab
, insn
);
2385 else if (computed_jump_p (insn
))
2389 FOR_EACH_VEC_SAFE_ELT (forced_labels
, i
, temp
)
2390 maybe_record_trace_start (temp
, insn
);
2392 else if (returnjump_p (insn
))
2394 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2396 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2397 for (i
= 0; i
< n
; ++i
)
2400 as_a
<rtx_insn
*> (XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0));
2401 maybe_record_trace_start (lab
, insn
);
2406 rtx_insn
*lab
= JUMP_LABEL_AS_INSN (insn
);
2407 gcc_assert (lab
!= NULL
);
2408 maybe_record_trace_start (lab
, insn
);
2411 else if (CALL_P (insn
))
2413 /* Sibling calls don't have edges inside this function. */
2414 if (SIBLING_CALL_P (insn
))
2417 /* Process non-local goto edges. */
2418 if (can_nonlocal_goto (insn
))
2419 for (rtx_insn_list
*lab
= nonlocal_goto_handler_labels
;
2422 maybe_record_trace_start_abnormal (lab
->insn (), insn
);
2424 else if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2426 int i
, n
= seq
->len ();
2427 for (i
= 0; i
< n
; ++i
)
2428 create_trace_edges (seq
->insn (i
));
2432 /* Process EH edges. */
2433 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2435 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2437 maybe_record_trace_start_abnormal (lp
->landing_pad
, insn
);
2441 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2444 scan_insn_after (rtx_insn
*insn
)
2446 if (RTX_FRAME_RELATED_P (insn
))
2447 dwarf2out_frame_debug (insn
);
2448 notice_args_size (insn
);
2451 /* Scan the trace beginning at INSN and create the CFI notes for the
2452 instructions therein. */
2455 scan_trace (dw_trace_info
*trace
)
2457 rtx_insn
*prev
, *insn
= trace
->head
;
2458 dw_cfa_location this_cfa
;
2461 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2462 trace
->id
, rtx_name
[(int) GET_CODE (insn
)],
2465 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2466 trace
->end_true_args_size
= trace
->beg_true_args_size
;
2469 cur_row
= trace
->end_row
;
2471 this_cfa
= cur_row
->cfa
;
2472 cur_cfa
= &this_cfa
;
2474 for (prev
= insn
, insn
= NEXT_INSN (insn
);
2476 prev
= insn
, insn
= NEXT_INSN (insn
))
2480 /* Do everything that happens "before" the insn. */
2481 add_cfi_insn
= prev
;
2483 /* Notice the end of a trace. */
2484 if (BARRIER_P (insn
))
2486 /* Don't bother saving the unneeded queued registers at all. */
2487 queued_reg_saves
.truncate (0);
2490 if (save_point_p (insn
))
2492 /* Propagate across fallthru edges. */
2493 dwarf2out_flush_queued_reg_saves ();
2494 maybe_record_trace_start (insn
, NULL
);
2498 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2501 /* Handle all changes to the row state. Sequences require special
2502 handling for the positioning of the notes. */
2503 if (rtx_sequence
*pat
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2506 int i
, n
= pat
->len ();
2508 control
= pat
->insn (0);
2509 if (can_throw_internal (control
))
2510 notice_eh_throw (control
);
2511 dwarf2out_flush_queued_reg_saves ();
2513 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
2515 /* ??? Hopefully multiple delay slots are not annulled. */
2516 gcc_assert (n
== 2);
2517 gcc_assert (!RTX_FRAME_RELATED_P (control
));
2518 gcc_assert (!find_reg_note (control
, REG_ARGS_SIZE
, NULL
));
2520 elt
= pat
->insn (1);
2522 if (INSN_FROM_TARGET_P (elt
))
2524 HOST_WIDE_INT restore_args_size
;
2525 cfi_vec save_row_reg_save
;
2527 /* If ELT is an instruction from target of an annulled
2528 branch, the effects are for the target only and so
2529 the args_size and CFA along the current path
2530 shouldn't change. */
2531 add_cfi_insn
= NULL
;
2532 restore_args_size
= cur_trace
->end_true_args_size
;
2533 cur_cfa
= &cur_row
->cfa
;
2534 save_row_reg_save
= vec_safe_copy (cur_row
->reg_save
);
2536 scan_insn_after (elt
);
2538 /* ??? Should we instead save the entire row state? */
2539 gcc_assert (!queued_reg_saves
.length ());
2541 create_trace_edges (control
);
2543 cur_trace
->end_true_args_size
= restore_args_size
;
2544 cur_row
->cfa
= this_cfa
;
2545 cur_row
->reg_save
= save_row_reg_save
;
2546 cur_cfa
= &this_cfa
;
2550 /* If ELT is a annulled branch-taken instruction (i.e.
2551 executed only when branch is not taken), the args_size
2552 and CFA should not change through the jump. */
2553 create_trace_edges (control
);
2555 /* Update and continue with the trace. */
2556 add_cfi_insn
= insn
;
2557 scan_insn_after (elt
);
2558 def_cfa_1 (&this_cfa
);
2563 /* The insns in the delay slot should all be considered to happen
2564 "before" a call insn. Consider a call with a stack pointer
2565 adjustment in the delay slot. The backtrace from the callee
2566 should include the sp adjustment. Unfortunately, that leaves
2567 us with an unavoidable unwinding error exactly at the call insn
2568 itself. For jump insns we'd prefer to avoid this error by
2569 placing the notes after the sequence. */
2570 if (JUMP_P (control
))
2571 add_cfi_insn
= insn
;
2573 for (i
= 1; i
< n
; ++i
)
2575 elt
= pat
->insn (i
);
2576 scan_insn_after (elt
);
2579 /* Make sure any register saves are visible at the jump target. */
2580 dwarf2out_flush_queued_reg_saves ();
2581 any_cfis_emitted
= false;
2583 /* However, if there is some adjustment on the call itself, e.g.
2584 a call_pop, that action should be considered to happen after
2585 the call returns. */
2586 add_cfi_insn
= insn
;
2587 scan_insn_after (control
);
2591 /* Flush data before calls and jumps, and of course if necessary. */
2592 if (can_throw_internal (insn
))
2594 notice_eh_throw (insn
);
2595 dwarf2out_flush_queued_reg_saves ();
2597 else if (!NONJUMP_INSN_P (insn
)
2598 || clobbers_queued_reg_save (insn
)
2599 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2600 dwarf2out_flush_queued_reg_saves ();
2601 any_cfis_emitted
= false;
2603 add_cfi_insn
= insn
;
2604 scan_insn_after (insn
);
2608 /* Between frame-related-p and args_size we might have otherwise
2609 emitted two cfa adjustments. Do it now. */
2610 def_cfa_1 (&this_cfa
);
2612 /* Minimize the number of advances by emitting the entire queue
2613 once anything is emitted. */
2614 if (any_cfis_emitted
2615 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2616 dwarf2out_flush_queued_reg_saves ();
2618 /* Note that a test for control_flow_insn_p does exactly the
2619 same tests as are done to actually create the edges. So
2620 always call the routine and let it not create edges for
2621 non-control-flow insns. */
2622 create_trace_edges (control
);
2625 add_cfi_insn
= NULL
;
2631 /* Scan the function and create the initial set of CFI notes. */
2634 create_cfi_notes (void)
2638 gcc_checking_assert (!queued_reg_saves
.exists ());
2639 gcc_checking_assert (!trace_work_list
.exists ());
2641 /* Always begin at the entry trace. */
2642 ti
= &trace_info
[0];
2645 while (!trace_work_list
.is_empty ())
2647 ti
= trace_work_list
.pop ();
2651 queued_reg_saves
.release ();
2652 trace_work_list
.release ();
2655 /* Return the insn before the first NOTE_INSN_CFI after START. */
2658 before_next_cfi_note (rtx_insn
*start
)
2660 rtx_insn
*prev
= start
;
2663 if (NOTE_P (start
) && NOTE_KIND (start
) == NOTE_INSN_CFI
)
2666 start
= NEXT_INSN (start
);
2671 /* Insert CFI notes between traces to properly change state between them. */
2674 connect_traces (void)
2676 unsigned i
, n
= trace_info
.length ();
2677 dw_trace_info
*prev_ti
, *ti
;
2679 /* ??? Ideally, we should have both queued and processed every trace.
2680 However the current representation of constant pools on various targets
2681 is indistinguishable from unreachable code. Assume for the moment that
2682 we can simply skip over such traces. */
2683 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2684 these are not "real" instructions, and should not be considered.
2685 This could be generically useful for tablejump data as well. */
2686 /* Remove all unprocessed traces from the list. */
2687 for (i
= n
- 1; i
> 0; --i
)
2689 ti
= &trace_info
[i
];
2690 if (ti
->beg_row
== NULL
)
2692 trace_info
.ordered_remove (i
);
2696 gcc_assert (ti
->end_row
!= NULL
);
2699 /* Work from the end back to the beginning. This lets us easily insert
2700 remember/restore_state notes in the correct order wrt other notes. */
2701 prev_ti
= &trace_info
[n
- 1];
2702 for (i
= n
- 1; i
> 0; --i
)
2704 dw_cfi_row
*old_row
;
2707 prev_ti
= &trace_info
[i
- 1];
2709 add_cfi_insn
= ti
->head
;
2711 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2712 for the portion of the function in the alternate text
2713 section. The row state at the very beginning of that
2714 new FDE will be exactly the row state from the CIE. */
2715 if (ti
->switch_sections
)
2716 old_row
= cie_cfi_row
;
2719 old_row
= prev_ti
->end_row
;
2720 /* If there's no change from the previous end state, fine. */
2721 if (cfi_row_equal_p (old_row
, ti
->beg_row
))
2723 /* Otherwise check for the common case of sharing state with
2724 the beginning of an epilogue, but not the end. Insert
2725 remember/restore opcodes in that case. */
2726 else if (cfi_row_equal_p (prev_ti
->beg_row
, ti
->beg_row
))
2730 /* Note that if we blindly insert the remember at the
2731 start of the trace, we can wind up increasing the
2732 size of the unwind info due to extra advance opcodes.
2733 Instead, put the remember immediately before the next
2734 state change. We know there must be one, because the
2735 state at the beginning and head of the trace differ. */
2736 add_cfi_insn
= before_next_cfi_note (prev_ti
->head
);
2738 cfi
->dw_cfi_opc
= DW_CFA_remember_state
;
2741 add_cfi_insn
= ti
->head
;
2743 cfi
->dw_cfi_opc
= DW_CFA_restore_state
;
2746 old_row
= prev_ti
->beg_row
;
2748 /* Otherwise, we'll simply change state from the previous end. */
2751 change_cfi_row (old_row
, ti
->beg_row
);
2753 if (dump_file
&& add_cfi_insn
!= ti
->head
)
2757 fprintf (dump_file
, "Fixup between trace %u and %u:\n",
2758 prev_ti
->id
, ti
->id
);
2763 note
= NEXT_INSN (note
);
2764 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
2765 output_cfi_directive (dump_file
, NOTE_CFI (note
));
2767 while (note
!= add_cfi_insn
);
2771 /* Connect args_size between traces that have can_throw_internal insns. */
2772 if (cfun
->eh
->lp_array
)
2774 HOST_WIDE_INT prev_args_size
= 0;
2776 for (i
= 0; i
< n
; ++i
)
2778 ti
= &trace_info
[i
];
2780 if (ti
->switch_sections
)
2782 if (ti
->eh_head
== NULL
)
2784 gcc_assert (!ti
->args_size_undefined
);
2786 if (ti
->beg_delay_args_size
!= prev_args_size
)
2788 /* ??? Search back to previous CFI note. */
2789 add_cfi_insn
= PREV_INSN (ti
->eh_head
);
2790 add_cfi_args_size (ti
->beg_delay_args_size
);
2793 prev_args_size
= ti
->end_delay_args_size
;
2798 /* Set up the pseudo-cfg of instruction traces, as described at the
2799 block comment at the top of the file. */
2802 create_pseudo_cfg (void)
2804 bool saw_barrier
, switch_sections
;
2809 /* The first trace begins at the start of the function,
2810 and begins with the CIE row state. */
2811 trace_info
.create (16);
2812 memset (&ti
, 0, sizeof (ti
));
2813 ti
.head
= get_insns ();
2814 ti
.beg_row
= cie_cfi_row
;
2815 ti
.cfa_store
= cie_cfi_row
->cfa
;
2816 ti
.cfa_temp
.reg
= INVALID_REGNUM
;
2817 trace_info
.quick_push (ti
);
2819 if (cie_return_save
)
2820 ti
.regs_saved_in_regs
.safe_push (*cie_return_save
);
2822 /* Walk all the insns, collecting start of trace locations. */
2823 saw_barrier
= false;
2824 switch_sections
= false;
2825 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2827 if (BARRIER_P (insn
))
2829 else if (NOTE_P (insn
)
2830 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2832 /* We should have just seen a barrier. */
2833 gcc_assert (saw_barrier
);
2834 switch_sections
= true;
2836 /* Watch out for save_point notes between basic blocks.
2837 In particular, a note after a barrier. Do not record these,
2838 delaying trace creation until the label. */
2839 else if (save_point_p (insn
)
2840 && (LABEL_P (insn
) || !saw_barrier
))
2842 memset (&ti
, 0, sizeof (ti
));
2844 ti
.switch_sections
= switch_sections
;
2845 ti
.id
= trace_info
.length ();
2846 trace_info
.safe_push (ti
);
2848 saw_barrier
= false;
2849 switch_sections
= false;
2853 /* Create the trace index after we've finished building trace_info,
2854 avoiding stale pointer problems due to reallocation. */
2856 = new hash_table
<trace_info_hasher
> (trace_info
.length ());
2858 FOR_EACH_VEC_ELT (trace_info
, i
, tp
)
2860 dw_trace_info
**slot
;
2863 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", tp
->id
,
2864 rtx_name
[(int) GET_CODE (tp
->head
)], INSN_UID (tp
->head
),
2865 tp
->switch_sections
? " (section switch)" : "");
2867 slot
= trace_index
->find_slot_with_hash (tp
, INSN_UID (tp
->head
), INSERT
);
2868 gcc_assert (*slot
== NULL
);
2873 /* Record the initial position of the return address. RTL is
2874 INCOMING_RETURN_ADDR_RTX. */
2877 initial_return_save (rtx rtl
)
2879 unsigned int reg
= INVALID_REGNUM
;
2880 HOST_WIDE_INT offset
= 0;
2882 switch (GET_CODE (rtl
))
2885 /* RA is in a register. */
2886 reg
= dwf_regno (rtl
);
2890 /* RA is on the stack. */
2891 rtl
= XEXP (rtl
, 0);
2892 switch (GET_CODE (rtl
))
2895 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
2900 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2901 offset
= INTVAL (XEXP (rtl
, 1));
2905 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2906 offset
= -INTVAL (XEXP (rtl
, 1));
2916 /* The return address is at some offset from any value we can
2917 actually load. For instance, on the SPARC it is in %i7+8. Just
2918 ignore the offset for now; it doesn't matter for unwinding frames. */
2919 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
2920 initial_return_save (XEXP (rtl
, 0));
2927 if (reg
!= DWARF_FRAME_RETURN_COLUMN
)
2929 if (reg
!= INVALID_REGNUM
)
2930 record_reg_saved_in_reg (rtl
, pc_rtx
);
2931 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
2936 create_cie_data (void)
2938 dw_cfa_location loc
;
2939 dw_trace_info cie_trace
;
2941 dw_stack_pointer_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
2943 memset (&cie_trace
, 0, sizeof (cie_trace
));
2944 cur_trace
= &cie_trace
;
2946 add_cfi_vec
= &cie_cfi_vec
;
2947 cie_cfi_row
= cur_row
= new_cfi_row ();
2949 /* On entry, the Canonical Frame Address is at SP. */
2950 memset (&loc
, 0, sizeof (loc
));
2951 loc
.reg
= dw_stack_pointer_regnum
;
2952 loc
.offset
= INCOMING_FRAME_SP_OFFSET
;
2955 if (targetm
.debug_unwind_info () == UI_DWARF2
2956 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
2958 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
2960 /* For a few targets, we have the return address incoming into a
2961 register, but choose a different return column. This will result
2962 in a DW_CFA_register for the return, and an entry in
2963 regs_saved_in_regs to match. If the target later stores that
2964 return address register to the stack, we want to be able to emit
2965 the DW_CFA_offset against the return column, not the intermediate
2966 save register. Save the contents of regs_saved_in_regs so that
2967 we can re-initialize it at the start of each function. */
2968 switch (cie_trace
.regs_saved_in_regs
.length ())
2973 cie_return_save
= ggc_alloc
<reg_saved_in_data
> ();
2974 *cie_return_save
= cie_trace
.regs_saved_in_regs
[0];
2975 cie_trace
.regs_saved_in_regs
.release ();
2987 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2988 state at each location within the function. These notes will be
2989 emitted during pass_final. */
2992 execute_dwarf2_frame (void)
2994 /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */
2995 dw_frame_pointer_regnum
= DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM
);
2997 /* The first time we're called, compute the incoming frame state. */
2998 if (cie_cfi_vec
== NULL
)
3001 dwarf2out_alloc_current_fde ();
3003 create_pseudo_cfg ();
3006 create_cfi_notes ();
3010 /* Free all the data we allocated. */
3015 FOR_EACH_VEC_ELT (trace_info
, i
, ti
)
3016 ti
->regs_saved_in_regs
.release ();
3018 trace_info
.release ();
3026 /* Convert a DWARF call frame info. operation to its string name */
3029 dwarf_cfi_name (unsigned int cfi_opc
)
3031 const char *name
= get_DW_CFA_name (cfi_opc
);
3036 return "DW_CFA_<unknown>";
3039 /* This routine will generate the correct assembly data for a location
3040 description based on a cfi entry with a complex address. */
3043 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
3045 dw_loc_descr_ref loc
;
3048 if (cfi
->dw_cfi_opc
== DW_CFA_expression
3049 || cfi
->dw_cfi_opc
== DW_CFA_val_expression
)
3052 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3053 dw2_asm_output_data (1, r
, NULL
);
3054 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3057 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3059 /* Output the size of the block. */
3060 size
= size_of_locs (loc
);
3061 dw2_asm_output_data_uleb128 (size
, NULL
);
3063 /* Now output the operations themselves. */
3064 output_loc_sequence (loc
, for_eh
);
3067 /* Similar, but used for .cfi_escape. */
3070 output_cfa_loc_raw (dw_cfi_ref cfi
)
3072 dw_loc_descr_ref loc
;
3075 if (cfi
->dw_cfi_opc
== DW_CFA_expression
3076 || cfi
->dw_cfi_opc
== DW_CFA_val_expression
)
3079 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3080 fprintf (asm_out_file
, "%#x,", r
);
3081 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3084 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3086 /* Output the size of the block. */
3087 size
= size_of_locs (loc
);
3088 dw2_asm_output_data_uleb128_raw (size
);
3089 fputc (',', asm_out_file
);
3091 /* Now output the operations themselves. */
3092 output_loc_sequence_raw (loc
);
3095 /* Output a Call Frame Information opcode and its operand(s). */
3098 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3103 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3104 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3105 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3106 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3107 ((unsigned HOST_WIDE_INT
)
3108 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3109 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3111 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3112 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3113 "DW_CFA_offset, column %#lx", r
);
3114 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3115 dw2_asm_output_data_uleb128 (off
, NULL
);
3117 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3119 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3120 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3121 "DW_CFA_restore, column %#lx", r
);
3125 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3126 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3128 switch (cfi
->dw_cfi_opc
)
3130 case DW_CFA_set_loc
:
3132 dw2_asm_output_encoded_addr_rtx (
3133 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3134 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3137 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3138 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3139 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3142 case DW_CFA_advance_loc1
:
3143 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3144 fde
->dw_fde_current_label
, NULL
);
3145 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3148 case DW_CFA_advance_loc2
:
3149 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3150 fde
->dw_fde_current_label
, NULL
);
3151 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3154 case DW_CFA_advance_loc4
:
3155 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3156 fde
->dw_fde_current_label
, NULL
);
3157 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3160 case DW_CFA_MIPS_advance_loc8
:
3161 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3162 fde
->dw_fde_current_label
, NULL
);
3163 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3166 case DW_CFA_offset_extended
:
3167 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3168 dw2_asm_output_data_uleb128 (r
, NULL
);
3169 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3170 dw2_asm_output_data_uleb128 (off
, NULL
);
3173 case DW_CFA_def_cfa
:
3174 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3175 dw2_asm_output_data_uleb128 (r
, NULL
);
3176 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3179 case DW_CFA_offset_extended_sf
:
3180 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3181 dw2_asm_output_data_uleb128 (r
, NULL
);
3182 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3183 dw2_asm_output_data_sleb128 (off
, NULL
);
3186 case DW_CFA_def_cfa_sf
:
3187 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3188 dw2_asm_output_data_uleb128 (r
, NULL
);
3189 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3190 dw2_asm_output_data_sleb128 (off
, NULL
);
3193 case DW_CFA_restore_extended
:
3194 case DW_CFA_undefined
:
3195 case DW_CFA_same_value
:
3196 case DW_CFA_def_cfa_register
:
3197 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3198 dw2_asm_output_data_uleb128 (r
, NULL
);
3201 case DW_CFA_register
:
3202 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3203 dw2_asm_output_data_uleb128 (r
, NULL
);
3204 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3205 dw2_asm_output_data_uleb128 (r
, NULL
);
3208 case DW_CFA_def_cfa_offset
:
3209 case DW_CFA_GNU_args_size
:
3210 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3213 case DW_CFA_def_cfa_offset_sf
:
3214 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3215 dw2_asm_output_data_sleb128 (off
, NULL
);
3218 case DW_CFA_GNU_window_save
:
3221 case DW_CFA_def_cfa_expression
:
3222 case DW_CFA_expression
:
3223 case DW_CFA_val_expression
:
3224 output_cfa_loc (cfi
, for_eh
);
3227 case DW_CFA_GNU_negative_offset_extended
:
3228 /* Obsoleted by DW_CFA_offset_extended_sf. */
3237 /* Similar, but do it via assembler directives instead. */
3240 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3242 unsigned long r
, r2
;
3244 switch (cfi
->dw_cfi_opc
)
3246 case DW_CFA_advance_loc
:
3247 case DW_CFA_advance_loc1
:
3248 case DW_CFA_advance_loc2
:
3249 case DW_CFA_advance_loc4
:
3250 case DW_CFA_MIPS_advance_loc8
:
3251 case DW_CFA_set_loc
:
3252 /* Should only be created in a code path not followed when emitting
3253 via directives. The assembler is going to take care of this for
3254 us. But this routines is also used for debugging dumps, so
3256 gcc_assert (f
!= asm_out_file
);
3257 fprintf (f
, "\t.cfi_advance_loc\n");
3261 case DW_CFA_offset_extended
:
3262 case DW_CFA_offset_extended_sf
:
3263 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3264 fprintf (f
, "\t.cfi_offset %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3265 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3268 case DW_CFA_restore
:
3269 case DW_CFA_restore_extended
:
3270 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3271 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3274 case DW_CFA_undefined
:
3275 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3276 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3279 case DW_CFA_same_value
:
3280 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3281 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3284 case DW_CFA_def_cfa
:
3285 case DW_CFA_def_cfa_sf
:
3286 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3287 fprintf (f
, "\t.cfi_def_cfa %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3288 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3291 case DW_CFA_def_cfa_register
:
3292 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3293 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3296 case DW_CFA_register
:
3297 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3298 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3299 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3302 case DW_CFA_def_cfa_offset
:
3303 case DW_CFA_def_cfa_offset_sf
:
3304 fprintf (f
, "\t.cfi_def_cfa_offset "
3305 HOST_WIDE_INT_PRINT_DEC
"\n",
3306 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3309 case DW_CFA_remember_state
:
3310 fprintf (f
, "\t.cfi_remember_state\n");
3312 case DW_CFA_restore_state
:
3313 fprintf (f
, "\t.cfi_restore_state\n");
3316 case DW_CFA_GNU_args_size
:
3317 if (f
== asm_out_file
)
3319 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3320 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3322 fprintf (f
, "\t%s args_size " HOST_WIDE_INT_PRINT_DEC
,
3323 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3328 fprintf (f
, "\t.cfi_GNU_args_size " HOST_WIDE_INT_PRINT_DEC
"\n",
3329 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3333 case DW_CFA_GNU_window_save
:
3334 fprintf (f
, "\t.cfi_window_save\n");
3337 case DW_CFA_def_cfa_expression
:
3338 case DW_CFA_expression
:
3339 case DW_CFA_val_expression
:
3340 if (f
!= asm_out_file
)
3342 fprintf (f
, "\t.cfi_%scfa_%sexpression ...\n",
3343 cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
? "def_" : "",
3344 cfi
->dw_cfi_opc
== DW_CFA_val_expression
? "val_" : "");
3347 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3348 output_cfa_loc_raw (cfi
);
3358 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3360 if (dwarf2out_do_cfi_asm ())
3361 output_cfi_directive (asm_out_file
, cfi
);
3365 dump_cfi_row (FILE *f
, dw_cfi_row
*row
)
3373 dw_cfa_location dummy
;
3374 memset (&dummy
, 0, sizeof (dummy
));
3375 dummy
.reg
= INVALID_REGNUM
;
3376 cfi
= def_cfa_0 (&dummy
, &row
->cfa
);
3378 output_cfi_directive (f
, cfi
);
3380 FOR_EACH_VEC_SAFE_ELT (row
->reg_save
, i
, cfi
)
3382 output_cfi_directive (f
, cfi
);
3385 void debug_cfi_row (dw_cfi_row
*row
);
3388 debug_cfi_row (dw_cfi_row
*row
)
3390 dump_cfi_row (stderr
, row
);
3394 /* Save the result of dwarf2out_do_frame across PCH.
3395 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3396 static GTY(()) signed char saved_do_cfi_asm
= 0;
3398 /* Decide whether we want to emit frame unwind information for the current
3399 translation unit. */
3402 dwarf2out_do_frame (void)
3404 /* We want to emit correct CFA location expressions or lists, so we
3405 have to return true if we're going to output debug info, even if
3406 we're not going to output frame or unwind info. */
3407 if (write_symbols
== DWARF2_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
3410 if (saved_do_cfi_asm
> 0)
3413 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3416 if ((flag_unwind_tables
|| flag_exceptions
)
3417 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3423 /* Decide whether to emit frame unwind via assembler directives. */
3426 dwarf2out_do_cfi_asm (void)
3430 if (saved_do_cfi_asm
!= 0)
3431 return saved_do_cfi_asm
> 0;
3433 /* Assume failure for a moment. */
3434 saved_do_cfi_asm
= -1;
3436 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3438 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3441 /* Make sure the personality encoding is one the assembler can support.
3442 In particular, aligned addresses can't be handled. */
3443 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3444 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3446 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3447 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3450 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3451 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3452 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3453 && !flag_unwind_tables
&& !flag_exceptions
3454 && targetm_common
.except_unwind_info (&global_options
) != UI_DWARF2
)
3458 saved_do_cfi_asm
= 1;
3464 const pass_data pass_data_dwarf2_frame
=
3466 RTL_PASS
, /* type */
3467 "dwarf2", /* name */
3468 OPTGROUP_NONE
, /* optinfo_flags */
3469 TV_FINAL
, /* tv_id */
3470 0, /* properties_required */
3471 0, /* properties_provided */
3472 0, /* properties_destroyed */
3473 0, /* todo_flags_start */
3474 0, /* todo_flags_finish */
3477 class pass_dwarf2_frame
: public rtl_opt_pass
3480 pass_dwarf2_frame (gcc::context
*ctxt
)
3481 : rtl_opt_pass (pass_data_dwarf2_frame
, ctxt
)
3484 /* opt_pass methods: */
3485 virtual bool gate (function
*);
3486 virtual unsigned int execute (function
*) { return execute_dwarf2_frame (); }
3488 }; // class pass_dwarf2_frame
3491 pass_dwarf2_frame::gate (function
*)
3493 /* Targets which still implement the prologue in assembler text
3494 cannot use the generic dwarf2 unwinding. */
3495 if (!targetm
.have_prologue ())
3498 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3499 from the optimized shrink-wrapping annotations that we will compute.
3500 For now, only produce the CFI notes for dwarf2. */
3501 return dwarf2out_do_frame ();
3507 make_pass_dwarf2_frame (gcc::context
*ctxt
)
3509 return new pass_dwarf2_frame (ctxt
);
3512 #include "gt-dwarf2cfi.h"