re PR middle-end/30142 ([meta-bug] invalid gimple)
[official-gcc.git] / gcc / global.c
blob824fcf0f702f1e49bb41ec2aea63691ed887f66e
1 /* Allocate registers for pseudo-registers that span basic blocks.
2 Copyright (C) 1987, 1988, 1991, 1994, 1996, 1997, 1998,
3 1999, 2000, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "machmode.h"
28 #include "hard-reg-set.h"
29 #include "rtl.h"
30 #include "tm_p.h"
31 #include "flags.h"
32 #include "regs.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "reload.h"
37 #include "output.h"
38 #include "toplev.h"
39 #include "tree-pass.h"
40 #include "timevar.h"
41 #include "df.h"
42 #include "vecprim.h"
43 #include "dbgcnt.h"
44 #include "ra.h"
46 /* This pass of the compiler performs global register allocation.
47 It assigns hard register numbers to all the pseudo registers
48 that were not handled in local_alloc. Assignments are recorded
49 in the vector reg_renumber, not by changing the rtl code.
50 (Such changes are made by final). The entry point is
51 the function global_alloc.
53 After allocation is complete, the reload pass is run as a subroutine
54 of this pass, so that when a pseudo reg loses its hard reg due to
55 spilling it is possible to make a second attempt to find a hard
56 reg for it. The reload pass is independent in other respects
57 and it is run even when stupid register allocation is in use.
59 1. Assign allocation-numbers (allocnos) to the pseudo-registers
60 still needing allocations and to the pseudo-registers currently
61 allocated by local-alloc which may be spilled by reload.
62 Set up tables reg_allocno and allocno_reg to map
63 reg numbers to allocnos and vice versa.
64 max_allocno gets the number of allocnos in use.
66 2. Allocate a max_allocno by max_allocno compressed triangular conflict
67 bit matrix (a triangular bit matrix with portions removed for which we
68 can guarantee there are no conflicts, example: two local pseudos that
69 live in different basic blocks) and clear it. This is called "conflict".
70 Note that for triangular bit matrices, there are two possible equations
71 for computing the bit number for two allocnos: LOW and HIGH (LOW < HIGH):
73 1) BITNUM = f(HIGH) + LOW, where
74 f(HIGH) = (HIGH * (HIGH - 1)) / 2
76 2) BITNUM = f(LOW) + HIGH, where
77 f(LOW) = LOW * (max_allocno - LOW) + (LOW * (LOW - 1)) / 2 - LOW - 1
79 We use the second (and less common) equation as this gives us better
80 cache locality for local allocnos that are live within the same basic
81 block. Also note that f(HIGH) and f(LOW) can be precalculated for all
82 values of HIGH and LOW, so all that is necessary to compute the bit
83 number for two allocnos LOW and HIGH is a load followed by an addition.
85 Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix for
86 conflicts between allocnos and explicit hard register use (which
87 includes use of pseudo-registers allocated by local_alloc). This
88 is the hard_reg_conflicts inside each allocno.
90 3. For each basic block, walk backward through the block, recording
91 which pseudo-registers and which hardware registers are live.
92 Build the conflict matrix between the pseudo-registers and another of
93 pseudo-registers versus hardware registers.
95 4. For each basic block, walk backward through the block, recording
96 the preferred hardware registers for each pseudo-register.
98 5. Sort a table of the allocnos into order of desirability of the variables.
100 6. Allocate the variables in that order; each if possible into
101 a preferred register, else into another register. */
103 /* A vector of the integers from 0 to max_allocno-1,
104 sorted in the order of first-to-be-allocated first. */
106 static int *allocno_order;
108 /* Set of registers that global-alloc isn't supposed to use. */
110 static HARD_REG_SET no_global_alloc_regs;
112 /* Set of registers used so far. */
114 static HARD_REG_SET regs_used_so_far;
116 /* Number of refs to each hard reg, as used by local alloc.
117 It is zero for a reg that contains global pseudos or is explicitly used. */
119 static int local_reg_n_refs[FIRST_PSEUDO_REGISTER];
121 /* Frequency of uses of given hard reg. */
122 static int local_reg_freq[FIRST_PSEUDO_REGISTER];
124 /* Guess at live length of each hard reg, as used by local alloc.
125 This is actually the sum of the live lengths of the specific regs. */
127 static int local_reg_live_length[FIRST_PSEUDO_REGISTER];
129 /* Set to 1 a bit in a vector TABLE of HARD_REG_SETs, for vector
130 element I, and hard register number J. */
132 #define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (allocno[I].TABLE, J)
134 /* Return true if *LOC contains an asm. */
136 static int
137 insn_contains_asm_1 (rtx *loc, void *data ATTRIBUTE_UNUSED)
139 if ( !*loc)
140 return 0;
141 if (GET_CODE (*loc) == ASM_OPERANDS)
142 return 1;
143 return 0;
147 /* Return true if INSN contains an ASM. */
149 static int
150 insn_contains_asm (rtx insn)
152 return for_each_rtx (&insn, insn_contains_asm_1, NULL);
156 static void
157 compute_regs_asm_clobbered (char *regs_asm_clobbered)
159 basic_block bb;
161 memset (regs_asm_clobbered, 0, sizeof (char) * FIRST_PSEUDO_REGISTER);
163 FOR_EACH_BB (bb)
165 rtx insn;
166 FOR_BB_INSNS_REVERSE (bb, insn)
168 df_ref *def_rec;
169 if (insn_contains_asm (insn))
170 for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++)
172 df_ref def = *def_rec;
173 unsigned int dregno = DF_REF_REGNO (def);
174 if (dregno < FIRST_PSEUDO_REGISTER)
176 unsigned int i;
177 enum machine_mode mode = GET_MODE (DF_REF_REAL_REG (def));
178 unsigned int end = dregno
179 + hard_regno_nregs[dregno][mode] - 1;
180 for (i = dregno; i <= end; ++i)
181 regs_asm_clobbered[i] = 1;
189 /* All registers that can be eliminated. */
191 HARD_REG_SET eliminable_regset;
193 static int regno_compare (const void *, const void *);
194 static int allocno_compare (const void *, const void *);
195 static void expand_preferences (void);
196 static void prune_preferences (void);
197 static void set_preferences (void);
198 static void find_reg (int, HARD_REG_SET, int, int, int);
199 static void dump_conflicts (FILE *);
202 /* Look through the list of eliminable registers. Set ELIM_SET to the
203 set of registers which may be eliminated. Set NO_GLOBAL_SET to the
204 set of registers which may not be used across blocks.
206 This will normally be called with ELIM_SET as the file static
207 variable eliminable_regset, and NO_GLOBAL_SET as the file static
208 variable NO_GLOBAL_ALLOC_REGS.
210 It also initializes global flag frame_pointer_needed. */
212 static void
213 compute_regsets (HARD_REG_SET *elim_set,
214 HARD_REG_SET *no_global_set)
217 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
218 Unlike regs_ever_live, elements of this array corresponding to
219 eliminable regs like the frame pointer are set if an asm sets them. */
220 char *regs_asm_clobbered = XALLOCAVEC (char, FIRST_PSEUDO_REGISTER);
222 #ifdef ELIMINABLE_REGS
223 static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS;
224 size_t i;
225 #endif
227 /* FIXME: If EXIT_IGNORE_STACK is set, we will not save and restore
228 sp for alloca. So we can't eliminate the frame pointer in that
229 case. At some point, we should improve this by emitting the
230 sp-adjusting insns for this case. */
231 int need_fp
232 = (! flag_omit_frame_pointer
233 || (cfun->calls_alloca && EXIT_IGNORE_STACK)
234 || crtl->accesses_prior_frames
235 || crtl->stack_realign_needed
236 || FRAME_POINTER_REQUIRED);
238 frame_pointer_needed = need_fp;
240 max_regno = max_reg_num ();
241 compact_blocks ();
243 max_allocno = 0;
245 /* A machine may have certain hard registers that
246 are safe to use only within a basic block. */
248 CLEAR_HARD_REG_SET (*no_global_set);
249 CLEAR_HARD_REG_SET (*elim_set);
251 compute_regs_asm_clobbered (regs_asm_clobbered);
252 /* Build the regset of all eliminable registers and show we can't use those
253 that we already know won't be eliminated. */
254 #ifdef ELIMINABLE_REGS
255 for (i = 0; i < ARRAY_SIZE (eliminables); i++)
257 bool cannot_elim
258 = (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to)
259 || (eliminables[i].to == STACK_POINTER_REGNUM
260 && need_fp
261 && (! SUPPORTS_STACK_ALIGNMENT
262 || ! stack_realign_fp)));
264 if (!regs_asm_clobbered[eliminables[i].from])
266 SET_HARD_REG_BIT (*elim_set, eliminables[i].from);
268 if (cannot_elim)
269 SET_HARD_REG_BIT (*no_global_set, eliminables[i].from);
271 else if (cannot_elim)
272 error ("%s cannot be used in asm here",
273 reg_names[eliminables[i].from]);
274 else
275 df_set_regs_ever_live (eliminables[i].from, true);
277 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
278 if (!regs_asm_clobbered[HARD_FRAME_POINTER_REGNUM])
280 SET_HARD_REG_BIT (*elim_set, HARD_FRAME_POINTER_REGNUM);
281 if (need_fp)
282 SET_HARD_REG_BIT (*no_global_set, HARD_FRAME_POINTER_REGNUM);
284 else if (need_fp)
285 error ("%s cannot be used in asm here",
286 reg_names[HARD_FRAME_POINTER_REGNUM]);
287 else
288 df_set_regs_ever_live (HARD_FRAME_POINTER_REGNUM, true);
289 #endif
291 #else
292 if (!regs_asm_clobbered[FRAME_POINTER_REGNUM])
294 SET_HARD_REG_BIT (*elim_set, FRAME_POINTER_REGNUM);
295 if (need_fp)
296 SET_HARD_REG_BIT (*no_global_set, FRAME_POINTER_REGNUM);
298 else if (need_fp)
299 error ("%s cannot be used in asm here", reg_names[FRAME_POINTER_REGNUM]);
300 else
301 df_set_regs_ever_live (FRAME_POINTER_REGNUM, true);
302 #endif
305 /* Perform allocation of pseudo-registers not allocated by local_alloc.
307 Return value is nonzero if reload failed
308 and we must not do any more for this function. */
310 static int
311 global_alloc (void)
313 int retval;
314 size_t i;
315 int max_blk;
316 int *num_allocnos_per_blk;
318 compute_regsets (&eliminable_regset, &no_global_alloc_regs);
320 /* Track which registers have already been used. Start with registers
321 explicitly in the rtl, then registers allocated by local register
322 allocation. */
324 CLEAR_HARD_REG_SET (regs_used_so_far);
325 #ifdef LEAF_REGISTERS
326 /* If we are doing the leaf function optimization, and this is a leaf
327 function, it means that the registers that take work to save are those
328 that need a register window. So prefer the ones that can be used in
329 a leaf function. */
331 const char *cheap_regs;
332 const char *const leaf_regs = LEAF_REGISTERS;
334 if (only_leaf_regs_used () && leaf_function_p ())
335 cheap_regs = leaf_regs;
336 else
337 cheap_regs = call_used_regs;
338 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
339 if (df_regs_ever_live_p (i) || cheap_regs[i])
340 SET_HARD_REG_BIT (regs_used_so_far, i);
342 #else
343 /* We consider registers that do not have to be saved over calls as if
344 they were already used since there is no cost in using them. */
345 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
346 if (df_regs_ever_live_p (i) || call_used_regs[i])
347 SET_HARD_REG_BIT (regs_used_so_far, i);
348 #endif
350 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
351 if (reg_renumber[i] >= 0)
352 SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]);
354 /* Establish mappings from register number to allocation number
355 and vice versa. In the process, count the allocnos. */
357 reg_allocno = XNEWVEC (int, max_regno);
359 /* Initially fill the reg_allocno array with regno's... */
360 max_blk = 0;
361 max_allocno = 0;
362 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
363 /* Note that reg_live_length[i] < 0 indicates a "constant" reg
364 that we are supposed to refrain from putting in a hard reg.
365 -2 means do make an allocno but don't allocate it. */
366 if (REG_N_REFS (i) != 0 && REG_LIVE_LENGTH (i) != -1
367 /* Don't allocate pseudos that cross calls,
368 if this function receives a nonlocal goto. */
369 && (! cfun->has_nonlocal_label
370 || REG_N_CALLS_CROSSED (i) == 0))
372 int blk = regno_basic_block (i);
373 reg_allocno[max_allocno++] = i;
374 if (blk > max_blk)
375 max_blk = blk;
376 gcc_assert (REG_LIVE_LENGTH (i));
379 allocno = XCNEWVEC (struct allocno, max_allocno);
380 partial_bitnum = XNEWVEC (HOST_WIDE_INT, max_allocno);
381 num_allocnos_per_blk = XCNEWVEC (int, max_blk + 1);
383 /* ...so we can sort them in the order we want them to receive
384 their allocnos. */
385 qsort (reg_allocno, max_allocno, sizeof (int), regno_compare);
387 for (i = 0; i < (size_t) max_allocno; i++)
389 int regno = reg_allocno[i];
390 int blk = regno_basic_block (regno);
391 num_allocnos_per_blk[blk]++;
392 allocno[i].reg = regno;
393 allocno[i].size = PSEUDO_REGNO_SIZE (regno);
394 allocno[i].calls_crossed += REG_N_CALLS_CROSSED (regno);
395 allocno[i].freq_calls_crossed += REG_FREQ_CALLS_CROSSED (regno);
396 allocno[i].throwing_calls_crossed
397 += REG_N_THROWING_CALLS_CROSSED (regno);
398 allocno[i].n_refs += REG_N_REFS (regno);
399 allocno[i].freq += REG_FREQ (regno);
400 if (allocno[i].live_length < REG_LIVE_LENGTH (regno))
401 allocno[i].live_length = REG_LIVE_LENGTH (regno);
404 /* The "global" block must contain all allocnos. */
405 num_allocnos_per_blk[0] = max_allocno;
407 /* Now reinitialize the reg_allocno array in terms of the
408 optimized regno to allocno mapping we created above. */
409 for (i = 0; i < (size_t) max_regno; i++)
410 reg_allocno[i] = -1;
412 max_bitnum = 0;
413 for (i = 0; i < (size_t) max_allocno; i++)
415 int regno = allocno[i].reg;
416 int blk = regno_basic_block (regno);
417 int row_size = --num_allocnos_per_blk[blk];
418 reg_allocno[regno] = (int) i;
419 partial_bitnum[i] = (row_size > 0) ? max_bitnum - ((int) i + 1) : -1;
420 max_bitnum += row_size;
423 #ifdef ENABLE_CHECKING
424 gcc_assert (max_bitnum <=
425 (((HOST_WIDE_INT) max_allocno *
426 ((HOST_WIDE_INT) max_allocno - 1)) / 2));
427 #endif
429 if (dump_file)
431 HOST_WIDE_INT num_bits, num_bytes, actual_bytes;
433 fprintf (dump_file, "## max_blk: %d\n", max_blk);
434 fprintf (dump_file, "## max_regno: %d\n", max_regno);
435 fprintf (dump_file, "## max_allocno: %d\n", max_allocno);
437 num_bits = max_bitnum;
438 num_bytes = CEIL (num_bits, 8);
439 actual_bytes = num_bytes;
440 fprintf (dump_file, "## Compressed triangular bitmatrix size: ");
441 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bits, ", num_bits);
442 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bytes\n", num_bytes);
444 num_bits = ((HOST_WIDE_INT) max_allocno *
445 ((HOST_WIDE_INT) max_allocno - 1)) / 2;
446 num_bytes = CEIL (num_bits, 8);
447 fprintf (dump_file, "## Standard triangular bitmatrix size: ");
448 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bits, ", num_bits);
449 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bytes [%.2f%%]\n",
450 num_bytes, 100.0 * ((double) actual_bytes / (double) num_bytes));
452 num_bits = (HOST_WIDE_INT) max_allocno * (HOST_WIDE_INT) max_allocno;
453 num_bytes = CEIL (num_bits, 8);
454 fprintf (dump_file, "## Square bitmatrix size: ");
455 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bits, ", num_bits);
456 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bytes [%.2f%%]\n",
457 num_bytes, 100.0 * ((double) actual_bytes / (double) num_bytes));
460 /* Calculate amount of usage of each hard reg by pseudos
461 allocated by local-alloc. This is to see if we want to
462 override it. */
463 memset (local_reg_live_length, 0, sizeof local_reg_live_length);
464 memset (local_reg_n_refs, 0, sizeof local_reg_n_refs);
465 memset (local_reg_freq, 0, sizeof local_reg_freq);
466 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
467 if (reg_renumber[i] >= 0)
469 int regno = reg_renumber[i];
470 int endregno = end_hard_regno (PSEUDO_REGNO_MODE (i), regno);
471 int j;
473 for (j = regno; j < endregno; j++)
475 local_reg_n_refs[j] += REG_N_REFS (i);
476 local_reg_freq[j] += REG_FREQ (i);
477 local_reg_live_length[j] += REG_LIVE_LENGTH (i);
481 /* We can't override local-alloc for a reg used not just by local-alloc. */
482 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
483 if (df_regs_ever_live_p (i))
484 local_reg_n_refs[i] = 0, local_reg_freq[i] = 0;
486 if (dump_file)
488 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
490 fprintf (dump_file, "%d REG_N_REFS=%d, REG_FREQ=%d, REG_LIVE_LENGTH=%d\n",
491 (int)i, REG_N_REFS (i), REG_FREQ (i), REG_LIVE_LENGTH (i));
493 fprintf (dump_file, "regs_ever_live =");
494 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
495 if (df_regs_ever_live_p (i))
496 fprintf (dump_file, " %d", (int)i);
497 fprintf (dump_file, "\n");
500 conflicts = NULL;
501 adjacency = NULL;
502 adjacency_pool = NULL;
504 /* If there is work to be done (at least one reg to allocate),
505 perform global conflict analysis and allocate the regs. */
507 if (max_allocno > 0)
509 /* We used to use alloca here, but the size of what it would try to
510 allocate would occasionally cause it to exceed the stack limit and
511 cause unpredictable core dumps. Some examples were > 2Mb in size. */
512 conflicts = XCNEWVEC (HOST_WIDEST_FAST_INT,
513 CEIL(max_bitnum, HOST_BITS_PER_WIDEST_FAST_INT));
515 adjacency = XCNEWVEC (adjacency_t *, max_allocno);
516 adjacency_pool = create_alloc_pool ("global_alloc adjacency list pool",
517 sizeof (adjacency_t), 1024);
519 /* Scan all the insns and compute the conflicts among allocnos
520 and between allocnos and hard regs. */
522 global_conflicts ();
524 /* There is just too much going on in the register allocators to
525 keep things up to date. At the end we have to rescan anyway
526 because things change when the reload_completed flag is set.
527 So we just turn off scanning and we will rescan by hand.
529 However, we needed to do the rescanning before this point to
530 get the new insns scanned inserted by local_alloc scanned for
531 global_conflicts. */
532 df_set_flags (DF_NO_INSN_RESCAN);
534 /* Eliminate conflicts between pseudos and eliminable registers. If
535 the register is not eliminated, the pseudo won't really be able to
536 live in the eliminable register, so the conflict doesn't matter.
537 If we do eliminate the register, the conflict will no longer exist.
538 So in either case, we can ignore the conflict. Likewise for
539 preferences. */
541 set_preferences ();
543 for (i = 0; i < (size_t) max_allocno; i++)
545 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_conflicts,
546 eliminable_regset);
547 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_copy_preferences,
548 eliminable_regset);
549 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_preferences,
550 eliminable_regset);
553 /* Try to expand the preferences by merging them between allocnos. */
555 expand_preferences ();
557 /* Determine the order to allocate the remaining pseudo registers. */
559 allocno_order = XNEWVEC (int, max_allocno);
560 for (i = 0; i < (size_t) max_allocno; i++)
561 allocno_order[i] = i;
563 /* Default the size to 1, since allocno_compare uses it to divide by.
564 Also convert allocno_live_length of zero to -1. A length of zero
565 can occur when all the registers for that allocno have reg_live_length
566 equal to -2. In this case, we want to make an allocno, but not
567 allocate it. So avoid the divide-by-zero and set it to a low
568 priority. */
570 for (i = 0; i < (size_t) max_allocno; i++)
572 if (allocno[i].size == 0)
573 allocno[i].size = 1;
574 if (allocno[i].live_length == 0)
575 allocno[i].live_length = -1;
578 qsort (allocno_order, max_allocno, sizeof (int), allocno_compare);
580 prune_preferences ();
582 if (dump_file)
583 dump_conflicts (dump_file);
585 /* Try allocating them, one by one, in that order,
586 except for parameters marked with reg_live_length[regno] == -2. */
588 for (i = 0; i < (size_t) max_allocno; i++)
589 if (reg_renumber[allocno[allocno_order[i]].reg] < 0
590 && REG_LIVE_LENGTH (allocno[allocno_order[i]].reg) >= 0)
592 if (!dbg_cnt (global_alloc_at_reg))
593 break;
594 /* If we have more than one register class,
595 first try allocating in the class that is cheapest
596 for this pseudo-reg. If that fails, try any reg. */
597 if (N_REG_CLASSES > 1)
599 find_reg (allocno_order[i], 0, 0, 0, 0);
600 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
601 continue;
603 if (reg_alternate_class (allocno[allocno_order[i]].reg) != NO_REGS)
604 find_reg (allocno_order[i], 0, 1, 0, 0);
607 free (allocno_order);
608 free (conflicts);
611 /* Do the reloads now while the allocno data still exists, so that we can
612 try to assign new hard regs to any pseudo regs that are spilled. */
614 #if 0 /* We need to eliminate regs even if there is no rtl code,
615 for the sake of debugging information. */
616 if (n_basic_blocks > NUM_FIXED_BLOCKS)
617 #endif
619 build_insn_chain ();
620 retval = reload (get_insns (), 1);
623 /* Clean up. */
624 free (reg_allocno);
625 free (num_allocnos_per_blk);
626 free (partial_bitnum);
627 free (allocno);
628 if (adjacency != NULL)
630 free_alloc_pool (adjacency_pool);
631 free (adjacency);
634 return retval;
637 /* Sort predicate for ordering the regnos. We want the regno to allocno
638 mapping to have the property that all "global" regnos (ie, regnos that
639 are referenced in more than one basic block) have smaller allocno values
640 than "local" regnos (ie, regnos referenced in only one basic block).
641 In addition, for two basic blocks "i" and "j" with i < j, all regnos
642 local to basic block i should have smaller allocno values than regnos
643 local to basic block j.
644 Returns -1 (1) if *v1p should be allocated before (after) *v2p. */
646 static int
647 regno_compare (const void *v1p, const void *v2p)
649 int regno1 = *(const int *)v1p;
650 int regno2 = *(const int *)v2p;
651 int blk1 = REG_BASIC_BLOCK (regno1);
652 int blk2 = REG_BASIC_BLOCK (regno2);
654 /* Prefer lower numbered basic blocks. Note that global and unknown
655 blocks have negative values, giving them high precedence. */
656 if (blk1 - blk2)
657 return blk1 - blk2;
659 /* If both regs are referenced from the same block, sort by regno. */
660 return regno1 - regno2;
663 /* Sort predicate for ordering the allocnos.
664 Returns -1 (1) if *v1 should be allocated before (after) *v2. */
666 static int
667 allocno_compare (const void *v1p, const void *v2p)
669 int v1 = *(const int *)v1p, v2 = *(const int *)v2p;
670 /* Note that the quotient will never be bigger than
671 the value of floor_log2 times the maximum number of
672 times a register can occur in one insn (surely less than 100)
673 weighted by the frequency (maximally REG_FREQ_MAX).
674 Multiplying this by 10000/REG_FREQ_MAX can't overflow. */
675 int pri1
676 = (((double) (floor_log2 (allocno[v1].n_refs) * allocno[v1].freq)
677 / allocno[v1].live_length)
678 * (10000 / REG_FREQ_MAX) * allocno[v1].size);
679 int pri2
680 = (((double) (floor_log2 (allocno[v2].n_refs) * allocno[v2].freq)
681 / allocno[v2].live_length)
682 * (10000 / REG_FREQ_MAX) * allocno[v2].size);
683 if (pri2 - pri1)
684 return pri2 - pri1;
686 /* If regs are equally good, sort by allocno,
687 so that the results of qsort leave nothing to chance. */
688 return v1 - v2;
691 /* Expand the preference information by looking for cases where one allocno
692 dies in an insn that sets an allocno. If those two allocnos don't conflict,
693 merge any preferences between those allocnos. */
695 static void
696 expand_preferences (void)
698 rtx insn;
699 rtx link;
700 rtx set;
702 /* We only try to handle the most common cases here. Most of the cases
703 where this wins are reg-reg copies. */
705 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
706 if (INSN_P (insn)
707 && (set = single_set (insn)) != 0
708 && REG_P (SET_DEST (set))
709 && reg_allocno[REGNO (SET_DEST (set))] >= 0)
710 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
711 if (REG_NOTE_KIND (link) == REG_DEAD
712 && REG_P (XEXP (link, 0))
713 && reg_allocno[REGNO (XEXP (link, 0))] >= 0
714 && ! conflict_p (reg_allocno[REGNO (SET_DEST (set))],
715 reg_allocno[REGNO (XEXP (link, 0))]))
717 int a1 = reg_allocno[REGNO (SET_DEST (set))];
718 int a2 = reg_allocno[REGNO (XEXP (link, 0))];
720 if (XEXP (link, 0) == SET_SRC (set))
722 IOR_HARD_REG_SET (allocno[a1].hard_reg_copy_preferences,
723 allocno[a2].hard_reg_copy_preferences);
724 IOR_HARD_REG_SET (allocno[a2].hard_reg_copy_preferences,
725 allocno[a1].hard_reg_copy_preferences);
728 IOR_HARD_REG_SET (allocno[a1].hard_reg_preferences,
729 allocno[a2].hard_reg_preferences);
730 IOR_HARD_REG_SET (allocno[a2].hard_reg_preferences,
731 allocno[a1].hard_reg_preferences);
732 IOR_HARD_REG_SET (allocno[a1].hard_reg_full_preferences,
733 allocno[a2].hard_reg_full_preferences);
734 IOR_HARD_REG_SET (allocno[a2].hard_reg_full_preferences,
735 allocno[a1].hard_reg_full_preferences);
740 /* Try to set a preference for an allocno to a hard register.
741 We are passed DEST and SRC which are the operands of a SET. It is known
742 that SRC is a register. If SRC or the first operand of SRC is a register,
743 try to set a preference. If one of the two is a hard register and the other
744 is a pseudo-register, mark the preference.
746 Note that we are not as aggressive as local-alloc in trying to tie a
747 pseudo-register to a hard register. */
749 static void
750 set_preference (rtx dest, rtx src)
752 unsigned int src_regno, dest_regno, end_regno;
753 /* Amount to add to the hard regno for SRC, or subtract from that for DEST,
754 to compensate for subregs in SRC or DEST. */
755 int offset = 0;
756 unsigned int i;
757 int copy = 1;
759 if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e')
760 src = XEXP (src, 0), copy = 0;
762 /* Get the reg number for both SRC and DEST.
763 If neither is a reg, give up. */
765 if (REG_P (src))
766 src_regno = REGNO (src);
767 else if (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)))
769 src_regno = REGNO (SUBREG_REG (src));
771 if (REGNO (SUBREG_REG (src)) < FIRST_PSEUDO_REGISTER)
772 offset += subreg_regno_offset (REGNO (SUBREG_REG (src)),
773 GET_MODE (SUBREG_REG (src)),
774 SUBREG_BYTE (src),
775 GET_MODE (src));
776 else
777 offset += (SUBREG_BYTE (src)
778 / REGMODE_NATURAL_SIZE (GET_MODE (src)));
780 else
781 return;
783 if (REG_P (dest))
784 dest_regno = REGNO (dest);
785 else if (GET_CODE (dest) == SUBREG && REG_P (SUBREG_REG (dest)))
787 dest_regno = REGNO (SUBREG_REG (dest));
789 if (REGNO (SUBREG_REG (dest)) < FIRST_PSEUDO_REGISTER)
790 offset -= subreg_regno_offset (REGNO (SUBREG_REG (dest)),
791 GET_MODE (SUBREG_REG (dest)),
792 SUBREG_BYTE (dest),
793 GET_MODE (dest));
794 else
795 offset -= (SUBREG_BYTE (dest)
796 / REGMODE_NATURAL_SIZE (GET_MODE (dest)));
798 else
799 return;
801 /* Convert either or both to hard reg numbers. */
803 if (reg_renumber[src_regno] >= 0)
804 src_regno = reg_renumber[src_regno];
806 if (reg_renumber[dest_regno] >= 0)
807 dest_regno = reg_renumber[dest_regno];
809 /* Now if one is a hard reg and the other is a global pseudo
810 then give the other a preference. */
812 if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER
813 && reg_allocno[src_regno] >= 0)
815 dest_regno -= offset;
816 if (dest_regno < FIRST_PSEUDO_REGISTER)
818 if (copy)
819 SET_REGBIT (hard_reg_copy_preferences,
820 reg_allocno[src_regno], dest_regno);
822 SET_REGBIT (hard_reg_preferences,
823 reg_allocno[src_regno], dest_regno);
824 end_regno = end_hard_regno (GET_MODE (dest), dest_regno);
825 for (i = dest_regno; i < end_regno; i++)
826 SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i);
830 if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER
831 && reg_allocno[dest_regno] >= 0)
833 src_regno += offset;
834 if (src_regno < FIRST_PSEUDO_REGISTER)
836 if (copy)
837 SET_REGBIT (hard_reg_copy_preferences,
838 reg_allocno[dest_regno], src_regno);
840 SET_REGBIT (hard_reg_preferences,
841 reg_allocno[dest_regno], src_regno);
842 end_regno = end_hard_regno (GET_MODE (src), src_regno);
843 for (i = src_regno; i < end_regno; i++)
844 SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i);
849 /* Helper function for set_preferences. */
850 static void
851 set_preferences_1 (rtx reg, const_rtx setter, void *data ATTRIBUTE_UNUSED)
853 if (GET_CODE (reg) == SUBREG)
854 reg = SUBREG_REG (reg);
856 if (!REG_P (reg))
857 return;
859 gcc_assert (setter);
860 if (GET_CODE (setter) != CLOBBER)
861 set_preference (reg, SET_SRC (setter));
864 /* Scan all of the insns and initialize the preferences. */
866 static void
867 set_preferences (void)
869 basic_block bb;
870 rtx insn;
871 FOR_EACH_BB (bb)
872 FOR_BB_INSNS_REVERSE (bb, insn)
874 if (!INSN_P (insn))
875 continue;
877 note_stores (PATTERN (insn), set_preferences_1, NULL);
883 /* Prune the preferences for global registers to exclude registers that cannot
884 be used.
886 Compute `regs_someone_prefers', which is a bitmask of the hard registers
887 that are preferred by conflicting registers of lower priority. If possible,
888 we will avoid using these registers. */
890 static void
891 prune_preferences (void)
893 int i;
894 int num;
895 int *allocno_to_order = XNEWVEC (int, max_allocno);
897 /* Scan least most important to most important.
898 For each allocno, remove from preferences registers that cannot be used,
899 either because of conflicts or register type. Then compute all registers
900 preferred by each lower-priority register that conflicts. */
902 for (i = max_allocno - 1; i >= 0; i--)
904 HARD_REG_SET temp;
906 num = allocno_order[i];
907 allocno_to_order[num] = i;
908 COPY_HARD_REG_SET (temp, allocno[num].hard_reg_conflicts);
910 if (allocno[num].calls_crossed == 0)
911 IOR_HARD_REG_SET (temp, fixed_reg_set);
912 else
913 IOR_HARD_REG_SET (temp, call_used_reg_set);
915 IOR_COMPL_HARD_REG_SET
916 (temp,
917 reg_class_contents[(int) reg_preferred_class (allocno[num].reg)]);
919 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, temp);
920 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, temp);
921 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_full_preferences, temp);
924 for (i = max_allocno - 1; i >= 0; i--)
926 /* Merge in the preferences of lower-priority registers (they have
927 already been pruned). If we also prefer some of those registers,
928 don't exclude them unless we are of a smaller size (in which case
929 we want to give the lower-priority allocno the first chance for
930 these registers). */
931 HARD_REG_SET temp, temp2;
932 int allocno2;
933 adjacency_iter ai;
935 num = allocno_order[i];
937 CLEAR_HARD_REG_SET (temp);
938 CLEAR_HARD_REG_SET (temp2);
940 FOR_EACH_CONFLICT (num, allocno2, ai)
942 if (allocno_to_order[allocno2] > i)
944 if (allocno[allocno2].size <= allocno[num].size)
945 IOR_HARD_REG_SET (temp,
946 allocno[allocno2].hard_reg_full_preferences);
947 else
948 IOR_HARD_REG_SET (temp2,
949 allocno[allocno2].hard_reg_full_preferences);
953 AND_COMPL_HARD_REG_SET (temp, allocno[num].hard_reg_full_preferences);
954 IOR_HARD_REG_SET (temp, temp2);
955 COPY_HARD_REG_SET (allocno[num].regs_someone_prefers, temp);
957 free (allocno_to_order);
960 /* Assign a hard register to allocno NUM; look for one that is the beginning
961 of a long enough stretch of hard regs none of which conflicts with ALLOCNO.
962 The registers marked in PREFREGS are tried first.
964 LOSERS, if nonzero, is a HARD_REG_SET indicating registers that cannot
965 be used for this allocation.
967 If ALT_REGS_P is zero, consider only the preferred class of ALLOCNO's reg.
968 Otherwise ignore that preferred class and use the alternate class.
970 If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that
971 will have to be saved and restored at calls.
973 RETRYING is nonzero if this is called from retry_global_alloc.
975 If we find one, record it in reg_renumber.
976 If not, do nothing. */
978 static void
979 find_reg (int num, HARD_REG_SET losers, int alt_regs_p, int accept_call_clobbered, int retrying)
981 int i, best_reg, pass;
982 HARD_REG_SET used, used1, used2;
984 enum reg_class rclass = (alt_regs_p
985 ? reg_alternate_class (allocno[num].reg)
986 : reg_preferred_class (allocno[num].reg));
987 enum machine_mode mode = PSEUDO_REGNO_MODE (allocno[num].reg);
989 if (accept_call_clobbered)
990 COPY_HARD_REG_SET (used1, call_fixed_reg_set);
991 else if (allocno[num].calls_crossed == 0)
992 COPY_HARD_REG_SET (used1, fixed_reg_set);
993 else
994 COPY_HARD_REG_SET (used1, call_used_reg_set);
996 /* Some registers should not be allocated in global-alloc. */
997 IOR_HARD_REG_SET (used1, no_global_alloc_regs);
998 if (losers)
999 IOR_HARD_REG_SET (used1, losers);
1001 IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) rclass]);
1003 #ifdef EH_RETURN_DATA_REGNO
1004 if (allocno[num].no_eh_reg)
1006 unsigned int j;
1007 for (j = 0; ; ++j)
1009 unsigned int regno = EH_RETURN_DATA_REGNO (j);
1010 if (regno == INVALID_REGNUM)
1011 break;
1012 SET_HARD_REG_BIT (used1, regno);
1015 #endif
1017 COPY_HARD_REG_SET (used2, used1);
1019 IOR_HARD_REG_SET (used1, allocno[num].hard_reg_conflicts);
1021 #ifdef CANNOT_CHANGE_MODE_CLASS
1022 cannot_change_mode_set_regs (&used1, mode, allocno[num].reg);
1023 #endif
1025 /* Try each hard reg to see if it fits. Do this in two passes.
1026 In the first pass, skip registers that are preferred by some other pseudo
1027 to give it a better chance of getting one of those registers. Only if
1028 we can't get a register when excluding those do we take one of them.
1029 However, we never allocate a register for the first time in pass 0. */
1031 COPY_HARD_REG_SET (used, used1);
1032 IOR_COMPL_HARD_REG_SET (used, regs_used_so_far);
1033 IOR_HARD_REG_SET (used, allocno[num].regs_someone_prefers);
1035 best_reg = -1;
1036 for (i = FIRST_PSEUDO_REGISTER, pass = 0;
1037 pass <= 1 && i >= FIRST_PSEUDO_REGISTER;
1038 pass++)
1040 if (pass == 1)
1041 COPY_HARD_REG_SET (used, used1);
1042 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1044 #ifdef REG_ALLOC_ORDER
1045 int regno = reg_alloc_order[i];
1046 #else
1047 int regno = i;
1048 #endif
1049 if (! TEST_HARD_REG_BIT (used, regno)
1050 && HARD_REGNO_MODE_OK (regno, mode)
1051 && (allocno[num].calls_crossed == 0
1052 || accept_call_clobbered
1053 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
1055 int j;
1056 int lim = end_hard_regno (mode, regno);
1057 for (j = regno + 1;
1058 (j < lim
1059 && ! TEST_HARD_REG_BIT (used, j));
1060 j++);
1061 if (j == lim)
1063 best_reg = regno;
1064 break;
1066 #ifndef REG_ALLOC_ORDER
1067 i = j; /* Skip starting points we know will lose */
1068 #endif
1073 /* See if there is a preferred register with the same class as the register
1074 we allocated above. Making this restriction prevents register
1075 preferencing from creating worse register allocation.
1077 Remove from the preferred registers and conflicting registers. Note that
1078 additional conflicts may have been added after `prune_preferences' was
1079 called.
1081 First do this for those register with copy preferences, then all
1082 preferred registers. */
1084 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, used);
1085 if (!hard_reg_set_empty_p (allocno[num].hard_reg_copy_preferences)
1086 && best_reg >= 0)
1088 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1089 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_copy_preferences, i)
1090 && HARD_REGNO_MODE_OK (i, mode)
1091 && (allocno[num].calls_crossed == 0
1092 || accept_call_clobbered
1093 || ! HARD_REGNO_CALL_PART_CLOBBERED (i, mode))
1094 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1095 || reg_class_subset_p (REGNO_REG_CLASS (i),
1096 REGNO_REG_CLASS (best_reg))
1097 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1098 REGNO_REG_CLASS (i))))
1100 int j;
1101 int lim = end_hard_regno (mode, i);
1102 for (j = i + 1;
1103 (j < lim
1104 && ! TEST_HARD_REG_BIT (used, j)
1105 && (REGNO_REG_CLASS (j)
1106 == REGNO_REG_CLASS (best_reg + (j - i))
1107 || reg_class_subset_p (REGNO_REG_CLASS (j),
1108 REGNO_REG_CLASS (best_reg + (j - i)))
1109 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1110 REGNO_REG_CLASS (j))));
1111 j++);
1112 if (j == lim)
1114 best_reg = i;
1115 goto no_prefs;
1120 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, used);
1121 if (!hard_reg_set_empty_p (allocno[num].hard_reg_preferences)
1122 && best_reg >= 0)
1124 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1125 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_preferences, i)
1126 && HARD_REGNO_MODE_OK (i, mode)
1127 && (allocno[num].calls_crossed == 0
1128 || accept_call_clobbered
1129 || ! HARD_REGNO_CALL_PART_CLOBBERED (i, mode))
1130 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1131 || reg_class_subset_p (REGNO_REG_CLASS (i),
1132 REGNO_REG_CLASS (best_reg))
1133 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1134 REGNO_REG_CLASS (i))))
1136 int j;
1137 int lim = end_hard_regno (mode, i);
1138 for (j = i + 1;
1139 (j < lim
1140 && ! TEST_HARD_REG_BIT (used, j)
1141 && (REGNO_REG_CLASS (j)
1142 == REGNO_REG_CLASS (best_reg + (j - i))
1143 || reg_class_subset_p (REGNO_REG_CLASS (j),
1144 REGNO_REG_CLASS (best_reg + (j - i)))
1145 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1146 REGNO_REG_CLASS (j))));
1147 j++);
1148 if (j == lim)
1150 best_reg = i;
1151 break;
1155 no_prefs:
1157 /* If we haven't succeeded yet, try with caller-saves.
1158 We need not check to see if the current function has nonlocal
1159 labels because we don't put any pseudos that are live over calls in
1160 registers in that case. */
1162 if (flag_caller_saves && best_reg < 0)
1164 /* Did not find a register. If it would be profitable to
1165 allocate a call-clobbered register and save and restore it
1166 around calls, do that. Don't do this if it crosses any calls
1167 that might throw. */
1168 if (! accept_call_clobbered
1169 && allocno[num].calls_crossed != 0
1170 && allocno[num].throwing_calls_crossed == 0
1171 && CALLER_SAVE_PROFITABLE (optimize_function_for_size_p (cfun) ? allocno[num].n_refs : allocno[num].freq,
1172 optimize_function_for_size_p (cfun) ? allocno[num].calls_crossed
1173 : allocno[num].freq_calls_crossed))
1175 HARD_REG_SET new_losers;
1176 if (! losers)
1177 CLEAR_HARD_REG_SET (new_losers);
1178 else
1179 COPY_HARD_REG_SET (new_losers, losers);
1181 IOR_HARD_REG_SET(new_losers, losing_caller_save_reg_set);
1182 find_reg (num, new_losers, alt_regs_p, 1, retrying);
1183 if (reg_renumber[allocno[num].reg] >= 0)
1185 caller_save_needed = 1;
1186 return;
1191 /* If we haven't succeeded yet,
1192 see if some hard reg that conflicts with us
1193 was utilized poorly by local-alloc.
1194 If so, kick out the regs that were put there by local-alloc
1195 so we can use it instead. */
1196 if (best_reg < 0 && !retrying
1197 /* Let's not bother with multi-reg allocnos. */
1198 && allocno[num].size == 1
1199 && REG_BASIC_BLOCK (allocno[num].reg) == REG_BLOCK_GLOBAL)
1201 /* Count from the end, to find the least-used ones first. */
1202 for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
1204 #ifdef REG_ALLOC_ORDER
1205 int regno = reg_alloc_order[i];
1206 #else
1207 int regno = i;
1208 #endif
1210 if (local_reg_n_refs[regno] != 0
1211 /* Don't use a reg no good for this pseudo. */
1212 && ! TEST_HARD_REG_BIT (used2, regno)
1213 && HARD_REGNO_MODE_OK (regno, mode)
1214 /* The code below assumes that we need only a single
1215 register, but the check of allocno[num].size above
1216 was not enough. Sometimes we need more than one
1217 register for a single-word value. */
1218 && hard_regno_nregs[regno][mode] == 1
1219 && (allocno[num].calls_crossed == 0
1220 || accept_call_clobbered
1221 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
1222 #ifdef CANNOT_CHANGE_MODE_CLASS
1223 && ! invalid_mode_change_p (regno, REGNO_REG_CLASS (regno),
1224 mode)
1225 #endif
1226 #ifdef STACK_REGS
1227 && (!allocno[num].no_stack_reg
1228 || regno < FIRST_STACK_REG || regno > LAST_STACK_REG)
1229 #endif
1232 /* We explicitly evaluate the divide results into temporary
1233 variables so as to avoid excess precision problems that occur
1234 on an i386-unknown-sysv4.2 (unixware) host. */
1236 double tmp1 = ((double) local_reg_freq[regno] * local_reg_n_refs[regno]
1237 / local_reg_live_length[regno]);
1238 double tmp2 = ((double) allocno[num].freq * allocno[num].n_refs
1239 / allocno[num].live_length);
1241 if (tmp1 < tmp2)
1243 /* Hard reg REGNO was used less in total by local regs
1244 than it would be used by this one allocno! */
1245 int k;
1246 if (dump_file)
1248 fprintf (dump_file, "Regno %d better for global %d, ",
1249 regno, allocno[num].reg);
1250 fprintf (dump_file, "fr:%d, ll:%d, nr:%d ",
1251 allocno[num].freq, allocno[num].live_length,
1252 allocno[num].n_refs);
1253 fprintf (dump_file, "(was: fr:%d, ll:%d, nr:%d)\n",
1254 local_reg_freq[regno],
1255 local_reg_live_length[regno],
1256 local_reg_n_refs[regno]);
1259 for (k = 0; k < max_regno; k++)
1260 if (reg_renumber[k] >= 0)
1262 int r = reg_renumber[k];
1263 int endregno
1264 = end_hard_regno (PSEUDO_REGNO_MODE (k), r);
1266 if (regno >= r && regno < endregno)
1268 if (dump_file)
1269 fprintf (dump_file,
1270 "Local Reg %d now on stack\n", k);
1271 reg_renumber[k] = -1;
1275 best_reg = regno;
1276 break;
1282 /* Did we find a register? */
1284 if (best_reg >= 0)
1286 int lim, j;
1287 HARD_REG_SET this_reg;
1288 adjacency_iter ai;
1290 /* Yes. Record it as the hard register of this pseudo-reg. */
1291 reg_renumber[allocno[num].reg] = best_reg;
1293 /* Make a set of the hard regs being allocated. */
1294 CLEAR_HARD_REG_SET (this_reg);
1295 lim = end_hard_regno (mode, best_reg);
1296 for (j = best_reg; j < lim; j++)
1298 SET_HARD_REG_BIT (this_reg, j);
1299 SET_HARD_REG_BIT (regs_used_so_far, j);
1300 /* This is no longer a reg used just by local regs. */
1301 local_reg_n_refs[j] = 0;
1302 local_reg_freq[j] = 0;
1304 /* For each other pseudo-reg conflicting with this one,
1305 mark it as conflicting with the hard regs this one occupies. */
1306 FOR_EACH_CONFLICT (num, j, ai)
1308 IOR_HARD_REG_SET (allocno[j].hard_reg_conflicts, this_reg);
1313 /* Called from `reload' to look for a hard reg to put pseudo reg REGNO in.
1314 Perhaps it had previously seemed not worth a hard reg,
1315 or perhaps its old hard reg has been commandeered for reloads.
1316 FORBIDDEN_REGS indicates certain hard regs that may not be used, even if
1317 they do not appear to be allocated.
1318 If FORBIDDEN_REGS is zero, no regs are forbidden. */
1320 void
1321 retry_global_alloc (int regno, HARD_REG_SET forbidden_regs)
1323 int alloc_no = reg_allocno[regno];
1324 if (alloc_no >= 0)
1326 /* If we have more than one register class,
1327 first try allocating in the class that is cheapest
1328 for this pseudo-reg. If that fails, try any reg. */
1329 if (N_REG_CLASSES > 1)
1330 find_reg (alloc_no, forbidden_regs, 0, 0, 1);
1331 if (reg_renumber[regno] < 0
1332 && reg_alternate_class (regno) != NO_REGS)
1333 find_reg (alloc_no, forbidden_regs, 1, 0, 1);
1335 /* If we found a register, modify the RTL for the register to
1336 show the hard register, and mark that register live. */
1337 if (reg_renumber[regno] >= 0)
1339 SET_REGNO (regno_reg_rtx[regno], reg_renumber[regno]);
1340 mark_home_live (regno);
1345 /* Indicate that hard register number FROM was eliminated and replaced with
1346 an offset from hard register number TO. The status of hard registers live
1347 at the start of a basic block is updated by replacing a use of FROM with
1348 a use of TO. */
1350 void
1351 mark_elimination (int from, int to)
1353 basic_block bb;
1355 FOR_EACH_BB (bb)
1357 /* We don't use LIVE info in IRA. */
1358 regset r = (flag_ira ? DF_LR_IN (bb) : DF_LIVE_IN (bb));
1359 if (REGNO_REG_SET_P (r, from))
1361 CLEAR_REGNO_REG_SET (r, from);
1362 SET_REGNO_REG_SET (r, to);
1367 /* Print chain C to FILE. */
1369 static void
1370 print_insn_chain (FILE *file, struct insn_chain *c)
1372 fprintf (file, "insn=%d, ", INSN_UID(c->insn));
1373 bitmap_print (file, &c->live_throughout, "live_throughout: ", ", ");
1374 bitmap_print (file, &c->dead_or_set, "dead_or_set: ", "\n");
1378 /* Print all reload_insn_chains to FILE. */
1380 static void
1381 print_insn_chains (FILE *file)
1383 struct insn_chain *c;
1384 for (c = reload_insn_chain; c ; c = c->next)
1385 print_insn_chain (file, c);
1388 /* Return true if pseudo REGNO should be added to set live_throughout
1389 or dead_or_set of the insn chains for reload consideration. */
1391 static bool
1392 pseudo_for_reload_consideration_p (int regno)
1394 /* Consider spilled pseudos too for IRA because they still have a
1395 chance to get hard-registers in the reload when IRA is used. */
1396 return (reg_renumber[regno] >= 0
1397 || (flag_ira && optimize && flag_ira_share_spill_slots));
1400 /* Walk the insns of the current function and build reload_insn_chain,
1401 and record register life information. */
1403 void
1404 build_insn_chain (void)
1406 unsigned int i;
1407 struct insn_chain **p = &reload_insn_chain;
1408 basic_block bb;
1409 struct insn_chain *c = NULL;
1410 struct insn_chain *next = NULL;
1411 bitmap live_relevant_regs = BITMAP_ALLOC (NULL);
1412 bitmap elim_regset = BITMAP_ALLOC (NULL);
1413 /* live_subregs is a vector used to keep accurate information about
1414 which hardregs are live in multiword pseudos. live_subregs and
1415 live_subregs_used are indexed by pseudo number. The live_subreg
1416 entry for a particular pseudo is only used if the corresponding
1417 element is non zero in live_subregs_used. The value in
1418 live_subregs_used is number of bytes that the pseudo can
1419 occupy. */
1420 sbitmap *live_subregs = XCNEWVEC (sbitmap, max_regno);
1421 int *live_subregs_used = XNEWVEC (int, max_regno);
1423 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1424 if (TEST_HARD_REG_BIT (eliminable_regset, i))
1425 bitmap_set_bit (elim_regset, i);
1426 FOR_EACH_BB_REVERSE (bb)
1428 bitmap_iterator bi;
1429 rtx insn;
1431 CLEAR_REG_SET (live_relevant_regs);
1432 memset (live_subregs_used, 0, max_regno * sizeof (int));
1434 EXECUTE_IF_SET_IN_BITMAP (df_get_live_out (bb), 0, i, bi)
1436 if (i >= FIRST_PSEUDO_REGISTER)
1437 break;
1438 bitmap_set_bit (live_relevant_regs, i);
1441 EXECUTE_IF_SET_IN_BITMAP (df_get_live_out (bb), FIRST_PSEUDO_REGISTER, i, bi)
1443 if (pseudo_for_reload_consideration_p (i))
1444 bitmap_set_bit (live_relevant_regs, i);
1447 FOR_BB_INSNS_REVERSE (bb, insn)
1449 if (!NOTE_P (insn) && !BARRIER_P (insn))
1451 unsigned int uid = INSN_UID (insn);
1452 df_ref *def_rec;
1453 df_ref *use_rec;
1455 c = new_insn_chain ();
1456 c->next = next;
1457 next = c;
1458 *p = c;
1459 p = &c->prev;
1461 c->insn = insn;
1462 c->block = bb->index;
1464 if (INSN_P (insn))
1465 for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
1467 df_ref def = *def_rec;
1468 unsigned int regno = DF_REF_REGNO (def);
1470 /* Ignore may clobbers because these are generated
1471 from calls. However, every other kind of def is
1472 added to dead_or_set. */
1473 if (!DF_REF_FLAGS_IS_SET (def, DF_REF_MAY_CLOBBER))
1475 if (regno < FIRST_PSEUDO_REGISTER)
1477 if (!fixed_regs[regno])
1478 bitmap_set_bit (&c->dead_or_set, regno);
1480 else if (pseudo_for_reload_consideration_p (regno))
1481 bitmap_set_bit (&c->dead_or_set, regno);
1484 if ((regno < FIRST_PSEUDO_REGISTER
1485 || reg_renumber[regno] >= 0
1486 || (flag_ira && optimize))
1487 && (!DF_REF_FLAGS_IS_SET (def, DF_REF_CONDITIONAL)))
1489 rtx reg = DF_REF_REG (def);
1491 /* We can model subregs, but not if they are
1492 wrapped in ZERO_EXTRACTS. */
1493 if (GET_CODE (reg) == SUBREG
1494 && !DF_REF_FLAGS_IS_SET (def, DF_REF_ZERO_EXTRACT))
1496 unsigned int start = SUBREG_BYTE (reg);
1497 unsigned int last = start
1498 + GET_MODE_SIZE (GET_MODE (reg));
1500 ra_init_live_subregs (bitmap_bit_p (live_relevant_regs,
1501 regno),
1502 live_subregs,
1503 live_subregs_used,
1504 regno, reg);
1506 if (!DF_REF_FLAGS_IS_SET
1507 (def, DF_REF_STRICT_LOW_PART))
1509 /* Expand the range to cover entire words.
1510 Bytes added here are "don't care". */
1511 start = start / UNITS_PER_WORD * UNITS_PER_WORD;
1512 last = ((last + UNITS_PER_WORD - 1)
1513 / UNITS_PER_WORD * UNITS_PER_WORD);
1516 /* Ignore the paradoxical bits. */
1517 if ((int)last > live_subregs_used[regno])
1518 last = live_subregs_used[regno];
1520 while (start < last)
1522 RESET_BIT (live_subregs[regno], start);
1523 start++;
1526 if (sbitmap_empty_p (live_subregs[regno]))
1528 live_subregs_used[regno] = 0;
1529 bitmap_clear_bit (live_relevant_regs, regno);
1531 else
1532 /* Set live_relevant_regs here because
1533 that bit has to be true to get us to
1534 look at the live_subregs fields. */
1535 bitmap_set_bit (live_relevant_regs, regno);
1537 else
1539 /* DF_REF_PARTIAL is generated for
1540 subregs, STRICT_LOW_PART, and
1541 ZERO_EXTRACT. We handle the subreg
1542 case above so here we have to keep from
1543 modeling the def as a killing def. */
1544 if (!DF_REF_FLAGS_IS_SET (def, DF_REF_PARTIAL))
1546 bitmap_clear_bit (live_relevant_regs, regno);
1547 live_subregs_used[regno] = 0;
1553 bitmap_and_compl_into (live_relevant_regs, elim_regset);
1554 bitmap_copy (&c->live_throughout, live_relevant_regs);
1556 if (INSN_P (insn))
1557 for (use_rec = DF_INSN_UID_USES (uid); *use_rec; use_rec++)
1559 df_ref use = *use_rec;
1560 unsigned int regno = DF_REF_REGNO (use);
1561 rtx reg = DF_REF_REG (use);
1563 /* DF_REF_READ_WRITE on a use means that this use
1564 is fabricated from a def that is a partial set
1565 to a multiword reg. Here, we only model the
1566 subreg case that is not wrapped in ZERO_EXTRACT
1567 precisely so we do not need to look at the
1568 fabricated use. */
1569 if (DF_REF_FLAGS_IS_SET (use, DF_REF_READ_WRITE)
1570 && !DF_REF_FLAGS_IS_SET (use, DF_REF_ZERO_EXTRACT)
1571 && DF_REF_FLAGS_IS_SET (use, DF_REF_SUBREG))
1572 continue;
1574 /* Add the last use of each var to dead_or_set. */
1575 if (!bitmap_bit_p (live_relevant_regs, regno))
1577 if (regno < FIRST_PSEUDO_REGISTER)
1579 if (!fixed_regs[regno])
1580 bitmap_set_bit (&c->dead_or_set, regno);
1582 else if (pseudo_for_reload_consideration_p (regno))
1583 bitmap_set_bit (&c->dead_or_set, regno);
1586 if (regno < FIRST_PSEUDO_REGISTER
1587 || pseudo_for_reload_consideration_p (regno))
1589 if (GET_CODE (reg) == SUBREG
1590 && !DF_REF_FLAGS_IS_SET (use,
1591 DF_REF_SIGN_EXTRACT | DF_REF_ZERO_EXTRACT))
1593 unsigned int start = SUBREG_BYTE (reg);
1594 unsigned int last = start
1595 + GET_MODE_SIZE (GET_MODE (reg));
1597 ra_init_live_subregs (bitmap_bit_p (live_relevant_regs,
1598 regno),
1599 live_subregs,
1600 live_subregs_used,
1601 regno, reg);
1603 /* Ignore the paradoxical bits. */
1604 if ((int)last > live_subregs_used[regno])
1605 last = live_subregs_used[regno];
1607 while (start < last)
1609 SET_BIT (live_subregs[regno], start);
1610 start++;
1613 else
1614 /* Resetting the live_subregs_used is
1615 effectively saying do not use the subregs
1616 because we are reading the whole
1617 pseudo. */
1618 live_subregs_used[regno] = 0;
1619 bitmap_set_bit (live_relevant_regs, regno);
1625 /* FIXME!! The following code is a disaster. Reload needs to see the
1626 labels and jump tables that are just hanging out in between
1627 the basic blocks. See pr33676. */
1628 insn = BB_HEAD (bb);
1630 /* Skip over the barriers and cruft. */
1631 while (insn && (BARRIER_P (insn) || NOTE_P (insn)
1632 || BLOCK_FOR_INSN (insn) == bb))
1633 insn = PREV_INSN (insn);
1635 /* While we add anything except barriers and notes, the focus is
1636 to get the labels and jump tables into the
1637 reload_insn_chain. */
1638 while (insn)
1640 if (!NOTE_P (insn) && !BARRIER_P (insn))
1642 if (BLOCK_FOR_INSN (insn))
1643 break;
1645 c = new_insn_chain ();
1646 c->next = next;
1647 next = c;
1648 *p = c;
1649 p = &c->prev;
1651 /* The block makes no sense here, but it is what the old
1652 code did. */
1653 c->block = bb->index;
1654 c->insn = insn;
1655 bitmap_copy (&c->live_throughout, live_relevant_regs);
1657 insn = PREV_INSN (insn);
1661 for (i = 0; i < (unsigned int) max_regno; i++)
1662 if (live_subregs[i])
1663 free (live_subregs[i]);
1665 reload_insn_chain = c;
1666 *p = NULL;
1668 free (live_subregs);
1669 free (live_subregs_used);
1670 BITMAP_FREE (live_relevant_regs);
1671 BITMAP_FREE (elim_regset);
1673 if (dump_file)
1674 print_insn_chains (dump_file);
1677 /* Print debugging trace information if -dg switch is given,
1678 showing the information on which the allocation decisions are based. */
1680 static void
1681 dump_conflicts (FILE *file)
1683 int i;
1684 int regno;
1685 int has_preferences;
1686 int nregs;
1687 nregs = 0;
1688 for (i = 0; i < max_allocno; i++)
1690 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
1691 continue;
1692 nregs++;
1694 fprintf (file, ";; %d regs to allocate:", nregs);
1695 for (regno = 0; regno < max_regno; regno++)
1696 if ((i = reg_allocno[regno]) >= 0)
1698 int j;
1699 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
1700 continue;
1701 fprintf (file, " %d", allocno[allocno_order[i]].reg);
1702 for (j = 0; j < max_regno; j++)
1703 if (reg_allocno[j] == allocno_order[i]
1704 && j != allocno[allocno_order[i]].reg)
1705 fprintf (file, "+%d", j);
1706 if (allocno[allocno_order[i]].size != 1)
1707 fprintf (file, " (%d)", allocno[allocno_order[i]].size);
1709 fprintf (file, "\n");
1711 for (regno = 0; regno < max_regno; regno++)
1712 if ((i = reg_allocno[regno]) >= 0)
1714 int j;
1715 adjacency_iter ai;
1716 fprintf (file, ";; %d conflicts:", allocno[i].reg);
1717 FOR_EACH_CONFLICT (i, j, ai)
1719 fprintf (file, " %d", allocno[j].reg);
1721 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1722 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_conflicts, j)
1723 && !fixed_regs[j])
1724 fprintf (file, " %d", j);
1725 fprintf (file, "\n");
1727 has_preferences = 0;
1728 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1729 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
1730 has_preferences = 1;
1732 if (!has_preferences)
1733 continue;
1734 fprintf (file, ";; %d preferences:", allocno[i].reg);
1735 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1736 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
1737 fprintf (file, " %d", j);
1738 fprintf (file, "\n");
1740 fprintf (file, "\n");
1743 void
1744 dump_global_regs (FILE *file)
1746 int i, j;
1748 fprintf (file, ";; Register dispositions:\n");
1749 for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++)
1750 if (reg_renumber[i] >= 0)
1752 fprintf (file, "%d in %d ", i, reg_renumber[i]);
1753 if (++j % 6 == 0)
1754 fprintf (file, "\n");
1757 fprintf (file, "\n\n;; Hard regs used: ");
1758 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1759 if (df_regs_ever_live_p (i))
1760 fprintf (file, " %d", i);
1761 fprintf (file, "\n\n");
1765 static bool
1766 gate_handle_global_alloc (void)
1768 return ! flag_ira;
1771 /* Run old register allocator. Return TRUE if we must exit
1772 rest_of_compilation upon return. */
1773 static unsigned int
1774 rest_of_handle_global_alloc (void)
1776 bool failure;
1778 /* If optimizing, allocate remaining pseudo-regs. Do the reload
1779 pass fixing up any insns that are invalid. */
1780 if (optimize && dbg_cnt (global_alloc_at_func))
1781 failure = global_alloc ();
1782 else
1784 /* There is just too much going on in the register allocators to
1785 keep things up to date. At the end we have to rescan anyway
1786 because things change when the reload_completed flag is set.
1787 So we just turn off scanning and we will rescan by hand. */
1788 df_set_flags (DF_NO_INSN_RESCAN);
1789 compute_regsets (&eliminable_regset, &no_global_alloc_regs);
1790 build_insn_chain ();
1791 df_set_flags (DF_NO_INSN_RESCAN);
1792 failure = reload (get_insns (), 0);
1795 if (dump_enabled_p (pass_global_alloc.pass.static_pass_number))
1797 timevar_push (TV_DUMP);
1798 dump_global_regs (dump_file);
1799 timevar_pop (TV_DUMP);
1802 /* FIXME: This appears on the surface to be wrong thing to be doing.
1803 So much of the compiler is designed to check reload_completed to
1804 see if it is running after reload that seems doomed to failure.
1805 We should be returning a value that says that we have found
1806 errors so that nothing but the cleanup passes are run
1807 afterwards. */
1808 gcc_assert (reload_completed || failure);
1809 reload_completed = !failure;
1811 /* The world has changed so much that at this point we might as well
1812 just rescan everything. Note that df_rescan_all_insns is not
1813 going to help here because it does not touch the artificial uses
1814 and defs. */
1815 df_finish_pass (true);
1816 if (optimize > 1)
1817 df_live_add_problem ();
1818 df_scan_alloc (NULL);
1819 df_scan_blocks ();
1821 if (optimize)
1822 df_analyze ();
1824 regstat_free_n_sets_and_refs ();
1825 regstat_free_ri ();
1826 return 0;
1829 struct rtl_opt_pass pass_global_alloc =
1832 RTL_PASS,
1833 "greg", /* name */
1834 gate_handle_global_alloc, /* gate */
1835 rest_of_handle_global_alloc, /* execute */
1836 NULL, /* sub */
1837 NULL, /* next */
1838 0, /* static_pass_number */
1839 TV_GLOBAL_ALLOC, /* tv_id */
1840 0, /* properties_required */
1841 0, /* properties_provided */
1842 0, /* properties_destroyed */
1843 0, /* todo_flags_start */
1844 TODO_dump_func | TODO_verify_rtl_sharing
1845 | TODO_ggc_collect /* todo_flags_finish */