1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
27 #include "insn-config.h"
29 #include "hard-reg-set.h"
31 #include "basic-block.h"
37 #include "addresses.h"
42 /* Call used hard registers which can not be saved because there is no
44 HARD_REG_SET no_caller_save_reg_set
;
47 #define MAX_MOVE_MAX MOVE_MAX
50 #ifndef MIN_UNITS_PER_WORD
51 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
54 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
56 /* Modes for each hard register that we can save. The smallest mode is wide
57 enough to save the entire contents of the register. When saving the
58 register because it is live we first try to save in multi-register modes.
59 If that is not possible the save is done one register at a time. */
61 static enum machine_mode
62 regno_save_mode
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
64 /* For each hard register, a place on the stack where it can be saved,
68 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
70 /* The number of elements in the subsequent array. */
71 static int save_slots_num
;
73 /* Allocated slots so far. */
74 static rtx save_slots
[FIRST_PSEUDO_REGISTER
];
76 /* We will only make a register eligible for caller-save if it can be
77 saved in its widest mode with a simple SET insn as long as the memory
78 address is valid. We record the INSN_CODE is those insns here since
79 when we emit them, the addresses might not be valid, so they might not
83 cached_reg_save_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
85 cached_reg_restore_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
87 /* Set of hard regs currently residing in save area (during insn scan). */
89 static HARD_REG_SET hard_regs_saved
;
91 /* Number of registers currently in hard_regs_saved. */
93 static int n_regs_saved
;
95 /* Computed by mark_referenced_regs, all regs referenced in a given
97 static HARD_REG_SET referenced_regs
;
100 static int reg_save_code (int, enum machine_mode
);
101 static int reg_restore_code (int, enum machine_mode
);
103 struct saved_hard_reg
;
104 static void initiate_saved_hard_regs (void);
105 static struct saved_hard_reg
*new_saved_hard_reg (int, int);
106 static void finish_saved_hard_regs (void);
107 static int saved_hard_reg_compare_func (const void *, const void *);
109 static void mark_set_regs (rtx
, const_rtx
, void *);
110 static void add_stored_regs (rtx
, const_rtx
, void *);
111 static void mark_referenced_regs (rtx
);
112 static int insert_save (struct insn_chain
*, int, int, HARD_REG_SET
*,
113 enum machine_mode
*);
114 static int insert_restore (struct insn_chain
*, int, int, int,
115 enum machine_mode
*);
116 static struct insn_chain
*insert_one_insn (struct insn_chain
*, int, int,
118 static void add_stored_regs (rtx
, const_rtx
, void *);
122 static GTY(()) rtx savepat
;
123 static GTY(()) rtx restpat
;
124 static GTY(()) rtx test_reg
;
125 static GTY(()) rtx test_mem
;
126 static GTY(()) rtx saveinsn
;
127 static GTY(()) rtx restinsn
;
129 /* Return the INSN_CODE used to save register REG in mode MODE. */
131 reg_save_code (int reg
, enum machine_mode mode
)
134 if (cached_reg_save_code
[reg
][mode
])
135 return cached_reg_save_code
[reg
][mode
];
136 if (!HARD_REGNO_MODE_OK (reg
, mode
))
138 cached_reg_save_code
[reg
][mode
] = -1;
139 cached_reg_restore_code
[reg
][mode
] = -1;
143 /* Update the register number and modes of the register
144 and memory operand. */
145 SET_REGNO (test_reg
, reg
);
146 PUT_MODE (test_reg
, mode
);
147 PUT_MODE (test_mem
, mode
);
149 /* Force re-recognition of the modified insns. */
150 INSN_CODE (saveinsn
) = -1;
151 INSN_CODE (restinsn
) = -1;
153 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
154 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
156 /* Now extract both insns and see if we can meet their
158 ok
= (cached_reg_save_code
[reg
][mode
] != -1
159 && cached_reg_restore_code
[reg
][mode
] != -1);
162 extract_insn (saveinsn
);
163 ok
= constrain_operands (1);
164 extract_insn (restinsn
);
165 ok
&= constrain_operands (1);
170 cached_reg_save_code
[reg
][mode
] = -1;
171 cached_reg_restore_code
[reg
][mode
] = -1;
173 gcc_assert (cached_reg_save_code
[reg
][mode
]);
174 return cached_reg_save_code
[reg
][mode
];
177 /* Return the INSN_CODE used to restore register REG in mode MODE. */
179 reg_restore_code (int reg
, enum machine_mode mode
)
181 if (cached_reg_restore_code
[reg
][mode
])
182 return cached_reg_restore_code
[reg
][mode
];
183 /* Populate our cache. */
184 reg_save_code (reg
, mode
);
185 return cached_reg_restore_code
[reg
][mode
];
188 /* Initialize for caller-save.
190 Look at all the hard registers that are used by a call and for which
191 regclass.c has not already excluded from being used across a call.
193 Ensure that we can find a mode to save the register and that there is a
194 simple insn to save and restore the register. This latter check avoids
195 problems that would occur if we tried to save the MQ register of some
196 machines directly into memory. */
199 init_caller_save (void)
206 CLEAR_HARD_REG_SET (no_caller_save_reg_set
);
207 /* First find all the registers that we need to deal with and all
208 the modes that they can have. If we can't find a mode to use,
209 we can't have the register live over calls. */
211 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
213 if (call_used_regs
[i
] && ! call_fixed_regs
[i
])
215 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
217 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
,
219 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
221 call_fixed_regs
[i
] = 1;
222 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
227 regno_save_mode
[i
][1] = VOIDmode
;
230 /* The following code tries to approximate the conditions under which
231 we can easily save and restore a register without scratch registers or
232 other complexities. It will usually work, except under conditions where
233 the validity of an insn operand is dependent on the address offset.
234 No such cases are currently known.
236 We first find a typical offset from some BASE_REG_CLASS register.
237 This address is chosen by finding the first register in the class
238 and by finding the smallest power of two that is a valid offset from
239 that register in every mode we will use to save registers. */
241 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
242 if (TEST_HARD_REG_BIT
244 [(int) base_reg_class (regno_save_mode
[i
][1], PLUS
, CONST_INT
)], i
))
247 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
249 addr_reg
= gen_rtx_REG (Pmode
, i
);
251 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
253 address
= gen_rtx_PLUS (Pmode
, addr_reg
, GEN_INT (offset
));
255 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
256 if (regno_save_mode
[i
][1] != VOIDmode
257 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
260 if (i
== FIRST_PSEUDO_REGISTER
)
264 /* If we didn't find a valid address, we must use register indirect. */
268 /* Next we try to form an insn to save and restore the register. We
269 see if such an insn is recognized and meets its constraints.
271 To avoid lots of unnecessary RTL allocation, we construct all the RTL
272 once, then modify the memory and register operands in-place. */
274 test_reg
= gen_rtx_REG (VOIDmode
, 0);
275 test_mem
= gen_rtx_MEM (VOIDmode
, address
);
276 savepat
= gen_rtx_SET (VOIDmode
, test_mem
, test_reg
);
277 restpat
= gen_rtx_SET (VOIDmode
, test_reg
, test_mem
);
279 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, savepat
, -1, 0);
280 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, restpat
, -1, 0);
282 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
283 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
284 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
286 regno_save_mode
[i
][j
] = VOIDmode
;
289 call_fixed_regs
[i
] = 1;
290 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
291 if (call_used_regs
[i
])
292 SET_HARD_REG_BIT (no_caller_save_reg_set
, i
);
299 /* Initialize save areas by showing that we haven't allocated any yet. */
302 init_save_areas (void)
306 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
307 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
308 regno_save_mem
[i
][j
] = 0;
313 /* The structure represents a hard register which should be saved
314 through the call. It is used when the integrated register
315 allocator (IRA) is used and sharing save slots is on. */
316 struct saved_hard_reg
318 /* Order number starting with 0. */
320 /* The hard regno. */
322 /* Execution frequency of all calls through which given hard
323 register should be saved. */
325 /* Stack slot reserved to save the hard register through calls. */
327 /* True if it is first hard register in the chain of hard registers
328 sharing the same stack slot. */
330 /* Order number of the next hard register structure with the same
331 slot in the chain. -1 represents end of the chain. */
335 /* Map: hard register number to the corresponding structure. */
336 static struct saved_hard_reg
*hard_reg_map
[FIRST_PSEUDO_REGISTER
];
338 /* The number of all structures representing hard registers should be
339 saved, in order words, the number of used elements in the following
341 static int saved_regs_num
;
343 /* Pointers to all the structures. Index is the order number of the
344 corresponding structure. */
345 static struct saved_hard_reg
*all_saved_regs
[FIRST_PSEUDO_REGISTER
];
347 /* First called function for work with saved hard registers. */
349 initiate_saved_hard_regs (void)
354 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
355 hard_reg_map
[i
] = NULL
;
358 /* Allocate and return new saved hard register with given REGNO and
360 static struct saved_hard_reg
*
361 new_saved_hard_reg (int regno
, int call_freq
)
363 struct saved_hard_reg
*saved_reg
;
366 = (struct saved_hard_reg
*) xmalloc (sizeof (struct saved_hard_reg
));
367 hard_reg_map
[regno
] = all_saved_regs
[saved_regs_num
] = saved_reg
;
368 saved_reg
->num
= saved_regs_num
++;
369 saved_reg
->hard_regno
= regno
;
370 saved_reg
->call_freq
= call_freq
;
371 saved_reg
->first_p
= FALSE
;
372 saved_reg
->next
= -1;
376 /* Free memory allocated for the saved hard registers. */
378 finish_saved_hard_regs (void)
382 for (i
= 0; i
< saved_regs_num
; i
++)
383 free (all_saved_regs
[i
]);
386 /* The function is used to sort the saved hard register structures
387 according their frequency. */
389 saved_hard_reg_compare_func (const void *v1p
, const void *v2p
)
391 const struct saved_hard_reg
*p1
= *(struct saved_hard_reg
* const *) v1p
;
392 const struct saved_hard_reg
*p2
= *(struct saved_hard_reg
* const *) v2p
;
394 if (flag_omit_frame_pointer
)
396 if (p1
->call_freq
- p2
->call_freq
!= 0)
397 return p1
->call_freq
- p2
->call_freq
;
399 else if (p2
->call_freq
- p1
->call_freq
!= 0)
400 return p2
->call_freq
- p1
->call_freq
;
402 return p1
->num
- p2
->num
;
405 /* Allocate save areas for any hard registers that might need saving.
406 We take a conservative approach here and look for call-clobbered hard
407 registers that are assigned to pseudos that cross calls. This may
408 overestimate slightly (especially if some of these registers are later
409 used as spill registers), but it should not be significant.
411 For IRA we use priority coloring to decrease stack slots needed for
412 saving hard registers through calls. We build conflicts for them
417 In the fallback case we should iterate backwards across all possible
418 modes for the save, choosing the largest available one instead of
419 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
421 We do not try to use "move multiple" instructions that exist
422 on some machines (such as the 68k moveml). It could be a win to try
423 and use them when possible. The hard part is doing it in a way that is
424 machine independent since they might be saving non-consecutive
425 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
428 setup_save_areas (void)
432 HARD_REG_SET hard_regs_used
;
434 /* Allocate space in the save area for the largest multi-register
435 pseudos first, then work backwards to single register
438 /* Find and record all call-used hard-registers in this function. */
439 CLEAR_HARD_REG_SET (hard_regs_used
);
440 for (i
= FIRST_PSEUDO_REGISTER
; i
< max_regno
; i
++)
441 if (reg_renumber
[i
] >= 0 && REG_N_CALLS_CROSSED (i
) > 0)
443 unsigned int regno
= reg_renumber
[i
];
444 unsigned int endregno
445 = end_hard_regno (GET_MODE (regno_reg_rtx
[i
]), regno
);
446 for (r
= regno
; r
< endregno
; r
++)
447 if (call_used_regs
[r
])
448 SET_HARD_REG_BIT (hard_regs_used
, r
);
451 if (flag_ira
&& optimize
&& flag_ira_share_save_slots
)
454 struct insn_chain
*chain
, *next
;
455 char *saved_reg_conflicts
;
458 struct saved_hard_reg
*saved_reg
, *saved_reg2
, *saved_reg3
;
459 int call_saved_regs_num
;
460 struct saved_hard_reg
*call_saved_regs
[FIRST_PSEUDO_REGISTER
];
461 HARD_REG_SET hard_regs_to_save
, used_regs
, this_insn_sets
;
462 reg_set_iterator rsi
;
464 int prev_save_slots_num
;
465 rtx prev_save_slots
[FIRST_PSEUDO_REGISTER
];
467 initiate_saved_hard_regs ();
468 /* Create hard reg saved regs. */
469 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
473 if (GET_CODE (insn
) != CALL_INSN
474 || find_reg_note (insn
, REG_NORETURN
, NULL
))
476 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn
));
477 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
478 &chain
->live_throughout
);
479 COPY_HARD_REG_SET (used_regs
, call_used_reg_set
);
481 /* Record all registers set in this call insn. These don't
482 need to be saved. N.B. the call insn might set a subreg
483 of a multi-hard-reg pseudo; then the pseudo is considered
484 live during the call, but the subreg that is set
486 CLEAR_HARD_REG_SET (this_insn_sets
);
487 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
488 /* Sibcalls are considered to set the return value. */
489 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
490 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
492 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
493 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
494 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
495 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
496 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
498 if (hard_reg_map
[regno
] != NULL
)
499 hard_reg_map
[regno
]->call_freq
+= freq
;
501 saved_reg
= new_saved_hard_reg (regno
, freq
);
503 /* Look through all live pseudos, mark their hard registers. */
504 EXECUTE_IF_SET_IN_REG_SET
505 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
507 int r
= reg_renumber
[regno
];
513 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
514 for (; r
< bound
; r
++)
515 if (TEST_HARD_REG_BIT (used_regs
, r
))
517 if (hard_reg_map
[r
] != NULL
)
518 hard_reg_map
[r
]->call_freq
+= freq
;
520 saved_reg
= new_saved_hard_reg (r
, freq
);
521 SET_HARD_REG_BIT (hard_regs_to_save
, r
);
525 /* Find saved hard register conflicts. */
526 saved_reg_conflicts
= (char *) xmalloc (saved_regs_num
* saved_regs_num
);
527 memset (saved_reg_conflicts
, 0, saved_regs_num
* saved_regs_num
);
528 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
530 call_saved_regs_num
= 0;
533 if (GET_CODE (insn
) != CALL_INSN
534 || find_reg_note (insn
, REG_NORETURN
, NULL
))
536 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
537 &chain
->live_throughout
);
538 COPY_HARD_REG_SET (used_regs
, call_used_reg_set
);
540 /* Record all registers set in this call insn. These don't
541 need to be saved. N.B. the call insn might set a subreg
542 of a multi-hard-reg pseudo; then the pseudo is considered
543 live during the call, but the subreg that is set
545 CLEAR_HARD_REG_SET (this_insn_sets
);
546 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
547 /* Sibcalls are considered to set the return value,
548 compare flow.c:propagate_one_insn. */
549 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
550 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
552 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
553 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
554 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
555 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
556 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
558 gcc_assert (hard_reg_map
[regno
] != NULL
);
559 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[regno
];
561 /* Look through all live pseudos, mark their hard registers. */
562 EXECUTE_IF_SET_IN_REG_SET
563 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
565 int r
= reg_renumber
[regno
];
571 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
572 for (; r
< bound
; r
++)
573 if (TEST_HARD_REG_BIT (used_regs
, r
))
574 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[r
];
576 for (i
= 0; i
< call_saved_regs_num
; i
++)
578 saved_reg
= call_saved_regs
[i
];
579 for (j
= 0; j
< call_saved_regs_num
; j
++)
582 saved_reg2
= call_saved_regs
[j
];
583 saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
585 = saved_reg_conflicts
[saved_reg2
->num
* saved_regs_num
591 /* Sort saved hard regs. */
592 qsort (all_saved_regs
, saved_regs_num
, sizeof (struct saved_hard_reg
*),
593 saved_hard_reg_compare_func
);
594 /* Initiate slots available from the previous reload
596 prev_save_slots_num
= save_slots_num
;
597 memcpy (prev_save_slots
, save_slots
, save_slots_num
* sizeof (rtx
));
599 /* Allocate stack slots for the saved hard registers. */
600 for (i
= 0; i
< saved_regs_num
; i
++)
602 saved_reg
= all_saved_regs
[i
];
603 regno
= saved_reg
->hard_regno
;
604 for (j
= 0; j
< i
; j
++)
606 saved_reg2
= all_saved_regs
[j
];
607 if (! saved_reg2
->first_p
)
609 slot
= saved_reg2
->slot
;
610 for (k
= j
; k
>= 0; k
= next_k
)
612 saved_reg3
= all_saved_regs
[k
];
613 next_k
= saved_reg3
->next
;
614 if (saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
619 && (GET_MODE_SIZE (regno_save_mode
[regno
][1])
620 <= GET_MODE_SIZE (regno_save_mode
621 [saved_reg2
->hard_regno
][1])))
625 (slot
, regno_save_mode
[saved_reg
->hard_regno
][1], 0);
626 regno_save_mem
[regno
][1] = saved_reg
->slot
;
627 saved_reg
->next
= saved_reg2
->next
;
628 saved_reg2
->next
= i
;
629 if (dump_file
!= NULL
)
630 fprintf (dump_file
, "%d uses slot of %d\n",
631 regno
, saved_reg2
->hard_regno
);
637 saved_reg
->first_p
= TRUE
;
638 for (best_slot_num
= -1, j
= 0; j
< prev_save_slots_num
; j
++)
640 slot
= prev_save_slots
[j
];
641 if (slot
== NULL_RTX
)
643 if (GET_MODE_SIZE (regno_save_mode
[regno
][1])
644 <= GET_MODE_SIZE (GET_MODE (slot
))
645 && best_slot_num
< 0)
647 if (GET_MODE (slot
) == regno_save_mode
[regno
][1])
650 if (best_slot_num
>= 0)
652 saved_reg
->slot
= prev_save_slots
[best_slot_num
];
656 regno_save_mode
[saved_reg
->hard_regno
][1], 0);
657 if (dump_file
!= NULL
)
659 "%d uses a slot from prev iteration\n", regno
);
660 prev_save_slots
[best_slot_num
] = NULL_RTX
;
661 if (best_slot_num
+ 1 == prev_save_slots_num
)
662 prev_save_slots_num
--;
667 = assign_stack_local_1
668 (regno_save_mode
[regno
][1],
669 GET_MODE_SIZE (regno_save_mode
[regno
][1]), 0, true);
670 if (dump_file
!= NULL
)
671 fprintf (dump_file
, "%d uses a new slot\n", regno
);
673 regno_save_mem
[regno
][1] = saved_reg
->slot
;
674 save_slots
[save_slots_num
++] = saved_reg
->slot
;
677 free (saved_reg_conflicts
);
678 finish_saved_hard_regs ();
682 /* Now run through all the call-used hard-registers and allocate
683 space for them in the caller-save area. Try to allocate space
684 in a manner which allows multi-register saves/restores to be done. */
686 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
687 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
691 /* If no mode exists for this size, try another. Also break out
692 if we have already saved this hard register. */
693 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
696 /* See if any register in this group has been saved. */
697 for (k
= 0; k
< j
; k
++)
698 if (regno_save_mem
[i
+ k
][1])
706 for (k
= 0; k
< j
; k
++)
707 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
715 /* We have found an acceptable mode to store in. Since
716 hard register is always saved in the widest mode
717 available, the mode may be wider than necessary, it is
718 OK to reduce the alignment of spill space. We will
719 verify that it is equal to or greater than required
720 when we restore and save the hard register in
721 insert_restore and insert_save. */
723 = assign_stack_local_1 (regno_save_mode
[i
][j
],
724 GET_MODE_SIZE (regno_save_mode
[i
][j
]),
727 /* Setup single word save area just in case... */
728 for (k
= 0; k
< j
; k
++)
729 /* This should not depend on WORDS_BIG_ENDIAN.
730 The order of words in regs is the same as in memory. */
731 regno_save_mem
[i
+ k
][1]
732 = adjust_address_nv (regno_save_mem
[i
][j
],
733 regno_save_mode
[i
+ k
][1],
738 /* Now loop again and set the alias set of any save areas we made to
739 the alias set used to represent frame objects. */
740 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
741 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
742 if (regno_save_mem
[i
][j
] != 0)
743 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
748 /* Find the places where hard regs are live across calls and save them. */
751 save_call_clobbered_regs (void)
753 struct insn_chain
*chain
, *next
;
754 enum machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
756 /* Computed in mark_set_regs, holds all registers set by the current
758 HARD_REG_SET this_insn_sets
;
760 CLEAR_HARD_REG_SET (hard_regs_saved
);
763 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
765 rtx insn
= chain
->insn
;
766 enum rtx_code code
= GET_CODE (insn
);
770 gcc_assert (!chain
->is_caller_save_insn
);
774 /* If some registers have been saved, see if INSN references
775 any of them. We must restore them before the insn if so. */
781 if (code
== JUMP_INSN
)
782 /* Restore all registers if this is a JUMP_INSN. */
783 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
786 CLEAR_HARD_REG_SET (referenced_regs
);
787 mark_referenced_regs (PATTERN (insn
));
788 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
791 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
792 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
793 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
, save_mode
);
796 if (code
== CALL_INSN
797 && ! SIBLING_CALL_P (insn
)
798 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
801 HARD_REG_SET hard_regs_to_save
;
802 reg_set_iterator rsi
;
804 /* Use the register life information in CHAIN to compute which
805 regs are live during the call. */
806 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
807 &chain
->live_throughout
);
808 /* Save hard registers always in the widest mode available. */
809 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
810 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
811 save_mode
[regno
] = regno_save_mode
[regno
][1];
813 save_mode
[regno
] = VOIDmode
;
815 /* Look through all live pseudos, mark their hard registers
816 and choose proper mode for saving. */
817 EXECUTE_IF_SET_IN_REG_SET
818 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
820 int r
= reg_renumber
[regno
];
822 enum machine_mode mode
;
826 nregs
= hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
827 mode
= HARD_REGNO_CALLER_SAVE_MODE
828 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
829 if (GET_MODE_BITSIZE (mode
)
830 > GET_MODE_BITSIZE (save_mode
[r
]))
833 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
836 /* Record all registers set in this call insn. These don't need
837 to be saved. N.B. the call insn might set a subreg of a
838 multi-hard-reg pseudo; then the pseudo is considered live
839 during the call, but the subreg that is set isn't. */
840 CLEAR_HARD_REG_SET (this_insn_sets
);
841 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
843 /* Compute which hard regs must be saved before this call. */
844 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
845 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
846 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
847 AND_HARD_REG_SET (hard_regs_to_save
, call_used_reg_set
);
849 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
850 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
851 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
, save_mode
);
853 /* Must recompute n_regs_saved. */
855 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
856 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
861 if (chain
->next
== 0 || chain
->next
->block
!= chain
->block
)
864 /* At the end of the basic block, we must restore any registers that
865 remain saved. If the last insn in the block is a JUMP_INSN, put
866 the restore before the insn, otherwise, put it after the insn. */
869 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
870 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
871 regno
+= insert_restore (chain
, JUMP_P (insn
),
872 regno
, MOVE_MAX_WORDS
, save_mode
);
877 /* Here from note_stores, or directly from save_call_clobbered_regs, when
878 an insn stores a value in a register.
879 Set the proper bit or bits in this_insn_sets. All pseudos that have
880 been assigned hard regs have had their register number changed already,
881 so we can ignore pseudos. */
883 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
885 int regno
, endregno
, i
;
886 HARD_REG_SET
*this_insn_sets
= (HARD_REG_SET
*) data
;
888 if (GET_CODE (reg
) == SUBREG
)
890 rtx inner
= SUBREG_REG (reg
);
891 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
893 regno
= subreg_regno (reg
);
894 endregno
= regno
+ subreg_nregs (reg
);
897 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
900 endregno
= END_HARD_REGNO (reg
);
905 for (i
= regno
; i
< endregno
; i
++)
906 SET_HARD_REG_BIT (*this_insn_sets
, i
);
909 /* Here from note_stores when an insn stores a value in a register.
910 Set the proper bit or bits in the passed regset. All pseudos that have
911 been assigned hard regs have had their register number changed already,
912 so we can ignore pseudos. */
914 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
916 int regno
, endregno
, i
;
917 enum machine_mode mode
= GET_MODE (reg
);
920 if (GET_CODE (setter
) == CLOBBER
)
923 if (GET_CODE (reg
) == SUBREG
924 && REG_P (SUBREG_REG (reg
))
925 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
927 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
928 GET_MODE (SUBREG_REG (reg
)),
931 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
932 endregno
= regno
+ subreg_nregs (reg
);
936 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
939 regno
= REGNO (reg
) + offset
;
940 endregno
= end_hard_regno (mode
, regno
);
943 for (i
= regno
; i
< endregno
; i
++)
944 SET_REGNO_REG_SET ((regset
) data
, i
);
947 /* Walk X and record all referenced registers in REFERENCED_REGS. */
949 mark_referenced_regs (rtx x
)
951 enum rtx_code code
= GET_CODE (x
);
956 mark_referenced_regs (SET_SRC (x
));
957 if (code
== SET
|| code
== CLOBBER
)
961 if ((code
== REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
962 || code
== PC
|| code
== CC0
963 || (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
964 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
965 /* If we're setting only part of a multi-word register,
966 we shall mark it as referenced, because the words
967 that are not being set should be restored. */
968 && ((GET_MODE_SIZE (GET_MODE (x
))
969 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
970 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
971 <= UNITS_PER_WORD
))))
974 if (code
== MEM
|| code
== SUBREG
)
982 int regno
= REGNO (x
);
983 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
984 : reg_renumber
[regno
]);
987 add_to_hard_reg_set (&referenced_regs
, GET_MODE (x
), hardregno
);
988 /* If this is a pseudo that did not get a hard register, scan its
989 memory location, since it might involve the use of another
990 register, which might be saved. */
991 else if (reg_equiv_mem
[regno
] != 0)
992 mark_referenced_regs (XEXP (reg_equiv_mem
[regno
], 0));
993 else if (reg_equiv_address
[regno
] != 0)
994 mark_referenced_regs (reg_equiv_address
[regno
]);
998 fmt
= GET_RTX_FORMAT (code
);
999 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1002 mark_referenced_regs (XEXP (x
, i
));
1003 else if (fmt
[i
] == 'E')
1004 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1005 mark_referenced_regs (XVECEXP (x
, i
, j
));
1009 /* Insert a sequence of insns to restore. Place these insns in front of
1010 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1011 the maximum number of registers which should be restored during this call.
1012 It should never be less than 1 since we only work with entire registers.
1014 Note that we have verified in init_caller_save that we can do this
1015 with a simple SET, so use it. Set INSN_CODE to what we save there
1016 since the address might not be valid so the insn might not be recognized.
1017 These insns will be reloaded and have register elimination done by
1018 find_reload, so we need not worry about that here.
1020 Return the extra number of registers saved. */
1023 insert_restore (struct insn_chain
*chain
, int before_p
, int regno
,
1024 int maxrestore
, enum machine_mode
*save_mode
)
1029 unsigned int numregs
= 0;
1030 struct insn_chain
*new_chain
;
1033 /* A common failure mode if register status is not correct in the
1034 RTL is for this routine to be called with a REGNO we didn't
1035 expect to save. That will cause us to write an insn with a (nil)
1036 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1037 later, check for this common case here instead. This will remove
1038 one step in debugging such problems. */
1039 gcc_assert (regno_save_mem
[regno
][1]);
1041 /* Get the pattern to emit and update our status.
1043 See if we can restore `maxrestore' registers at once. Work
1044 backwards to the single register case. */
1045 for (i
= maxrestore
; i
> 0; i
--)
1050 if (regno_save_mem
[regno
][i
] == 0)
1053 for (j
= 0; j
< i
; j
++)
1054 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
1059 /* Must do this one restore at a time. */
1067 mem
= regno_save_mem
[regno
][numregs
];
1068 if (save_mode
[regno
] != VOIDmode
1069 && save_mode
[regno
] != GET_MODE (mem
)
1070 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1071 /* Check that insn to restore REGNO in save_mode[regno] is
1073 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1074 mem
= adjust_address (mem
, save_mode
[regno
], 0);
1076 mem
= copy_rtx (mem
);
1078 /* Verify that the alignment of spill space is equal to or greater
1080 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1081 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1083 pat
= gen_rtx_SET (VOIDmode
,
1084 gen_rtx_REG (GET_MODE (mem
),
1086 code
= reg_restore_code (regno
, GET_MODE (mem
));
1087 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1089 /* Clear status for all registers we restored. */
1090 for (k
= 0; k
< i
; k
++)
1092 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1093 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1097 /* Tell our callers how many extra registers we saved/restored. */
1101 /* Like insert_restore above, but save registers instead. */
1104 insert_save (struct insn_chain
*chain
, int before_p
, int regno
,
1105 HARD_REG_SET (*to_save
), enum machine_mode
*save_mode
)
1111 unsigned int numregs
= 0;
1112 struct insn_chain
*new_chain
;
1115 /* A common failure mode if register status is not correct in the
1116 RTL is for this routine to be called with a REGNO we didn't
1117 expect to save. That will cause us to write an insn with a (nil)
1118 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1119 later, check for this common case here. This will remove one
1120 step in debugging such problems. */
1121 gcc_assert (regno_save_mem
[regno
][1]);
1123 /* Get the pattern to emit and update our status.
1125 See if we can save several registers with a single instruction.
1126 Work backwards to the single register case. */
1127 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
1131 if (regno_save_mem
[regno
][i
] == 0)
1134 for (j
= 0; j
< i
; j
++)
1135 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
1140 /* Must do this one save at a time. */
1148 mem
= regno_save_mem
[regno
][numregs
];
1149 if (save_mode
[regno
] != VOIDmode
1150 && save_mode
[regno
] != GET_MODE (mem
)
1151 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1152 /* Check that insn to save REGNO in save_mode[regno] is
1154 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1155 mem
= adjust_address (mem
, save_mode
[regno
], 0);
1157 mem
= copy_rtx (mem
);
1159 /* Verify that the alignment of spill space is equal to or greater
1161 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1162 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1164 pat
= gen_rtx_SET (VOIDmode
, mem
,
1165 gen_rtx_REG (GET_MODE (mem
),
1167 code
= reg_save_code (regno
, GET_MODE (mem
));
1168 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1170 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1171 for (k
= 0; k
< numregs
; k
++)
1173 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1174 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1178 /* Tell our callers how many extra registers we saved/restored. */
1182 /* Emit a new caller-save insn and set the code. */
1183 static struct insn_chain
*
1184 insert_one_insn (struct insn_chain
*chain
, int before_p
, int code
, rtx pat
)
1186 rtx insn
= chain
->insn
;
1187 struct insn_chain
*new_chain
;
1190 /* If INSN references CC0, put our insns in front of the insn that sets
1191 CC0. This is always safe, since the only way we could be passed an
1192 insn that references CC0 is for a restore, and doing a restore earlier
1193 isn't a problem. We do, however, assume here that CALL_INSNs don't
1194 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1196 if ((NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
1198 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
1199 chain
= chain
->prev
, insn
= chain
->insn
;
1202 new_chain
= new_insn_chain ();
1207 new_chain
->prev
= chain
->prev
;
1208 if (new_chain
->prev
!= 0)
1209 new_chain
->prev
->next
= new_chain
;
1211 reload_insn_chain
= new_chain
;
1213 chain
->prev
= new_chain
;
1214 new_chain
->next
= chain
;
1215 new_chain
->insn
= emit_insn_before (pat
, insn
);
1216 /* ??? It would be nice if we could exclude the already / still saved
1217 registers from the live sets. */
1218 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1219 /* Registers that die in CHAIN->INSN still live in the new insn.
1220 Likewise for those which are autoincremented or autodecremented. */
1221 for (link
= REG_NOTES (chain
->insn
); link
; link
= XEXP (link
, 1))
1223 enum reg_note kind
= REG_NOTE_KIND (link
);
1224 if (kind
== REG_DEAD
|| kind
== REG_INC
)
1226 rtx reg
= XEXP (link
, 0);
1229 gcc_assert (REG_P (reg
));
1230 regno
= REGNO (reg
);
1231 if (regno
>= FIRST_PSEUDO_REGISTER
)
1232 regno
= reg_renumber
[regno
];
1235 for (i
= hard_regno_nregs
[regno
][GET_MODE (reg
)] - 1;
1237 SET_REGNO_REG_SET (&new_chain
->live_throughout
, regno
+ i
);
1241 /* If CHAIN->INSN is a call, then the registers which contain
1242 the arguments to the function are live in the new insn. */
1243 if (CALL_P (chain
->insn
))
1245 for (link
= CALL_INSN_FUNCTION_USAGE (chain
->insn
);
1247 link
= XEXP (link
, 1))
1249 rtx arg
= XEXP (link
, 0);
1251 if (GET_CODE (arg
) == USE
)
1253 rtx reg
= XEXP (arg
, 0);
1257 int i
, regno
= REGNO (reg
);
1259 /* Registers in CALL_INSN_FUNCTION_USAGE are always
1261 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
1263 for (i
= hard_regno_nregs
[regno
][GET_MODE (reg
)] - 1;
1265 SET_REGNO_REG_SET (&new_chain
->live_throughout
, regno
+ i
);
1272 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1273 if (chain
->insn
== BB_HEAD (BASIC_BLOCK (chain
->block
)))
1274 BB_HEAD (BASIC_BLOCK (chain
->block
)) = new_chain
->insn
;
1278 new_chain
->next
= chain
->next
;
1279 if (new_chain
->next
!= 0)
1280 new_chain
->next
->prev
= new_chain
;
1281 chain
->next
= new_chain
;
1282 new_chain
->prev
= chain
;
1283 new_chain
->insn
= emit_insn_after (pat
, insn
);
1284 /* ??? It would be nice if we could exclude the already / still saved
1285 registers from the live sets, and observe REG_UNUSED notes. */
1286 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1287 /* Registers that are set in CHAIN->INSN live in the new insn.
1288 (Unless there is a REG_UNUSED note for them, but we don't
1289 look for them here.) */
1290 note_stores (PATTERN (chain
->insn
), add_stored_regs
,
1291 &new_chain
->live_throughout
);
1292 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1293 if (chain
->insn
== BB_END (BASIC_BLOCK (chain
->block
)))
1294 BB_END (BASIC_BLOCK (chain
->block
)) = new_chain
->insn
;
1296 new_chain
->block
= chain
->block
;
1297 new_chain
->is_caller_save_insn
= 1;
1299 INSN_CODE (new_chain
->insn
) = code
;
1302 #include "gt-caller-save.h"