PR inline-asm/84742
[official-gcc.git] / gcc / testsuite / gcc.target / i386 / xop-shift3-vector.c
blob0bb897f006029ef3146758a35ef7e0ce1832b681
1 /* Test that the compiler properly optimizes vector shift instructions into
2 psha/pshl on XOP systems. */
4 /* { dg-do compile { target { ! ia32 } } } */
5 /* { dg-options "-O2 -mxop -mno-avx2 -ftree-vectorize" } */
7 extern void exit (int);
9 typedef long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
11 #define SIZE 10240
13 union {
14 __m128i i_align;
15 int i32[SIZE];
16 unsigned u32[SIZE];
17 } a, b, c;
19 void
20 right_uns_shift32 (void)
22 int i;
24 for (i = 0; i < SIZE; i++)
25 a.u32[i] = b.u32[i] >> c.i32[i];
28 int main ()
30 right_uns_shift32 ();
31 exit (0);
34 /* { dg-final { scan-assembler "vpshld" } } */