PR inline-asm/84742
[official-gcc.git] / gcc / testsuite / gcc.target / i386 / sse2-vec-5.c
blobc676bbd3a020802327549eb33925bc1f37c625ec
1 /* { dg-do run } */
2 /* { dg-options "-O2 -msse2" } */
3 /* { dg-require-effective-target sse2 } */
5 #include "sse2-check.h"
7 #include <emmintrin.h>
9 static void
10 sse2_test (void)
12 union
14 __m128i x;
15 char c[16];
16 short s[8];
17 int i[4];
18 long long ll[2];
19 } val1;
20 char res[16];
21 int masks[16];
22 int i;
24 for (i = 0; i < 16; i++)
25 val1.c[i] = i;
27 res[0] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 0);
28 res[1] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 1);
29 res[2] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 2);
30 res[3] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 3);
31 res[4] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 4);
32 res[5] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 5);
33 res[6] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 6);
34 res[7] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 7);
35 res[8] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 8);
36 res[9] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 9);
37 res[10] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 10);
38 res[11] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 11);
39 res[12] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 12);
40 res[13] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 13);
41 res[14] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 14);
42 res[15] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 15);
44 for (i = 0; i < 16; i++)
45 masks[i] = i;
47 for (i = 0; i < 16; i++)
48 if (res[i] != val1.c [masks[i]])
49 abort ();