PR inline-asm/84742
[official-gcc.git] / gcc / testsuite / gcc.target / i386 / builtin_target.c
blob8fa97973ef880ed34c33b19dda6e2211b5283f2d
1 /* This test checks if the __builtin_cpu_is and __builtin_cpu_supports calls
2 are recognized. It also independently uses CPUID to get cpu type and
3 features supported and checks if the builtins correctly identify the
4 platform. The code to do the identification is adapted from
5 libgcc/config/i386/cpuinfo.c. */
7 /* { dg-do run } */
9 #include <assert.h>
10 #include "cpuid.h"
12 /* Check if the Intel CPU model and sub-model are identified. */
13 static void
14 check_intel_cpu_model (unsigned int family, unsigned int model,
15 unsigned int brand_id)
17 /* Parse family and model only if brand ID is 0. */
18 if (brand_id == 0)
20 switch (family)
22 case 0x5:
23 /* Pentium. */
24 break;
25 case 0x6:
26 switch (model)
28 case 0x1c:
29 case 0x26:
30 /* Atom. */
31 assert (__builtin_cpu_is ("atom"));
32 break;
33 case 0x37:
34 case 0x4a:
35 case 0x4d:
36 case 0x5a:
37 case 0x5d:
38 /* Silvermont. */
39 assert (__builtin_cpu_is ("silvermont"));
40 break;
41 case 0x57:
42 /* Knights Landing. */
43 assert (__builtin_cpu_is ("knl"));
44 break;
45 case 0x85:
46 /* Knights Mill */
47 assert (__builtin_cpu_is ("knm"));
48 break;
49 case 0x1a:
50 case 0x1e:
51 case 0x1f:
52 case 0x2e:
53 /* Nehalem. */
54 assert (__builtin_cpu_is ("corei7"));
55 assert (__builtin_cpu_is ("nehalem"));
56 break;
57 case 0x25:
58 case 0x2c:
59 case 0x2f:
60 /* Westmere. */
61 assert (__builtin_cpu_is ("corei7"));
62 assert (__builtin_cpu_is ("westmere"));
63 break;
64 case 0x2a:
65 case 0x2d:
66 /* Sandy Bridge. */
67 assert (__builtin_cpu_is ("corei7"));
68 assert (__builtin_cpu_is ("sandybridge"));
69 break;
70 case 0x3a:
71 case 0x3e:
72 /* Ivy Bridge. */
73 assert (__builtin_cpu_is ("corei7"));
74 assert (__builtin_cpu_is ("ivybridge"));
75 break;
76 case 0x3c:
77 case 0x3f:
78 case 0x45:
79 case 0x46:
80 /* Haswell. */
81 assert (__builtin_cpu_is ("corei7"));
82 assert (__builtin_cpu_is ("haswell"));
83 break;
84 case 0x3d:
85 case 0x47:
86 case 0x4f:
87 case 0x56:
88 /* Broadwell. */
89 assert (__builtin_cpu_is ("corei7"));
90 assert (__builtin_cpu_is ("broadwell"));
91 break;
92 case 0x4e:
93 case 0x5e:
94 /* Skylake. */
95 case 0x8e:
96 case 0x9e:
97 /* Kaby Lake. */
98 assert (__builtin_cpu_is ("corei7"));
99 assert (__builtin_cpu_is ("skylake"));
100 break;
101 case 0x55:
102 /* Skylake with AVX-512 support. */
103 assert (__builtin_cpu_is ("corei7"));
104 assert (__builtin_cpu_is ("skylake-avx512"));
105 break;
106 case 0x17:
107 case 0x1d:
108 /* Penryn. */
109 case 0x0f:
110 /* Merom. */
111 assert (__builtin_cpu_is ("core2"));
112 break;
113 default:
114 break;
116 break;
117 default:
118 /* We have no idea. */
119 break;
124 /* Check if the AMD CPU model and sub-model are identified. */
125 static void
126 check_amd_cpu_model (unsigned int family, unsigned int model)
128 switch (family)
130 /* AMD Family 10h. */
131 case 0x10:
132 switch (model)
134 case 0x2:
135 /* Barcelona. */
136 assert (__builtin_cpu_is ("amdfam10h"));
137 assert (__builtin_cpu_is ("barcelona"));
138 break;
139 case 0x4:
140 /* Shanghai. */
141 assert (__builtin_cpu_is ("amdfam10h"));
142 assert (__builtin_cpu_is ("shanghai"));
143 break;
144 case 0x8:
145 /* Istanbul. */
146 assert (__builtin_cpu_is ("amdfam10h"));
147 assert (__builtin_cpu_is ("istanbul"));
148 break;
149 default:
150 break;
152 break;
153 /* AMD Family 15h. */
154 case 0x15:
155 assert (__builtin_cpu_is ("amdfam15h"));
156 /* Bulldozer version 1. */
157 if ( model <= 0xf)
158 assert (__builtin_cpu_is ("bdver1"));
159 /* Bulldozer version 2. */
160 if (model >= 0x10 && model <= 0x1f)
161 assert (__builtin_cpu_is ("bdver2"));
162 break;
163 default:
164 break;
168 /* Check if the ISA features are identified. */
169 static void
170 check_features (unsigned int ecx, unsigned int edx,
171 int max_cpuid_level)
173 unsigned int eax, ebx;
174 unsigned int ext_level;
176 if (edx & bit_CMOV)
177 assert (__builtin_cpu_supports ("cmov"));
178 if (edx & bit_MMX)
179 assert (__builtin_cpu_supports ("mmx"));
180 if (edx & bit_SSE)
181 assert (__builtin_cpu_supports ("sse"));
182 if (edx & bit_SSE2)
183 assert (__builtin_cpu_supports ("sse2"));
184 if (ecx & bit_POPCNT)
185 assert (__builtin_cpu_supports ("popcnt"));
186 if (ecx & bit_AES)
187 assert (__builtin_cpu_supports ("aes"));
188 if (ecx & bit_PCLMUL)
189 assert (__builtin_cpu_supports ("pclmul"));
190 if (ecx & bit_SSE3)
191 assert (__builtin_cpu_supports ("sse3"));
192 if (ecx & bit_SSSE3)
193 assert (__builtin_cpu_supports ("ssse3"));
194 if (ecx & bit_SSE4_1)
195 assert (__builtin_cpu_supports ("sse4.1"));
196 if (ecx & bit_SSE4_2)
197 assert (__builtin_cpu_supports ("sse4.2"));
198 if (ecx & bit_AVX)
199 assert (__builtin_cpu_supports ("avx"));
200 if (ecx & bit_FMA)
201 assert (__builtin_cpu_supports ("fma"));
203 /* Get advanced features at level 7 (eax = 7, ecx = 0). */
204 if (max_cpuid_level >= 7)
206 __cpuid_count (7, 0, eax, ebx, ecx, edx);
207 if (ebx & bit_BMI)
208 assert (__builtin_cpu_supports ("bmi"));
209 if (ebx & bit_AVX2)
210 assert (__builtin_cpu_supports ("avx2"));
211 if (ebx & bit_BMI2)
212 assert (__builtin_cpu_supports ("bmi2"));
213 if (ebx & bit_AVX512F)
214 assert (__builtin_cpu_supports ("avx512f"));
215 if (ebx & bit_AVX512VL)
216 assert (__builtin_cpu_supports ("avx512vl"));
217 if (ebx & bit_AVX512BW)
218 assert (__builtin_cpu_supports ("avx512bw"));
219 if (ebx & bit_AVX512DQ)
220 assert (__builtin_cpu_supports ("avx512dq"));
221 if (ebx & bit_AVX512CD)
222 assert (__builtin_cpu_supports ("avx512cd"));
223 if (ebx & bit_AVX512PF)
224 assert (__builtin_cpu_supports ("avx512pf"));
225 if (ebx & bit_AVX512ER)
226 assert (__builtin_cpu_supports ("avx512er"));
227 if (ebx & bit_AVX512IFMA)
228 assert (__builtin_cpu_supports ("avx512ifma"));
229 if (ecx & bit_AVX512VBMI)
230 assert (__builtin_cpu_supports ("avx512vbmi"));
231 if (ecx & bit_AVX512VPOPCNTDQ)
232 assert (__builtin_cpu_supports ("avx512vpopcntdq"));
233 if (edx & bit_AVX5124VNNIW)
234 assert (__builtin_cpu_supports ("avx5124vnniw"));
235 if (edx & bit_AVX5124FMAPS)
236 assert (__builtin_cpu_supports ("avx5124fmaps"));
239 /* Check cpuid level of extended features. */
240 __cpuid (0x80000000, ext_level, ebx, ecx, edx);
242 if (ext_level >= 0x80000001)
244 __cpuid (0x80000001, eax, ebx, ecx, edx);
246 if (ecx & bit_SSE4a)
247 assert (__builtin_cpu_supports ("sse4a"));
248 if (ecx & bit_FMA4)
249 assert (__builtin_cpu_supports ("fma4"));
250 if (ecx & bit_XOP)
251 assert (__builtin_cpu_supports ("xop"));
255 static int __attribute__ ((noinline))
256 __get_cpuid_output (unsigned int __level,
257 unsigned int *__eax, unsigned int *__ebx,
258 unsigned int *__ecx, unsigned int *__edx)
260 return __get_cpuid (__level, __eax, __ebx, __ecx, __edx);
263 static int
264 check_detailed ()
266 unsigned int eax, ebx, ecx, edx;
268 int max_level;
269 unsigned int vendor;
270 unsigned int model, family, brand_id;
271 unsigned int extended_model, extended_family;
273 /* Assume cpuid insn present. Run in level 0 to get vendor id. */
274 if (!__get_cpuid_output (0, &eax, &ebx, &ecx, &edx))
275 return 0;
277 vendor = ebx;
278 max_level = eax;
280 if (max_level < 1)
281 return 0;
283 if (!__get_cpuid_output (1, &eax, &ebx, &ecx, &edx))
284 return 0;
286 model = (eax >> 4) & 0x0f;
287 family = (eax >> 8) & 0x0f;
288 brand_id = ebx & 0xff;
289 extended_model = (eax >> 12) & 0xf0;
290 extended_family = (eax >> 20) & 0xff;
292 if (vendor == signature_INTEL_ebx)
294 assert (__builtin_cpu_is ("intel"));
295 /* Adjust family and model for Intel CPUs. */
296 if (family == 0x0f)
298 family += extended_family;
299 model += extended_model;
301 else if (family == 0x06)
302 model += extended_model;
303 check_intel_cpu_model (family, model, brand_id);
304 check_features (ecx, edx, max_level);
306 else if (vendor == signature_AMD_ebx)
308 assert (__builtin_cpu_is ("amd"));
309 /* Adjust model and family for AMD CPUS. */
310 if (family == 0x0f)
312 family += extended_family;
313 model += (extended_model << 4);
315 check_amd_cpu_model (family, model);
316 check_features (ecx, edx, max_level);
319 return 0;
322 static int
323 quick_check ()
325 /* Check CPU Features. */
326 assert (__builtin_cpu_supports ("cmov") >= 0);
328 assert (__builtin_cpu_supports ("mmx") >= 0);
330 assert (__builtin_cpu_supports ("popcnt") >= 0);
332 assert (__builtin_cpu_supports ("sse") >= 0);
334 assert (__builtin_cpu_supports ("sse2") >= 0);
336 assert (__builtin_cpu_supports ("sse3") >= 0);
338 assert (__builtin_cpu_supports ("ssse3") >= 0);
340 assert (__builtin_cpu_supports ("sse4.1") >= 0);
342 assert (__builtin_cpu_supports ("sse4.2") >= 0);
344 assert (__builtin_cpu_supports ("avx") >= 0);
346 assert (__builtin_cpu_supports ("avx2") >= 0);
348 assert (__builtin_cpu_supports ("avx512f") >= 0);
350 assert (__builtin_cpu_supports ("avx5124vnniw") >= 0);
352 assert (__builtin_cpu_supports ("avx5124fmaps") >= 0);
354 assert (__builtin_cpu_supports ("avx512vpopcntdq") >= 0);
356 /* Check CPU type. */
357 assert (__builtin_cpu_is ("amd") >= 0);
359 assert (__builtin_cpu_is ("intel") >= 0);
361 assert (__builtin_cpu_is ("atom") >= 0);
363 assert (__builtin_cpu_is ("core2") >= 0);
365 assert (__builtin_cpu_is ("corei7") >= 0);
367 assert (__builtin_cpu_is ("nehalem") >= 0);
369 assert (__builtin_cpu_is ("westmere") >= 0);
371 assert (__builtin_cpu_is ("sandybridge") >= 0);
373 assert (__builtin_cpu_is ("amdfam10h") >= 0);
375 assert (__builtin_cpu_is ("barcelona") >= 0);
377 assert (__builtin_cpu_is ("shanghai") >= 0);
379 assert (__builtin_cpu_is ("istanbul") >= 0);
381 assert (__builtin_cpu_is ("amdfam15h") >= 0);
383 assert (__builtin_cpu_is ("bdver1") >= 0);
385 assert (__builtin_cpu_is ("bdver2") >= 0);
387 return 0;
390 int main ()
392 __builtin_cpu_init ();
393 quick_check ();
394 check_detailed ();
395 return 0;