gcc/testsuite/gcc.target/arm/armv8_2-fp16-scalar-1.c

   1 /* { dg-do compile }  */
   2 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_ok }  */
   3 /* { dg-options "-O2" }  */
   4 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
   5
   6 /* Test instructions generated for the FP16 scalar intrinsics.  */
   7 #include <arm_fp16.h>
   8
   9 #define MSTRCAT(L, str) L##str
  10
  11 #define UNOP_TEST(insn)                         \
  12   float16_t                                     \
  13   MSTRCAT (test_##insn, 16) (float16_t a)       \
  14   {                                             \
  15     return MSTRCAT (insn, h_f16) (a);           \
  16   }
  17
  18 #define BINOP_TEST(insn)                                \
  19   float16_t                                             \
  20   MSTRCAT (test_##insn, 16) (float16_t a, float16_t b)  \
  21   {                                                     \
  22     return MSTRCAT (insn, h_f16) (a, b);                \
  23   }
  24
  25 #define TERNOP_TEST(insn)                                               \
  26   float16_t                                                             \
  27   MSTRCAT (test_##insn, 16) (float16_t a, float16_t b, float16_t c)     \
  28   {                                                                     \
  29     return MSTRCAT (insn, h_f16) (a, b, c);                             \
  30   }
  31
  32 float16_t
  33 test_vcvth_f16_s32 (int32_t a)
  34 {
  35   return vcvth_f16_s32 (a);
  36 }
  37
  38 float16_t
  39 test_vcvth_n_f16_s32 (int32_t a)
  40 {
  41   return vcvth_n_f16_s32 (a, 1);
  42 }
  43 /* { dg-final { scan-assembler-times {vcvt\.f16\.s32\ts[0-9]+, s[0-9]+} 2 } }  */
  44 /* { dg-final { scan-assembler-times {vcvt\.f16\.s32\ts[0-9]+, s[0-9]+, #1} 1 } }  */
  45
  46 float16_t
  47 test_vcvth_f16_u32 (uint32_t a)
  48 {
  49   return vcvth_f16_u32 (a);
  50 }
  51
  52 float16_t
  53 test_vcvth_n_f16_u32 (uint32_t a)
  54 {
  55   return vcvth_n_f16_u32 (a, 1);
  56 }
  57
  58 /* { dg-final { scan-assembler-times {vcvt\.f16\.u32\ts[0-9]+, s[0-9]+} 2 } }  */
  59 /* { dg-final { scan-assembler-times {vcvt\.f16\.u32\ts[0-9]+, s[0-9]+, #1} 1 } }  */
  60
  61 uint32_t
  62 test_vcvth_u32_f16 (float16_t a)
  63 {
  64   return vcvth_u32_f16 (a);
  65 }
  66 /* { dg-final { scan-assembler-times {vcvt\.u32\.f16\ts[0-9]+, s[0-9]+} 2 } }  */
  67
  68 uint32_t
  69 test_vcvth_n_u32_f16 (float16_t a)
  70 {
  71   return vcvth_n_u32_f16 (a, 1);
  72 }
  73 /* { dg-final { scan-assembler-times {vcvt\.u32\.f16\ts[0-9]+, s[0-9]+, #1} 1 } }  */
  74
  75 int32_t
  76 test_vcvth_s32_f16 (float16_t a)
  77 {
  78   return vcvth_s32_f16 (a);
  79 }
  80
  81 int32_t
  82 test_vcvth_n_s32_f16 (float16_t a)
  83 {
  84   return vcvth_n_s32_f16 (a, 1);
  85 }
  86
  87 /* { dg-final { scan-assembler-times {vcvt\.s32\.f16\ts[0-9]+, s[0-9]+} 2 } }  */
  88 /* { dg-final { scan-assembler-times {vcvt\.s32\.f16\ts[0-9]+, s[0-9]+, #1} 1 } }  */
  89
  90 int32_t
  91 test_vcvtah_s32_f16 (float16_t a)
  92 {
  93   return vcvtah_s32_f16 (a);
  94 }
  95 /* { dg-final { scan-assembler-times {vcvta\.s32\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
  96
  97 uint32_t
  98 test_vcvtah_u32_f16 (float16_t a)
  99 {
 100   return vcvtah_u32_f16 (a);
 101 }
 102 /* { dg-final { scan-assembler-times {vcvta\.u32\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 103
 104 int32_t
 105 test_vcvtmh_s32_f16 (float16_t a)
 106 {
 107   return vcvtmh_s32_f16 (a);
 108 }
 109 /* { dg-final { scan-assembler-times {vcvtm\.s32\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 110
 111 uint32_t
 112 test_vcvtmh_u32_f16 (float16_t a)
 113 {
 114   return vcvtmh_u32_f16 (a);
 115 }
 116 /* { dg-final { scan-assembler-times {vcvtm\.u32\.f16\ts[0-9]+, s[0-9]+} 1 } }
 117  */
 118
 119 int32_t
 120 test_vcvtnh_s32_f16 (float16_t a)
 121 {
 122   return vcvtnh_s32_f16 (a);
 123 }
 124 /* { dg-final { scan-assembler-times {vcvtn\.s32\.f16\ts[0-9]+, s[0-9]+} 1 } }
 125  */
 126
 127 uint32_t
 128 test_vcvtnh_u32_f16 (float16_t a)
 129 {
 130   return vcvtnh_u32_f16 (a);
 131 }
 132 /* { dg-final { scan-assembler-times {vcvtn\.u32\.f16\ts[0-9]+, s[0-9]+} 1 } }
 133  */
 134
 135 int32_t
 136 test_vcvtph_s32_f16 (float16_t a)
 137 {
 138   return vcvtph_s32_f16 (a);
 139 }
 140 /* { dg-final { scan-assembler-times {vcvtp\.s32\.f16\ts[0-9]+, s[0-9]+} 1 } }
 141  */
 142
 143 uint32_t
 144 test_vcvtph_u32_f16 (float16_t a)
 145 {
 146   return vcvtph_u32_f16 (a);
 147 }
 148 /* { dg-final { scan-assembler-times {vcvtp\.u32\.f16\ts[0-9]+, s[0-9]+} 1 } }
 149  */
 150
 151 UNOP_TEST (vabs)
 152 /* { dg-final { scan-assembler-times {vabs\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 153
 154 UNOP_TEST (vneg)
 155 /* { dg-final { scan-assembler-times {vneg\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 156
 157 UNOP_TEST (vrnd)
 158 /* { dg-final { scan-assembler-times {vrintz\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 159
 160 UNOP_TEST (vrndi)
 161 /* { dg-final { scan-assembler-times {vrintr\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 162
 163 UNOP_TEST (vrnda)
 164 /* { dg-final { scan-assembler-times {vrinta\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 165
 166 UNOP_TEST (vrndm)
 167 /* { dg-final { scan-assembler-times {vrinta\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 168
 169 UNOP_TEST (vrndn)
 170 /* { dg-final { scan-assembler-times {vrinta\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 171
 172 UNOP_TEST (vrndp)
 173 /* { dg-final { scan-assembler-times {vrinta\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 174
 175 UNOP_TEST (vrndx)
 176 /* { dg-final { scan-assembler-times {vrinta\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 177
 178 UNOP_TEST (vsqrt)
 179 /* { dg-final { scan-assembler-times {vsqrt\.f16\ts[0-9]+, s[0-9]+} 1 } }  */
 180
 181 BINOP_TEST (vadd)
 182 /* { dg-final { scan-assembler-times {vadd\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 1 } }  */
 183
 184 BINOP_TEST (vdiv)
 185 /* { dg-final { scan-assembler-times {vdiv\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 1 } }  */
 186
 187 BINOP_TEST (vmaxnm)
 188 /* { dg-final { scan-assembler-times {vmaxnm\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 1 } }  */
 189
 190 BINOP_TEST (vminnm)
 191 /* { dg-final { scan-assembler-times {vminnm\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 1 } }  */
 192
 193 BINOP_TEST (vmul)
 194 /* { dg-final { scan-assembler-times {vmul\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 1 } }  */
 195
 196 BINOP_TEST (vsub)
 197 /* { dg-final { scan-assembler-times {vsub\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 1 } }  */
 198
 199 TERNOP_TEST (vfma)
 200 /* { dg-final { scan-assembler-times {vfma\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 1 } }  */
 201
 202 TERNOP_TEST (vfms)
 203 /* { dg-final { scan-assembler-times {vfms\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 1 } }  */