2014-03-25 Richard Biener <rguenther@suse.de>
[official-gcc.git] / gcc / config / v850 / v850.h
blob92db20a44057296c48234db8db40492b97d088aa
1 /* Definitions of target machine for GNU compiler. NEC V850 series
2 Copyright (C) 1996-2014 Free Software Foundation, Inc.
3 Contributed by Jeff Law (law@cygnus.com).
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
12 GCC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #ifndef GCC_V850_H
22 #define GCC_V850_H
24 extern GTY(()) rtx v850_compare_op0;
25 extern GTY(()) rtx v850_compare_op1;
27 #undef LIB_SPEC
28 #define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -lgcc --end-group}}"
30 #undef ENDFILE_SPEC
31 #undef LINK_SPEC
32 #undef STARTFILE_SPEC
33 #undef ASM_SPEC
35 #define TARGET_CPU_generic 1
36 #define TARGET_CPU_v850e 2
37 #define TARGET_CPU_v850e1 3
38 #define TARGET_CPU_v850e2 4
39 #define TARGET_CPU_v850e2v3 5
40 #define TARGET_CPU_v850e3v5 6
42 #ifndef TARGET_CPU_DEFAULT
43 #define TARGET_CPU_DEFAULT TARGET_CPU_generic
44 #endif
46 #define MASK_DEFAULT MASK_V850
47 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850}"
48 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850__}"
50 /* Choose which processor will be the default.
51 We must pass a -mv850xx option to the assembler if no explicit -mv* option
52 is given, because the assembler's processor default may not be correct. */
53 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e
54 #undef MASK_DEFAULT
55 #define MASK_DEFAULT MASK_V850E
56 #undef SUBTARGET_ASM_SPEC
57 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e}"
58 #undef SUBTARGET_CPP_SPEC
59 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e__}"
60 #endif
62 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e1
63 #undef MASK_DEFAULT
64 #define MASK_DEFAULT MASK_V850E /* No practical difference. */
65 #undef SUBTARGET_ASM_SPEC
66 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e1}"
67 #undef SUBTARGET_CPP_SPEC
68 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e1__} %{mv850e1:-D__v850e1__}"
69 #endif
71 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2
72 #undef MASK_DEFAULT
73 #define MASK_DEFAULT MASK_V850E2
74 #undef SUBTARGET_ASM_SPEC
75 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2}"
76 #undef SUBTARGET_CPP_SPEC
77 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2__} %{mv850e2:-D__v850e2__}"
78 #endif
80 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2v3
81 #undef MASK_DEFAULT
82 #define MASK_DEFAULT MASK_V850E2V3
83 #undef SUBTARGET_ASM_SPEC
84 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2v3}"
85 #undef SUBTARGET_CPP_SPEC
86 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2v3__} %{mv850e2v3:-D__v850e2v3__}"
87 #endif
89 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e3v5
90 #undef MASK_DEFAULT
91 #define MASK_DEFAULT MASK_V850E3V5
92 #undef SUBTARGET_ASM_SPEC
93 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e3v5}"
94 #undef SUBTARGET_CPP_SPEC
95 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e3v5__} %{mv850e3v5:-D__v850e3v5__}"
96 #undef TARGET_VERSION
97 #define TARGET_VERSION fprintf (stderr, " (Renesas V850E3V5)");
98 #endif
100 #define TARGET_V850E3V5_UP ((TARGET_V850E3V5))
101 #define TARGET_V850E2V3_UP ((TARGET_V850E2V3) || TARGET_V850E3V5_UP)
102 #define TARGET_V850E2_UP ((TARGET_V850E2) || TARGET_V850E2V3_UP)
103 #define TARGET_V850E_UP ((TARGET_V850E) || TARGET_V850E2_UP)
104 #define TARGET_ALL ((TARGET_V850) || TARGET_V850E_UP)
106 #define ASM_SPEC "%{m850es:-mv850e1}%{!mv850es:%{mv*:-mv%*}} \
107 %{mrelax:-mrelax} \
108 %{m8byte-align:-m8byte-align} \
109 %{mgcc-abi:-mgcc-abi}"
111 #define LINK_SPEC "%{mgcc-abi:-m v850}"
113 #define CPP_SPEC "\
114 %{mv850e3v5:-D__v850e3v5__} \
115 %{mv850e2v3:-D__v850e2v3__} \
116 %{mv850e2:-D__v850e2__} \
117 %{mv850es:-D__v850e1__} \
118 %{mv850e1:-D__v850e1__} \
119 %{mv850e:-D__v850e__} \
120 %{mv850:-D__v850__} \
121 %(subtarget_cpp_spec) \
122 %{mep:-D__EP__}"
124 #define EXTRA_SPECS \
125 { "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \
126 { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }
129 /* Macro to decide when FPU instructions can be used. */
130 #define TARGET_USE_FPU (TARGET_V850E2V3_UP && ! TARGET_SOFT_FLOAT)
132 #define TARGET_CPU_CPP_BUILTINS() \
133 do \
135 builtin_define( "__v851__" ); \
136 builtin_define( "__v850" ); \
137 builtin_define( "__v850__" ); \
138 builtin_assert( "machine=v850" ); \
139 builtin_assert( "cpu=v850" ); \
140 if (TARGET_EP) \
141 builtin_define ("__EP__"); \
142 if (TARGET_GCC_ABI) \
143 builtin_define ("__V850_GCC_ABI__"); \
144 else \
145 builtin_define ("__V850_RH850_ABI__"); \
146 if (! TARGET_DISABLE_CALLT) \
147 builtin_define ("__V850_CALLT__"); \
148 if (TARGET_8BYTE_ALIGN) \
149 builtin_define ("__V850_8BYTE_ALIGN__");\
150 builtin_define (TARGET_USE_FPU ? \
151 "__FPU_OK__" : "__NO_FPU__");\
153 while(0)
155 #define MASK_CPU (MASK_V850 | MASK_V850E | MASK_V850E1 | MASK_V850E2 | MASK_V850E2V3 | MASK_V850E3V5)
157 /* Target machine storage layout */
159 /* Define this if most significant bit is lowest numbered
160 in instructions that operate on numbered bit-fields.
161 This is not true on the NEC V850. */
162 #define BITS_BIG_ENDIAN 0
164 /* Define this if most significant byte of a word is the lowest numbered. */
165 /* This is not true on the NEC V850. */
166 #define BYTES_BIG_ENDIAN 0
168 /* Define this if most significant word of a multiword number is lowest
169 numbered.
170 This is not true on the NEC V850. */
171 #define WORDS_BIG_ENDIAN 0
173 /* Width of a word, in units (bytes). */
174 #define UNITS_PER_WORD 4
176 /* Define this macro if it is advisable to hold scalars in registers
177 in a wider mode than that declared by the program. In such cases,
178 the value is constrained to be within the bounds of the declared
179 type, but kept valid in the wider mode. The signedness of the
180 extension may differ from that of the type.
182 Some simple experiments have shown that leaving UNSIGNEDP alone
183 generates the best overall code. */
185 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
186 if (GET_MODE_CLASS (MODE) == MODE_INT \
187 && GET_MODE_SIZE (MODE) < 4) \
188 { (MODE) = SImode; }
190 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
191 #define PARM_BOUNDARY 32
193 /* The stack goes in 32-bit lumps. */
194 #define STACK_BOUNDARY BIGGEST_ALIGNMENT
196 /* Allocation boundary (in *bits*) for the code of a function.
197 16 is the minimum boundary; 32 would give better performance. */
198 #define FUNCTION_BOUNDARY (((! TARGET_GCC_ABI) || optimize_size) ? 16 : 32)
200 /* No data type wants to be aligned rounder than this. */
201 #define BIGGEST_ALIGNMENT (TARGET_8BYTE_ALIGN ? 64 : 32)
203 /* Alignment of field after `int : 0' in a structure. */
204 #define EMPTY_FIELD_BOUNDARY 32
206 /* No structure field wants to be aligned rounder than this. */
207 #define BIGGEST_FIELD_ALIGNMENT BIGGEST_ALIGNMENT
209 /* Define this if move instructions will actually fail to work
210 when given unaligned data. */
211 #define STRICT_ALIGNMENT (!TARGET_NO_STRICT_ALIGN)
213 /* Define this as 1 if `char' should by default be signed; else as 0.
215 On the NEC V850, loads do sign extension, so make this default. */
216 #define DEFAULT_SIGNED_CHAR 1
218 #undef SIZE_TYPE
219 #define SIZE_TYPE "unsigned int"
221 #undef PTRDIFF_TYPE
222 #define PTRDIFF_TYPE "int"
224 #undef WCHAR_TYPE
225 #define WCHAR_TYPE "long int"
227 #undef WCHAR_TYPE_SIZE
228 #define WCHAR_TYPE_SIZE BITS_PER_WORD
230 /* Standard register usage. */
232 /* Number of actual hardware registers.
233 The hardware registers are assigned numbers for the compiler
234 from 0 to just below FIRST_PSEUDO_REGISTER.
236 All registers that the compiler knows about must be given numbers,
237 even those that are not normally considered general registers. */
239 #define FIRST_PSEUDO_REGISTER 36
241 /* 1 for registers that have pervasive standard uses
242 and are not available for the register allocator. */
244 #define FIXED_REGISTERS \
245 { 1, 1, 1, 1, 1, 1, 0, 0, \
246 0, 0, 0, 0, 0, 0, 0, 0, \
247 0, 0, 0, 0, 0, 0, 0, 0, \
248 0, 0, 0, 0, 0, 0, 1, 0, \
249 1, 1, \
250 1, 1}
252 /* 1 for registers not available across function calls.
253 These must include the FIXED_REGISTERS and also any
254 registers that can be used without being saved.
255 The latter must include the registers where values are returned
256 and the register where structure-value addresses are passed.
257 Aside from that, you can include as many other registers as you
258 like. */
260 #define CALL_USED_REGISTERS \
261 { 1, 1, 1, 1, 1, 1, 1, 1, \
262 1, 1, 1, 1, 1, 1, 1, 1, \
263 1, 1, 1, 1, 0, 0, 0, 0, \
264 0, 0, 0, 0, 0, 0, 1, 1, \
265 1, 1, \
266 1, 1}
268 /* List the order in which to allocate registers. Each register must be
269 listed once, even those in FIXED_REGISTERS.
271 On the 850, we make the return registers first, then all of the volatile
272 registers, then the saved registers in reverse order to better save the
273 registers with an out of line function, and finally the fixed
274 registers. */
276 #define REG_ALLOC_ORDER \
278 10, 11, /* return registers */ \
279 12, 13, 14, 15, 16, 17, 18, 19, /* scratch registers */ \
280 6, 7, 8, 9, 31, /* argument registers */ \
281 29, 28, 27, 26, 25, 24, 23, 22, /* saved registers */ \
282 21, 20, 2, \
283 0, 1, 3, 4, 5, 30, 32, 33, /* fixed registers */ \
284 34, 35 \
287 /* Return number of consecutive hard regs needed starting at reg REGNO
288 to hold something of mode MODE.
290 This is ordinarily the length in words of a value of mode MODE
291 but can be less for certain modes in special long registers. */
293 #define HARD_REGNO_NREGS(REGNO, MODE) \
294 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
296 /* Value is 1 if hard register REGNO can hold a value of machine-mode
297 MODE. */
299 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
300 ((GET_MODE_SIZE (MODE) <= 4) || (((REGNO) & 1) == 0 && (REGNO) != 0))
302 /* Value is 1 if it is a good idea to tie two pseudo registers
303 when one has mode MODE1 and one has mode MODE2.
304 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
305 for any hard reg, then this must be 0 for correct output. */
306 #define MODES_TIEABLE_P(MODE1, MODE2) \
307 (MODE1 == MODE2 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4))
310 /* Define the classes of registers for register constraints in the
311 machine description. Also define ranges of constants.
313 One of the classes must always be named ALL_REGS and include all hard regs.
314 If there is more than one class, another class must be named NO_REGS
315 and contain no registers.
317 The name GENERAL_REGS must be the name of a class (or an alias for
318 another name such as ALL_REGS). This is the class of registers
319 that is allowed by "g" or "r" in a register constraint.
320 Also, registers outside this class are allocated only when
321 instructions express preferences for them.
323 The classes must be numbered in nondecreasing order; that is,
324 a larger-numbered class must never be contained completely
325 in a smaller-numbered class.
327 For any two classes, it is very desirable that there be another
328 class that represents their union. */
330 enum reg_class
332 NO_REGS, EVEN_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
335 #define N_REG_CLASSES (int) LIM_REG_CLASSES
337 /* Give names of register classes as strings for dump file. */
339 #define REG_CLASS_NAMES \
340 { "NO_REGS", "EVEN_REGS", "GENERAL_REGS", "ALL_REGS", "LIM_REGS" }
342 /* Define which registers fit in which classes.
343 This is an initializer for a vector of HARD_REG_SET
344 of length N_REG_CLASSES. */
346 #define REG_CLASS_CONTENTS \
348 { 0x00000000,0x0 }, /* NO_REGS */ \
349 { 0x55555554,0x0 }, /* EVEN_REGS */ \
350 { 0xfffffffe,0x0 }, /* GENERAL_REGS */ \
351 { 0xffffffff,0x0 }, /* ALL_REGS */ \
354 /* The same information, inverted:
355 Return the class number of the smallest class containing
356 reg number REGNO. This could be a conditional expression
357 or could index an array. */
359 #define REGNO_REG_CLASS(REGNO) ((REGNO == CC_REGNUM || REGNO == FCC_REGNUM) ? NO_REGS : GENERAL_REGS)
361 /* The class value for index registers, and the one for base regs. */
363 #define INDEX_REG_CLASS NO_REGS
364 #define BASE_REG_CLASS GENERAL_REGS
366 /* Macros to check register numbers against specific register classes. */
368 /* These assume that REGNO is a hard or pseudo reg number.
369 They give nonzero only if REGNO is a hard reg of the suitable class
370 or a pseudo reg currently allocated to a suitable hard reg.
371 Since they use reg_renumber, they are safe only once reg_renumber
372 has been allocated, which happens in reginfo.c during register
373 allocation. */
375 #define REGNO_OK_FOR_BASE_P(regno) \
376 (((regno) < FIRST_PSEUDO_REGISTER \
377 && (regno) != CC_REGNUM \
378 && (regno) != FCC_REGNUM) \
379 || reg_renumber[regno] >= 0)
381 #define REGNO_OK_FOR_INDEX_P(regno) 0
383 /* Convenience wrappers around insn_const_int_ok_for_constraint. */
385 #define CONST_OK_FOR_I(VALUE) \
386 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_I)
387 #define CONST_OK_FOR_J(VALUE) \
388 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_J)
389 #define CONST_OK_FOR_K(VALUE) \
390 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_K)
391 #define CONST_OK_FOR_L(VALUE) \
392 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_L)
393 #define CONST_OK_FOR_M(VALUE) \
394 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_M)
395 #define CONST_OK_FOR_N(VALUE) \
396 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_N)
397 #define CONST_OK_FOR_O(VALUE) \
398 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_O)
399 #define CONST_OK_FOR_W(VALUE) \
400 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_W)
402 /* Stack layout; function entry, exit and calling. */
404 /* Define this if pushing a word on the stack
405 makes the stack pointer a smaller address. */
407 #define STACK_GROWS_DOWNWARD
409 /* Define this to nonzero if the nominal address of the stack frame
410 is at the high-address end of the local variables;
411 that is, each additional local variable allocated
412 goes at a more negative offset in the frame. */
414 #define FRAME_GROWS_DOWNWARD 1
416 /* Offset within stack frame to start allocating local variables at.
417 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
418 first local allocated. Otherwise, it is the offset to the BEGINNING
419 of the first local allocated. */
421 #define STARTING_FRAME_OFFSET 0
423 /* Offset of first parameter from the argument pointer register value. */
424 /* Is equal to the size of the saved fp + pc, even if an fp isn't
425 saved since the value is used before we know. */
427 #define FIRST_PARM_OFFSET(FNDECL) 0
429 /* Specify the registers used for certain standard purposes.
430 The values of these macros are register numbers. */
432 /* Register to use for pushing function arguments. */
433 #define STACK_POINTER_REGNUM SP_REGNUM
435 /* Base register for access to local variables of the function. */
436 #define FRAME_POINTER_REGNUM 34
438 /* Register containing return address from latest function call. */
439 #define LINK_POINTER_REGNUM LP_REGNUM
441 /* On some machines the offset between the frame pointer and starting
442 offset of the automatic variables is not known until after register
443 allocation has been done (for example, because the saved registers
444 are between these two locations). On those machines, define
445 `FRAME_POINTER_REGNUM' the number of a special, fixed register to
446 be used internally until the offset is known, and define
447 `HARD_FRAME_POINTER_REGNUM' to be actual the hard register number
448 used for the frame pointer.
450 You should define this macro only in the very rare circumstances
451 when it is not possible to calculate the offset between the frame
452 pointer and the automatic variables until after register
453 allocation has been completed. When this macro is defined, you
454 must also indicate in your definition of `ELIMINABLE_REGS' how to
455 eliminate `FRAME_POINTER_REGNUM' into either
456 `HARD_FRAME_POINTER_REGNUM' or `STACK_POINTER_REGNUM'.
458 Do not define this macro if it would be the same as
459 `FRAME_POINTER_REGNUM'. */
460 #undef HARD_FRAME_POINTER_REGNUM
461 #define HARD_FRAME_POINTER_REGNUM 29
463 /* Base register for access to arguments of the function. */
464 #define ARG_POINTER_REGNUM 35
466 /* Register in which static-chain is passed to a function. */
467 #define STATIC_CHAIN_REGNUM 20
469 /* If defined, this macro specifies a table of register pairs used to
470 eliminate unneeded registers that point into the stack frame. If
471 it is not defined, the only elimination attempted by the compiler
472 is to replace references to the frame pointer with references to
473 the stack pointer.
475 The definition of this macro is a list of structure
476 initializations, each of which specifies an original and
477 replacement register.
479 On some machines, the position of the argument pointer is not
480 known until the compilation is completed. In such a case, a
481 separate hard register must be used for the argument pointer.
482 This register can be eliminated by replacing it with either the
483 frame pointer or the argument pointer, depending on whether or not
484 the frame pointer has been eliminated.
486 In this case, you might specify:
487 #define ELIMINABLE_REGS \
488 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
489 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
490 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
492 Note that the elimination of the argument pointer with the stack
493 pointer is specified first since that is the preferred elimination. */
495 #define ELIMINABLE_REGS \
496 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
497 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
498 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
499 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }} \
501 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
502 specifies the initial difference between the specified pair of
503 registers. This macro must be defined if `ELIMINABLE_REGS' is
504 defined. */
506 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
508 if ((FROM) == FRAME_POINTER_REGNUM) \
509 (OFFSET) = get_frame_size () + crtl->outgoing_args_size; \
510 else if ((FROM) == ARG_POINTER_REGNUM) \
511 (OFFSET) = compute_frame_size (get_frame_size (), (long *)0); \
512 else \
513 gcc_unreachable (); \
516 /* Keep the stack pointer constant throughout the function. */
517 #define ACCUMULATE_OUTGOING_ARGS 1
519 #define RETURN_ADDR_RTX(COUNT, FP) v850_return_addr (COUNT)
521 /* Define a data type for recording info about an argument list
522 during the scan of that argument list. This data type should
523 hold all necessary information about the function itself
524 and about the args processed so far, enough to enable macros
525 such as FUNCTION_ARG to determine where the next arg should go. */
527 #define CUMULATIVE_ARGS struct cum_arg
528 struct cum_arg { int nbytes; };
530 /* Initialize a variable CUM of type CUMULATIVE_ARGS
531 for a call to a function whose data type is FNTYPE.
532 For a library call, FNTYPE is 0. */
534 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
535 do { (CUM).nbytes = 0; } while (0)
537 /* When a parameter is passed in a register, stack space is still
538 allocated for it. */
539 #define REG_PARM_STACK_SPACE(DECL) 0
541 /* 1 if N is a possible register number for function argument passing. */
543 #define FUNCTION_ARG_REGNO_P(N) (N >= 6 && N <= 9)
545 /* Define how to find the value returned by a library function
546 assuming the value has mode MODE. */
548 #define LIBCALL_VALUE(MODE) \
549 gen_rtx_REG (MODE, 10)
551 #define DEFAULT_PCC_STRUCT_RETURN 0
553 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
554 the stack pointer does not matter. The value is tested only in
555 functions that have frame pointers.
556 No definition is equivalent to always zero. */
558 #define EXIT_IGNORE_STACK 1
560 /* Define this macro as a C expression that is nonzero for registers
561 used by the epilogue or the `return' pattern. */
563 #define EPILOGUE_USES(REGNO) \
564 (reload_completed && (REGNO) == LINK_POINTER_REGNUM)
566 /* Output assembler code to FILE to increment profiler label # LABELNO
567 for profiling a function entry. */
569 #define FUNCTION_PROFILER(FILE, LABELNO) ;
571 /* Length in units of the trampoline for entering a nested function. */
573 #define TRAMPOLINE_SIZE 24
575 /* Addressing modes, and classification of registers for them. */
578 /* 1 if X is an rtx for a constant that is a valid address. */
580 /* ??? This seems too exclusive. May get better code by accepting more
581 possibilities here, in particular, should accept ZDA_NAME SYMBOL_REFs. */
583 #define CONSTANT_ADDRESS_P(X) constraint_satisfied_p (X, CONSTRAINT_K)
585 /* Maximum number of registers that can appear in a valid memory address. */
587 #define MAX_REGS_PER_ADDRESS 1
589 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
590 and check its validity for a certain class.
591 We have two alternate definitions for each of them.
592 The usual definition accepts all pseudo regs; the other rejects
593 them unless they have been allocated suitable hard regs.
594 The symbol REG_OK_STRICT causes the latter definition to be used.
596 Most source files want to accept pseudo regs in the hope that
597 they will get allocated to the class that the insn wants them to be in.
598 Source files for reload pass need to be strict.
599 After reload, it makes no difference, since pseudo regs have
600 been eliminated by then. */
602 #ifndef REG_OK_STRICT
604 /* Nonzero if X is a hard reg that can be used as an index
605 or if it is a pseudo reg. */
606 #define REG_OK_FOR_INDEX_P(X) 0
607 /* Nonzero if X is a hard reg that can be used as a base reg
608 or if it is a pseudo reg. */
609 #define REG_OK_FOR_BASE_P(X) 1
610 #define REG_OK_FOR_INDEX_P_STRICT(X) 0
611 #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X))
612 #define STRICT 0
614 #else
616 /* Nonzero if X is a hard reg that can be used as an index. */
617 #define REG_OK_FOR_INDEX_P(X) 0
618 /* Nonzero if X is a hard reg that can be used as a base reg. */
619 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
620 #define STRICT 1
622 #endif
625 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
626 that is a valid memory address for an instruction.
627 The MODE argument is the machine mode for the MEM expression
628 that wants to use this address.
630 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
631 except for CONSTANT_ADDRESS_P which is actually
632 machine-independent. */
634 /* Accept either REG or SUBREG where a register is valid. */
636 #define RTX_OK_FOR_BASE_P(X) \
637 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
638 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
639 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
641 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
642 do { \
643 if (RTX_OK_FOR_BASE_P (X)) \
644 goto ADDR; \
645 if (CONSTANT_ADDRESS_P (X) \
646 && (MODE == QImode || INTVAL (X) % 2 == 0) \
647 && (GET_MODE_SIZE (MODE) <= 4 || INTVAL (X) % 4 == 0)) \
648 goto ADDR; \
649 if (GET_CODE (X) == LO_SUM \
650 && REG_P (XEXP (X, 0)) \
651 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
652 && CONSTANT_P (XEXP (X, 1)) \
653 && (GET_CODE (XEXP (X, 1)) != CONST_INT \
654 || ((MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \
655 && CONST_OK_FOR_K (INTVAL (XEXP (X, 1))))) \
656 && GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode)) \
657 goto ADDR; \
658 if (special_symbolref_operand (X, MODE) \
659 && (GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode))) \
660 goto ADDR; \
661 if (GET_CODE (X) == PLUS \
662 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
663 && constraint_satisfied_p (XEXP (X,1), CONSTRAINT_K) \
664 && ((MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \
665 && CONST_OK_FOR_K (INTVAL (XEXP (X, 1)) \
666 + (GET_MODE_NUNITS (MODE) * UNITS_PER_WORD)))) \
667 goto ADDR; \
668 } while (0)
671 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
672 return the mode to be used for the comparison.
674 For floating-point equality comparisons, CCFPEQmode should be used.
675 VOIDmode should be used in all other cases.
677 For integer comparisons against zero, reduce to CCNOmode or CCZmode if
678 possible, to allow for more combinations. */
680 #define SELECT_CC_MODE(OP, X, Y) v850_select_cc_mode (OP, X, Y)
682 /* Tell final.c how to eliminate redundant test instructions. */
684 /* Here we define machine-dependent flags and fields in cc_status
685 (see `conditions.h'). No extra ones are needed for the VAX. */
687 /* Store in cc_status the expressions
688 that the condition codes will describe
689 after execution of an instruction whose pattern is EXP.
690 Do not alter them if the instruction would not alter the cc's. */
692 #define CC_OVERFLOW_UNUSABLE 0x200
693 #define CC_NO_CARRY CC_NO_OVERFLOW
694 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
696 /* Nonzero if access to memory by bytes or half words is no faster
697 than accessing full words. */
698 #define SLOW_BYTE_ACCESS 1
700 /* According expr.c, a value of around 6 should minimize code size, and
701 for the V850 series, that's our primary concern. */
702 #define MOVE_RATIO(speed) 6
704 /* Indirect calls are expensive, never turn a direct call
705 into an indirect call. */
706 #define NO_FUNCTION_CSE
708 /* The four different data regions on the v850. */
709 typedef enum
711 DATA_AREA_NORMAL,
712 DATA_AREA_SDA,
713 DATA_AREA_TDA,
714 DATA_AREA_ZDA
715 } v850_data_area;
717 #define TEXT_SECTION_ASM_OP "\t.section .text"
718 #define DATA_SECTION_ASM_OP "\t.section .data"
719 #define BSS_SECTION_ASM_OP "\t.section .bss"
720 #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\""
721 #define SBSS_SECTION_ASM_OP "\t.section .sbss,\"aw\""
723 #define SCOMMON_ASM_OP "\t.scomm\t"
724 #define ZCOMMON_ASM_OP "\t.zcomm\t"
725 #define TCOMMON_ASM_OP "\t.tcomm\t"
727 #define ASM_COMMENT_START "#"
729 /* Output to assembler file text saying following lines
730 may contain character constants, extra white space, comments, etc. */
732 #define ASM_APP_ON "#APP\n"
734 /* Output to assembler file text saying following lines
735 no longer contain unusual constructs. */
737 #define ASM_APP_OFF "#NO_APP\n"
739 #undef USER_LABEL_PREFIX
740 #define USER_LABEL_PREFIX "_"
742 /* This says how to output the assembler to define a global
743 uninitialized but not common symbol. */
745 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
746 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
748 #undef ASM_OUTPUT_ALIGNED_BSS
749 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
750 v850_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
752 /* This says how to output the assembler to define a global
753 uninitialized, common symbol. */
754 #undef ASM_OUTPUT_ALIGNED_COMMON
755 #undef ASM_OUTPUT_COMMON
756 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
757 v850_output_common (FILE, DECL, NAME, SIZE, ALIGN)
759 /* This says how to output the assembler to define a local
760 uninitialized symbol. */
761 #undef ASM_OUTPUT_ALIGNED_LOCAL
762 #undef ASM_OUTPUT_LOCAL
763 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
764 v850_output_local (FILE, DECL, NAME, SIZE, ALIGN)
766 /* Globalizing directive for a label. */
767 #define GLOBAL_ASM_OP "\t.global "
769 #define ASM_PN_FORMAT "%s___%lu"
771 /* This is how we tell the assembler that two symbols have the same value. */
773 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
774 do { assemble_name(FILE, NAME1); \
775 fputs(" = ", FILE); \
776 assemble_name(FILE, NAME2); \
777 fputc('\n', FILE); } while (0)
780 /* How to refer to registers in assembler output.
781 This sequence is indexed by compiler's hard-register-number (see above). */
783 #define REGISTER_NAMES \
784 { "r0", "r1", "r2", "sp", "gp", "r5", "r6" , "r7", \
785 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
786 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
787 "r24", "r25", "r26", "r27", "r28", "r29", "ep", "r31", \
788 "psw", "fcc", \
789 ".fp", ".ap"}
791 /* Register numbers */
793 #define ADDITIONAL_REGISTER_NAMES \
794 { { "zero", ZERO_REGNUM }, \
795 { "hp", 2 }, \
796 { "r3", 3 }, \
797 { "r4", 4 }, \
798 { "tp", 5 }, \
799 { "fp", 29 }, \
800 { "r30", 30 }, \
801 { "lp", LP_REGNUM} }
803 /* This is how to output an element of a case-vector that is absolute. */
805 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
806 fprintf (FILE, "\t%s .L%d\n", \
807 (TARGET_BIG_SWITCH ? ".long" : ".short"), VALUE)
809 /* This is how to output an element of a case-vector that is relative. */
811 /* Disable the shift, which is for the currently disabled "switch"
812 opcode. Se casesi in v850.md. */
814 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
815 fprintf (FILE, "\t%s %s.L%d-.L%d%s\n", \
816 (TARGET_BIG_SWITCH ? ".long" : ".short"), \
817 (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E_UP) ? "(" : ""), \
818 VALUE, REL, \
819 (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E_UP) ? ")>>1" : ""))
821 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
822 if ((LOG) != 0) \
823 fprintf (FILE, "\t.align %d\n", (LOG))
825 /* We don't have to worry about dbx compatibility for the v850. */
826 #define DEFAULT_GDB_EXTENSIONS 1
828 /* Use dwarf2 debugging info by default. */
829 #undef PREFERRED_DEBUGGING_TYPE
830 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
832 #define DWARF2_FRAME_INFO 1
833 #define DWARF2_UNWIND_INFO 0
834 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LINK_POINTER_REGNUM)
835 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_POINTER_REGNUM)
837 #ifndef ASM_GENERATE_INTERNAL_LABEL
838 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
839 sprintf (STRING, "*.%s%u", PREFIX, (unsigned int)(NUM))
840 #endif
842 /* Specify the machine mode that this machine uses
843 for the index in the tablejump instruction. */
844 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : HImode)
846 /* Define as C expression which evaluates to nonzero if the tablejump
847 instruction expects the table to contain offsets from the address of the
848 table.
849 Do not define this if the table should contain absolute addresses. */
850 #define CASE_VECTOR_PC_RELATIVE 1
852 /* The switch instruction requires that the jump table immediately follow
853 it. */
854 #define JUMP_TABLES_IN_TEXT_SECTION (!TARGET_JUMP_TABLES_IN_DATA_SECTION)
856 #undef ASM_OUTPUT_BEFORE_CASE_LABEL
857 #define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
858 ASM_OUTPUT_ALIGN ((FILE), (TARGET_BIG_SWITCH ? 2 : 1));
860 #define WORD_REGISTER_OPERATIONS
862 /* Byte and short loads sign extend the value to a word. */
863 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
865 /* Max number of bytes we can move from memory to memory
866 in one reasonably fast instruction. */
867 #define MOVE_MAX 4
869 /* Define if shifts truncate the shift count
870 which implies one can omit a sign-extension or zero-extension
871 of a shift count. */
872 #define SHIFT_COUNT_TRUNCATED 1
874 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
875 is done just by pretending it is already truncated. */
876 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
878 /* Specify the machine mode that pointers have.
879 After generation of rtl, the compiler makes no further distinction
880 between pointers and any other objects of this machine mode. */
881 #define Pmode SImode
883 /* A function address in a call instruction
884 is a byte address (for indexing purposes)
885 so give the MEM rtx a byte's mode. */
886 #define FUNCTION_MODE QImode
888 /* Tell compiler we want to support GHS pragmas */
889 #define REGISTER_TARGET_PRAGMAS() do { \
890 c_register_pragma ("ghs", "interrupt", ghs_pragma_interrupt); \
891 c_register_pragma ("ghs", "section", ghs_pragma_section); \
892 c_register_pragma ("ghs", "starttda", ghs_pragma_starttda); \
893 c_register_pragma ("ghs", "startsda", ghs_pragma_startsda); \
894 c_register_pragma ("ghs", "startzda", ghs_pragma_startzda); \
895 c_register_pragma ("ghs", "endtda", ghs_pragma_endtda); \
896 c_register_pragma ("ghs", "endsda", ghs_pragma_endsda); \
897 c_register_pragma ("ghs", "endzda", ghs_pragma_endzda); \
898 } while (0)
900 /* enum GHS_SECTION_KIND is an enumeration of the kinds of sections that
901 can appear in the "ghs section" pragma. These names are used to index
902 into the GHS_default_section_names[] and GHS_current_section_names[]
903 that are defined in v850.c, and so the ordering of each must remain
904 consistent.
906 These arrays give the default and current names for each kind of
907 section defined by the GHS pragmas. The current names can be changed
908 by the "ghs section" pragma. If the current names are null, use
909 the default names. Note that the two arrays have different types.
911 For the *normal* section kinds (like .data, .text, etc.) we do not
912 want to explicitly force the name of these sections, but would rather
913 let the linker (or at least the back end) choose the name of the
914 section, UNLESS the user has force a specific name for these section
915 kinds. To accomplish this set the name in ghs_default_section_names
916 to null. */
918 enum GHS_section_kind
920 GHS_SECTION_KIND_DEFAULT,
922 GHS_SECTION_KIND_TEXT,
923 GHS_SECTION_KIND_DATA,
924 GHS_SECTION_KIND_RODATA,
925 GHS_SECTION_KIND_BSS,
926 GHS_SECTION_KIND_SDATA,
927 GHS_SECTION_KIND_ROSDATA,
928 GHS_SECTION_KIND_TDATA,
929 GHS_SECTION_KIND_ZDATA,
930 GHS_SECTION_KIND_ROZDATA,
932 COUNT_OF_GHS_SECTION_KINDS /* must be last */
935 /* The following code is for handling pragmas supported by the
936 v850 compiler produced by Green Hills Software. This is at
937 the specific request of a customer. */
939 typedef struct data_area_stack_element
941 struct data_area_stack_element * prev;
942 v850_data_area data_area; /* Current default data area. */
943 } data_area_stack_element;
945 /* Track the current data area set by the
946 data area pragma (which can be nested). */
947 extern data_area_stack_element * data_area_stack;
949 /* Names of the various data areas used on the v850. */
950 extern tree GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
951 extern tree GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
953 /* The assembler op to start the file. */
955 #define FILE_ASM_OP "\t.file\n"
957 /* Implement ZDA, TDA, and SDA */
959 #define EP_REGNUM 30 /* ep register number */
961 #define SYMBOL_FLAG_ZDA (SYMBOL_FLAG_MACH_DEP << 0)
962 #define SYMBOL_FLAG_TDA (SYMBOL_FLAG_MACH_DEP << 1)
963 #define SYMBOL_FLAG_SDA (SYMBOL_FLAG_MACH_DEP << 2)
964 #define SYMBOL_REF_ZDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ZDA) != 0)
965 #define SYMBOL_REF_TDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_TDA) != 0)
966 #define SYMBOL_REF_SDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SDA) != 0)
968 #define TARGET_ASM_INIT_SECTIONS v850_asm_init_sections
970 /* Define this so that the cc1plus will not think that system header files
971 need an implicit 'extern "C" { ... }' assumed. This breaks testing C++
972 in a build directory where the libstdc++ header files are found via a
973 -isystem <path-to-build-dir>. */
974 #define NO_IMPLICIT_EXTERN_C
976 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
977 ((LENGTH) = v850_adjust_insn_length ((INSN), (LENGTH)))
979 #endif /* ! GCC_V850_H */