gcc/config/score/score.h

   1 /* score.h for Sunplus S+CORE processor
   2    Copyright (C) 2005-2014 Free Software Foundation, Inc.
   3    Contributed by Sunnorth.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 3, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING3.  If not see
  19    <http://www.gnu.org/licenses/>.  */
  20
  21 #include "score-conv.h"
  22
  23 #undef CC1_SPEC
  24 #define CC1_SPEC                 "%{!mel:-meb} %{mel:-mel } \
  25 %{!mscore*:-mscore7}    \
  26 %{mscore7:-mscore7}     \
  27 %{mscore7d:-mscore7d}   \
  28 %{G*}"
  29
  30 #undef ASM_SPEC
  31 #define ASM_SPEC                 "%{!mel:-EB} %{mel:-EL} \
  32 %{!mscore*:-march=score7}         \
  33 %{mscore7:-march=score7}          \
  34 %{mscore7d:-march=score7}         \
  35 %{march=score7:-march=score7}     \
  36 %{march=score7d:-march=score7}    \
  37 %{G*}"
  38
  39 #undef LINK_SPEC
  40 #define LINK_SPEC                "%{!mel:-EB} %{mel:-EL} \
  41 %{!mscore*:-mscore7_elf}          \
  42 %{mscore7:-mscore7_elf}           \
  43 %{mscore7d:-mscore7_elf}          \
  44 %{march=score7:-mscore7_elf}      \
  45 %{march=score7d:-mscore7_elf}     \
  46 %{G*}"
  47
  48 /* Run-time Target Specification.  */
  49 #define TARGET_CPU_CPP_BUILTINS()               \
  50   do {                                          \
  51     builtin_define ("SUNPLUS");                 \
  52     builtin_define ("__SCORE__");               \
  53     builtin_define ("__score__");               \
  54     if (TARGET_LITTLE_ENDIAN)                   \
  55       builtin_define ("__scorele__");           \
  56     else                                        \
  57       builtin_define ("__scorebe__");           \
  58     if (TARGET_SCORE7)                          \
  59       builtin_define ("__score7__");            \
  60     if (TARGET_SCORE7D)                         \
  61       builtin_define ("__score7d__");           \
  62   } while (0)
  63
  64 #define TARGET_DEFAULT         0
  65
  66 #define SCORE_GCC_VERSION      "1.6"
  67
  68 /* Target machine storage layout.  */
  69 #define BITS_BIG_ENDIAN        0
  70 #define BYTES_BIG_ENDIAN       (TARGET_LITTLE_ENDIAN == 0)
  71 #define WORDS_BIG_ENDIAN       (TARGET_LITTLE_ENDIAN == 0)
  72
  73 /* Width of a word, in units (bytes).  */
  74 #define UNITS_PER_WORD                 4
  75
  76 /* Define this macro if it is advisable to hold scalars in registers
  77    in a wider mode than that declared by the program.  In such cases,
  78    the value is constrained to be within the bounds of the declared
  79    type, but kept valid in the wider mode.  The signedness of the
  80    extension may differ from that of the type.  */
  81 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
  82   if (GET_MODE_CLASS (MODE) == MODE_INT         \
  83       && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
  84     (MODE) = SImode;
  85
  86 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
  87 #define PARM_BOUNDARY                  BITS_PER_WORD
  88 #define STACK_BOUNDARY                 BITS_PER_WORD
  89
  90 /* Allocation boundary (in *bits*) for the code of a function.  */
  91 #define FUNCTION_BOUNDARY              BITS_PER_WORD
  92
  93 /* There is no point aligning anything to a rounder boundary than this.  */
  94 #define BIGGEST_ALIGNMENT              LONG_DOUBLE_TYPE_SIZE
  95
  96 /* If defined, a C expression to compute the alignment for a static
  97    variable.  TYPE is the data type, and ALIGN is the alignment that
  98    the object would ordinarily have.  The value of this macro is used
  99    instead of that alignment to align the object.
 100
 101    If this macro is not defined, then ALIGN is used.
 102
 103    One use of this macro is to increase alignment of medium-size
 104    data to make it all fit in fewer cache lines.  Another is to
 105    cause character arrays to be word-aligned so that `strcpy' calls
 106    that copy constants to character arrays can be done inline.  */
 107 #define DATA_ALIGNMENT(TYPE, ALIGN)                                      \
 108   ((((ALIGN) < BITS_PER_WORD)                                            \
 109     && (TREE_CODE (TYPE) == ARRAY_TYPE                                   \
 110         || TREE_CODE (TYPE) == UNION_TYPE                                \
 111         || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
 112
 113 /* If defined, a C expression to compute the alignment given to a
 114    constant that is being placed in memory.  EXP is the constant
 115    and ALIGN is the alignment that the object would ordinarily have.
 116    The value of this macro is used instead of that alignment to align
 117    the object.
 118
 119    If this macro is not defined, then ALIGN is used.
 120
 121    The typical use of this macro is to increase alignment for string
 122    constants to be word aligned so that `strcpy' calls that copy
 123    constants can be done inline.  */
 124 #define CONSTANT_ALIGNMENT(EXP, ALIGN)                                  \
 125   ((TREE_CODE (EXP) == STRING_CST  || TREE_CODE (EXP) == CONSTRUCTOR)   \
 126    && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
 127
 128 /* If defined, a C expression to compute the alignment for a local
 129    variable.  TYPE is the data type, and ALIGN is the alignment that
 130    the object would ordinarily have.  The value of this macro is used
 131    instead of that alignment to align the object.
 132
 133    If this macro is not defined, then ALIGN is used.
 134
 135    One use of this macro is to increase alignment of medium-size
 136    data to make it all fit in fewer cache lines.  */
 137 #define LOCAL_ALIGNMENT(TYPE, ALIGN)                                    \
 138   ((TREE_CODE (TYPE) == ARRAY_TYPE                                      \
 139     && TYPE_MODE (TREE_TYPE (TYPE)) == QImode                           \
 140     && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN))
 141
 142 /* Alignment of field after `int : 0' in a structure.  */
 143 #define EMPTY_FIELD_BOUNDARY           32
 144
 145 /* All accesses must be aligned.  */
 146 #define STRICT_ALIGNMENT               1
 147
 148 /* Score requires that structure alignment is affected by bitfields.  */
 149 #define PCC_BITFIELD_TYPE_MATTERS      1
 150
 151 /* long double is not a fixed mode, but the idea is that, if we
 152    support long double, we also want a 128-bit integer type.  */
 153 #define MAX_FIXED_MODE_SIZE            LONG_DOUBLE_TYPE_SIZE
 154
 155 /* Layout of Data Type.  */
 156 /* Set the sizes of the core types.  */
 157 #define INT_TYPE_SIZE                   32
 158 #define SHORT_TYPE_SIZE                 16
 159 #define LONG_TYPE_SIZE                  32
 160 #define LONG_LONG_TYPE_SIZE             64
 161 #define CHAR_TYPE_SIZE                  8
 162 #define FLOAT_TYPE_SIZE                 32
 163 #define DOUBLE_TYPE_SIZE                64
 164 #define LONG_DOUBLE_TYPE_SIZE           64
 165
 166 /* Define this as 1 if `char' should by default be signed; else as 0.  */
 167 #undef DEFAULT_SIGNED_CHAR
 168 #define DEFAULT_SIGNED_CHAR             1
 169
 170 /* Default definitions for size_t and ptrdiff_t.  */
 171 #define SIZE_TYPE                       "unsigned int"
 172
 173 #define UINTPTR_TYPE                    "long unsigned int"
 174
 175 /* Register Usage
 176
 177    S+core have:
 178    - 32 integer registers
 179    - 16 control registers (cond)
 180    - 16 special registers (ceh/cel/cnt/lcr/scr/arg/fp)
 181    - 32 coprocessors 1 registers
 182    - 32 coprocessors 2 registers
 183    - 32 coprocessors 3 registers.  */
 184 #define FIRST_PSEUDO_REGISTER           160
 185
 186 /* By default, fix the kernel registers (r30 and r31), the global
 187    pointer (r28) and the stack pointer (r0).  This can change
 188    depending on the command-line options.
 189
 190    Regarding coprocessor registers: without evidence to the contrary,
 191    it's best to assume that each coprocessor register has a unique
 192    use.  This can be overridden, in, e.g., TARGET_OPTION_OVERRIDE or
 193    TARGET_CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
 194    for a particular target.  */
 195
 196 /* Control Registers, use mfcr/mtcr insn
 197     32        cr0         PSR
 198     33        cr1         Condition
 199     34        cr2         ECR
 200     35        cr3         EXCPVec
 201     36        cr4         CCR
 202     37        cr5         EPC
 203     38        cr6         EMA
 204     39        cr7         TLBLock
 205     40        cr8         TLBPT
 206     41        cr8         PEADDR
 207     42        cr10        TLBRPT
 208     43        cr11        PEVN
 209     44        cr12        PECTX
 210     45        cr13
 211     46        cr14
 212     47        cr15
 213
 214     Custom Engine Register, use mfce/mtce
 215     48        CEH        CEH
 216     49        CEL        CEL
 217
 218     Special-Purpose Register, use mfsr/mtsr
 219     50        sr0        CNT
 220     51        sr1        LCR
 221     52        sr2        SCR
 222
 223     53        ARG_POINTER_REGNUM
 224     54        FRAME_POINTER_REGNUM
 225     but Control register have 32 registers, cr16-cr31.  */
 226 #define FIXED_REGISTERS                                  \
 227 {                                                        \
 228   /* General Purpose Registers  */                       \
 229   1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,        \
 230   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,        \
 231   /* Control Registers  */                               \
 232   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 233   /* CEH/ CEL/ CNT/ LCR/ SCR / ARG_POINTER_REGNUM/ FRAME_POINTER_REGNUM */\
 234   0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 235   /* CP 1 Registers  */                                  \
 236   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 237   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 238   /* CP 2 Registers  */                                  \
 239   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 240   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 241   /* CP 3 Registers  */                                  \
 242   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 243   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 244 }
 245
 246 #define CALL_USED_REGISTERS                              \
 247 {                                                        \
 248   /* General purpose register  */                        \
 249   1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,        \
 250   0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 251   /* Control Registers  */                               \
 252   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 253   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 254   /* CP 1 Registers  */                                  \
 255   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 256   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 257   /* CP 2 Registers  */                                  \
 258   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 259   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 260   /* CP 3 Registers  */                                  \
 261   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 262   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 263 }
 264
 265 #define REG_ALLOC_ORDER                                                   \
 266 {   0,  1,  6,  7,  8,  9, 10, 11,  4,  5, 22, 23, 24, 25, 26, 27,        \
 267    12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 28, 29, 30, 31,  2,  3,        \
 268    32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,        \
 269    48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,        \
 270    64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,        \
 271    80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,        \
 272    96, 97, 98, 99,100,101,102,103,104,105,106,107,108,109,110,111,        \
 273   112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,        \
 274   128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,        \
 275   144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159        }
 276
 277 /* Macro to conditionally modify fixed_regs/call_used_regs.  */
 278 #define PIC_OFFSET_TABLE_REGNUM          29
 279
 280 #define HARD_REGNO_NREGS(REGNO, MODE) \
 281   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 282
 283 /* Return true if REGNO is suitable for holding a quantity of type MODE.  */
 284 #define HARD_REGNO_MODE_OK(REGNO, MODE) score_hard_regno_mode_ok (REGNO, MODE)
 285
 286 /* Value is 1 if it is a good idea to tie two pseudo registers
 287    when one has mode MODE1 and one has mode MODE2.
 288    If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
 289    for any hard reg, then this must be 0 for correct output.  */
 290 #define MODES_TIEABLE_P(MODE1, MODE2)                             \
 291   ((GET_MODE_CLASS (MODE1) == MODE_FLOAT                          \
 292     || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)              \
 293    == (GET_MODE_CLASS (MODE2) == MODE_FLOAT                       \
 294        || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
 295
 296 /* Register Classes.  */
 297 /* Define the classes of registers for register constraints in the
 298    machine description.  Also define ranges of constants.  */
 299 enum reg_class
 300 {
 301   NO_REGS,
 302   G16_REGS,    /* r0 ~ r15 */
 303   G32_REGS,    /* r0 ~ r31 */
 304   T32_REGS,    /* r8 ~ r11 | r22 ~ r27 */
 305
 306   HI_REG,      /* hi                 */
 307   LO_REG,      /* lo                 */
 308   CE_REGS,     /* hi + lo            */
 309
 310   CN_REG,      /* cnt                */
 311   LC_REG,      /* lcb                */
 312   SC_REG,      /* scb                */
 313   SP_REGS,     /* cnt + lcb + scb    */
 314
 315   CR_REGS,     /* cr0 - cr15         */
 316
 317   CP1_REGS,    /* cp1                */
 318   CP2_REGS,    /* cp2                */
 319   CP3_REGS,    /* cp3                */
 320   CPA_REGS,    /* cp1 + cp2 + cp3    */
 321
 322   ALL_REGS,
 323   LIM_REG_CLASSES
 324 };
 325
 326 #define N_REG_CLASSES                  ((int) LIM_REG_CLASSES)
 327
 328 #define GENERAL_REGS                   G32_REGS
 329
 330 /* Give names of register classes as strings for dump file.  */
 331 #define REG_CLASS_NAMES           \
 332 {                                 \
 333   "NO_REGS",                      \
 334   "G16_REGS",                     \
 335   "G32_REGS",                     \
 336   "T32_REGS",                     \
 337                                   \
 338   "HI_REG",                       \
 339   "LO_REG",                       \
 340   "CE_REGS",                      \
 341                                   \
 342   "CN_REG",                       \
 343   "LC_REG",                       \
 344   "SC_REG",                       \
 345   "SP_REGS",                      \
 346                                   \
 347   "CR_REGS",                      \
 348                                   \
 349   "CP1_REGS",                     \
 350   "CP2_REGS",                     \
 351   "CP3_REGS",                     \
 352   "CPA_REGS",                     \
 353                                   \
 354   "ALL_REGS",                     \
 355 }
 356
 357 /* Define which registers fit in which classes.  */
 358 #define REG_CLASS_CONTENTS                                        \
 359 {                                                                 \
 360   /* NO_REGS/G16/G32/T32  */                                      \
 361   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},  \
 362   { 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000},  \
 363   { 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000},  \
 364   { 0x0fc00f00, 0x00000000, 0x00000000, 0x00000000, 0x00000000},  \
 365   /* HI/LO/CE  */                                                 \
 366   { 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000},  \
 367   { 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000},  \
 368   { 0x00000000, 0x00030000, 0x00000000, 0x00000000, 0x00000000},  \
 369   /* CN/LC/SC/SP/CR  */                                           \
 370   { 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000},  \
 371   { 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000},  \
 372   { 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000},  \
 373   { 0x00000000, 0x001c0000, 0x00000000, 0x00000000, 0x00000000},  \
 374   { 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000},  \
 375   /* CP1/CP2/CP3/CPA  */                                          \
 376   { 0x00000000, 0x00000000, 0xffffffff, 0x00000000, 0x00000000},  \
 377   { 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00000000},  \
 378   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffffff},  \
 379   { 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff},  \
 380   /* ALL_REGS  */                                                 \
 381   { 0xffffffff, 0x001fffff, 0xffffffff, 0xffffffff, 0xffffffff},  \
 382 }
 383
 384 /* A C expression whose value is a register class containing hard
 385    register REGNO.  In general there is more that one such class;
 386    choose a class which is "minimal", meaning that no smaller class
 387    also contains the register.  */
 388 #define REGNO_REG_CLASS(REGNO) (enum reg_class) score_reg_class (REGNO)
 389
 390 /* A macro whose definition is the name of the class to which a
 391    valid base register must belong.  A base register is one used in
 392    an address which is the register value plus a displacement.  */
 393 #define BASE_REG_CLASS                 G16_REGS
 394
 395 /* The class value for index registers.  */
 396 #define INDEX_REG_CLASS                NO_REGS
 397
 398 /* Addressing modes, and classification of registers for them.  */
 399 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
 400   score_regno_mode_ok_for_base_p (REGNO, 1)
 401
 402 #define REGNO_OK_FOR_INDEX_P(NUM)       0
 403
 404 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
 405   score_preferred_reload_class (X, CLASS)
 406
 407 /* If we need to load shorts byte-at-a-time, then we need a scratch.  */
 408 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
 409   score_secondary_reload_class (CLASS, MODE, X)
 410
 411 /* Return the register class of a scratch register needed to copy IN into
 412    or out of a register in CLASS in MODE.  If it can be done directly,
 413    NO_REGS is returned.  */
 414 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
 415   score_secondary_reload_class (CLASS, MODE, X)
 416
 417 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)    \
 418   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)        \
 419    ? reg_classes_intersect_p (HI_REG, (CLASS)) : 0)
 420
 421
 422 /* Basic Stack Layout.  */
 423 /* Stack layout; function entry, exit and calling.  */
 424 #define STACK_GROWS_DOWNWARD
 425
 426 #define STACK_PUSH_CODE                 PRE_DEC
 427 #define STACK_POP_CODE                  POST_INC
 428
 429 /* The offset of the first local variable from the beginning of the frame.
 430    See compute_frame_size for details about the frame layout.  */
 431 #define STARTING_FRAME_OFFSET           crtl->outgoing_args_size
 432
 433 /* The argument pointer always points to the first argument.  */
 434 #define FIRST_PARM_OFFSET(FUNDECL)      0
 435
 436 /* A C expression whose value is RTL representing the value of the return
 437    address for the frame COUNT steps up from the current frame.  */
 438 #define RETURN_ADDR_RTX(count, frame)   score_return_addr (count, frame)
 439
 440 /* Pick up the return address upon entry to a procedure.  */
 441 #define INCOMING_RETURN_ADDR_RTX        gen_rtx_REG (VOIDmode, RA_REGNUM)
 442
 443 /* Exception handling Support.  */
 444 /* Use r0 to r3 to pass exception handling information.  */
 445 #define EH_RETURN_DATA_REGNO(N) \
 446   ((N) < 4 ? (N) + ARG_REG_FIRST : INVALID_REGNUM)
 447
 448 /* The register that holds the return address in exception handlers.  */
 449 #define EH_RETURN_STACKADJ_RTX          gen_rtx_REG (Pmode, EH_REGNUM)
 450 #define EH_RETURN_HANDLER_RTX           gen_rtx_REG (SImode, 30)
 451
 452 /* Registers That Address the Stack Frame.  */
 453 /* Register to use for pushing function arguments.  */
 454 #define STACK_POINTER_REGNUM            SP_REGNUM
 455
 456 /* These two registers don't really exist: they get eliminated to either
 457    the stack or hard frame pointer.  */
 458 #define FRAME_POINTER_REGNUM            53
 459
 460 /*  we use r2 as the frame pointer.  */
 461 #define HARD_FRAME_POINTER_REGNUM       FP_REGNUM
 462
 463 #define ARG_POINTER_REGNUM              54
 464
 465 /* Register in which static-chain is passed to a function.  */
 466 #define STATIC_CHAIN_REGNUM             23
 467
 468 /* Elimination Frame Pointer and Arg Pointer  */
 469
 470 #define ELIMINABLE_REGS                                \
 471   {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},        \
 472    { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},   \
 473    { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},      \
 474    { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 475
 476 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 477   (OFFSET) = score_initial_elimination_offset ((FROM), (TO))
 478
 479 /* Passing Function Arguments on the Stack.  */
 480 /* Allocate stack space for arguments at the beginning of each function.  */
 481 #define ACCUMULATE_OUTGOING_ARGS        1
 482
 483 /* reserve stack space for all argument registers.  */
 484 #define REG_PARM_STACK_SPACE(FNDECL)    UNITS_PER_WORD
 485
 486 /* Define this if it is the responsibility of the caller to
 487    allocate the area reserved for arguments passed in registers.
 488    If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
 489    of this macro is to determine whether the space is included in
 490    `crtl->outgoing_args_size'.  */
 491 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
 492
 493 /* Passing Arguments in Registers  */
 494 /* A C type for declaring a variable that is used as the first argument of
 495    `FUNCTION_ARG' and other related values.  For some target machines, the
 496    type `int' suffices and can hold the number of bytes of argument so far.  */
 497 typedef struct score_args
 498 {
 499   unsigned int arg_number;             /* how many arguments have been seen  */
 500   unsigned int num_gprs;               /* number of gprs in use  */
 501   unsigned int stack_words;            /* number of words in stack  */
 502 } score_args_t;
 503
 504 #define CUMULATIVE_ARGS                score_args_t
 505
 506 /* Initialize a variable CUM of type CUMULATIVE_ARGS
 507    for a call to a function whose data type is FNTYPE.
 508    For a library call, FNTYPE is 0.  */
 509 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, n_named_args) \
 510   score_init_cumulative_args (&CUM, FNTYPE, LIBNAME)
 511
 512 /* 1 if N is a possible register number for function argument passing.
 513    We have no FP argument registers when soft-float.  When FP registers
 514    are 32 bits, we can't directly reference the odd numbered ones.  */
 515 #define FUNCTION_ARG_REGNO_P(REGNO) \
 516   REG_CONTAIN (REGNO, ARG_REG_FIRST, ARG_REG_NUM)
 517
 518 /* How Scalar Function Values Are Returned.  */
 519 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 520   score_function_value ((VALTYPE), (FUNC), VOIDmode)
 521
 522 #define LIBCALL_VALUE(MODE)  score_function_value (NULL_TREE, NULL, (MODE))
 523
 524 /* 1 if N is a possible register number for a function value.  */
 525 #define FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO) == (ARG_REG_FIRST))
 526
 527 #define PIC_FUNCTION_ADDR_REGNUM        (GP_REG_FIRST + 25)
 528
 529 /* How Large Values Are Returned.  */
 530 #define STRUCT_VALUE                    0
 531
 532 /* Function Entry and Exit  */
 533 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
 534    the stack pointer does not matter.  The value is tested only in
 535    functions that have frame pointers.
 536    No definition is equivalent to always zero.  */
 537 #define EXIT_IGNORE_STACK               1
 538
 539 /* Generating Code for Profiling  */
 540 /* Output assembler code to FILE to increment profiler label # LABELNO
 541    for profiling a function entry.  */
 542 #define FUNCTION_PROFILER(FILE, LABELNO)                              \
 543   do {                                                                \
 544     if (TARGET_SCORE7)                                                \
 545       {                                                               \
 546         fprintf (FILE, " .set r1  \n");                               \
 547         fprintf (FILE, " mv   r%d,r%d \n", AT_REGNUM, RA_REGNUM);     \
 548         fprintf (FILE, " subi r%d, %d \n", STACK_POINTER_REGNUM, 8);  \
 549         fprintf (FILE, " jl   _mcount \n");                           \
 550         fprintf (FILE, " .set nor1 \n");                              \
 551       }                                                               \
 552   } while (0)
 553
 554 /* Trampolines for Nested Functions.  */
 555 #define TRAMPOLINE_INSNS                6
 556
 557 /* A C expression for the size in bytes of the trampoline, as an integer.  */
 558 #define TRAMPOLINE_SIZE                (24 + GET_MODE_SIZE (ptr_mode) * 2)
 559
 560 #define HAVE_PRE_INCREMENT              1
 561 #define HAVE_PRE_DECREMENT              1
 562 #define HAVE_POST_INCREMENT             1
 563 #define HAVE_POST_DECREMENT             1
 564 #define HAVE_PRE_MODIFY_DISP            1
 565 #define HAVE_POST_MODIFY_DISP           1
 566 #define HAVE_PRE_MODIFY_REG             0
 567 #define HAVE_POST_MODIFY_REG            0
 568
 569 /* Maximum number of registers that can appear in a valid memory address.  */
 570 #define MAX_REGS_PER_ADDRESS            1
 571
 572 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
 573    and check its validity for a certain class.
 574    We have two alternate definitions for each of them.
 575    The usual definition accepts all pseudo regs; the other rejects them all.
 576    The symbol REG_OK_STRICT causes the latter definition to be used.
 577
 578    Most source files want to accept pseudo regs in the hope that
 579    they will get allocated to the class that the insn wants them to be in.
 580    Some source files that are used after register allocation
 581    need to be strict.  */
 582 #ifndef REG_OK_STRICT
 583 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
 584   score_regno_mode_ok_for_base_p (REGNO (X), 0)
 585 #else
 586 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
 587   score_regno_mode_ok_for_base_p (REGNO (X), 1)
 588 #endif
 589
 590 #define REG_OK_FOR_INDEX_P(X) 0
 591
 592 /* Condition Code Status.  */
 593 #define SELECT_CC_MODE(OP, X, Y)        score_select_cc_mode (OP, X, Y)
 594
 595 /* Return nonzero if SELECT_CC_MODE will never return MODE for a
 596    floating point inequality comparison.  */
 597 #define REVERSIBLE_CC_MODE(MODE)        1
 598
 599 /* Describing Relative Costs of Operations  */
 600 /* Try to generate sequences that don't involve branches.  */
 601 #define BRANCH_COST(speed_p, predictable_p) 2
 602
 603 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 604 #define SLOW_BYTE_ACCESS                1
 605
 606 /* Define this macro if it is as good or better to call a constant
 607    function address than to call an address kept in a register.  */
 608 #define NO_FUNCTION_CSE                 1
 609
 610 /* Dividing the Output into Sections (Texts, Data, ...).  */
 611 /* Define the strings to put out for each section in the object file.  */
 612 #define TEXT_SECTION_ASM_OP             "\t.text"
 613 #define DATA_SECTION_ASM_OP             "\t.data"
 614 #define SDATA_SECTION_ASM_OP            "\t.sdata"
 615
 616 #undef  READONLY_DATA_SECTION_ASM_OP
 617 #define READONLY_DATA_SECTION_ASM_OP    "\t.rdata"
 618
 619 /* The Overall Framework of an Assembler File  */
 620 /* How to start an assembler comment.
 621    The leading space is important.  */
 622 #define ASM_COMMENT_START               "#"
 623
 624 /* Output to assembler file text saying following lines
 625    may contain character constants, extra white space, comments, etc.  */
 626 #define ASM_APP_ON                     "#APP\n\t.set volatile\n"
 627
 628 /* Output to assembler file text saying following lines
 629    no longer contain unusual constructs.  */
 630 #define ASM_APP_OFF                     "#NO_APP\n\t.set optimize\n"
 631
 632 /* Output of Uninitialized Variables.  */
 633 /* This says how to define a global common symbol.  */
 634 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN)     \
 635   do {                                                                      \
 636     fputs ("\n\t.comm\t", STREAM);                                          \
 637     assemble_name (STREAM, NAME);                                           \
 638     fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n",           \
 639              SIZE, ALIGN / BITS_PER_UNIT);                                  \
 640   } while (0)
 641
 642 /* This says how to define a local common symbol (i.e., not visible to
 643    linker).  */
 644 #undef ASM_OUTPUT_ALIGNED_LOCAL
 645 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN)                 \
 646   do {                                                                      \
 647     fputs ("\n\t.lcomm\t", STREAM);                                         \
 648     assemble_name (STREAM, NAME);                                           \
 649     fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n",           \
 650              SIZE, ALIGN / BITS_PER_UNIT);                                  \
 651   } while (0)
 652
 653 /* Globalizing directive for a label.  */
 654 #define GLOBAL_ASM_OP                   "\t.globl\t"
 655
 656 /* Output and Generation of Labels  */
 657 /* This is how to declare a function name.  The actual work of
 658    emitting the label is moved to function_prologue, so that we can
 659    get the line number correctly emitted before the .ent directive,
 660    and after any .file directives.  Define as empty so that the function
 661    is not declared before the .ent directive elsewhere.  */
 662 #undef ASM_DECLARE_FUNCTION_NAME
 663 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)
 664
 665 #undef ASM_DECLARE_OBJECT_NAME
 666 #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL)   \
 667   do {                                                \
 668     assemble_name (STREAM, NAME);                     \
 669     fprintf (STREAM, ":\n");                          \
 670   } while (0)
 671
 672 /* This says how to output an external.  It would be possible not to
 673    output anything and let undefined symbol become external. However
 674    the assembler uses length information on externals to allocate in
 675    data/sdata bss/sbss, thereby saving exec time.  */
 676 #undef ASM_OUTPUT_EXTERNAL
 677 #define ASM_OUTPUT_EXTERNAL(STREAM, DECL, NAME) \
 678   score_output_external (STREAM, DECL, NAME)
 679
 680 /* This handles the magic '..CURRENT_FUNCTION' symbol, which means
 681    'the start of the function that this code is output in'.  */
 682 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
 683   fprintf ((STREAM), "%s", (NAME))
 684
 685 /* Local compiler-generated symbols must have a prefix that the assembler
 686    understands.  */
 687 #define LOCAL_LABEL_PREFIX              (TARGET_SCORE7 ? "." : "$")
 688
 689 #undef ASM_GENERATE_INTERNAL_LABEL
 690 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
 691   sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM))
 692
 693 /* Output of Assembler Instructions.  */
 694 #define REGISTER_NAMES                                                    \
 695 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",                         \
 696   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",                   \
 697   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",                 \
 698   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",                 \
 699                                                                           \
 700   "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",                 \
 701   "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",           \
 702                                                                           \
 703   "ceh", "cel", "sr0", "sr1", "sr2", "_arg", "_frame", "",                \
 704   "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",         \
 705                                                                           \
 706   "c1r0", "c1r1", "c1r2", "c1r3", "c1r4", "c1r5", "c1r6", "c1r7",         \
 707   "c1r8", "c1r9", "c1r10", "c1r11", "c1r12", "c1r13", "c1r14", "c1r15",   \
 708   "c1r16", "c1r17", "c1r18", "c1r19", "c1r20", "c1r21", "c1r22", "c1r23", \
 709   "c1r24", "c1r25", "c1r26", "c1r27", "c1r28", "c1r29", "c1r30", "c1r31", \
 710                                                                           \
 711   "c2r0", "c2r1", "c2r2", "c2r3", "c2r4", "c2r5", "c2r6", "c2r7",         \
 712   "c2r8", "c2r9", "c2r10", "c2r11", "c2r12", "c2r13", "c2r14", "c2r15",   \
 713   "c2r16", "c2r17", "c2r18", "c2r19", "c2r20", "c2r21", "c2r22", "c2r23", \
 714   "c2r24", "c2r25", "c2r26", "c2r27", "c2r28", "c2r29", "c2r30", "c2r31", \
 715                                                                           \
 716   "c3r0", "c3r1", "c3r2", "c3r3", "c3r4", "c3r5", "c3r6", "c3r7",         \
 717   "c3r8", "c3r9", "c3r10", "c3r11", "c3r12", "c3r13", "c3r14", "c3r15",   \
 718   "c3r16", "c3r17", "c3r18", "c3r19", "c3r20", "c3r21", "c3r22", "c3r23", \
 719   "c3r24", "c3r25", "c3r26", "c3r27", "c3r28", "c3r29", "c3r30", "c3r31", \
 720 }
 721
 722 /* Print operand X (an rtx) in assembler syntax to file FILE.  */
 723 #define PRINT_OPERAND(STREAM, X, CODE)  score_print_operand (STREAM, X, CODE)
 724
 725 /* A C expression which evaluates to true if CODE is a valid
 726    punctuation character for use in the `PRINT_OPERAND' macro.  */
 727 #define PRINT_OPERAND_PUNCT_VALID_P(C)  ((C) == '[' || (C) == ']')
 728
 729 /* Print a memory address as an operand to reference that memory location.  */
 730 #define PRINT_OPERAND_ADDRESS(STREAM, X) \
 731   score_print_operand_address (STREAM, X)
 732
 733 /* By default on the S+core, external symbols do not have an underscore
 734    prepended.  */
 735 #define USER_LABEL_PREFIX        ""
 736
 737 /* This is how to output an insn to push a register on the stack.  */
 738 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)           \
 739   do {                                               \
 740     if (TARGET_SCORE7)                               \
 741         fprintf (STREAM, "\tpush! %s,[%s]\n",        \
 742                  reg_names[REGNO],                   \
 743                  reg_names[STACK_POINTER_REGNUM]);   \
 744   } while (0)
 745
 746 /* This is how to output an insn to pop a register from the stack.  */
 747 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)            \
 748   do {                                               \
 749     if (TARGET_SCORE7)                               \
 750       fprintf (STREAM, "\tpop! %s,[%s]\n",           \
 751                reg_names[REGNO],                     \
 752                reg_names[STACK_POINTER_REGNUM]);     \
 753   } while (0)
 754
 755 /* Output of Dispatch Tables.  */
 756 /* This is how to output an element of a case-vector.  We can make the
 757    entries PC-relative in GP-relative when .gp(d)word is supported.  */
 758 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)                      \
 759   do {                                                                          \
 760     if (TARGET_SCORE7)                                                          \
 761       {                                                                         \
 762         if (flag_pic)                                                           \
 763           fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE);     \
 764         else                                                                    \
 765           fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE);       \
 766       }                                                                         \
 767   } while (0)
 768
 769 /* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL.  */
 770 #define ADDR_VEC_ALIGN(JUMPTABLE) (GET_MODE (PATTERN (JUMPTABLE)) == SImode ? 2 \
 771                                    : GET_MODE (PATTERN (JUMPTABLE)) == HImode ? 1 : 0)
 772
 773 /* This is how to output a label which precedes a jumptable.  Since
 774    Score3 instructions are 2 bytes, we may need explicit alignment here.  */
 775 #undef  ASM_OUTPUT_CASE_LABEL
 776 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE)             \
 777   do {                                                                  \
 778       if ((TARGET_SCORE7) && GET_MODE (PATTERN (JUMPTABLE)) == SImode)  \
 779         ASM_OUTPUT_ALIGN (FILE, 2);                                     \
 780       (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM);            \
 781   } while (0)
 782
 783 /* Specify the machine mode that this machine uses
 784    for the index in the tablejump instruction.  */
 785 #define CASE_VECTOR_MODE                SImode
 786
 787 /* This is how to output an element of a case-vector that is absolute.  */
 788 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
 789   fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE)
 790
 791 /* Assembler Commands for Exception Regions  */
 792 /* Since the S+core is encoded in the least-significant bit
 793    of the address, mask it off return addresses for purposes of
 794    finding exception handling regions.  */
 795 #define MASK_RETURN_ADDR               constm1_rtx
 796
 797 /* Assembler Commands for Alignment  */
 798 /* This is how to output an assembler line to advance the location
 799    counter by SIZE bytes.  */
 800 #undef ASM_OUTPUT_SKIP
 801 #define ASM_OUTPUT_SKIP(STREAM, SIZE) \
 802   fprintf (STREAM, "\t.space\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
 803
 804 /* This is how to output an assembler line
 805    that says to advance the location counter
 806    to a multiple of 2**LOG bytes.  */
 807 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
 808   fprintf (STREAM, "\t.align\t%d\n", (LOG))
 809
 810 /* Macros Affecting All Debugging Formats.  */
 811 #ifndef PREFERRED_DEBUGGING_TYPE
 812 #define PREFERRED_DEBUGGING_TYPE         DWARF2_DEBUG
 813 #endif
 814
 815 /* Specific Options for DBX Output.  */
 816 #define DBX_DEBUGGING_INFO              1
 817
 818 /* By default, turn on GDB extensions.  */
 819 #define DEFAULT_GDB_EXTENSIONS          1
 820
 821 #define DBX_CONTIN_LENGTH               0
 822
 823 /* File Names in DBX Format.  */
 824 #define DWARF2_DEBUGGING_INFO           1
 825
 826 /* The DWARF 2 CFA column which tracks the return address.  */
 827 #define DWARF_FRAME_RETURN_COLUMN       3
 828
 829 /* Define if operations between registers always perform the operation
 830    on the full register even if a narrower mode is specified.  */
 831 #define WORD_REGISTER_OPERATIONS
 832
 833 /*  All references are zero extended.  */
 834 #define LOAD_EXTEND_OP(MODE)            ZERO_EXTEND
 835
 836 /* Define if loading short immediate values into registers sign extends.  */
 837 #define SHORT_IMMEDIATES_SIGN_EXTEND
 838
 839 /* Max number of bytes we can move from memory to memory
 840    in one reasonably fast instruction.  */
 841 #define MOVE_MAX                        4
 842
 843 /* Define this to be nonzero if shift instructions ignore all but the low-order
 844    few bits.  */
 845 #define SHIFT_COUNT_TRUNCATED           1
 846
 847 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
 848    is done just by pretending it is already truncated.  */
 849 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 850
 851 /* Specify the machine mode that pointers have.
 852    After generation of rtl, the compiler makes no further distinction
 853    between pointers and any other objects of this machine mode.  */
 854 #define Pmode                           SImode
 855
 856 /* Give call MEMs SImode since it is the "most permissive" mode
 857    for 32-bit targets.  */
 858 #define FUNCTION_MODE                   Pmode
 859
 860 struct GTY ((chain_next ("%h.next"))) extern_list
 861 {
 862   struct extern_list *next;             /* next external  */
 863   const char *name;                     /* name of the external  */
 864   int size;                             /* size in bytes  */
 865 };
 866
 867 extern GTY (()) struct extern_list      *extern_head;