mips.h (ISA_HAS_DSP, [...]): New macros.
[official-gcc.git] / gcc / config / mips / mips-modes.def
blob207f6da060b770f8fd5f37c7e93c33cae7535eaa
1 /* MIPS extra machine modes.
2 Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* MIPS has a quirky almost-IEEE format for all its
21 floating point. */
22 RESET_FLOAT_FORMAT (SF, mips_single_format);
23 RESET_FLOAT_FORMAT (DF, mips_double_format);
25 /* Irix6 will override this via MIPS_TFMODE_FORMAT. */
26 FLOAT_MODE (TF, 16, mips_quad_format);
28 /* Vector modes. */
29 VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */
30 VECTOR_MODES (INT, 4); /* V4QI V2HI */
32 VECTOR_MODES (FRACT, 4); /* V4QQ V2HQ */
33 VECTOR_MODES (UFRACT, 4); /* V4UQQ V2UHQ */
34 VECTOR_MODES (ACCUM, 4); /* V2HA */
35 VECTOR_MODES (UACCUM, 4); /* V2UHA */
37 /* Paired single comparison instructions use 2 or 4 CC. */
38 CC_MODE (CCV2);
39 ADJUST_BYTESIZE (CCV2, 8);
40 ADJUST_ALIGNMENT (CCV2, 8);
42 CC_MODE (CCV4);
43 ADJUST_BYTESIZE (CCV4, 16);
44 ADJUST_ALIGNMENT (CCV4, 16);
46 /* For MIPS DSP control registers. */
47 CC_MODE (CCDSP);