libgfortran/config/fpu-387.h

   1 /* FPU-related code for x86 and x86_64 processors.
   2    Copyright 2005 Free Software Foundation, Inc.
   3    Contributed by Francois-Xavier Coudert <coudert@clipper.ens.fr>
   4
   5 This file is part of the GNU Fortran 95 runtime library (libgfortran).
   6
   7 Libgfortran is free software; you can redistribute it and/or
   8 modify it under the terms of the GNU General Public
   9 License as published by the Free Software Foundation; either
  10 version 2 of the License, or (at your option) any later version.
  11
  12 In addition to the permissions in the GNU General Public License, the
  13 Free Software Foundation gives you unlimited permission to link the
  14 compiled version of this file into combinations with other programs,
  15 and to distribute those combinations without any restriction coming
  16 from the use of this file.  (The General Public License restrictions
  17 do apply in other respects; for example, they cover modification of
  18 the file, and distribution when not linked into a combine
  19 executable.)
  20
  21 Libgfortran is distributed in the hope that it will be useful,
  22 but WITHOUT ANY WARRANTY; without even the implied warranty of
  23 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24 GNU General Public License for more details.
  25
  26 You should have received a copy of the GNU General Public
  27 License along with libgfortran; see the file COPYING.  If not,
  28 write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  29 Boston, MA 02110-1301, USA.  */
  30
  31 #define SSE     (1 << 25)
  32
  33 static int
  34 has_sse (void)
  35 {
  36 #ifdef __x86_64__
  37   return 1;
  38 #else
  39   unsigned int eax, ebx, ecx, edx;
  40
  41   /* See if we can use cpuid.  */
  42   asm volatile ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;"
  43                 "pushl %0; popfl; pushfl; popl %0; popfl"
  44                 : "=&r" (eax), "=&r" (ebx)
  45                 : "i" (0x00200000));
  46
  47   if (((eax ^ ebx) & 0x00200000) == 0)
  48     return 0;
  49
  50   /* Check the highest input value for eax.  */
  51   asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
  52                 : "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
  53                 : "0" (0));
  54
  55   if (eax == 0)
  56     return 0;
  57
  58   asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
  59                 : "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
  60                 : "0" (1));
  61
  62   if (edx & SSE)
  63     return 1;
  64
  65   return 0;
  66 #endif
  67 }
  68
  69 void set_fpu (void)
  70 {
  71   unsigned short cw;
  72   unsigned int cw_sse;
  73
  74   /* i387 -- see linux <fpu_control.h> header file for details.  */
  75 #define _FPU_MASK_IM  0x01
  76 #define _FPU_MASK_DM  0x02
  77 #define _FPU_MASK_ZM  0x04
  78 #define _FPU_MASK_OM  0x08
  79 #define _FPU_MASK_UM  0x10
  80 #define _FPU_MASK_PM  0x20
  81   asm volatile ("fnstcw %0" : "=m" (cw));
  82   cw |= _FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM | _FPU_MASK_UM | _FPU_MASK_PM;
  83   if (options.fpe & GFC_FPE_INVALID) cw &= ~_FPU_MASK_IM;
  84   if (options.fpe & GFC_FPE_DENORMAL) cw &= ~_FPU_MASK_DM;
  85   if (options.fpe & GFC_FPE_ZERO) cw &= ~_FPU_MASK_ZM;
  86   if (options.fpe & GFC_FPE_OVERFLOW) cw &= ~_FPU_MASK_OM;
  87   if (options.fpe & GFC_FPE_UNDERFLOW) cw &= ~_FPU_MASK_UM;
  88   if (options.fpe & GFC_FPE_PRECISION) cw &= ~_FPU_MASK_PM;
  89   asm volatile ("fldcw %0" : : "m" (cw));
  90
  91   if (has_sse())
  92     {
  93       /* SSE */
  94       asm volatile ("stmxcsr %0" : "=m" (cw_sse));
  95       cw_sse &= 0xFFFF0000;
  96       cw_sse |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM
  97                  | _FPU_MASK_UM | _FPU_MASK_PM ) << 7;
  98       if (options.fpe & GFC_FPE_INVALID) cw_sse &= ~(_FPU_MASK_IM << 7);
  99       if (options.fpe & GFC_FPE_DENORMAL) cw_sse &= ~(_FPU_MASK_DM << 7);
 100       if (options.fpe & GFC_FPE_ZERO) cw_sse &= ~(_FPU_MASK_ZM << 7);
 101       if (options.fpe & GFC_FPE_OVERFLOW) cw_sse &= ~(_FPU_MASK_OM << 7);
 102       if (options.fpe & GFC_FPE_UNDERFLOW) cw_sse &= ~(_FPU_MASK_UM << 7);
 103       if (options.fpe & GFC_FPE_PRECISION) cw_sse &= ~(_FPU_MASK_PM << 7);
 104       asm volatile ("ldmxcsr %0" : : "m" (cw_sse));
 105     }
 106 }