1 /****************************************************************************
3 * GNAT COMPILER COMPONENTS *
7 * Asm Implementation File *
9 * Copyright (C) 2011-2014, Free Software Foundation, Inc. *
11 * GNAT is free software; you can redistribute it and/or modify it under *
12 * terms of the GNU General Public License as published by the Free Soft- *
13 * ware Foundation; either version 3, or (at your option) any later ver- *
14 * sion. GNAT is distributed in the hope that it will be useful, but WITH- *
15 * OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY *
16 * or FITNESS FOR A PARTICULAR PURPOSE. *
18 * As a special exception under Section 7 of GPL version 3, you are granted *
19 * additional permissions described in the GCC Runtime Library Exception, *
20 * version 3.1, as published by the Free Software Foundation. *
22 * In particular, you can freely distribute your programs built with the *
23 * GNAT Pro compiler, including any required library run-time units, using *
24 * any licensing terms of your choosing. See the AdaCore Software License *
27 * GNAT was originally developed by the GNAT team at New York University. *
28 * Extensive contributions were provided by Ada Core Technologies Inc. *
30 ****************************************************************************/
32 /**************************************************
33 * VxWorks version of the __gnat_sigtramp service *
34 **************************************************/
37 /* See sigtramp.h for a general explanation of functionality. */
40 #include <arch/../regs.h>
47 typedef struct mcontext
52 typedef struct ucontext
54 mcontext_t uc_mcontext
; /* register set */
55 struct ucontext
* uc_link
; /* not used */
56 sigset_t uc_sigmask
; /* set of signals blocked */
57 stack_t uc_stack
; /* stack of context signaled */
61 /* ----------------------
62 -- General comments --
63 ----------------------
65 Stubs are generated from toplevel asms and .cfi directives, much simpler
66 to use and check for correctness than manual encodings of CFI byte
67 sequences. The general idea is to establish CFA as sigcontext->sc_pregs
68 (for DKM) and mcontext (for RTP) and state where to find the registers as
71 As of today, we support a stub providing CFI info for common
72 registers (GPRs, LR, ...). We might need variants with support for floating
73 point or altivec registers as well at some point.
75 Checking which variant should apply and getting at sc_pregs / mcontext
76 is simpler to express in C (we can't use offsetof in toplevel asms and
77 hardcoding constants is not workable with the flurry of VxWorks variants),
78 so this is the choice for our toplevel interface.
80 Note that the registers we "restore" here are those to which we have
81 direct access through the system sigcontext structure, which includes
82 only a partial set of the non-volatiles ABI-wise. */
84 /* -------------------------------------------
85 -- Prototypes for our internal asm stubs --
86 -------------------------------------------
88 Eventhough our symbols will remain local, the prototype claims "extern"
89 and not "static" to prevent compiler complaints about a symbol used but
92 /* sigtramp stub providing CFI info for common registers. */
94 extern void __gnat_sigtramp_common
95 (int signo
, void *siginfo
, void *sigcontext
,
96 __sigtramphandler_t
* handler
, void * sc_pregs
);
99 /* -------------------------------------
100 -- Common interface implementation --
101 -------------------------------------
103 We enforce optimization to minimize the overhead of the extra layer. */
105 void __gnat_sigtramp (int signo
, void *si
, void *sc
,
106 __sigtramphandler_t
* handler
)
107 __attribute__((optimize(2)));
109 void __gnat_sigtramp (int signo
, void *si
, void *sc
,
110 __sigtramphandler_t
* handler
)
113 mcontext_t
*mcontext
= &((ucontext_t
*) sc
)->uc_mcontext
;
115 /* Pass MCONTEXT in the fifth position so that the assembly code can find
116 it at the same stack location or in the same register as SC_PREGS. */
117 __gnat_sigtramp_common (signo
, si
, mcontext
, handler
, mcontext
);
119 struct sigcontext
* sctx
= (struct sigcontext
*) sc
;
121 __gnat_sigtramp_common (signo
, si
, sctx
, handler
, sctx
->sc_pregs
);
126 /* ---------------------------
127 -- And now the asm stubs --
128 ---------------------------
130 They all have a common structure with blocks of asm sequences queued one
131 after the others. Typically:
137 CFI_COMMON_REGISTERS,
141 asm code to establish frame, setup the cfa reg value,
142 call the real signal handler, ...
147 /*--------------------------------
148 -- Misc constants and helpers --
149 -------------------------------- */
151 /* asm string construction helpers. */
153 #define STR(TEXT) #TEXT
154 /* stringify expanded TEXT, surrounding it with double quotes. */
157 /* stringify E, which will resolve as text but may contain macros
158 still to be expanded. */
160 /* asm (TEXT) outputs <tab>TEXT. These facilitate the output of
162 #define TAB(S) "\t" S
166 #define TCR(S) TAB(CR(S))
168 /* REGNO constants, dwarf column numbers for registers of interest. */
170 #if defined (__PPC__)
176 #define REGNO_GR(N) (N)
178 #define REGNO_PC 67 /* ARG_POINTER_REGNUM */
180 #define FUNCTION "@function"
182 #elif defined (__ARMEL__)
184 #define REGNO_G_REG_OFFSET(N) (N)
186 #define REGNO_PC_OFFSET 15 /* PC_REGNUM */
188 #define FUNCTION "%function"
192 #endif /* REGNO constants */
195 /*------------------------------
196 -- Stub construction blocks --
197 ------------------------------ */
201 Only non-volatile registers are suitable for a CFA base. These are the
202 only ones we can expect to be able retrieve from the unwinding context
203 while walking up the chain, saved by at least the bottom-most exception
204 propagation services. We set a non-volatile register to the value we
205 need in the stub body that follows. */
207 #if defined (__PPC__)
209 /* Use r15 for PPC. Note that r14 is inappropriate here, even though it
210 is non-volatile according to the ABI, because GCC uses it as an extra
211 SCRATCH on SPE targets. */
215 #elif defined (__ARMEL__)
217 /* Use r8 for ARM. Any of r4-r8 should work. */
223 #endif /* CFA setup block */
225 #define CFI_DEF_CFA \
226 CR(".cfi_def_cfa " S(CFA_REG) ", 0")
228 /* Register location blocks
229 ------------------------
230 Rules to find registers of interest from the CFA. This should comprise
231 all the non-volatile registers relevant to the interrupted context.
233 Note that we include r1 in this set, unlike the libgcc unwinding
234 fallbacks. This is useful for fallbacks to allow the use of r1 in CFI
235 expressions and the absence of rule for r1 gets compensated by using the
236 target CFA instead. We don't need the expression facility here and
237 setup a fake CFA to allow very simple offset expressions, so having a
238 rule for r1 is the proper thing to do. We for sure have observed
239 crashes in some cases without it. */
241 #define COMMON_CFI(REG) \
242 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
244 #if defined (__PPC__)
246 #define CFI_COMMON_REGS \
247 CR("# CFI for common registers\n") \
248 TCR(COMMON_CFI(GR(0))) \
249 TCR(COMMON_CFI(GR(1))) \
250 TCR(COMMON_CFI(GR(2))) \
251 TCR(COMMON_CFI(GR(3))) \
252 TCR(COMMON_CFI(GR(4))) \
253 TCR(COMMON_CFI(GR(5))) \
254 TCR(COMMON_CFI(GR(6))) \
255 TCR(COMMON_CFI(GR(7))) \
256 TCR(COMMON_CFI(GR(8))) \
257 TCR(COMMON_CFI(GR(9))) \
258 TCR(COMMON_CFI(GR(10))) \
259 TCR(COMMON_CFI(GR(11))) \
260 TCR(COMMON_CFI(GR(12))) \
261 TCR(COMMON_CFI(GR(13))) \
262 TCR(COMMON_CFI(GR(14))) \
263 TCR(COMMON_CFI(GR(15))) \
264 TCR(COMMON_CFI(GR(16))) \
265 TCR(COMMON_CFI(GR(17))) \
266 TCR(COMMON_CFI(GR(18))) \
267 TCR(COMMON_CFI(GR(19))) \
268 TCR(COMMON_CFI(GR(20))) \
269 TCR(COMMON_CFI(GR(21))) \
270 TCR(COMMON_CFI(GR(22))) \
271 TCR(COMMON_CFI(GR(23))) \
272 TCR(COMMON_CFI(GR(24))) \
273 TCR(COMMON_CFI(GR(25))) \
274 TCR(COMMON_CFI(GR(26))) \
275 TCR(COMMON_CFI(GR(27))) \
276 TCR(COMMON_CFI(GR(28))) \
277 TCR(COMMON_CFI(GR(29))) \
278 TCR(COMMON_CFI(GR(30))) \
279 TCR(COMMON_CFI(GR(31))) \
280 TCR(COMMON_CFI(LR)) \
281 TCR(COMMON_CFI(CR)) \
282 TCR(COMMON_CFI(CTR)) \
283 TCR(COMMON_CFI(XER)) \
284 TCR(COMMON_CFI(PC)) \
285 TCR(".cfi_return_column " S(REGNO_PC))
287 /* Trampoline body block
288 --------------------- */
290 #define SIGTRAMP_BODY \
292 TCR("# Allocate frame and save the non-volatile") \
293 TCR("# registers we're going to modify") \
294 TCR("stwu %r1,-16(%r1)") \
296 TCR("stw %r0,20(%r1)") \
297 TCR("stw %r" S(CFA_REG) ",8(%r1)") \
299 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
300 TCR("mr %r" S(CFA_REG) ", %r7") \
302 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
303 TCR("# arguments are the same as those we received in r3, r4 and r5") \
307 TCR("# Restore our callee-saved items, release our frame and return") \
308 TCR("lwz %r" S(CFA_REG) ",8(%r1)") \
309 TCR("lwz %r0,20(%r1)") \
312 TCR("addi %r1,%r1,16") \
315 #elif defined (__ARMEL__)
317 #define CFI_COMMON_REGS \
318 CR("# CFI for common registers\n") \
319 TCR(COMMON_CFI(G_REG_OFFSET(0))) \
320 TCR(COMMON_CFI(G_REG_OFFSET(1))) \
321 TCR(COMMON_CFI(G_REG_OFFSET(2))) \
322 TCR(COMMON_CFI(G_REG_OFFSET(3))) \
323 TCR(COMMON_CFI(G_REG_OFFSET(4))) \
324 TCR(COMMON_CFI(G_REG_OFFSET(5))) \
325 TCR(COMMON_CFI(G_REG_OFFSET(6))) \
326 TCR(COMMON_CFI(G_REG_OFFSET(7))) \
327 TCR(COMMON_CFI(G_REG_OFFSET(8))) \
328 TCR(COMMON_CFI(G_REG_OFFSET(9))) \
329 TCR(COMMON_CFI(G_REG_OFFSET(10))) \
330 TCR(COMMON_CFI(G_REG_OFFSET(11))) \
331 TCR(COMMON_CFI(G_REG_OFFSET(12))) \
332 TCR(COMMON_CFI(G_REG_OFFSET(13))) \
333 TCR(COMMON_CFI(G_REG_OFFSET(14))) \
334 TCR(COMMON_CFI(PC_OFFSET)) \
335 TCR(".cfi_return_column " S(REGNO_PC_OFFSET))
337 /* Trampoline body block
338 --------------------- */
340 #define SIGTRAMP_BODY \
342 TCR("# Allocate frame and save the non-volatile") \
343 TCR("# registers we're going to modify") \
345 TCR("stmfd sp!, {r"S(CFA_REG)", fp, ip, lr, pc}") \
346 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
347 TCR("ldr r"S(CFA_REG)", [ip]") \
349 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
350 TCR("# arguments are the same as those we received in r0, r1 and r2") \
351 TCR("sub fp, ip, #4") \
353 TCR("# Restore our callee-saved items, release our frame and return") \
354 TCR("ldmfd sp, {r"S(CFA_REG)", fp, sp, pc}")
358 #endif /* CFI_COMMON_REGS and SIGTRAMP_BODY */
360 /* Symbol definition block
361 ----------------------- */
363 #define SIGTRAMP_START(SYM) \
364 CR("# " S(SYM) " cfi trampoline") \
365 TCR(".type " S(SYM) ", "FUNCTION) \
368 TCR(".cfi_startproc") \
369 TCR(".cfi_signal_frame")
371 /* Symbol termination block
372 ------------------------ */
374 #define SIGTRAMP_END(SYM) \
376 TCR(".size " S(SYM) ", .-" S(SYM))
378 /*----------------------------
379 -- And now, the real code --
380 ---------------------------- */
382 /* Text section start. The compiler isn't aware of that switch. */
387 /* sigtramp stub for common registers. */
389 #define TRAMP_COMMON __gnat_sigtramp_common
391 asm (SIGTRAMP_START(TRAMP_COMMON
));
393 asm (CFI_COMMON_REGS
);
395 asm (SIGTRAMP_END(TRAMP_COMMON
));