1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
74 #include "tree-pass.h"
84 #ifdef XCOFF_DEBUGGING_INFO
85 #include "xcoffout.h" /* Needed for external data
86 declarations for e.g. AIX 4.x. */
89 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
90 #include "dwarf2out.h"
93 #ifdef DBX_DEBUGGING_INFO
97 #ifdef SDB_DEBUGGING_INFO
101 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
102 null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
107 /* How to start an assembler comment. */
108 #ifndef ASM_COMMENT_START
109 #define ASM_COMMENT_START ";#"
112 /* Is the given character a logical line separator for the assembler? */
113 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
114 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
117 #ifndef JUMP_TABLES_IN_TEXT_SECTION
118 #define JUMP_TABLES_IN_TEXT_SECTION 0
121 /* Bitflags used by final_scan_insn. */
124 #define SEEN_EMITTED 4
126 /* Last insn processed by final_scan_insn. */
127 static rtx debug_insn
;
128 rtx current_output_insn
;
130 /* Line number of last NOTE. */
131 static int last_linenum
;
133 /* Highest line number in current block. */
134 static int high_block_linenum
;
136 /* Likewise for function. */
137 static int high_function_linenum
;
139 /* Filename of last NOTE. */
140 static const char *last_filename
;
142 /* Override filename and line number. */
143 static const char *override_filename
;
144 static int override_linenum
;
146 /* Whether to force emission of a line note before the next insn. */
147 static bool force_source_line
= false;
149 extern const int length_unit_log
; /* This is defined in insn-attrtab.c. */
151 /* Nonzero while outputting an `asm' with operands.
152 This means that inconsistencies are the user's fault, so don't die.
153 The precise value is the insn being output, to pass to error_for_asm. */
154 rtx this_is_asm_operands
;
156 /* Number of operands of this insn, for an `asm' with operands. */
157 static unsigned int insn_noperands
;
159 /* Compare optimization flag. */
161 static rtx last_ignored_compare
= 0;
163 /* Assign a unique number to each insn that is output.
164 This can be used to generate unique local labels. */
166 static int insn_counter
= 0;
169 /* This variable contains machine-dependent flags (defined in tm.h)
170 set and examined by output routines
171 that describe how to interpret the condition codes properly. */
175 /* During output of an insn, this contains a copy of cc_status
176 from before the insn. */
178 CC_STATUS cc_prev_status
;
181 /* Nonzero means current function must be given a frame pointer.
182 Initialized in function.c to 0. Set only in reload1.c as per
183 the needs of the function. */
185 int frame_pointer_needed
;
187 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
189 static int block_depth
;
191 /* Nonzero if have enabled APP processing of our assembler output. */
195 /* If we are outputting an insn sequence, this contains the sequence rtx.
200 #ifdef ASSEMBLER_DIALECT
202 /* Number of the assembler dialect to use, starting at 0. */
203 static int dialect_number
;
206 #ifdef HAVE_conditional_execution
207 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
208 rtx current_insn_predicate
;
211 #ifdef HAVE_ATTR_length
212 static int asm_insn_count (rtx
);
214 static void profile_function (FILE *);
215 static void profile_after_prologue (FILE *);
216 static bool notice_source_line (rtx
);
217 static rtx
walk_alter_subreg (rtx
*, bool *);
218 static void output_asm_name (void);
219 static void output_alternate_entry_point (FILE *, rtx
);
220 static tree
get_mem_expr_from_op (rtx
, int *);
221 static void output_asm_operand_names (rtx
*, int *, int);
222 static void output_operand (rtx
, int);
223 #ifdef LEAF_REGISTERS
224 static void leaf_renumber_regs (rtx
);
227 static int alter_cond (rtx
);
229 #ifndef ADDR_VEC_ALIGN
230 static int final_addr_vec_align (rtx
);
232 #ifdef HAVE_ATTR_length
233 static int align_fuzz (rtx
, rtx
, int, unsigned);
236 /* Initialize data in final at the beginning of a compilation. */
239 init_final (const char *filename ATTRIBUTE_UNUSED
)
244 #ifdef ASSEMBLER_DIALECT
245 dialect_number
= ASSEMBLER_DIALECT
;
249 /* Default target function prologue and epilogue assembler output.
251 If not overridden for epilogue code, then the function body itself
252 contains return instructions wherever needed. */
254 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
255 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
259 /* Default target hook that outputs nothing to a stream. */
261 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
265 /* Enable APP processing of subsequent output.
266 Used before the output from an `asm' statement. */
273 fputs (ASM_APP_ON
, asm_out_file
);
278 /* Disable APP processing of subsequent output.
279 Called from varasm.c before most kinds of output. */
286 fputs (ASM_APP_OFF
, asm_out_file
);
291 /* Return the number of slots filled in the current
292 delayed branch sequence (we don't count the insn needing the
293 delay slot). Zero if not in a delayed branch sequence. */
297 dbr_sequence_length (void)
299 if (final_sequence
!= 0)
300 return XVECLEN (final_sequence
, 0) - 1;
306 /* The next two pages contain routines used to compute the length of an insn
307 and to shorten branches. */
309 /* Arrays for insn lengths, and addresses. The latter is referenced by
310 `insn_current_length'. */
312 static int *insn_lengths
;
314 VEC(int,heap
) *insn_addresses_
;
316 /* Max uid for which the above arrays are valid. */
317 static int insn_lengths_max_uid
;
319 /* Address of insn being processed. Used by `insn_current_length'. */
320 int insn_current_address
;
322 /* Address of insn being processed in previous iteration. */
323 int insn_last_address
;
325 /* known invariant alignment of insn being processed. */
326 int insn_current_align
;
328 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
329 gives the next following alignment insn that increases the known
330 alignment, or NULL_RTX if there is no such insn.
331 For any alignment obtained this way, we can again index uid_align with
332 its uid to obtain the next following align that in turn increases the
333 alignment, till we reach NULL_RTX; the sequence obtained this way
334 for each insn we'll call the alignment chain of this insn in the following
337 struct label_alignment
343 static rtx
*uid_align
;
344 static int *uid_shuid
;
345 static struct label_alignment
*label_align
;
347 /* Indicate that branch shortening hasn't yet been done. */
350 init_insn_lengths (void)
361 insn_lengths_max_uid
= 0;
363 #ifdef HAVE_ATTR_length
364 INSN_ADDRESSES_FREE ();
373 /* Obtain the current length of an insn. If branch shortening has been done,
374 get its actual length. Otherwise, use FALLBACK_FN to calculate the
377 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED
,
378 int (*fallback_fn
) (rtx
) ATTRIBUTE_UNUSED
)
380 #ifdef HAVE_ATTR_length
385 if (insn_lengths_max_uid
> INSN_UID (insn
))
386 return insn_lengths
[INSN_UID (insn
)];
388 switch (GET_CODE (insn
))
396 length
= fallback_fn (insn
);
400 body
= PATTERN (insn
);
401 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
403 /* Alignment is machine-dependent and should be handled by
407 length
= fallback_fn (insn
);
411 body
= PATTERN (insn
);
412 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
415 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
416 length
= asm_insn_count (body
) * fallback_fn (insn
);
417 else if (GET_CODE (body
) == SEQUENCE
)
418 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
419 length
+= get_attr_length (XVECEXP (body
, 0, i
));
421 length
= fallback_fn (insn
);
428 #ifdef ADJUST_INSN_LENGTH
429 ADJUST_INSN_LENGTH (insn
, length
);
432 #else /* not HAVE_ATTR_length */
434 #define insn_default_length 0
435 #define insn_min_length 0
436 #endif /* not HAVE_ATTR_length */
439 /* Obtain the current length of an insn. If branch shortening has been done,
440 get its actual length. Otherwise, get its maximum length. */
442 get_attr_length (rtx insn
)
444 return get_attr_length_1 (insn
, insn_default_length
);
447 /* Obtain the current length of an insn. If branch shortening has been done,
448 get its actual length. Otherwise, get its minimum length. */
450 get_attr_min_length (rtx insn
)
452 return get_attr_length_1 (insn
, insn_min_length
);
455 /* Code to handle alignment inside shorten_branches. */
457 /* Here is an explanation how the algorithm in align_fuzz can give
460 Call a sequence of instructions beginning with alignment point X
461 and continuing until the next alignment point `block X'. When `X'
462 is used in an expression, it means the alignment value of the
465 Call the distance between the start of the first insn of block X, and
466 the end of the last insn of block X `IX', for the `inner size of X'.
467 This is clearly the sum of the instruction lengths.
469 Likewise with the next alignment-delimited block following X, which we
472 Call the distance between the start of the first insn of block X, and
473 the start of the first insn of block Y `OX', for the `outer size of X'.
475 The estimated padding is then OX - IX.
477 OX can be safely estimated as
482 OX = round_up(IX, X) + Y - X
484 Clearly est(IX) >= real(IX), because that only depends on the
485 instruction lengths, and those being overestimated is a given.
487 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
488 we needn't worry about that when thinking about OX.
490 When X >= Y, the alignment provided by Y adds no uncertainty factor
491 for branch ranges starting before X, so we can just round what we have.
492 But when X < Y, we don't know anything about the, so to speak,
493 `middle bits', so we have to assume the worst when aligning up from an
494 address mod X to one mod Y, which is Y - X. */
497 #define LABEL_ALIGN(LABEL) align_labels_log
500 #ifndef LABEL_ALIGN_MAX_SKIP
501 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
505 #define LOOP_ALIGN(LABEL) align_loops_log
508 #ifndef LOOP_ALIGN_MAX_SKIP
509 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
512 #ifndef LABEL_ALIGN_AFTER_BARRIER
513 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
516 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
517 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
521 #define JUMP_ALIGN(LABEL) align_jumps_log
524 #ifndef JUMP_ALIGN_MAX_SKIP
525 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
528 #ifndef ADDR_VEC_ALIGN
530 final_addr_vec_align (rtx addr_vec
)
532 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
534 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
535 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
536 return exact_log2 (align
);
540 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
543 #ifndef INSN_LENGTH_ALIGNMENT
544 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
547 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
549 static int min_labelno
, max_labelno
;
551 #define LABEL_TO_ALIGNMENT(LABEL) \
552 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
554 #define LABEL_TO_MAX_SKIP(LABEL) \
555 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
557 /* For the benefit of port specific code do this also as a function. */
560 label_to_alignment (rtx label
)
562 return LABEL_TO_ALIGNMENT (label
);
565 #ifdef HAVE_ATTR_length
566 /* The differences in addresses
567 between a branch and its target might grow or shrink depending on
568 the alignment the start insn of the range (the branch for a forward
569 branch or the label for a backward branch) starts out on; if these
570 differences are used naively, they can even oscillate infinitely.
571 We therefore want to compute a 'worst case' address difference that
572 is independent of the alignment the start insn of the range end
573 up on, and that is at least as large as the actual difference.
574 The function align_fuzz calculates the amount we have to add to the
575 naively computed difference, by traversing the part of the alignment
576 chain of the start insn of the range that is in front of the end insn
577 of the range, and considering for each alignment the maximum amount
578 that it might contribute to a size increase.
580 For casesi tables, we also want to know worst case minimum amounts of
581 address difference, in case a machine description wants to introduce
582 some common offset that is added to all offsets in a table.
583 For this purpose, align_fuzz with a growth argument of 0 computes the
584 appropriate adjustment. */
586 /* Compute the maximum delta by which the difference of the addresses of
587 START and END might grow / shrink due to a different address for start
588 which changes the size of alignment insns between START and END.
589 KNOWN_ALIGN_LOG is the alignment known for START.
590 GROWTH should be ~0 if the objective is to compute potential code size
591 increase, and 0 if the objective is to compute potential shrink.
592 The return value is undefined for any other value of GROWTH. */
595 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
597 int uid
= INSN_UID (start
);
599 int known_align
= 1 << known_align_log
;
600 int end_shuid
= INSN_SHUID (end
);
603 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
605 int align_addr
, new_align
;
607 uid
= INSN_UID (align_label
);
608 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
609 if (uid_shuid
[uid
] > end_shuid
)
611 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
612 new_align
= 1 << known_align_log
;
613 if (new_align
< known_align
)
615 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
616 known_align
= new_align
;
621 /* Compute a worst-case reference address of a branch so that it
622 can be safely used in the presence of aligned labels. Since the
623 size of the branch itself is unknown, the size of the branch is
624 not included in the range. I.e. for a forward branch, the reference
625 address is the end address of the branch as known from the previous
626 branch shortening pass, minus a value to account for possible size
627 increase due to alignment. For a backward branch, it is the start
628 address of the branch as known from the current pass, plus a value
629 to account for possible size increase due to alignment.
630 NB.: Therefore, the maximum offset allowed for backward branches needs
631 to exclude the branch size. */
634 insn_current_reference_address (rtx branch
)
639 if (! INSN_ADDRESSES_SET_P ())
642 seq
= NEXT_INSN (PREV_INSN (branch
));
643 seq_uid
= INSN_UID (seq
);
644 if (!JUMP_P (branch
))
645 /* This can happen for example on the PA; the objective is to know the
646 offset to address something in front of the start of the function.
647 Thus, we can treat it like a backward branch.
648 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
649 any alignment we'd encounter, so we skip the call to align_fuzz. */
650 return insn_current_address
;
651 dest
= JUMP_LABEL (branch
);
653 /* BRANCH has no proper alignment chain set, so use SEQ.
654 BRANCH also has no INSN_SHUID. */
655 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
657 /* Forward branch. */
658 return (insn_last_address
+ insn_lengths
[seq_uid
]
659 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
663 /* Backward branch. */
664 return (insn_current_address
665 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
668 #endif /* HAVE_ATTR_length */
670 /* Compute branch alignments based on frequency information in the
674 compute_alignments (void)
676 int log
, max_skip
, max_log
;
679 int freq_threshold
= 0;
687 max_labelno
= max_label_num ();
688 min_labelno
= get_first_label_num ();
689 label_align
= XCNEWVEC (struct label_alignment
, max_labelno
- min_labelno
+ 1);
691 /* If not optimizing or optimizing for size, don't assign any alignments. */
692 if (! optimize
|| optimize_size
)
697 dump_flow_info (dump_file
, TDF_DETAILS
);
698 flow_loops_dump (dump_file
, NULL
, 1);
699 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
702 if (bb
->frequency
> freq_max
)
703 freq_max
= bb
->frequency
;
704 freq_threshold
= freq_max
/ PARAM_VALUE (PARAM_ALIGN_THRESHOLD
);
707 fprintf(dump_file
, "freq_max: %i\n",freq_max
);
710 rtx label
= BB_HEAD (bb
);
711 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
716 || probably_never_executed_bb_p (bb
))
719 fprintf(dump_file
, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
720 bb
->index
, bb
->frequency
, bb
->loop_father
->num
, bb
->loop_depth
);
723 max_log
= LABEL_ALIGN (label
);
724 max_skip
= LABEL_ALIGN_MAX_SKIP
;
726 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
728 if (e
->flags
& EDGE_FALLTHRU
)
729 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
731 branch_frequency
+= EDGE_FREQUENCY (e
);
735 fprintf(dump_file
, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
736 bb
->index
, bb
->frequency
, bb
->loop_father
->num
,
738 fallthru_frequency
, branch_frequency
);
739 if (!bb
->loop_father
->inner
&& bb
->loop_father
->num
)
740 fprintf (dump_file
, " inner_loop");
741 if (bb
->loop_father
->header
== bb
)
742 fprintf (dump_file
, " loop_header");
743 fprintf (dump_file
, "\n");
746 /* There are two purposes to align block with no fallthru incoming edge:
747 1) to avoid fetch stalls when branch destination is near cache boundary
748 2) to improve cache efficiency in case the previous block is not executed
749 (so it does not need to be in the cache).
751 We to catch first case, we align frequently executed blocks.
752 To catch the second, we align blocks that are executed more frequently
753 than the predecessor and the predecessor is likely to not be executed
754 when function is called. */
757 && (branch_frequency
> freq_threshold
758 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
759 && (bb
->prev_bb
->frequency
760 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
762 log
= JUMP_ALIGN (label
);
764 fprintf(dump_file
, " jump alignment added.\n");
768 max_skip
= JUMP_ALIGN_MAX_SKIP
;
771 /* In case block is frequent and reached mostly by non-fallthru edge,
772 align it. It is most likely a first block of loop. */
774 && maybe_hot_bb_p (bb
)
775 && branch_frequency
+ fallthru_frequency
> freq_threshold
777 > fallthru_frequency
* PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS
)))
779 log
= LOOP_ALIGN (label
);
781 fprintf(dump_file
, " internal loop alignment added.\n");
785 max_skip
= LOOP_ALIGN_MAX_SKIP
;
788 LABEL_TO_ALIGNMENT (label
) = max_log
;
789 LABEL_TO_MAX_SKIP (label
) = max_skip
;
793 loop_optimizer_finalize ();
797 struct rtl_opt_pass pass_compute_alignments
=
801 "alignments", /* name */
803 compute_alignments
, /* execute */
806 0, /* static_pass_number */
808 0, /* properties_required */
809 0, /* properties_provided */
810 0, /* properties_destroyed */
811 0, /* todo_flags_start */
812 TODO_dump_func
| TODO_verify_rtl_sharing
813 | TODO_ggc_collect
/* todo_flags_finish */
818 /* Make a pass over all insns and compute their actual lengths by shortening
819 any branches of variable length if possible. */
821 /* shorten_branches might be called multiple times: for example, the SH
822 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
823 In order to do this, it needs proper length information, which it obtains
824 by calling shorten_branches. This cannot be collapsed with
825 shorten_branches itself into a single pass unless we also want to integrate
826 reorg.c, since the branch splitting exposes new instructions with delay
830 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
837 #ifdef HAVE_ATTR_length
838 #define MAX_CODE_ALIGN 16
840 int something_changed
= 1;
841 char *varying_length
;
844 rtx align_tab
[MAX_CODE_ALIGN
];
848 /* Compute maximum UID and allocate label_align / uid_shuid. */
849 max_uid
= get_max_uid ();
851 /* Free uid_shuid before reallocating it. */
854 uid_shuid
= XNEWVEC (int, max_uid
);
856 if (max_labelno
!= max_label_num ())
858 int old
= max_labelno
;
862 max_labelno
= max_label_num ();
864 n_labels
= max_labelno
- min_labelno
+ 1;
865 n_old_labels
= old
- min_labelno
+ 1;
867 label_align
= xrealloc (label_align
,
868 n_labels
* sizeof (struct label_alignment
));
870 /* Range of labels grows monotonically in the function. Failing here
871 means that the initialization of array got lost. */
872 gcc_assert (n_old_labels
<= n_labels
);
874 memset (label_align
+ n_old_labels
, 0,
875 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
878 /* Initialize label_align and set up uid_shuid to be strictly
879 monotonically rising with insn order. */
880 /* We use max_log here to keep track of the maximum alignment we want to
881 impose on the next CODE_LABEL (or the current one if we are processing
882 the CODE_LABEL itself). */
887 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
891 INSN_SHUID (insn
) = i
++;
899 /* Merge in alignments computed by compute_alignments. */
900 log
= LABEL_TO_ALIGNMENT (insn
);
904 max_skip
= LABEL_TO_MAX_SKIP (insn
);
907 log
= LABEL_ALIGN (insn
);
911 max_skip
= LABEL_ALIGN_MAX_SKIP
;
913 next
= next_nonnote_insn (insn
);
914 /* ADDR_VECs only take room if read-only data goes into the text
916 if (JUMP_TABLES_IN_TEXT_SECTION
917 || readonly_data_section
== text_section
)
918 if (next
&& JUMP_P (next
))
920 rtx nextbody
= PATTERN (next
);
921 if (GET_CODE (nextbody
) == ADDR_VEC
922 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
924 log
= ADDR_VEC_ALIGN (next
);
928 max_skip
= LABEL_ALIGN_MAX_SKIP
;
932 LABEL_TO_ALIGNMENT (insn
) = max_log
;
933 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
937 else if (BARRIER_P (insn
))
941 for (label
= insn
; label
&& ! INSN_P (label
);
942 label
= NEXT_INSN (label
))
945 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
949 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
955 #ifdef HAVE_ATTR_length
957 /* Allocate the rest of the arrays. */
958 insn_lengths
= XNEWVEC (int, max_uid
);
959 insn_lengths_max_uid
= max_uid
;
960 /* Syntax errors can lead to labels being outside of the main insn stream.
961 Initialize insn_addresses, so that we get reproducible results. */
962 INSN_ADDRESSES_ALLOC (max_uid
);
964 varying_length
= XCNEWVEC (char, max_uid
);
966 /* Initialize uid_align. We scan instructions
967 from end to start, and keep in align_tab[n] the last seen insn
968 that does an alignment of at least n+1, i.e. the successor
969 in the alignment chain for an insn that does / has a known
971 uid_align
= XCNEWVEC (rtx
, max_uid
);
973 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
974 align_tab
[i
] = NULL_RTX
;
975 seq
= get_last_insn ();
976 for (; seq
; seq
= PREV_INSN (seq
))
978 int uid
= INSN_UID (seq
);
980 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
981 uid_align
[uid
] = align_tab
[0];
984 /* Found an alignment label. */
985 uid_align
[uid
] = align_tab
[log
];
986 for (i
= log
- 1; i
>= 0; i
--)
990 #ifdef CASE_VECTOR_SHORTEN_MODE
993 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
996 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
997 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1000 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1002 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1003 int len
, i
, min
, max
, insn_shuid
;
1005 addr_diff_vec_flags flags
;
1008 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1010 pat
= PATTERN (insn
);
1011 len
= XVECLEN (pat
, 1);
1012 gcc_assert (len
> 0);
1013 min_align
= MAX_CODE_ALIGN
;
1014 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1016 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1017 int shuid
= INSN_SHUID (lab
);
1028 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1029 min_align
= LABEL_TO_ALIGNMENT (lab
);
1031 XEXP (pat
, 2) = gen_rtx_LABEL_REF (Pmode
, min_lab
);
1032 XEXP (pat
, 3) = gen_rtx_LABEL_REF (Pmode
, max_lab
);
1033 insn_shuid
= INSN_SHUID (insn
);
1034 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1035 memset (&flags
, 0, sizeof (flags
));
1036 flags
.min_align
= min_align
;
1037 flags
.base_after_vec
= rel
> insn_shuid
;
1038 flags
.min_after_vec
= min
> insn_shuid
;
1039 flags
.max_after_vec
= max
> insn_shuid
;
1040 flags
.min_after_base
= min
> rel
;
1041 flags
.max_after_base
= max
> rel
;
1042 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1045 #endif /* CASE_VECTOR_SHORTEN_MODE */
1047 /* Compute initial lengths, addresses, and varying flags for each insn. */
1048 for (insn_current_address
= 0, insn
= first
;
1050 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1052 uid
= INSN_UID (insn
);
1054 insn_lengths
[uid
] = 0;
1058 int log
= LABEL_TO_ALIGNMENT (insn
);
1061 int align
= 1 << log
;
1062 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1063 insn_lengths
[uid
] = new_address
- insn_current_address
;
1067 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
1069 if (NOTE_P (insn
) || BARRIER_P (insn
)
1072 if (INSN_DELETED_P (insn
))
1075 body
= PATTERN (insn
);
1076 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1078 /* This only takes room if read-only data goes into the text
1080 if (JUMP_TABLES_IN_TEXT_SECTION
1081 || readonly_data_section
== text_section
)
1082 insn_lengths
[uid
] = (XVECLEN (body
,
1083 GET_CODE (body
) == ADDR_DIFF_VEC
)
1084 * GET_MODE_SIZE (GET_MODE (body
)));
1085 /* Alignment is handled by ADDR_VEC_ALIGN. */
1087 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1088 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1089 else if (GET_CODE (body
) == SEQUENCE
)
1092 int const_delay_slots
;
1094 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1096 const_delay_slots
= 0;
1098 /* Inside a delay slot sequence, we do not do any branch shortening
1099 if the shortening could change the number of delay slots
1101 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1103 rtx inner_insn
= XVECEXP (body
, 0, i
);
1104 int inner_uid
= INSN_UID (inner_insn
);
1107 if (GET_CODE (body
) == ASM_INPUT
1108 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1109 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1110 * insn_default_length (inner_insn
));
1112 inner_length
= insn_default_length (inner_insn
);
1114 insn_lengths
[inner_uid
] = inner_length
;
1115 if (const_delay_slots
)
1117 if ((varying_length
[inner_uid
]
1118 = insn_variable_length_p (inner_insn
)) != 0)
1119 varying_length
[uid
] = 1;
1120 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1121 + insn_lengths
[uid
]);
1124 varying_length
[inner_uid
] = 0;
1125 insn_lengths
[uid
] += inner_length
;
1128 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1130 insn_lengths
[uid
] = insn_default_length (insn
);
1131 varying_length
[uid
] = insn_variable_length_p (insn
);
1134 /* If needed, do any adjustment. */
1135 #ifdef ADJUST_INSN_LENGTH
1136 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1137 if (insn_lengths
[uid
] < 0)
1138 fatal_insn ("negative insn length", insn
);
1142 /* Now loop over all the insns finding varying length insns. For each,
1143 get the current insn length. If it has changed, reflect the change.
1144 When nothing changes for a full pass, we are done. */
1146 while (something_changed
)
1148 something_changed
= 0;
1149 insn_current_align
= MAX_CODE_ALIGN
- 1;
1150 for (insn_current_address
= 0, insn
= first
;
1152 insn
= NEXT_INSN (insn
))
1155 #ifdef ADJUST_INSN_LENGTH
1160 uid
= INSN_UID (insn
);
1164 int log
= LABEL_TO_ALIGNMENT (insn
);
1165 if (log
> insn_current_align
)
1167 int align
= 1 << log
;
1168 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1169 insn_lengths
[uid
] = new_address
- insn_current_address
;
1170 insn_current_align
= log
;
1171 insn_current_address
= new_address
;
1174 insn_lengths
[uid
] = 0;
1175 INSN_ADDRESSES (uid
) = insn_current_address
;
1179 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1180 if (length_align
< insn_current_align
)
1181 insn_current_align
= length_align
;
1183 insn_last_address
= INSN_ADDRESSES (uid
);
1184 INSN_ADDRESSES (uid
) = insn_current_address
;
1186 #ifdef CASE_VECTOR_SHORTEN_MODE
1187 if (optimize
&& JUMP_P (insn
)
1188 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1190 rtx body
= PATTERN (insn
);
1191 int old_length
= insn_lengths
[uid
];
1192 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1193 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1194 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1195 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1196 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1197 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1200 addr_diff_vec_flags flags
;
1202 /* Avoid automatic aggregate initialization. */
1203 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1205 /* Try to find a known alignment for rel_lab. */
1206 for (prev
= rel_lab
;
1208 && ! insn_lengths
[INSN_UID (prev
)]
1209 && ! (varying_length
[INSN_UID (prev
)] & 1);
1210 prev
= PREV_INSN (prev
))
1211 if (varying_length
[INSN_UID (prev
)] & 2)
1213 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1217 /* See the comment on addr_diff_vec_flags in rtl.h for the
1218 meaning of the flags values. base: REL_LAB vec: INSN */
1219 /* Anything after INSN has still addresses from the last
1220 pass; adjust these so that they reflect our current
1221 estimate for this pass. */
1222 if (flags
.base_after_vec
)
1223 rel_addr
+= insn_current_address
- insn_last_address
;
1224 if (flags
.min_after_vec
)
1225 min_addr
+= insn_current_address
- insn_last_address
;
1226 if (flags
.max_after_vec
)
1227 max_addr
+= insn_current_address
- insn_last_address
;
1228 /* We want to know the worst case, i.e. lowest possible value
1229 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1230 its offset is positive, and we have to be wary of code shrink;
1231 otherwise, it is negative, and we have to be vary of code
1233 if (flags
.min_after_base
)
1235 /* If INSN is between REL_LAB and MIN_LAB, the size
1236 changes we are about to make can change the alignment
1237 within the observed offset, therefore we have to break
1238 it up into two parts that are independent. */
1239 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1241 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1242 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1245 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1249 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1251 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1252 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1255 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1257 /* Likewise, determine the highest lowest possible value
1258 for the offset of MAX_LAB. */
1259 if (flags
.max_after_base
)
1261 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1263 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1264 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1267 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1271 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1273 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1274 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1277 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1279 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1280 max_addr
- rel_addr
,
1282 if (JUMP_TABLES_IN_TEXT_SECTION
1283 || readonly_data_section
== text_section
)
1286 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1287 insn_current_address
+= insn_lengths
[uid
];
1288 if (insn_lengths
[uid
] != old_length
)
1289 something_changed
= 1;
1294 #endif /* CASE_VECTOR_SHORTEN_MODE */
1296 if (! (varying_length
[uid
]))
1298 if (NONJUMP_INSN_P (insn
)
1299 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1303 body
= PATTERN (insn
);
1304 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1306 rtx inner_insn
= XVECEXP (body
, 0, i
);
1307 int inner_uid
= INSN_UID (inner_insn
);
1309 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1311 insn_current_address
+= insn_lengths
[inner_uid
];
1315 insn_current_address
+= insn_lengths
[uid
];
1320 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1324 body
= PATTERN (insn
);
1326 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1328 rtx inner_insn
= XVECEXP (body
, 0, i
);
1329 int inner_uid
= INSN_UID (inner_insn
);
1332 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1334 /* insn_current_length returns 0 for insns with a
1335 non-varying length. */
1336 if (! varying_length
[inner_uid
])
1337 inner_length
= insn_lengths
[inner_uid
];
1339 inner_length
= insn_current_length (inner_insn
);
1341 if (inner_length
!= insn_lengths
[inner_uid
])
1343 insn_lengths
[inner_uid
] = inner_length
;
1344 something_changed
= 1;
1346 insn_current_address
+= insn_lengths
[inner_uid
];
1347 new_length
+= inner_length
;
1352 new_length
= insn_current_length (insn
);
1353 insn_current_address
+= new_length
;
1356 #ifdef ADJUST_INSN_LENGTH
1357 /* If needed, do any adjustment. */
1358 tmp_length
= new_length
;
1359 ADJUST_INSN_LENGTH (insn
, new_length
);
1360 insn_current_address
+= (new_length
- tmp_length
);
1363 if (new_length
!= insn_lengths
[uid
])
1365 insn_lengths
[uid
] = new_length
;
1366 something_changed
= 1;
1369 /* For a non-optimizing compile, do only a single pass. */
1374 free (varying_length
);
1376 #endif /* HAVE_ATTR_length */
1379 #ifdef HAVE_ATTR_length
1380 /* Given the body of an INSN known to be generated by an ASM statement, return
1381 the number of machine instructions likely to be generated for this insn.
1382 This is used to compute its length. */
1385 asm_insn_count (rtx body
)
1387 const char *template;
1390 if (GET_CODE (body
) == ASM_INPUT
)
1391 template = XSTR (body
, 0);
1393 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
, NULL
);
1395 for (; *template; template++)
1396 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template, template)
1397 || *template == '\n')
1404 /* ??? This is probably the wrong place for these. */
1405 /* Structure recording the mapping from source file and directory
1406 names at compile time to those to be embedded in debug
1408 typedef struct debug_prefix_map
1410 const char *old_prefix
;
1411 const char *new_prefix
;
1414 struct debug_prefix_map
*next
;
1417 /* Linked list of such structures. */
1418 debug_prefix_map
*debug_prefix_maps
;
1421 /* Record a debug file prefix mapping. ARG is the argument to
1422 -fdebug-prefix-map and must be of the form OLD=NEW. */
1425 add_debug_prefix_map (const char *arg
)
1427 debug_prefix_map
*map
;
1430 p
= strchr (arg
, '=');
1433 error ("invalid argument %qs to -fdebug-prefix-map", arg
);
1436 map
= XNEW (debug_prefix_map
);
1437 map
->old_prefix
= ggc_alloc_string (arg
, p
- arg
);
1438 map
->old_len
= p
- arg
;
1440 map
->new_prefix
= ggc_strdup (p
);
1441 map
->new_len
= strlen (p
);
1442 map
->next
= debug_prefix_maps
;
1443 debug_prefix_maps
= map
;
1446 /* Perform user-specified mapping of debug filename prefixes. Return
1447 the new name corresponding to FILENAME. */
1450 remap_debug_filename (const char *filename
)
1452 debug_prefix_map
*map
;
1457 for (map
= debug_prefix_maps
; map
; map
= map
->next
)
1458 if (strncmp (filename
, map
->old_prefix
, map
->old_len
) == 0)
1462 name
= filename
+ map
->old_len
;
1463 name_len
= strlen (name
) + 1;
1464 s
= (char *) alloca (name_len
+ map
->new_len
);
1465 memcpy (s
, map
->new_prefix
, map
->new_len
);
1466 memcpy (s
+ map
->new_len
, name
, name_len
);
1467 return ggc_strdup (s
);
1470 /* Output assembler code for the start of a function,
1471 and initialize some of the variables in this file
1472 for the new function. The label for the function and associated
1473 assembler pseudo-ops have already been output in `assemble_start_function'.
1475 FIRST is the first insn of the rtl for the function being compiled.
1476 FILE is the file to write assembler code to.
1477 OPTIMIZE is nonzero if we should eliminate redundant
1478 test and compare insns. */
1481 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1482 int optimize ATTRIBUTE_UNUSED
)
1486 this_is_asm_operands
= 0;
1488 last_filename
= locator_file (prologue_locator
);
1489 last_linenum
= locator_line (prologue_locator
);
1491 high_block_linenum
= high_function_linenum
= last_linenum
;
1493 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1495 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1496 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1497 dwarf2out_begin_prologue (0, NULL
);
1500 #ifdef LEAF_REG_REMAP
1501 if (current_function_uses_only_leaf_regs
)
1502 leaf_renumber_regs (first
);
1505 /* The Sun386i and perhaps other machines don't work right
1506 if the profiling code comes after the prologue. */
1507 #ifdef PROFILE_BEFORE_PROLOGUE
1508 if (current_function_profile
)
1509 profile_function (file
);
1510 #endif /* PROFILE_BEFORE_PROLOGUE */
1512 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1513 if (dwarf2out_do_frame ())
1514 dwarf2out_frame_debug (NULL_RTX
, false);
1517 /* If debugging, assign block numbers to all of the blocks in this
1521 reemit_insn_block_notes ();
1522 number_blocks (current_function_decl
);
1523 /* We never actually put out begin/end notes for the top-level
1524 block in the function. But, conceptually, that block is
1526 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1529 if (warn_frame_larger_than
1530 && get_frame_size () > frame_larger_than_size
)
1532 /* Issue a warning */
1533 warning (OPT_Wframe_larger_than_
,
1534 "the frame size of %wd bytes is larger than %wd bytes",
1535 get_frame_size (), frame_larger_than_size
);
1538 /* First output the function prologue: code to set up the stack frame. */
1539 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1541 /* If the machine represents the prologue as RTL, the profiling code must
1542 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1543 #ifdef HAVE_prologue
1544 if (! HAVE_prologue
)
1546 profile_after_prologue (file
);
1550 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1552 #ifndef PROFILE_BEFORE_PROLOGUE
1553 if (current_function_profile
)
1554 profile_function (file
);
1555 #endif /* not PROFILE_BEFORE_PROLOGUE */
1559 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1561 #ifndef NO_PROFILE_COUNTERS
1562 # define NO_PROFILE_COUNTERS 0
1564 #if defined(ASM_OUTPUT_REG_PUSH)
1565 int sval
= current_function_returns_struct
;
1566 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1567 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1568 int cxt
= cfun
->static_chain_decl
!= NULL
;
1570 #endif /* ASM_OUTPUT_REG_PUSH */
1572 if (! NO_PROFILE_COUNTERS
)
1574 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1575 switch_to_section (data_section
);
1576 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1577 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1578 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1581 switch_to_section (current_function_section ());
1583 #if defined(ASM_OUTPUT_REG_PUSH)
1584 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1586 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1590 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1592 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1594 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1597 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1602 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1604 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1606 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1608 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1611 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1616 #if defined(ASM_OUTPUT_REG_PUSH)
1617 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1619 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1624 /* Output assembler code for the end of a function.
1625 For clarity, args are same as those of `final_start_function'
1626 even though not all of them are needed. */
1629 final_end_function (void)
1633 (*debug_hooks
->end_function
) (high_function_linenum
);
1635 /* Finally, output the function epilogue:
1636 code to restore the stack frame and return to the caller. */
1637 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1639 /* And debug output. */
1640 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1642 #if defined (DWARF2_UNWIND_INFO)
1643 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1644 && dwarf2out_do_frame ())
1645 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1649 /* Output assembler code for some insns: all or part of a function.
1650 For description of args, see `final_start_function', above. */
1653 final (rtx first
, FILE *file
, int optimize
)
1659 last_ignored_compare
= 0;
1661 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1663 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1664 max_uid
= INSN_UID (insn
);
1666 /* If CC tracking across branches is enabled, record the insn which
1667 jumps to each branch only reached from one place. */
1668 if (optimize
&& JUMP_P (insn
))
1670 rtx lab
= JUMP_LABEL (insn
);
1671 if (lab
&& LABEL_NUSES (lab
) == 1)
1673 LABEL_REFS (lab
) = insn
;
1683 /* Output the insns. */
1684 for (insn
= first
; insn
;)
1686 #ifdef HAVE_ATTR_length
1687 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1689 /* This can be triggered by bugs elsewhere in the compiler if
1690 new insns are created after init_insn_lengths is called. */
1691 gcc_assert (NOTE_P (insn
));
1692 insn_current_address
= -1;
1695 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1696 #endif /* HAVE_ATTR_length */
1698 insn
= final_scan_insn (insn
, file
, optimize
, 0, &seen
);
1703 get_insn_template (int code
, rtx insn
)
1705 switch (insn_data
[code
].output_format
)
1707 case INSN_OUTPUT_FORMAT_SINGLE
:
1708 return insn_data
[code
].output
.single
;
1709 case INSN_OUTPUT_FORMAT_MULTI
:
1710 return insn_data
[code
].output
.multi
[which_alternative
];
1711 case INSN_OUTPUT_FORMAT_FUNCTION
:
1713 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1720 /* Emit the appropriate declaration for an alternate-entry-point
1721 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1722 LABEL_KIND != LABEL_NORMAL.
1724 The case fall-through in this function is intentional. */
1726 output_alternate_entry_point (FILE *file
, rtx insn
)
1728 const char *name
= LABEL_NAME (insn
);
1730 switch (LABEL_KIND (insn
))
1732 case LABEL_WEAK_ENTRY
:
1733 #ifdef ASM_WEAKEN_LABEL
1734 ASM_WEAKEN_LABEL (file
, name
);
1736 case LABEL_GLOBAL_ENTRY
:
1737 targetm
.asm_out
.globalize_label (file
, name
);
1738 case LABEL_STATIC_ENTRY
:
1739 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1740 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1742 ASM_OUTPUT_LABEL (file
, name
);
1751 /* The final scan for one insn, INSN.
1752 Args are same as in `final', except that INSN
1753 is the insn being scanned.
1754 Value returned is the next insn to be scanned.
1756 NOPEEPHOLES is the flag to disallow peephole processing (currently
1757 used for within delayed branch sequence output).
1759 SEEN is used to track the end of the prologue, for emitting
1760 debug information. We force the emission of a line note after
1761 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1762 at the beginning of the second basic block, whichever comes
1766 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1767 int nopeepholes ATTRIBUTE_UNUSED
, int *seen
)
1776 /* Ignore deleted insns. These can occur when we split insns (due to a
1777 template of "#") while not optimizing. */
1778 if (INSN_DELETED_P (insn
))
1779 return NEXT_INSN (insn
);
1781 switch (GET_CODE (insn
))
1784 switch (NOTE_KIND (insn
))
1786 case NOTE_INSN_DELETED
:
1789 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
1790 in_cold_section_p
= !in_cold_section_p
;
1791 #ifdef DWARF2_UNWIND_INFO
1792 if (dwarf2out_do_frame ())
1793 dwarf2out_switch_text_section ();
1796 (*debug_hooks
->switch_text_section
) ();
1798 switch_to_section (current_function_section ());
1801 case NOTE_INSN_BASIC_BLOCK
:
1802 #ifdef TARGET_UNWIND_INFO
1803 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1807 fprintf (asm_out_file
, "\t%s basic block %d\n",
1808 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1810 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1812 *seen
|= SEEN_EMITTED
;
1813 force_source_line
= true;
1820 case NOTE_INSN_EH_REGION_BEG
:
1821 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1822 NOTE_EH_HANDLER (insn
));
1825 case NOTE_INSN_EH_REGION_END
:
1826 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1827 NOTE_EH_HANDLER (insn
));
1830 case NOTE_INSN_PROLOGUE_END
:
1831 targetm
.asm_out
.function_end_prologue (file
);
1832 profile_after_prologue (file
);
1834 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1836 *seen
|= SEEN_EMITTED
;
1837 force_source_line
= true;
1844 case NOTE_INSN_EPILOGUE_BEG
:
1845 targetm
.asm_out
.function_begin_epilogue (file
);
1848 case NOTE_INSN_FUNCTION_BEG
:
1850 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1852 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1854 *seen
|= SEEN_EMITTED
;
1855 force_source_line
= true;
1862 case NOTE_INSN_BLOCK_BEG
:
1863 if (debug_info_level
== DINFO_LEVEL_NORMAL
1864 || debug_info_level
== DINFO_LEVEL_VERBOSE
1865 || write_symbols
== DWARF2_DEBUG
1866 || write_symbols
== VMS_AND_DWARF2_DEBUG
1867 || write_symbols
== VMS_DEBUG
)
1869 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1873 high_block_linenum
= last_linenum
;
1875 /* Output debugging info about the symbol-block beginning. */
1876 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1878 /* Mark this block as output. */
1879 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1881 if (write_symbols
== DBX_DEBUG
1882 || write_symbols
== SDB_DEBUG
)
1884 location_t
*locus_ptr
1885 = block_nonartificial_location (NOTE_BLOCK (insn
));
1887 if (locus_ptr
!= NULL
)
1889 override_filename
= LOCATION_FILE (*locus_ptr
);
1890 override_linenum
= LOCATION_LINE (*locus_ptr
);
1895 case NOTE_INSN_BLOCK_END
:
1896 if (debug_info_level
== DINFO_LEVEL_NORMAL
1897 || debug_info_level
== DINFO_LEVEL_VERBOSE
1898 || write_symbols
== DWARF2_DEBUG
1899 || write_symbols
== VMS_AND_DWARF2_DEBUG
1900 || write_symbols
== VMS_DEBUG
)
1902 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1906 /* End of a symbol-block. */
1908 gcc_assert (block_depth
>= 0);
1910 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1912 if (write_symbols
== DBX_DEBUG
1913 || write_symbols
== SDB_DEBUG
)
1915 tree outer_block
= BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn
));
1916 location_t
*locus_ptr
1917 = block_nonartificial_location (outer_block
);
1919 if (locus_ptr
!= NULL
)
1921 override_filename
= LOCATION_FILE (*locus_ptr
);
1922 override_linenum
= LOCATION_LINE (*locus_ptr
);
1926 override_filename
= NULL
;
1927 override_linenum
= 0;
1932 case NOTE_INSN_DELETED_LABEL
:
1933 /* Emit the label. We may have deleted the CODE_LABEL because
1934 the label could be proved to be unreachable, though still
1935 referenced (in the form of having its address taken. */
1936 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1939 case NOTE_INSN_VAR_LOCATION
:
1940 (*debug_hooks
->var_location
) (insn
);
1950 #if defined (DWARF2_UNWIND_INFO)
1951 if (dwarf2out_do_frame ())
1952 dwarf2out_frame_debug (insn
, false);
1957 /* The target port might emit labels in the output function for
1958 some insn, e.g. sh.c output_branchy_insn. */
1959 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1961 int align
= LABEL_TO_ALIGNMENT (insn
);
1962 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1963 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1966 if (align
&& NEXT_INSN (insn
))
1968 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1969 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1971 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1972 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1974 ASM_OUTPUT_ALIGN (file
, align
);
1983 if (LABEL_NAME (insn
))
1984 (*debug_hooks
->label
) (insn
);
1988 fputs (ASM_APP_OFF
, file
);
1992 next
= next_nonnote_insn (insn
);
1993 if (next
!= 0 && JUMP_P (next
))
1995 rtx nextbody
= PATTERN (next
);
1997 /* If this label is followed by a jump-table,
1998 make sure we put the label in the read-only section. Also
1999 possibly write the label and jump table together. */
2001 if (GET_CODE (nextbody
) == ADDR_VEC
2002 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2004 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2005 /* In this case, the case vector is being moved by the
2006 target, so don't output the label at all. Leave that
2007 to the back end macros. */
2009 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2013 switch_to_section (targetm
.asm_out
.function_rodata_section
2014 (current_function_decl
));
2016 #ifdef ADDR_VEC_ALIGN
2017 log_align
= ADDR_VEC_ALIGN (next
);
2019 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2021 ASM_OUTPUT_ALIGN (file
, log_align
);
2024 switch_to_section (current_function_section ());
2026 #ifdef ASM_OUTPUT_CASE_LABEL
2027 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2030 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
2036 if (LABEL_ALT_ENTRY_P (insn
))
2037 output_alternate_entry_point (file
, insn
);
2039 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
2044 rtx body
= PATTERN (insn
);
2045 int insn_code_number
;
2046 const char *template;
2048 #ifdef HAVE_conditional_execution
2049 /* Reset this early so it is correct for ASM statements. */
2050 current_insn_predicate
= NULL_RTX
;
2052 /* An INSN, JUMP_INSN or CALL_INSN.
2053 First check for special kinds that recog doesn't recognize. */
2055 if (GET_CODE (body
) == USE
/* These are just declarations. */
2056 || GET_CODE (body
) == CLOBBER
)
2061 /* If there is a REG_CC_SETTER note on this insn, it means that
2062 the setting of the condition code was done in the delay slot
2063 of the insn that branched here. So recover the cc status
2064 from the insn that set it. */
2066 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2069 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2070 cc_prev_status
= cc_status
;
2075 /* Detect insns that are really jump-tables
2076 and output them as such. */
2078 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2080 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2084 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2085 switch_to_section (targetm
.asm_out
.function_rodata_section
2086 (current_function_decl
));
2088 switch_to_section (current_function_section ());
2092 fputs (ASM_APP_OFF
, file
);
2096 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2097 if (GET_CODE (body
) == ADDR_VEC
)
2099 #ifdef ASM_OUTPUT_ADDR_VEC
2100 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2107 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2108 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2114 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2115 for (idx
= 0; idx
< vlen
; idx
++)
2117 if (GET_CODE (body
) == ADDR_VEC
)
2119 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2120 ASM_OUTPUT_ADDR_VEC_ELT
2121 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2128 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2129 ASM_OUTPUT_ADDR_DIFF_ELT
2132 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2133 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2139 #ifdef ASM_OUTPUT_CASE_END
2140 ASM_OUTPUT_CASE_END (file
,
2141 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2146 switch_to_section (current_function_section ());
2150 /* Output this line note if it is the first or the last line
2152 if (notice_source_line (insn
))
2154 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2157 if (GET_CODE (body
) == ASM_INPUT
)
2159 const char *string
= XSTR (body
, 0);
2161 /* There's no telling what that did to the condition codes. */
2166 expanded_location loc
;
2170 fputs (ASM_APP_ON
, file
);
2173 loc
= expand_location (ASM_INPUT_SOURCE_LOCATION (body
));
2174 if (*loc
.file
&& loc
.line
)
2175 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2176 ASM_COMMENT_START
, loc
.line
, loc
.file
);
2177 fprintf (asm_out_file
, "\t%s\n", string
);
2178 #if HAVE_AS_LINE_ZERO
2179 if (*loc
.file
&& loc
.line
)
2180 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2186 /* Detect `asm' construct with operands. */
2187 if (asm_noperands (body
) >= 0)
2189 unsigned int noperands
= asm_noperands (body
);
2190 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2193 expanded_location expanded
;
2195 /* There's no telling what that did to the condition codes. */
2198 /* Get out the operand values. */
2199 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
, &loc
);
2200 /* Inhibit dying on what would otherwise be compiler bugs. */
2201 insn_noperands
= noperands
;
2202 this_is_asm_operands
= insn
;
2203 expanded
= expand_location (loc
);
2205 #ifdef FINAL_PRESCAN_INSN
2206 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2209 /* Output the insn using them. */
2214 fputs (ASM_APP_ON
, file
);
2217 if (expanded
.file
&& expanded
.line
)
2218 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2219 ASM_COMMENT_START
, expanded
.line
, expanded
.file
);
2220 output_asm_insn (string
, ops
);
2221 #if HAVE_AS_LINE_ZERO
2222 if (expanded
.file
&& expanded
.line
)
2223 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2227 this_is_asm_operands
= 0;
2233 fputs (ASM_APP_OFF
, file
);
2237 if (GET_CODE (body
) == SEQUENCE
)
2239 /* A delayed-branch sequence */
2242 final_sequence
= body
;
2244 /* Record the delay slots' frame information before the branch.
2245 This is needed for delayed calls: see execute_cfa_program(). */
2246 #if defined (DWARF2_UNWIND_INFO)
2247 if (dwarf2out_do_frame ())
2248 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2249 dwarf2out_frame_debug (XVECEXP (body
, 0, i
), false);
2252 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2253 force the restoration of a comparison that was previously
2254 thought unnecessary. If that happens, cancel this sequence
2255 and cause that insn to be restored. */
2257 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, 1, seen
);
2258 if (next
!= XVECEXP (body
, 0, 1))
2264 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2266 rtx insn
= XVECEXP (body
, 0, i
);
2267 rtx next
= NEXT_INSN (insn
);
2268 /* We loop in case any instruction in a delay slot gets
2271 insn
= final_scan_insn (insn
, file
, 0, 1, seen
);
2272 while (insn
!= next
);
2274 #ifdef DBR_OUTPUT_SEQEND
2275 DBR_OUTPUT_SEQEND (file
);
2279 /* If the insn requiring the delay slot was a CALL_INSN, the
2280 insns in the delay slot are actually executed before the
2281 called function. Hence we don't preserve any CC-setting
2282 actions in these insns and the CC must be marked as being
2283 clobbered by the function. */
2284 if (CALL_P (XVECEXP (body
, 0, 0)))
2291 /* We have a real machine instruction as rtl. */
2293 body
= PATTERN (insn
);
2296 set
= single_set (insn
);
2298 /* Check for redundant test and compare instructions
2299 (when the condition codes are already set up as desired).
2300 This is done only when optimizing; if not optimizing,
2301 it should be possible for the user to alter a variable
2302 with the debugger in between statements
2303 and the next statement should reexamine the variable
2304 to compute the condition codes. */
2309 && GET_CODE (SET_DEST (set
)) == CC0
2310 && insn
!= last_ignored_compare
)
2312 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2313 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2314 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2316 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2317 XEXP (SET_SRC (set
), 0)
2318 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2319 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2320 XEXP (SET_SRC (set
), 1)
2321 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2323 if ((cc_status
.value1
!= 0
2324 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2325 || (cc_status
.value2
!= 0
2326 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2328 /* Don't delete insn if it has an addressing side-effect. */
2329 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2330 /* or if anything in it is volatile. */
2331 && ! volatile_refs_p (PATTERN (insn
)))
2333 /* We don't really delete the insn; just ignore it. */
2334 last_ignored_compare
= insn
;
2343 /* If this is a conditional branch, maybe modify it
2344 if the cc's are in a nonstandard state
2345 so that it accomplishes the same thing that it would
2346 do straightforwardly if the cc's were set up normally. */
2348 if (cc_status
.flags
!= 0
2350 && GET_CODE (body
) == SET
2351 && SET_DEST (body
) == pc_rtx
2352 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2353 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2354 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
)
2356 /* This function may alter the contents of its argument
2357 and clear some of the cc_status.flags bits.
2358 It may also return 1 meaning condition now always true
2359 or -1 meaning condition now always false
2360 or 2 meaning condition nontrivial but altered. */
2361 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2362 /* If condition now has fixed value, replace the IF_THEN_ELSE
2363 with its then-operand or its else-operand. */
2365 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2367 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2369 /* The jump is now either unconditional or a no-op.
2370 If it has become a no-op, don't try to output it.
2371 (It would not be recognized.) */
2372 if (SET_SRC (body
) == pc_rtx
)
2377 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2378 /* Replace (set (pc) (return)) with (return). */
2379 PATTERN (insn
) = body
= SET_SRC (body
);
2381 /* Rerecognize the instruction if it has changed. */
2383 INSN_CODE (insn
) = -1;
2386 /* If this is a conditional trap, maybe modify it if the cc's
2387 are in a nonstandard state so that it accomplishes the same
2388 thing that it would do straightforwardly if the cc's were
2390 if (cc_status
.flags
!= 0
2391 && NONJUMP_INSN_P (insn
)
2392 && GET_CODE (body
) == TRAP_IF
2393 && COMPARISON_P (TRAP_CONDITION (body
))
2394 && XEXP (TRAP_CONDITION (body
), 0) == cc0_rtx
)
2396 /* This function may alter the contents of its argument
2397 and clear some of the cc_status.flags bits.
2398 It may also return 1 meaning condition now always true
2399 or -1 meaning condition now always false
2400 or 2 meaning condition nontrivial but altered. */
2401 int result
= alter_cond (TRAP_CONDITION (body
));
2403 /* If TRAP_CONDITION has become always false, delete the
2411 /* If TRAP_CONDITION has become always true, replace
2412 TRAP_CONDITION with const_true_rtx. */
2414 TRAP_CONDITION (body
) = const_true_rtx
;
2416 /* Rerecognize the instruction if it has changed. */
2418 INSN_CODE (insn
) = -1;
2421 /* Make same adjustments to instructions that examine the
2422 condition codes without jumping and instructions that
2423 handle conditional moves (if this machine has either one). */
2425 if (cc_status
.flags
!= 0
2428 rtx cond_rtx
, then_rtx
, else_rtx
;
2431 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2433 cond_rtx
= XEXP (SET_SRC (set
), 0);
2434 then_rtx
= XEXP (SET_SRC (set
), 1);
2435 else_rtx
= XEXP (SET_SRC (set
), 2);
2439 cond_rtx
= SET_SRC (set
);
2440 then_rtx
= const_true_rtx
;
2441 else_rtx
= const0_rtx
;
2444 switch (GET_CODE (cond_rtx
))
2458 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2460 result
= alter_cond (cond_rtx
);
2462 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2463 else if (result
== -1)
2464 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2465 else if (result
== 2)
2466 INSN_CODE (insn
) = -1;
2467 if (SET_DEST (set
) == SET_SRC (set
))
2479 #ifdef HAVE_peephole
2480 /* Do machine-specific peephole optimizations if desired. */
2482 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2484 rtx next
= peephole (insn
);
2485 /* When peepholing, if there were notes within the peephole,
2486 emit them before the peephole. */
2487 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2489 rtx note
, prev
= PREV_INSN (insn
);
2491 for (note
= NEXT_INSN (insn
); note
!= next
;
2492 note
= NEXT_INSN (note
))
2493 final_scan_insn (note
, file
, optimize
, nopeepholes
, seen
);
2495 /* Put the notes in the proper position for a later
2496 rescan. For example, the SH target can do this
2497 when generating a far jump in a delayed branch
2499 note
= NEXT_INSN (insn
);
2500 PREV_INSN (note
) = prev
;
2501 NEXT_INSN (prev
) = note
;
2502 NEXT_INSN (PREV_INSN (next
)) = insn
;
2503 PREV_INSN (insn
) = PREV_INSN (next
);
2504 NEXT_INSN (insn
) = next
;
2505 PREV_INSN (next
) = insn
;
2508 /* PEEPHOLE might have changed this. */
2509 body
= PATTERN (insn
);
2513 /* Try to recognize the instruction.
2514 If successful, verify that the operands satisfy the
2515 constraints for the instruction. Crash if they don't,
2516 since `reload' should have changed them so that they do. */
2518 insn_code_number
= recog_memoized (insn
);
2519 cleanup_subreg_operands (insn
);
2521 /* Dump the insn in the assembly for debugging. */
2522 if (flag_dump_rtl_in_asm
)
2524 print_rtx_head
= ASM_COMMENT_START
;
2525 print_rtl_single (asm_out_file
, insn
);
2526 print_rtx_head
= "";
2529 if (! constrain_operands_cached (1))
2530 fatal_insn_not_found (insn
);
2532 /* Some target machines need to prescan each insn before
2535 #ifdef FINAL_PRESCAN_INSN
2536 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2539 #ifdef HAVE_conditional_execution
2540 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2541 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2545 cc_prev_status
= cc_status
;
2547 /* Update `cc_status' for this instruction.
2548 The instruction's output routine may change it further.
2549 If the output routine for a jump insn needs to depend
2550 on the cc status, it should look at cc_prev_status. */
2552 NOTICE_UPDATE_CC (body
, insn
);
2555 current_output_insn
= debug_insn
= insn
;
2557 #if defined (DWARF2_UNWIND_INFO)
2558 if (CALL_P (insn
) && dwarf2out_do_frame ())
2559 dwarf2out_frame_debug (insn
, false);
2562 /* Find the proper template for this insn. */
2563 template = get_insn_template (insn_code_number
, insn
);
2565 /* If the C code returns 0, it means that it is a jump insn
2566 which follows a deleted test insn, and that test insn
2567 needs to be reinserted. */
2572 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2574 /* We have already processed the notes between the setter and
2575 the user. Make sure we don't process them again, this is
2576 particularly important if one of the notes is a block
2577 scope note or an EH note. */
2579 prev
!= last_ignored_compare
;
2580 prev
= PREV_INSN (prev
))
2583 delete_insn (prev
); /* Use delete_note. */
2589 /* If the template is the string "#", it means that this insn must
2591 if (template[0] == '#' && template[1] == '\0')
2593 rtx
new = try_split (body
, insn
, 0);
2595 /* If we didn't split the insn, go away. */
2596 if (new == insn
&& PATTERN (new) == body
)
2597 fatal_insn ("could not split insn", insn
);
2599 #ifdef HAVE_ATTR_length
2600 /* This instruction should have been split in shorten_branches,
2601 to ensure that we would have valid length info for the
2609 #ifdef TARGET_UNWIND_INFO
2610 /* ??? This will put the directives in the wrong place if
2611 get_insn_template outputs assembly directly. However calling it
2612 before get_insn_template breaks if the insns is split. */
2613 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2616 /* Output assembler code from the template. */
2617 output_asm_insn (template, recog_data
.operand
);
2619 /* If necessary, report the effect that the instruction has on
2620 the unwind info. We've already done this for delay slots
2621 and call instructions. */
2622 #if defined (DWARF2_UNWIND_INFO)
2623 if (final_sequence
== 0
2624 #if !defined (HAVE_prologue)
2625 && !ACCUMULATE_OUTGOING_ARGS
2627 && dwarf2out_do_frame ())
2628 dwarf2out_frame_debug (insn
, true);
2631 current_output_insn
= debug_insn
= 0;
2634 return NEXT_INSN (insn
);
2637 /* Return whether a source line note needs to be emitted before INSN. */
2640 notice_source_line (rtx insn
)
2642 const char *filename
;
2645 if (override_filename
)
2647 filename
= override_filename
;
2648 linenum
= override_linenum
;
2652 filename
= insn_file (insn
);
2653 linenum
= insn_line (insn
);
2657 && (force_source_line
2658 || filename
!= last_filename
2659 || last_linenum
!= linenum
))
2661 force_source_line
= false;
2662 last_filename
= filename
;
2663 last_linenum
= linenum
;
2664 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2665 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2671 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2672 directly to the desired hard register. */
2675 cleanup_subreg_operands (rtx insn
)
2678 bool changed
= false;
2679 extract_insn_cached (insn
);
2680 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2682 /* The following test cannot use recog_data.operand when testing
2683 for a SUBREG: the underlying object might have been changed
2684 already if we are inside a match_operator expression that
2685 matches the else clause. Instead we test the underlying
2686 expression directly. */
2687 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2689 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2692 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2693 || GET_CODE (recog_data
.operand
[i
]) == MULT
2694 || MEM_P (recog_data
.operand
[i
]))
2695 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
], &changed
);
2698 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2700 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2702 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2705 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2706 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2707 || MEM_P (*recog_data
.dup_loc
[i
]))
2708 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
], &changed
);
2711 df_insn_rescan (insn
);
2714 /* If X is a SUBREG, replace it with a REG or a MEM,
2715 based on the thing it is a subreg of. */
2718 alter_subreg (rtx
*xp
)
2721 rtx y
= SUBREG_REG (x
);
2723 /* simplify_subreg does not remove subreg from volatile references.
2724 We are required to. */
2727 int offset
= SUBREG_BYTE (x
);
2729 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2730 contains 0 instead of the proper offset. See simplify_subreg. */
2732 && GET_MODE_SIZE (GET_MODE (y
)) < GET_MODE_SIZE (GET_MODE (x
)))
2734 int difference
= GET_MODE_SIZE (GET_MODE (y
))
2735 - GET_MODE_SIZE (GET_MODE (x
));
2736 if (WORDS_BIG_ENDIAN
)
2737 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
2738 if (BYTES_BIG_ENDIAN
)
2739 offset
+= difference
% UNITS_PER_WORD
;
2742 *xp
= adjust_address (y
, GET_MODE (x
), offset
);
2746 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2753 /* Simplify_subreg can't handle some REG cases, but we have to. */
2755 HOST_WIDE_INT offset
;
2757 regno
= subreg_regno (x
);
2758 if (subreg_lowpart_p (x
))
2759 offset
= byte_lowpart_offset (GET_MODE (x
), GET_MODE (y
));
2761 offset
= SUBREG_BYTE (x
);
2762 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, offset
);
2769 /* Do alter_subreg on all the SUBREGs contained in X. */
2772 walk_alter_subreg (rtx
*xp
, bool *changed
)
2775 switch (GET_CODE (x
))
2780 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2781 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1), changed
);
2786 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2791 return alter_subreg (xp
);
2802 /* Given BODY, the body of a jump instruction, alter the jump condition
2803 as required by the bits that are set in cc_status.flags.
2804 Not all of the bits there can be handled at this level in all cases.
2806 The value is normally 0.
2807 1 means that the condition has become always true.
2808 -1 means that the condition has become always false.
2809 2 means that COND has been altered. */
2812 alter_cond (rtx cond
)
2816 if (cc_status
.flags
& CC_REVERSED
)
2819 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2822 if (cc_status
.flags
& CC_INVERTED
)
2825 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2828 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2829 switch (GET_CODE (cond
))
2834 /* Jump becomes unconditional. */
2840 /* Jump becomes no-op. */
2844 PUT_CODE (cond
, EQ
);
2849 PUT_CODE (cond
, NE
);
2857 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2858 switch (GET_CODE (cond
))
2862 /* Jump becomes unconditional. */
2867 /* Jump becomes no-op. */
2872 PUT_CODE (cond
, EQ
);
2878 PUT_CODE (cond
, NE
);
2886 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2887 switch (GET_CODE (cond
))
2890 /* Jump becomes unconditional. */
2894 PUT_CODE (cond
, EQ
);
2899 PUT_CODE (cond
, NE
);
2904 /* Jump becomes no-op. */
2911 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2912 switch (GET_CODE (cond
))
2918 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2923 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2928 if (cc_status
.flags
& CC_NOT_SIGNED
)
2929 /* The flags are valid if signed condition operators are converted
2931 switch (GET_CODE (cond
))
2934 PUT_CODE (cond
, LEU
);
2939 PUT_CODE (cond
, LTU
);
2944 PUT_CODE (cond
, GTU
);
2949 PUT_CODE (cond
, GEU
);
2961 /* Report inconsistency between the assembler template and the operands.
2962 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2965 output_operand_lossage (const char *cmsgid
, ...)
2969 const char *pfx_str
;
2972 va_start (ap
, cmsgid
);
2974 pfx_str
= this_is_asm_operands
? _("invalid 'asm': ") : "output_operand: ";
2975 asprintf (&fmt_string
, "%s%s", pfx_str
, _(cmsgid
));
2976 vasprintf (&new_message
, fmt_string
, ap
);
2978 if (this_is_asm_operands
)
2979 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2981 internal_error ("%s", new_message
);
2988 /* Output of assembler code from a template, and its subroutines. */
2990 /* Annotate the assembly with a comment describing the pattern and
2991 alternative used. */
2994 output_asm_name (void)
2998 int num
= INSN_CODE (debug_insn
);
2999 fprintf (asm_out_file
, "\t%s %d\t%s",
3000 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3001 insn_data
[num
].name
);
3002 if (insn_data
[num
].n_alternatives
> 1)
3003 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3004 #ifdef HAVE_ATTR_length
3005 fprintf (asm_out_file
, "\t[length = %d]",
3006 get_attr_length (debug_insn
));
3008 /* Clear this so only the first assembler insn
3009 of any rtl insn will get the special comment for -dp. */
3014 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3015 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3016 corresponds to the address of the object and 0 if to the object. */
3019 get_mem_expr_from_op (rtx op
, int *paddressp
)
3027 return REG_EXPR (op
);
3028 else if (!MEM_P (op
))
3031 if (MEM_EXPR (op
) != 0)
3032 return MEM_EXPR (op
);
3034 /* Otherwise we have an address, so indicate it and look at the address. */
3038 /* First check if we have a decl for the address, then look at the right side
3039 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3040 But don't allow the address to itself be indirect. */
3041 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3043 else if (GET_CODE (op
) == PLUS
3044 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3047 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
3048 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
3051 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3052 return inner_addressp
? 0 : expr
;
3055 /* Output operand names for assembler instructions. OPERANDS is the
3056 operand vector, OPORDER is the order to write the operands, and NOPS
3057 is the number of operands to write. */
3060 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
3065 for (i
= 0; i
< nops
; i
++)
3068 rtx op
= operands
[oporder
[i
]];
3069 tree expr
= get_mem_expr_from_op (op
, &addressp
);
3071 fprintf (asm_out_file
, "%c%s",
3072 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
3076 fprintf (asm_out_file
, "%s",
3077 addressp
? "*" : "");
3078 print_mem_expr (asm_out_file
, expr
);
3081 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
3082 && ORIGINAL_REGNO (op
) != REGNO (op
))
3083 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
3087 /* Output text from TEMPLATE to the assembler output file,
3088 obeying %-directions to substitute operands taken from
3089 the vector OPERANDS.
3091 %N (for N a digit) means print operand N in usual manner.
3092 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3093 and print the label name with no punctuation.
3094 %cN means require operand N to be a constant
3095 and print the constant expression with no punctuation.
3096 %aN means expect operand N to be a memory address
3097 (not a memory reference!) and print a reference
3099 %nN means expect operand N to be a constant
3100 and print a constant expression for minus the value
3101 of the operand, with no other punctuation. */
3104 output_asm_insn (const char *template, rtx
*operands
)
3108 #ifdef ASSEMBLER_DIALECT
3111 int oporder
[MAX_RECOG_OPERANDS
];
3112 char opoutput
[MAX_RECOG_OPERANDS
];
3115 /* An insn may return a null string template
3116 in a case where no assembler code is needed. */
3120 memset (opoutput
, 0, sizeof opoutput
);
3122 putc ('\t', asm_out_file
);
3124 #ifdef ASM_OUTPUT_OPCODE
3125 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3132 if (flag_verbose_asm
)
3133 output_asm_operand_names (operands
, oporder
, ops
);
3134 if (flag_print_asm_name
)
3138 memset (opoutput
, 0, sizeof opoutput
);
3140 putc (c
, asm_out_file
);
3141 #ifdef ASM_OUTPUT_OPCODE
3142 while ((c
= *p
) == '\t')
3144 putc (c
, asm_out_file
);
3147 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3151 #ifdef ASSEMBLER_DIALECT
3157 output_operand_lossage ("nested assembly dialect alternatives");
3161 /* If we want the first dialect, do nothing. Otherwise, skip
3162 DIALECT_NUMBER of strings ending with '|'. */
3163 for (i
= 0; i
< dialect_number
; i
++)
3165 while (*p
&& *p
!= '}' && *p
++ != '|')
3174 output_operand_lossage ("unterminated assembly dialect alternative");
3181 /* Skip to close brace. */
3186 output_operand_lossage ("unterminated assembly dialect alternative");
3190 while (*p
++ != '}');
3194 putc (c
, asm_out_file
);
3199 putc (c
, asm_out_file
);
3205 /* %% outputs a single %. */
3209 putc (c
, asm_out_file
);
3211 /* %= outputs a number which is unique to each insn in the entire
3212 compilation. This is useful for making local labels that are
3213 referred to more than once in a given insn. */
3217 fprintf (asm_out_file
, "%d", insn_counter
);
3219 /* % followed by a letter and some digits
3220 outputs an operand in a special way depending on the letter.
3221 Letters `acln' are implemented directly.
3222 Other letters are passed to `output_operand' so that
3223 the PRINT_OPERAND macro can define them. */
3224 else if (ISALPHA (*p
))
3227 unsigned long opnum
;
3230 opnum
= strtoul (p
, &endptr
, 10);
3233 output_operand_lossage ("operand number missing "
3235 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3236 output_operand_lossage ("operand number out of range");
3237 else if (letter
== 'l')
3238 output_asm_label (operands
[opnum
]);
3239 else if (letter
== 'a')
3240 output_address (operands
[opnum
]);
3241 else if (letter
== 'c')
3243 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3244 output_addr_const (asm_out_file
, operands
[opnum
]);
3246 output_operand (operands
[opnum
], 'c');
3248 else if (letter
== 'n')
3250 if (GET_CODE (operands
[opnum
]) == CONST_INT
)
3251 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3252 - INTVAL (operands
[opnum
]));
3255 putc ('-', asm_out_file
);
3256 output_addr_const (asm_out_file
, operands
[opnum
]);
3260 output_operand (operands
[opnum
], letter
);
3262 if (!opoutput
[opnum
])
3263 oporder
[ops
++] = opnum
;
3264 opoutput
[opnum
] = 1;
3269 /* % followed by a digit outputs an operand the default way. */
3270 else if (ISDIGIT (*p
))
3272 unsigned long opnum
;
3275 opnum
= strtoul (p
, &endptr
, 10);
3276 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3277 output_operand_lossage ("operand number out of range");
3279 output_operand (operands
[opnum
], 0);
3281 if (!opoutput
[opnum
])
3282 oporder
[ops
++] = opnum
;
3283 opoutput
[opnum
] = 1;
3288 /* % followed by punctuation: output something for that
3289 punctuation character alone, with no operand.
3290 The PRINT_OPERAND macro decides what is actually done. */
3291 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3292 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3293 output_operand (NULL_RTX
, *p
++);
3296 output_operand_lossage ("invalid %%-code");
3300 putc (c
, asm_out_file
);
3303 /* Write out the variable names for operands, if we know them. */
3304 if (flag_verbose_asm
)
3305 output_asm_operand_names (operands
, oporder
, ops
);
3306 if (flag_print_asm_name
)
3309 putc ('\n', asm_out_file
);
3312 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3315 output_asm_label (rtx x
)
3319 if (GET_CODE (x
) == LABEL_REF
)
3323 && NOTE_KIND (x
) == NOTE_INSN_DELETED_LABEL
))
3324 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3326 output_operand_lossage ("'%%l' operand isn't a label");
3328 assemble_name (asm_out_file
, buf
);
3331 /* Print operand X using machine-dependent assembler syntax.
3332 The macro PRINT_OPERAND is defined just to control this function.
3333 CODE is a non-digit that preceded the operand-number in the % spec,
3334 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3335 between the % and the digits.
3336 When CODE is a non-letter, X is 0.
3338 The meanings of the letters are machine-dependent and controlled
3339 by PRINT_OPERAND. */
3342 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3344 if (x
&& GET_CODE (x
) == SUBREG
)
3345 x
= alter_subreg (&x
);
3347 /* X must not be a pseudo reg. */
3348 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3350 PRINT_OPERAND (asm_out_file
, x
, code
);
3353 /* Print a memory reference operand for address X
3354 using machine-dependent assembler syntax.
3355 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3358 output_address (rtx x
)
3360 bool changed
= false;
3361 walk_alter_subreg (&x
, &changed
);
3362 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3365 /* Print an integer constant expression in assembler syntax.
3366 Addition and subtraction are the only arithmetic
3367 that may appear in these expressions. */
3370 output_addr_const (FILE *file
, rtx x
)
3375 switch (GET_CODE (x
))
3382 if (SYMBOL_REF_DECL (x
))
3383 mark_decl_referenced (SYMBOL_REF_DECL (x
));
3384 #ifdef ASM_OUTPUT_SYMBOL_REF
3385 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3387 assemble_name (file
, XSTR (x
, 0));
3395 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3396 #ifdef ASM_OUTPUT_LABEL_REF
3397 ASM_OUTPUT_LABEL_REF (file
, buf
);
3399 assemble_name (file
, buf
);
3404 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3408 /* This used to output parentheses around the expression,
3409 but that does not work on the 386 (either ATT or BSD assembler). */
3410 output_addr_const (file
, XEXP (x
, 0));
3414 if (GET_MODE (x
) == VOIDmode
)
3416 /* We can use %d if the number is one word and positive. */
3417 if (CONST_DOUBLE_HIGH (x
))
3418 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3419 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3420 else if (CONST_DOUBLE_LOW (x
) < 0)
3421 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3423 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3426 /* We can't handle floating point constants;
3427 PRINT_OPERAND must handle them. */
3428 output_operand_lossage ("floating constant misused");
3432 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_FIXED_VALUE_LOW (x
));
3436 /* Some assemblers need integer constants to appear last (eg masm). */
3437 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3439 output_addr_const (file
, XEXP (x
, 1));
3440 if (INTVAL (XEXP (x
, 0)) >= 0)
3441 fprintf (file
, "+");
3442 output_addr_const (file
, XEXP (x
, 0));
3446 output_addr_const (file
, XEXP (x
, 0));
3447 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3448 || INTVAL (XEXP (x
, 1)) >= 0)
3449 fprintf (file
, "+");
3450 output_addr_const (file
, XEXP (x
, 1));
3455 /* Avoid outputting things like x-x or x+5-x,
3456 since some assemblers can't handle that. */
3457 x
= simplify_subtraction (x
);
3458 if (GET_CODE (x
) != MINUS
)
3461 output_addr_const (file
, XEXP (x
, 0));
3462 fprintf (file
, "-");
3463 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3464 || GET_CODE (XEXP (x
, 1)) == PC
3465 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3466 output_addr_const (file
, XEXP (x
, 1));
3469 fputs (targetm
.asm_out
.open_paren
, file
);
3470 output_addr_const (file
, XEXP (x
, 1));
3471 fputs (targetm
.asm_out
.close_paren
, file
);
3479 output_addr_const (file
, XEXP (x
, 0));
3483 #ifdef OUTPUT_ADDR_CONST_EXTRA
3484 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3489 output_operand_lossage ("invalid expression as operand");
3493 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3494 %R prints the value of REGISTER_PREFIX.
3495 %L prints the value of LOCAL_LABEL_PREFIX.
3496 %U prints the value of USER_LABEL_PREFIX.
3497 %I prints the value of IMMEDIATE_PREFIX.
3498 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3499 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3501 We handle alternate assembler dialects here, just like output_asm_insn. */
3504 asm_fprintf (FILE *file
, const char *p
, ...)
3510 va_start (argptr
, p
);
3517 #ifdef ASSEMBLER_DIALECT
3522 /* If we want the first dialect, do nothing. Otherwise, skip
3523 DIALECT_NUMBER of strings ending with '|'. */
3524 for (i
= 0; i
< dialect_number
; i
++)
3526 while (*p
&& *p
++ != '|')
3536 /* Skip to close brace. */
3537 while (*p
&& *p
++ != '}')
3548 while (strchr ("-+ #0", c
))
3553 while (ISDIGIT (c
) || c
== '.')
3564 case 'd': case 'i': case 'u':
3565 case 'x': case 'X': case 'o':
3569 fprintf (file
, buf
, va_arg (argptr
, int));
3573 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3574 'o' cases, but we do not check for those cases. It
3575 means that the value is a HOST_WIDE_INT, which may be
3576 either `long' or `long long'. */
3577 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3578 q
+= strlen (HOST_WIDE_INT_PRINT
);
3581 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3586 #ifdef HAVE_LONG_LONG
3592 fprintf (file
, buf
, va_arg (argptr
, long long));
3599 fprintf (file
, buf
, va_arg (argptr
, long));
3607 fprintf (file
, buf
, va_arg (argptr
, char *));
3611 #ifdef ASM_OUTPUT_OPCODE
3612 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3617 #ifdef REGISTER_PREFIX
3618 fprintf (file
, "%s", REGISTER_PREFIX
);
3623 #ifdef IMMEDIATE_PREFIX
3624 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3629 #ifdef LOCAL_LABEL_PREFIX
3630 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3635 fputs (user_label_prefix
, file
);
3638 #ifdef ASM_FPRINTF_EXTENSIONS
3639 /* Uppercase letters are reserved for general use by asm_fprintf
3640 and so are not available to target specific code. In order to
3641 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3642 they are defined here. As they get turned into real extensions
3643 to asm_fprintf they should be removed from this list. */
3644 case 'A': case 'B': case 'C': case 'D': case 'E':
3645 case 'F': case 'G': case 'H': case 'J': case 'K':
3646 case 'M': case 'N': case 'P': case 'Q': case 'S':
3647 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3650 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3663 /* Split up a CONST_DOUBLE or integer constant rtx
3664 into two rtx's for single words,
3665 storing in *FIRST the word that comes first in memory in the target
3666 and in *SECOND the other. */
3669 split_double (rtx value
, rtx
*first
, rtx
*second
)
3671 if (GET_CODE (value
) == CONST_INT
)
3673 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3675 /* In this case the CONST_INT holds both target words.
3676 Extract the bits from it into two word-sized pieces.
3677 Sign extend each half to HOST_WIDE_INT. */
3678 unsigned HOST_WIDE_INT low
, high
;
3679 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3681 /* Set sign_bit to the most significant bit of a word. */
3683 sign_bit
<<= BITS_PER_WORD
- 1;
3685 /* Set mask so that all bits of the word are set. We could
3686 have used 1 << BITS_PER_WORD instead of basing the
3687 calculation on sign_bit. However, on machines where
3688 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3689 compiler warning, even though the code would never be
3691 mask
= sign_bit
<< 1;
3694 /* Set sign_extend as any remaining bits. */
3695 sign_extend
= ~mask
;
3697 /* Pick the lower word and sign-extend it. */
3698 low
= INTVAL (value
);
3703 /* Pick the higher word, shifted to the least significant
3704 bits, and sign-extend it. */
3705 high
= INTVAL (value
);
3706 high
>>= BITS_PER_WORD
- 1;
3709 if (high
& sign_bit
)
3710 high
|= sign_extend
;
3712 /* Store the words in the target machine order. */
3713 if (WORDS_BIG_ENDIAN
)
3715 *first
= GEN_INT (high
);
3716 *second
= GEN_INT (low
);
3720 *first
= GEN_INT (low
);
3721 *second
= GEN_INT (high
);
3726 /* The rule for using CONST_INT for a wider mode
3727 is that we regard the value as signed.
3728 So sign-extend it. */
3729 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3730 if (WORDS_BIG_ENDIAN
)
3742 else if (GET_CODE (value
) != CONST_DOUBLE
)
3744 if (WORDS_BIG_ENDIAN
)
3746 *first
= const0_rtx
;
3752 *second
= const0_rtx
;
3755 else if (GET_MODE (value
) == VOIDmode
3756 /* This is the old way we did CONST_DOUBLE integers. */
3757 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3759 /* In an integer, the words are defined as most and least significant.
3760 So order them by the target's convention. */
3761 if (WORDS_BIG_ENDIAN
)
3763 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3764 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3768 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3769 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3776 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3778 /* Note, this converts the REAL_VALUE_TYPE to the target's
3779 format, splits up the floating point double and outputs
3780 exactly 32 bits of it into each of l[0] and l[1] --
3781 not necessarily BITS_PER_WORD bits. */
3782 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3784 /* If 32 bits is an entire word for the target, but not for the host,
3785 then sign-extend on the host so that the number will look the same
3786 way on the host that it would on the target. See for instance
3787 simplify_unary_operation. The #if is needed to avoid compiler
3790 #if HOST_BITS_PER_LONG > 32
3791 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3793 if (l
[0] & ((long) 1 << 31))
3794 l
[0] |= ((long) (-1) << 32);
3795 if (l
[1] & ((long) 1 << 31))
3796 l
[1] |= ((long) (-1) << 32);
3800 *first
= GEN_INT (l
[0]);
3801 *second
= GEN_INT (l
[1]);
3805 /* Return nonzero if this function has no function calls. */
3808 leaf_function_p (void)
3813 if (current_function_profile
|| profile_arc_flag
)
3816 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3819 && ! SIBLING_CALL_P (insn
))
3821 if (NONJUMP_INSN_P (insn
)
3822 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3823 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3824 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3827 for (link
= current_function_epilogue_delay_list
;
3829 link
= XEXP (link
, 1))
3831 insn
= XEXP (link
, 0);
3834 && ! SIBLING_CALL_P (insn
))
3836 if (NONJUMP_INSN_P (insn
)
3837 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3838 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3839 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3846 /* Return 1 if branch is a forward branch.
3847 Uses insn_shuid array, so it works only in the final pass. May be used by
3848 output templates to customary add branch prediction hints.
3851 final_forward_branch_p (rtx insn
)
3853 int insn_id
, label_id
;
3855 gcc_assert (uid_shuid
);
3856 insn_id
= INSN_SHUID (insn
);
3857 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3858 /* We've hit some insns that does not have id information available. */
3859 gcc_assert (insn_id
&& label_id
);
3860 return insn_id
< label_id
;
3863 /* On some machines, a function with no call insns
3864 can run faster if it doesn't create its own register window.
3865 When output, the leaf function should use only the "output"
3866 registers. Ordinarily, the function would be compiled to use
3867 the "input" registers to find its arguments; it is a candidate
3868 for leaf treatment if it uses only the "input" registers.
3869 Leaf function treatment means renumbering so the function
3870 uses the "output" registers instead. */
3872 #ifdef LEAF_REGISTERS
3874 /* Return 1 if this function uses only the registers that can be
3875 safely renumbered. */
3878 only_leaf_regs_used (void)
3881 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3883 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3884 if ((df_regs_ever_live_p (i
) || global_regs
[i
])
3885 && ! permitted_reg_in_leaf_functions
[i
])
3888 if (current_function_uses_pic_offset_table
3889 && pic_offset_table_rtx
!= 0
3890 && REG_P (pic_offset_table_rtx
)
3891 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3897 /* Scan all instructions and renumber all registers into those
3898 available in leaf functions. */
3901 leaf_renumber_regs (rtx first
)
3905 /* Renumber only the actual patterns.
3906 The reg-notes can contain frame pointer refs,
3907 and renumbering them could crash, and should not be needed. */
3908 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3910 leaf_renumber_regs_insn (PATTERN (insn
));
3911 for (insn
= current_function_epilogue_delay_list
;
3913 insn
= XEXP (insn
, 1))
3914 if (INSN_P (XEXP (insn
, 0)))
3915 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3918 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3919 available in leaf functions. */
3922 leaf_renumber_regs_insn (rtx in_rtx
)
3925 const char *format_ptr
;
3930 /* Renumber all input-registers into output-registers.
3931 renumbered_regs would be 1 for an output-register;
3938 /* Don't renumber the same reg twice. */
3942 newreg
= REGNO (in_rtx
);
3943 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3944 to reach here as part of a REG_NOTE. */
3945 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3950 newreg
= LEAF_REG_REMAP (newreg
);
3951 gcc_assert (newreg
>= 0);
3952 df_set_regs_ever_live (REGNO (in_rtx
), false);
3953 df_set_regs_ever_live (newreg
, true);
3954 SET_REGNO (in_rtx
, newreg
);
3958 if (INSN_P (in_rtx
))
3960 /* Inside a SEQUENCE, we find insns.
3961 Renumber just the patterns of these insns,
3962 just as we do for the top-level insns. */
3963 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3967 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3969 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3970 switch (*format_ptr
++)
3973 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3977 if (NULL
!= XVEC (in_rtx
, i
))
3979 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3980 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
4000 /* When -gused is used, emit debug info for only used symbols. But in
4001 addition to the standard intercepted debug_hooks there are some direct
4002 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
4003 Those routines may also be called from a higher level intercepted routine. So
4004 to prevent recording data for an inner call to one of these for an intercept,
4005 we maintain an intercept nesting counter (debug_nesting). We only save the
4006 intercepted arguments if the nesting is 1. */
4007 int debug_nesting
= 0;
4009 static tree
*symbol_queue
;
4010 int symbol_queue_index
= 0;
4011 static int symbol_queue_size
= 0;
4013 /* Generate the symbols for any queued up type symbols we encountered
4014 while generating the type info for some originally used symbol.
4015 This might generate additional entries in the queue. Only when
4016 the nesting depth goes to 0 is this routine called. */
4019 debug_flush_symbol_queue (void)
4023 /* Make sure that additionally queued items are not flushed
4028 for (i
= 0; i
< symbol_queue_index
; ++i
)
4030 /* If we pushed queued symbols then such symbols must be
4031 output no matter what anyone else says. Specifically,
4032 we need to make sure dbxout_symbol() thinks the symbol was
4033 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
4034 which may be set for outside reasons. */
4035 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
4036 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
4037 TREE_USED (symbol_queue
[i
]) = 1;
4038 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
4040 #ifdef DBX_DEBUGGING_INFO
4041 dbxout_symbol (symbol_queue
[i
], 0);
4044 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
4045 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
4048 symbol_queue_index
= 0;
4052 /* Queue a type symbol needed as part of the definition of a decl
4053 symbol. These symbols are generated when debug_flush_symbol_queue()
4057 debug_queue_symbol (tree decl
)
4059 if (symbol_queue_index
>= symbol_queue_size
)
4061 symbol_queue_size
+= 10;
4062 symbol_queue
= xrealloc (symbol_queue
,
4063 symbol_queue_size
* sizeof (tree
));
4066 symbol_queue
[symbol_queue_index
++] = decl
;
4069 /* Free symbol queue. */
4071 debug_free_queue (void)
4075 free (symbol_queue
);
4076 symbol_queue
= NULL
;
4077 symbol_queue_size
= 0;
4081 /* Turn the RTL into assembly. */
4083 rest_of_handle_final (void)
4088 /* Get the function's name, as described by its RTL. This may be
4089 different from the DECL_NAME name used in the source file. */
4091 x
= DECL_RTL (current_function_decl
);
4092 gcc_assert (MEM_P (x
));
4094 gcc_assert (GET_CODE (x
) == SYMBOL_REF
);
4095 fnname
= XSTR (x
, 0);
4097 assemble_start_function (current_function_decl
, fnname
);
4098 final_start_function (get_insns (), asm_out_file
, optimize
);
4099 final (get_insns (), asm_out_file
, optimize
);
4100 final_end_function ();
4102 #ifdef TARGET_UNWIND_INFO
4103 /* ??? The IA-64 ".handlerdata" directive must be issued before
4104 the ".endp" directive that closes the procedure descriptor. */
4105 output_function_exception_table (fnname
);
4108 assemble_end_function (current_function_decl
, fnname
);
4110 #ifndef TARGET_UNWIND_INFO
4111 /* Otherwise, it feels unclean to switch sections in the middle. */
4112 output_function_exception_table (fnname
);
4115 user_defined_section_attribute
= false;
4117 /* Free up reg info memory. */
4121 fflush (asm_out_file
);
4123 /* Write DBX symbols if requested. */
4125 /* Note that for those inline functions where we don't initially
4126 know for certain that we will be generating an out-of-line copy,
4127 the first invocation of this routine (rest_of_compilation) will
4128 skip over this code by doing a `goto exit_rest_of_compilation;'.
4129 Later on, wrapup_global_declarations will (indirectly) call
4130 rest_of_compilation again for those inline functions that need
4131 to have out-of-line copies generated. During that call, we
4132 *will* be routed past here. */
4134 timevar_push (TV_SYMOUT
);
4135 (*debug_hooks
->function_decl
) (current_function_decl
);
4136 timevar_pop (TV_SYMOUT
);
4137 if (DECL_STATIC_CONSTRUCTOR (current_function_decl
)
4138 && targetm
.have_ctors_dtors
)
4139 targetm
.asm_out
.constructor (XEXP (DECL_RTL (current_function_decl
), 0),
4140 decl_init_priority_lookup
4141 (current_function_decl
));
4142 if (DECL_STATIC_DESTRUCTOR (current_function_decl
)
4143 && targetm
.have_ctors_dtors
)
4144 targetm
.asm_out
.destructor (XEXP (DECL_RTL (current_function_decl
), 0),
4145 decl_fini_priority_lookup
4146 (current_function_decl
));
4150 struct rtl_opt_pass pass_final
=
4156 rest_of_handle_final
, /* execute */
4159 0, /* static_pass_number */
4160 TV_FINAL
, /* tv_id */
4161 0, /* properties_required */
4162 0, /* properties_provided */
4163 0, /* properties_destroyed */
4164 0, /* todo_flags_start */
4165 TODO_ggc_collect
/* todo_flags_finish */
4171 rest_of_handle_shorten_branches (void)
4173 /* Shorten branches. */
4174 shorten_branches (get_insns ());
4178 struct rtl_opt_pass pass_shorten_branches
=
4182 "shorten", /* name */
4184 rest_of_handle_shorten_branches
, /* execute */
4187 0, /* static_pass_number */
4188 TV_FINAL
, /* tv_id */
4189 0, /* properties_required */
4190 0, /* properties_provided */
4191 0, /* properties_destroyed */
4192 0, /* todo_flags_start */
4193 TODO_dump_func
/* todo_flags_finish */
4199 rest_of_clean_state (void)
4203 /* It is very important to decompose the RTL instruction chain here:
4204 debug information keeps pointing into CODE_LABEL insns inside the function
4205 body. If these remain pointing to the other insns, we end up preserving
4206 whole RTL chain and attached detailed debug info in memory. */
4207 for (insn
= get_insns (); insn
; insn
= next
)
4209 next
= NEXT_INSN (insn
);
4210 NEXT_INSN (insn
) = NULL
;
4211 PREV_INSN (insn
) = NULL
;
4214 /* In case the function was not output,
4215 don't leave any temporary anonymous types
4216 queued up for sdb output. */
4217 #ifdef SDB_DEBUGGING_INFO
4218 if (write_symbols
== SDB_DEBUG
)
4219 sdbout_types (NULL_TREE
);
4222 reload_completed
= 0;
4223 epilogue_completed
= 0;
4225 regstack_completed
= 0;
4228 /* Clear out the insn_length contents now that they are no
4230 init_insn_lengths ();
4232 /* Show no temporary slots allocated. */
4235 free_bb_for_insn ();
4237 if (targetm
.binds_local_p (current_function_decl
))
4239 int pref
= cfun
->preferred_stack_boundary
;
4240 if (cfun
->stack_alignment_needed
> cfun
->preferred_stack_boundary
)
4241 pref
= cfun
->stack_alignment_needed
;
4242 cgraph_rtl_info (current_function_decl
)->preferred_incoming_stack_boundary
4246 /* Make sure volatile mem refs aren't considered valid operands for
4247 arithmetic insns. We must call this here if this is a nested inline
4248 function, since the above code leaves us in the init_recog state,
4249 and the function context push/pop code does not save/restore volatile_ok.
4251 ??? Maybe it isn't necessary for expand_start_function to call this
4252 anymore if we do it here? */
4254 init_recog_no_volatile ();
4256 /* We're done with this function. Free up memory if we can. */
4257 free_after_parsing (cfun
);
4258 free_after_compilation (cfun
);
4262 struct rtl_opt_pass pass_clean_state
=
4268 rest_of_clean_state
, /* execute */
4271 0, /* static_pass_number */
4272 TV_FINAL
, /* tv_id */
4273 0, /* properties_required */
4274 0, /* properties_provided */
4275 PROP_rtl
, /* properties_destroyed */
4276 0, /* todo_flags_start */
4277 0 /* todo_flags_finish */