* gcc.c (version_compare_spec_function): Use '%s' rather than %qs in
[official-gcc.git] / gcc / reorg.c
blob46154f1fd3a780023b26e317bd82e4e142cf1bd4
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
5 Hacked by Michael Tiemann (tiemann@cygnus.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
12 version.
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
22 02110-1301, USA. */
24 /* Instruction reorganization pass.
26 This pass runs after register allocation and final jump
27 optimization. It should be the last pass to run before peephole.
28 It serves primarily to fill delay slots of insns, typically branch
29 and call insns. Other insns typically involve more complicated
30 interactions of data dependencies and resource constraints, and
31 are better handled by scheduling before register allocation (by the
32 function `schedule_insns').
34 The Branch Penalty is the number of extra cycles that are needed to
35 execute a branch insn. On an ideal machine, branches take a single
36 cycle, and the Branch Penalty is 0. Several RISC machines approach
37 branch delays differently:
39 The MIPS has a single branch delay slot. Most insns
40 (except other branches) can be used to fill this slot. When the
41 slot is filled, two insns execute in two cycles, reducing the
42 branch penalty to zero.
44 The SPARC always has a branch delay slot, but its effects can be
45 annulled when the branch is not taken. This means that failing to
46 find other sources of insns, we can hoist an insn from the branch
47 target that would only be safe to execute knowing that the branch
48 is taken.
50 The HP-PA always has a branch delay slot. For unconditional branches
51 its effects can be annulled when the branch is taken. The effects
52 of the delay slot in a conditional branch can be nullified for forward
53 taken branches, or for untaken backward branches. This means
54 we can hoist insns from the fall-through path for forward branches or
55 steal insns from the target of backward branches.
57 The TMS320C3x and C4x have three branch delay slots. When the three
58 slots are filled, the branch penalty is zero. Most insns can fill the
59 delay slots except jump insns.
61 Three techniques for filling delay slots have been implemented so far:
63 (1) `fill_simple_delay_slots' is the simplest, most efficient way
64 to fill delay slots. This pass first looks for insns which come
65 from before the branch and which are safe to execute after the
66 branch. Then it searches after the insn requiring delay slots or,
67 in the case of a branch, for insns that are after the point at
68 which the branch merges into the fallthrough code, if such a point
69 exists. When such insns are found, the branch penalty decreases
70 and no code expansion takes place.
72 (2) `fill_eager_delay_slots' is more complicated: it is used for
73 scheduling conditional jumps, or for scheduling jumps which cannot
74 be filled using (1). A machine need not have annulled jumps to use
75 this strategy, but it helps (by keeping more options open).
76 `fill_eager_delay_slots' tries to guess the direction the branch
77 will go; if it guesses right 100% of the time, it can reduce the
78 branch penalty as much as `fill_simple_delay_slots' does. If it
79 guesses wrong 100% of the time, it might as well schedule nops. When
80 `fill_eager_delay_slots' takes insns from the fall-through path of
81 the jump, usually there is no code expansion; when it takes insns
82 from the branch target, there is code expansion if it is not the
83 only way to reach that target.
85 (3) `relax_delay_slots' uses a set of rules to simplify code that
86 has been reorganized by (1) and (2). It finds cases where
87 conditional test can be eliminated, jumps can be threaded, extra
88 insns can be eliminated, etc. It is the job of (1) and (2) to do a
89 good job of scheduling locally; `relax_delay_slots' takes care of
90 making the various individual schedules work well together. It is
91 especially tuned to handle the control flow interactions of branch
92 insns. It does nothing for insns with delay slots that do not
93 branch.
95 On machines that use CC0, we are very conservative. We will not make
96 a copy of an insn involving CC0 since we want to maintain a 1-1
97 correspondence between the insn that sets and uses CC0. The insns are
98 allowed to be separated by placing an insn that sets CC0 (but not an insn
99 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
100 delay slot. In that case, we point each insn at the other with REG_CC_USER
101 and REG_CC_SETTER notes. Note that these restrictions affect very few
102 machines because most RISC machines with delay slots will not use CC0
103 (the RT is the only known exception at this point).
105 Not yet implemented:
107 The Acorn Risc Machine can conditionally execute most insns, so
108 it is profitable to move single insns into a position to execute
109 based on the condition code of the previous insn.
111 The HP-PA can conditionally nullify insns, providing a similar
112 effect to the ARM, differing mostly in which insn is "in charge". */
114 #include "config.h"
115 #include "system.h"
116 #include "coretypes.h"
117 #include "tm.h"
118 #include "toplev.h"
119 #include "rtl.h"
120 #include "tm_p.h"
121 #include "expr.h"
122 #include "function.h"
123 #include "insn-config.h"
124 #include "conditions.h"
125 #include "hard-reg-set.h"
126 #include "basic-block.h"
127 #include "regs.h"
128 #include "recog.h"
129 #include "flags.h"
130 #include "output.h"
131 #include "obstack.h"
132 #include "insn-attr.h"
133 #include "resource.h"
134 #include "except.h"
135 #include "params.h"
136 #include "timevar.h"
137 #include "target.h"
138 #include "tree-pass.h"
140 #ifdef DELAY_SLOTS
142 #ifndef ANNUL_IFTRUE_SLOTS
143 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
144 #endif
145 #ifndef ANNUL_IFFALSE_SLOTS
146 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
147 #endif
149 /* Insns which have delay slots that have not yet been filled. */
151 static struct obstack unfilled_slots_obstack;
152 static rtx *unfilled_firstobj;
154 /* Define macros to refer to the first and last slot containing unfilled
155 insns. These are used because the list may move and its address
156 should be recomputed at each use. */
158 #define unfilled_slots_base \
159 ((rtx *) obstack_base (&unfilled_slots_obstack))
161 #define unfilled_slots_next \
162 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
164 /* Points to the label before the end of the function. */
165 static rtx end_of_function_label;
167 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
168 not always monotonically increase. */
169 static int *uid_to_ruid;
171 /* Highest valid index in `uid_to_ruid'. */
172 static int max_uid;
174 static int stop_search_p (rtx, int);
175 static int resource_conflicts_p (struct resources *, struct resources *);
176 static int insn_references_resource_p (rtx, struct resources *, int);
177 static int insn_sets_resource_p (rtx, struct resources *, int);
178 static rtx find_end_label (void);
179 static rtx emit_delay_sequence (rtx, rtx, int);
180 static rtx add_to_delay_list (rtx, rtx);
181 static rtx delete_from_delay_slot (rtx);
182 static void delete_scheduled_jump (rtx);
183 static void note_delay_statistics (int, int);
184 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
185 static rtx optimize_skip (rtx);
186 #endif
187 static int get_jump_flags (rtx, rtx);
188 static int rare_destination (rtx);
189 static int mostly_true_jump (rtx, rtx);
190 static rtx get_branch_condition (rtx, rtx);
191 static int condition_dominates_p (rtx, rtx);
192 static int redirect_with_delay_slots_safe_p (rtx, rtx, rtx);
193 static int redirect_with_delay_list_safe_p (rtx, rtx, rtx);
194 static int check_annul_list_true_false (int, rtx);
195 static rtx steal_delay_list_from_target (rtx, rtx, rtx, rtx,
196 struct resources *,
197 struct resources *,
198 struct resources *,
199 int, int *, int *, rtx *);
200 static rtx steal_delay_list_from_fallthrough (rtx, rtx, rtx, rtx,
201 struct resources *,
202 struct resources *,
203 struct resources *,
204 int, int *, int *);
205 static void try_merge_delay_insns (rtx, rtx);
206 static rtx redundant_insn (rtx, rtx, rtx);
207 static int own_thread_p (rtx, rtx, int);
208 static void update_block (rtx, rtx);
209 static int reorg_redirect_jump (rtx, rtx);
210 static void update_reg_dead_notes (rtx, rtx);
211 static void fix_reg_dead_note (rtx, rtx);
212 static void update_reg_unused_notes (rtx, rtx);
213 static void fill_simple_delay_slots (int);
214 static rtx fill_slots_from_thread (rtx, rtx, rtx, rtx, int, int, int, int,
215 int *, rtx);
216 static void fill_eager_delay_slots (void);
217 static void relax_delay_slots (rtx);
218 #ifdef HAVE_return
219 static void make_return_insns (rtx);
220 #endif
222 /* Return TRUE if this insn should stop the search for insn to fill delay
223 slots. LABELS_P indicates that labels should terminate the search.
224 In all cases, jumps terminate the search. */
226 static int
227 stop_search_p (rtx insn, int labels_p)
229 if (insn == 0)
230 return 1;
232 /* If the insn can throw an exception that is caught within the function,
233 it may effectively perform a jump from the viewpoint of the function.
234 Therefore act like for a jump. */
235 if (can_throw_internal (insn))
236 return 1;
238 switch (GET_CODE (insn))
240 case NOTE:
241 case CALL_INSN:
242 return 0;
244 case CODE_LABEL:
245 return labels_p;
247 case JUMP_INSN:
248 case BARRIER:
249 return 1;
251 case INSN:
252 /* OK unless it contains a delay slot or is an `asm' insn of some type.
253 We don't know anything about these. */
254 return (GET_CODE (PATTERN (insn)) == SEQUENCE
255 || GET_CODE (PATTERN (insn)) == ASM_INPUT
256 || asm_noperands (PATTERN (insn)) >= 0);
258 default:
259 gcc_unreachable ();
263 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
264 resource set contains a volatile memory reference. Otherwise, return FALSE. */
266 static int
267 resource_conflicts_p (struct resources *res1, struct resources *res2)
269 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
270 || (res1->unch_memory && res2->unch_memory)
271 || res1->volatil || res2->volatil)
272 return 1;
274 #ifdef HARD_REG_SET
275 return (res1->regs & res2->regs) != HARD_CONST (0);
276 #else
278 int i;
280 for (i = 0; i < HARD_REG_SET_LONGS; i++)
281 if ((res1->regs[i] & res2->regs[i]) != 0)
282 return 1;
283 return 0;
285 #endif
288 /* Return TRUE if any resource marked in RES, a `struct resources', is
289 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
290 routine is using those resources.
292 We compute this by computing all the resources referenced by INSN and
293 seeing if this conflicts with RES. It might be faster to directly check
294 ourselves, and this is the way it used to work, but it means duplicating
295 a large block of complex code. */
297 static int
298 insn_references_resource_p (rtx insn, struct resources *res,
299 int include_delayed_effects)
301 struct resources insn_res;
303 CLEAR_RESOURCE (&insn_res);
304 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
305 return resource_conflicts_p (&insn_res, res);
308 /* Return TRUE if INSN modifies resources that are marked in RES.
309 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
310 included. CC0 is only modified if it is explicitly set; see comments
311 in front of mark_set_resources for details. */
313 static int
314 insn_sets_resource_p (rtx insn, struct resources *res,
315 int include_delayed_effects)
317 struct resources insn_sets;
319 CLEAR_RESOURCE (&insn_sets);
320 mark_set_resources (insn, &insn_sets, 0, include_delayed_effects);
321 return resource_conflicts_p (&insn_sets, res);
324 /* Find a label at the end of the function or before a RETURN. If there
325 is none, try to make one. If that fails, returns 0.
327 The property of such a label is that it is placed just before the
328 epilogue or a bare RETURN insn, so that another bare RETURN can be
329 turned into a jump to the label unconditionally. In particular, the
330 label cannot be placed before a RETURN insn with a filled delay slot.
332 ??? There may be a problem with the current implementation. Suppose
333 we start with a bare RETURN insn and call find_end_label. It may set
334 end_of_function_label just before the RETURN. Suppose the machinery
335 is able to fill the delay slot of the RETURN insn afterwards. Then
336 end_of_function_label is no longer valid according to the property
337 described above and find_end_label will still return it unmodified.
338 Note that this is probably mitigated by the following observation:
339 once end_of_function_label is made, it is very likely the target of
340 a jump, so filling the delay slot of the RETURN will be much more
341 difficult. */
343 static rtx
344 find_end_label (void)
346 rtx insn;
348 /* If we found one previously, return it. */
349 if (end_of_function_label)
350 return end_of_function_label;
352 /* Otherwise, see if there is a label at the end of the function. If there
353 is, it must be that RETURN insns aren't needed, so that is our return
354 label and we don't have to do anything else. */
356 insn = get_last_insn ();
357 while (NOTE_P (insn)
358 || (NONJUMP_INSN_P (insn)
359 && (GET_CODE (PATTERN (insn)) == USE
360 || GET_CODE (PATTERN (insn)) == CLOBBER)))
361 insn = PREV_INSN (insn);
363 /* When a target threads its epilogue we might already have a
364 suitable return insn. If so put a label before it for the
365 end_of_function_label. */
366 if (BARRIER_P (insn)
367 && JUMP_P (PREV_INSN (insn))
368 && GET_CODE (PATTERN (PREV_INSN (insn))) == RETURN)
370 rtx temp = PREV_INSN (PREV_INSN (insn));
371 end_of_function_label = gen_label_rtx ();
372 LABEL_NUSES (end_of_function_label) = 0;
374 /* Put the label before an USE insns that may precede the RETURN insn. */
375 while (GET_CODE (temp) == USE)
376 temp = PREV_INSN (temp);
378 emit_label_after (end_of_function_label, temp);
381 else if (LABEL_P (insn))
382 end_of_function_label = insn;
383 else
385 end_of_function_label = gen_label_rtx ();
386 LABEL_NUSES (end_of_function_label) = 0;
387 /* If the basic block reorder pass moves the return insn to
388 some other place try to locate it again and put our
389 end_of_function_label there. */
390 while (insn && ! (JUMP_P (insn)
391 && (GET_CODE (PATTERN (insn)) == RETURN)))
392 insn = PREV_INSN (insn);
393 if (insn)
395 insn = PREV_INSN (insn);
397 /* Put the label before an USE insns that may proceed the
398 RETURN insn. */
399 while (GET_CODE (insn) == USE)
400 insn = PREV_INSN (insn);
402 emit_label_after (end_of_function_label, insn);
404 else
406 #ifdef HAVE_epilogue
407 if (HAVE_epilogue
408 #ifdef HAVE_return
409 && ! HAVE_return
410 #endif
413 /* The RETURN insn has its delay slot filled so we cannot
414 emit the label just before it. Since we already have
415 an epilogue and cannot emit a new RETURN, we cannot
416 emit the label at all. */
417 end_of_function_label = NULL_RTX;
418 return end_of_function_label;
420 #endif /* HAVE_epilogue */
422 /* Otherwise, make a new label and emit a RETURN and BARRIER,
423 if needed. */
424 emit_label (end_of_function_label);
425 #ifdef HAVE_return
426 /* We don't bother trying to create a return insn if the
427 epilogue has filled delay-slots; we would have to try and
428 move the delay-slot fillers to the delay-slots for the new
429 return insn or in front of the new return insn. */
430 if (current_function_epilogue_delay_list == NULL
431 && HAVE_return)
433 /* The return we make may have delay slots too. */
434 rtx insn = gen_return ();
435 insn = emit_jump_insn (insn);
436 emit_barrier ();
437 if (num_delay_slots (insn) > 0)
438 obstack_ptr_grow (&unfilled_slots_obstack, insn);
440 #endif
444 /* Show one additional use for this label so it won't go away until
445 we are done. */
446 ++LABEL_NUSES (end_of_function_label);
448 return end_of_function_label;
451 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
452 the pattern of INSN with the SEQUENCE.
454 Chain the insns so that NEXT_INSN of each insn in the sequence points to
455 the next and NEXT_INSN of the last insn in the sequence points to
456 the first insn after the sequence. Similarly for PREV_INSN. This makes
457 it easier to scan all insns.
459 Returns the SEQUENCE that replaces INSN. */
461 static rtx
462 emit_delay_sequence (rtx insn, rtx list, int length)
464 int i = 1;
465 rtx li;
466 int had_barrier = 0;
468 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
469 rtvec seqv = rtvec_alloc (length + 1);
470 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
471 rtx seq_insn = make_insn_raw (seq);
472 rtx first = get_insns ();
473 rtx last = get_last_insn ();
475 /* Make a copy of the insn having delay slots. */
476 rtx delay_insn = copy_rtx (insn);
478 /* If INSN is followed by a BARRIER, delete the BARRIER since it will only
479 confuse further processing. Update LAST in case it was the last insn.
480 We will put the BARRIER back in later. */
481 if (NEXT_INSN (insn) && BARRIER_P (NEXT_INSN (insn)))
483 delete_related_insns (NEXT_INSN (insn));
484 last = get_last_insn ();
485 had_barrier = 1;
488 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
489 NEXT_INSN (seq_insn) = NEXT_INSN (insn);
490 PREV_INSN (seq_insn) = PREV_INSN (insn);
492 if (insn != last)
493 PREV_INSN (NEXT_INSN (seq_insn)) = seq_insn;
495 if (insn != first)
496 NEXT_INSN (PREV_INSN (seq_insn)) = seq_insn;
498 /* Note the calls to set_new_first_and_last_insn must occur after
499 SEQ_INSN has been completely spliced into the insn stream.
501 Otherwise CUR_INSN_UID will get set to an incorrect value because
502 set_new_first_and_last_insn will not find SEQ_INSN in the chain. */
503 if (insn == last)
504 set_new_first_and_last_insn (first, seq_insn);
506 if (insn == first)
507 set_new_first_and_last_insn (seq_insn, last);
509 /* Build our SEQUENCE and rebuild the insn chain. */
510 XVECEXP (seq, 0, 0) = delay_insn;
511 INSN_DELETED_P (delay_insn) = 0;
512 PREV_INSN (delay_insn) = PREV_INSN (seq_insn);
514 for (li = list; li; li = XEXP (li, 1), i++)
516 rtx tem = XEXP (li, 0);
517 rtx note, next;
519 /* Show that this copy of the insn isn't deleted. */
520 INSN_DELETED_P (tem) = 0;
522 XVECEXP (seq, 0, i) = tem;
523 PREV_INSN (tem) = XVECEXP (seq, 0, i - 1);
524 NEXT_INSN (XVECEXP (seq, 0, i - 1)) = tem;
526 /* SPARC assembler, for instance, emit warning when debug info is output
527 into the delay slot. */
528 if (INSN_LOCATOR (tem) && !INSN_LOCATOR (seq_insn))
529 INSN_LOCATOR (seq_insn) = INSN_LOCATOR (tem);
530 INSN_LOCATOR (tem) = 0;
532 for (note = REG_NOTES (tem); note; note = next)
534 next = XEXP (note, 1);
535 switch (REG_NOTE_KIND (note))
537 case REG_DEAD:
538 /* Remove any REG_DEAD notes because we can't rely on them now
539 that the insn has been moved. */
540 remove_note (tem, note);
541 break;
543 case REG_LABEL:
544 /* Keep the label reference count up to date. */
545 if (LABEL_P (XEXP (note, 0)))
546 LABEL_NUSES (XEXP (note, 0)) ++;
547 break;
549 default:
550 break;
555 NEXT_INSN (XVECEXP (seq, 0, length)) = NEXT_INSN (seq_insn);
557 /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the
558 last insn in that SEQUENCE to point to us. Similarly for the first
559 insn in the following insn if it is a SEQUENCE. */
561 if (PREV_INSN (seq_insn) && NONJUMP_INSN_P (PREV_INSN (seq_insn))
562 && GET_CODE (PATTERN (PREV_INSN (seq_insn))) == SEQUENCE)
563 NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn)), 0,
564 XVECLEN (PATTERN (PREV_INSN (seq_insn)), 0) - 1))
565 = seq_insn;
567 if (NEXT_INSN (seq_insn) && NONJUMP_INSN_P (NEXT_INSN (seq_insn))
568 && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE)
569 PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn;
571 /* If there used to be a BARRIER, put it back. */
572 if (had_barrier)
573 emit_barrier_after (seq_insn);
575 gcc_assert (i == length + 1);
577 return seq_insn;
580 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
581 be in the order in which the insns are to be executed. */
583 static rtx
584 add_to_delay_list (rtx insn, rtx delay_list)
586 /* If we have an empty list, just make a new list element. If
587 INSN has its block number recorded, clear it since we may
588 be moving the insn to a new block. */
590 if (delay_list == 0)
592 clear_hashed_info_for_insn (insn);
593 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
596 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
597 list. */
598 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
600 return delay_list;
603 /* Delete INSN from the delay slot of the insn that it is in, which may
604 produce an insn with no delay slots. Return the new insn. */
606 static rtx
607 delete_from_delay_slot (rtx insn)
609 rtx trial, seq_insn, seq, prev;
610 rtx delay_list = 0;
611 int i;
612 int had_barrier = 0;
614 /* We first must find the insn containing the SEQUENCE with INSN in its
615 delay slot. Do this by finding an insn, TRIAL, where
616 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
618 for (trial = insn;
619 PREV_INSN (NEXT_INSN (trial)) == trial;
620 trial = NEXT_INSN (trial))
623 seq_insn = PREV_INSN (NEXT_INSN (trial));
624 seq = PATTERN (seq_insn);
626 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
627 had_barrier = 1;
629 /* Create a delay list consisting of all the insns other than the one
630 we are deleting (unless we were the only one). */
631 if (XVECLEN (seq, 0) > 2)
632 for (i = 1; i < XVECLEN (seq, 0); i++)
633 if (XVECEXP (seq, 0, i) != insn)
634 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
636 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
637 list, and rebuild the delay list if non-empty. */
638 prev = PREV_INSN (seq_insn);
639 trial = XVECEXP (seq, 0, 0);
640 delete_related_insns (seq_insn);
641 add_insn_after (trial, prev);
643 /* If there was a barrier after the old SEQUENCE, remit it. */
644 if (had_barrier)
645 emit_barrier_after (trial);
647 /* If there are any delay insns, remit them. Otherwise clear the
648 annul flag. */
649 if (delay_list)
650 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
651 else if (INSN_P (trial))
652 INSN_ANNULLED_BRANCH_P (trial) = 0;
654 INSN_FROM_TARGET_P (insn) = 0;
656 /* Show we need to fill this insn again. */
657 obstack_ptr_grow (&unfilled_slots_obstack, trial);
659 return trial;
662 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
663 the insn that sets CC0 for it and delete it too. */
665 static void
666 delete_scheduled_jump (rtx insn)
668 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
669 delete the insn that sets the condition code, but it is hard to find it.
670 Since this case is rare anyway, don't bother trying; there would likely
671 be other insns that became dead anyway, which we wouldn't know to
672 delete. */
674 #ifdef HAVE_cc0
675 if (reg_mentioned_p (cc0_rtx, insn))
677 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
679 /* If a reg-note was found, it points to an insn to set CC0. This
680 insn is in the delay list of some other insn. So delete it from
681 the delay list it was in. */
682 if (note)
684 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
685 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
686 delete_from_delay_slot (XEXP (note, 0));
688 else
690 /* The insn setting CC0 is our previous insn, but it may be in
691 a delay slot. It will be the last insn in the delay slot, if
692 it is. */
693 rtx trial = previous_insn (insn);
694 if (NOTE_P (trial))
695 trial = prev_nonnote_insn (trial);
696 if (sets_cc0_p (PATTERN (trial)) != 1
697 || FIND_REG_INC_NOTE (trial, NULL_RTX))
698 return;
699 if (PREV_INSN (NEXT_INSN (trial)) == trial)
700 delete_related_insns (trial);
701 else
702 delete_from_delay_slot (trial);
705 #endif
707 delete_related_insns (insn);
710 /* Counters for delay-slot filling. */
712 #define NUM_REORG_FUNCTIONS 2
713 #define MAX_DELAY_HISTOGRAM 3
714 #define MAX_REORG_PASSES 2
716 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
718 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
720 static int reorg_pass_number;
722 static void
723 note_delay_statistics (int slots_filled, int index)
725 num_insns_needing_delays[index][reorg_pass_number]++;
726 if (slots_filled > MAX_DELAY_HISTOGRAM)
727 slots_filled = MAX_DELAY_HISTOGRAM;
728 num_filled_delays[index][slots_filled][reorg_pass_number]++;
731 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
733 /* Optimize the following cases:
735 1. When a conditional branch skips over only one instruction,
736 use an annulling branch and put that insn in the delay slot.
737 Use either a branch that annuls when the condition if true or
738 invert the test with a branch that annuls when the condition is
739 false. This saves insns, since otherwise we must copy an insn
740 from the L1 target.
742 (orig) (skip) (otherwise)
743 Bcc.n L1 Bcc',a L1 Bcc,a L1'
744 insn insn insn2
745 L1: L1: L1:
746 insn2 insn2 insn2
747 insn3 insn3 L1':
748 insn3
750 2. When a conditional branch skips over only one instruction,
751 and after that, it unconditionally branches somewhere else,
752 perform the similar optimization. This saves executing the
753 second branch in the case where the inverted condition is true.
755 Bcc.n L1 Bcc',a L2
756 insn insn
757 L1: L1:
758 Bra L2 Bra L2
760 INSN is a JUMP_INSN.
762 This should be expanded to skip over N insns, where N is the number
763 of delay slots required. */
765 static rtx
766 optimize_skip (rtx insn)
768 rtx trial = next_nonnote_insn (insn);
769 rtx next_trial = next_active_insn (trial);
770 rtx delay_list = 0;
771 int flags;
773 flags = get_jump_flags (insn, JUMP_LABEL (insn));
775 if (trial == 0
776 || !NONJUMP_INSN_P (trial)
777 || GET_CODE (PATTERN (trial)) == SEQUENCE
778 || recog_memoized (trial) < 0
779 || (! eligible_for_annul_false (insn, 0, trial, flags)
780 && ! eligible_for_annul_true (insn, 0, trial, flags))
781 || can_throw_internal (trial))
782 return 0;
784 /* There are two cases where we are just executing one insn (we assume
785 here that a branch requires only one insn; this should be generalized
786 at some point): Where the branch goes around a single insn or where
787 we have one insn followed by a branch to the same label we branch to.
788 In both of these cases, inverting the jump and annulling the delay
789 slot give the same effect in fewer insns. */
790 if ((next_trial == next_active_insn (JUMP_LABEL (insn))
791 && ! (next_trial == 0 && current_function_epilogue_delay_list != 0))
792 || (next_trial != 0
793 && JUMP_P (next_trial)
794 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)
795 && (simplejump_p (next_trial)
796 || GET_CODE (PATTERN (next_trial)) == RETURN)))
798 if (eligible_for_annul_false (insn, 0, trial, flags))
800 if (invert_jump (insn, JUMP_LABEL (insn), 1))
801 INSN_FROM_TARGET_P (trial) = 1;
802 else if (! eligible_for_annul_true (insn, 0, trial, flags))
803 return 0;
806 delay_list = add_to_delay_list (trial, NULL_RTX);
807 next_trial = next_active_insn (trial);
808 update_block (trial, trial);
809 delete_related_insns (trial);
811 /* Also, if we are targeting an unconditional
812 branch, thread our jump to the target of that branch. Don't
813 change this into a RETURN here, because it may not accept what
814 we have in the delay slot. We'll fix this up later. */
815 if (next_trial && JUMP_P (next_trial)
816 && (simplejump_p (next_trial)
817 || GET_CODE (PATTERN (next_trial)) == RETURN))
819 rtx target_label = JUMP_LABEL (next_trial);
820 if (target_label == 0)
821 target_label = find_end_label ();
823 if (target_label)
825 /* Recompute the flags based on TARGET_LABEL since threading
826 the jump to TARGET_LABEL may change the direction of the
827 jump (which may change the circumstances in which the
828 delay slot is nullified). */
829 flags = get_jump_flags (insn, target_label);
830 if (eligible_for_annul_true (insn, 0, trial, flags))
831 reorg_redirect_jump (insn, target_label);
835 INSN_ANNULLED_BRANCH_P (insn) = 1;
838 return delay_list;
840 #endif
842 /* Encode and return branch direction and prediction information for
843 INSN assuming it will jump to LABEL.
845 Non conditional branches return no direction information and
846 are predicted as very likely taken. */
848 static int
849 get_jump_flags (rtx insn, rtx label)
851 int flags;
853 /* get_jump_flags can be passed any insn with delay slots, these may
854 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
855 direction information, and only if they are conditional jumps.
857 If LABEL is zero, then there is no way to determine the branch
858 direction. */
859 if (JUMP_P (insn)
860 && (condjump_p (insn) || condjump_in_parallel_p (insn))
861 && INSN_UID (insn) <= max_uid
862 && label != 0
863 && INSN_UID (label) <= max_uid)
864 flags
865 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
866 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
867 /* No valid direction information. */
868 else
869 flags = 0;
871 /* If insn is a conditional branch call mostly_true_jump to get
872 determine the branch prediction.
874 Non conditional branches are predicted as very likely taken. */
875 if (JUMP_P (insn)
876 && (condjump_p (insn) || condjump_in_parallel_p (insn)))
878 int prediction;
880 prediction = mostly_true_jump (insn, get_branch_condition (insn, label));
881 switch (prediction)
883 case 2:
884 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
885 break;
886 case 1:
887 flags |= ATTR_FLAG_likely;
888 break;
889 case 0:
890 flags |= ATTR_FLAG_unlikely;
891 break;
892 case -1:
893 flags |= (ATTR_FLAG_very_unlikely | ATTR_FLAG_unlikely);
894 break;
896 default:
897 gcc_unreachable ();
900 else
901 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
903 return flags;
906 /* Return 1 if INSN is a destination that will be branched to rarely (the
907 return point of a function); return 2 if DEST will be branched to very
908 rarely (a call to a function that doesn't return). Otherwise,
909 return 0. */
911 static int
912 rare_destination (rtx insn)
914 int jump_count = 0;
915 rtx next;
917 for (; insn; insn = next)
919 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
920 insn = XVECEXP (PATTERN (insn), 0, 0);
922 next = NEXT_INSN (insn);
924 switch (GET_CODE (insn))
926 case CODE_LABEL:
927 return 0;
928 case BARRIER:
929 /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We
930 don't scan past JUMP_INSNs, so any barrier we find here must
931 have been after a CALL_INSN and hence mean the call doesn't
932 return. */
933 return 2;
934 case JUMP_INSN:
935 if (GET_CODE (PATTERN (insn)) == RETURN)
936 return 1;
937 else if (simplejump_p (insn)
938 && jump_count++ < 10)
939 next = JUMP_LABEL (insn);
940 else
941 return 0;
943 default:
944 break;
948 /* If we got here it means we hit the end of the function. So this
949 is an unlikely destination. */
951 return 1;
954 /* Return truth value of the statement that this branch
955 is mostly taken. If we think that the branch is extremely likely
956 to be taken, we return 2. If the branch is slightly more likely to be
957 taken, return 1. If the branch is slightly less likely to be taken,
958 return 0 and if the branch is highly unlikely to be taken, return -1.
960 CONDITION, if nonzero, is the condition that JUMP_INSN is testing. */
962 static int
963 mostly_true_jump (rtx jump_insn, rtx condition)
965 rtx target_label = JUMP_LABEL (jump_insn);
966 rtx insn, note;
967 int rare_dest = rare_destination (target_label);
968 int rare_fallthrough = rare_destination (NEXT_INSN (jump_insn));
970 /* If branch probabilities are available, then use that number since it
971 always gives a correct answer. */
972 note = find_reg_note (jump_insn, REG_BR_PROB, 0);
973 if (note)
975 int prob = INTVAL (XEXP (note, 0));
977 if (prob >= REG_BR_PROB_BASE * 9 / 10)
978 return 2;
979 else if (prob >= REG_BR_PROB_BASE / 2)
980 return 1;
981 else if (prob >= REG_BR_PROB_BASE / 10)
982 return 0;
983 else
984 return -1;
987 /* ??? Ought to use estimate_probability instead. */
989 /* If this is a branch outside a loop, it is highly unlikely. */
990 if (GET_CODE (PATTERN (jump_insn)) == SET
991 && GET_CODE (SET_SRC (PATTERN (jump_insn))) == IF_THEN_ELSE
992 && ((GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 1)) == LABEL_REF
993 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 1)))
994 || (GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 2)) == LABEL_REF
995 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 2)))))
996 return -1;
998 if (target_label)
1000 /* If this is the test of a loop, it is very likely true. We scan
1001 backwards from the target label. If we find a NOTE_INSN_LOOP_BEG
1002 before the next real insn, we assume the branch is to the top of
1003 the loop. */
1004 for (insn = PREV_INSN (target_label);
1005 insn && NOTE_P (insn);
1006 insn = PREV_INSN (insn))
1007 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1008 return 2;
1011 /* Look at the relative rarities of the fallthrough and destination. If
1012 they differ, we can predict the branch that way. */
1014 switch (rare_fallthrough - rare_dest)
1016 case -2:
1017 return -1;
1018 case -1:
1019 return 0;
1020 case 0:
1021 break;
1022 case 1:
1023 return 1;
1024 case 2:
1025 return 2;
1028 /* If we couldn't figure out what this jump was, assume it won't be
1029 taken. This should be rare. */
1030 if (condition == 0)
1031 return 0;
1033 /* EQ tests are usually false and NE tests are usually true. Also,
1034 most quantities are positive, so we can make the appropriate guesses
1035 about signed comparisons against zero. */
1036 switch (GET_CODE (condition))
1038 case CONST_INT:
1039 /* Unconditional branch. */
1040 return 1;
1041 case EQ:
1042 return 0;
1043 case NE:
1044 return 1;
1045 case LE:
1046 case LT:
1047 if (XEXP (condition, 1) == const0_rtx)
1048 return 0;
1049 break;
1050 case GE:
1051 case GT:
1052 if (XEXP (condition, 1) == const0_rtx)
1053 return 1;
1054 break;
1056 default:
1057 break;
1060 /* Predict backward branches usually take, forward branches usually not. If
1061 we don't know whether this is forward or backward, assume the branch
1062 will be taken, since most are. */
1063 return (target_label == 0 || INSN_UID (jump_insn) > max_uid
1064 || INSN_UID (target_label) > max_uid
1065 || (uid_to_ruid[INSN_UID (jump_insn)]
1066 > uid_to_ruid[INSN_UID (target_label)]));
1069 /* Return the condition under which INSN will branch to TARGET. If TARGET
1070 is zero, return the condition under which INSN will return. If INSN is
1071 an unconditional branch, return const_true_rtx. If INSN isn't a simple
1072 type of jump, or it doesn't go to TARGET, return 0. */
1074 static rtx
1075 get_branch_condition (rtx insn, rtx target)
1077 rtx pat = PATTERN (insn);
1078 rtx src;
1080 if (condjump_in_parallel_p (insn))
1081 pat = XVECEXP (pat, 0, 0);
1083 if (GET_CODE (pat) == RETURN)
1084 return target == 0 ? const_true_rtx : 0;
1086 else if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
1087 return 0;
1089 src = SET_SRC (pat);
1090 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
1091 return const_true_rtx;
1093 else if (GET_CODE (src) == IF_THEN_ELSE
1094 && ((target == 0 && GET_CODE (XEXP (src, 1)) == RETURN)
1095 || (GET_CODE (XEXP (src, 1)) == LABEL_REF
1096 && XEXP (XEXP (src, 1), 0) == target))
1097 && XEXP (src, 2) == pc_rtx)
1098 return XEXP (src, 0);
1100 else if (GET_CODE (src) == IF_THEN_ELSE
1101 && ((target == 0 && GET_CODE (XEXP (src, 2)) == RETURN)
1102 || (GET_CODE (XEXP (src, 2)) == LABEL_REF
1103 && XEXP (XEXP (src, 2), 0) == target))
1104 && XEXP (src, 1) == pc_rtx)
1106 enum rtx_code rev;
1107 rev = reversed_comparison_code (XEXP (src, 0), insn);
1108 if (rev != UNKNOWN)
1109 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
1110 XEXP (XEXP (src, 0), 0),
1111 XEXP (XEXP (src, 0), 1));
1114 return 0;
1117 /* Return nonzero if CONDITION is more strict than the condition of
1118 INSN, i.e., if INSN will always branch if CONDITION is true. */
1120 static int
1121 condition_dominates_p (rtx condition, rtx insn)
1123 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
1124 enum rtx_code code = GET_CODE (condition);
1125 enum rtx_code other_code;
1127 if (rtx_equal_p (condition, other_condition)
1128 || other_condition == const_true_rtx)
1129 return 1;
1131 else if (condition == const_true_rtx || other_condition == 0)
1132 return 0;
1134 other_code = GET_CODE (other_condition);
1135 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
1136 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
1137 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
1138 return 0;
1140 return comparison_dominates_p (code, other_code);
1143 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1144 any insns already in the delay slot of JUMP. */
1146 static int
1147 redirect_with_delay_slots_safe_p (rtx jump, rtx newlabel, rtx seq)
1149 int flags, i;
1150 rtx pat = PATTERN (seq);
1152 /* Make sure all the delay slots of this jump would still
1153 be valid after threading the jump. If they are still
1154 valid, then return nonzero. */
1156 flags = get_jump_flags (jump, newlabel);
1157 for (i = 1; i < XVECLEN (pat, 0); i++)
1158 if (! (
1159 #ifdef ANNUL_IFFALSE_SLOTS
1160 (INSN_ANNULLED_BRANCH_P (jump)
1161 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1162 ? eligible_for_annul_false (jump, i - 1,
1163 XVECEXP (pat, 0, i), flags) :
1164 #endif
1165 #ifdef ANNUL_IFTRUE_SLOTS
1166 (INSN_ANNULLED_BRANCH_P (jump)
1167 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1168 ? eligible_for_annul_true (jump, i - 1,
1169 XVECEXP (pat, 0, i), flags) :
1170 #endif
1171 eligible_for_delay (jump, i - 1, XVECEXP (pat, 0, i), flags)))
1172 break;
1174 return (i == XVECLEN (pat, 0));
1177 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1178 any insns we wish to place in the delay slot of JUMP. */
1180 static int
1181 redirect_with_delay_list_safe_p (rtx jump, rtx newlabel, rtx delay_list)
1183 int flags, i;
1184 rtx li;
1186 /* Make sure all the insns in DELAY_LIST would still be
1187 valid after threading the jump. If they are still
1188 valid, then return nonzero. */
1190 flags = get_jump_flags (jump, newlabel);
1191 for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
1192 if (! (
1193 #ifdef ANNUL_IFFALSE_SLOTS
1194 (INSN_ANNULLED_BRANCH_P (jump)
1195 && INSN_FROM_TARGET_P (XEXP (li, 0)))
1196 ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
1197 #endif
1198 #ifdef ANNUL_IFTRUE_SLOTS
1199 (INSN_ANNULLED_BRANCH_P (jump)
1200 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1201 ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
1202 #endif
1203 eligible_for_delay (jump, i, XEXP (li, 0), flags)))
1204 break;
1206 return (li == NULL);
1209 /* DELAY_LIST is a list of insns that have already been placed into delay
1210 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1211 If not, return 0; otherwise return 1. */
1213 static int
1214 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1216 rtx temp;
1218 if (delay_list)
1220 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1222 rtx trial = XEXP (temp, 0);
1224 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1225 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1226 return 0;
1230 return 1;
1233 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1234 the condition tested by INSN is CONDITION and the resources shown in
1235 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1236 from SEQ's delay list, in addition to whatever insns it may execute
1237 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1238 needed while searching for delay slot insns. Return the concatenated
1239 delay list if possible, otherwise, return 0.
1241 SLOTS_TO_FILL is the total number of slots required by INSN, and
1242 PSLOTS_FILLED points to the number filled so far (also the number of
1243 insns in DELAY_LIST). It is updated with the number that have been
1244 filled from the SEQUENCE, if any.
1246 PANNUL_P points to a nonzero value if we already know that we need
1247 to annul INSN. If this routine determines that annulling is needed,
1248 it may set that value nonzero.
1250 PNEW_THREAD points to a location that is to receive the place at which
1251 execution should continue. */
1253 static rtx
1254 steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
1255 rtx delay_list, struct resources *sets,
1256 struct resources *needed,
1257 struct resources *other_needed,
1258 int slots_to_fill, int *pslots_filled,
1259 int *pannul_p, rtx *pnew_thread)
1261 rtx temp;
1262 int slots_remaining = slots_to_fill - *pslots_filled;
1263 int total_slots_filled = *pslots_filled;
1264 rtx new_delay_list = 0;
1265 int must_annul = *pannul_p;
1266 int used_annul = 0;
1267 int i;
1268 struct resources cc_set;
1270 /* We can't do anything if there are more delay slots in SEQ than we
1271 can handle, or if we don't know that it will be a taken branch.
1272 We know that it will be a taken branch if it is either an unconditional
1273 branch or a conditional branch with a stricter branch condition.
1275 Also, exit if the branch has more than one set, since then it is computing
1276 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1277 ??? It may be possible to move other sets into INSN in addition to
1278 moving the instructions in the delay slots.
1280 We can not steal the delay list if one of the instructions in the
1281 current delay_list modifies the condition codes and the jump in the
1282 sequence is a conditional jump. We can not do this because we can
1283 not change the direction of the jump because the condition codes
1284 will effect the direction of the jump in the sequence. */
1286 CLEAR_RESOURCE (&cc_set);
1287 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1289 rtx trial = XEXP (temp, 0);
1291 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1292 if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, 0))
1293 return delay_list;
1296 if (XVECLEN (seq, 0) - 1 > slots_remaining
1297 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
1298 || ! single_set (XVECEXP (seq, 0, 0)))
1299 return delay_list;
1301 #ifdef MD_CAN_REDIRECT_BRANCH
1302 /* On some targets, branches with delay slots can have a limited
1303 displacement. Give the back end a chance to tell us we can't do
1304 this. */
1305 if (! MD_CAN_REDIRECT_BRANCH (insn, XVECEXP (seq, 0, 0)))
1306 return delay_list;
1307 #endif
1309 for (i = 1; i < XVECLEN (seq, 0); i++)
1311 rtx trial = XVECEXP (seq, 0, i);
1312 int flags;
1314 if (insn_references_resource_p (trial, sets, 0)
1315 || insn_sets_resource_p (trial, needed, 0)
1316 || insn_sets_resource_p (trial, sets, 0)
1317 #ifdef HAVE_cc0
1318 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1319 delay list. */
1320 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1321 #endif
1322 /* If TRIAL is from the fallthrough code of an annulled branch insn
1323 in SEQ, we cannot use it. */
1324 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1325 && ! INSN_FROM_TARGET_P (trial)))
1326 return delay_list;
1328 /* If this insn was already done (usually in a previous delay slot),
1329 pretend we put it in our delay slot. */
1330 if (redundant_insn (trial, insn, new_delay_list))
1331 continue;
1333 /* We will end up re-vectoring this branch, so compute flags
1334 based on jumping to the new label. */
1335 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1337 if (! must_annul
1338 && ((condition == const_true_rtx
1339 || (! insn_sets_resource_p (trial, other_needed, 0)
1340 && ! may_trap_or_fault_p (PATTERN (trial)))))
1341 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1342 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1343 && (must_annul = 1,
1344 check_annul_list_true_false (0, delay_list)
1345 && check_annul_list_true_false (0, new_delay_list)
1346 && eligible_for_annul_false (insn, total_slots_filled,
1347 trial, flags)))
1349 if (must_annul)
1350 used_annul = 1;
1351 temp = copy_rtx (trial);
1352 INSN_FROM_TARGET_P (temp) = 1;
1353 new_delay_list = add_to_delay_list (temp, new_delay_list);
1354 total_slots_filled++;
1356 if (--slots_remaining == 0)
1357 break;
1359 else
1360 return delay_list;
1363 /* Show the place to which we will be branching. */
1364 *pnew_thread = next_active_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1366 /* Add any new insns to the delay list and update the count of the
1367 number of slots filled. */
1368 *pslots_filled = total_slots_filled;
1369 if (used_annul)
1370 *pannul_p = 1;
1372 if (delay_list == 0)
1373 return new_delay_list;
1375 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1376 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1378 return delay_list;
1381 /* Similar to steal_delay_list_from_target except that SEQ is on the
1382 fallthrough path of INSN. Here we only do something if the delay insn
1383 of SEQ is an unconditional branch. In that case we steal its delay slot
1384 for INSN since unconditional branches are much easier to fill. */
1386 static rtx
1387 steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx seq,
1388 rtx delay_list, struct resources *sets,
1389 struct resources *needed,
1390 struct resources *other_needed,
1391 int slots_to_fill, int *pslots_filled,
1392 int *pannul_p)
1394 int i;
1395 int flags;
1396 int must_annul = *pannul_p;
1397 int used_annul = 0;
1399 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1401 /* We can't do anything if SEQ's delay insn isn't an
1402 unconditional branch. */
1404 if (! simplejump_p (XVECEXP (seq, 0, 0))
1405 && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) != RETURN)
1406 return delay_list;
1408 for (i = 1; i < XVECLEN (seq, 0); i++)
1410 rtx trial = XVECEXP (seq, 0, i);
1412 /* If TRIAL sets CC0, stealing it will move it too far from the use
1413 of CC0. */
1414 if (insn_references_resource_p (trial, sets, 0)
1415 || insn_sets_resource_p (trial, needed, 0)
1416 || insn_sets_resource_p (trial, sets, 0)
1417 #ifdef HAVE_cc0
1418 || sets_cc0_p (PATTERN (trial))
1419 #endif
1422 break;
1424 /* If this insn was already done, we don't need it. */
1425 if (redundant_insn (trial, insn, delay_list))
1427 delete_from_delay_slot (trial);
1428 continue;
1431 if (! must_annul
1432 && ((condition == const_true_rtx
1433 || (! insn_sets_resource_p (trial, other_needed, 0)
1434 && ! may_trap_or_fault_p (PATTERN (trial)))))
1435 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1436 : (must_annul || delay_list == NULL) && (must_annul = 1,
1437 check_annul_list_true_false (1, delay_list)
1438 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1440 if (must_annul)
1441 used_annul = 1;
1442 delete_from_delay_slot (trial);
1443 delay_list = add_to_delay_list (trial, delay_list);
1445 if (++(*pslots_filled) == slots_to_fill)
1446 break;
1448 else
1449 break;
1452 if (used_annul)
1453 *pannul_p = 1;
1454 return delay_list;
1457 /* Try merging insns starting at THREAD which match exactly the insns in
1458 INSN's delay list.
1460 If all insns were matched and the insn was previously annulling, the
1461 annul bit will be cleared.
1463 For each insn that is merged, if the branch is or will be non-annulling,
1464 we delete the merged insn. */
1466 static void
1467 try_merge_delay_insns (rtx insn, rtx thread)
1469 rtx trial, next_trial;
1470 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1471 int annul_p = INSN_ANNULLED_BRANCH_P (delay_insn);
1472 int slot_number = 1;
1473 int num_slots = XVECLEN (PATTERN (insn), 0);
1474 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1475 struct resources set, needed;
1476 rtx merged_insns = 0;
1477 int i;
1478 int flags;
1480 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1482 CLEAR_RESOURCE (&needed);
1483 CLEAR_RESOURCE (&set);
1485 /* If this is not an annulling branch, take into account anything needed in
1486 INSN's delay slot. This prevents two increments from being incorrectly
1487 folded into one. If we are annulling, this would be the correct
1488 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1489 will essentially disable this optimization. This method is somewhat of
1490 a kludge, but I don't see a better way.) */
1491 if (! annul_p)
1492 for (i = 1 ; i < num_slots; i++)
1493 if (XVECEXP (PATTERN (insn), 0, i))
1494 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed, 1);
1496 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1498 rtx pat = PATTERN (trial);
1499 rtx oldtrial = trial;
1501 next_trial = next_nonnote_insn (trial);
1503 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1504 if (NONJUMP_INSN_P (trial)
1505 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1506 continue;
1508 if (GET_CODE (next_to_match) == GET_CODE (trial)
1509 #ifdef HAVE_cc0
1510 /* We can't share an insn that sets cc0. */
1511 && ! sets_cc0_p (pat)
1512 #endif
1513 && ! insn_references_resource_p (trial, &set, 1)
1514 && ! insn_sets_resource_p (trial, &set, 1)
1515 && ! insn_sets_resource_p (trial, &needed, 1)
1516 && (trial = try_split (pat, trial, 0)) != 0
1517 /* Update next_trial, in case try_split succeeded. */
1518 && (next_trial = next_nonnote_insn (trial))
1519 /* Likewise THREAD. */
1520 && (thread = oldtrial == thread ? trial : thread)
1521 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1522 /* Have to test this condition if annul condition is different
1523 from (and less restrictive than) non-annulling one. */
1524 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1527 if (! annul_p)
1529 update_block (trial, thread);
1530 if (trial == thread)
1531 thread = next_active_insn (thread);
1533 delete_related_insns (trial);
1534 INSN_FROM_TARGET_P (next_to_match) = 0;
1536 else
1537 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1539 if (++slot_number == num_slots)
1540 break;
1542 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1545 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1546 mark_referenced_resources (trial, &needed, 1);
1549 /* See if we stopped on a filled insn. If we did, try to see if its
1550 delay slots match. */
1551 if (slot_number != num_slots
1552 && trial && NONJUMP_INSN_P (trial)
1553 && GET_CODE (PATTERN (trial)) == SEQUENCE
1554 && ! INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0)))
1556 rtx pat = PATTERN (trial);
1557 rtx filled_insn = XVECEXP (pat, 0, 0);
1559 /* Account for resources set/needed by the filled insn. */
1560 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1561 mark_referenced_resources (filled_insn, &needed, 1);
1563 for (i = 1; i < XVECLEN (pat, 0); i++)
1565 rtx dtrial = XVECEXP (pat, 0, i);
1567 if (! insn_references_resource_p (dtrial, &set, 1)
1568 && ! insn_sets_resource_p (dtrial, &set, 1)
1569 && ! insn_sets_resource_p (dtrial, &needed, 1)
1570 #ifdef HAVE_cc0
1571 && ! sets_cc0_p (PATTERN (dtrial))
1572 #endif
1573 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1574 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1576 if (! annul_p)
1578 rtx new;
1580 update_block (dtrial, thread);
1581 new = delete_from_delay_slot (dtrial);
1582 if (INSN_DELETED_P (thread))
1583 thread = new;
1584 INSN_FROM_TARGET_P (next_to_match) = 0;
1586 else
1587 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1588 merged_insns);
1590 if (++slot_number == num_slots)
1591 break;
1593 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1595 else
1597 /* Keep track of the set/referenced resources for the delay
1598 slots of any trial insns we encounter. */
1599 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1600 mark_referenced_resources (dtrial, &needed, 1);
1605 /* If all insns in the delay slot have been matched and we were previously
1606 annulling the branch, we need not any more. In that case delete all the
1607 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1608 the delay list so that we know that it isn't only being used at the
1609 target. */
1610 if (slot_number == num_slots && annul_p)
1612 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1614 if (GET_MODE (merged_insns) == SImode)
1616 rtx new;
1618 update_block (XEXP (merged_insns, 0), thread);
1619 new = delete_from_delay_slot (XEXP (merged_insns, 0));
1620 if (INSN_DELETED_P (thread))
1621 thread = new;
1623 else
1625 update_block (XEXP (merged_insns, 0), thread);
1626 delete_related_insns (XEXP (merged_insns, 0));
1630 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1632 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1633 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1637 /* See if INSN is redundant with an insn in front of TARGET. Often this
1638 is called when INSN is a candidate for a delay slot of TARGET.
1639 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1640 of INSN. Often INSN will be redundant with an insn in a delay slot of
1641 some previous insn. This happens when we have a series of branches to the
1642 same label; in that case the first insn at the target might want to go
1643 into each of the delay slots.
1645 If we are not careful, this routine can take up a significant fraction
1646 of the total compilation time (4%), but only wins rarely. Hence we
1647 speed this routine up by making two passes. The first pass goes back
1648 until it hits a label and sees if it finds an insn with an identical
1649 pattern. Only in this (relatively rare) event does it check for
1650 data conflicts.
1652 We do not split insns we encounter. This could cause us not to find a
1653 redundant insn, but the cost of splitting seems greater than the possible
1654 gain in rare cases. */
1656 static rtx
1657 redundant_insn (rtx insn, rtx target, rtx delay_list)
1659 rtx target_main = target;
1660 rtx ipat = PATTERN (insn);
1661 rtx trial, pat;
1662 struct resources needed, set;
1663 int i;
1664 unsigned insns_to_search;
1666 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1667 are allowed to not actually assign to such a register. */
1668 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1669 return 0;
1671 /* Scan backwards looking for a match. */
1672 for (trial = PREV_INSN (target),
1673 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1674 trial && insns_to_search > 0;
1675 trial = PREV_INSN (trial), --insns_to_search)
1677 if (LABEL_P (trial))
1678 return 0;
1680 if (! INSN_P (trial))
1681 continue;
1683 pat = PATTERN (trial);
1684 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1685 continue;
1687 if (GET_CODE (pat) == SEQUENCE)
1689 /* Stop for a CALL and its delay slots because it is difficult to
1690 track its resource needs correctly. */
1691 if (CALL_P (XVECEXP (pat, 0, 0)))
1692 return 0;
1694 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1695 slots because it is difficult to track its resource needs
1696 correctly. */
1698 #ifdef INSN_SETS_ARE_DELAYED
1699 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1700 return 0;
1701 #endif
1703 #ifdef INSN_REFERENCES_ARE_DELAYED
1704 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1705 return 0;
1706 #endif
1708 /* See if any of the insns in the delay slot match, updating
1709 resource requirements as we go. */
1710 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1711 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1712 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat)
1713 && ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX))
1714 break;
1716 /* If found a match, exit this loop early. */
1717 if (i > 0)
1718 break;
1721 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1722 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1723 break;
1726 /* If we didn't find an insn that matches, return 0. */
1727 if (trial == 0)
1728 return 0;
1730 /* See what resources this insn sets and needs. If they overlap, or
1731 if this insn references CC0, it can't be redundant. */
1733 CLEAR_RESOURCE (&needed);
1734 CLEAR_RESOURCE (&set);
1735 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1736 mark_referenced_resources (insn, &needed, 1);
1738 /* If TARGET is a SEQUENCE, get the main insn. */
1739 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1740 target_main = XVECEXP (PATTERN (target), 0, 0);
1742 if (resource_conflicts_p (&needed, &set)
1743 #ifdef HAVE_cc0
1744 || reg_mentioned_p (cc0_rtx, ipat)
1745 #endif
1746 /* The insn requiring the delay may not set anything needed or set by
1747 INSN. */
1748 || insn_sets_resource_p (target_main, &needed, 1)
1749 || insn_sets_resource_p (target_main, &set, 1))
1750 return 0;
1752 /* Insns we pass may not set either NEEDED or SET, so merge them for
1753 simpler tests. */
1754 needed.memory |= set.memory;
1755 needed.unch_memory |= set.unch_memory;
1756 IOR_HARD_REG_SET (needed.regs, set.regs);
1758 /* This insn isn't redundant if it conflicts with an insn that either is
1759 or will be in a delay slot of TARGET. */
1761 while (delay_list)
1763 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, 1))
1764 return 0;
1765 delay_list = XEXP (delay_list, 1);
1768 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1769 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1770 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed, 1))
1771 return 0;
1773 /* Scan backwards until we reach a label or an insn that uses something
1774 INSN sets or sets something insn uses or sets. */
1776 for (trial = PREV_INSN (target),
1777 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1778 trial && !LABEL_P (trial) && insns_to_search > 0;
1779 trial = PREV_INSN (trial), --insns_to_search)
1781 if (!INSN_P (trial))
1782 continue;
1784 pat = PATTERN (trial);
1785 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1786 continue;
1788 if (GET_CODE (pat) == SEQUENCE)
1790 /* If this is a CALL_INSN and its delay slots, it is hard to track
1791 the resource needs properly, so give up. */
1792 if (CALL_P (XVECEXP (pat, 0, 0)))
1793 return 0;
1795 /* If this is an INSN or JUMP_INSN with delayed effects, it
1796 is hard to track the resource needs properly, so give up. */
1798 #ifdef INSN_SETS_ARE_DELAYED
1799 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1800 return 0;
1801 #endif
1803 #ifdef INSN_REFERENCES_ARE_DELAYED
1804 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1805 return 0;
1806 #endif
1808 /* See if any of the insns in the delay slot match, updating
1809 resource requirements as we go. */
1810 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1812 rtx candidate = XVECEXP (pat, 0, i);
1814 /* If an insn will be annulled if the branch is false, it isn't
1815 considered as a possible duplicate insn. */
1816 if (rtx_equal_p (PATTERN (candidate), ipat)
1817 && ! (INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
1818 && INSN_FROM_TARGET_P (candidate)))
1820 /* Show that this insn will be used in the sequel. */
1821 INSN_FROM_TARGET_P (candidate) = 0;
1822 return candidate;
1825 /* Unless this is an annulled insn from the target of a branch,
1826 we must stop if it sets anything needed or set by INSN. */
1827 if ((! INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
1828 || ! INSN_FROM_TARGET_P (candidate))
1829 && insn_sets_resource_p (candidate, &needed, 1))
1830 return 0;
1833 /* If the insn requiring the delay slot conflicts with INSN, we
1834 must stop. */
1835 if (insn_sets_resource_p (XVECEXP (pat, 0, 0), &needed, 1))
1836 return 0;
1838 else
1840 /* See if TRIAL is the same as INSN. */
1841 pat = PATTERN (trial);
1842 if (rtx_equal_p (pat, ipat))
1843 return trial;
1845 /* Can't go any further if TRIAL conflicts with INSN. */
1846 if (insn_sets_resource_p (trial, &needed, 1))
1847 return 0;
1851 return 0;
1854 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1855 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1856 is nonzero, we are allowed to fall into this thread; otherwise, we are
1857 not.
1859 If LABEL is used more than one or we pass a label other than LABEL before
1860 finding an active insn, we do not own this thread. */
1862 static int
1863 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1865 rtx active_insn;
1866 rtx insn;
1868 /* We don't own the function end. */
1869 if (thread == 0)
1870 return 0;
1872 /* Get the first active insn, or THREAD, if it is an active insn. */
1873 active_insn = next_active_insn (PREV_INSN (thread));
1875 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1876 if (LABEL_P (insn)
1877 && (insn != label || LABEL_NUSES (insn) != 1))
1878 return 0;
1880 if (allow_fallthrough)
1881 return 1;
1883 /* Ensure that we reach a BARRIER before any insn or label. */
1884 for (insn = prev_nonnote_insn (thread);
1885 insn == 0 || !BARRIER_P (insn);
1886 insn = prev_nonnote_insn (insn))
1887 if (insn == 0
1888 || LABEL_P (insn)
1889 || (NONJUMP_INSN_P (insn)
1890 && GET_CODE (PATTERN (insn)) != USE
1891 && GET_CODE (PATTERN (insn)) != CLOBBER))
1892 return 0;
1894 return 1;
1897 /* Called when INSN is being moved from a location near the target of a jump.
1898 We leave a marker of the form (use (INSN)) immediately in front
1899 of WHERE for mark_target_live_regs. These markers will be deleted when
1900 reorg finishes.
1902 We used to try to update the live status of registers if WHERE is at
1903 the start of a basic block, but that can't work since we may remove a
1904 BARRIER in relax_delay_slots. */
1906 static void
1907 update_block (rtx insn, rtx where)
1909 /* Ignore if this was in a delay slot and it came from the target of
1910 a branch. */
1911 if (INSN_FROM_TARGET_P (insn))
1912 return;
1914 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1916 /* INSN might be making a value live in a block where it didn't use to
1917 be. So recompute liveness information for this block. */
1919 incr_ticks_for_insn (insn);
1922 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1923 the basic block containing the jump. */
1925 static int
1926 reorg_redirect_jump (rtx jump, rtx nlabel)
1928 incr_ticks_for_insn (jump);
1929 return redirect_jump (jump, nlabel, 1);
1932 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1933 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1934 that reference values used in INSN. If we find one, then we move the
1935 REG_DEAD note to INSN.
1937 This is needed to handle the case where a later insn (after INSN) has a
1938 REG_DEAD note for a register used by INSN, and this later insn subsequently
1939 gets moved before a CODE_LABEL because it is a redundant insn. In this
1940 case, mark_target_live_regs may be confused into thinking the register
1941 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1943 static void
1944 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1946 rtx p, link, next;
1948 for (p = next_nonnote_insn (insn); p != delayed_insn;
1949 p = next_nonnote_insn (p))
1950 for (link = REG_NOTES (p); link; link = next)
1952 next = XEXP (link, 1);
1954 if (REG_NOTE_KIND (link) != REG_DEAD
1955 || !REG_P (XEXP (link, 0)))
1956 continue;
1958 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1960 /* Move the REG_DEAD note from P to INSN. */
1961 remove_note (p, link);
1962 XEXP (link, 1) = REG_NOTES (insn);
1963 REG_NOTES (insn) = link;
1968 /* Called when an insn redundant with start_insn is deleted. If there
1969 is a REG_DEAD note for the target of start_insn between start_insn
1970 and stop_insn, then the REG_DEAD note needs to be deleted since the
1971 value no longer dies there.
1973 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1974 confused into thinking the register is dead. */
1976 static void
1977 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1979 rtx p, link, next;
1981 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1982 p = next_nonnote_insn (p))
1983 for (link = REG_NOTES (p); link; link = next)
1985 next = XEXP (link, 1);
1987 if (REG_NOTE_KIND (link) != REG_DEAD
1988 || !REG_P (XEXP (link, 0)))
1989 continue;
1991 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1993 remove_note (p, link);
1994 return;
1999 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
2001 This handles the case of udivmodXi4 instructions which optimize their
2002 output depending on whether any REG_UNUSED notes are present.
2003 we must make sure that INSN calculates as many results as REDUNDANT_INSN
2004 does. */
2006 static void
2007 update_reg_unused_notes (rtx insn, rtx redundant_insn)
2009 rtx link, next;
2011 for (link = REG_NOTES (insn); link; link = next)
2013 next = XEXP (link, 1);
2015 if (REG_NOTE_KIND (link) != REG_UNUSED
2016 || !REG_P (XEXP (link, 0)))
2017 continue;
2019 if (! find_regno_note (redundant_insn, REG_UNUSED,
2020 REGNO (XEXP (link, 0))))
2021 remove_note (insn, link);
2025 /* Scan a function looking for insns that need a delay slot and find insns to
2026 put into the delay slot.
2028 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
2029 as calls). We do these first since we don't want jump insns (that are
2030 easier to fill) to get the only insns that could be used for non-jump insns.
2031 When it is zero, only try to fill JUMP_INSNs.
2033 When slots are filled in this manner, the insns (including the
2034 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
2035 it is possible to tell whether a delay slot has really been filled
2036 or not. `final' knows how to deal with this, by communicating
2037 through FINAL_SEQUENCE. */
2039 static void
2040 fill_simple_delay_slots (int non_jumps_p)
2042 rtx insn, pat, trial, next_trial;
2043 int i;
2044 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2045 struct resources needed, set;
2046 int slots_to_fill, slots_filled;
2047 rtx delay_list;
2049 for (i = 0; i < num_unfilled_slots; i++)
2051 int flags;
2052 /* Get the next insn to fill. If it has already had any slots assigned,
2053 we can't do anything with it. Maybe we'll improve this later. */
2055 insn = unfilled_slots_base[i];
2056 if (insn == 0
2057 || INSN_DELETED_P (insn)
2058 || (NONJUMP_INSN_P (insn)
2059 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2060 || (JUMP_P (insn) && non_jumps_p)
2061 || (!JUMP_P (insn) && ! non_jumps_p))
2062 continue;
2064 /* It may have been that this insn used to need delay slots, but
2065 now doesn't; ignore in that case. This can happen, for example,
2066 on the HP PA RISC, where the number of delay slots depends on
2067 what insns are nearby. */
2068 slots_to_fill = num_delay_slots (insn);
2070 /* Some machine description have defined instructions to have
2071 delay slots only in certain circumstances which may depend on
2072 nearby insns (which change due to reorg's actions).
2074 For example, the PA port normally has delay slots for unconditional
2075 jumps.
2077 However, the PA port claims such jumps do not have a delay slot
2078 if they are immediate successors of certain CALL_INSNs. This
2079 allows the port to favor filling the delay slot of the call with
2080 the unconditional jump. */
2081 if (slots_to_fill == 0)
2082 continue;
2084 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
2085 says how many. After initialization, first try optimizing
2087 call _foo call _foo
2088 nop add %o7,.-L1,%o7
2089 b,a L1
2092 If this case applies, the delay slot of the call is filled with
2093 the unconditional jump. This is done first to avoid having the
2094 delay slot of the call filled in the backward scan. Also, since
2095 the unconditional jump is likely to also have a delay slot, that
2096 insn must exist when it is subsequently scanned.
2098 This is tried on each insn with delay slots as some machines
2099 have insns which perform calls, but are not represented as
2100 CALL_INSNs. */
2102 slots_filled = 0;
2103 delay_list = 0;
2105 if (JUMP_P (insn))
2106 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2107 else
2108 flags = get_jump_flags (insn, NULL_RTX);
2110 if ((trial = next_active_insn (insn))
2111 && JUMP_P (trial)
2112 && simplejump_p (trial)
2113 && eligible_for_delay (insn, slots_filled, trial, flags)
2114 && no_labels_between_p (insn, trial)
2115 && ! can_throw_internal (trial))
2117 rtx *tmp;
2118 slots_filled++;
2119 delay_list = add_to_delay_list (trial, delay_list);
2121 /* TRIAL may have had its delay slot filled, then unfilled. When
2122 the delay slot is unfilled, TRIAL is placed back on the unfilled
2123 slots obstack. Unfortunately, it is placed on the end of the
2124 obstack, not in its original location. Therefore, we must search
2125 from entry i + 1 to the end of the unfilled slots obstack to
2126 try and find TRIAL. */
2127 tmp = &unfilled_slots_base[i + 1];
2128 while (*tmp != trial && tmp != unfilled_slots_next)
2129 tmp++;
2131 /* Remove the unconditional jump from consideration for delay slot
2132 filling and unthread it. */
2133 if (*tmp == trial)
2134 *tmp = 0;
2136 rtx next = NEXT_INSN (trial);
2137 rtx prev = PREV_INSN (trial);
2138 if (prev)
2139 NEXT_INSN (prev) = next;
2140 if (next)
2141 PREV_INSN (next) = prev;
2145 /* Now, scan backwards from the insn to search for a potential
2146 delay-slot candidate. Stop searching when a label or jump is hit.
2148 For each candidate, if it is to go into the delay slot (moved
2149 forward in execution sequence), it must not need or set any resources
2150 that were set by later insns and must not set any resources that
2151 are needed for those insns.
2153 The delay slot insn itself sets resources unless it is a call
2154 (in which case the called routine, not the insn itself, is doing
2155 the setting). */
2157 if (slots_filled < slots_to_fill)
2159 CLEAR_RESOURCE (&needed);
2160 CLEAR_RESOURCE (&set);
2161 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2162 mark_referenced_resources (insn, &needed, 0);
2164 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2165 trial = next_trial)
2167 next_trial = prev_nonnote_insn (trial);
2169 /* This must be an INSN or CALL_INSN. */
2170 pat = PATTERN (trial);
2172 /* USE and CLOBBER at this level was just for flow; ignore it. */
2173 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2174 continue;
2176 /* Check for resource conflict first, to avoid unnecessary
2177 splitting. */
2178 if (! insn_references_resource_p (trial, &set, 1)
2179 && ! insn_sets_resource_p (trial, &set, 1)
2180 && ! insn_sets_resource_p (trial, &needed, 1)
2181 #ifdef HAVE_cc0
2182 /* Can't separate set of cc0 from its use. */
2183 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2184 #endif
2185 && ! can_throw_internal (trial))
2187 trial = try_split (pat, trial, 1);
2188 next_trial = prev_nonnote_insn (trial);
2189 if (eligible_for_delay (insn, slots_filled, trial, flags))
2191 /* In this case, we are searching backward, so if we
2192 find insns to put on the delay list, we want
2193 to put them at the head, rather than the
2194 tail, of the list. */
2196 update_reg_dead_notes (trial, insn);
2197 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2198 trial, delay_list);
2199 update_block (trial, trial);
2200 delete_related_insns (trial);
2201 if (slots_to_fill == ++slots_filled)
2202 break;
2203 continue;
2207 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2208 mark_referenced_resources (trial, &needed, 1);
2212 /* If all needed slots haven't been filled, we come here. */
2214 /* Try to optimize case of jumping around a single insn. */
2215 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2216 if (slots_filled != slots_to_fill
2217 && delay_list == 0
2218 && JUMP_P (insn)
2219 && (condjump_p (insn) || condjump_in_parallel_p (insn)))
2221 delay_list = optimize_skip (insn);
2222 if (delay_list)
2223 slots_filled += 1;
2225 #endif
2227 /* Try to get insns from beyond the insn needing the delay slot.
2228 These insns can neither set or reference resources set in insns being
2229 skipped, cannot set resources in the insn being skipped, and, if this
2230 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2231 call might not return).
2233 There used to be code which continued past the target label if
2234 we saw all uses of the target label. This code did not work,
2235 because it failed to account for some instructions which were
2236 both annulled and marked as from the target. This can happen as a
2237 result of optimize_skip. Since this code was redundant with
2238 fill_eager_delay_slots anyways, it was just deleted. */
2240 if (slots_filled != slots_to_fill
2241 /* If this instruction could throw an exception which is
2242 caught in the same function, then it's not safe to fill
2243 the delay slot with an instruction from beyond this
2244 point. For example, consider:
2246 int i = 2;
2248 try {
2249 f();
2250 i = 3;
2251 } catch (...) {}
2253 return i;
2255 Even though `i' is a local variable, we must be sure not
2256 to put `i = 3' in the delay slot if `f' might throw an
2257 exception.
2259 Presumably, we should also check to see if we could get
2260 back to this function via `setjmp'. */
2261 && ! can_throw_internal (insn)
2262 && (!JUMP_P (insn)
2263 || ((condjump_p (insn) || condjump_in_parallel_p (insn))
2264 && ! simplejump_p (insn)
2265 && JUMP_LABEL (insn) != 0)))
2267 /* Invariant: If insn is a JUMP_INSN, the insn's jump
2268 label. Otherwise, zero. */
2269 rtx target = 0;
2270 int maybe_never = 0;
2271 rtx pat, trial_delay;
2273 CLEAR_RESOURCE (&needed);
2274 CLEAR_RESOURCE (&set);
2276 if (CALL_P (insn))
2278 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2279 mark_referenced_resources (insn, &needed, 1);
2280 maybe_never = 1;
2282 else
2284 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2285 mark_referenced_resources (insn, &needed, 1);
2286 if (JUMP_P (insn))
2287 target = JUMP_LABEL (insn);
2290 if (target == 0)
2291 for (trial = next_nonnote_insn (insn); trial; trial = next_trial)
2293 next_trial = next_nonnote_insn (trial);
2295 if (LABEL_P (trial)
2296 || BARRIER_P (trial))
2297 break;
2299 /* We must have an INSN, JUMP_INSN, or CALL_INSN. */
2300 pat = PATTERN (trial);
2302 /* Stand-alone USE and CLOBBER are just for flow. */
2303 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2304 continue;
2306 /* If this already has filled delay slots, get the insn needing
2307 the delay slots. */
2308 if (GET_CODE (pat) == SEQUENCE)
2309 trial_delay = XVECEXP (pat, 0, 0);
2310 else
2311 trial_delay = trial;
2313 /* Stop our search when seeing an unconditional jump. */
2314 if (JUMP_P (trial_delay))
2315 break;
2317 /* See if we have a resource problem before we try to
2318 split. */
2319 if (GET_CODE (pat) != SEQUENCE
2320 && ! insn_references_resource_p (trial, &set, 1)
2321 && ! insn_sets_resource_p (trial, &set, 1)
2322 && ! insn_sets_resource_p (trial, &needed, 1)
2323 #ifdef HAVE_cc0
2324 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2325 #endif
2326 && ! (maybe_never && may_trap_or_fault_p (pat))
2327 && (trial = try_split (pat, trial, 0))
2328 && eligible_for_delay (insn, slots_filled, trial, flags)
2329 && ! can_throw_internal(trial))
2331 next_trial = next_nonnote_insn (trial);
2332 delay_list = add_to_delay_list (trial, delay_list);
2334 #ifdef HAVE_cc0
2335 if (reg_mentioned_p (cc0_rtx, pat))
2336 link_cc0_insns (trial);
2337 #endif
2339 delete_related_insns (trial);
2340 if (slots_to_fill == ++slots_filled)
2341 break;
2342 continue;
2345 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2346 mark_referenced_resources (trial, &needed, 1);
2348 /* Ensure we don't put insns between the setting of cc and the
2349 comparison by moving a setting of cc into an earlier delay
2350 slot since these insns could clobber the condition code. */
2351 set.cc = 1;
2353 /* If this is a call or jump, we might not get here. */
2354 if (CALL_P (trial_delay)
2355 || JUMP_P (trial_delay))
2356 maybe_never = 1;
2359 /* If there are slots left to fill and our search was stopped by an
2360 unconditional branch, try the insn at the branch target. We can
2361 redirect the branch if it works.
2363 Don't do this if the insn at the branch target is a branch. */
2364 if (slots_to_fill != slots_filled
2365 && trial
2366 && JUMP_P (trial)
2367 && simplejump_p (trial)
2368 && (target == 0 || JUMP_LABEL (trial) == target)
2369 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2370 && ! (NONJUMP_INSN_P (next_trial)
2371 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2372 && !JUMP_P (next_trial)
2373 && ! insn_references_resource_p (next_trial, &set, 1)
2374 && ! insn_sets_resource_p (next_trial, &set, 1)
2375 && ! insn_sets_resource_p (next_trial, &needed, 1)
2376 #ifdef HAVE_cc0
2377 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2378 #endif
2379 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2380 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2381 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2382 && ! can_throw_internal (trial))
2384 /* See comment in relax_delay_slots about necessity of using
2385 next_real_insn here. */
2386 rtx new_label = next_real_insn (next_trial);
2388 if (new_label != 0)
2389 new_label = get_label_before (new_label);
2390 else
2391 new_label = find_end_label ();
2393 if (new_label)
2395 delay_list
2396 = add_to_delay_list (copy_rtx (next_trial), delay_list);
2397 slots_filled++;
2398 reorg_redirect_jump (trial, new_label);
2400 /* If we merged because we both jumped to the same place,
2401 redirect the original insn also. */
2402 if (target)
2403 reorg_redirect_jump (insn, new_label);
2408 /* If this is an unconditional jump, then try to get insns from the
2409 target of the jump. */
2410 if (JUMP_P (insn)
2411 && simplejump_p (insn)
2412 && slots_filled != slots_to_fill)
2413 delay_list
2414 = fill_slots_from_thread (insn, const_true_rtx,
2415 next_active_insn (JUMP_LABEL (insn)),
2416 NULL, 1, 1,
2417 own_thread_p (JUMP_LABEL (insn),
2418 JUMP_LABEL (insn), 0),
2419 slots_to_fill, &slots_filled,
2420 delay_list);
2422 if (delay_list)
2423 unfilled_slots_base[i]
2424 = emit_delay_sequence (insn, delay_list, slots_filled);
2426 if (slots_to_fill == slots_filled)
2427 unfilled_slots_base[i] = 0;
2429 note_delay_statistics (slots_filled, 0);
2432 #ifdef DELAY_SLOTS_FOR_EPILOGUE
2433 /* See if the epilogue needs any delay slots. Try to fill them if so.
2434 The only thing we can do is scan backwards from the end of the
2435 function. If we did this in a previous pass, it is incorrect to do it
2436 again. */
2437 if (current_function_epilogue_delay_list)
2438 return;
2440 slots_to_fill = DELAY_SLOTS_FOR_EPILOGUE;
2441 if (slots_to_fill == 0)
2442 return;
2444 slots_filled = 0;
2445 CLEAR_RESOURCE (&set);
2447 /* The frame pointer and stack pointer are needed at the beginning of
2448 the epilogue, so instructions setting them can not be put in the
2449 epilogue delay slot. However, everything else needed at function
2450 end is safe, so we don't want to use end_of_function_needs here. */
2451 CLEAR_RESOURCE (&needed);
2452 if (frame_pointer_needed)
2454 SET_HARD_REG_BIT (needed.regs, FRAME_POINTER_REGNUM);
2455 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2456 SET_HARD_REG_BIT (needed.regs, HARD_FRAME_POINTER_REGNUM);
2457 #endif
2458 if (! EXIT_IGNORE_STACK
2459 || current_function_sp_is_unchanging)
2460 SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM);
2462 else
2463 SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM);
2465 #ifdef EPILOGUE_USES
2466 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2468 if (EPILOGUE_USES (i))
2469 SET_HARD_REG_BIT (needed.regs, i);
2471 #endif
2473 for (trial = get_last_insn (); ! stop_search_p (trial, 1);
2474 trial = PREV_INSN (trial))
2476 if (NOTE_P (trial))
2477 continue;
2478 pat = PATTERN (trial);
2479 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2480 continue;
2482 if (! insn_references_resource_p (trial, &set, 1)
2483 && ! insn_sets_resource_p (trial, &needed, 1)
2484 && ! insn_sets_resource_p (trial, &set, 1)
2485 #ifdef HAVE_cc0
2486 /* Don't want to mess with cc0 here. */
2487 && ! reg_mentioned_p (cc0_rtx, pat)
2488 #endif
2489 && ! can_throw_internal (trial))
2491 trial = try_split (pat, trial, 1);
2492 if (ELIGIBLE_FOR_EPILOGUE_DELAY (trial, slots_filled))
2494 /* Here as well we are searching backward, so put the
2495 insns we find on the head of the list. */
2497 current_function_epilogue_delay_list
2498 = gen_rtx_INSN_LIST (VOIDmode, trial,
2499 current_function_epilogue_delay_list);
2500 mark_end_of_function_resources (trial, 1);
2501 update_block (trial, trial);
2502 delete_related_insns (trial);
2504 /* Clear deleted bit so final.c will output the insn. */
2505 INSN_DELETED_P (trial) = 0;
2507 if (slots_to_fill == ++slots_filled)
2508 break;
2509 continue;
2513 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2514 mark_referenced_resources (trial, &needed, 1);
2517 note_delay_statistics (slots_filled, 0);
2518 #endif
2521 /* Try to find insns to place in delay slots.
2523 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2524 or is an unconditional branch if CONDITION is const_true_rtx.
2525 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2527 THREAD is a flow-of-control, either the insns to be executed if the
2528 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2530 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2531 to see if any potential delay slot insns set things needed there.
2533 LIKELY is nonzero if it is extremely likely that the branch will be
2534 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2535 end of a loop back up to the top.
2537 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2538 thread. I.e., it is the fallthrough code of our jump or the target of the
2539 jump when we are the only jump going there.
2541 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2542 case, we can only take insns from the head of the thread for our delay
2543 slot. We then adjust the jump to point after the insns we have taken. */
2545 static rtx
2546 fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
2547 rtx opposite_thread, int likely, int thread_if_true,
2548 int own_thread, int slots_to_fill,
2549 int *pslots_filled, rtx delay_list)
2551 rtx new_thread;
2552 struct resources opposite_needed, set, needed;
2553 rtx trial;
2554 int lose = 0;
2555 int must_annul = 0;
2556 int flags;
2558 /* Validate our arguments. */
2559 gcc_assert(condition != const_true_rtx || thread_if_true);
2560 gcc_assert(own_thread || thread_if_true);
2562 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2564 /* If our thread is the end of subroutine, we can't get any delay
2565 insns from that. */
2566 if (thread == 0)
2567 return delay_list;
2569 /* If this is an unconditional branch, nothing is needed at the
2570 opposite thread. Otherwise, compute what is needed there. */
2571 if (condition == const_true_rtx)
2572 CLEAR_RESOURCE (&opposite_needed);
2573 else
2574 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2576 /* If the insn at THREAD can be split, do it here to avoid having to
2577 update THREAD and NEW_THREAD if it is done in the loop below. Also
2578 initialize NEW_THREAD. */
2580 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2582 /* Scan insns at THREAD. We are looking for an insn that can be removed
2583 from THREAD (it neither sets nor references resources that were set
2584 ahead of it and it doesn't set anything needs by the insns ahead of
2585 it) and that either can be placed in an annulling insn or aren't
2586 needed at OPPOSITE_THREAD. */
2588 CLEAR_RESOURCE (&needed);
2589 CLEAR_RESOURCE (&set);
2591 /* If we do not own this thread, we must stop as soon as we find
2592 something that we can't put in a delay slot, since all we can do
2593 is branch into THREAD at a later point. Therefore, labels stop
2594 the search if this is not the `true' thread. */
2596 for (trial = thread;
2597 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2598 trial = next_nonnote_insn (trial))
2600 rtx pat, old_trial;
2602 /* If we have passed a label, we no longer own this thread. */
2603 if (LABEL_P (trial))
2605 own_thread = 0;
2606 continue;
2609 pat = PATTERN (trial);
2610 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2611 continue;
2613 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2614 don't separate or copy insns that set and use CC0. */
2615 if (! insn_references_resource_p (trial, &set, 1)
2616 && ! insn_sets_resource_p (trial, &set, 1)
2617 && ! insn_sets_resource_p (trial, &needed, 1)
2618 #ifdef HAVE_cc0
2619 && ! (reg_mentioned_p (cc0_rtx, pat)
2620 && (! own_thread || ! sets_cc0_p (pat)))
2621 #endif
2622 && ! can_throw_internal (trial))
2624 rtx prior_insn;
2626 /* If TRIAL is redundant with some insn before INSN, we don't
2627 actually need to add it to the delay list; we can merely pretend
2628 we did. */
2629 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2631 fix_reg_dead_note (prior_insn, insn);
2632 if (own_thread)
2634 update_block (trial, thread);
2635 if (trial == thread)
2637 thread = next_active_insn (thread);
2638 if (new_thread == trial)
2639 new_thread = thread;
2642 delete_related_insns (trial);
2644 else
2646 update_reg_unused_notes (prior_insn, trial);
2647 new_thread = next_active_insn (trial);
2650 continue;
2653 /* There are two ways we can win: If TRIAL doesn't set anything
2654 needed at the opposite thread and can't trap, or if it can
2655 go into an annulled delay slot. */
2656 if (!must_annul
2657 && (condition == const_true_rtx
2658 || (! insn_sets_resource_p (trial, &opposite_needed, 1)
2659 && ! may_trap_or_fault_p (pat))))
2661 old_trial = trial;
2662 trial = try_split (pat, trial, 0);
2663 if (new_thread == old_trial)
2664 new_thread = trial;
2665 if (thread == old_trial)
2666 thread = trial;
2667 pat = PATTERN (trial);
2668 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2669 goto winner;
2671 else if (0
2672 #ifdef ANNUL_IFTRUE_SLOTS
2673 || ! thread_if_true
2674 #endif
2675 #ifdef ANNUL_IFFALSE_SLOTS
2676 || thread_if_true
2677 #endif
2680 old_trial = trial;
2681 trial = try_split (pat, trial, 0);
2682 if (new_thread == old_trial)
2683 new_thread = trial;
2684 if (thread == old_trial)
2685 thread = trial;
2686 pat = PATTERN (trial);
2687 if ((must_annul || delay_list == NULL) && (thread_if_true
2688 ? check_annul_list_true_false (0, delay_list)
2689 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2690 : check_annul_list_true_false (1, delay_list)
2691 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2693 rtx temp;
2695 must_annul = 1;
2696 winner:
2698 #ifdef HAVE_cc0
2699 if (reg_mentioned_p (cc0_rtx, pat))
2700 link_cc0_insns (trial);
2701 #endif
2703 /* If we own this thread, delete the insn. If this is the
2704 destination of a branch, show that a basic block status
2705 may have been updated. In any case, mark the new
2706 starting point of this thread. */
2707 if (own_thread)
2709 rtx note;
2711 update_block (trial, thread);
2712 if (trial == thread)
2714 thread = next_active_insn (thread);
2715 if (new_thread == trial)
2716 new_thread = thread;
2719 /* We are moving this insn, not deleting it. We must
2720 temporarily increment the use count on any referenced
2721 label lest it be deleted by delete_related_insns. */
2722 note = find_reg_note (trial, REG_LABEL, 0);
2723 /* REG_LABEL could be NOTE_INSN_DELETED_LABEL too. */
2724 if (note && LABEL_P (XEXP (note, 0)))
2725 LABEL_NUSES (XEXP (note, 0))++;
2727 delete_related_insns (trial);
2729 if (note && LABEL_P (XEXP (note, 0)))
2730 LABEL_NUSES (XEXP (note, 0))--;
2732 else
2733 new_thread = next_active_insn (trial);
2735 temp = own_thread ? trial : copy_rtx (trial);
2736 if (thread_if_true)
2737 INSN_FROM_TARGET_P (temp) = 1;
2739 delay_list = add_to_delay_list (temp, delay_list);
2741 if (slots_to_fill == ++(*pslots_filled))
2743 /* Even though we have filled all the slots, we
2744 may be branching to a location that has a
2745 redundant insn. Skip any if so. */
2746 while (new_thread && ! own_thread
2747 && ! insn_sets_resource_p (new_thread, &set, 1)
2748 && ! insn_sets_resource_p (new_thread, &needed, 1)
2749 && ! insn_references_resource_p (new_thread,
2750 &set, 1)
2751 && (prior_insn
2752 = redundant_insn (new_thread, insn,
2753 delay_list)))
2755 /* We know we do not own the thread, so no need
2756 to call update_block and delete_insn. */
2757 fix_reg_dead_note (prior_insn, insn);
2758 update_reg_unused_notes (prior_insn, new_thread);
2759 new_thread = next_active_insn (new_thread);
2761 break;
2764 continue;
2769 /* This insn can't go into a delay slot. */
2770 lose = 1;
2771 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2772 mark_referenced_resources (trial, &needed, 1);
2774 /* Ensure we don't put insns between the setting of cc and the comparison
2775 by moving a setting of cc into an earlier delay slot since these insns
2776 could clobber the condition code. */
2777 set.cc = 1;
2779 /* If this insn is a register-register copy and the next insn has
2780 a use of our destination, change it to use our source. That way,
2781 it will become a candidate for our delay slot the next time
2782 through this loop. This case occurs commonly in loops that
2783 scan a list.
2785 We could check for more complex cases than those tested below,
2786 but it doesn't seem worth it. It might also be a good idea to try
2787 to swap the two insns. That might do better.
2789 We can't do this if the next insn modifies our destination, because
2790 that would make the replacement into the insn invalid. We also can't
2791 do this if it modifies our source, because it might be an earlyclobber
2792 operand. This latter test also prevents updating the contents of
2793 a PRE_INC. We also can't do this if there's overlap of source and
2794 destination. Overlap may happen for larger-than-register-size modes. */
2796 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2797 && REG_P (SET_SRC (pat))
2798 && REG_P (SET_DEST (pat))
2799 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2801 rtx next = next_nonnote_insn (trial);
2803 if (next && NONJUMP_INSN_P (next)
2804 && GET_CODE (PATTERN (next)) != USE
2805 && ! reg_set_p (SET_DEST (pat), next)
2806 && ! reg_set_p (SET_SRC (pat), next)
2807 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2808 && ! modified_in_p (SET_DEST (pat), next))
2809 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2813 /* If we stopped on a branch insn that has delay slots, see if we can
2814 steal some of the insns in those slots. */
2815 if (trial && NONJUMP_INSN_P (trial)
2816 && GET_CODE (PATTERN (trial)) == SEQUENCE
2817 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2819 /* If this is the `true' thread, we will want to follow the jump,
2820 so we can only do this if we have taken everything up to here. */
2821 if (thread_if_true && trial == new_thread)
2823 delay_list
2824 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
2825 delay_list, &set, &needed,
2826 &opposite_needed, slots_to_fill,
2827 pslots_filled, &must_annul,
2828 &new_thread);
2829 /* If we owned the thread and are told that it branched
2830 elsewhere, make sure we own the thread at the new location. */
2831 if (own_thread && trial != new_thread)
2832 own_thread = own_thread_p (new_thread, new_thread, 0);
2834 else if (! thread_if_true)
2835 delay_list
2836 = steal_delay_list_from_fallthrough (insn, condition,
2837 PATTERN (trial),
2838 delay_list, &set, &needed,
2839 &opposite_needed, slots_to_fill,
2840 pslots_filled, &must_annul);
2843 /* If we haven't found anything for this delay slot and it is very
2844 likely that the branch will be taken, see if the insn at our target
2845 increments or decrements a register with an increment that does not
2846 depend on the destination register. If so, try to place the opposite
2847 arithmetic insn after the jump insn and put the arithmetic insn in the
2848 delay slot. If we can't do this, return. */
2849 if (delay_list == 0 && likely && new_thread
2850 && NONJUMP_INSN_P (new_thread)
2851 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2852 && asm_noperands (PATTERN (new_thread)) < 0)
2854 rtx pat = PATTERN (new_thread);
2855 rtx dest;
2856 rtx src;
2858 trial = new_thread;
2859 pat = PATTERN (trial);
2861 if (!NONJUMP_INSN_P (trial)
2862 || GET_CODE (pat) != SET
2863 || ! eligible_for_delay (insn, 0, trial, flags)
2864 || can_throw_internal (trial))
2865 return 0;
2867 dest = SET_DEST (pat), src = SET_SRC (pat);
2868 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2869 && rtx_equal_p (XEXP (src, 0), dest)
2870 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2871 && ! side_effects_p (pat))
2873 rtx other = XEXP (src, 1);
2874 rtx new_arith;
2875 rtx ninsn;
2877 /* If this is a constant adjustment, use the same code with
2878 the negated constant. Otherwise, reverse the sense of the
2879 arithmetic. */
2880 if (GET_CODE (other) == CONST_INT)
2881 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2882 negate_rtx (GET_MODE (src), other));
2883 else
2884 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2885 GET_MODE (src), dest, other);
2887 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2888 insn);
2890 if (recog_memoized (ninsn) < 0
2891 || (extract_insn (ninsn), ! constrain_operands (1)))
2893 delete_related_insns (ninsn);
2894 return 0;
2897 if (own_thread)
2899 update_block (trial, thread);
2900 if (trial == thread)
2902 thread = next_active_insn (thread);
2903 if (new_thread == trial)
2904 new_thread = thread;
2906 delete_related_insns (trial);
2908 else
2909 new_thread = next_active_insn (trial);
2911 ninsn = own_thread ? trial : copy_rtx (trial);
2912 if (thread_if_true)
2913 INSN_FROM_TARGET_P (ninsn) = 1;
2915 delay_list = add_to_delay_list (ninsn, NULL_RTX);
2916 (*pslots_filled)++;
2920 if (delay_list && must_annul)
2921 INSN_ANNULLED_BRANCH_P (insn) = 1;
2923 /* If we are to branch into the middle of this thread, find an appropriate
2924 label or make a new one if none, and redirect INSN to it. If we hit the
2925 end of the function, use the end-of-function label. */
2926 if (new_thread != thread)
2928 rtx label;
2930 gcc_assert (thread_if_true);
2932 if (new_thread && JUMP_P (new_thread)
2933 && (simplejump_p (new_thread)
2934 || GET_CODE (PATTERN (new_thread)) == RETURN)
2935 && redirect_with_delay_list_safe_p (insn,
2936 JUMP_LABEL (new_thread),
2937 delay_list))
2938 new_thread = follow_jumps (JUMP_LABEL (new_thread));
2940 if (new_thread == 0)
2941 label = find_end_label ();
2942 else if (LABEL_P (new_thread))
2943 label = new_thread;
2944 else
2945 label = get_label_before (new_thread);
2947 if (label)
2948 reorg_redirect_jump (insn, label);
2951 return delay_list;
2954 /* Make another attempt to find insns to place in delay slots.
2956 We previously looked for insns located in front of the delay insn
2957 and, for non-jump delay insns, located behind the delay insn.
2959 Here only try to schedule jump insns and try to move insns from either
2960 the target or the following insns into the delay slot. If annulling is
2961 supported, we will be likely to do this. Otherwise, we can do this only
2962 if safe. */
2964 static void
2965 fill_eager_delay_slots (void)
2967 rtx insn;
2968 int i;
2969 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2971 for (i = 0; i < num_unfilled_slots; i++)
2973 rtx condition;
2974 rtx target_label, insn_at_target, fallthrough_insn;
2975 rtx delay_list = 0;
2976 int own_target;
2977 int own_fallthrough;
2978 int prediction, slots_to_fill, slots_filled;
2980 insn = unfilled_slots_base[i];
2981 if (insn == 0
2982 || INSN_DELETED_P (insn)
2983 || !JUMP_P (insn)
2984 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2985 continue;
2987 slots_to_fill = num_delay_slots (insn);
2988 /* Some machine description have defined instructions to have
2989 delay slots only in certain circumstances which may depend on
2990 nearby insns (which change due to reorg's actions).
2992 For example, the PA port normally has delay slots for unconditional
2993 jumps.
2995 However, the PA port claims such jumps do not have a delay slot
2996 if they are immediate successors of certain CALL_INSNs. This
2997 allows the port to favor filling the delay slot of the call with
2998 the unconditional jump. */
2999 if (slots_to_fill == 0)
3000 continue;
3002 slots_filled = 0;
3003 target_label = JUMP_LABEL (insn);
3004 condition = get_branch_condition (insn, target_label);
3006 if (condition == 0)
3007 continue;
3009 /* Get the next active fallthrough and target insns and see if we own
3010 them. Then see whether the branch is likely true. We don't need
3011 to do a lot of this for unconditional branches. */
3013 insn_at_target = next_active_insn (target_label);
3014 own_target = own_thread_p (target_label, target_label, 0);
3016 if (condition == const_true_rtx)
3018 own_fallthrough = 0;
3019 fallthrough_insn = 0;
3020 prediction = 2;
3022 else
3024 fallthrough_insn = next_active_insn (insn);
3025 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
3026 prediction = mostly_true_jump (insn, condition);
3029 /* If this insn is expected to branch, first try to get insns from our
3030 target, then our fallthrough insns. If it is not expected to branch,
3031 try the other order. */
3033 if (prediction > 0)
3035 delay_list
3036 = fill_slots_from_thread (insn, condition, insn_at_target,
3037 fallthrough_insn, prediction == 2, 1,
3038 own_target,
3039 slots_to_fill, &slots_filled, delay_list);
3041 if (delay_list == 0 && own_fallthrough)
3043 /* Even though we didn't find anything for delay slots,
3044 we might have found a redundant insn which we deleted
3045 from the thread that was filled. So we have to recompute
3046 the next insn at the target. */
3047 target_label = JUMP_LABEL (insn);
3048 insn_at_target = next_active_insn (target_label);
3050 delay_list
3051 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3052 insn_at_target, 0, 0,
3053 own_fallthrough,
3054 slots_to_fill, &slots_filled,
3055 delay_list);
3058 else
3060 if (own_fallthrough)
3061 delay_list
3062 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3063 insn_at_target, 0, 0,
3064 own_fallthrough,
3065 slots_to_fill, &slots_filled,
3066 delay_list);
3068 if (delay_list == 0)
3069 delay_list
3070 = fill_slots_from_thread (insn, condition, insn_at_target,
3071 next_active_insn (insn), 0, 1,
3072 own_target,
3073 slots_to_fill, &slots_filled,
3074 delay_list);
3077 if (delay_list)
3078 unfilled_slots_base[i]
3079 = emit_delay_sequence (insn, delay_list, slots_filled);
3081 if (slots_to_fill == slots_filled)
3082 unfilled_slots_base[i] = 0;
3084 note_delay_statistics (slots_filled, 1);
3088 /* Once we have tried two ways to fill a delay slot, make a pass over the
3089 code to try to improve the results and to do such things as more jump
3090 threading. */
3092 static void
3093 relax_delay_slots (rtx first)
3095 rtx insn, next, pat;
3096 rtx trial, delay_insn, target_label;
3098 /* Look at every JUMP_INSN and see if we can improve it. */
3099 for (insn = first; insn; insn = next)
3101 rtx other;
3103 next = next_active_insn (insn);
3105 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3106 the next insn, or jumps to a label that is not the last of a
3107 group of consecutive labels. */
3108 if (JUMP_P (insn)
3109 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3110 && (target_label = JUMP_LABEL (insn)) != 0)
3112 target_label = skip_consecutive_labels (follow_jumps (target_label));
3113 if (target_label == 0)
3114 target_label = find_end_label ();
3116 if (target_label && next_active_insn (target_label) == next
3117 && ! condjump_in_parallel_p (insn))
3119 delete_jump (insn);
3120 continue;
3123 if (target_label && target_label != JUMP_LABEL (insn))
3124 reorg_redirect_jump (insn, target_label);
3126 /* See if this jump conditionally branches around an unconditional
3127 jump. If so, invert this jump and point it to the target of the
3128 second jump. */
3129 if (next && JUMP_P (next)
3130 && any_condjump_p (insn)
3131 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3132 && target_label
3133 && next_active_insn (target_label) == next_active_insn (next)
3134 && no_labels_between_p (insn, next))
3136 rtx label = JUMP_LABEL (next);
3138 /* Be careful how we do this to avoid deleting code or
3139 labels that are momentarily dead. See similar optimization
3140 in jump.c.
3142 We also need to ensure we properly handle the case when
3143 invert_jump fails. */
3145 ++LABEL_NUSES (target_label);
3146 if (label)
3147 ++LABEL_NUSES (label);
3149 if (invert_jump (insn, label, 1))
3151 delete_related_insns (next);
3152 next = insn;
3155 if (label)
3156 --LABEL_NUSES (label);
3158 if (--LABEL_NUSES (target_label) == 0)
3159 delete_related_insns (target_label);
3161 continue;
3165 /* If this is an unconditional jump and the previous insn is a
3166 conditional jump, try reversing the condition of the previous
3167 insn and swapping our targets. The next pass might be able to
3168 fill the slots.
3170 Don't do this if we expect the conditional branch to be true, because
3171 we would then be making the more common case longer. */
3173 if (JUMP_P (insn)
3174 && (simplejump_p (insn) || GET_CODE (PATTERN (insn)) == RETURN)
3175 && (other = prev_active_insn (insn)) != 0
3176 && any_condjump_p (other)
3177 && no_labels_between_p (other, insn)
3178 && 0 > mostly_true_jump (other,
3179 get_branch_condition (other,
3180 JUMP_LABEL (other))))
3182 rtx other_target = JUMP_LABEL (other);
3183 target_label = JUMP_LABEL (insn);
3185 if (invert_jump (other, target_label, 0))
3186 reorg_redirect_jump (insn, other_target);
3189 /* Now look only at cases where we have filled a delay slot. */
3190 if (!NONJUMP_INSN_P (insn)
3191 || GET_CODE (PATTERN (insn)) != SEQUENCE)
3192 continue;
3194 pat = PATTERN (insn);
3195 delay_insn = XVECEXP (pat, 0, 0);
3197 /* See if the first insn in the delay slot is redundant with some
3198 previous insn. Remove it from the delay slot if so; then set up
3199 to reprocess this insn. */
3200 if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
3202 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3203 next = prev_active_insn (next);
3204 continue;
3207 /* See if we have a RETURN insn with a filled delay slot followed
3208 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3209 the first RETURN (but not its delay insn). This gives the same
3210 effect in fewer instructions.
3212 Only do so if optimizing for size since this results in slower, but
3213 smaller code. */
3214 if (optimize_size
3215 && GET_CODE (PATTERN (delay_insn)) == RETURN
3216 && next
3217 && JUMP_P (next)
3218 && GET_CODE (PATTERN (next)) == RETURN)
3220 rtx after;
3221 int i;
3223 /* Delete the RETURN and just execute the delay list insns.
3225 We do this by deleting the INSN containing the SEQUENCE, then
3226 re-emitting the insns separately, and then deleting the RETURN.
3227 This allows the count of the jump target to be properly
3228 decremented. */
3230 /* Clear the from target bit, since these insns are no longer
3231 in delay slots. */
3232 for (i = 0; i < XVECLEN (pat, 0); i++)
3233 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3235 trial = PREV_INSN (insn);
3236 delete_related_insns (insn);
3237 gcc_assert (GET_CODE (pat) == SEQUENCE);
3238 after = trial;
3239 for (i = 0; i < XVECLEN (pat, 0); i++)
3241 rtx this_insn = XVECEXP (pat, 0, i);
3242 add_insn_after (this_insn, after);
3243 after = this_insn;
3245 delete_scheduled_jump (delay_insn);
3246 continue;
3249 /* Now look only at the cases where we have a filled JUMP_INSN. */
3250 if (!JUMP_P (XVECEXP (PATTERN (insn), 0, 0))
3251 || ! (condjump_p (XVECEXP (PATTERN (insn), 0, 0))
3252 || condjump_in_parallel_p (XVECEXP (PATTERN (insn), 0, 0))))
3253 continue;
3255 target_label = JUMP_LABEL (delay_insn);
3257 if (target_label)
3259 /* If this jump goes to another unconditional jump, thread it, but
3260 don't convert a jump into a RETURN here. */
3261 trial = skip_consecutive_labels (follow_jumps (target_label));
3262 if (trial == 0)
3263 trial = find_end_label ();
3265 if (trial && trial != target_label
3266 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3268 reorg_redirect_jump (delay_insn, trial);
3269 target_label = trial;
3272 /* If the first insn at TARGET_LABEL is redundant with a previous
3273 insn, redirect the jump to the following insn process again. */
3274 trial = next_active_insn (target_label);
3275 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3276 && redundant_insn (trial, insn, 0)
3277 && ! can_throw_internal (trial))
3279 /* Figure out where to emit the special USE insn so we don't
3280 later incorrectly compute register live/death info. */
3281 rtx tmp = next_active_insn (trial);
3282 if (tmp == 0)
3283 tmp = find_end_label ();
3285 if (tmp)
3287 /* Insert the special USE insn and update dataflow info. */
3288 update_block (trial, tmp);
3290 /* Now emit a label before the special USE insn, and
3291 redirect our jump to the new label. */
3292 target_label = get_label_before (PREV_INSN (tmp));
3293 reorg_redirect_jump (delay_insn, target_label);
3294 next = insn;
3295 continue;
3299 /* Similarly, if it is an unconditional jump with one insn in its
3300 delay list and that insn is redundant, thread the jump. */
3301 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3302 && XVECLEN (PATTERN (trial), 0) == 2
3303 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
3304 && (simplejump_p (XVECEXP (PATTERN (trial), 0, 0))
3305 || GET_CODE (PATTERN (XVECEXP (PATTERN (trial), 0, 0))) == RETURN)
3306 && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3308 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3309 if (target_label == 0)
3310 target_label = find_end_label ();
3312 if (target_label
3313 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3314 insn))
3316 reorg_redirect_jump (delay_insn, target_label);
3317 next = insn;
3318 continue;
3323 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3324 && prev_active_insn (target_label) == insn
3325 && ! condjump_in_parallel_p (delay_insn)
3326 #ifdef HAVE_cc0
3327 /* If the last insn in the delay slot sets CC0 for some insn,
3328 various code assumes that it is in a delay slot. We could
3329 put it back where it belonged and delete the register notes,
3330 but it doesn't seem worthwhile in this uncommon case. */
3331 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3332 REG_CC_USER, NULL_RTX)
3333 #endif
3336 rtx after;
3337 int i;
3339 /* All this insn does is execute its delay list and jump to the
3340 following insn. So delete the jump and just execute the delay
3341 list insns.
3343 We do this by deleting the INSN containing the SEQUENCE, then
3344 re-emitting the insns separately, and then deleting the jump.
3345 This allows the count of the jump target to be properly
3346 decremented. */
3348 /* Clear the from target bit, since these insns are no longer
3349 in delay slots. */
3350 for (i = 0; i < XVECLEN (pat, 0); i++)
3351 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3353 trial = PREV_INSN (insn);
3354 delete_related_insns (insn);
3355 gcc_assert (GET_CODE (pat) == SEQUENCE);
3356 after = trial;
3357 for (i = 0; i < XVECLEN (pat, 0); i++)
3359 rtx this_insn = XVECEXP (pat, 0, i);
3360 add_insn_after (this_insn, after);
3361 after = this_insn;
3363 delete_scheduled_jump (delay_insn);
3364 continue;
3367 /* See if this is an unconditional jump around a single insn which is
3368 identical to the one in its delay slot. In this case, we can just
3369 delete the branch and the insn in its delay slot. */
3370 if (next && NONJUMP_INSN_P (next)
3371 && prev_label (next_active_insn (next)) == target_label
3372 && simplejump_p (insn)
3373 && XVECLEN (pat, 0) == 2
3374 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3376 delete_related_insns (insn);
3377 continue;
3380 /* See if this jump (with its delay slots) branches around another
3381 jump (without delay slots). If so, invert this jump and point
3382 it to the target of the second jump. We cannot do this for
3383 annulled jumps, though. Again, don't convert a jump to a RETURN
3384 here. */
3385 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3386 && any_condjump_p (delay_insn)
3387 && next && JUMP_P (next)
3388 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3389 && next_active_insn (target_label) == next_active_insn (next)
3390 && no_labels_between_p (insn, next))
3392 rtx label = JUMP_LABEL (next);
3393 rtx old_label = JUMP_LABEL (delay_insn);
3395 if (label == 0)
3396 label = find_end_label ();
3398 /* find_end_label can generate a new label. Check this first. */
3399 if (label
3400 && no_labels_between_p (insn, next)
3401 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3403 /* Be careful how we do this to avoid deleting code or labels
3404 that are momentarily dead. See similar optimization in
3405 jump.c */
3406 if (old_label)
3407 ++LABEL_NUSES (old_label);
3409 if (invert_jump (delay_insn, label, 1))
3411 int i;
3413 /* Must update the INSN_FROM_TARGET_P bits now that
3414 the branch is reversed, so that mark_target_live_regs
3415 will handle the delay slot insn correctly. */
3416 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3418 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3419 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3422 delete_related_insns (next);
3423 next = insn;
3426 if (old_label && --LABEL_NUSES (old_label) == 0)
3427 delete_related_insns (old_label);
3428 continue;
3432 /* If we own the thread opposite the way this insn branches, see if we
3433 can merge its delay slots with following insns. */
3434 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3435 && own_thread_p (NEXT_INSN (insn), 0, 1))
3436 try_merge_delay_insns (insn, next);
3437 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3438 && own_thread_p (target_label, target_label, 0))
3439 try_merge_delay_insns (insn, next_active_insn (target_label));
3441 /* If we get here, we haven't deleted INSN. But we may have deleted
3442 NEXT, so recompute it. */
3443 next = next_active_insn (insn);
3447 #ifdef HAVE_return
3449 /* Look for filled jumps to the end of function label. We can try to convert
3450 them into RETURN insns if the insns in the delay slot are valid for the
3451 RETURN as well. */
3453 static void
3454 make_return_insns (rtx first)
3456 rtx insn, jump_insn, pat;
3457 rtx real_return_label = end_of_function_label;
3458 int slots, i;
3460 #ifdef DELAY_SLOTS_FOR_EPILOGUE
3461 /* If a previous pass filled delay slots in the epilogue, things get a
3462 bit more complicated, as those filler insns would generally (without
3463 data flow analysis) have to be executed after any existing branch
3464 delay slot filler insns. It is also unknown whether such a
3465 transformation would actually be profitable. Note that the existing
3466 code only cares for branches with (some) filled delay slots. */
3467 if (current_function_epilogue_delay_list != NULL)
3468 return;
3469 #endif
3471 /* See if there is a RETURN insn in the function other than the one we
3472 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3473 into a RETURN to jump to it. */
3474 for (insn = first; insn; insn = NEXT_INSN (insn))
3475 if (JUMP_P (insn) && GET_CODE (PATTERN (insn)) == RETURN)
3477 real_return_label = get_label_before (insn);
3478 break;
3481 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3482 was equal to END_OF_FUNCTION_LABEL. */
3483 LABEL_NUSES (real_return_label)++;
3485 /* Clear the list of insns to fill so we can use it. */
3486 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3488 for (insn = first; insn; insn = NEXT_INSN (insn))
3490 int flags;
3492 /* Only look at filled JUMP_INSNs that go to the end of function
3493 label. */
3494 if (!NONJUMP_INSN_P (insn)
3495 || GET_CODE (PATTERN (insn)) != SEQUENCE
3496 || !JUMP_P (XVECEXP (PATTERN (insn), 0, 0))
3497 || JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) != end_of_function_label)
3498 continue;
3500 pat = PATTERN (insn);
3501 jump_insn = XVECEXP (pat, 0, 0);
3503 /* If we can't make the jump into a RETURN, try to redirect it to the best
3504 RETURN and go on to the next insn. */
3505 if (! reorg_redirect_jump (jump_insn, NULL_RTX))
3507 /* Make sure redirecting the jump will not invalidate the delay
3508 slot insns. */
3509 if (redirect_with_delay_slots_safe_p (jump_insn,
3510 real_return_label,
3511 insn))
3512 reorg_redirect_jump (jump_insn, real_return_label);
3513 continue;
3516 /* See if this RETURN can accept the insns current in its delay slot.
3517 It can if it has more or an equal number of slots and the contents
3518 of each is valid. */
3520 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3521 slots = num_delay_slots (jump_insn);
3522 if (slots >= XVECLEN (pat, 0) - 1)
3524 for (i = 1; i < XVECLEN (pat, 0); i++)
3525 if (! (
3526 #ifdef ANNUL_IFFALSE_SLOTS
3527 (INSN_ANNULLED_BRANCH_P (jump_insn)
3528 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3529 ? eligible_for_annul_false (jump_insn, i - 1,
3530 XVECEXP (pat, 0, i), flags) :
3531 #endif
3532 #ifdef ANNUL_IFTRUE_SLOTS
3533 (INSN_ANNULLED_BRANCH_P (jump_insn)
3534 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3535 ? eligible_for_annul_true (jump_insn, i - 1,
3536 XVECEXP (pat, 0, i), flags) :
3537 #endif
3538 eligible_for_delay (jump_insn, i - 1,
3539 XVECEXP (pat, 0, i), flags)))
3540 break;
3542 else
3543 i = 0;
3545 if (i == XVECLEN (pat, 0))
3546 continue;
3548 /* We have to do something with this insn. If it is an unconditional
3549 RETURN, delete the SEQUENCE and output the individual insns,
3550 followed by the RETURN. Then set things up so we try to find
3551 insns for its delay slots, if it needs some. */
3552 if (GET_CODE (PATTERN (jump_insn)) == RETURN)
3554 rtx prev = PREV_INSN (insn);
3556 delete_related_insns (insn);
3557 for (i = 1; i < XVECLEN (pat, 0); i++)
3558 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3560 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3561 emit_barrier_after (insn);
3563 if (slots)
3564 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3566 else
3567 /* It is probably more efficient to keep this with its current
3568 delay slot as a branch to a RETURN. */
3569 reorg_redirect_jump (jump_insn, real_return_label);
3572 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3573 new delay slots we have created. */
3574 if (--LABEL_NUSES (real_return_label) == 0)
3575 delete_related_insns (real_return_label);
3577 fill_simple_delay_slots (1);
3578 fill_simple_delay_slots (0);
3580 #endif
3582 /* Try to find insns to place in delay slots. */
3584 void
3585 dbr_schedule (rtx first, FILE *file)
3587 rtx insn, next, epilogue_insn = 0;
3588 int i;
3590 /* If the current function has no insns other than the prologue and
3591 epilogue, then do not try to fill any delay slots. */
3592 if (n_basic_blocks == 0)
3593 return;
3595 /* Find the highest INSN_UID and allocate and initialize our map from
3596 INSN_UID's to position in code. */
3597 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3599 if (INSN_UID (insn) > max_uid)
3600 max_uid = INSN_UID (insn);
3601 if (NOTE_P (insn)
3602 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG)
3603 epilogue_insn = insn;
3606 uid_to_ruid = xmalloc ((max_uid + 1) * sizeof (int));
3607 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3608 uid_to_ruid[INSN_UID (insn)] = i;
3610 /* Initialize the list of insns that need filling. */
3611 if (unfilled_firstobj == 0)
3613 gcc_obstack_init (&unfilled_slots_obstack);
3614 unfilled_firstobj = obstack_alloc (&unfilled_slots_obstack, 0);
3617 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3619 rtx target;
3621 INSN_ANNULLED_BRANCH_P (insn) = 0;
3622 INSN_FROM_TARGET_P (insn) = 0;
3624 /* Skip vector tables. We can't get attributes for them. */
3625 if (JUMP_P (insn)
3626 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3627 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3628 continue;
3630 if (num_delay_slots (insn) > 0)
3631 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3633 /* Ensure all jumps go to the last of a set of consecutive labels. */
3634 if (JUMP_P (insn)
3635 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3636 && JUMP_LABEL (insn) != 0
3637 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3638 != JUMP_LABEL (insn)))
3639 redirect_jump (insn, target, 1);
3642 init_resource_info (epilogue_insn);
3644 /* Show we haven't computed an end-of-function label yet. */
3645 end_of_function_label = 0;
3647 /* Initialize the statistics for this function. */
3648 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3649 memset (num_filled_delays, 0, sizeof num_filled_delays);
3651 /* Now do the delay slot filling. Try everything twice in case earlier
3652 changes make more slots fillable. */
3654 for (reorg_pass_number = 0;
3655 reorg_pass_number < MAX_REORG_PASSES;
3656 reorg_pass_number++)
3658 fill_simple_delay_slots (1);
3659 fill_simple_delay_slots (0);
3660 fill_eager_delay_slots ();
3661 relax_delay_slots (first);
3664 /* Delete any USE insns made by update_block; subsequent passes don't need
3665 them or know how to deal with them. */
3666 for (insn = first; insn; insn = next)
3668 next = NEXT_INSN (insn);
3670 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3671 && INSN_P (XEXP (PATTERN (insn), 0)))
3672 next = delete_related_insns (insn);
3675 /* If we made an end of function label, indicate that it is now
3676 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3677 If it is now unused, delete it. */
3678 if (end_of_function_label && --LABEL_NUSES (end_of_function_label) == 0)
3679 delete_related_insns (end_of_function_label);
3681 #ifdef HAVE_return
3682 if (HAVE_return && end_of_function_label != 0)
3683 make_return_insns (first);
3684 #endif
3686 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3688 /* It is not clear why the line below is needed, but it does seem to be. */
3689 unfilled_firstobj = obstack_alloc (&unfilled_slots_obstack, 0);
3691 if (file)
3693 int i, j, need_comma;
3694 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3695 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3697 for (reorg_pass_number = 0;
3698 reorg_pass_number < MAX_REORG_PASSES;
3699 reorg_pass_number++)
3701 fprintf (file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3702 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3704 need_comma = 0;
3705 fprintf (file, ";; Reorg function #%d\n", i);
3707 fprintf (file, ";; %d insns needing delay slots\n;; ",
3708 num_insns_needing_delays[i][reorg_pass_number]);
3710 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3711 if (num_filled_delays[i][j][reorg_pass_number])
3713 if (need_comma)
3714 fprintf (file, ", ");
3715 need_comma = 1;
3716 fprintf (file, "%d got %d delays",
3717 num_filled_delays[i][j][reorg_pass_number], j);
3719 fprintf (file, "\n");
3722 memset (total_delay_slots, 0, sizeof total_delay_slots);
3723 memset (total_annul_slots, 0, sizeof total_annul_slots);
3724 for (insn = first; insn; insn = NEXT_INSN (insn))
3726 if (! INSN_DELETED_P (insn)
3727 && NONJUMP_INSN_P (insn)
3728 && GET_CODE (PATTERN (insn)) != USE
3729 && GET_CODE (PATTERN (insn)) != CLOBBER)
3731 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3733 j = XVECLEN (PATTERN (insn), 0) - 1;
3734 if (j > MAX_DELAY_HISTOGRAM)
3735 j = MAX_DELAY_HISTOGRAM;
3736 if (INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (insn), 0, 0)))
3737 total_annul_slots[j]++;
3738 else
3739 total_delay_slots[j]++;
3741 else if (num_delay_slots (insn) > 0)
3742 total_delay_slots[0]++;
3745 fprintf (file, ";; Reorg totals: ");
3746 need_comma = 0;
3747 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3749 if (total_delay_slots[j])
3751 if (need_comma)
3752 fprintf (file, ", ");
3753 need_comma = 1;
3754 fprintf (file, "%d got %d delays", total_delay_slots[j], j);
3757 fprintf (file, "\n");
3758 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3759 fprintf (file, ";; Reorg annuls: ");
3760 need_comma = 0;
3761 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3763 if (total_annul_slots[j])
3765 if (need_comma)
3766 fprintf (file, ", ");
3767 need_comma = 1;
3768 fprintf (file, "%d got %d delays", total_annul_slots[j], j);
3771 fprintf (file, "\n");
3772 #endif
3773 fprintf (file, "\n");
3776 /* For all JUMP insns, fill in branch prediction notes, so that during
3777 assembler output a target can set branch prediction bits in the code.
3778 We have to do this now, as up until this point the destinations of
3779 JUMPS can be moved around and changed, but past right here that cannot
3780 happen. */
3781 for (insn = first; insn; insn = NEXT_INSN (insn))
3783 int pred_flags;
3785 if (NONJUMP_INSN_P (insn))
3787 rtx pat = PATTERN (insn);
3789 if (GET_CODE (pat) == SEQUENCE)
3790 insn = XVECEXP (pat, 0, 0);
3792 if (!JUMP_P (insn))
3793 continue;
3795 pred_flags = get_jump_flags (insn, JUMP_LABEL (insn));
3796 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_BR_PRED,
3797 GEN_INT (pred_flags),
3798 REG_NOTES (insn));
3800 free_resource_info ();
3801 free (uid_to_ruid);
3802 #ifdef DELAY_SLOTS_FOR_EPILOGUE
3803 /* SPARC assembler, for instance, emit warning when debug info is output
3804 into the delay slot. */
3806 rtx link;
3808 for (link = current_function_epilogue_delay_list;
3809 link;
3810 link = XEXP (link, 1))
3811 INSN_LOCATOR (XEXP (link, 0)) = 0;
3813 #endif
3815 #endif /* DELAY_SLOTS */
3817 static bool
3818 gate_handle_delay_slots (void)
3820 #ifdef DELAY_SLOTS
3821 return flag_delayed_branch;
3822 #else
3823 return 0;
3824 #endif
3827 /* Run delay slot optimization. */
3828 static void
3829 rest_of_handle_delay_slots (void)
3831 #ifdef DELAY_SLOTS
3832 dbr_schedule (get_insns (), dump_file);
3833 #endif
3836 struct tree_opt_pass pass_delay_slots =
3838 "dbr", /* name */
3839 gate_handle_delay_slots, /* gate */
3840 rest_of_handle_delay_slots, /* execute */
3841 NULL, /* sub */
3842 NULL, /* next */
3843 0, /* static_pass_number */
3844 TV_DBR_SCHED, /* tv_id */
3845 0, /* properties_required */
3846 0, /* properties_provided */
3847 0, /* properties_destroyed */
3848 0, /* todo_flags_start */
3849 TODO_dump_func |
3850 TODO_ggc_collect, /* todo_flags_finish */
3851 'd' /* letter */
3854 /* Machine dependent reorg pass. */
3855 static bool
3856 gate_handle_machine_reorg (void)
3858 return targetm.machine_dependent_reorg != 0;
3862 static void
3863 rest_of_handle_machine_reorg (void)
3865 targetm.machine_dependent_reorg ();
3868 struct tree_opt_pass pass_machine_reorg =
3870 "mach", /* name */
3871 gate_handle_machine_reorg, /* gate */
3872 rest_of_handle_machine_reorg, /* execute */
3873 NULL, /* sub */
3874 NULL, /* next */
3875 0, /* static_pass_number */
3876 TV_MACH_DEP, /* tv_id */
3877 0, /* properties_required */
3878 0, /* properties_provided */
3879 0, /* properties_destroyed */
3880 0, /* todo_flags_start */
3881 TODO_dump_func |
3882 TODO_ggc_collect, /* todo_flags_finish */
3883 'M' /* letter */