[ARM/AArch64][testsuite] Add vsli_n and vsri_n tests.
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / advsimd-intrinsics / vsli_n.c
blobeb06ce0a125ae5fd14122d36c5312ebf5b7d0b68
1 #include <arm_neon.h>
2 #include "arm-neon-ref.h"
3 #include "compute-ref-data.h"
5 #define INSN_NAME vsli
6 #define TEST_MSG "VSLI_N"
8 /* Extra tests for functions requiring corner cases tests. */
9 void vsli_extra(void);
10 #define EXTRA_TESTS vsli_extra
12 /* Expected results. */
13 VECT_VAR_DECL(expected,int,8,8) [] = { 0x20, 0x21, 0x22, 0x23,
14 0x24, 0x25, 0x26, 0x27 };
15 VECT_VAR_DECL(expected,int,16,4) [] = { 0xffe0, 0xffe1, 0xffe2, 0xffe3 };
16 VECT_VAR_DECL(expected,int,32,2) [] = { 0x6, 0x7 };
17 VECT_VAR_DECL(expected,int,64,1) [] = { 0x64fffffff0 };
18 VECT_VAR_DECL(expected,uint,8,8) [] = { 0x50, 0x51, 0x52, 0x53,
19 0x50, 0x51, 0x52, 0x53 };
20 VECT_VAR_DECL(expected,uint,16,4) [] = { 0x7bf0, 0x7bf1, 0x7bf2, 0x7bf3 };
21 VECT_VAR_DECL(expected,uint,32,2) [] = { 0x3ffffff0, 0x3ffffff1 };
22 VECT_VAR_DECL(expected,uint,64,1) [] = { 0x10 };
23 VECT_VAR_DECL(expected,poly,8,8) [] = { 0x50, 0x51, 0x52, 0x53,
24 0x50, 0x51, 0x52, 0x53 };
25 VECT_VAR_DECL(expected,poly,16,4) [] = { 0x7bf0, 0x7bf1, 0x7bf2, 0x7bf3 };
26 VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
27 VECT_VAR_DECL(expected,int,8,16) [] = { 0xd0, 0xd1, 0xd2, 0xd3,
28 0xd4, 0xd5, 0xd6, 0xd7,
29 0xd8, 0xd9, 0xda, 0xdb,
30 0xdc, 0xdd, 0xde, 0xdf };
31 VECT_VAR_DECL(expected,int,16,8) [] = { 0xff60, 0xff61, 0xff62, 0xff63,
32 0xff64, 0xff65, 0xff66, 0xff67 };
33 VECT_VAR_DECL(expected,int,32,4) [] = { 0xfe2ffff0, 0xfe2ffff1,
34 0xfe2ffff2, 0xfe2ffff3 };
35 VECT_VAR_DECL(expected,int,64,2) [] = { 0x18fff0, 0x18fff1 };
36 VECT_VAR_DECL(expected,uint,8,16) [] = { 0x60, 0x61, 0x62, 0x63,
37 0x64, 0x65, 0x66, 0x67,
38 0x60, 0x61, 0x62, 0x63,
39 0x64, 0x65, 0x66, 0x67 };
40 VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3ff0, 0x3ff1, 0x3ff2, 0x3ff3,
41 0x3ff4, 0x3ff5, 0x3ff6, 0x3ff7 };
42 VECT_VAR_DECL(expected,uint,32,4) [] = { 0x1bfffff0, 0x1bfffff1,
43 0x1bfffff2, 0x1bfffff3 };
44 VECT_VAR_DECL(expected,uint,64,2) [] = { 0x7ffffffffffff0, 0x7ffffffffffff1 };
45 VECT_VAR_DECL(expected,poly,8,16) [] = { 0x60, 0x61, 0x62, 0x63,
46 0x64, 0x65, 0x66, 0x67,
47 0x60, 0x61, 0x62, 0x63,
48 0x64, 0x65, 0x66, 0x67 };
49 VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3ff0, 0x3ff1, 0x3ff2, 0x3ff3,
50 0x3ff4, 0x3ff5, 0x3ff6, 0x3ff7 };
51 VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
52 0x33333333, 0x33333333 };
54 /* Expected results with max shift amount. */
55 VECT_VAR_DECL(expected_max_shift,int,8,8) [] = { 0x70, 0x71, 0x72, 0x73,
56 0x74, 0x75, 0x76, 0x77 };
57 VECT_VAR_DECL(expected_max_shift,int,16,4) [] = { 0x7ff0, 0x7ff1,
58 0x7ff2, 0x7ff3 };
59 VECT_VAR_DECL(expected_max_shift,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
60 VECT_VAR_DECL(expected_max_shift,int,64,1) [] = { 0x7ffffffffffffff0 };
61 VECT_VAR_DECL(expected_max_shift,uint,8,8) [] = { 0x70, 0x71, 0x72, 0x73,
62 0x74, 0x75, 0x76, 0x77 };
63 VECT_VAR_DECL(expected_max_shift,uint,16,4) [] = { 0x7ff0, 0x7ff1,
64 0x7ff2, 0x7ff3 };
65 VECT_VAR_DECL(expected_max_shift,uint,32,2) [] = { 0x7ffffff0, 0x7ffffff1 };
66 VECT_VAR_DECL(expected_max_shift,uint,64,1) [] = { 0x7ffffffffffffff0 };
67 VECT_VAR_DECL(expected_max_shift,poly,8,8) [] = { 0x70, 0x71, 0x72, 0x73,
68 0x74, 0x75, 0x76, 0x77 };
69 VECT_VAR_DECL(expected_max_shift,poly,16,4) [] = { 0x7ff0, 0x7ff1,
70 0x7ff2, 0x7ff3 };
71 VECT_VAR_DECL(expected_max_shift,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
72 VECT_VAR_DECL(expected_max_shift,int,8,16) [] = { 0x70, 0x71, 0x72, 0x73,
73 0x74, 0x75, 0x76, 0x77,
74 0x78, 0x79, 0x7a, 0x7b,
75 0x7c, 0x7d, 0x7e, 0x7f };
76 VECT_VAR_DECL(expected_max_shift,int,16,8) [] = { 0x7ff0, 0x7ff1, 0x7ff2, 0x7ff3,
77 0x7ff4, 0x7ff5, 0x7ff6, 0x7ff7 };
78 VECT_VAR_DECL(expected_max_shift,int,32,4) [] = { 0x7ffffff0, 0x7ffffff1,
79 0x7ffffff2, 0x7ffffff3 };
80 VECT_VAR_DECL(expected_max_shift,int,64,2) [] = { 0x7ffffffffffffff0,
81 0x7ffffffffffffff1 };
82 VECT_VAR_DECL(expected_max_shift,uint,8,16) [] = { 0x70, 0x71, 0x72, 0x73,
83 0x74, 0x75, 0x76, 0x77,
84 0x78, 0x79, 0x7a, 0x7b,
85 0x7c, 0x7d, 0x7e, 0x7f };
86 VECT_VAR_DECL(expected_max_shift,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
87 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
88 VECT_VAR_DECL(expected_max_shift,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
89 0xfffffff2, 0xfffffff3 };
90 VECT_VAR_DECL(expected_max_shift,uint,64,2) [] = { 0xfffffffffffffff0,
91 0xfffffffffffffff1 };
92 VECT_VAR_DECL(expected_max_shift,poly,8,16) [] = { 0x70, 0x71, 0x72, 0x73,
93 0x74, 0x75, 0x76, 0x77,
94 0x78, 0x79, 0x7a, 0x7b,
95 0x7c, 0x7d, 0x7e, 0x7f };
96 VECT_VAR_DECL(expected_max_shift,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
97 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
98 VECT_VAR_DECL(expected_max_shift,hfloat,32,4) [] = { 0x33333333, 0x33333333,
99 0x33333333, 0x33333333 };
101 #include "vsXi_n.inc"
103 void vsli_extra(void)
105 /* Test cases with maximum shift amount (this amount is different
106 from vsri). */
108 DECL_VARIABLE_ALL_VARIANTS(vector);
109 DECL_VARIABLE_ALL_VARIANTS(vector2);
110 DECL_VARIABLE_ALL_VARIANTS(vector_res);
112 clean_results ();
114 /* Initialize input "vector" from "buffer". */
115 TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
117 /* Fill input vector2 with arbitrary values. */
118 VDUP(vector2, , int, s, 8, 8, 2);
119 VDUP(vector2, , int, s, 16, 4, -4);
120 VDUP(vector2, , int, s, 32, 2, 3);
121 VDUP(vector2, , int, s, 64, 1, 100);
122 VDUP(vector2, , uint, u, 8, 8, 20);
123 VDUP(vector2, , uint, u, 16, 4, 30);
124 VDUP(vector2, , uint, u, 32, 2, 40);
125 VDUP(vector2, , uint, u, 64, 1, 2);
126 VDUP(vector2, , poly, p, 8, 8, 20);
127 VDUP(vector2, , poly, p, 16, 4, 30);
128 VDUP(vector2, q, int, s, 8, 16, -10);
129 VDUP(vector2, q, int, s, 16, 8, -20);
130 VDUP(vector2, q, int, s, 32, 4, -30);
131 VDUP(vector2, q, int, s, 64, 2, 24);
132 VDUP(vector2, q, uint, u, 8, 16, 12);
133 VDUP(vector2, q, uint, u, 16, 8, 3);
134 VDUP(vector2, q, uint, u, 32, 4, 55);
135 VDUP(vector2, q, uint, u, 64, 2, 3);
136 VDUP(vector2, q, poly, p, 8, 16, 12);
137 VDUP(vector2, q, poly, p, 16, 8, 3);
139 /* Use maximum allowed shift amount. */
140 TEST_VSXI_N(INSN_NAME, , int, s, 8, 8, 7);
141 TEST_VSXI_N(INSN_NAME, , int, s, 16, 4, 15);
142 TEST_VSXI_N(INSN_NAME, , int, s, 32, 2, 31);
143 TEST_VSXI_N(INSN_NAME, , int, s, 64, 1, 63);
144 TEST_VSXI_N(INSN_NAME, , uint, u, 8, 8, 7);
145 TEST_VSXI_N(INSN_NAME, , uint, u, 16, 4, 15);
146 TEST_VSXI_N(INSN_NAME, , uint, u, 32, 2, 31);
147 TEST_VSXI_N(INSN_NAME, , uint, u, 64, 1, 63);
148 TEST_VSXI_N(INSN_NAME, , poly, p, 8, 8, 7);
149 TEST_VSXI_N(INSN_NAME, , poly, p, 16, 4, 15);
150 TEST_VSXI_N(INSN_NAME, q, int, s, 8, 16, 7);
151 TEST_VSXI_N(INSN_NAME, q, int, s, 16, 8, 15);
152 TEST_VSXI_N(INSN_NAME, q, int, s, 32, 4, 31);
153 TEST_VSXI_N(INSN_NAME, q, int, s, 64, 2, 63);
154 TEST_VSXI_N(INSN_NAME, q, uint, u, 8, 16, 7);
155 TEST_VSXI_N(INSN_NAME, q, uint, u, 16, 8, 15);
156 TEST_VSXI_N(INSN_NAME, q, uint, u, 32, 4, 31);
157 TEST_VSXI_N(INSN_NAME, q, uint, u, 64, 2, 63);
158 TEST_VSXI_N(INSN_NAME, q, poly, p, 8, 16, 7);
159 TEST_VSXI_N(INSN_NAME, q, poly, p, 16, 8, 15);
161 CHECK_RESULTS_NAMED (TEST_MSG, expected_max_shift, "(max shift amount)");