1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
47 /* Each optab contains info on how this target machine
48 can perform a particular operation
49 for all sizes and kinds of operands.
51 The operation to be performed is often specified
52 by passing one of these optabs as an argument.
54 See expr.h for documentation of these optabs. */
56 optab optab_table
[OTI_MAX
];
58 rtx libfunc_table
[LTI_MAX
];
60 /* Tables of patterns for extending one integer mode to another. */
61 enum insn_code extendtab
[MAX_MACHINE_MODE
][MAX_MACHINE_MODE
][2];
63 /* Tables of patterns for converting between fixed and floating point. */
64 enum insn_code fixtab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
65 enum insn_code fixtrunctab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
66 enum insn_code floattab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
68 /* Contains the optab used for each rtx code. */
69 optab code_to_optab
[NUM_RTX_CODE
+ 1];
71 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
72 gives the gen_function to make a branch to test that condition. */
74 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
76 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
77 gives the insn code to make a store-condition insn
78 to test that condition. */
80 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
82 #ifdef HAVE_conditional_move
83 /* Indexed by the machine mode, gives the insn code to make a conditional
84 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
85 setcc_gen_code to cut down on the number of named patterns. Consider a day
86 when a lot more rtx codes are conditional (eg: for the ARM). */
88 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
91 /* The insn generating function can not take an rtx_code argument.
92 TRAP_RTX is used as an rtx argument. Its code is replaced with
93 the code to be used in the trap insn and all other fields are ignored. */
94 static GTY(()) rtx trap_rtx
;
96 static int add_equal_note
PARAMS ((rtx
, rtx
, enum rtx_code
, rtx
, rtx
));
97 static rtx widen_operand
PARAMS ((rtx
, enum machine_mode
,
98 enum machine_mode
, int, int));
99 static int expand_cmplxdiv_straight
PARAMS ((rtx
, rtx
, rtx
, rtx
,
100 rtx
, rtx
, enum machine_mode
,
101 int, enum optab_methods
,
102 enum mode_class
, optab
));
103 static int expand_cmplxdiv_wide
PARAMS ((rtx
, rtx
, rtx
, rtx
,
104 rtx
, rtx
, enum machine_mode
,
105 int, enum optab_methods
,
106 enum mode_class
, optab
));
107 static void prepare_cmp_insn
PARAMS ((rtx
*, rtx
*, enum rtx_code
*, rtx
,
108 enum machine_mode
*, int *,
109 enum can_compare_purpose
));
110 static enum insn_code can_fix_p
PARAMS ((enum machine_mode
, enum machine_mode
,
112 static enum insn_code can_float_p
PARAMS ((enum machine_mode
,
115 static rtx ftruncify
PARAMS ((rtx
));
116 static optab new_optab
PARAMS ((void));
117 static inline optab init_optab
PARAMS ((enum rtx_code
));
118 static inline optab init_optabv
PARAMS ((enum rtx_code
));
119 static void init_libfuncs
PARAMS ((optab
, int, int, const char *, int));
120 static void init_integral_libfuncs
PARAMS ((optab
, const char *, int));
121 static void init_floating_libfuncs
PARAMS ((optab
, const char *, int));
122 static void emit_cmp_and_jump_insn_1
PARAMS ((rtx
, rtx
, enum machine_mode
,
123 enum rtx_code
, int, rtx
));
124 static void prepare_float_lib_cmp
PARAMS ((rtx
*, rtx
*, enum rtx_code
*,
125 enum machine_mode
*, int *));
126 static rtx expand_vector_binop
PARAMS ((enum machine_mode
, optab
,
128 enum optab_methods
));
129 static rtx expand_vector_unop
PARAMS ((enum machine_mode
, optab
, rtx
, rtx
,
131 static rtx widen_clz
PARAMS ((enum machine_mode
, rtx
, rtx
));
132 static rtx expand_parity
PARAMS ((enum machine_mode
, rtx
, rtx
));
134 #ifndef HAVE_conditional_trap
135 #define HAVE_conditional_trap 0
136 #define gen_conditional_trap(a,b) (abort (), NULL_RTX)
139 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
140 the result of operation CODE applied to OP0 (and OP1 if it is a binary
143 If the last insn does not set TARGET, don't do anything, but return 1.
145 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
146 don't add the REG_EQUAL note but return 0. Our caller can then try
147 again, ensuring that TARGET is not one of the operands. */
150 add_equal_note (insns
, target
, code
, op0
, op1
)
156 rtx last_insn
, insn
, set
;
161 || NEXT_INSN (insns
) == NULL_RTX
)
164 if (GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
165 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
168 if (GET_CODE (target
) == ZERO_EXTRACT
)
171 for (last_insn
= insns
;
172 NEXT_INSN (last_insn
) != NULL_RTX
;
173 last_insn
= NEXT_INSN (last_insn
))
176 set
= single_set (last_insn
);
180 if (! rtx_equal_p (SET_DEST (set
), target
)
181 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
182 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
183 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
186 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
187 besides the last insn. */
188 if (reg_overlap_mentioned_p (target
, op0
)
189 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
191 insn
= PREV_INSN (last_insn
);
192 while (insn
!= NULL_RTX
)
194 if (reg_set_p (target
, insn
))
197 insn
= PREV_INSN (insn
);
201 if (GET_RTX_CLASS (code
) == '1')
202 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
204 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
206 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
211 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
212 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
213 not actually do a sign-extend or zero-extend, but can leave the
214 higher-order bits of the result rtx undefined, for example, in the case
215 of logical operations, but not right shifts. */
218 widen_operand (op
, mode
, oldmode
, unsignedp
, no_extend
)
220 enum machine_mode mode
, oldmode
;
226 /* If we don't have to extend and this is a constant, return it. */
227 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
230 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
231 extend since it will be more efficient to do so unless the signedness of
232 a promoted object differs from our extension. */
234 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
235 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
236 return convert_modes (mode
, oldmode
, op
, unsignedp
);
238 /* If MODE is no wider than a single word, we return a paradoxical
240 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
241 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
243 /* Otherwise, get an object of MODE, clobber it, and set the low-order
246 result
= gen_reg_rtx (mode
);
247 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
248 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
252 /* Generate code to perform a straightforward complex divide. */
255 expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
256 unsignedp
, methods
, class, binoptab
)
257 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
258 enum machine_mode submode
;
260 enum optab_methods methods
;
261 enum mode_class
class;
268 optab this_add_optab
= add_optab
;
269 optab this_sub_optab
= sub_optab
;
270 optab this_neg_optab
= neg_optab
;
271 optab this_mul_optab
= smul_optab
;
273 if (binoptab
== sdivv_optab
)
275 this_add_optab
= addv_optab
;
276 this_sub_optab
= subv_optab
;
277 this_neg_optab
= negv_optab
;
278 this_mul_optab
= smulv_optab
;
281 /* Don't fetch these from memory more than once. */
282 real0
= force_reg (submode
, real0
);
283 real1
= force_reg (submode
, real1
);
286 imag0
= force_reg (submode
, imag0
);
288 imag1
= force_reg (submode
, imag1
);
290 /* Divisor: c*c + d*d. */
291 temp1
= expand_binop (submode
, this_mul_optab
, real1
, real1
,
292 NULL_RTX
, unsignedp
, methods
);
294 temp2
= expand_binop (submode
, this_mul_optab
, imag1
, imag1
,
295 NULL_RTX
, unsignedp
, methods
);
297 if (temp1
== 0 || temp2
== 0)
300 divisor
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
301 NULL_RTX
, unsignedp
, methods
);
307 /* Mathematically, ((a)(c-id))/divisor. */
308 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
310 /* Calculate the dividend. */
311 real_t
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
312 NULL_RTX
, unsignedp
, methods
);
314 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
315 NULL_RTX
, unsignedp
, methods
);
317 if (real_t
== 0 || imag_t
== 0)
320 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
321 NULL_RTX
, unsignedp
);
325 /* Mathematically, ((a+ib)(c-id))/divider. */
326 /* Calculate the dividend. */
327 temp1
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
328 NULL_RTX
, unsignedp
, methods
);
330 temp2
= expand_binop (submode
, this_mul_optab
, imag0
, imag1
,
331 NULL_RTX
, unsignedp
, methods
);
333 if (temp1
== 0 || temp2
== 0)
336 real_t
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
337 NULL_RTX
, unsignedp
, methods
);
339 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, real1
,
340 NULL_RTX
, unsignedp
, methods
);
342 temp2
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
343 NULL_RTX
, unsignedp
, methods
);
345 if (temp1
== 0 || temp2
== 0)
348 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, temp2
,
349 NULL_RTX
, unsignedp
, methods
);
351 if (real_t
== 0 || imag_t
== 0)
355 if (class == MODE_COMPLEX_FLOAT
)
356 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
357 realr
, unsignedp
, methods
);
359 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
360 real_t
, divisor
, realr
, unsignedp
);
366 emit_move_insn (realr
, res
);
368 if (class == MODE_COMPLEX_FLOAT
)
369 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
370 imagr
, unsignedp
, methods
);
372 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
373 imag_t
, divisor
, imagr
, unsignedp
);
379 emit_move_insn (imagr
, res
);
384 /* Generate code to perform a wide-input-range-acceptable complex divide. */
387 expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
388 unsignedp
, methods
, class, binoptab
)
389 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
390 enum machine_mode submode
;
392 enum optab_methods methods
;
393 enum mode_class
class;
398 rtx temp1
, temp2
, lab1
, lab2
;
399 enum machine_mode mode
;
401 optab this_add_optab
= add_optab
;
402 optab this_sub_optab
= sub_optab
;
403 optab this_neg_optab
= neg_optab
;
404 optab this_mul_optab
= smul_optab
;
406 if (binoptab
== sdivv_optab
)
408 this_add_optab
= addv_optab
;
409 this_sub_optab
= subv_optab
;
410 this_neg_optab
= negv_optab
;
411 this_mul_optab
= smulv_optab
;
414 /* Don't fetch these from memory more than once. */
415 real0
= force_reg (submode
, real0
);
416 real1
= force_reg (submode
, real1
);
419 imag0
= force_reg (submode
, imag0
);
421 imag1
= force_reg (submode
, imag1
);
423 /* XXX What's an "unsigned" complex number? */
431 temp1
= expand_abs (submode
, real1
, NULL_RTX
, unsignedp
, 1);
432 temp2
= expand_abs (submode
, imag1
, NULL_RTX
, unsignedp
, 1);
435 if (temp1
== 0 || temp2
== 0)
438 mode
= GET_MODE (temp1
);
439 lab1
= gen_label_rtx ();
440 emit_cmp_and_jump_insns (temp1
, temp2
, LT
, NULL_RTX
,
441 mode
, unsignedp
, lab1
);
443 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
445 if (class == MODE_COMPLEX_FLOAT
)
446 ratio
= expand_binop (submode
, binoptab
, imag1
, real1
,
447 NULL_RTX
, unsignedp
, methods
);
449 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
450 imag1
, real1
, NULL_RTX
, unsignedp
);
455 /* Calculate divisor. */
457 temp1
= expand_binop (submode
, this_mul_optab
, imag1
, ratio
,
458 NULL_RTX
, unsignedp
, methods
);
463 divisor
= expand_binop (submode
, this_add_optab
, temp1
, real1
,
464 NULL_RTX
, unsignedp
, methods
);
469 /* Calculate dividend. */
475 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
477 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
478 NULL_RTX
, unsignedp
, methods
);
483 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
484 NULL_RTX
, unsignedp
);
486 if (real_t
== 0 || imag_t
== 0)
491 /* Compute (a+ib)/(c+id) as
492 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
494 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
495 NULL_RTX
, unsignedp
, methods
);
500 real_t
= expand_binop (submode
, this_add_optab
, temp1
, real0
,
501 NULL_RTX
, unsignedp
, methods
);
503 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
504 NULL_RTX
, unsignedp
, methods
);
509 imag_t
= expand_binop (submode
, this_sub_optab
, imag0
, temp1
,
510 NULL_RTX
, unsignedp
, methods
);
512 if (real_t
== 0 || imag_t
== 0)
516 if (class == MODE_COMPLEX_FLOAT
)
517 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
518 realr
, unsignedp
, methods
);
520 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
521 real_t
, divisor
, realr
, unsignedp
);
527 emit_move_insn (realr
, res
);
529 if (class == MODE_COMPLEX_FLOAT
)
530 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
531 imagr
, unsignedp
, methods
);
533 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
534 imag_t
, divisor
, imagr
, unsignedp
);
540 emit_move_insn (imagr
, res
);
542 lab2
= gen_label_rtx ();
543 emit_jump_insn (gen_jump (lab2
));
548 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
550 if (class == MODE_COMPLEX_FLOAT
)
551 ratio
= expand_binop (submode
, binoptab
, real1
, imag1
,
552 NULL_RTX
, unsignedp
, methods
);
554 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
555 real1
, imag1
, NULL_RTX
, unsignedp
);
560 /* Calculate divisor. */
562 temp1
= expand_binop (submode
, this_mul_optab
, real1
, ratio
,
563 NULL_RTX
, unsignedp
, methods
);
568 divisor
= expand_binop (submode
, this_add_optab
, temp1
, imag1
,
569 NULL_RTX
, unsignedp
, methods
);
574 /* Calculate dividend. */
578 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
580 real_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
581 NULL_RTX
, unsignedp
, methods
);
583 imag_t
= expand_unop (submode
, this_neg_optab
, real0
,
584 NULL_RTX
, unsignedp
);
586 if (real_t
== 0 || imag_t
== 0)
591 /* Compute (a+ib)/(c+id) as
592 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
594 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
595 NULL_RTX
, unsignedp
, methods
);
600 real_t
= expand_binop (submode
, this_add_optab
, temp1
, imag0
,
601 NULL_RTX
, unsignedp
, methods
);
603 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
604 NULL_RTX
, unsignedp
, methods
);
609 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, real0
,
610 NULL_RTX
, unsignedp
, methods
);
612 if (real_t
== 0 || imag_t
== 0)
616 if (class == MODE_COMPLEX_FLOAT
)
617 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
618 realr
, unsignedp
, methods
);
620 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
621 real_t
, divisor
, realr
, unsignedp
);
627 emit_move_insn (realr
, res
);
629 if (class == MODE_COMPLEX_FLOAT
)
630 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
631 imagr
, unsignedp
, methods
);
633 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
634 imag_t
, divisor
, imagr
, unsignedp
);
640 emit_move_insn (imagr
, res
);
647 /* Wrapper around expand_binop which takes an rtx code to specify
648 the operation to perform, not an optab pointer. All other
649 arguments are the same. */
651 expand_simple_binop (mode
, code
, op0
, op1
, target
, unsignedp
, methods
)
652 enum machine_mode mode
;
657 enum optab_methods methods
;
659 optab binop
= code_to_optab
[(int) code
];
663 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
666 /* Generate code to perform an operation specified by BINOPTAB
667 on operands OP0 and OP1, with result having machine-mode MODE.
669 UNSIGNEDP is for the case where we have to widen the operands
670 to perform the operation. It says to use zero-extension.
672 If TARGET is nonzero, the value
673 is generated there, if it is convenient to do so.
674 In all cases an rtx is returned for the locus of the value;
675 this may or may not be TARGET. */
678 expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
679 enum machine_mode mode
;
684 enum optab_methods methods
;
686 enum optab_methods next_methods
687 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
688 ? OPTAB_WIDEN
: methods
);
689 enum mode_class
class;
690 enum machine_mode wider_mode
;
692 int commutative_op
= 0;
693 int shift_op
= (binoptab
->code
== ASHIFT
694 || binoptab
->code
== ASHIFTRT
695 || binoptab
->code
== LSHIFTRT
696 || binoptab
->code
== ROTATE
697 || binoptab
->code
== ROTATERT
);
698 rtx entry_last
= get_last_insn ();
701 class = GET_MODE_CLASS (mode
);
703 op0
= protect_from_queue (op0
, 0);
704 op1
= protect_from_queue (op1
, 0);
706 target
= protect_from_queue (target
, 1);
710 /* Load duplicate non-volatile operands once. */
711 if (rtx_equal_p (op0
, op1
) && ! volatile_refs_p (op0
))
713 op0
= force_not_mem (op0
);
718 op0
= force_not_mem (op0
);
719 op1
= force_not_mem (op1
);
723 /* If subtracting an integer constant, convert this into an addition of
724 the negated constant. */
726 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
728 op1
= negate_rtx (mode
, op1
);
729 binoptab
= add_optab
;
732 /* If we are inside an appropriately-short loop and one operand is an
733 expensive constant, force it into a register. */
734 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
735 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
736 op0
= force_reg (mode
, op0
);
738 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
739 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
740 op1
= force_reg (mode
, op1
);
742 /* Record where to delete back to if we backtrack. */
743 last
= get_last_insn ();
745 /* If operation is commutative,
746 try to make the first operand a register.
747 Even better, try to make it the same as the target.
748 Also try to make the last operand a constant. */
749 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
750 || binoptab
== smul_widen_optab
751 || binoptab
== umul_widen_optab
752 || binoptab
== smul_highpart_optab
753 || binoptab
== umul_highpart_optab
)
757 if (((target
== 0 || GET_CODE (target
) == REG
)
758 ? ((GET_CODE (op1
) == REG
759 && GET_CODE (op0
) != REG
)
761 : rtx_equal_p (op1
, target
))
762 || GET_CODE (op0
) == CONST_INT
)
770 /* If we can do it with a three-operand insn, do so. */
772 if (methods
!= OPTAB_MUST_WIDEN
773 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
775 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
776 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
777 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
779 rtx xop0
= op0
, xop1
= op1
;
784 temp
= gen_reg_rtx (mode
);
786 /* If it is a commutative operator and the modes would match
787 if we would swap the operands, we can save the conversions. */
790 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
791 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
795 tmp
= op0
; op0
= op1
; op1
= tmp
;
796 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
800 /* In case the insn wants input operands in modes different from
801 those of the actual operands, convert the operands. It would
802 seem that we don't need to convert CONST_INTs, but we do, so
803 that they're properly zero-extended, sign-extended or truncated
806 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
807 xop0
= convert_modes (mode0
,
808 GET_MODE (op0
) != VOIDmode
813 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
814 xop1
= convert_modes (mode1
,
815 GET_MODE (op1
) != VOIDmode
820 /* Now, if insn's predicates don't allow our operands, put them into
823 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
)
824 && mode0
!= VOIDmode
)
825 xop0
= copy_to_mode_reg (mode0
, xop0
);
827 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
)
828 && mode1
!= VOIDmode
)
829 xop1
= copy_to_mode_reg (mode1
, xop1
);
831 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
832 temp
= gen_reg_rtx (mode
);
834 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
837 /* If PAT is composed of more than one insn, try to add an appropriate
838 REG_EQUAL note to it. If we can't because TEMP conflicts with an
839 operand, call ourselves again, this time without a target. */
840 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
841 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
843 delete_insns_since (last
);
844 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
852 delete_insns_since (last
);
855 /* If this is a multiply, see if we can do a widening operation that
856 takes operands of this mode and makes a wider mode. */
858 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
859 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
860 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
861 != CODE_FOR_nothing
))
863 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
864 unsignedp
? umul_widen_optab
: smul_widen_optab
,
865 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
869 if (GET_MODE_CLASS (mode
) == MODE_INT
)
870 return gen_lowpart (mode
, temp
);
872 return convert_to_mode (mode
, temp
, unsignedp
);
876 /* Look for a wider mode of the same class for which we think we
877 can open-code the operation. Check for a widening multiply at the
878 wider mode as well. */
880 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
881 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
882 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
883 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
885 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
886 || (binoptab
== smul_optab
887 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
888 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
889 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
890 != CODE_FOR_nothing
)))
892 rtx xop0
= op0
, xop1
= op1
;
895 /* For certain integer operations, we need not actually extend
896 the narrow operands, as long as we will truncate
897 the results to the same narrowness. */
899 if ((binoptab
== ior_optab
|| binoptab
== and_optab
900 || binoptab
== xor_optab
901 || binoptab
== add_optab
|| binoptab
== sub_optab
902 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
903 && class == MODE_INT
)
906 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
908 /* The second operand of a shift must always be extended. */
909 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
910 no_extend
&& binoptab
!= ashl_optab
);
912 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
913 unsignedp
, OPTAB_DIRECT
);
916 if (class != MODE_INT
)
919 target
= gen_reg_rtx (mode
);
920 convert_move (target
, temp
, 0);
924 return gen_lowpart (mode
, temp
);
927 delete_insns_since (last
);
931 /* These can be done a word at a time. */
932 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
934 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
935 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
941 /* If TARGET is the same as one of the operands, the REG_EQUAL note
942 won't be accurate, so use a new target. */
943 if (target
== 0 || target
== op0
|| target
== op1
)
944 target
= gen_reg_rtx (mode
);
948 /* Do the actual arithmetic. */
949 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
951 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
952 rtx x
= expand_binop (word_mode
, binoptab
,
953 operand_subword_force (op0
, i
, mode
),
954 operand_subword_force (op1
, i
, mode
),
955 target_piece
, unsignedp
, next_methods
);
960 if (target_piece
!= x
)
961 emit_move_insn (target_piece
, x
);
964 insns
= get_insns ();
967 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
969 if (binoptab
->code
!= UNKNOWN
)
971 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
972 copy_rtx (op0
), copy_rtx (op1
));
976 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
981 /* Synthesize double word shifts from single word shifts. */
982 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
983 || binoptab
== ashr_optab
)
985 && GET_CODE (op1
) == CONST_INT
986 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
987 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
988 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
989 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
991 rtx insns
, inter
, equiv_value
;
992 rtx into_target
, outof_target
;
993 rtx into_input
, outof_input
;
994 int shift_count
, left_shift
, outof_word
;
996 /* If TARGET is the same as one of the operands, the REG_EQUAL note
997 won't be accurate, so use a new target. */
998 if (target
== 0 || target
== op0
|| target
== op1
)
999 target
= gen_reg_rtx (mode
);
1003 shift_count
= INTVAL (op1
);
1005 /* OUTOF_* is the word we are shifting bits away from, and
1006 INTO_* is the word that we are shifting bits towards, thus
1007 they differ depending on the direction of the shift and
1008 WORDS_BIG_ENDIAN. */
1010 left_shift
= binoptab
== ashl_optab
;
1011 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1013 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1014 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1016 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1017 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1019 if (shift_count
>= BITS_PER_WORD
)
1021 inter
= expand_binop (word_mode
, binoptab
,
1023 GEN_INT (shift_count
- BITS_PER_WORD
),
1024 into_target
, unsignedp
, next_methods
);
1026 if (inter
!= 0 && inter
!= into_target
)
1027 emit_move_insn (into_target
, inter
);
1029 /* For a signed right shift, we must fill the word we are shifting
1030 out of with copies of the sign bit. Otherwise it is zeroed. */
1031 if (inter
!= 0 && binoptab
!= ashr_optab
)
1032 inter
= CONST0_RTX (word_mode
);
1033 else if (inter
!= 0)
1034 inter
= expand_binop (word_mode
, binoptab
,
1036 GEN_INT (BITS_PER_WORD
- 1),
1037 outof_target
, unsignedp
, next_methods
);
1039 if (inter
!= 0 && inter
!= outof_target
)
1040 emit_move_insn (outof_target
, inter
);
1045 optab reverse_unsigned_shift
, unsigned_shift
;
1047 /* For a shift of less then BITS_PER_WORD, to compute the carry,
1048 we must do a logical shift in the opposite direction of the
1051 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
1053 /* For a shift of less than BITS_PER_WORD, to compute the word
1054 shifted towards, we need to unsigned shift the orig value of
1057 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
1059 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
1061 GEN_INT (BITS_PER_WORD
- shift_count
),
1062 0, unsignedp
, next_methods
);
1067 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
1068 op1
, 0, unsignedp
, next_methods
);
1071 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
1072 into_target
, unsignedp
, next_methods
);
1074 if (inter
!= 0 && inter
!= into_target
)
1075 emit_move_insn (into_target
, inter
);
1078 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
1079 op1
, outof_target
, unsignedp
, next_methods
);
1081 if (inter
!= 0 && inter
!= outof_target
)
1082 emit_move_insn (outof_target
, inter
);
1085 insns
= get_insns ();
1090 if (binoptab
->code
!= UNKNOWN
)
1091 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1095 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1100 /* Synthesize double word rotates from single word shifts. */
1101 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1102 && class == MODE_INT
1103 && GET_CODE (op1
) == CONST_INT
1104 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1105 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1106 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1108 rtx insns
, equiv_value
;
1109 rtx into_target
, outof_target
;
1110 rtx into_input
, outof_input
;
1112 int shift_count
, left_shift
, outof_word
;
1114 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1115 won't be accurate, so use a new target. */
1116 if (target
== 0 || target
== op0
|| target
== op1
)
1117 target
= gen_reg_rtx (mode
);
1121 shift_count
= INTVAL (op1
);
1123 /* OUTOF_* is the word we are shifting bits away from, and
1124 INTO_* is the word that we are shifting bits towards, thus
1125 they differ depending on the direction of the shift and
1126 WORDS_BIG_ENDIAN. */
1128 left_shift
= (binoptab
== rotl_optab
);
1129 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1131 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1132 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1134 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1135 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1137 if (shift_count
== BITS_PER_WORD
)
1139 /* This is just a word swap. */
1140 emit_move_insn (outof_target
, into_input
);
1141 emit_move_insn (into_target
, outof_input
);
1146 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1147 rtx first_shift_count
, second_shift_count
;
1148 optab reverse_unsigned_shift
, unsigned_shift
;
1150 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1151 ? lshr_optab
: ashl_optab
);
1153 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1154 ? ashl_optab
: lshr_optab
);
1156 if (shift_count
> BITS_PER_WORD
)
1158 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1159 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1163 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1164 second_shift_count
= GEN_INT (shift_count
);
1167 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1168 outof_input
, first_shift_count
,
1169 NULL_RTX
, unsignedp
, next_methods
);
1170 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1171 into_input
, second_shift_count
,
1172 NULL_RTX
, unsignedp
, next_methods
);
1174 if (into_temp1
!= 0 && into_temp2
!= 0)
1175 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1176 into_target
, unsignedp
, next_methods
);
1180 if (inter
!= 0 && inter
!= into_target
)
1181 emit_move_insn (into_target
, inter
);
1183 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1184 into_input
, first_shift_count
,
1185 NULL_RTX
, unsignedp
, next_methods
);
1186 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1187 outof_input
, second_shift_count
,
1188 NULL_RTX
, unsignedp
, next_methods
);
1190 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1191 inter
= expand_binop (word_mode
, ior_optab
,
1192 outof_temp1
, outof_temp2
,
1193 outof_target
, unsignedp
, next_methods
);
1195 if (inter
!= 0 && inter
!= outof_target
)
1196 emit_move_insn (outof_target
, inter
);
1199 insns
= get_insns ();
1204 if (binoptab
->code
!= UNKNOWN
)
1205 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1209 /* We can't make this a no conflict block if this is a word swap,
1210 because the word swap case fails if the input and output values
1211 are in the same register. */
1212 if (shift_count
!= BITS_PER_WORD
)
1213 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1222 /* These can be done a word at a time by propagating carries. */
1223 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1224 && class == MODE_INT
1225 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1226 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1229 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1230 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1231 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1232 rtx xop0
, xop1
, xtarget
;
1234 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1235 value is one of those, use it. Otherwise, use 1 since it is the
1236 one easiest to get. */
1237 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1238 int normalizep
= STORE_FLAG_VALUE
;
1243 /* Prepare the operands. */
1244 xop0
= force_reg (mode
, op0
);
1245 xop1
= force_reg (mode
, op1
);
1247 xtarget
= gen_reg_rtx (mode
);
1249 if (target
== 0 || GET_CODE (target
) != REG
)
1252 /* Indicate for flow that the entire target reg is being set. */
1253 if (GET_CODE (target
) == REG
)
1254 emit_insn (gen_rtx_CLOBBER (VOIDmode
, xtarget
));
1256 /* Do the actual arithmetic. */
1257 for (i
= 0; i
< nwords
; i
++)
1259 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1260 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1261 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1262 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1265 /* Main add/subtract of the input operands. */
1266 x
= expand_binop (word_mode
, binoptab
,
1267 op0_piece
, op1_piece
,
1268 target_piece
, unsignedp
, next_methods
);
1274 /* Store carry from main add/subtract. */
1275 carry_out
= gen_reg_rtx (word_mode
);
1276 carry_out
= emit_store_flag_force (carry_out
,
1277 (binoptab
== add_optab
1280 word_mode
, 1, normalizep
);
1287 /* Add/subtract previous carry to main result. */
1288 newx
= expand_binop (word_mode
,
1289 normalizep
== 1 ? binoptab
: otheroptab
,
1291 NULL_RTX
, 1, next_methods
);
1295 /* Get out carry from adding/subtracting carry in. */
1296 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1297 carry_tmp
= emit_store_flag_force (carry_tmp
,
1298 (binoptab
== add_optab
1301 word_mode
, 1, normalizep
);
1303 /* Logical-ior the two poss. carry together. */
1304 carry_out
= expand_binop (word_mode
, ior_optab
,
1305 carry_out
, carry_tmp
,
1306 carry_out
, 0, next_methods
);
1310 emit_move_insn (target_piece
, newx
);
1313 carry_in
= carry_out
;
1316 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
1318 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
1319 || ! rtx_equal_p (target
, xtarget
))
1321 rtx temp
= emit_move_insn (target
, xtarget
);
1323 set_unique_reg_note (temp
,
1325 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1336 delete_insns_since (last
);
1339 /* If we want to multiply two two-word values and have normal and widening
1340 multiplies of single-word values, we can do this with three smaller
1341 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1342 because we are not operating on one word at a time.
1344 The multiplication proceeds as follows:
1345 _______________________
1346 [__op0_high_|__op0_low__]
1347 _______________________
1348 * [__op1_high_|__op1_low__]
1349 _______________________________________________
1350 _______________________
1351 (1) [__op0_low__*__op1_low__]
1352 _______________________
1353 (2a) [__op0_low__*__op1_high_]
1354 _______________________
1355 (2b) [__op0_high_*__op1_low__]
1356 _______________________
1357 (3) [__op0_high_*__op1_high_]
1360 This gives a 4-word result. Since we are only interested in the
1361 lower 2 words, partial result (3) and the upper words of (2a) and
1362 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1363 calculated using non-widening multiplication.
1365 (1), however, needs to be calculated with an unsigned widening
1366 multiplication. If this operation is not directly supported we
1367 try using a signed widening multiplication and adjust the result.
1368 This adjustment works as follows:
1370 If both operands are positive then no adjustment is needed.
1372 If the operands have different signs, for example op0_low < 0 and
1373 op1_low >= 0, the instruction treats the most significant bit of
1374 op0_low as a sign bit instead of a bit with significance
1375 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1376 with 2**BITS_PER_WORD - op0_low, and two's complements the
1377 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1380 Similarly, if both operands are negative, we need to add
1381 (op0_low + op1_low) * 2**BITS_PER_WORD.
1383 We use a trick to adjust quickly. We logically shift op0_low right
1384 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1385 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1386 logical shift exists, we do an arithmetic right shift and subtract
1389 if (binoptab
== smul_optab
1390 && class == MODE_INT
1391 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1392 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1393 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1394 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1395 != CODE_FOR_nothing
)
1396 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1397 != CODE_FOR_nothing
)))
1399 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1400 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1401 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1402 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1403 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1404 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1406 rtx op0_xhigh
= NULL_RTX
;
1407 rtx op1_xhigh
= NULL_RTX
;
1409 /* If the target is the same as one of the inputs, don't use it. This
1410 prevents problems with the REG_EQUAL note. */
1411 if (target
== op0
|| target
== op1
1412 || (target
!= 0 && GET_CODE (target
) != REG
))
1415 /* Multiply the two lower words to get a double-word product.
1416 If unsigned widening multiplication is available, use that;
1417 otherwise use the signed form and compensate. */
1419 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1421 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1422 target
, 1, OPTAB_DIRECT
);
1424 /* If we didn't succeed, delete everything we did so far. */
1426 delete_insns_since (last
);
1428 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1432 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1433 != CODE_FOR_nothing
)
1435 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1436 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1437 target
, 1, OPTAB_DIRECT
);
1438 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1439 NULL_RTX
, 1, next_methods
);
1441 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1442 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1445 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1446 NULL_RTX
, 0, next_methods
);
1448 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1449 op0_xhigh
, op0_xhigh
, 0,
1453 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1454 NULL_RTX
, 1, next_methods
);
1456 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1457 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1460 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1461 NULL_RTX
, 0, next_methods
);
1463 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1464 op1_xhigh
, op1_xhigh
, 0,
1469 /* If we have been able to directly compute the product of the
1470 low-order words of the operands and perform any required adjustments
1471 of the operands, we proceed by trying two more multiplications
1472 and then computing the appropriate sum.
1474 We have checked above that the required addition is provided.
1475 Full-word addition will normally always succeed, especially if
1476 it is provided at all, so we don't worry about its failure. The
1477 multiplication may well fail, however, so we do handle that. */
1479 if (product
&& op0_xhigh
&& op1_xhigh
)
1481 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1482 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1483 NULL_RTX
, 0, OPTAB_DIRECT
);
1485 if (!REG_P (product_high
))
1486 product_high
= force_reg (word_mode
, product_high
);
1489 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1490 product_high
, 0, next_methods
);
1492 if (temp
!= 0 && temp
!= product_high
)
1493 emit_move_insn (product_high
, temp
);
1496 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1497 NULL_RTX
, 0, OPTAB_DIRECT
);
1500 temp
= expand_binop (word_mode
, add_optab
, temp
,
1501 product_high
, product_high
,
1504 if (temp
!= 0 && temp
!= product_high
)
1505 emit_move_insn (product_high
, temp
);
1507 emit_move_insn (operand_subword (product
, high
, 1, mode
), product_high
);
1511 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1513 temp
= emit_move_insn (product
, product
);
1514 set_unique_reg_note (temp
,
1516 gen_rtx_fmt_ee (MULT
, mode
,
1525 /* If we get here, we couldn't do it for some reason even though we
1526 originally thought we could. Delete anything we've emitted in
1529 delete_insns_since (last
);
1532 /* Open-code the vector operations if we have no hardware support
1534 if (class == MODE_VECTOR_INT
|| class == MODE_VECTOR_FLOAT
)
1535 return expand_vector_binop (mode
, binoptab
, op0
, op1
, target
,
1536 unsignedp
, methods
);
1538 /* We need to open-code the complex type operations: '+, -, * and /' */
1540 /* At this point we allow operations between two similar complex
1541 numbers, and also if one of the operands is not a complex number
1542 but rather of MODE_FLOAT or MODE_INT. However, the caller
1543 must make sure that the MODE of the non-complex operand matches
1544 the SUBMODE of the complex operand. */
1546 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1548 rtx real0
= 0, imag0
= 0;
1549 rtx real1
= 0, imag1
= 0;
1550 rtx realr
, imagr
, res
;
1555 /* Find the correct mode for the real and imaginary parts */
1556 enum machine_mode submode
= GET_MODE_INNER(mode
);
1558 if (submode
== BLKmode
)
1562 target
= gen_reg_rtx (mode
);
1566 realr
= gen_realpart (submode
, target
);
1567 imagr
= gen_imagpart (submode
, target
);
1569 if (GET_MODE (op0
) == mode
)
1571 real0
= gen_realpart (submode
, op0
);
1572 imag0
= gen_imagpart (submode
, op0
);
1577 if (GET_MODE (op1
) == mode
)
1579 real1
= gen_realpart (submode
, op1
);
1580 imag1
= gen_imagpart (submode
, op1
);
1585 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0 || imag1
!= 0))
1588 switch (binoptab
->code
)
1591 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1593 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1594 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1595 realr
, unsignedp
, methods
);
1599 else if (res
!= realr
)
1600 emit_move_insn (realr
, res
);
1602 if (imag0
!= 0 && imag1
!= 0)
1603 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1604 imagr
, unsignedp
, methods
);
1605 else if (imag0
!= 0)
1607 else if (binoptab
->code
== MINUS
)
1608 res
= expand_unop (submode
,
1609 binoptab
== subv_optab
? negv_optab
: neg_optab
,
1610 imag1
, imagr
, unsignedp
);
1616 else if (res
!= imagr
)
1617 emit_move_insn (imagr
, res
);
1623 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1625 if (imag0
!= 0 && imag1
!= 0)
1629 /* Don't fetch these from memory more than once. */
1630 real0
= force_reg (submode
, real0
);
1631 real1
= force_reg (submode
, real1
);
1632 imag0
= force_reg (submode
, imag0
);
1633 imag1
= force_reg (submode
, imag1
);
1635 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1636 unsignedp
, methods
);
1638 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1639 unsignedp
, methods
);
1641 if (temp1
== 0 || temp2
== 0)
1646 binoptab
== smulv_optab
? subv_optab
: sub_optab
,
1647 temp1
, temp2
, realr
, unsignedp
, methods
));
1651 else if (res
!= realr
)
1652 emit_move_insn (realr
, res
);
1654 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1655 NULL_RTX
, unsignedp
, methods
);
1657 /* Avoid expanding redundant multiplication for the common
1658 case of squaring a complex number. */
1659 if (rtx_equal_p (real0
, real1
) && rtx_equal_p (imag0
, imag1
))
1662 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1663 NULL_RTX
, unsignedp
, methods
);
1665 if (temp1
== 0 || temp2
== 0)
1670 binoptab
== smulv_optab
? addv_optab
: add_optab
,
1671 temp1
, temp2
, imagr
, unsignedp
, methods
));
1675 else if (res
!= imagr
)
1676 emit_move_insn (imagr
, res
);
1682 /* Don't fetch these from memory more than once. */
1683 real0
= force_reg (submode
, real0
);
1684 real1
= force_reg (submode
, real1
);
1686 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1687 realr
, unsignedp
, methods
);
1690 else if (res
!= realr
)
1691 emit_move_insn (realr
, res
);
1694 res
= expand_binop (submode
, binoptab
,
1695 real1
, imag0
, imagr
, unsignedp
, methods
);
1697 res
= expand_binop (submode
, binoptab
,
1698 real0
, imag1
, imagr
, unsignedp
, methods
);
1702 else if (res
!= imagr
)
1703 emit_move_insn (imagr
, res
);
1710 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1714 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1716 /* Don't fetch these from memory more than once. */
1717 real1
= force_reg (submode
, real1
);
1719 /* Simply divide the real and imaginary parts by `c' */
1720 if (class == MODE_COMPLEX_FLOAT
)
1721 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1722 realr
, unsignedp
, methods
);
1724 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1725 real0
, real1
, realr
, unsignedp
);
1729 else if (res
!= realr
)
1730 emit_move_insn (realr
, res
);
1732 if (class == MODE_COMPLEX_FLOAT
)
1733 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1734 imagr
, unsignedp
, methods
);
1736 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1737 imag0
, real1
, imagr
, unsignedp
);
1741 else if (res
!= imagr
)
1742 emit_move_insn (imagr
, res
);
1748 switch (flag_complex_divide_method
)
1751 ok
= expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
,
1752 realr
, imagr
, submode
,
1758 ok
= expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
,
1759 realr
, imagr
, submode
,
1779 if (binoptab
->code
!= UNKNOWN
)
1781 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
1782 copy_rtx (op0
), copy_rtx (op1
));
1786 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1792 /* It can't be open-coded in this mode.
1793 Use a library call if one is available and caller says that's ok. */
1795 if (binoptab
->handlers
[(int) mode
].libfunc
1796 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1800 enum machine_mode op1_mode
= mode
;
1807 op1_mode
= word_mode
;
1808 /* Specify unsigned here,
1809 since negative shift counts are meaningless. */
1810 op1x
= convert_to_mode (word_mode
, op1
, 1);
1813 if (GET_MODE (op0
) != VOIDmode
1814 && GET_MODE (op0
) != mode
)
1815 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1817 /* Pass 1 for NO_QUEUE so we don't lose any increments
1818 if the libcall is cse'd or moved. */
1819 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1820 NULL_RTX
, LCT_CONST
, mode
, 2,
1821 op0
, mode
, op1x
, op1_mode
);
1823 insns
= get_insns ();
1826 target
= gen_reg_rtx (mode
);
1827 emit_libcall_block (insns
, target
, value
,
1828 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1833 delete_insns_since (last
);
1835 /* It can't be done in this mode. Can we do it in a wider mode? */
1837 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1838 || methods
== OPTAB_MUST_WIDEN
))
1840 /* Caller says, don't even try. */
1841 delete_insns_since (entry_last
);
1845 /* Compute the value of METHODS to pass to recursive calls.
1846 Don't allow widening to be tried recursively. */
1848 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1850 /* Look for a wider mode of the same class for which it appears we can do
1853 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1855 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1856 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1858 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1859 != CODE_FOR_nothing
)
1860 || (methods
== OPTAB_LIB
1861 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1863 rtx xop0
= op0
, xop1
= op1
;
1866 /* For certain integer operations, we need not actually extend
1867 the narrow operands, as long as we will truncate
1868 the results to the same narrowness. */
1870 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1871 || binoptab
== xor_optab
1872 || binoptab
== add_optab
|| binoptab
== sub_optab
1873 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1874 && class == MODE_INT
)
1877 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1878 unsignedp
, no_extend
);
1880 /* The second operand of a shift must always be extended. */
1881 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1882 no_extend
&& binoptab
!= ashl_optab
);
1884 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1885 unsignedp
, methods
);
1888 if (class != MODE_INT
)
1891 target
= gen_reg_rtx (mode
);
1892 convert_move (target
, temp
, 0);
1896 return gen_lowpart (mode
, temp
);
1899 delete_insns_since (last
);
1904 delete_insns_since (entry_last
);
1908 /* Like expand_binop, but for open-coding vectors binops. */
1911 expand_vector_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
1912 enum machine_mode mode
;
1917 enum optab_methods methods
;
1919 enum machine_mode submode
, tmode
;
1920 int size
, elts
, subsize
, subbitsize
, i
;
1921 rtx t
, a
, b
, res
, seq
;
1922 enum mode_class
class;
1924 class = GET_MODE_CLASS (mode
);
1926 size
= GET_MODE_SIZE (mode
);
1927 submode
= GET_MODE_INNER (mode
);
1929 /* Search for the widest vector mode with the same inner mode that is
1930 still narrower than MODE and that allows to open-code this operator.
1931 Note, if we find such a mode and the handler later decides it can't
1932 do the expansion, we'll be called recursively with the narrower mode. */
1933 for (tmode
= GET_CLASS_NARROWEST_MODE (class);
1934 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
1935 tmode
= GET_MODE_WIDER_MODE (tmode
))
1937 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
1938 && binoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
1942 switch (binoptab
->code
)
1947 tmode
= int_mode_for_mode (mode
);
1948 if (tmode
!= BLKmode
)
1954 subsize
= GET_MODE_SIZE (submode
);
1955 subbitsize
= GET_MODE_BITSIZE (submode
);
1956 elts
= size
/ subsize
;
1958 /* If METHODS is OPTAB_DIRECT, we don't insist on the exact mode,
1959 but that we operate on more than one element at a time. */
1960 if (subsize
== GET_MODE_UNIT_SIZE (mode
) && methods
== OPTAB_DIRECT
)
1965 /* Errors can leave us with a const0_rtx as operand. */
1966 if (GET_MODE (op0
) != mode
)
1967 op0
= copy_to_mode_reg (mode
, op0
);
1968 if (GET_MODE (op1
) != mode
)
1969 op1
= copy_to_mode_reg (mode
, op1
);
1972 target
= gen_reg_rtx (mode
);
1974 for (i
= 0; i
< elts
; ++i
)
1976 /* If this is part of a register, and not the first item in the
1977 word, we can't store using a SUBREG - that would clobber
1979 And storing with a SUBREG is only possible for the least
1980 significant part, hence we can't do it for big endian
1981 (unless we want to permute the evaluation order. */
1982 if (GET_CODE (target
) == REG
1983 && (BYTES_BIG_ENDIAN
1984 ? subsize
< UNITS_PER_WORD
1985 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
1988 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
1989 if (CONSTANT_P (op0
))
1990 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
1992 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
1993 NULL_RTX
, submode
, submode
, size
);
1994 if (CONSTANT_P (op1
))
1995 b
= simplify_gen_subreg (submode
, op1
, mode
, i
* subsize
);
1997 b
= extract_bit_field (op1
, subbitsize
, i
* subbitsize
, unsignedp
,
1998 NULL_RTX
, submode
, submode
, size
);
2000 if (binoptab
->code
== DIV
)
2002 if (class == MODE_VECTOR_FLOAT
)
2003 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
2004 unsignedp
, methods
);
2006 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
2007 a
, b
, t
, unsignedp
);
2010 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
2011 unsignedp
, methods
);
2017 emit_move_insn (t
, res
);
2019 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
,
2035 /* Like expand_unop but for open-coding vector unops. */
2038 expand_vector_unop (mode
, unoptab
, op0
, target
, unsignedp
)
2039 enum machine_mode mode
;
2045 enum machine_mode submode
, tmode
;
2046 int size
, elts
, subsize
, subbitsize
, i
;
2049 size
= GET_MODE_SIZE (mode
);
2050 submode
= GET_MODE_INNER (mode
);
2052 /* Search for the widest vector mode with the same inner mode that is
2053 still narrower than MODE and that allows to open-code this operator.
2054 Note, if we find such a mode and the handler later decides it can't
2055 do the expansion, we'll be called recursively with the narrower mode. */
2056 for (tmode
= GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (mode
));
2057 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
2058 tmode
= GET_MODE_WIDER_MODE (tmode
))
2060 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
2061 && unoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
2064 /* If there is no negate operation, try doing a subtract from zero. */
2065 if (unoptab
== neg_optab
&& GET_MODE_CLASS (submode
) == MODE_INT
2066 /* Avoid infinite recursion when an
2067 error has left us with the wrong mode. */
2068 && GET_MODE (op0
) == mode
)
2071 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2072 target
, unsignedp
, OPTAB_DIRECT
);
2077 if (unoptab
== one_cmpl_optab
)
2079 tmode
= int_mode_for_mode (mode
);
2080 if (tmode
!= BLKmode
)
2084 subsize
= GET_MODE_SIZE (submode
);
2085 subbitsize
= GET_MODE_BITSIZE (submode
);
2086 elts
= size
/ subsize
;
2088 /* Errors can leave us with a const0_rtx as operand. */
2089 if (GET_MODE (op0
) != mode
)
2090 op0
= copy_to_mode_reg (mode
, op0
);
2093 target
= gen_reg_rtx (mode
);
2097 for (i
= 0; i
< elts
; ++i
)
2099 /* If this is part of a register, and not the first item in the
2100 word, we can't store using a SUBREG - that would clobber
2102 And storing with a SUBREG is only possible for the least
2103 significant part, hence we can't do it for big endian
2104 (unless we want to permute the evaluation order. */
2105 if (GET_CODE (target
) == REG
2106 && (BYTES_BIG_ENDIAN
2107 ? subsize
< UNITS_PER_WORD
2108 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
2111 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
2112 if (CONSTANT_P (op0
))
2113 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
2115 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
2116 t
, submode
, submode
, size
);
2118 res
= expand_unop (submode
, unoptab
, a
, t
, unsignedp
);
2121 emit_move_insn (t
, res
);
2123 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
,
2134 /* Expand a binary operator which has both signed and unsigned forms.
2135 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2138 If we widen unsigned operands, we may use a signed wider operation instead
2139 of an unsigned wider operation, since the result would be the same. */
2142 sign_expand_binop (mode
, uoptab
, soptab
, op0
, op1
, target
, unsignedp
, methods
)
2143 enum machine_mode mode
;
2144 optab uoptab
, soptab
;
2145 rtx op0
, op1
, target
;
2147 enum optab_methods methods
;
2150 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2151 struct optab wide_soptab
;
2153 /* Do it without widening, if possible. */
2154 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2155 unsignedp
, OPTAB_DIRECT
);
2156 if (temp
|| methods
== OPTAB_DIRECT
)
2159 /* Try widening to a signed int. Make a fake signed optab that
2160 hides any signed insn for direct use. */
2161 wide_soptab
= *soptab
;
2162 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
2163 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
2165 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2166 unsignedp
, OPTAB_WIDEN
);
2168 /* For unsigned operands, try widening to an unsigned int. */
2169 if (temp
== 0 && unsignedp
)
2170 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2171 unsignedp
, OPTAB_WIDEN
);
2172 if (temp
|| methods
== OPTAB_WIDEN
)
2175 /* Use the right width lib call if that exists. */
2176 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2177 if (temp
|| methods
== OPTAB_LIB
)
2180 /* Must widen and use a lib call, use either signed or unsigned. */
2181 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2182 unsignedp
, methods
);
2186 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2187 unsignedp
, methods
);
2191 /* Generate code to perform an operation specified by BINOPTAB
2192 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2193 We assume that the order of the operands for the instruction
2194 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2195 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2197 Either TARG0 or TARG1 may be zero, but what that means is that
2198 the result is not actually wanted. We will generate it into
2199 a dummy pseudo-reg and discard it. They may not both be zero.
2201 Returns 1 if this operation can be performed; 0 if not. */
2204 expand_twoval_binop (binoptab
, op0
, op1
, targ0
, targ1
, unsignedp
)
2210 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2211 enum mode_class
class;
2212 enum machine_mode wider_mode
;
2213 rtx entry_last
= get_last_insn ();
2216 class = GET_MODE_CLASS (mode
);
2218 op0
= protect_from_queue (op0
, 0);
2219 op1
= protect_from_queue (op1
, 0);
2223 op0
= force_not_mem (op0
);
2224 op1
= force_not_mem (op1
);
2227 /* If we are inside an appropriately-short loop and one operand is an
2228 expensive constant, force it into a register. */
2229 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
2230 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
2231 op0
= force_reg (mode
, op0
);
2233 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
2234 && rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
2235 op1
= force_reg (mode
, op1
);
2238 targ0
= protect_from_queue (targ0
, 1);
2240 targ0
= gen_reg_rtx (mode
);
2242 targ1
= protect_from_queue (targ1
, 1);
2244 targ1
= gen_reg_rtx (mode
);
2246 /* Record where to go back to if we fail. */
2247 last
= get_last_insn ();
2249 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2251 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
2252 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2253 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2255 rtx xop0
= op0
, xop1
= op1
;
2257 /* In case the insn wants input operands in modes different from
2258 those of the actual operands, convert the operands. It would
2259 seem that we don't need to convert CONST_INTs, but we do, so
2260 that they're properly zero-extended, sign-extended or truncated
2263 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
2264 xop0
= convert_modes (mode0
,
2265 GET_MODE (op0
) != VOIDmode
2270 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
2271 xop1
= convert_modes (mode1
,
2272 GET_MODE (op1
) != VOIDmode
2277 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2278 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2279 xop0
= copy_to_mode_reg (mode0
, xop0
);
2281 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
))
2282 xop1
= copy_to_mode_reg (mode1
, xop1
);
2284 /* We could handle this, but we should always be called with a pseudo
2285 for our targets and all insns should take them as outputs. */
2286 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
2287 || ! (*insn_data
[icode
].operand
[3].predicate
) (targ1
, mode
))
2290 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
2297 delete_insns_since (last
);
2300 /* It can't be done in this mode. Can we do it in a wider mode? */
2302 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2304 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2305 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2307 if (binoptab
->handlers
[(int) wider_mode
].insn_code
2308 != CODE_FOR_nothing
)
2310 rtx t0
= gen_reg_rtx (wider_mode
);
2311 rtx t1
= gen_reg_rtx (wider_mode
);
2312 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2313 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2315 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2318 convert_move (targ0
, t0
, unsignedp
);
2319 convert_move (targ1
, t1
, unsignedp
);
2323 delete_insns_since (last
);
2328 delete_insns_since (entry_last
);
2332 /* Wrapper around expand_unop which takes an rtx code to specify
2333 the operation to perform, not an optab pointer. All other
2334 arguments are the same. */
2336 expand_simple_unop (mode
, code
, op0
, target
, unsignedp
)
2337 enum machine_mode mode
;
2343 optab unop
= code_to_optab
[(int) code
];
2347 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2353 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2355 widen_clz (mode
, op0
, target
)
2356 enum machine_mode mode
;
2360 enum mode_class
class = GET_MODE_CLASS (mode
);
2361 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2363 enum machine_mode wider_mode
;
2364 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2365 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2367 if (clz_optab
->handlers
[(int) wider_mode
].insn_code
2368 != CODE_FOR_nothing
)
2370 rtx xop0
, temp
, last
;
2372 last
= get_last_insn ();
2375 target
= gen_reg_rtx (mode
);
2376 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2377 temp
= expand_unop (wider_mode
, clz_optab
, xop0
, NULL_RTX
, true);
2379 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2380 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2381 - GET_MODE_BITSIZE (mode
)),
2382 target
, true, OPTAB_DIRECT
);
2384 delete_insns_since (last
);
2393 /* Try calculating (parity x) as (and (popcount x) 1), where
2394 popcount can also be done in a wider mode. */
2396 expand_parity (mode
, op0
, target
)
2397 enum machine_mode mode
;
2401 enum mode_class
class = GET_MODE_CLASS (mode
);
2402 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2404 enum machine_mode wider_mode
;
2405 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2406 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2408 if (popcount_optab
->handlers
[(int) wider_mode
].insn_code
2409 != CODE_FOR_nothing
)
2411 rtx xop0
, temp
, last
;
2413 last
= get_last_insn ();
2416 target
= gen_reg_rtx (mode
);
2417 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2418 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2421 temp
= expand_binop (wider_mode
, and_optab
, temp
, GEN_INT (1),
2422 target
, true, OPTAB_DIRECT
);
2424 delete_insns_since (last
);
2433 /* Generate code to perform an operation specified by UNOPTAB
2434 on operand OP0, with result having machine-mode MODE.
2436 UNSIGNEDP is for the case where we have to widen the operands
2437 to perform the operation. It says to use zero-extension.
2439 If TARGET is nonzero, the value
2440 is generated there, if it is convenient to do so.
2441 In all cases an rtx is returned for the locus of the value;
2442 this may or may not be TARGET. */
2445 expand_unop (mode
, unoptab
, op0
, target
, unsignedp
)
2446 enum machine_mode mode
;
2452 enum mode_class
class;
2453 enum machine_mode wider_mode
;
2455 rtx last
= get_last_insn ();
2458 class = GET_MODE_CLASS (mode
);
2460 op0
= protect_from_queue (op0
, 0);
2464 op0
= force_not_mem (op0
);
2468 target
= protect_from_queue (target
, 1);
2470 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2472 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2473 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2479 temp
= gen_reg_rtx (mode
);
2481 if (GET_MODE (xop0
) != VOIDmode
2482 && GET_MODE (xop0
) != mode0
)
2483 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2485 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2487 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2488 xop0
= copy_to_mode_reg (mode0
, xop0
);
2490 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
2491 temp
= gen_reg_rtx (mode
);
2493 pat
= GEN_FCN (icode
) (temp
, xop0
);
2496 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2497 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2499 delete_insns_since (last
);
2500 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2508 delete_insns_since (last
);
2511 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2513 /* Widening clz needs special treatment. */
2514 if (unoptab
== clz_optab
)
2516 temp
= widen_clz (mode
, op0
, target
);
2523 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2524 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2525 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2527 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2531 /* For certain operations, we need not actually extend
2532 the narrow operand, as long as we will truncate the
2533 results to the same narrowness. */
2535 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2536 (unoptab
== neg_optab
2537 || unoptab
== one_cmpl_optab
)
2538 && class == MODE_INT
);
2540 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2545 if (class != MODE_INT
)
2548 target
= gen_reg_rtx (mode
);
2549 convert_move (target
, temp
, 0);
2553 return gen_lowpart (mode
, temp
);
2556 delete_insns_since (last
);
2560 /* These can be done a word at a time. */
2561 if (unoptab
== one_cmpl_optab
2562 && class == MODE_INT
2563 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2564 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2569 if (target
== 0 || target
== op0
)
2570 target
= gen_reg_rtx (mode
);
2574 /* Do the actual arithmetic. */
2575 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2577 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2578 rtx x
= expand_unop (word_mode
, unoptab
,
2579 operand_subword_force (op0
, i
, mode
),
2580 target_piece
, unsignedp
);
2582 if (target_piece
!= x
)
2583 emit_move_insn (target_piece
, x
);
2586 insns
= get_insns ();
2589 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2590 gen_rtx_fmt_e (unoptab
->code
, mode
,
2595 /* Open-code the complex negation operation. */
2596 else if (unoptab
->code
== NEG
2597 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
2603 /* Find the correct mode for the real and imaginary parts */
2604 enum machine_mode submode
= GET_MODE_INNER (mode
);
2606 if (submode
== BLKmode
)
2610 target
= gen_reg_rtx (mode
);
2614 target_piece
= gen_imagpart (submode
, target
);
2615 x
= expand_unop (submode
, unoptab
,
2616 gen_imagpart (submode
, op0
),
2617 target_piece
, unsignedp
);
2618 if (target_piece
!= x
)
2619 emit_move_insn (target_piece
, x
);
2621 target_piece
= gen_realpart (submode
, target
);
2622 x
= expand_unop (submode
, unoptab
,
2623 gen_realpart (submode
, op0
),
2624 target_piece
, unsignedp
);
2625 if (target_piece
!= x
)
2626 emit_move_insn (target_piece
, x
);
2631 emit_no_conflict_block (seq
, target
, op0
, 0,
2632 gen_rtx_fmt_e (unoptab
->code
, mode
,
2637 /* Try negating floating point values by flipping the sign bit. */
2638 if (unoptab
->code
== NEG
&& class == MODE_FLOAT
2639 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2641 const struct real_format
*fmt
= real_format_for_mode
[mode
- QFmode
];
2642 enum machine_mode imode
= int_mode_for_mode (mode
);
2643 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2645 if (imode
!= BLKmode
&& bitpos
>= 0 && fmt
->has_signed_zero
)
2647 HOST_WIDE_INT hi
, lo
;
2648 rtx last
= get_last_insn ();
2650 /* Handle targets with different FP word orders. */
2651 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2653 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2654 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2655 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2658 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2661 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2665 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2668 temp
= expand_binop (imode
, xor_optab
,
2669 gen_lowpart (imode
, op0
),
2670 immed_double_const (lo
, hi
, imode
),
2671 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2673 return gen_lowpart (mode
, temp
);
2674 delete_insns_since (last
);
2678 /* Try calculating parity (x) as popcount (x) % 2. */
2679 if (unoptab
== parity_optab
)
2681 temp
= expand_parity (mode
, op0
, target
);
2687 /* Now try a library call in this mode. */
2688 if (unoptab
->handlers
[(int) mode
].libfunc
)
2692 enum machine_mode outmode
= mode
;
2694 /* All of these functions return small values. Thus we choose to
2695 have them return something that isn't a double-word. */
2696 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
2697 || unoptab
== popcount_optab
|| unoptab
== parity_optab
)
2698 outmode
= TYPE_MODE (integer_type_node
);
2702 /* Pass 1 for NO_QUEUE so we don't lose any increments
2703 if the libcall is cse'd or moved. */
2704 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2705 NULL_RTX
, LCT_CONST
, outmode
,
2707 insns
= get_insns ();
2710 target
= gen_reg_rtx (outmode
);
2711 emit_libcall_block (insns
, target
, value
,
2712 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2717 if (class == MODE_VECTOR_FLOAT
|| class == MODE_VECTOR_INT
)
2718 return expand_vector_unop (mode
, unoptab
, op0
, target
, unsignedp
);
2720 /* It can't be done in this mode. Can we do it in a wider mode? */
2722 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2724 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2725 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2727 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2728 != CODE_FOR_nothing
)
2729 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2733 /* For certain operations, we need not actually extend
2734 the narrow operand, as long as we will truncate the
2735 results to the same narrowness. */
2737 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2738 (unoptab
== neg_optab
2739 || unoptab
== one_cmpl_optab
)
2740 && class == MODE_INT
);
2742 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2745 /* If we are generating clz using wider mode, adjust the
2747 if (unoptab
== clz_optab
&& temp
!= 0)
2748 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2749 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2750 - GET_MODE_BITSIZE (mode
)),
2751 target
, true, OPTAB_DIRECT
);
2755 if (class != MODE_INT
)
2758 target
= gen_reg_rtx (mode
);
2759 convert_move (target
, temp
, 0);
2763 return gen_lowpart (mode
, temp
);
2766 delete_insns_since (last
);
2771 /* If there is no negate operation, try doing a subtract from zero.
2772 The US Software GOFAST library needs this. */
2773 if (unoptab
->code
== NEG
)
2776 temp
= expand_binop (mode
,
2777 unoptab
== negv_optab
? subv_optab
: sub_optab
,
2778 CONST0_RTX (mode
), op0
,
2779 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2787 /* Emit code to compute the absolute value of OP0, with result to
2788 TARGET if convenient. (TARGET may be 0.) The return value says
2789 where the result actually is to be found.
2791 MODE is the mode of the operand; the mode of the result is
2792 different but can be deduced from MODE.
2797 expand_abs_nojump (mode
, op0
, target
, result_unsignedp
)
2798 enum machine_mode mode
;
2801 int result_unsignedp
;
2806 result_unsignedp
= 1;
2808 /* First try to do it with a special abs instruction. */
2809 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
2814 /* For floating point modes, try clearing the sign bit. */
2815 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
2816 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2818 const struct real_format
*fmt
= real_format_for_mode
[mode
- QFmode
];
2819 enum machine_mode imode
= int_mode_for_mode (mode
);
2820 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2822 if (imode
!= BLKmode
&& bitpos
>= 0)
2824 HOST_WIDE_INT hi
, lo
;
2825 rtx last
= get_last_insn ();
2827 /* Handle targets with different FP word orders. */
2828 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2830 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2831 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2832 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2835 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2838 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2842 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2845 temp
= expand_binop (imode
, and_optab
,
2846 gen_lowpart (imode
, op0
),
2847 immed_double_const (~lo
, ~hi
, imode
),
2848 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2850 return gen_lowpart (mode
, temp
);
2851 delete_insns_since (last
);
2855 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2856 if (smax_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2858 rtx last
= get_last_insn ();
2860 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
2862 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
2868 delete_insns_since (last
);
2871 /* If this machine has expensive jumps, we can do integer absolute
2872 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2873 where W is the width of MODE. */
2875 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2877 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2878 size_int (GET_MODE_BITSIZE (mode
) - 1),
2881 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2884 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
2885 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
2895 expand_abs (mode
, op0
, target
, result_unsignedp
, safe
)
2896 enum machine_mode mode
;
2899 int result_unsignedp
;
2905 result_unsignedp
= 1;
2907 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
2911 /* If that does not win, use conditional jump and negate. */
2913 /* It is safe to use the target if it is the same
2914 as the source if this is also a pseudo register */
2915 if (op0
== target
&& GET_CODE (op0
) == REG
2916 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2919 op1
= gen_label_rtx ();
2920 if (target
== 0 || ! safe
2921 || GET_MODE (target
) != mode
2922 || (GET_CODE (target
) == MEM
&& MEM_VOLATILE_P (target
))
2923 || (GET_CODE (target
) == REG
2924 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2925 target
= gen_reg_rtx (mode
);
2927 emit_move_insn (target
, op0
);
2930 /* If this mode is an integer too wide to compare properly,
2931 compare word by word. Rely on CSE to optimize constant cases. */
2932 if (GET_MODE_CLASS (mode
) == MODE_INT
2933 && ! can_compare_p (GE
, mode
, ccp_jump
))
2934 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2937 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2938 NULL_RTX
, NULL_RTX
, op1
);
2940 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
2943 emit_move_insn (target
, op0
);
2949 /* Emit code to compute the absolute value of OP0, with result to
2950 TARGET if convenient. (TARGET may be 0.) The return value says
2951 where the result actually is to be found.
2953 MODE is the mode of the operand; the mode of the result is
2954 different but can be deduced from MODE.
2956 UNSIGNEDP is relevant for complex integer modes. */
2959 expand_complex_abs (mode
, op0
, target
, unsignedp
)
2960 enum machine_mode mode
;
2965 enum mode_class
class = GET_MODE_CLASS (mode
);
2966 enum machine_mode wider_mode
;
2968 rtx entry_last
= get_last_insn ();
2971 optab this_abs_optab
;
2973 /* Find the correct mode for the real and imaginary parts. */
2974 enum machine_mode submode
= GET_MODE_INNER (mode
);
2976 if (submode
== BLKmode
)
2979 op0
= protect_from_queue (op0
, 0);
2983 op0
= force_not_mem (op0
);
2986 last
= get_last_insn ();
2989 target
= protect_from_queue (target
, 1);
2991 this_abs_optab
= ! unsignedp
&& flag_trapv
2992 && (GET_MODE_CLASS(mode
) == MODE_INT
)
2993 ? absv_optab
: abs_optab
;
2995 if (this_abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2997 int icode
= (int) this_abs_optab
->handlers
[(int) mode
].insn_code
;
2998 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3004 temp
= gen_reg_rtx (submode
);
3006 if (GET_MODE (xop0
) != VOIDmode
3007 && GET_MODE (xop0
) != mode0
)
3008 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
3010 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
3012 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
3013 xop0
= copy_to_mode_reg (mode0
, xop0
);
3015 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, submode
))
3016 temp
= gen_reg_rtx (submode
);
3018 pat
= GEN_FCN (icode
) (temp
, xop0
);
3021 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3022 && ! add_equal_note (pat
, temp
, this_abs_optab
->code
, xop0
,
3025 delete_insns_since (last
);
3026 return expand_unop (mode
, this_abs_optab
, op0
, NULL_RTX
,
3035 delete_insns_since (last
);
3038 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3040 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3041 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3043 if (this_abs_optab
->handlers
[(int) wider_mode
].insn_code
3044 != CODE_FOR_nothing
)
3048 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
3049 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
3053 if (class != MODE_COMPLEX_INT
)
3056 target
= gen_reg_rtx (submode
);
3057 convert_move (target
, temp
, 0);
3061 return gen_lowpart (submode
, temp
);
3064 delete_insns_since (last
);
3068 /* Open-code the complex absolute-value operation
3069 if we can open-code sqrt. Otherwise it's not worth while. */
3070 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
3073 rtx real
, imag
, total
;
3075 real
= gen_realpart (submode
, op0
);
3076 imag
= gen_imagpart (submode
, op0
);
3078 /* Square both parts. */
3079 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
3080 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
3082 /* Sum the parts. */
3083 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
3084 0, OPTAB_LIB_WIDEN
);
3086 /* Get sqrt in TARGET. Set TARGET to where the result is. */
3087 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
3089 delete_insns_since (last
);
3094 /* Now try a library call in this mode. */
3095 if (this_abs_optab
->handlers
[(int) mode
].libfunc
)
3102 /* Pass 1 for NO_QUEUE so we don't lose any increments
3103 if the libcall is cse'd or moved. */
3104 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
3105 NULL_RTX
, LCT_CONST
, submode
, 1, op0
, mode
);
3106 insns
= get_insns ();
3109 target
= gen_reg_rtx (submode
);
3110 emit_libcall_block (insns
, target
, value
,
3111 gen_rtx_fmt_e (this_abs_optab
->code
, mode
, op0
));
3116 /* It can't be done in this mode. Can we do it in a wider mode? */
3118 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3119 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3121 if ((this_abs_optab
->handlers
[(int) wider_mode
].insn_code
3122 != CODE_FOR_nothing
)
3123 || this_abs_optab
->handlers
[(int) wider_mode
].libfunc
)
3127 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
3129 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
3133 if (class != MODE_COMPLEX_INT
)
3136 target
= gen_reg_rtx (submode
);
3137 convert_move (target
, temp
, 0);
3141 return gen_lowpart (submode
, temp
);
3144 delete_insns_since (last
);
3148 delete_insns_since (entry_last
);
3152 /* Generate an instruction whose insn-code is INSN_CODE,
3153 with two operands: an output TARGET and an input OP0.
3154 TARGET *must* be nonzero, and the output is always stored there.
3155 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3156 the value that is stored into TARGET. */
3159 emit_unop_insn (icode
, target
, op0
, code
)
3166 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3169 temp
= target
= protect_from_queue (target
, 1);
3171 op0
= protect_from_queue (op0
, 0);
3173 /* Sign and zero extension from memory is often done specially on
3174 RISC machines, so forcing into a register here can pessimize
3176 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
3177 op0
= force_not_mem (op0
);
3179 /* Now, if insn does not accept our operands, put them into pseudos. */
3181 if (! (*insn_data
[icode
].operand
[1].predicate
) (op0
, mode0
))
3182 op0
= copy_to_mode_reg (mode0
, op0
);
3184 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, GET_MODE (temp
))
3185 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
3186 temp
= gen_reg_rtx (GET_MODE (temp
));
3188 pat
= GEN_FCN (icode
) (temp
, op0
);
3190 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3191 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
3196 emit_move_insn (target
, temp
);
3199 /* Emit code to perform a series of operations on a multi-word quantity, one
3202 Such a block is preceded by a CLOBBER of the output, consists of multiple
3203 insns, each setting one word of the output, and followed by a SET copying
3204 the output to itself.
3206 Each of the insns setting words of the output receives a REG_NO_CONFLICT
3207 note indicating that it doesn't conflict with the (also multi-word)
3208 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
3211 INSNS is a block of code generated to perform the operation, not including
3212 the CLOBBER and final copy. All insns that compute intermediate values
3213 are first emitted, followed by the block as described above.
3215 TARGET, OP0, and OP1 are the output and inputs of the operations,
3216 respectively. OP1 may be zero for a unary operation.
3218 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
3221 If TARGET is not a register, INSNS is simply emitted with no special
3222 processing. Likewise if anything in INSNS is not an INSN or if
3223 there is a libcall block inside INSNS.
3225 The final insn emitted is returned. */
3228 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv
)
3234 rtx prev
, next
, first
, last
, insn
;
3236 if (GET_CODE (target
) != REG
|| reload_in_progress
)
3237 return emit_insn (insns
);
3239 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3240 if (GET_CODE (insn
) != INSN
3241 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
3242 return emit_insn (insns
);
3244 /* First emit all insns that do not store into words of the output and remove
3245 these from the list. */
3246 for (insn
= insns
; insn
; insn
= next
)
3251 next
= NEXT_INSN (insn
);
3253 /* Some ports (cris) create an libcall regions at their own. We must
3254 avoid any potential nesting of LIBCALLs. */
3255 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3256 remove_note (insn
, note
);
3257 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3258 remove_note (insn
, note
);
3260 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
3261 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3262 set
= PATTERN (insn
);
3263 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3265 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
3266 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
3268 set
= XVECEXP (PATTERN (insn
), 0, i
);
3276 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
3278 if (PREV_INSN (insn
))
3279 NEXT_INSN (PREV_INSN (insn
)) = next
;
3284 PREV_INSN (next
) = PREV_INSN (insn
);
3290 prev
= get_last_insn ();
3292 /* Now write the CLOBBER of the output, followed by the setting of each
3293 of the words, followed by the final copy. */
3294 if (target
!= op0
&& target
!= op1
)
3295 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
3297 for (insn
= insns
; insn
; insn
= next
)
3299 next
= NEXT_INSN (insn
);
3302 if (op1
&& GET_CODE (op1
) == REG
)
3303 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
3306 if (op0
&& GET_CODE (op0
) == REG
)
3307 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
3311 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3312 != CODE_FOR_nothing
)
3314 last
= emit_move_insn (target
, target
);
3316 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
3320 last
= get_last_insn ();
3322 /* Remove any existing REG_EQUAL note from "last", or else it will
3323 be mistaken for a note referring to the full contents of the
3324 alleged libcall value when found together with the REG_RETVAL
3325 note added below. An existing note can come from an insn
3326 expansion at "last". */
3327 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3331 first
= get_insns ();
3333 first
= NEXT_INSN (prev
);
3335 /* Encapsulate the block so it gets manipulated as a unit. */
3336 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3338 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
3343 /* Emit code to make a call to a constant function or a library call.
3345 INSNS is a list containing all insns emitted in the call.
3346 These insns leave the result in RESULT. Our block is to copy RESULT
3347 to TARGET, which is logically equivalent to EQUIV.
3349 We first emit any insns that set a pseudo on the assumption that these are
3350 loading constants into registers; doing so allows them to be safely cse'ed
3351 between blocks. Then we emit all the other insns in the block, followed by
3352 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3353 note with an operand of EQUIV.
3355 Moving assignments to pseudos outside of the block is done to improve
3356 the generated code, but is not required to generate correct code,
3357 hence being unable to move an assignment is not grounds for not making
3358 a libcall block. There are two reasons why it is safe to leave these
3359 insns inside the block: First, we know that these pseudos cannot be
3360 used in generated RTL outside the block since they are created for
3361 temporary purposes within the block. Second, CSE will not record the
3362 values of anything set inside a libcall block, so we know they must
3363 be dead at the end of the block.
3365 Except for the first group of insns (the ones setting pseudos), the
3366 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
3369 emit_libcall_block (insns
, target
, result
, equiv
)
3375 rtx final_dest
= target
;
3376 rtx prev
, next
, first
, last
, insn
;
3378 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3379 into a MEM later. Protect the libcall block from this change. */
3380 if (! REG_P (target
) || REG_USERVAR_P (target
))
3381 target
= gen_reg_rtx (GET_MODE (target
));
3383 /* If we're using non-call exceptions, a libcall corresponding to an
3384 operation that may trap may also trap. */
3385 if (flag_non_call_exceptions
&& may_trap_p (equiv
))
3387 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3388 if (GET_CODE (insn
) == CALL_INSN
)
3390 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3392 if (note
!= 0 && INTVAL (XEXP (note
, 0)) <= 0)
3393 remove_note (insn
, note
);
3397 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3398 reg note to indicate that this call cannot throw or execute a nonlocal
3399 goto (unless there is already a REG_EH_REGION note, in which case
3401 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3402 if (GET_CODE (insn
) == CALL_INSN
)
3404 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3407 XEXP (note
, 0) = GEN_INT (-1);
3409 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, GEN_INT (-1),
3413 /* First emit all insns that set pseudos. Remove them from the list as
3414 we go. Avoid insns that set pseudos which were referenced in previous
3415 insns. These can be generated by move_by_pieces, for example,
3416 to update an address. Similarly, avoid insns that reference things
3417 set in previous insns. */
3419 for (insn
= insns
; insn
; insn
= next
)
3421 rtx set
= single_set (insn
);
3424 /* Some ports (cris) create an libcall regions at their own. We must
3425 avoid any potential nesting of LIBCALLs. */
3426 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3427 remove_note (insn
, note
);
3428 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3429 remove_note (insn
, note
);
3431 next
= NEXT_INSN (insn
);
3433 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
3434 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
3436 || ((! INSN_P(insns
)
3437 || ! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
)))
3438 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
3439 && ! modified_in_p (SET_SRC (set
), insns
)
3440 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
3442 if (PREV_INSN (insn
))
3443 NEXT_INSN (PREV_INSN (insn
)) = next
;
3448 PREV_INSN (next
) = PREV_INSN (insn
);
3454 prev
= get_last_insn ();
3456 /* Write the remaining insns followed by the final copy. */
3458 for (insn
= insns
; insn
; insn
= next
)
3460 next
= NEXT_INSN (insn
);
3465 last
= emit_move_insn (target
, result
);
3466 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3467 != CODE_FOR_nothing
)
3468 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
3471 /* Remove any existing REG_EQUAL note from "last", or else it will
3472 be mistaken for a note referring to the full contents of the
3473 libcall value when found together with the REG_RETVAL note added
3474 below. An existing note can come from an insn expansion at
3476 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3479 if (final_dest
!= target
)
3480 emit_move_insn (final_dest
, target
);
3483 first
= get_insns ();
3485 first
= NEXT_INSN (prev
);
3487 /* Encapsulate the block so it gets manipulated as a unit. */
3488 if (!flag_non_call_exceptions
|| !may_trap_p (equiv
))
3490 /* We can't attach the REG_LIBCALL and REG_RETVAL notes
3491 when the encapsulated region would not be in one basic block,
3492 i.e. when there is a control_flow_insn_p insn between FIRST and LAST.
3494 bool attach_libcall_retval_notes
= true;
3495 next
= NEXT_INSN (last
);
3496 for (insn
= first
; insn
!= next
; insn
= NEXT_INSN (insn
))
3497 if (control_flow_insn_p (insn
))
3499 attach_libcall_retval_notes
= false;
3503 if (attach_libcall_retval_notes
)
3505 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3507 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
,
3513 /* Generate code to store zero in X. */
3519 emit_move_insn (x
, const0_rtx
);
3522 /* Generate code to store 1 in X
3523 assuming it contains zero beforehand. */
3526 emit_0_to_1_insn (x
)
3529 emit_move_insn (x
, const1_rtx
);
3532 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3533 PURPOSE describes how this comparison will be used. CODE is the rtx
3534 comparison code we will be using.
3536 ??? Actually, CODE is slightly weaker than that. A target is still
3537 required to implement all of the normal bcc operations, but not
3538 required to implement all (or any) of the unordered bcc operations. */
3541 can_compare_p (code
, mode
, purpose
)
3543 enum machine_mode mode
;
3544 enum can_compare_purpose purpose
;
3548 if (cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3550 if (purpose
== ccp_jump
)
3551 return bcc_gen_fctn
[(int) code
] != NULL
;
3552 else if (purpose
== ccp_store_flag
)
3553 return setcc_gen_code
[(int) code
] != CODE_FOR_nothing
;
3555 /* There's only one cmov entry point, and it's allowed to fail. */
3558 if (purpose
== ccp_jump
3559 && cbranch_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3561 if (purpose
== ccp_cmov
3562 && cmov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3564 if (purpose
== ccp_store_flag
3565 && cstore_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3568 mode
= GET_MODE_WIDER_MODE (mode
);
3570 while (mode
!= VOIDmode
);
3575 /* This function is called when we are going to emit a compare instruction that
3576 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3578 *PMODE is the mode of the inputs (in case they are const_int).
3579 *PUNSIGNEDP nonzero says that the operands are unsigned;
3580 this matters if they need to be widened.
3582 If they have mode BLKmode, then SIZE specifies the size of both operands.
3584 This function performs all the setup necessary so that the caller only has
3585 to emit a single comparison insn. This setup can involve doing a BLKmode
3586 comparison or emitting a library call to perform the comparison if no insn
3587 is available to handle it.
3588 The values which are passed in through pointers can be modified; the caller
3589 should perform the comparison on the modified values. */
3592 prepare_cmp_insn (px
, py
, pcomparison
, size
, pmode
, punsignedp
, purpose
)
3594 enum rtx_code
*pcomparison
;
3596 enum machine_mode
*pmode
;
3598 enum can_compare_purpose purpose
;
3600 enum machine_mode mode
= *pmode
;
3601 rtx x
= *px
, y
= *py
;
3602 int unsignedp
= *punsignedp
;
3603 enum mode_class
class;
3605 class = GET_MODE_CLASS (mode
);
3607 /* They could both be VOIDmode if both args are immediate constants,
3608 but we should fold that at an earlier stage.
3609 With no special code here, this will call abort,
3610 reminding the programmer to implement such folding. */
3612 if (mode
!= BLKmode
&& flag_force_mem
)
3614 /* Load duplicate non-volatile operands once. */
3615 if (rtx_equal_p (x
, y
) && ! volatile_refs_p (x
))
3617 x
= force_not_mem (x
);
3622 x
= force_not_mem (x
);
3623 y
= force_not_mem (y
);
3627 /* If we are inside an appropriately-short loop and one operand is an
3628 expensive constant, force it into a register. */
3629 if (CONSTANT_P (x
) && preserve_subexpressions_p ()
3630 && rtx_cost (x
, COMPARE
) > COSTS_N_INSNS (1))
3631 x
= force_reg (mode
, x
);
3633 if (CONSTANT_P (y
) && preserve_subexpressions_p ()
3634 && rtx_cost (y
, COMPARE
) > COSTS_N_INSNS (1))
3635 y
= force_reg (mode
, y
);
3638 /* Abort if we have a non-canonical comparison. The RTL documentation
3639 states that canonical comparisons are required only for targets which
3641 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
3645 /* Don't let both operands fail to indicate the mode. */
3646 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
3647 x
= force_reg (mode
, x
);
3649 /* Handle all BLKmode compares. */
3651 if (mode
== BLKmode
)
3654 enum machine_mode result_mode
;
3655 rtx opalign ATTRIBUTE_UNUSED
3656 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
3659 x
= protect_from_queue (x
, 0);
3660 y
= protect_from_queue (y
, 0);
3664 #ifdef HAVE_cmpstrqi
3666 && GET_CODE (size
) == CONST_INT
3667 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
3669 result_mode
= insn_data
[(int) CODE_FOR_cmpstrqi
].operand
[0].mode
;
3670 result
= gen_reg_rtx (result_mode
);
3671 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, opalign
));
3675 #ifdef HAVE_cmpstrhi
3677 && GET_CODE (size
) == CONST_INT
3678 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
3680 result_mode
= insn_data
[(int) CODE_FOR_cmpstrhi
].operand
[0].mode
;
3681 result
= gen_reg_rtx (result_mode
);
3682 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, opalign
));
3686 #ifdef HAVE_cmpstrsi
3689 result_mode
= insn_data
[(int) CODE_FOR_cmpstrsi
].operand
[0].mode
;
3690 result
= gen_reg_rtx (result_mode
);
3691 size
= protect_from_queue (size
, 0);
3692 emit_insn (gen_cmpstrsi (result
, x
, y
,
3693 convert_to_mode (SImode
, size
, 1),
3699 #ifdef TARGET_MEM_FUNCTIONS
3700 result
= emit_library_call_value (memcmp_libfunc
, NULL_RTX
, LCT_PURE_MAKE_BLOCK
,
3701 TYPE_MODE (integer_type_node
), 3,
3702 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3703 convert_to_mode (TYPE_MODE (sizetype
), size
,
3704 TREE_UNSIGNED (sizetype
)),
3705 TYPE_MODE (sizetype
));
3707 result
= emit_library_call_value (bcmp_libfunc
, NULL_RTX
, LCT_PURE_MAKE_BLOCK
,
3708 TYPE_MODE (integer_type_node
), 3,
3709 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3710 convert_to_mode (TYPE_MODE (integer_type_node
),
3712 TREE_UNSIGNED (integer_type_node
)),
3713 TYPE_MODE (integer_type_node
));
3716 result_mode
= TYPE_MODE (integer_type_node
);
3720 *pmode
= result_mode
;
3726 if (can_compare_p (*pcomparison
, mode
, purpose
))
3729 /* Handle a lib call just for the mode we are using. */
3731 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
3733 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3736 /* If we want unsigned, and this mode has a distinct unsigned
3737 comparison routine, use that. */
3738 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3739 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3741 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST_MAKE_BLOCK
,
3742 word_mode
, 2, x
, mode
, y
, mode
);
3744 /* Integer comparison returns a result that must be compared against 1,
3745 so that even if we do an unsigned compare afterward,
3746 there is still a value that can represent the result "less than". */
3753 if (class == MODE_FLOAT
)
3754 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3760 /* Before emitting an insn with code ICODE, make sure that X, which is going
3761 to be used for operand OPNUM of the insn, is converted from mode MODE to
3762 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
3763 that it is accepted by the operand predicate. Return the new value. */
3766 prepare_operand (icode
, x
, opnum
, mode
, wider_mode
, unsignedp
)
3770 enum machine_mode mode
, wider_mode
;
3773 x
= protect_from_queue (x
, 0);
3775 if (mode
!= wider_mode
)
3776 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3778 if (! (*insn_data
[icode
].operand
[opnum
].predicate
)
3779 (x
, insn_data
[icode
].operand
[opnum
].mode
))
3780 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
3784 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3785 we can do the comparison.
3786 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3787 be NULL_RTX which indicates that only a comparison is to be generated. */
3790 emit_cmp_and_jump_insn_1 (x
, y
, mode
, comparison
, unsignedp
, label
)
3792 enum machine_mode mode
;
3793 enum rtx_code comparison
;
3797 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3798 enum mode_class
class = GET_MODE_CLASS (mode
);
3799 enum machine_mode wider_mode
= mode
;
3801 /* Try combined insns first. */
3804 enum insn_code icode
;
3805 PUT_MODE (test
, wider_mode
);
3809 icode
= cbranch_optab
->handlers
[(int) wider_mode
].insn_code
;
3811 if (icode
!= CODE_FOR_nothing
3812 && (*insn_data
[icode
].operand
[0].predicate
) (test
, wider_mode
))
3814 x
= prepare_operand (icode
, x
, 1, mode
, wider_mode
, unsignedp
);
3815 y
= prepare_operand (icode
, y
, 2, mode
, wider_mode
, unsignedp
);
3816 emit_jump_insn (GEN_FCN (icode
) (test
, x
, y
, label
));
3821 /* Handle some compares against zero. */
3822 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3823 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3825 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3826 emit_insn (GEN_FCN (icode
) (x
));
3828 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3832 /* Handle compares for which there is a directly suitable insn. */
3834 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3835 if (icode
!= CODE_FOR_nothing
)
3837 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3838 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3839 emit_insn (GEN_FCN (icode
) (x
, y
));
3841 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3845 if (class != MODE_INT
&& class != MODE_FLOAT
3846 && class != MODE_COMPLEX_FLOAT
)
3849 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3851 while (wider_mode
!= VOIDmode
);
3856 /* Generate code to compare X with Y so that the condition codes are
3857 set and to jump to LABEL if the condition is true. If X is a
3858 constant and Y is not a constant, then the comparison is swapped to
3859 ensure that the comparison RTL has the canonical form.
3861 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3862 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3863 the proper branch condition code.
3865 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
3867 MODE is the mode of the inputs (in case they are const_int).
3869 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3870 be passed unchanged to emit_cmp_insn, then potentially converted into an
3871 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3874 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, label
)
3876 enum rtx_code comparison
;
3878 enum machine_mode mode
;
3882 rtx op0
= x
, op1
= y
;
3884 /* Swap operands and condition to ensure canonical RTL. */
3885 if (swap_commutative_operands_p (x
, y
))
3887 /* If we're not emitting a branch, this means some caller
3893 comparison
= swap_condition (comparison
);
3897 /* If OP0 is still a constant, then both X and Y must be constants. Force
3898 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3900 if (CONSTANT_P (op0
))
3901 op0
= force_reg (mode
, op0
);
3906 comparison
= unsigned_condition (comparison
);
3908 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
,
3910 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3913 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3916 emit_cmp_insn (x
, y
, comparison
, size
, mode
, unsignedp
)
3918 enum rtx_code comparison
;
3920 enum machine_mode mode
;
3923 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, 0);
3926 /* Emit a library call comparison between floating point X and Y.
3927 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3930 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
)
3932 enum rtx_code
*pcomparison
;
3933 enum machine_mode
*pmode
;
3936 enum rtx_code comparison
= *pcomparison
;
3938 rtx x
= *px
= protect_from_queue (*px
, 0);
3939 rtx y
= *py
= protect_from_queue (*py
, 0);
3940 enum machine_mode mode
= GET_MODE (x
);
3948 libfunc
= eqhf2_libfunc
;
3952 libfunc
= nehf2_libfunc
;
3956 libfunc
= gthf2_libfunc
;
3957 if (libfunc
== NULL_RTX
)
3959 tmp
= x
; x
= y
; y
= tmp
;
3961 libfunc
= lthf2_libfunc
;
3966 libfunc
= gehf2_libfunc
;
3967 if (libfunc
== NULL_RTX
)
3969 tmp
= x
; x
= y
; y
= tmp
;
3971 libfunc
= lehf2_libfunc
;
3976 libfunc
= lthf2_libfunc
;
3977 if (libfunc
== NULL_RTX
)
3979 tmp
= x
; x
= y
; y
= tmp
;
3981 libfunc
= gthf2_libfunc
;
3986 libfunc
= lehf2_libfunc
;
3987 if (libfunc
== NULL_RTX
)
3989 tmp
= x
; x
= y
; y
= tmp
;
3991 libfunc
= gehf2_libfunc
;
3996 libfunc
= unordhf2_libfunc
;
4002 else if (mode
== SFmode
)
4006 libfunc
= eqsf2_libfunc
;
4010 libfunc
= nesf2_libfunc
;
4014 libfunc
= gtsf2_libfunc
;
4015 if (libfunc
== NULL_RTX
)
4017 tmp
= x
; x
= y
; y
= tmp
;
4019 libfunc
= ltsf2_libfunc
;
4024 libfunc
= gesf2_libfunc
;
4025 if (libfunc
== NULL_RTX
)
4027 tmp
= x
; x
= y
; y
= tmp
;
4029 libfunc
= lesf2_libfunc
;
4034 libfunc
= ltsf2_libfunc
;
4035 if (libfunc
== NULL_RTX
)
4037 tmp
= x
; x
= y
; y
= tmp
;
4039 libfunc
= gtsf2_libfunc
;
4044 libfunc
= lesf2_libfunc
;
4045 if (libfunc
== NULL_RTX
)
4047 tmp
= x
; x
= y
; y
= tmp
;
4049 libfunc
= gesf2_libfunc
;
4054 libfunc
= unordsf2_libfunc
;
4060 else if (mode
== DFmode
)
4064 libfunc
= eqdf2_libfunc
;
4068 libfunc
= nedf2_libfunc
;
4072 libfunc
= gtdf2_libfunc
;
4073 if (libfunc
== NULL_RTX
)
4075 tmp
= x
; x
= y
; y
= tmp
;
4077 libfunc
= ltdf2_libfunc
;
4082 libfunc
= gedf2_libfunc
;
4083 if (libfunc
== NULL_RTX
)
4085 tmp
= x
; x
= y
; y
= tmp
;
4087 libfunc
= ledf2_libfunc
;
4092 libfunc
= ltdf2_libfunc
;
4093 if (libfunc
== NULL_RTX
)
4095 tmp
= x
; x
= y
; y
= tmp
;
4097 libfunc
= gtdf2_libfunc
;
4102 libfunc
= ledf2_libfunc
;
4103 if (libfunc
== NULL_RTX
)
4105 tmp
= x
; x
= y
; y
= tmp
;
4107 libfunc
= gedf2_libfunc
;
4112 libfunc
= unorddf2_libfunc
;
4118 else if (mode
== XFmode
)
4122 libfunc
= eqxf2_libfunc
;
4126 libfunc
= nexf2_libfunc
;
4130 libfunc
= gtxf2_libfunc
;
4131 if (libfunc
== NULL_RTX
)
4133 tmp
= x
; x
= y
; y
= tmp
;
4135 libfunc
= ltxf2_libfunc
;
4140 libfunc
= gexf2_libfunc
;
4141 if (libfunc
== NULL_RTX
)
4143 tmp
= x
; x
= y
; y
= tmp
;
4145 libfunc
= lexf2_libfunc
;
4150 libfunc
= ltxf2_libfunc
;
4151 if (libfunc
== NULL_RTX
)
4153 tmp
= x
; x
= y
; y
= tmp
;
4155 libfunc
= gtxf2_libfunc
;
4160 libfunc
= lexf2_libfunc
;
4161 if (libfunc
== NULL_RTX
)
4163 tmp
= x
; x
= y
; y
= tmp
;
4165 libfunc
= gexf2_libfunc
;
4170 libfunc
= unordxf2_libfunc
;
4176 else if (mode
== TFmode
)
4180 libfunc
= eqtf2_libfunc
;
4184 libfunc
= netf2_libfunc
;
4188 libfunc
= gttf2_libfunc
;
4189 if (libfunc
== NULL_RTX
)
4191 tmp
= x
; x
= y
; y
= tmp
;
4193 libfunc
= lttf2_libfunc
;
4198 libfunc
= getf2_libfunc
;
4199 if (libfunc
== NULL_RTX
)
4201 tmp
= x
; x
= y
; y
= tmp
;
4203 libfunc
= letf2_libfunc
;
4208 libfunc
= lttf2_libfunc
;
4209 if (libfunc
== NULL_RTX
)
4211 tmp
= x
; x
= y
; y
= tmp
;
4213 libfunc
= gttf2_libfunc
;
4218 libfunc
= letf2_libfunc
;
4219 if (libfunc
== NULL_RTX
)
4221 tmp
= x
; x
= y
; y
= tmp
;
4223 libfunc
= getf2_libfunc
;
4228 libfunc
= unordtf2_libfunc
;
4236 enum machine_mode wider_mode
;
4238 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
4239 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
4241 if ((cmp_optab
->handlers
[(int) wider_mode
].insn_code
4242 != CODE_FOR_nothing
)
4243 || (cmp_optab
->handlers
[(int) wider_mode
].libfunc
!= 0))
4245 x
= protect_from_queue (x
, 0);
4246 y
= protect_from_queue (y
, 0);
4247 *px
= convert_to_mode (wider_mode
, x
, 0);
4248 *py
= convert_to_mode (wider_mode
, y
, 0);
4249 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
4259 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST_MAKE_BLOCK
,
4260 word_mode
, 2, x
, mode
, y
, mode
);
4264 if (comparison
== UNORDERED
)
4266 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
4267 else if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4273 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4276 emit_indirect_jump (loc
)
4279 if (! ((*insn_data
[(int) CODE_FOR_indirect_jump
].operand
[0].predicate
)
4281 loc
= copy_to_mode_reg (Pmode
, loc
);
4283 emit_jump_insn (gen_indirect_jump (loc
));
4287 #ifdef HAVE_conditional_move
4289 /* Emit a conditional move instruction if the machine supports one for that
4290 condition and machine mode.
4292 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4293 the mode to use should they be constants. If it is VOIDmode, they cannot
4296 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4297 should be stored there. MODE is the mode to use should they be constants.
4298 If it is VOIDmode, they cannot both be constants.
4300 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4301 is not supported. */
4304 emit_conditional_move (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
4309 enum machine_mode cmode
;
4311 enum machine_mode mode
;
4314 rtx tem
, subtarget
, comparison
, insn
;
4315 enum insn_code icode
;
4316 enum rtx_code reversed
;
4318 /* If one operand is constant, make it the second one. Only do this
4319 if the other operand is not constant as well. */
4321 if (swap_commutative_operands_p (op0
, op1
))
4326 code
= swap_condition (code
);
4329 /* get_condition will prefer to generate LT and GT even if the old
4330 comparison was against zero, so undo that canonicalization here since
4331 comparisons against zero are cheaper. */
4332 if (code
== LT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == 1)
4333 code
= LE
, op1
= const0_rtx
;
4334 else if (code
== GT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == -1)
4335 code
= GE
, op1
= const0_rtx
;
4337 if (cmode
== VOIDmode
)
4338 cmode
= GET_MODE (op0
);
4340 if (swap_commutative_operands_p (op2
, op3
)
4341 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4350 if (mode
== VOIDmode
)
4351 mode
= GET_MODE (op2
);
4353 icode
= movcc_gen_code
[mode
];
4355 if (icode
== CODE_FOR_nothing
)
4360 op2
= force_not_mem (op2
);
4361 op3
= force_not_mem (op3
);
4365 target
= protect_from_queue (target
, 1);
4367 target
= gen_reg_rtx (mode
);
4373 op2
= protect_from_queue (op2
, 0);
4374 op3
= protect_from_queue (op3
, 0);
4376 /* If the insn doesn't accept these operands, put them in pseudos. */
4378 if (! (*insn_data
[icode
].operand
[0].predicate
)
4379 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4380 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4382 if (! (*insn_data
[icode
].operand
[2].predicate
)
4383 (op2
, insn_data
[icode
].operand
[2].mode
))
4384 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4386 if (! (*insn_data
[icode
].operand
[3].predicate
)
4387 (op3
, insn_data
[icode
].operand
[3].mode
))
4388 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4390 /* Everything should now be in the suitable form, so emit the compare insn
4391 and then the conditional move. */
4394 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4396 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4397 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4398 return NULL and let the caller figure out how best to deal with this
4400 if (GET_CODE (comparison
) != code
)
4403 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4405 /* If that failed, then give up. */
4411 if (subtarget
!= target
)
4412 convert_move (target
, subtarget
, 0);
4417 /* Return nonzero if a conditional move of mode MODE is supported.
4419 This function is for combine so it can tell whether an insn that looks
4420 like a conditional move is actually supported by the hardware. If we
4421 guess wrong we lose a bit on optimization, but that's it. */
4422 /* ??? sparc64 supports conditionally moving integers values based on fp
4423 comparisons, and vice versa. How do we handle them? */
4426 can_conditionally_move_p (mode
)
4427 enum machine_mode mode
;
4429 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
4435 #endif /* HAVE_conditional_move */
4437 /* Emit a conditional addition instruction if the machine supports one for that
4438 condition and machine mode.
4440 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4441 the mode to use should they be constants. If it is VOIDmode, they cannot
4444 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4445 should be stored there. MODE is the mode to use should they be constants.
4446 If it is VOIDmode, they cannot both be constants.
4448 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4449 is not supported. */
4452 emit_conditional_add (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
4457 enum machine_mode cmode
;
4459 enum machine_mode mode
;
4462 rtx tem
, subtarget
, comparison
, insn
;
4463 enum insn_code icode
;
4464 enum rtx_code reversed
;
4466 /* If one operand is constant, make it the second one. Only do this
4467 if the other operand is not constant as well. */
4469 if (swap_commutative_operands_p (op0
, op1
))
4474 code
= swap_condition (code
);
4477 /* get_condition will prefer to generate LT and GT even if the old
4478 comparison was against zero, so undo that canonicalization here since
4479 comparisons against zero are cheaper. */
4480 if (code
== LT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == 1)
4481 code
= LE
, op1
= const0_rtx
;
4482 else if (code
== GT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == -1)
4483 code
= GE
, op1
= const0_rtx
;
4485 if (cmode
== VOIDmode
)
4486 cmode
= GET_MODE (op0
);
4488 if (swap_commutative_operands_p (op2
, op3
)
4489 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4498 if (mode
== VOIDmode
)
4499 mode
= GET_MODE (op2
);
4501 icode
= addcc_optab
->handlers
[(int) mode
].insn_code
;
4503 if (icode
== CODE_FOR_nothing
)
4508 op2
= force_not_mem (op2
);
4509 op3
= force_not_mem (op3
);
4513 target
= protect_from_queue (target
, 1);
4515 target
= gen_reg_rtx (mode
);
4521 op2
= protect_from_queue (op2
, 0);
4522 op3
= protect_from_queue (op3
, 0);
4524 /* If the insn doesn't accept these operands, put them in pseudos. */
4526 if (! (*insn_data
[icode
].operand
[0].predicate
)
4527 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4528 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4530 if (! (*insn_data
[icode
].operand
[2].predicate
)
4531 (op2
, insn_data
[icode
].operand
[2].mode
))
4532 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4534 if (! (*insn_data
[icode
].operand
[3].predicate
)
4535 (op3
, insn_data
[icode
].operand
[3].mode
))
4536 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4538 /* Everything should now be in the suitable form, so emit the compare insn
4539 and then the conditional move. */
4542 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4544 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4545 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4546 return NULL and let the caller figure out how best to deal with this
4548 if (GET_CODE (comparison
) != code
)
4551 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4553 /* If that failed, then give up. */
4559 if (subtarget
!= target
)
4560 convert_move (target
, subtarget
, 0);
4565 /* These functions attempt to generate an insn body, rather than
4566 emitting the insn, but if the gen function already emits them, we
4567 make no attempt to turn them back into naked patterns.
4569 They do not protect from queued increments,
4570 because they may be used 1) in protect_from_queue itself
4571 and 2) in other passes where there is no queue. */
4573 /* Generate and return an insn body to add Y to X. */
4576 gen_add2_insn (x
, y
)
4579 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4581 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4582 (x
, insn_data
[icode
].operand
[0].mode
))
4583 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4584 (x
, insn_data
[icode
].operand
[1].mode
))
4585 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4586 (y
, insn_data
[icode
].operand
[2].mode
)))
4589 return (GEN_FCN (icode
) (x
, x
, y
));
4592 /* Generate and return an insn body to add r1 and c,
4593 storing the result in r0. */
4595 gen_add3_insn (r0
, r1
, c
)
4598 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4600 if (icode
== CODE_FOR_nothing
4601 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4602 (r0
, insn_data
[icode
].operand
[0].mode
))
4603 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4604 (r1
, insn_data
[icode
].operand
[1].mode
))
4605 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4606 (c
, insn_data
[icode
].operand
[2].mode
)))
4609 return (GEN_FCN (icode
) (r0
, r1
, c
));
4613 have_add2_insn (x
, y
)
4618 if (GET_MODE (x
) == VOIDmode
)
4621 icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4623 if (icode
== CODE_FOR_nothing
)
4626 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4627 (x
, insn_data
[icode
].operand
[0].mode
))
4628 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4629 (x
, insn_data
[icode
].operand
[1].mode
))
4630 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4631 (y
, insn_data
[icode
].operand
[2].mode
)))
4637 /* Generate and return an insn body to subtract Y from X. */
4640 gen_sub2_insn (x
, y
)
4643 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4645 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4646 (x
, insn_data
[icode
].operand
[0].mode
))
4647 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4648 (x
, insn_data
[icode
].operand
[1].mode
))
4649 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4650 (y
, insn_data
[icode
].operand
[2].mode
)))
4653 return (GEN_FCN (icode
) (x
, x
, y
));
4656 /* Generate and return an insn body to subtract r1 and c,
4657 storing the result in r0. */
4659 gen_sub3_insn (r0
, r1
, c
)
4662 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4664 if (icode
== CODE_FOR_nothing
4665 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4666 (r0
, insn_data
[icode
].operand
[0].mode
))
4667 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4668 (r1
, insn_data
[icode
].operand
[1].mode
))
4669 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4670 (c
, insn_data
[icode
].operand
[2].mode
)))
4673 return (GEN_FCN (icode
) (r0
, r1
, c
));
4677 have_sub2_insn (x
, y
)
4682 if (GET_MODE (x
) == VOIDmode
)
4685 icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4687 if (icode
== CODE_FOR_nothing
)
4690 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4691 (x
, insn_data
[icode
].operand
[0].mode
))
4692 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4693 (x
, insn_data
[icode
].operand
[1].mode
))
4694 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4695 (y
, insn_data
[icode
].operand
[2].mode
)))
4701 /* Generate the body of an instruction to copy Y into X.
4702 It may be a list of insns, if one insn isn't enough. */
4705 gen_move_insn (x
, y
)
4711 emit_move_insn_1 (x
, y
);
4717 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4718 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4719 no such operation exists, CODE_FOR_nothing will be returned. */
4722 can_extend_p (to_mode
, from_mode
, unsignedp
)
4723 enum machine_mode to_mode
, from_mode
;
4726 #ifdef HAVE_ptr_extend
4728 return CODE_FOR_ptr_extend
;
4731 return extendtab
[(int) to_mode
][(int) from_mode
][unsignedp
!= 0];
4734 /* Generate the body of an insn to extend Y (with mode MFROM)
4735 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4738 gen_extend_insn (x
, y
, mto
, mfrom
, unsignedp
)
4740 enum machine_mode mto
, mfrom
;
4743 return (GEN_FCN (extendtab
[(int) mto
][(int) mfrom
][unsignedp
!= 0]) (x
, y
));
4746 /* can_fix_p and can_float_p say whether the target machine
4747 can directly convert a given fixed point type to
4748 a given floating point type, or vice versa.
4749 The returned value is the CODE_FOR_... value to use,
4750 or CODE_FOR_nothing if these modes cannot be directly converted.
4752 *TRUNCP_PTR is set to 1 if it is necessary to output
4753 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4755 static enum insn_code
4756 can_fix_p (fixmode
, fltmode
, unsignedp
, truncp_ptr
)
4757 enum machine_mode fltmode
, fixmode
;
4762 if (fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0]
4763 != CODE_FOR_nothing
)
4764 return fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
4766 if (ftrunc_optab
->handlers
[(int) fltmode
].insn_code
!= CODE_FOR_nothing
)
4769 return fixtab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
4771 return CODE_FOR_nothing
;
4774 static enum insn_code
4775 can_float_p (fltmode
, fixmode
, unsignedp
)
4776 enum machine_mode fixmode
, fltmode
;
4779 return floattab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
4782 /* Generate code to convert FROM to floating point
4783 and store in TO. FROM must be fixed point and not VOIDmode.
4784 UNSIGNEDP nonzero means regard FROM as unsigned.
4785 Normally this is done by correcting the final value
4786 if it is negative. */
4789 expand_float (to
, from
, unsignedp
)
4793 enum insn_code icode
;
4795 enum machine_mode fmode
, imode
;
4797 /* Crash now, because we won't be able to decide which mode to use. */
4798 if (GET_MODE (from
) == VOIDmode
)
4801 /* Look for an insn to do the conversion. Do it in the specified
4802 modes if possible; otherwise convert either input, output or both to
4803 wider mode. If the integer mode is wider than the mode of FROM,
4804 we can do the conversion signed even if the input is unsigned. */
4806 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4807 fmode
= GET_MODE_WIDER_MODE (fmode
))
4808 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4809 imode
= GET_MODE_WIDER_MODE (imode
))
4811 int doing_unsigned
= unsignedp
;
4813 if (fmode
!= GET_MODE (to
)
4814 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
4817 icode
= can_float_p (fmode
, imode
, unsignedp
);
4818 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
4819 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
4821 if (icode
!= CODE_FOR_nothing
)
4823 to
= protect_from_queue (to
, 1);
4824 from
= protect_from_queue (from
, 0);
4826 if (imode
!= GET_MODE (from
))
4827 from
= convert_to_mode (imode
, from
, unsignedp
);
4829 if (fmode
!= GET_MODE (to
))
4830 target
= gen_reg_rtx (fmode
);
4832 emit_unop_insn (icode
, target
, from
,
4833 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4836 convert_move (to
, target
, 0);
4841 /* Unsigned integer, and no way to convert directly.
4842 Convert as signed, then conditionally adjust the result. */
4845 rtx label
= gen_label_rtx ();
4847 REAL_VALUE_TYPE offset
;
4851 to
= protect_from_queue (to
, 1);
4852 from
= protect_from_queue (from
, 0);
4855 from
= force_not_mem (from
);
4857 /* Look for a usable floating mode FMODE wider than the source and at
4858 least as wide as the target. Using FMODE will avoid rounding woes
4859 with unsigned values greater than the signed maximum value. */
4861 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4862 fmode
= GET_MODE_WIDER_MODE (fmode
))
4863 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4864 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4867 if (fmode
== VOIDmode
)
4869 /* There is no such mode. Pretend the target is wide enough. */
4870 fmode
= GET_MODE (to
);
4872 /* Avoid double-rounding when TO is narrower than FROM. */
4873 if ((significand_size (fmode
) + 1)
4874 < GET_MODE_BITSIZE (GET_MODE (from
)))
4877 rtx neglabel
= gen_label_rtx ();
4879 /* Don't use TARGET if it isn't a register, is a hard register,
4880 or is the wrong mode. */
4881 if (GET_CODE (target
) != REG
4882 || REGNO (target
) < FIRST_PSEUDO_REGISTER
4883 || GET_MODE (target
) != fmode
)
4884 target
= gen_reg_rtx (fmode
);
4886 imode
= GET_MODE (from
);
4887 do_pending_stack_adjust ();
4889 /* Test whether the sign bit is set. */
4890 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
4893 /* The sign bit is not set. Convert as signed. */
4894 expand_float (target
, from
, 0);
4895 emit_jump_insn (gen_jump (label
));
4898 /* The sign bit is set.
4899 Convert to a usable (positive signed) value by shifting right
4900 one bit, while remembering if a nonzero bit was shifted
4901 out; i.e., compute (from & 1) | (from >> 1). */
4903 emit_label (neglabel
);
4904 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
4905 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
4906 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
4908 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
4910 expand_float (target
, temp
, 0);
4912 /* Multiply by 2 to undo the shift above. */
4913 temp
= expand_binop (fmode
, add_optab
, target
, target
,
4914 target
, 0, OPTAB_LIB_WIDEN
);
4916 emit_move_insn (target
, temp
);
4918 do_pending_stack_adjust ();
4924 /* If we are about to do some arithmetic to correct for an
4925 unsigned operand, do it in a pseudo-register. */
4927 if (GET_MODE (to
) != fmode
4928 || GET_CODE (to
) != REG
|| REGNO (to
) < FIRST_PSEUDO_REGISTER
)
4929 target
= gen_reg_rtx (fmode
);
4931 /* Convert as signed integer to floating. */
4932 expand_float (target
, from
, 0);
4934 /* If FROM is negative (and therefore TO is negative),
4935 correct its value by 2**bitwidth. */
4937 do_pending_stack_adjust ();
4938 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
4942 real_2expN (&offset
, GET_MODE_BITSIZE (GET_MODE (from
)));
4943 temp
= expand_binop (fmode
, add_optab
, target
,
4944 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
4945 target
, 0, OPTAB_LIB_WIDEN
);
4947 emit_move_insn (target
, temp
);
4949 do_pending_stack_adjust ();
4954 /* No hardware instruction available; call a library routine to convert from
4955 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
4961 to
= protect_from_queue (to
, 1);
4962 from
= protect_from_queue (from
, 0);
4964 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
4965 from
= convert_to_mode (SImode
, from
, unsignedp
);
4968 from
= force_not_mem (from
);
4970 if (GET_MODE (to
) == SFmode
)
4972 if (GET_MODE (from
) == SImode
)
4973 libfcn
= floatsisf_libfunc
;
4974 else if (GET_MODE (from
) == DImode
)
4975 libfcn
= floatdisf_libfunc
;
4976 else if (GET_MODE (from
) == TImode
)
4977 libfcn
= floattisf_libfunc
;
4981 else if (GET_MODE (to
) == DFmode
)
4983 if (GET_MODE (from
) == SImode
)
4984 libfcn
= floatsidf_libfunc
;
4985 else if (GET_MODE (from
) == DImode
)
4986 libfcn
= floatdidf_libfunc
;
4987 else if (GET_MODE (from
) == TImode
)
4988 libfcn
= floattidf_libfunc
;
4992 else if (GET_MODE (to
) == XFmode
)
4994 if (GET_MODE (from
) == SImode
)
4995 libfcn
= floatsixf_libfunc
;
4996 else if (GET_MODE (from
) == DImode
)
4997 libfcn
= floatdixf_libfunc
;
4998 else if (GET_MODE (from
) == TImode
)
4999 libfcn
= floattixf_libfunc
;
5003 else if (GET_MODE (to
) == TFmode
)
5005 if (GET_MODE (from
) == SImode
)
5006 libfcn
= floatsitf_libfunc
;
5007 else if (GET_MODE (from
) == DImode
)
5008 libfcn
= floatditf_libfunc
;
5009 else if (GET_MODE (from
) == TImode
)
5010 libfcn
= floattitf_libfunc
;
5019 value
= emit_library_call_value (libfcn
, NULL_RTX
, LCT_CONST
,
5020 GET_MODE (to
), 1, from
,
5022 insns
= get_insns ();
5025 emit_libcall_block (insns
, target
, value
,
5026 gen_rtx_FLOAT (GET_MODE (to
), from
));
5031 /* Copy result to requested destination
5032 if we have been computing in a temp location. */
5036 if (GET_MODE (target
) == GET_MODE (to
))
5037 emit_move_insn (to
, target
);
5039 convert_move (to
, target
, 0);
5043 /* expand_fix: generate code to convert FROM to fixed point
5044 and store in TO. FROM must be floating point. */
5050 rtx temp
= gen_reg_rtx (GET_MODE (x
));
5051 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
5055 expand_fix (to
, from
, unsignedp
)
5059 enum insn_code icode
;
5061 enum machine_mode fmode
, imode
;
5065 /* We first try to find a pair of modes, one real and one integer, at
5066 least as wide as FROM and TO, respectively, in which we can open-code
5067 this conversion. If the integer mode is wider than the mode of TO,
5068 we can do the conversion either signed or unsigned. */
5070 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5071 fmode
= GET_MODE_WIDER_MODE (fmode
))
5072 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5073 imode
= GET_MODE_WIDER_MODE (imode
))
5075 int doing_unsigned
= unsignedp
;
5077 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5078 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5079 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5081 if (icode
!= CODE_FOR_nothing
)
5083 to
= protect_from_queue (to
, 1);
5084 from
= protect_from_queue (from
, 0);
5086 if (fmode
!= GET_MODE (from
))
5087 from
= convert_to_mode (fmode
, from
, 0);
5090 from
= ftruncify (from
);
5092 if (imode
!= GET_MODE (to
))
5093 target
= gen_reg_rtx (imode
);
5095 emit_unop_insn (icode
, target
, from
,
5096 doing_unsigned
? UNSIGNED_FIX
: FIX
);
5098 convert_move (to
, target
, unsignedp
);
5103 /* For an unsigned conversion, there is one more way to do it.
5104 If we have a signed conversion, we generate code that compares
5105 the real value to the largest representable positive number. If if
5106 is smaller, the conversion is done normally. Otherwise, subtract
5107 one plus the highest signed number, convert, and add it back.
5109 We only need to check all real modes, since we know we didn't find
5110 anything with a wider integer mode.
5112 This code used to extend FP value into mode wider than the destination.
5113 This is not needed. Consider, for instance conversion from SFmode
5116 The hot path trought the code is dealing with inputs smaller than 2^63
5117 and doing just the conversion, so there is no bits to lose.
5119 In the other path we know the value is positive in the range 2^63..2^64-1
5120 inclusive. (as for other imput overflow happens and result is undefined)
5121 So we know that the most important bit set in mantisa corresponds to
5122 2^63. The subtraction of 2^63 should not generate any rounding as it
5123 simply clears out that bit. The rest is trivial. */
5125 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5126 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5127 fmode
= GET_MODE_WIDER_MODE (fmode
))
5128 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
5132 REAL_VALUE_TYPE offset
;
5133 rtx limit
, lab1
, lab2
, insn
;
5135 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
5136 real_2expN (&offset
, bitsize
- 1);
5137 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5138 lab1
= gen_label_rtx ();
5139 lab2
= gen_label_rtx ();
5142 to
= protect_from_queue (to
, 1);
5143 from
= protect_from_queue (from
, 0);
5146 from
= force_not_mem (from
);
5148 if (fmode
!= GET_MODE (from
))
5149 from
= convert_to_mode (fmode
, from
, 0);
5151 /* See if we need to do the subtraction. */
5152 do_pending_stack_adjust ();
5153 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5156 /* If not, do the signed "fix" and branch around fixup code. */
5157 expand_fix (to
, from
, 0);
5158 emit_jump_insn (gen_jump (lab2
));
5161 /* Otherwise, subtract 2**(N-1), convert to signed number,
5162 then add 2**(N-1). Do the addition using XOR since this
5163 will often generate better code. */
5165 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5166 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5167 expand_fix (to
, target
, 0);
5168 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5170 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5172 to
, 1, OPTAB_LIB_WIDEN
);
5175 emit_move_insn (to
, target
);
5179 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
5180 != CODE_FOR_nothing
)
5182 /* Make a place for a REG_NOTE and add it. */
5183 insn
= emit_move_insn (to
, to
);
5184 set_unique_reg_note (insn
,
5186 gen_rtx_fmt_e (UNSIGNED_FIX
,
5194 /* We can't do it with an insn, so use a library call. But first ensure
5195 that the mode of TO is at least as wide as SImode, since those are the
5196 only library calls we know about. */
5198 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5200 target
= gen_reg_rtx (SImode
);
5202 expand_fix (target
, from
, unsignedp
);
5204 else if (GET_MODE (from
) == SFmode
)
5206 if (GET_MODE (to
) == SImode
)
5207 libfcn
= unsignedp
? fixunssfsi_libfunc
: fixsfsi_libfunc
;
5208 else if (GET_MODE (to
) == DImode
)
5209 libfcn
= unsignedp
? fixunssfdi_libfunc
: fixsfdi_libfunc
;
5210 else if (GET_MODE (to
) == TImode
)
5211 libfcn
= unsignedp
? fixunssfti_libfunc
: fixsfti_libfunc
;
5215 else if (GET_MODE (from
) == DFmode
)
5217 if (GET_MODE (to
) == SImode
)
5218 libfcn
= unsignedp
? fixunsdfsi_libfunc
: fixdfsi_libfunc
;
5219 else if (GET_MODE (to
) == DImode
)
5220 libfcn
= unsignedp
? fixunsdfdi_libfunc
: fixdfdi_libfunc
;
5221 else if (GET_MODE (to
) == TImode
)
5222 libfcn
= unsignedp
? fixunsdfti_libfunc
: fixdfti_libfunc
;
5226 else if (GET_MODE (from
) == XFmode
)
5228 if (GET_MODE (to
) == SImode
)
5229 libfcn
= unsignedp
? fixunsxfsi_libfunc
: fixxfsi_libfunc
;
5230 else if (GET_MODE (to
) == DImode
)
5231 libfcn
= unsignedp
? fixunsxfdi_libfunc
: fixxfdi_libfunc
;
5232 else if (GET_MODE (to
) == TImode
)
5233 libfcn
= unsignedp
? fixunsxfti_libfunc
: fixxfti_libfunc
;
5237 else if (GET_MODE (from
) == TFmode
)
5239 if (GET_MODE (to
) == SImode
)
5240 libfcn
= unsignedp
? fixunstfsi_libfunc
: fixtfsi_libfunc
;
5241 else if (GET_MODE (to
) == DImode
)
5242 libfcn
= unsignedp
? fixunstfdi_libfunc
: fixtfdi_libfunc
;
5243 else if (GET_MODE (to
) == TImode
)
5244 libfcn
= unsignedp
? fixunstfti_libfunc
: fixtfti_libfunc
;
5256 to
= protect_from_queue (to
, 1);
5257 from
= protect_from_queue (from
, 0);
5260 from
= force_not_mem (from
);
5264 value
= emit_library_call_value (libfcn
, NULL_RTX
, LCT_CONST
,
5265 GET_MODE (to
), 1, from
,
5267 insns
= get_insns ();
5270 emit_libcall_block (insns
, target
, value
,
5271 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5272 GET_MODE (to
), from
));
5277 if (GET_MODE (to
) == GET_MODE (target
))
5278 emit_move_insn (to
, target
);
5280 convert_move (to
, target
, 0);
5284 /* Report whether we have an instruction to perform the operation
5285 specified by CODE on operands of mode MODE. */
5287 have_insn_for (code
, mode
)
5289 enum machine_mode mode
;
5291 return (code_to_optab
[(int) code
] != 0
5292 && (code_to_optab
[(int) code
]->handlers
[(int) mode
].insn_code
5293 != CODE_FOR_nothing
));
5296 /* Create a blank optab. */
5301 optab op
= (optab
) ggc_alloc (sizeof (struct optab
));
5302 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5304 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
5305 op
->handlers
[i
].libfunc
= 0;
5311 /* Same, but fill in its code as CODE, and write it into the
5312 code_to_optab table. */
5317 optab op
= new_optab ();
5319 code_to_optab
[(int) code
] = op
;
5323 /* Same, but fill in its code as CODE, and do _not_ write it into
5324 the code_to_optab table. */
5329 optab op
= new_optab ();
5334 /* Initialize the libfunc fields of an entire group of entries in some
5335 optab. Each entry is set equal to a string consisting of a leading
5336 pair of underscores followed by a generic operation name followed by
5337 a mode name (downshifted to lower case) followed by a single character
5338 representing the number of operands for the given operation (which is
5339 usually one of the characters '2', '3', or '4').
5341 OPTABLE is the table in which libfunc fields are to be initialized.
5342 FIRST_MODE is the first machine mode index in the given optab to
5344 LAST_MODE is the last machine mode index in the given optab to
5346 OPNAME is the generic (string) name of the operation.
5347 SUFFIX is the character which specifies the number of operands for
5348 the given generic operation.
5352 init_libfuncs (optable
, first_mode
, last_mode
, opname
, suffix
)
5360 unsigned opname_len
= strlen (opname
);
5362 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
5363 mode
= (enum machine_mode
) ((int) mode
+ 1))
5365 const char *mname
= GET_MODE_NAME (mode
);
5366 unsigned mname_len
= strlen (mname
);
5367 char *libfunc_name
= alloca (2 + opname_len
+ mname_len
+ 1 + 1);
5374 for (q
= opname
; *q
; )
5376 for (q
= mname
; *q
; q
++)
5377 *p
++ = TOLOWER (*q
);
5381 optable
->handlers
[(int) mode
].libfunc
5382 = init_one_libfunc (ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5386 /* Initialize the libfunc fields of an entire group of entries in some
5387 optab which correspond to all integer mode operations. The parameters
5388 have the same meaning as similarly named ones for the `init_libfuncs'
5389 routine. (See above). */
5392 init_integral_libfuncs (optable
, opname
, suffix
)
5397 int maxsize
= 2*BITS_PER_WORD
;
5398 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5399 maxsize
= LONG_LONG_TYPE_SIZE
;
5400 init_libfuncs (optable
, word_mode
,
5401 mode_for_size (maxsize
, MODE_INT
, 0),
5405 /* Initialize the libfunc fields of an entire group of entries in some
5406 optab which correspond to all real mode operations. The parameters
5407 have the same meaning as similarly named ones for the `init_libfuncs'
5408 routine. (See above). */
5411 init_floating_libfuncs (optable
, opname
, suffix
)
5416 enum machine_mode fmode
, dmode
, lmode
;
5418 fmode
= float_type_node
? TYPE_MODE (float_type_node
) : VOIDmode
;
5419 dmode
= double_type_node
? TYPE_MODE (double_type_node
) : VOIDmode
;
5420 lmode
= long_double_type_node
? TYPE_MODE (long_double_type_node
) : VOIDmode
;
5422 if (fmode
!= VOIDmode
)
5423 init_libfuncs (optable
, fmode
, fmode
, opname
, suffix
);
5424 if (dmode
!= fmode
&& dmode
!= VOIDmode
)
5425 init_libfuncs (optable
, dmode
, dmode
, opname
, suffix
);
5426 if (lmode
!= dmode
&& lmode
!= VOIDmode
)
5427 init_libfuncs (optable
, lmode
, lmode
, opname
, suffix
);
5431 init_one_libfunc (name
)
5436 /* Create a FUNCTION_DECL that can be passed to
5437 targetm.encode_section_info. */
5438 /* ??? We don't have any type information except for this is
5439 a function. Pretend this is "int foo()". */
5440 tree decl
= build_decl (FUNCTION_DECL
, get_identifier (name
),
5441 build_function_type (integer_type_node
, NULL_TREE
));
5442 DECL_ARTIFICIAL (decl
) = 1;
5443 DECL_EXTERNAL (decl
) = 1;
5444 TREE_PUBLIC (decl
) = 1;
5446 symbol
= XEXP (DECL_RTL (decl
), 0);
5448 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
5449 are the flags assigned by targetm.encode_section_info. */
5450 SYMBOL_REF_DECL (symbol
) = 0;
5455 /* Call this once to initialize the contents of the optabs
5456 appropriately for the current target machine. */
5461 unsigned int i
, j
, k
;
5463 /* Start by initializing all tables to contain CODE_FOR_nothing. */
5465 for (i
= 0; i
< ARRAY_SIZE (fixtab
); i
++)
5466 for (j
= 0; j
< ARRAY_SIZE (fixtab
[0]); j
++)
5467 for (k
= 0; k
< ARRAY_SIZE (fixtab
[0][0]); k
++)
5468 fixtab
[i
][j
][k
] = CODE_FOR_nothing
;
5470 for (i
= 0; i
< ARRAY_SIZE (fixtrunctab
); i
++)
5471 for (j
= 0; j
< ARRAY_SIZE (fixtrunctab
[0]); j
++)
5472 for (k
= 0; k
< ARRAY_SIZE (fixtrunctab
[0][0]); k
++)
5473 fixtrunctab
[i
][j
][k
] = CODE_FOR_nothing
;
5475 for (i
= 0; i
< ARRAY_SIZE (floattab
); i
++)
5476 for (j
= 0; j
< ARRAY_SIZE (floattab
[0]); j
++)
5477 for (k
= 0; k
< ARRAY_SIZE (floattab
[0][0]); k
++)
5478 floattab
[i
][j
][k
] = CODE_FOR_nothing
;
5480 for (i
= 0; i
< ARRAY_SIZE (extendtab
); i
++)
5481 for (j
= 0; j
< ARRAY_SIZE (extendtab
[0]); j
++)
5482 for (k
= 0; k
< ARRAY_SIZE (extendtab
[0][0]); k
++)
5483 extendtab
[i
][j
][k
] = CODE_FOR_nothing
;
5485 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5486 setcc_gen_code
[i
] = CODE_FOR_nothing
;
5488 #ifdef HAVE_conditional_move
5489 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5490 movcc_gen_code
[i
] = CODE_FOR_nothing
;
5493 add_optab
= init_optab (PLUS
);
5494 addv_optab
= init_optabv (PLUS
);
5495 sub_optab
= init_optab (MINUS
);
5496 subv_optab
= init_optabv (MINUS
);
5497 smul_optab
= init_optab (MULT
);
5498 smulv_optab
= init_optabv (MULT
);
5499 smul_highpart_optab
= init_optab (UNKNOWN
);
5500 umul_highpart_optab
= init_optab (UNKNOWN
);
5501 smul_widen_optab
= init_optab (UNKNOWN
);
5502 umul_widen_optab
= init_optab (UNKNOWN
);
5503 sdiv_optab
= init_optab (DIV
);
5504 sdivv_optab
= init_optabv (DIV
);
5505 sdivmod_optab
= init_optab (UNKNOWN
);
5506 udiv_optab
= init_optab (UDIV
);
5507 udivmod_optab
= init_optab (UNKNOWN
);
5508 smod_optab
= init_optab (MOD
);
5509 umod_optab
= init_optab (UMOD
);
5510 ftrunc_optab
= init_optab (UNKNOWN
);
5511 and_optab
= init_optab (AND
);
5512 ior_optab
= init_optab (IOR
);
5513 xor_optab
= init_optab (XOR
);
5514 ashl_optab
= init_optab (ASHIFT
);
5515 ashr_optab
= init_optab (ASHIFTRT
);
5516 lshr_optab
= init_optab (LSHIFTRT
);
5517 rotl_optab
= init_optab (ROTATE
);
5518 rotr_optab
= init_optab (ROTATERT
);
5519 smin_optab
= init_optab (SMIN
);
5520 smax_optab
= init_optab (SMAX
);
5521 umin_optab
= init_optab (UMIN
);
5522 umax_optab
= init_optab (UMAX
);
5523 pow_optab
= init_optab (UNKNOWN
);
5524 atan2_optab
= init_optab (UNKNOWN
);
5526 /* These three have codes assigned exclusively for the sake of
5528 mov_optab
= init_optab (SET
);
5529 movstrict_optab
= init_optab (STRICT_LOW_PART
);
5530 cmp_optab
= init_optab (COMPARE
);
5532 ucmp_optab
= init_optab (UNKNOWN
);
5533 tst_optab
= init_optab (UNKNOWN
);
5534 neg_optab
= init_optab (NEG
);
5535 negv_optab
= init_optabv (NEG
);
5536 abs_optab
= init_optab (ABS
);
5537 absv_optab
= init_optabv (ABS
);
5538 addcc_optab
= init_optab (UNKNOWN
);
5539 one_cmpl_optab
= init_optab (NOT
);
5540 ffs_optab
= init_optab (FFS
);
5541 clz_optab
= init_optab (CLZ
);
5542 ctz_optab
= init_optab (CTZ
);
5543 popcount_optab
= init_optab (POPCOUNT
);
5544 parity_optab
= init_optab (PARITY
);
5545 sqrt_optab
= init_optab (SQRT
);
5546 floor_optab
= init_optab (UNKNOWN
);
5547 ceil_optab
= init_optab (UNKNOWN
);
5548 round_optab
= init_optab (UNKNOWN
);
5549 trunc_optab
= init_optab (UNKNOWN
);
5550 nearbyint_optab
= init_optab (UNKNOWN
);
5551 sin_optab
= init_optab (UNKNOWN
);
5552 cos_optab
= init_optab (UNKNOWN
);
5553 exp_optab
= init_optab (UNKNOWN
);
5554 log_optab
= init_optab (UNKNOWN
);
5555 strlen_optab
= init_optab (UNKNOWN
);
5556 cbranch_optab
= init_optab (UNKNOWN
);
5557 cmov_optab
= init_optab (UNKNOWN
);
5558 cstore_optab
= init_optab (UNKNOWN
);
5559 push_optab
= init_optab (UNKNOWN
);
5561 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5563 movstr_optab
[i
] = CODE_FOR_nothing
;
5564 clrstr_optab
[i
] = CODE_FOR_nothing
;
5566 #ifdef HAVE_SECONDARY_RELOADS
5567 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
5571 /* Fill in the optabs with the insns we support. */
5574 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
5575 /* This flag says the same insns that convert to a signed fixnum
5576 also convert validly to an unsigned one. */
5577 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5578 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
5579 fixtrunctab
[i
][j
][1] = fixtrunctab
[i
][j
][0];
5582 /* Initialize the optabs with the names of the library functions. */
5583 init_integral_libfuncs (add_optab
, "add", '3');
5584 init_floating_libfuncs (add_optab
, "add", '3');
5585 init_integral_libfuncs (addv_optab
, "addv", '3');
5586 init_floating_libfuncs (addv_optab
, "add", '3');
5587 init_integral_libfuncs (sub_optab
, "sub", '3');
5588 init_floating_libfuncs (sub_optab
, "sub", '3');
5589 init_integral_libfuncs (subv_optab
, "subv", '3');
5590 init_floating_libfuncs (subv_optab
, "sub", '3');
5591 init_integral_libfuncs (smul_optab
, "mul", '3');
5592 init_floating_libfuncs (smul_optab
, "mul", '3');
5593 init_integral_libfuncs (smulv_optab
, "mulv", '3');
5594 init_floating_libfuncs (smulv_optab
, "mul", '3');
5595 init_integral_libfuncs (sdiv_optab
, "div", '3');
5596 init_floating_libfuncs (sdiv_optab
, "div", '3');
5597 init_integral_libfuncs (sdivv_optab
, "divv", '3');
5598 init_integral_libfuncs (udiv_optab
, "udiv", '3');
5599 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
5600 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
5601 init_integral_libfuncs (smod_optab
, "mod", '3');
5602 init_integral_libfuncs (umod_optab
, "umod", '3');
5603 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
5604 init_integral_libfuncs (and_optab
, "and", '3');
5605 init_integral_libfuncs (ior_optab
, "ior", '3');
5606 init_integral_libfuncs (xor_optab
, "xor", '3');
5607 init_integral_libfuncs (ashl_optab
, "ashl", '3');
5608 init_integral_libfuncs (ashr_optab
, "ashr", '3');
5609 init_integral_libfuncs (lshr_optab
, "lshr", '3');
5610 init_integral_libfuncs (smin_optab
, "min", '3');
5611 init_floating_libfuncs (smin_optab
, "min", '3');
5612 init_integral_libfuncs (smax_optab
, "max", '3');
5613 init_floating_libfuncs (smax_optab
, "max", '3');
5614 init_integral_libfuncs (umin_optab
, "umin", '3');
5615 init_integral_libfuncs (umax_optab
, "umax", '3');
5616 init_integral_libfuncs (neg_optab
, "neg", '2');
5617 init_floating_libfuncs (neg_optab
, "neg", '2');
5618 init_integral_libfuncs (negv_optab
, "negv", '2');
5619 init_floating_libfuncs (negv_optab
, "neg", '2');
5620 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
5621 init_integral_libfuncs (ffs_optab
, "ffs", '2');
5622 init_integral_libfuncs (clz_optab
, "clz", '2');
5623 init_integral_libfuncs (ctz_optab
, "ctz", '2');
5624 init_integral_libfuncs (popcount_optab
, "popcount", '2');
5625 init_integral_libfuncs (parity_optab
, "parity", '2');
5627 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
5628 init_integral_libfuncs (cmp_optab
, "cmp", '2');
5629 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
5630 init_floating_libfuncs (cmp_optab
, "cmp", '2');
5632 #ifdef MULSI3_LIBCALL
5633 smul_optab
->handlers
[(int) SImode
].libfunc
5634 = init_one_libfunc (MULSI3_LIBCALL
);
5636 #ifdef MULDI3_LIBCALL
5637 smul_optab
->handlers
[(int) DImode
].libfunc
5638 = init_one_libfunc (MULDI3_LIBCALL
);
5641 #ifdef DIVSI3_LIBCALL
5642 sdiv_optab
->handlers
[(int) SImode
].libfunc
5643 = init_one_libfunc (DIVSI3_LIBCALL
);
5645 #ifdef DIVDI3_LIBCALL
5646 sdiv_optab
->handlers
[(int) DImode
].libfunc
5647 = init_one_libfunc (DIVDI3_LIBCALL
);
5650 #ifdef UDIVSI3_LIBCALL
5651 udiv_optab
->handlers
[(int) SImode
].libfunc
5652 = init_one_libfunc (UDIVSI3_LIBCALL
);
5654 #ifdef UDIVDI3_LIBCALL
5655 udiv_optab
->handlers
[(int) DImode
].libfunc
5656 = init_one_libfunc (UDIVDI3_LIBCALL
);
5659 #ifdef MODSI3_LIBCALL
5660 smod_optab
->handlers
[(int) SImode
].libfunc
5661 = init_one_libfunc (MODSI3_LIBCALL
);
5663 #ifdef MODDI3_LIBCALL
5664 smod_optab
->handlers
[(int) DImode
].libfunc
5665 = init_one_libfunc (MODDI3_LIBCALL
);
5668 #ifdef UMODSI3_LIBCALL
5669 umod_optab
->handlers
[(int) SImode
].libfunc
5670 = init_one_libfunc (UMODSI3_LIBCALL
);
5672 #ifdef UMODDI3_LIBCALL
5673 umod_optab
->handlers
[(int) DImode
].libfunc
5674 = init_one_libfunc (UMODDI3_LIBCALL
);
5677 /* Use cabs for DC complex abs, since systems generally have cabs.
5678 Don't define any libcall for SCmode, so that cabs will be used. */
5679 abs_optab
->handlers
[(int) DCmode
].libfunc
5680 = init_one_libfunc ("cabs");
5682 /* The ffs function operates on `int'. */
5683 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
5684 = init_one_libfunc ("ffs");
5686 extendsfdf2_libfunc
= init_one_libfunc ("__extendsfdf2");
5687 extendsfxf2_libfunc
= init_one_libfunc ("__extendsfxf2");
5688 extendsftf2_libfunc
= init_one_libfunc ("__extendsftf2");
5689 extenddfxf2_libfunc
= init_one_libfunc ("__extenddfxf2");
5690 extenddftf2_libfunc
= init_one_libfunc ("__extenddftf2");
5692 truncdfsf2_libfunc
= init_one_libfunc ("__truncdfsf2");
5693 truncxfsf2_libfunc
= init_one_libfunc ("__truncxfsf2");
5694 trunctfsf2_libfunc
= init_one_libfunc ("__trunctfsf2");
5695 truncxfdf2_libfunc
= init_one_libfunc ("__truncxfdf2");
5696 trunctfdf2_libfunc
= init_one_libfunc ("__trunctfdf2");
5698 abort_libfunc
= init_one_libfunc ("abort");
5699 memcpy_libfunc
= init_one_libfunc ("memcpy");
5700 memmove_libfunc
= init_one_libfunc ("memmove");
5701 bcopy_libfunc
= init_one_libfunc ("bcopy");
5702 memcmp_libfunc
= init_one_libfunc ("memcmp");
5703 bcmp_libfunc
= init_one_libfunc ("__gcc_bcmp");
5704 memset_libfunc
= init_one_libfunc ("memset");
5705 bzero_libfunc
= init_one_libfunc ("bzero");
5706 setbits_libfunc
= init_one_libfunc ("__setbits");
5708 unwind_resume_libfunc
= init_one_libfunc (USING_SJLJ_EXCEPTIONS
5709 ? "_Unwind_SjLj_Resume"
5710 : "_Unwind_Resume");
5711 #ifndef DONT_USE_BUILTIN_SETJMP
5712 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
5713 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
5715 setjmp_libfunc
= init_one_libfunc ("setjmp");
5716 longjmp_libfunc
= init_one_libfunc ("longjmp");
5718 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
5719 unwind_sjlj_unregister_libfunc
5720 = init_one_libfunc ("_Unwind_SjLj_Unregister");
5722 eqhf2_libfunc
= init_one_libfunc ("__eqhf2");
5723 nehf2_libfunc
= init_one_libfunc ("__nehf2");
5724 gthf2_libfunc
= init_one_libfunc ("__gthf2");
5725 gehf2_libfunc
= init_one_libfunc ("__gehf2");
5726 lthf2_libfunc
= init_one_libfunc ("__lthf2");
5727 lehf2_libfunc
= init_one_libfunc ("__lehf2");
5728 unordhf2_libfunc
= init_one_libfunc ("__unordhf2");
5730 eqsf2_libfunc
= init_one_libfunc ("__eqsf2");
5731 nesf2_libfunc
= init_one_libfunc ("__nesf2");
5732 gtsf2_libfunc
= init_one_libfunc ("__gtsf2");
5733 gesf2_libfunc
= init_one_libfunc ("__gesf2");
5734 ltsf2_libfunc
= init_one_libfunc ("__ltsf2");
5735 lesf2_libfunc
= init_one_libfunc ("__lesf2");
5736 unordsf2_libfunc
= init_one_libfunc ("__unordsf2");
5738 eqdf2_libfunc
= init_one_libfunc ("__eqdf2");
5739 nedf2_libfunc
= init_one_libfunc ("__nedf2");
5740 gtdf2_libfunc
= init_one_libfunc ("__gtdf2");
5741 gedf2_libfunc
= init_one_libfunc ("__gedf2");
5742 ltdf2_libfunc
= init_one_libfunc ("__ltdf2");
5743 ledf2_libfunc
= init_one_libfunc ("__ledf2");
5744 unorddf2_libfunc
= init_one_libfunc ("__unorddf2");
5746 eqxf2_libfunc
= init_one_libfunc ("__eqxf2");
5747 nexf2_libfunc
= init_one_libfunc ("__nexf2");
5748 gtxf2_libfunc
= init_one_libfunc ("__gtxf2");
5749 gexf2_libfunc
= init_one_libfunc ("__gexf2");
5750 ltxf2_libfunc
= init_one_libfunc ("__ltxf2");
5751 lexf2_libfunc
= init_one_libfunc ("__lexf2");
5752 unordxf2_libfunc
= init_one_libfunc ("__unordxf2");
5754 eqtf2_libfunc
= init_one_libfunc ("__eqtf2");
5755 netf2_libfunc
= init_one_libfunc ("__netf2");
5756 gttf2_libfunc
= init_one_libfunc ("__gttf2");
5757 getf2_libfunc
= init_one_libfunc ("__getf2");
5758 lttf2_libfunc
= init_one_libfunc ("__lttf2");
5759 letf2_libfunc
= init_one_libfunc ("__letf2");
5760 unordtf2_libfunc
= init_one_libfunc ("__unordtf2");
5762 floatsisf_libfunc
= init_one_libfunc ("__floatsisf");
5763 floatdisf_libfunc
= init_one_libfunc ("__floatdisf");
5764 floattisf_libfunc
= init_one_libfunc ("__floattisf");
5766 floatsidf_libfunc
= init_one_libfunc ("__floatsidf");
5767 floatdidf_libfunc
= init_one_libfunc ("__floatdidf");
5768 floattidf_libfunc
= init_one_libfunc ("__floattidf");
5770 floatsixf_libfunc
= init_one_libfunc ("__floatsixf");
5771 floatdixf_libfunc
= init_one_libfunc ("__floatdixf");
5772 floattixf_libfunc
= init_one_libfunc ("__floattixf");
5774 floatsitf_libfunc
= init_one_libfunc ("__floatsitf");
5775 floatditf_libfunc
= init_one_libfunc ("__floatditf");
5776 floattitf_libfunc
= init_one_libfunc ("__floattitf");
5778 fixsfsi_libfunc
= init_one_libfunc ("__fixsfsi");
5779 fixsfdi_libfunc
= init_one_libfunc ("__fixsfdi");
5780 fixsfti_libfunc
= init_one_libfunc ("__fixsfti");
5782 fixdfsi_libfunc
= init_one_libfunc ("__fixdfsi");
5783 fixdfdi_libfunc
= init_one_libfunc ("__fixdfdi");
5784 fixdfti_libfunc
= init_one_libfunc ("__fixdfti");
5786 fixxfsi_libfunc
= init_one_libfunc ("__fixxfsi");
5787 fixxfdi_libfunc
= init_one_libfunc ("__fixxfdi");
5788 fixxfti_libfunc
= init_one_libfunc ("__fixxfti");
5790 fixtfsi_libfunc
= init_one_libfunc ("__fixtfsi");
5791 fixtfdi_libfunc
= init_one_libfunc ("__fixtfdi");
5792 fixtfti_libfunc
= init_one_libfunc ("__fixtfti");
5794 fixunssfsi_libfunc
= init_one_libfunc ("__fixunssfsi");
5795 fixunssfdi_libfunc
= init_one_libfunc ("__fixunssfdi");
5796 fixunssfti_libfunc
= init_one_libfunc ("__fixunssfti");
5798 fixunsdfsi_libfunc
= init_one_libfunc ("__fixunsdfsi");
5799 fixunsdfdi_libfunc
= init_one_libfunc ("__fixunsdfdi");
5800 fixunsdfti_libfunc
= init_one_libfunc ("__fixunsdfti");
5802 fixunsxfsi_libfunc
= init_one_libfunc ("__fixunsxfsi");
5803 fixunsxfdi_libfunc
= init_one_libfunc ("__fixunsxfdi");
5804 fixunsxfti_libfunc
= init_one_libfunc ("__fixunsxfti");
5806 fixunstfsi_libfunc
= init_one_libfunc ("__fixunstfsi");
5807 fixunstfdi_libfunc
= init_one_libfunc ("__fixunstfdi");
5808 fixunstfti_libfunc
= init_one_libfunc ("__fixunstfti");
5810 /* For function entry/exit instrumentation. */
5811 profile_function_entry_libfunc
5812 = init_one_libfunc ("__cyg_profile_func_enter");
5813 profile_function_exit_libfunc
5814 = init_one_libfunc ("__cyg_profile_func_exit");
5816 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
5817 gcov_init_libfunc
= init_one_libfunc ("__gcov_init");
5819 if (HAVE_conditional_trap
)
5820 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
5822 #ifdef INIT_TARGET_OPTABS
5823 /* Allow the target to add more libcalls or rename some, etc. */
5828 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
5829 CODE. Return 0 on failure. */
5832 gen_cond_trap (code
, op1
, op2
, tcode
)
5833 enum rtx_code code ATTRIBUTE_UNUSED
;
5834 rtx op1
, op2 ATTRIBUTE_UNUSED
, tcode ATTRIBUTE_UNUSED
;
5836 enum machine_mode mode
= GET_MODE (op1
);
5837 enum insn_code icode
;
5840 if (!HAVE_conditional_trap
)
5843 if (mode
== VOIDmode
)
5846 icode
= cmp_optab
->handlers
[(int) mode
].insn_code
;
5847 if (icode
== CODE_FOR_nothing
)
5851 op1
= prepare_operand (icode
, op1
, 0, mode
, mode
, 0);
5852 op2
= prepare_operand (icode
, op2
, 0, mode
, mode
, 0);
5853 emit_insn (GEN_FCN (icode
) (op1
, op2
));
5855 PUT_CODE (trap_rtx
, code
);
5856 insn
= gen_conditional_trap (trap_rtx
, tcode
);
5860 insn
= get_insns ();
5867 #include "gt-optabs.h"