1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
24 * The form of the input:
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
44 * The form of the output:
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
79 There are several rules on the usage of stack-like regs in
80 asm_operands insns. These rules apply only to the operands that are
83 1. Given a set of input regs that die in an asm_operands, it is
84 necessary to know which are implicitly popped by the asm, and
85 which must be explicitly popped by gcc.
87 An input reg that is implicitly popped by the asm must be
88 explicitly clobbered, unless it is constrained to match an
91 2. For any input reg that is implicitly popped by an asm, it is
92 necessary to know how to adjust the stack to compensate for the pop.
93 If any non-popped input is closer to the top of the reg-stack than
94 the implicitly popped reg, it would not be possible to know what the
95 stack looked like - it's not clear how the rest of the stack "slides
98 All implicitly popped input regs must be closer to the top of
99 the reg-stack than any input that is not implicitly popped.
101 3. It is possible that if an input dies in an insn, reload might
102 use the input reg for an output reload. Consider this example:
104 asm ("foo" : "=t" (a) : "f" (b));
106 This asm says that input B is not popped by the asm, and that
107 the asm pushes a result onto the reg-stack, ie, the stack is one
108 deeper after the asm than it was before. But, it is possible that
109 reload will think that it can use the same reg for both the input and
110 the output, if input B dies in this insn.
112 If any input operand uses the "f" constraint, all output reg
113 constraints must use the "&" earlyclobber.
115 The asm above would be written as
117 asm ("foo" : "=&t" (a) : "f" (b));
119 4. Some operands need to be in particular places on the stack. All
120 output operands fall in this category - there is no other way to
121 know which regs the outputs appear in unless the user indicates
122 this in the constraints.
124 Output operands must specifically indicate which reg an output
125 appears in after an asm. "=f" is not allowed: the operand
126 constraints must select a class with a single reg.
128 5. Output operands may not be "inserted" between existing stack regs.
129 Since no 387 opcode uses a read/write operand, all output operands
130 are dead before the asm_operands, and are pushed by the asm_operands.
131 It makes no sense to push anywhere but the top of the reg-stack.
133 Output operands must start at the top of the reg-stack: output
134 operands may not "skip" a reg.
136 6. Some asm statements may need extra stack space for internal
137 calculations. This can be guaranteed by clobbering stack registers
138 unrelated to the inputs and outputs.
140 Here are a couple of reasonable asms to want to write. This asm
141 takes one input, which is internally popped, and produces two outputs.
143 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
145 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
146 and replaces them with one output. The user must code the "st(1)"
147 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
149 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
158 #include "function.h"
159 #include "insn-config.h"
161 #include "hard-reg-set.h"
163 #include "insn-flags.h"
167 #include "basic-block.h"
172 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174 /* This is the basic stack record. TOP is an index into REG[] such
175 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177 If TOP is -2, REG[] is not yet initialized. Stack initialization
178 consists of placing each live reg in array `reg' and setting `top'
181 REG_SET indicates which registers are live. */
183 typedef struct stack_def
185 int top
; /* index to top stack element */
186 HARD_REG_SET reg_set
; /* set of live registers */
187 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
190 /* This is used to carry information about basic blocks. It is
191 attached to the AUX field of the standard CFG block. */
193 typedef struct block_info_def
195 struct stack_def stack_in
; /* Input stack configuration. */
196 HARD_REG_SET out_reg_set
; /* Stack regs live on output. */
197 int done
; /* True if block already converted. */
200 #define BLOCK_INFO(B) ((block_info) (B)->aux)
202 /* Passed to change_stack to indicate where to emit insns. */
209 /* We use this array to cache info about insns, because otherwise we
210 spend too much time in stack_regs_mentioned_p.
212 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
213 the insn uses stack registers, two indicates the insn does not use
215 static varray_type stack_regs_mentioned_data
;
217 /* The block we're currently working on. */
218 static basic_block current_block
;
220 /* This is the register file for all register after conversion */
222 FP_mode_reg
[LAST_STACK_REG
+1-FIRST_STACK_REG
][(int) MAX_MACHINE_MODE
];
224 #define FP_MODE_REG(regno,mode) \
225 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
227 /* Used to initialize uninitialized registers. */
230 /* Forward declarations */
232 static int stack_regs_mentioned_p
PROTO((rtx pat
));
233 static void straighten_stack
PROTO((rtx
, stack
));
234 static void pop_stack
PROTO((stack
, int));
235 static rtx
*get_true_reg
PROTO((rtx
*));
237 static int check_asm_stack_operands
PROTO((rtx
));
238 static int get_asm_operand_n_inputs
PROTO((rtx
));
239 static rtx stack_result
PROTO((tree
));
240 static void replace_reg
PROTO((rtx
*, int));
241 static void remove_regno_note
PROTO((rtx
, enum reg_note
, int));
242 static int get_hard_regnum
PROTO((stack
, rtx
));
243 static void delete_insn_for_stacker
PROTO((rtx
));
244 static rtx emit_pop_insn
PROTO((rtx
, stack
, rtx
,
246 static void emit_swap_insn
PROTO((rtx
, stack
, rtx
));
247 static void move_for_stack_reg
PROTO((rtx
, stack
, rtx
));
248 static int swap_rtx_condition_1
PROTO((rtx
));
249 static int swap_rtx_condition
PROTO((rtx
));
250 static void compare_for_stack_reg
PROTO((rtx
, stack
, rtx
));
251 static void subst_stack_regs_pat
PROTO((rtx
, stack
, rtx
));
252 static void subst_asm_stack_regs
PROTO((rtx
, stack
));
253 static void subst_stack_regs
PROTO((rtx
, stack
));
254 static void change_stack
PROTO((rtx
, stack
, stack
,
256 static int convert_regs_entry
PROTO((void));
257 static void convert_regs_exit
PROTO((void));
258 static int convert_regs_1
PROTO((FILE *, basic_block
));
259 static int convert_regs_2
PROTO((FILE *, basic_block
));
260 static int convert_regs
PROTO((FILE *));
261 static void print_stack
PROTO((FILE *, stack
));
263 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
266 stack_regs_mentioned_p (pat
)
269 register const char *fmt
;
272 if (STACK_REG_P (pat
))
275 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
276 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
282 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
283 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
286 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
293 /* Return nonzero if INSN mentions stacked registers, else return zero. */
296 stack_regs_mentioned (insn
)
299 unsigned int uid
, max
;
302 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
305 uid
= INSN_UID (insn
);
306 max
= VARRAY_SIZE (stack_regs_mentioned_data
);
309 /* Allocate some extra size to avoid too many reallocs, but
310 do not grow too quickly. */
311 max
= uid
+ uid
/ 20;
312 VARRAY_GROW (stack_regs_mentioned_data
, max
);
315 test
= VARRAY_CHAR (stack_regs_mentioned_data
, uid
);
318 /* This insn has yet to be examined. Do so now. */
319 test
= stack_regs_mentioned_p (PATTERN (insn
)) ? 1 : 2;
320 VARRAY_CHAR (stack_regs_mentioned_data
, uid
) = test
;
326 static rtx ix86_flags_rtx
;
329 next_flags_user (insn
)
332 /* Search forward looking for the first use of this value.
333 Stop at block boundaries. */
334 /* ??? This really cries for BLOCK_END! */
338 insn
= NEXT_INSN (insn
);
342 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
343 && reg_mentioned_p (ix86_flags_rtx
, PATTERN (insn
)))
346 if (GET_CODE (insn
) == JUMP_INSN
347 || GET_CODE (insn
) == CODE_LABEL
348 || GET_CODE (insn
) == CALL_INSN
)
353 /* Reorganise the stack into ascending numbers,
357 straighten_stack (insn
, regstack
)
361 struct stack_def temp_stack
;
364 /* If there is only a single register on the stack, then the stack is
365 already in increasing order and no reorganization is needed.
367 Similarly if the stack is empty. */
368 if (regstack
->top
<= 0)
371 COPY_HARD_REG_SET (temp_stack
.reg_set
, regstack
->reg_set
);
373 for (top
= temp_stack
.top
= regstack
->top
; top
>= 0; top
--)
374 temp_stack
.reg
[top
] = FIRST_STACK_REG
+ temp_stack
.top
- top
;
376 change_stack (insn
, regstack
, &temp_stack
, EMIT_AFTER
);
379 /* Pop a register from the stack */
382 pop_stack (regstack
, regno
)
386 int top
= regstack
->top
;
388 CLEAR_HARD_REG_BIT (regstack
->reg_set
, regno
);
390 /* If regno was not at the top of stack then adjust stack */
391 if (regstack
->reg
[top
] != regno
)
394 for (i
= regstack
->top
; i
>= 0; i
--)
395 if (regstack
->reg
[i
] == regno
)
398 for (j
= i
; j
< top
; j
++)
399 regstack
->reg
[j
] = regstack
->reg
[j
+ 1];
405 /* Convert register usage from "flat" register file usage to a "stack
406 register file. FIRST is the first insn in the function, FILE is the
409 Construct a CFG and run life analysis. Then convert each insn one
410 by one. Run a last jump_optimize pass, if optimizing, to eliminate
411 code duplication created when the converter inserts pop insns on
415 reg_to_stack (first
, file
)
423 /* See if there is something to do. Flow analysis is quite
424 expensive so we might save some compilation time. */
425 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
426 if (regs_ever_live
[i
])
428 if (i
> LAST_STACK_REG
)
431 /* Ok, floating point instructions exist. If not optimizing,
432 build the CFG and run life analysis. */
433 find_basic_blocks (first
, max_reg_num (), file
, 0);
434 count_or_remove_death_notes (NULL
, 1);
435 life_analysis (first
, max_reg_num (), file
, 0);
437 /* Set up block info for each basic block. */
438 bi
= (block_info
) alloca ((n_basic_blocks
+ 1) * sizeof (*bi
));
439 memset (bi
, 0, (n_basic_blocks
+ 1) * sizeof (*bi
));
440 for (i
= n_basic_blocks
- 1; i
>= 0; --i
)
441 BASIC_BLOCK (i
)->aux
= bi
+ i
;
442 EXIT_BLOCK_PTR
->aux
= bi
+ n_basic_blocks
;
444 /* Create the replacement registers up front. */
445 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
447 enum machine_mode mode
;
448 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
450 mode
= GET_MODE_WIDER_MODE (mode
))
451 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
452 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
454 mode
= GET_MODE_WIDER_MODE (mode
))
455 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
458 ix86_flags_rtx
= gen_rtx_REG (CCmode
, FLAGS_REG
);
460 /* A QNaN for initializing uninitialized variables.
462 ??? We can't load from constant memory in PIC mode, because
463 we're insertting these instructions before the prologue and
464 the PIC register hasn't been set up. In that case, fall back
465 on zero, which we can get from `ldz'. */
468 nan
= CONST0_RTX (SFmode
);
471 nan
= gen_lowpart (SFmode
, GEN_INT (0x7fc00000));
472 nan
= force_const_mem (SFmode
, nan
);
475 /* Allocate a cache for stack_regs_mentioned. */
476 max_uid
= get_max_uid ();
477 VARRAY_CHAR_INIT (stack_regs_mentioned_data
, max_uid
+ 1,
478 "stack_regs_mentioned cache");
480 if (convert_regs (file
) && optimize
)
482 jump_optimize (first
, JUMP_CROSS_JUMP_DEATH_MATTERS
,
483 !JUMP_NOOP_MOVES
, !JUMP_AFTER_REGSCAN
);
486 VARRAY_FREE (stack_regs_mentioned_data
);
489 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
490 label's chain of references, and note which insn contains each
494 record_label_references (insn
, pat
)
497 register enum rtx_code code
= GET_CODE (pat
);
499 register const char *fmt
;
501 if (code
== LABEL_REF
)
503 register rtx label
= XEXP (pat
, 0);
506 if (GET_CODE (label
) != CODE_LABEL
)
509 /* If this is an undefined label, LABEL_REFS (label) contains
511 if (INSN_UID (label
) == 0)
514 /* Don't make a duplicate in the code_label's chain. */
516 for (ref
= LABEL_REFS (label
);
518 ref
= LABEL_NEXTREF (ref
))
519 if (CONTAINING_INSN (ref
) == insn
)
522 CONTAINING_INSN (pat
) = insn
;
523 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
524 LABEL_REFS (label
) = pat
;
529 fmt
= GET_RTX_FORMAT (code
);
530 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
533 record_label_references (insn
, XEXP (pat
, i
));
537 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
538 record_label_references (insn
, XVECEXP (pat
, i
, j
));
543 /* Return a pointer to the REG expression within PAT. If PAT is not a
544 REG, possible enclosed by a conversion rtx, return the inner part of
545 PAT that stopped the search. */
552 switch (GET_CODE (*pat
))
555 /* Eliminate FP subregister accesses in favour of the
556 actual FP register in use. */
559 if (FP_REG_P (subreg
= SUBREG_REG (*pat
)))
561 *pat
= FP_MODE_REG (REGNO (subreg
) + SUBREG_WORD (*pat
),
570 pat
= & XEXP (*pat
, 0);
574 /* There are many rules that an asm statement for stack-like regs must
575 follow. Those rules are explained at the top of this file: the rule
576 numbers below refer to that explanation. */
579 check_asm_stack_operands (insn
)
584 int malformed_asm
= 0;
585 rtx body
= PATTERN (insn
);
587 char reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
588 char implicitly_dies
[FIRST_PSEUDO_REGISTER
];
592 int n_inputs
, n_outputs
;
594 /* Find out what the constraints require. If no constraint
595 alternative matches, this asm is malformed. */
597 constrain_operands (1);
598 alt
= which_alternative
;
600 preprocess_constraints ();
602 n_inputs
= get_asm_operand_n_inputs (body
);
603 n_outputs
= recog_data
.n_operands
- n_inputs
;
608 /* Avoid further trouble with this insn. */
609 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
613 /* Strip SUBREGs here to make the following code simpler. */
614 for (i
= 0; i
< recog_data
.n_operands
; i
++)
615 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
616 && GET_CODE (SUBREG_REG (recog_data
.operand
[i
])) == REG
)
617 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
619 /* Set up CLOBBER_REG. */
623 if (GET_CODE (body
) == PARALLEL
)
625 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
));
627 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
628 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
630 rtx clobber
= XVECEXP (body
, 0, i
);
631 rtx reg
= XEXP (clobber
, 0);
633 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
634 reg
= SUBREG_REG (reg
);
636 if (STACK_REG_P (reg
))
638 clobber_reg
[n_clobbers
] = reg
;
644 /* Enforce rule #4: Output operands must specifically indicate which
645 reg an output appears in after an asm. "=f" is not allowed: the
646 operand constraints must select a class with a single reg.
648 Also enforce rule #5: Output operands must start at the top of
649 the reg-stack: output operands may not "skip" a reg. */
651 memset (reg_used_as_output
, 0, sizeof (reg_used_as_output
));
652 for (i
= 0; i
< n_outputs
; i
++)
653 if (STACK_REG_P (recog_data
.operand
[i
]))
655 if (reg_class_size
[(int) recog_op_alt
[i
][alt
].class] != 1)
657 error_for_asm (insn
, "Output constraint %d must specify a single register", i
);
661 reg_used_as_output
[REGNO (recog_data
.operand
[i
])] = 1;
665 /* Search for first non-popped reg. */
666 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
667 if (! reg_used_as_output
[i
])
670 /* If there are any other popped regs, that's an error. */
671 for (; i
< LAST_STACK_REG
+ 1; i
++)
672 if (reg_used_as_output
[i
])
675 if (i
!= LAST_STACK_REG
+ 1)
677 error_for_asm (insn
, "Output regs must be grouped at top of stack");
681 /* Enforce rule #2: All implicitly popped input regs must be closer
682 to the top of the reg-stack than any input that is not implicitly
685 memset (implicitly_dies
, 0, sizeof (implicitly_dies
));
686 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
687 if (STACK_REG_P (recog_data
.operand
[i
]))
689 /* An input reg is implicitly popped if it is tied to an
690 output, or if there is a CLOBBER for it. */
693 for (j
= 0; j
< n_clobbers
; j
++)
694 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
697 if (j
< n_clobbers
|| recog_op_alt
[i
][alt
].matches
>= 0)
698 implicitly_dies
[REGNO (recog_data
.operand
[i
])] = 1;
701 /* Search for first non-popped reg. */
702 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
703 if (! implicitly_dies
[i
])
706 /* If there are any other popped regs, that's an error. */
707 for (; i
< LAST_STACK_REG
+ 1; i
++)
708 if (implicitly_dies
[i
])
711 if (i
!= LAST_STACK_REG
+ 1)
714 "Implicitly popped regs must be grouped at top of stack");
718 /* Enfore rule #3: If any input operand uses the "f" constraint, all
719 output constraints must use the "&" earlyclobber.
721 ??? Detect this more deterministically by having constrain_asm_operands
722 record any earlyclobber. */
724 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
725 if (recog_op_alt
[i
][alt
].matches
== -1)
729 for (j
= 0; j
< n_outputs
; j
++)
730 if (operands_match_p (recog_data
.operand
[j
], recog_data
.operand
[i
]))
733 "Output operand %d must use `&' constraint", j
);
740 /* Avoid further trouble with this insn. */
741 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
748 /* Calculate the number of inputs and outputs in BODY, an
749 asm_operands. N_OPERANDS is the total number of operands, and
750 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
754 get_asm_operand_n_inputs (body
)
757 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
758 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
760 else if (GET_CODE (body
) == ASM_OPERANDS
)
761 return ASM_OPERANDS_INPUT_LENGTH (body
);
763 else if (GET_CODE (body
) == PARALLEL
764 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
765 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
767 else if (GET_CODE (body
) == PARALLEL
768 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
769 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
774 /* If current function returns its result in an fp stack register,
775 return the REG. Otherwise, return 0. */
783 /* If the value is supposed to be returned in memory, then clearly
784 it is not returned in a stack register. */
785 if (aggregate_value_p (DECL_RESULT (decl
)))
788 result
= DECL_RTL (DECL_RESULT (decl
));
789 /* ?!? What is this code supposed to do? Can this code actually
790 trigger if we kick out aggregates above? */
792 && ! (GET_CODE (result
) == REG
793 && REGNO (result
) < FIRST_PSEUDO_REGISTER
))
795 #ifdef FUNCTION_OUTGOING_VALUE
797 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
799 result
= FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
803 return result
!= 0 && STACK_REG_P (result
) ? result
: 0;
808 * This section deals with stack register substitution, and forms the second
812 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
813 the desired hard REGNO. */
816 replace_reg (reg
, regno
)
820 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
821 || ! STACK_REG_P (*reg
))
824 switch (GET_MODE_CLASS (GET_MODE (*reg
)))
828 case MODE_COMPLEX_FLOAT
:;
831 *reg
= FP_MODE_REG (regno
, GET_MODE (*reg
));
834 /* Remove a note of type NOTE, which must be found, for register
835 number REGNO from INSN. Remove only one such note. */
838 remove_regno_note (insn
, note
, regno
)
843 register rtx
*note_link
, this;
845 note_link
= ®_NOTES(insn
);
846 for (this = *note_link
; this; this = XEXP (this, 1))
847 if (REG_NOTE_KIND (this) == note
848 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
850 *note_link
= XEXP (this, 1);
854 note_link
= &XEXP (this, 1);
859 /* Find the hard register number of virtual register REG in REGSTACK.
860 The hard register number is relative to the top of the stack. -1 is
861 returned if the register is not found. */
864 get_hard_regnum (regstack
, reg
)
870 if (! STACK_REG_P (reg
))
873 for (i
= regstack
->top
; i
>= 0; i
--)
874 if (regstack
->reg
[i
] == REGNO (reg
))
877 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
880 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
881 the chain of insns. Doing so could confuse block_begin and block_end
882 if this were the only insn in the block. */
885 delete_insn_for_stacker (insn
)
888 PUT_CODE (insn
, NOTE
);
889 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
890 NOTE_SOURCE_FILE (insn
) = 0;
893 /* Emit an insn to pop virtual register REG before or after INSN.
894 REGSTACK is the stack state after INSN and is updated to reflect this
895 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
896 is represented as a SET whose destination is the register to be popped
897 and source is the top of stack. A death note for the top of stack
898 cases the movdf pattern to pop. */
901 emit_pop_insn (insn
, regstack
, reg
, where
)
905 enum emit_where where
;
907 rtx pop_insn
, pop_rtx
;
910 hard_regno
= get_hard_regnum (regstack
, reg
);
912 if (hard_regno
< FIRST_STACK_REG
)
915 pop_rtx
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (hard_regno
, DFmode
),
916 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
918 if (where
== EMIT_AFTER
)
919 pop_insn
= emit_block_insn_after (pop_rtx
, insn
, current_block
);
921 pop_insn
= emit_block_insn_before (pop_rtx
, insn
, current_block
);
924 = gen_rtx_EXPR_LIST (REG_DEAD
, FP_MODE_REG (FIRST_STACK_REG
, DFmode
),
925 REG_NOTES (pop_insn
));
927 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
928 = regstack
->reg
[regstack
->top
];
930 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
935 /* Emit an insn before or after INSN to swap virtual register REG with
936 the top of stack. REGSTACK is the stack state before the swap, and
937 is updated to reflect the swap. A swap insn is represented as a
938 PARALLEL of two patterns: each pattern moves one reg to the other.
940 If REG is already at the top of the stack, no insn is emitted. */
943 emit_swap_insn (insn
, regstack
, reg
)
950 int tmp
, other_reg
; /* swap regno temps */
951 rtx i1
; /* the stack-reg insn prior to INSN */
952 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
954 hard_regno
= get_hard_regnum (regstack
, reg
);
956 if (hard_regno
< FIRST_STACK_REG
)
958 if (hard_regno
== FIRST_STACK_REG
)
961 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
963 tmp
= regstack
->reg
[other_reg
];
964 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
965 regstack
->reg
[regstack
->top
] = tmp
;
967 /* Find the previous insn involving stack regs, but don't pass a
970 if (current_block
&& insn
!= current_block
->head
)
972 rtx tmp
= PREV_INSN (insn
);
973 while (tmp
!= current_block
->head
)
975 if (GET_CODE (tmp
) == CODE_LABEL
976 || (GET_CODE (tmp
) == NOTE
977 && NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BASIC_BLOCK
)
978 || (GET_CODE (tmp
) == INSN
979 && stack_regs_mentioned (tmp
)))
984 tmp
= PREV_INSN (tmp
);
989 && (i1set
= single_set (i1
)) != NULL_RTX
)
991 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
992 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
994 /* If the previous register stack push was from the reg we are to
995 swap with, omit the swap. */
997 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == FIRST_STACK_REG
998 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == hard_regno
- 1
999 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1002 /* If the previous insn wrote to the reg we are to swap with,
1005 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == hard_regno
1006 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == FIRST_STACK_REG
1007 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1011 swap_rtx
= gen_swapxf (FP_MODE_REG (hard_regno
, XFmode
),
1012 FP_MODE_REG (FIRST_STACK_REG
, XFmode
));
1015 emit_block_insn_after (swap_rtx
, i1
, current_block
);
1016 else if (current_block
)
1018 i1
= emit_insn_before (swap_rtx
, current_block
->head
);
1019 current_block
->head
= i1
;
1022 emit_insn_before (swap_rtx
, insn
);
1025 /* Handle a move to or from a stack register in PAT, which is in INSN.
1026 REGSTACK is the current stack. */
1029 move_for_stack_reg (insn
, regstack
, pat
)
1034 rtx
*psrc
= get_true_reg (&SET_SRC (pat
));
1035 rtx
*pdest
= get_true_reg (&SET_DEST (pat
));
1039 src
= *psrc
; dest
= *pdest
;
1041 if (STACK_REG_P (src
) && STACK_REG_P (dest
))
1043 /* Write from one stack reg to another. If SRC dies here, then
1044 just change the register mapping and delete the insn. */
1046 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1051 /* If this is a no-op move, there must not be a REG_DEAD note. */
1052 if (REGNO (src
) == REGNO (dest
))
1055 for (i
= regstack
->top
; i
>= 0; i
--)
1056 if (regstack
->reg
[i
] == REGNO (src
))
1059 /* The source must be live, and the dest must be dead. */
1060 if (i
< 0 || get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1063 /* It is possible that the dest is unused after this insn.
1064 If so, just pop the src. */
1066 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1068 emit_pop_insn (insn
, regstack
, src
, EMIT_AFTER
);
1070 delete_insn_for_stacker (insn
);
1074 regstack
->reg
[i
] = REGNO (dest
);
1076 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1077 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1079 delete_insn_for_stacker (insn
);
1084 /* The source reg does not die. */
1086 /* If this appears to be a no-op move, delete it, or else it
1087 will confuse the machine description output patterns. But if
1088 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1089 for REG_UNUSED will not work for deleted insns. */
1091 if (REGNO (src
) == REGNO (dest
))
1093 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1094 emit_pop_insn (insn
, regstack
, dest
, EMIT_AFTER
);
1096 delete_insn_for_stacker (insn
);
1100 /* The destination ought to be dead */
1101 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1104 replace_reg (psrc
, get_hard_regnum (regstack
, src
));
1106 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1107 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1108 replace_reg (pdest
, FIRST_STACK_REG
);
1110 else if (STACK_REG_P (src
))
1112 /* Save from a stack reg to MEM, or possibly integer reg. Since
1113 only top of stack may be saved, emit an exchange first if
1116 emit_swap_insn (insn
, regstack
, src
);
1118 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1121 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1123 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1125 else if (GET_MODE (src
) == XFmode
&& regstack
->top
< REG_STACK_SIZE
- 1)
1127 /* A 387 cannot write an XFmode value to a MEM without
1128 clobbering the source reg. The output code can handle
1129 this by reading back the value from the MEM.
1130 But it is more efficient to use a temp register if one is
1131 available. Push the source value here if the register
1132 stack is not full, and then write the value to memory via
1134 rtx push_rtx
, push_insn
;
1135 rtx top_stack_reg
= FP_MODE_REG (FIRST_STACK_REG
, XFmode
);
1137 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1138 push_insn
= emit_insn_before (push_rtx
, insn
);
1139 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_DEAD
, top_stack_reg
,
1143 replace_reg (psrc
, FIRST_STACK_REG
);
1145 else if (STACK_REG_P (dest
))
1147 /* Load from MEM, or possibly integer REG or constant, into the
1148 stack regs. The actual target is always the top of the
1149 stack. The stack mapping is changed to reflect that DEST is
1150 now at top of stack. */
1152 /* The destination ought to be dead */
1153 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1156 if (regstack
->top
>= REG_STACK_SIZE
)
1159 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1160 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1161 replace_reg (pdest
, FIRST_STACK_REG
);
1167 /* Swap the condition on a branch, if there is one. Return true if we
1168 found a condition to swap. False if the condition was not used as
1172 swap_rtx_condition_1 (pat
)
1175 register const char *fmt
;
1176 register int i
, r
= 0;
1178 if (GET_RTX_CLASS (GET_CODE (pat
)) == '<')
1180 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1185 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1186 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1192 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1193 r
|= swap_rtx_condition_1 (XVECEXP (pat
, i
, j
));
1195 else if (fmt
[i
] == 'e')
1196 r
|= swap_rtx_condition_1 (XEXP (pat
, i
));
1204 swap_rtx_condition (insn
)
1207 rtx pat
= PATTERN (insn
);
1209 /* We're looking for a single set to cc0 or an HImode temporary. */
1211 if (GET_CODE (pat
) == SET
1212 && GET_CODE (SET_DEST (pat
)) == REG
1213 && REGNO (SET_DEST (pat
)) == FLAGS_REG
)
1215 insn
= next_flags_user (insn
);
1216 if (insn
== NULL_RTX
)
1218 pat
= PATTERN (insn
);
1221 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1222 not doing anything with the cc value right now. We may be able to
1223 search for one though. */
1225 if (GET_CODE (pat
) == SET
1226 && GET_CODE (SET_SRC (pat
)) == UNSPEC
1227 && XINT (SET_SRC (pat
), 1) == 9)
1229 rtx dest
= SET_DEST (pat
);
1231 /* Search forward looking for the first use of this value.
1232 Stop at block boundaries. */
1233 /* ??? This really cries for BLOCK_END! */
1236 insn
= NEXT_INSN (insn
);
1237 if (insn
== NULL_RTX
)
1239 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
1240 && reg_mentioned_p (dest
, insn
))
1242 if (GET_CODE (insn
) == JUMP_INSN
)
1244 if (GET_CODE (insn
) == CODE_LABEL
)
1248 /* So we've found the insn using this value. If it is anything
1249 other than sahf, aka unspec 10, or the value does not die
1250 (meaning we'd have to search further), then we must give up. */
1251 pat
= PATTERN (insn
);
1252 if (GET_CODE (pat
) != SET
1253 || GET_CODE (SET_SRC (pat
)) != UNSPEC
1254 || XINT (SET_SRC (pat
), 1) != 10
1255 || ! dead_or_set_p (insn
, dest
))
1258 /* Now we are prepared to handle this as a normal cc0 setter. */
1259 insn
= next_flags_user (insn
);
1260 if (insn
== NULL_RTX
)
1262 pat
= PATTERN (insn
);
1265 return swap_rtx_condition_1 (pat
);
1268 /* Handle a comparison. Special care needs to be taken to avoid
1269 causing comparisons that a 387 cannot do correctly, such as EQ.
1271 Also, a pop insn may need to be emitted. The 387 does have an
1272 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1273 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1277 compare_for_stack_reg (insn
, regstack
, pat_src
)
1283 rtx src1_note
, src2_note
;
1286 src1
= get_true_reg (&XEXP (pat_src
, 0));
1287 src2
= get_true_reg (&XEXP (pat_src
, 1));
1288 flags_user
= next_flags_user (insn
);
1290 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1291 registers that die in this insn - move those to stack top first. */
1292 if ((! STACK_REG_P (*src1
)
1293 || (STACK_REG_P (*src2
)
1294 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
1295 && swap_rtx_condition (insn
))
1298 temp
= XEXP (pat_src
, 0);
1299 XEXP (pat_src
, 0) = XEXP (pat_src
, 1);
1300 XEXP (pat_src
, 1) = temp
;
1302 src1
= get_true_reg (&XEXP (pat_src
, 0));
1303 src2
= get_true_reg (&XEXP (pat_src
, 1));
1305 INSN_CODE (insn
) = -1;
1308 /* We will fix any death note later. */
1310 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1312 if (STACK_REG_P (*src2
))
1313 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1315 src2_note
= NULL_RTX
;
1317 emit_swap_insn (insn
, regstack
, *src1
);
1319 replace_reg (src1
, FIRST_STACK_REG
);
1321 if (STACK_REG_P (*src2
))
1322 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1326 pop_stack (regstack
, REGNO (XEXP (src1_note
, 0)));
1327 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1330 /* If the second operand dies, handle that. But if the operands are
1331 the same stack register, don't bother, because only one death is
1332 needed, and it was just handled. */
1335 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
1336 && REGNO (*src1
) == REGNO (*src2
)))
1338 /* As a special case, two regs may die in this insn if src2 is
1339 next to top of stack and the top of stack also dies. Since
1340 we have already popped src1, "next to top of stack" is really
1341 at top (FIRST_STACK_REG) now. */
1343 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
1346 pop_stack (regstack
, REGNO (XEXP (src2_note
, 0)));
1347 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1351 /* The 386 can only represent death of the first operand in
1352 the case handled above. In all other cases, emit a separate
1353 pop and remove the death note from here. */
1355 /* link_cc0_insns (insn); */
1357 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
1359 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
1365 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1366 is the current register layout. */
1369 subst_stack_regs_pat (insn
, regstack
, pat
)
1376 switch (GET_CODE (pat
))
1379 /* Deaths in USE insns can happen in non optimizing compilation.
1380 Handle them by popping the dying register. */
1381 src
= get_true_reg (&XEXP (pat
, 0));
1382 if (STACK_REG_P (*src
)
1383 && find_regno_note (insn
, REG_DEAD
, REGNO (*src
)))
1385 emit_pop_insn (insn
, regstack
, *src
, EMIT_AFTER
);
1388 /* ??? Uninitialized USE should not happen. */
1389 else if (get_hard_regnum (regstack
, *src
) == -1)
1397 /* The fix_truncdi_1 pattern wants to be able to allocate it's
1398 own scratch register. It does this by clobbering an fp reg
1399 so that it is assured of an empty reg-stack register.
1400 If the register is live, kill it now. Remove the DEAD/UNUSED
1401 note so we don't try to kill it later too. */
1403 dest
= get_true_reg (&XEXP (pat
, 0));
1404 if (STACK_REG_P (*dest
))
1406 note
= find_reg_note (insn
, REG_DEAD
, *dest
);
1408 emit_pop_insn (insn
, regstack
, *dest
, EMIT_BEFORE
);
1411 note
= find_reg_note (insn
, REG_UNUSED
, *dest
);
1416 remove_note (insn
, note
);
1417 replace_reg (dest
, LAST_STACK_REG
);
1424 rtx
*src1
= (rtx
*) NULL_PTR
, *src2
;
1425 rtx src1_note
, src2_note
;
1428 dest
= get_true_reg (&SET_DEST (pat
));
1429 src
= get_true_reg (&SET_SRC (pat
));
1430 pat_src
= SET_SRC (pat
);
1432 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1433 if (STACK_REG_P (*src
)
1434 || (STACK_REG_P (*dest
)
1435 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
1436 || GET_CODE (*src
) == CONST_DOUBLE
)))
1438 move_for_stack_reg (insn
, regstack
, pat
);
1442 switch (GET_CODE (pat_src
))
1445 compare_for_stack_reg (insn
, regstack
, pat_src
);
1451 for (count
= HARD_REGNO_NREGS (REGNO (*dest
), GET_MODE (*dest
));
1454 regstack
->reg
[++regstack
->top
] = REGNO (*dest
) + count
;
1455 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
) + count
);
1458 replace_reg (dest
, FIRST_STACK_REG
);
1462 /* This is a `tstM2' case. */
1463 if (*dest
!= cc0_rtx
)
1469 case FLOAT_TRUNCATE
:
1473 /* These insns only operate on the top of the stack. DEST might
1474 be cc0_rtx if we're processing a tstM pattern. Also, it's
1475 possible that the tstM case results in a REG_DEAD note on the
1479 src1
= get_true_reg (&XEXP (pat_src
, 0));
1481 emit_swap_insn (insn
, regstack
, *src1
);
1483 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1485 if (STACK_REG_P (*dest
))
1486 replace_reg (dest
, FIRST_STACK_REG
);
1490 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1492 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1495 replace_reg (src1
, FIRST_STACK_REG
);
1500 /* On i386, reversed forms of subM3 and divM3 exist for
1501 MODE_FLOAT, so the same code that works for addM3 and mulM3
1505 /* These insns can accept the top of stack as a destination
1506 from a stack reg or mem, or can use the top of stack as a
1507 source and some other stack register (possibly top of stack)
1508 as a destination. */
1510 src1
= get_true_reg (&XEXP (pat_src
, 0));
1511 src2
= get_true_reg (&XEXP (pat_src
, 1));
1513 /* We will fix any death note later. */
1515 if (STACK_REG_P (*src1
))
1516 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1518 src1_note
= NULL_RTX
;
1519 if (STACK_REG_P (*src2
))
1520 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1522 src2_note
= NULL_RTX
;
1524 /* If either operand is not a stack register, then the dest
1525 must be top of stack. */
1527 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
1528 emit_swap_insn (insn
, regstack
, *dest
);
1531 /* Both operands are REG. If neither operand is already
1532 at the top of stack, choose to make the one that is the dest
1533 the new top of stack. */
1535 int src1_hard_regnum
, src2_hard_regnum
;
1537 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
1538 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
1539 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
1542 if (src1_hard_regnum
!= FIRST_STACK_REG
1543 && src2_hard_regnum
!= FIRST_STACK_REG
)
1544 emit_swap_insn (insn
, regstack
, *dest
);
1547 if (STACK_REG_P (*src1
))
1548 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1549 if (STACK_REG_P (*src2
))
1550 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1554 rtx src1_reg
= XEXP (src1_note
, 0);
1556 /* If the register that dies is at the top of stack, then
1557 the destination is somewhere else - merely substitute it.
1558 But if the reg that dies is not at top of stack, then
1559 move the top of stack to the dead reg, as though we had
1560 done the insn and then a store-with-pop. */
1562 if (REGNO (src1_reg
) == regstack
->reg
[regstack
->top
])
1564 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1565 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1569 int regno
= get_hard_regnum (regstack
, src1_reg
);
1571 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1572 replace_reg (dest
, regno
);
1574 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1575 = regstack
->reg
[regstack
->top
];
1578 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1579 REGNO (XEXP (src1_note
, 0)));
1580 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1585 rtx src2_reg
= XEXP (src2_note
, 0);
1586 if (REGNO (src2_reg
) == regstack
->reg
[regstack
->top
])
1588 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1589 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1593 int regno
= get_hard_regnum (regstack
, src2_reg
);
1595 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1596 replace_reg (dest
, regno
);
1598 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1599 = regstack
->reg
[regstack
->top
];
1602 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1603 REGNO (XEXP (src2_note
, 0)));
1604 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
1609 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1610 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1615 switch (XINT (pat_src
, 1))
1619 /* These insns only operate on the top of the stack. */
1621 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1623 emit_swap_insn (insn
, regstack
, *src1
);
1625 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1627 if (STACK_REG_P (*dest
))
1628 replace_reg (dest
, FIRST_STACK_REG
);
1632 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1634 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1637 replace_reg (src1
, FIRST_STACK_REG
);
1641 /* (unspec [(unspec [(compare ..)] 9)] 10)
1642 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1643 matches the PPRO fcomi instruction. */
1645 pat_src
= XVECEXP (pat_src
, 0, 0);
1646 if (GET_CODE (pat_src
) != UNSPEC
1647 || XINT (pat_src
, 1) != 9)
1652 /* (unspec [(compare ..)] 9) */
1653 /* Combined fcomp+fnstsw generated for doing well with
1654 CSE. When optimizing this would have been broken
1657 pat_src
= XVECEXP (pat_src
, 0, 0);
1658 if (GET_CODE (pat_src
) != COMPARE
)
1661 compare_for_stack_reg (insn
, regstack
, pat_src
);
1670 /* This insn requires the top of stack to be the destination. */
1672 /* If the comparison operator is an FP comparison operator,
1673 it is handled correctly by compare_for_stack_reg () who
1674 will move the destination to the top of stack. But if the
1675 comparison operator is not an FP comparison operator, we
1676 have to handle it here. */
1677 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
1678 && REGNO (*dest
) != regstack
->reg
[regstack
->top
])
1679 emit_swap_insn (insn
, regstack
, *dest
);
1681 src1
= get_true_reg (&XEXP (pat_src
, 1));
1682 src2
= get_true_reg (&XEXP (pat_src
, 2));
1684 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1685 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1692 src_note
[1] = src1_note
;
1693 src_note
[2] = src2_note
;
1695 if (STACK_REG_P (*src1
))
1696 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1697 if (STACK_REG_P (*src2
))
1698 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1700 for (i
= 1; i
<= 2; i
++)
1703 int regno
= REGNO (XEXP (src_note
[i
], 0));
1705 /* If the register that dies is not at the top of
1706 stack, then move the top of stack to the dead reg */
1707 if (regno
!= regstack
->reg
[regstack
->top
])
1709 remove_regno_note (insn
, REG_DEAD
, regno
);
1710 emit_pop_insn (insn
, regstack
, XEXP (src_note
[i
], 0),
1715 CLEAR_HARD_REG_BIT (regstack
->reg_set
, regno
);
1716 replace_reg (&XEXP (src_note
[i
], 0), FIRST_STACK_REG
);
1722 /* Make dest the top of stack. Add dest to regstack if
1724 if (get_hard_regnum (regstack
, *dest
) < FIRST_STACK_REG
)
1725 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1726 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1727 replace_reg (dest
, FIRST_STACK_REG
);
1741 /* Substitute hard regnums for any stack regs in INSN, which has
1742 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1743 before the insn, and is updated with changes made here.
1745 There are several requirements and assumptions about the use of
1746 stack-like regs in asm statements. These rules are enforced by
1747 record_asm_stack_regs; see comments there for details. Any
1748 asm_operands left in the RTL at this point may be assume to meet the
1749 requirements, since record_asm_stack_regs removes any problem asm. */
1752 subst_asm_stack_regs (insn
, regstack
)
1756 rtx body
= PATTERN (insn
);
1759 rtx
*note_reg
; /* Array of note contents */
1760 rtx
**note_loc
; /* Address of REG field of each note */
1761 enum reg_note
*note_kind
; /* The type of each note */
1766 struct stack_def temp_stack
;
1771 int n_inputs
, n_outputs
;
1773 if (! check_asm_stack_operands (insn
))
1776 /* Find out what the constraints required. If no constraint
1777 alternative matches, that is a compiler bug: we should have caught
1778 such an insn in check_asm_stack_operands. */
1779 extract_insn (insn
);
1780 constrain_operands (1);
1781 alt
= which_alternative
;
1783 preprocess_constraints ();
1785 n_inputs
= get_asm_operand_n_inputs (body
);
1786 n_outputs
= recog_data
.n_operands
- n_inputs
;
1791 /* Strip SUBREGs here to make the following code simpler. */
1792 for (i
= 0; i
< recog_data
.n_operands
; i
++)
1793 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
1794 && GET_CODE (SUBREG_REG (recog_data
.operand
[i
])) == REG
)
1796 recog_data
.operand_loc
[i
] = & SUBREG_REG (recog_data
.operand
[i
]);
1797 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
1800 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1802 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1805 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
1806 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
1807 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
1810 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1812 rtx reg
= XEXP (note
, 0);
1813 rtx
*loc
= & XEXP (note
, 0);
1815 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
1817 loc
= & SUBREG_REG (reg
);
1818 reg
= SUBREG_REG (reg
);
1821 if (STACK_REG_P (reg
)
1822 && (REG_NOTE_KIND (note
) == REG_DEAD
1823 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1825 note_reg
[n_notes
] = reg
;
1826 note_loc
[n_notes
] = loc
;
1827 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
1832 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1836 if (GET_CODE (body
) == PARALLEL
)
1838 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
));
1839 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
1841 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1842 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
1844 rtx clobber
= XVECEXP (body
, 0, i
);
1845 rtx reg
= XEXP (clobber
, 0);
1846 rtx
*loc
= & XEXP (clobber
, 0);
1848 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
1850 loc
= & SUBREG_REG (reg
);
1851 reg
= SUBREG_REG (reg
);
1854 if (STACK_REG_P (reg
))
1856 clobber_reg
[n_clobbers
] = reg
;
1857 clobber_loc
[n_clobbers
] = loc
;
1863 temp_stack
= *regstack
;
1865 /* Put the input regs into the desired place in TEMP_STACK. */
1867 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
1868 if (STACK_REG_P (recog_data
.operand
[i
])
1869 && reg_class_subset_p (recog_op_alt
[i
][alt
].class,
1871 && recog_op_alt
[i
][alt
].class != FLOAT_REGS
)
1873 /* If an operand needs to be in a particular reg in
1874 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1875 these constraints are for single register classes, and
1876 reload guaranteed that operand[i] is already in that class,
1877 we can just use REGNO (recog_data.operand[i]) to know which
1878 actual reg this operand needs to be in. */
1880 int regno
= get_hard_regnum (&temp_stack
, recog_data
.operand
[i
]);
1885 if (regno
!= REGNO (recog_data
.operand
[i
]))
1887 /* recog_data.operand[i] is not in the right place. Find
1888 it and swap it with whatever is already in I's place.
1889 K is where recog_data.operand[i] is now. J is where it
1893 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
1895 - (REGNO (recog_data
.operand
[i
]) - FIRST_STACK_REG
));
1897 temp
= temp_stack
.reg
[k
];
1898 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
1899 temp_stack
.reg
[j
] = temp
;
1903 /* Emit insns before INSN to make sure the reg-stack is in the right
1906 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
1908 /* Make the needed input register substitutions. Do death notes and
1909 clobbers too, because these are for inputs, not outputs. */
1911 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
1912 if (STACK_REG_P (recog_data
.operand
[i
]))
1914 int regnum
= get_hard_regnum (regstack
, recog_data
.operand
[i
]);
1919 replace_reg (recog_data
.operand_loc
[i
], regnum
);
1922 for (i
= 0; i
< n_notes
; i
++)
1923 if (note_kind
[i
] == REG_DEAD
)
1925 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
1930 replace_reg (note_loc
[i
], regnum
);
1933 for (i
= 0; i
< n_clobbers
; i
++)
1935 /* It's OK for a CLOBBER to reference a reg that is not live.
1936 Don't try to replace it in that case. */
1937 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
1941 /* Sigh - clobbers always have QImode. But replace_reg knows
1942 that these regs can't be MODE_INT and will abort. Just put
1943 the right reg there without calling replace_reg. */
1945 *clobber_loc
[i
] = FP_MODE_REG (regnum
, DFmode
);
1949 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
1951 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
1952 if (STACK_REG_P (recog_data
.operand
[i
]))
1954 /* An input reg is implicitly popped if it is tied to an
1955 output, or if there is a CLOBBER for it. */
1958 for (j
= 0; j
< n_clobbers
; j
++)
1959 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
1962 if (j
< n_clobbers
|| recog_op_alt
[i
][alt
].matches
>= 0)
1964 /* recog_data.operand[i] might not be at the top of stack.
1965 But that's OK, because all we need to do is pop the
1966 right number of regs off of the top of the reg-stack.
1967 record_asm_stack_regs guaranteed that all implicitly
1968 popped regs were grouped at the top of the reg-stack. */
1970 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1971 regstack
->reg
[regstack
->top
]);
1976 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
1977 Note that there isn't any need to substitute register numbers.
1978 ??? Explain why this is true. */
1980 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
1982 /* See if there is an output for this hard reg. */
1985 for (j
= 0; j
< n_outputs
; j
++)
1986 if (STACK_REG_P (recog_data
.operand
[j
])
1987 && REGNO (recog_data
.operand
[j
]) == i
)
1989 regstack
->reg
[++regstack
->top
] = i
;
1990 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
1995 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
1996 input that the asm didn't implicitly pop. If the asm didn't
1997 implicitly pop an input reg, that reg will still be live.
1999 Note that we can't use find_regno_note here: the register numbers
2000 in the death notes have already been substituted. */
2002 for (i
= 0; i
< n_outputs
; i
++)
2003 if (STACK_REG_P (recog_data
.operand
[i
]))
2007 for (j
= 0; j
< n_notes
; j
++)
2008 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2009 && note_kind
[j
] == REG_UNUSED
)
2011 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2017 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2018 if (STACK_REG_P (recog_data
.operand
[i
]))
2022 for (j
= 0; j
< n_notes
; j
++)
2023 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2024 && note_kind
[j
] == REG_DEAD
2025 && TEST_HARD_REG_BIT (regstack
->reg_set
,
2026 REGNO (recog_data
.operand
[i
])))
2028 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2035 /* Substitute stack hard reg numbers for stack virtual registers in
2036 INSN. Non-stack register numbers are not changed. REGSTACK is the
2037 current stack content. Insns may be emitted as needed to arrange the
2038 stack for the 387 based on the contents of the insn. */
2041 subst_stack_regs (insn
, regstack
)
2045 register rtx
*note_link
, note
;
2048 if (GET_CODE (insn
) == CALL_INSN
)
2050 int top
= regstack
->top
;
2052 /* If there are any floating point parameters to be passed in
2053 registers for this call, make sure they are in the right
2058 straighten_stack (PREV_INSN (insn
), regstack
);
2060 /* Now mark the arguments as dead after the call. */
2062 while (regstack
->top
>= 0)
2064 CLEAR_HARD_REG_BIT (regstack
->reg_set
, FIRST_STACK_REG
+ regstack
->top
);
2070 /* Do the actual substitution if any stack regs are mentioned.
2071 Since we only record whether entire insn mentions stack regs, and
2072 subst_stack_regs_pat only works for patterns that contain stack regs,
2073 we must check each pattern in a parallel here. A call_value_pop could
2076 if (stack_regs_mentioned (insn
))
2078 int n_operands
= asm_noperands (PATTERN (insn
));
2079 if (n_operands
>= 0)
2081 /* This insn is an `asm' with operands. Decode the operands,
2082 decide how many are inputs, and do register substitution.
2083 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2085 subst_asm_stack_regs (insn
, regstack
);
2089 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2090 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2092 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2093 subst_stack_regs_pat (insn
, regstack
,
2094 XVECEXP (PATTERN (insn
), 0, i
));
2097 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2100 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2101 REG_UNUSED will already have been dealt with, so just return. */
2103 if (GET_CODE (insn
) == NOTE
)
2106 /* If there is a REG_UNUSED note on a stack register on this insn,
2107 the indicated reg must be popped. The REG_UNUSED note is removed,
2108 since the form of the newly emitted pop insn references the reg,
2109 making it no longer `unset'. */
2111 note_link
= ®_NOTES(insn
);
2112 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2113 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2115 *note_link
= XEXP (note
, 1);
2116 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), EMIT_AFTER
);
2119 note_link
= &XEXP (note
, 1);
2122 /* Change the organization of the stack so that it fits a new basic
2123 block. Some registers might have to be popped, but there can never be
2124 a register live in the new block that is not now live.
2126 Insert any needed insns before or after INSN, as indicated by
2127 WHERE. OLD is the original stack layout, and NEW is the desired
2128 form. OLD is updated to reflect the code emitted, ie, it will be
2129 the same as NEW upon return.
2131 This function will not preserve block_end[]. But that information
2132 is no longer needed once this has executed. */
2135 change_stack (insn
, old
, new, where
)
2139 enum emit_where where
;
2144 /* We will be inserting new insns "backwards". If we are to insert
2145 after INSN, find the next insn, and insert before it. */
2147 if (where
== EMIT_AFTER
)
2149 if (current_block
&& current_block
->end
== insn
)
2151 insn
= NEXT_INSN (insn
);
2154 /* Pop any registers that are not needed in the new block. */
2156 for (reg
= old
->top
; reg
>= 0; reg
--)
2157 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2158 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[reg
], DFmode
),
2163 /* If the new block has never been processed, then it can inherit
2164 the old stack order. */
2166 new->top
= old
->top
;
2167 memcpy (new->reg
, old
->reg
, sizeof (new->reg
));
2171 /* This block has been entered before, and we must match the
2172 previously selected stack order. */
2174 /* By now, the only difference should be the order of the stack,
2175 not their depth or liveliness. */
2177 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2180 if (old
->top
!= new->top
)
2183 /* If the stack is not empty (new->top != -1), loop here emitting
2184 swaps until the stack is correct.
2186 The worst case number of swaps emitted is N + 2, where N is the
2187 depth of the stack. In some cases, the reg at the top of
2188 stack may be correct, but swapped anyway in order to fix
2189 other regs. But since we never swap any other reg away from
2190 its correct slot, this algorithm will converge. */
2195 /* Swap the reg at top of stack into the position it is
2196 supposed to be in, until the correct top of stack appears. */
2198 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2200 for (reg
= new->top
; reg
>= 0; reg
--)
2201 if (new->reg
[reg
] == old
->reg
[old
->top
])
2207 emit_swap_insn (insn
, old
,
2208 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2211 /* See if any regs remain incorrect. If so, bring an
2212 incorrect reg to the top of stack, and let the while loop
2215 for (reg
= new->top
; reg
>= 0; reg
--)
2216 if (new->reg
[reg
] != old
->reg
[reg
])
2218 emit_swap_insn (insn
, old
,
2219 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2224 /* At this point there must be no differences. */
2226 for (reg
= old
->top
; reg
>= 0; reg
--)
2227 if (old
->reg
[reg
] != new->reg
[reg
])
2232 current_block
->end
= PREV_INSN (insn
);
2235 /* Print stack configuration. */
2238 print_stack (file
, s
)
2246 fprintf (file
, "uninitialized\n");
2247 else if (s
->top
== -1)
2248 fprintf (file
, "empty\n");
2253 for (i
= 0; i
<= s
->top
; ++i
)
2254 fprintf (file
, "%d ", s
->reg
[i
]);
2255 fputs ("]\n", file
);
2259 /* This function was doing life analysis. We now let the regular live
2260 code do it's job, so we only need to check some extra invariants
2261 that reg-stack expects. Primary among these being that all registers
2262 are initialized before use.
2264 The function returns true when code was emitted to CFG edges and
2265 commit_edge_insertions needs to be called. */
2268 convert_regs_entry ()
2270 int inserted
= 0, i
;
2273 for (i
= n_basic_blocks
- 1; i
>= 0; --i
)
2275 basic_block block
= BASIC_BLOCK (i
);
2276 block_info bi
= BLOCK_INFO (block
);
2279 /* Set current register status at last instruction `uninitialized'. */
2280 bi
->stack_in
.top
= -2;
2282 /* Copy live_at_end and live_at_start into temporaries. */
2283 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; reg
++)
2285 if (REGNO_REG_SET_P (block
->global_live_at_end
, reg
))
2286 SET_HARD_REG_BIT (bi
->out_reg_set
, reg
);
2287 if (REGNO_REG_SET_P (block
->global_live_at_start
, reg
))
2288 SET_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
);
2292 /* Load something into each stack register live at function entry.
2293 Such live registers can be caused by uninitialized variables or
2294 functions not returning values on all paths. In order to keep
2295 the push/pop code happy, and to not scrog the register stack, we
2296 must put something in these registers. Use a QNaN.
2298 Note that we are insertting converted code here. This code is
2299 never seen by the convert_regs pass. */
2301 for (e
= ENTRY_BLOCK_PTR
->succ
; e
; e
= e
->succ_next
)
2303 basic_block block
= e
->dest
;
2304 block_info bi
= BLOCK_INFO (block
);
2307 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2308 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2312 bi
->stack_in
.reg
[++top
] = reg
;
2314 init
= gen_rtx_SET (VOIDmode
,
2315 FP_MODE_REG (FIRST_STACK_REG
, SFmode
),
2317 insert_insn_on_edge (init
, e
);
2321 bi
->stack_in
.top
= top
;
2327 /* Construct the desired stack for function exit. This will either
2328 be `empty', or the function return value at top-of-stack. */
2331 convert_regs_exit ()
2333 int value_reg_low
, value_reg_high
;
2337 retvalue
= stack_result (current_function_decl
);
2338 value_reg_low
= value_reg_high
= -1;
2341 value_reg_low
= REGNO (retvalue
);
2342 value_reg_high
= value_reg_low
2343 + HARD_REGNO_NREGS (value_reg_low
, GET_MODE (retvalue
)) - 1;
2346 output_stack
= &BLOCK_INFO (EXIT_BLOCK_PTR
)->stack_in
;
2347 if (value_reg_low
== -1)
2348 output_stack
->top
= -1;
2353 output_stack
->top
= value_reg_high
- value_reg_low
;
2354 for (reg
= value_reg_low
; reg
<= value_reg_high
; ++reg
)
2356 output_stack
->reg
[reg
- value_reg_low
] = reg
;
2357 SET_HARD_REG_BIT (output_stack
->reg_set
, reg
);
2362 /* Convert stack register references in one block. */
2365 convert_regs_1 (file
, block
)
2369 struct stack_def regstack
, tmpstack
;
2370 block_info bi
= BLOCK_INFO (block
);
2375 current_block
= block
;
2379 fprintf (file
, "\nBasic block %d\nInput stack: ", block
->index
);
2380 print_stack (file
, &bi
->stack_in
);
2383 /* Process all insns in this block. Keep track of NEXT so that we
2384 don't process insns emitted while substituting in INSN. */
2386 regstack
= bi
->stack_in
;
2390 next
= NEXT_INSN (insn
);
2392 /* Ensure we have not missed a block boundary. */
2395 if (insn
== block
->end
)
2398 /* Don't bother processing unless there is a stack reg
2399 mentioned or if it's a CALL_INSN. */
2400 if (stack_regs_mentioned (insn
)
2401 || GET_CODE (insn
) == CALL_INSN
)
2405 fprintf (file
, " insn %d input stack: ",
2407 print_stack (file
, ®stack
);
2409 subst_stack_regs (insn
, ®stack
);
2416 fprintf (file
, "Expected live registers [");
2417 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
2418 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
))
2419 fprintf (file
, " %d", reg
);
2420 fprintf (file
, " ]\nOutput stack: ");
2421 print_stack (file
, ®stack
);
2425 if (GET_CODE (insn
) == JUMP_INSN
)
2426 insn
= PREV_INSN (insn
);
2428 /* If the function is declared to return a value, but it returns one
2429 in only some cases, some registers might come live here. Emit
2430 necessary moves for them. */
2432 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
2434 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
)
2435 && ! TEST_HARD_REG_BIT (regstack
.reg_set
, reg
))
2441 fprintf (file
, "Emitting insn initializing reg %d\n",
2445 set
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (reg
, SFmode
),
2447 insn
= emit_block_insn_after (set
, insn
, block
);
2448 subst_stack_regs (insn
, ®stack
);
2452 /* Something failed if the stack lives don't match. */
2453 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, bi
->out_reg_set
, win
);
2457 /* Adjust the stack of this block on exit to match the stack of the
2458 target block, or copy stack info into the stack of the successor
2459 of the successor hasn't been processed yet. */
2461 for (e
= block
->succ
; e
; e
= e
->succ_next
)
2463 basic_block target
= e
->dest
;
2464 stack target_stack
= &BLOCK_INFO (target
)->stack_in
;
2467 fprintf (file
, "Edge to block %d: ", target
->index
);
2469 if (target_stack
->top
== -2)
2471 /* The target block hasn't had a stack order selected.
2472 We need merely ensure that no pops are needed. */
2473 for (reg
= regstack
.top
; reg
>= 0; --reg
)
2474 if (! TEST_HARD_REG_BIT (target_stack
->reg_set
,
2481 fprintf (file
, "new block; copying stack position\n");
2483 /* change_stack kills values in regstack. */
2484 tmpstack
= regstack
;
2486 change_stack (block
->end
, &tmpstack
,
2487 target_stack
, EMIT_AFTER
);
2492 fprintf (file
, "new block; pops needed\n");
2496 if (target_stack
->top
== regstack
.top
)
2498 for (reg
= target_stack
->top
; reg
>= 0; --reg
)
2499 if (target_stack
->reg
[reg
] != regstack
.reg
[reg
])
2505 fprintf (file
, "no changes needed\n");
2512 fprintf (file
, "correcting stack to ");
2513 print_stack (file
, target_stack
);
2517 /* Care for EH edges specially. The normal return path may return
2518 a value in st(0), but the EH path will not, and there's no need
2519 to add popping code to the edge. */
2520 if (e
->flags
& EDGE_EH
)
2522 /* Assert that the lifetimes are as we expect -- one value
2523 live at st(0) on the end of the source block, and no
2524 values live at the beginning of the destination block. */
2527 CLEAR_HARD_REG_SET (tmp
);
2528 GO_IF_HARD_REG_EQUAL (BLOCK_INFO (e
->dest
)->stack_in
.reg_set
,
2533 SET_HARD_REG_BIT (tmp
, FIRST_STACK_REG
);
2534 GO_IF_HARD_REG_EQUAL (BLOCK_INFO (e
->src
)->out_reg_set
, tmp
, eh2
);
2539 /* It is better to output directly to the end of the block
2540 instead of to the edge, because emit_swap can do minimal
2541 insn scheduling. We can do this when there is only one
2542 edge out, and it is not abnormal. */
2543 else if (block
->succ
->succ_next
== NULL
2544 && ! (e
->flags
& EDGE_ABNORMAL
))
2546 /* change_stack kills values in regstack. */
2547 tmpstack
= regstack
;
2549 change_stack (block
->end
, &tmpstack
, target_stack
,
2550 (GET_CODE (block
->end
) == JUMP_INSN
2551 ? EMIT_BEFORE
: EMIT_AFTER
));
2557 /* We don't support abnormal edges. Global takes care to
2558 avoid any live register across them, so we should never
2559 have to insert instructions on such edges. */
2560 if (e
->flags
& EDGE_ABNORMAL
)
2563 current_block
= NULL
;
2566 /* ??? change_stack needs some point to emit insns after.
2567 Also needed to keep gen_sequence from returning a
2568 pattern as opposed to a sequence, which would lose
2570 after
= emit_note (NULL
, NOTE_INSN_DELETED
);
2572 tmpstack
= regstack
;
2573 change_stack (after
, &tmpstack
, target_stack
, EMIT_BEFORE
);
2575 seq
= gen_sequence ();
2578 insert_insn_on_edge (seq
, e
);
2580 current_block
= block
;
2587 /* Convert registers in all blocks reachable from BLOCK. */
2590 convert_regs_2 (file
, block
)
2594 basic_block
*stack
, *sp
;
2597 stack
= (basic_block
*) alloca (sizeof (*stack
) * n_basic_blocks
);
2601 BLOCK_INFO (block
)->done
= 1;
2609 inserted
|= convert_regs_1 (file
, block
);
2611 for (e
= block
->succ
; e
; e
= e
->succ_next
)
2612 if (! BLOCK_INFO (e
->dest
)->done
)
2615 BLOCK_INFO (e
->dest
)->done
= 1;
2618 while (sp
!= stack
);
2623 /* Traverse all basic blocks in a function, converting the register
2624 references in each insn from the "flat" register file that gcc uses,
2625 to the stack-like registers the 387 uses. */
2634 /* Initialize uninitialized registers on function entry. */
2635 inserted
= convert_regs_entry ();
2637 /* Construct the desired stack for function exit. */
2638 convert_regs_exit ();
2639 BLOCK_INFO (EXIT_BLOCK_PTR
)->done
= 1;
2641 /* ??? Future: process inner loops first, and give them arbitrary
2642 initial stacks which emit_swap_insn can modify. This ought to
2643 prevent double fxch that aften appears at the head of a loop. */
2645 /* Process all blocks reachable from all entry points. */
2646 for (e
= ENTRY_BLOCK_PTR
->succ
; e
; e
= e
->succ_next
)
2647 inserted
|= convert_regs_2 (file
, e
->dest
);
2649 /* ??? Process all unreachable blocks. Though there's no excuse
2650 for keeping these even when not optimizing. */
2651 for (i
= 0; i
< n_basic_blocks
; ++i
)
2653 basic_block b
= BASIC_BLOCK (i
);
2654 block_info bi
= BLOCK_INFO (b
);
2660 /* Create an arbitrary input stack. */
2661 bi
->stack_in
.top
= -1;
2662 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2663 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2664 bi
->stack_in
.reg
[++bi
->stack_in
.top
] = reg
;
2666 inserted
|= convert_regs_2 (file
, b
);
2671 commit_edge_insertions ();
2678 #endif /* STACK_REGS */