1 ;; Hardware Transactional Memory (HTM) patterns.
2 ;; Copyright (C) 2013-2015 Free Software Foundation, Inc.
3 ;; Contributed by Peter Bergner <bergner@vnet.ibm.com>.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 3, or (at your
10 ;; option) any later version.
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ;; License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
30 ;; UNSPEC_VOLATILE usage
33 (define_c_enum "unspecv"
50 (define_expand "tabort"
52 (unspec_volatile:CC [(match_operand:SI 1 "int_reg_operand" "")]
57 (set (match_operand:SI 0 "int_reg_operand" "")
62 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
63 operands[3] = gen_reg_rtx (SImode);
66 (define_insn "*tabort_internal"
67 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
68 (unspec_volatile:CC [(match_operand:SI 0 "int_reg_operand" "r")]
72 [(set_attr "type" "htm")
73 (set_attr "length" "4")])
75 (define_expand "tabortdc"
77 (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
78 (match_operand:SI 2 "gpc_reg_operand" "r")
79 (match_operand:SI 3 "gpc_reg_operand" "r")]
80 UNSPECV_HTM_TABORTDC))
84 (set (match_operand:SI 0 "int_reg_operand" "")
89 operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
90 operands[5] = gen_reg_rtx (SImode);
93 (define_insn "*tabortdc_internal"
94 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
95 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
96 (match_operand:SI 1 "gpc_reg_operand" "r")
97 (match_operand:SI 2 "gpc_reg_operand" "r")]
98 UNSPECV_HTM_TABORTDC))]
101 [(set_attr "type" "htm")
102 (set_attr "length" "4")])
104 (define_expand "tabortdci"
106 (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
107 (match_operand:SI 2 "gpc_reg_operand" "r")
108 (match_operand 3 "s5bit_cint_operand" "n")]
109 UNSPECV_HTM_TABORTDCI))
113 (set (match_operand:SI 0 "int_reg_operand" "")
114 (xor:SI (match_dup 5)
118 operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
119 operands[5] = gen_reg_rtx (SImode);
122 (define_insn "*tabortdci_internal"
123 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
124 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
125 (match_operand:SI 1 "gpc_reg_operand" "r")
126 (match_operand 2 "s5bit_cint_operand" "n")]
127 UNSPECV_HTM_TABORTDCI))]
129 "tabortdci. %0,%1,%2"
130 [(set_attr "type" "htm")
131 (set_attr "length" "4")])
133 (define_expand "tabortwc"
135 (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
136 (match_operand:SI 2 "gpc_reg_operand" "r")
137 (match_operand:SI 3 "gpc_reg_operand" "r")]
138 UNSPECV_HTM_TABORTWC))
142 (set (match_operand:SI 0 "int_reg_operand" "")
143 (xor:SI (match_dup 5)
147 operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
148 operands[5] = gen_reg_rtx (SImode);
151 (define_insn "*tabortwc_internal"
152 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
153 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
154 (match_operand:SI 1 "gpc_reg_operand" "r")
155 (match_operand:SI 2 "gpc_reg_operand" "r")]
156 UNSPECV_HTM_TABORTWC))]
159 [(set_attr "type" "htm")
160 (set_attr "length" "4")])
162 (define_expand "tabortwci"
164 (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
165 (match_operand:SI 2 "gpc_reg_operand" "r")
166 (match_operand 3 "s5bit_cint_operand" "n")]
167 UNSPECV_HTM_TABORTWCI))
171 (set (match_operand:SI 0 "int_reg_operand" "")
172 (xor:SI (match_dup 5)
176 operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
177 operands[5] = gen_reg_rtx (SImode);
180 (define_expand "ttest"
182 (unspec_volatile:CC [(const_int 0)
185 UNSPECV_HTM_TABORTWCI))
186 (set (subreg:CC (match_dup 2) 0) (match_dup 1))
187 (set (match_dup 3) (lshiftrt:SI (match_dup 2) (const_int 28)))
188 (set (match_operand:SI 0 "int_reg_operand" "")
189 (and:SI (match_dup 3)
193 operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);
194 operands[2] = gen_reg_rtx (SImode);
195 operands[3] = gen_reg_rtx (SImode);
198 (define_insn "*tabortwci_internal"
199 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
200 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
201 (match_operand:SI 1 "gpc_reg_operand" "r")
202 (match_operand 2 "s5bit_cint_operand" "n")]
203 UNSPECV_HTM_TABORTWCI))]
205 "tabortwci. %0,%1,%2"
206 [(set_attr "type" "htm")
207 (set_attr "length" "4")])
209 (define_expand "tbegin"
211 (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]
216 (set (match_operand:SI 0 "int_reg_operand" "")
217 (xor:SI (match_dup 3)
221 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
222 operands[3] = gen_reg_rtx (SImode);
225 (define_insn "*tbegin_internal"
226 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
227 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
228 UNSPECV_HTM_TBEGIN))]
231 [(set_attr "type" "htm")
232 (set_attr "length" "4")])
234 (define_expand "tcheck"
236 (unspec_volatile:CC [(match_operand 1 "u3bit_cint_operand" "n")]
241 (set (match_operand:SI 0 "int_reg_operand" "")
242 (xor:SI (match_dup 3)
246 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
247 operands[3] = gen_reg_rtx (SImode);
250 (define_insn "*tcheck_internal"
251 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
252 (unspec_volatile:CC [(match_operand 0 "u3bit_cint_operand" "n")]
253 UNSPECV_HTM_TCHECK))]
256 [(set_attr "type" "htm")
257 (set_attr "length" "4")])
259 (define_expand "tend"
261 (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]
266 (set (match_operand:SI 0 "int_reg_operand" "")
267 (xor:SI (match_dup 3)
271 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
272 operands[3] = gen_reg_rtx (SImode);
275 (define_insn "*tend_internal"
276 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
277 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
281 [(set_attr "type" "htm")
282 (set_attr "length" "4")])
284 (define_expand "trechkpt"
286 (unspec_volatile:CC [(const_int 0)]
287 UNSPECV_HTM_TRECHKPT))
291 (set (match_operand:SI 0 "int_reg_operand" "")
292 (xor:SI (match_dup 2)
296 operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);
297 operands[2] = gen_reg_rtx (SImode);
300 (define_insn "*trechkpt_internal"
301 [(set (match_operand:CC 0 "cc_reg_operand" "=x")
302 (unspec_volatile:CC [(const_int 0)]
303 UNSPECV_HTM_TRECHKPT))]
306 [(set_attr "type" "htm")
307 (set_attr "length" "4")])
309 (define_expand "treclaim"
311 (unspec_volatile:CC [(match_operand:SI 1 "gpc_reg_operand" "r")]
312 UNSPECV_HTM_TRECLAIM))
316 (set (match_operand:SI 0 "int_reg_operand" "")
317 (xor:SI (match_dup 3)
321 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
322 operands[3] = gen_reg_rtx (SImode);
325 (define_insn "*treclaim_internal"
326 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
327 (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
328 UNSPECV_HTM_TRECLAIM))]
331 [(set_attr "type" "htm")
332 (set_attr "length" "4")])
336 (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]
341 (set (match_operand:SI 0 "int_reg_operand" "")
342 (xor:SI (match_dup 3)
346 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
347 operands[3] = gen_reg_rtx (SImode);
350 (define_insn "*tsr_internal"
351 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
352 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
356 [(set_attr "type" "htm")
357 (set_attr "length" "4")])
359 (define_insn "htm_mfspr_<mode>"
360 [(set (match_operand:P 0 "gpc_reg_operand" "=r")
361 (unspec_volatile:P [(match_operand 1 "u10bit_cint_operand" "n")
362 (match_operand:P 2 "htm_spr_reg_operand" "")]
366 [(set_attr "type" "htm")
367 (set_attr "length" "4")])
369 (define_insn "htm_mtspr_<mode>"
370 [(set (match_operand:P 2 "htm_spr_reg_operand" "")
371 (unspec_volatile:P [(match_operand:P 0 "gpc_reg_operand" "r")
372 (match_operand 1 "u10bit_cint_operand" "n")]
376 [(set_attr "type" "htm")
377 (set_attr "length" "4")])