1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
24 * The form of the input:
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
44 * The form of the output:
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
77 Before life analysis, the mode of each insn is set based on whether
78 or not any stack registers are mentioned within that insn. VOIDmode
79 means that no regs are mentioned anyway, and QImode means that at
80 least one pattern within the insn mentions stack registers. This
81 information is valid until after reg_to_stack returns, and is used
86 There are several rules on the usage of stack-like regs in
87 asm_operands insns. These rules apply only to the operands that are
90 1. Given a set of input regs that die in an asm_operands, it is
91 necessary to know which are implicitly popped by the asm, and
92 which must be explicitly popped by gcc.
94 An input reg that is implicitly popped by the asm must be
95 explicitly clobbered, unless it is constrained to match an
98 2. For any input reg that is implicitly popped by an asm, it is
99 necessary to know how to adjust the stack to compensate for the pop.
100 If any non-popped input is closer to the top of the reg-stack than
101 the implicitly popped reg, it would not be possible to know what the
102 stack looked like - it's not clear how the rest of the stack "slides
105 All implicitly popped input regs must be closer to the top of
106 the reg-stack than any input that is not implicitly popped.
108 3. It is possible that if an input dies in an insn, reload might
109 use the input reg for an output reload. Consider this example:
111 asm ("foo" : "=t" (a) : "f" (b));
113 This asm says that input B is not popped by the asm, and that
114 the asm pushes a result onto the reg-stack, ie, the stack is one
115 deeper after the asm than it was before. But, it is possible that
116 reload will think that it can use the same reg for both the input and
117 the output, if input B dies in this insn.
119 If any input operand uses the "f" constraint, all output reg
120 constraints must use the "&" earlyclobber.
122 The asm above would be written as
124 asm ("foo" : "=&t" (a) : "f" (b));
126 4. Some operands need to be in particular places on the stack. All
127 output operands fall in this category - there is no other way to
128 know which regs the outputs appear in unless the user indicates
129 this in the constraints.
131 Output operands must specifically indicate which reg an output
132 appears in after an asm. "=f" is not allowed: the operand
133 constraints must select a class with a single reg.
135 5. Output operands may not be "inserted" between existing stack regs.
136 Since no 387 opcode uses a read/write operand, all output operands
137 are dead before the asm_operands, and are pushed by the asm_operands.
138 It makes no sense to push anywhere but the top of the reg-stack.
140 Output operands must start at the top of the reg-stack: output
141 operands may not "skip" a reg.
143 6. Some asm statements may need extra stack space for internal
144 calculations. This can be guaranteed by clobbering stack registers
145 unrelated to the inputs and outputs.
147 Here are a couple of reasonable asms to want to write. This asm
148 takes one input, which is internally popped, and produces two outputs.
150 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
152 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
153 and replaces them with one output. The user must code the "st(1)"
154 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
156 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
164 #include "insn-config.h"
166 #include "hard-reg-set.h"
171 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
173 /* This is the basic stack record. TOP is an index into REG[] such
174 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
176 If TOP is -2, REG[] is not yet initialized. Stack initialization
177 consists of placing each live reg in array `reg' and setting `top'
180 REG_SET indicates which registers are live. */
182 typedef struct stack_def
184 int top
; /* index to top stack element */
185 HARD_REG_SET reg_set
; /* set of live registers */
186 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
189 /* highest instruction uid */
190 static int max_uid
= 0;
192 /* Number of basic blocks in the current function. */
195 /* Element N is first insn in basic block N.
196 This info lasts until we finish compiling the function. */
197 static rtx
*block_begin
;
199 /* Element N is last insn in basic block N.
200 This info lasts until we finish compiling the function. */
201 static rtx
*block_end
;
203 /* Element N is nonzero if control can drop into basic block N */
204 static char *block_drops_in
;
206 /* Element N says all about the stack at entry block N */
207 static stack block_stack_in
;
209 /* Element N says all about the stack life at the end of block N */
210 static HARD_REG_SET
*block_out_reg_set
;
212 /* This is where the BLOCK_NUM values are really stored. This is set
213 up by find_blocks and used there and in life_analysis. It can be used
214 later, but only to look up an insn that is the head or tail of some
215 block. life_analysis and the stack register conversion process can
216 add insns within a block. */
217 static int *block_number
;
219 /* This is the register file for all register after conversion */
221 FP_mode_reg
[LAST_STACK_REG
+1-FIRST_STACK_REG
][(int) MAX_MACHINE_MODE
];
223 #define FP_MODE_REG(regno,mode) \
224 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
226 /* Get the basic block number of an insn. See note at block_number
227 definition are validity of this information. */
229 #define BLOCK_NUM(INSN) \
230 ((INSN_UID (INSN) > max_uid) \
231 ? (abort() , -1) : block_number[INSN_UID (INSN)])
233 extern rtx forced_labels
;
234 extern rtx
gen_jump ();
235 extern rtx
gen_movdf (), gen_movxf ();
236 extern rtx
find_regno_note ();
237 extern rtx
emit_jump_insn_before ();
238 extern rtx
emit_label_after ();
240 /* Forward declarations */
242 static void find_blocks ();
243 static uses_reg_or_mem ();
244 static void stack_reg_life_analysis ();
245 static void record_reg_life_pat ();
246 static void change_stack ();
247 static void convert_regs ();
248 static void dump_stack_info ();
250 /* Mark all registers needed for this pattern. */
253 mark_regs_pat (pat
, set
)
257 enum machine_mode mode
;
261 if (GET_CODE (pat
) == SUBREG
)
263 mode
= GET_MODE (pat
);
264 regno
= SUBREG_WORD (pat
);
265 regno
+= REGNO (SUBREG_REG (pat
));
268 regno
= REGNO (pat
), mode
= GET_MODE (pat
);
270 for (count
= HARD_REGNO_NREGS (regno
, mode
);
271 count
; count
--, regno
++)
272 SET_HARD_REG_BIT (*set
, regno
);
275 /* Reorganise the stack into ascending numbers,
279 straighten_stack (insn
, regstack
)
283 struct stack_def temp_stack
;
286 temp_stack
.reg_set
= regstack
->reg_set
;
288 for (top
= temp_stack
.top
= regstack
->top
; top
>= 0; top
--)
289 temp_stack
.reg
[top
] = FIRST_STACK_REG
+ temp_stack
.top
- top
;
291 change_stack (insn
, regstack
, &temp_stack
, emit_insn_after
);
294 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
297 stack_regs_mentioned_p (pat
)
303 if (STACK_REG_P (pat
))
306 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
307 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
313 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
314 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
317 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
324 /* Convert register usage from "flat" register file usage to a "stack
325 register file. FIRST is the first insn in the function, FILE is the
328 First compute the beginning and end of each basic block. Do a
329 register life analysis on the stack registers, recording the result
330 for the head and tail of each basic block. The convert each insn one
331 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
332 any cross-jumping created when the converter inserts pop insns.*/
335 reg_to_stack (first
, file
)
341 int stack_reg_seen
= 0;
342 enum machine_mode mode
;
343 HARD_REG_SET stackentry
;
345 CLEAR_HARD_REG_SET (stackentry
);
352 initialised
= 1; /* This array can not have been previously
353 initialised, because the rtx's are
354 thrown away between compilations of
357 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
359 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
360 mode
= GET_MODE_WIDER_MODE (mode
))
361 FP_MODE_REG (i
, mode
) = gen_rtx (REG
, mode
, i
);
362 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
); mode
!= VOIDmode
;
363 mode
= GET_MODE_WIDER_MODE (mode
))
364 FP_MODE_REG (i
, mode
) = gen_rtx (REG
, mode
, i
);
369 /* Count the basic blocks. Also find maximum insn uid. */
371 register RTX_CODE prev_code
= BARRIER
;
372 register RTX_CODE code
;
373 register before_function_beg
= 1;
377 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
379 /* Note that this loop must select the same block boundaries
380 as code in find_blocks. Also note that this code is not the
381 same as that used in flow.c. */
383 if (INSN_UID (insn
) > max_uid
)
384 max_uid
= INSN_UID (insn
);
386 code
= GET_CODE (insn
);
388 if (code
== CODE_LABEL
389 || (prev_code
!= INSN
390 && prev_code
!= CALL_INSN
391 && prev_code
!= CODE_LABEL
392 && GET_RTX_CLASS (code
) == 'i'))
395 if (code
== NOTE
&& NOTE_LINE_NUMBER (insn
) == NOTE_INSN_FUNCTION_BEG
)
396 before_function_beg
= 0;
398 /* Remember whether or not this insn mentions an FP regs.
399 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
401 if (GET_RTX_CLASS (code
) == 'i'
402 && stack_regs_mentioned_p (PATTERN (insn
)))
405 PUT_MODE (insn
, QImode
);
407 /* Note any register passing parameters. */
409 if (before_function_beg
&& code
== INSN
410 && GET_CODE (PATTERN (insn
)) == USE
)
411 record_reg_life_pat (PATTERN (insn
), (HARD_REG_SET
*) 0,
415 PUT_MODE (insn
, VOIDmode
);
417 if (code
== CODE_LABEL
)
418 LABEL_REFS (insn
) = insn
; /* delete old chain */
425 /* If no stack register reference exists in this insn, there isn't
426 anything to convert. */
428 if (! stack_reg_seen
)
431 /* If there are stack registers, there must be at least one block. */
436 /* Allocate some tables that last till end of compiling this function
437 and some needed only in find_blocks and life_analysis. */
439 block_begin
= (rtx
*) alloca (blocks
* sizeof (rtx
));
440 block_end
= (rtx
*) alloca (blocks
* sizeof (rtx
));
441 block_drops_in
= (char *) alloca (blocks
);
443 block_stack_in
= (stack
) alloca (blocks
* sizeof (struct stack_def
));
444 block_out_reg_set
= (HARD_REG_SET
*) alloca (blocks
* sizeof (HARD_REG_SET
));
445 bzero ((char *) block_stack_in
, blocks
* sizeof (struct stack_def
));
446 bzero ((char *) block_out_reg_set
, blocks
* sizeof (HARD_REG_SET
));
448 block_number
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
451 stack_reg_life_analysis (first
, &stackentry
);
453 /* Dump the life analysis debug information before jump
454 optimization, as that will destroy the LABEL_REFS we keep the
458 dump_stack_info (file
);
463 jump_optimize (first
, 2, 0, 0);
466 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
467 label's chain of references, and note which insn contains each
471 record_label_references (insn
, pat
)
474 register enum rtx_code code
= GET_CODE (pat
);
478 if (code
== LABEL_REF
)
480 register rtx label
= XEXP (pat
, 0);
483 if (GET_CODE (label
) != CODE_LABEL
)
486 /* Don't make a duplicate in the code_label's chain. */
488 for (ref
= LABEL_REFS (label
);
490 ref
= LABEL_NEXTREF (ref
))
491 if (CONTAINING_INSN (ref
) == insn
)
494 CONTAINING_INSN (pat
) = insn
;
495 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
496 LABEL_REFS (label
) = pat
;
501 fmt
= GET_RTX_FORMAT (code
);
502 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
505 record_label_references (insn
, XEXP (pat
, i
));
509 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
510 record_label_references (insn
, XVECEXP (pat
, i
, j
));
515 /* Return a pointer to the REG expression within PAT. If PAT is not a
516 REG, possible enclosed by a conversion rtx, return the inner part of
517 PAT that stopped the search. */
524 switch (GET_CODE (*pat
))
527 /* eliminate FP subregister accesses in favour of the
528 actual FP register in use. */
531 if (FP_REG_P (subreg
= SUBREG_REG (*pat
)))
533 *pat
= FP_MODE_REG (REGNO (subreg
) + SUBREG_WORD (*pat
),
542 pat
= & XEXP (*pat
, 0);
546 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
547 N_OPERANDS is the total number of operands. Return which alternative
548 matched, or -1 is no alternative matches.
550 OPERAND_MATCHES is an array which indicates which operand this
551 operand matches due to the constraints, or -1 if no match is required.
552 If two operands match by coincidence, but are not required to match by
553 the constraints, -1 is returned.
555 OPERAND_CLASS is an array which indicates the smallest class
556 required by the constraints. If the alternative that matches calls
557 for some class `class', and the operand matches a subclass of `class',
558 OPERAND_CLASS is set to `class' as required by the constraints, not to
559 the subclass. If an alternative allows more than one class,
560 OPERAND_CLASS is set to the smallest class that is a union of the
564 constrain_asm_operands (n_operands
, operands
, operand_constraints
,
565 operand_matches
, operand_class
)
568 char **operand_constraints
;
569 int *operand_matches
;
570 enum reg_class
*operand_class
;
572 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
574 int this_alternative
, this_operand
;
578 for (j
= 0; j
< n_operands
; j
++)
579 constraints
[j
] = operand_constraints
[j
];
581 /* Compute the number of alternatives in the operands. reload has
582 already guaranteed that all operands have the same number of
586 for (q
= constraints
[0]; *q
; q
++)
587 n_alternatives
+= (*q
== ',');
589 this_alternative
= 0;
590 while (this_alternative
< n_alternatives
)
595 /* No operands match, no narrow class requirements yet. */
596 for (i
= 0; i
< n_operands
; i
++)
598 operand_matches
[i
] = -1;
599 operand_class
[i
] = NO_REGS
;
602 for (this_operand
= 0; this_operand
< n_operands
; this_operand
++)
604 rtx op
= operands
[this_operand
];
605 enum machine_mode mode
= GET_MODE (op
);
606 char *p
= constraints
[this_operand
];
611 if (GET_CODE (op
) == SUBREG
)
613 if (GET_CODE (SUBREG_REG (op
)) == REG
614 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
615 offset
= SUBREG_WORD (op
);
616 op
= SUBREG_REG (op
);
619 /* An empty constraint or empty alternative
620 allows anything which matched the pattern. */
621 if (*p
== 0 || *p
== ',')
624 while (*p
&& (c
= *p
++) != ',')
638 /* Ignore rest of this alternative. */
639 while (*p
&& *p
!= ',') p
++;
648 /* This operand must be the same as a previous one.
649 This kind of constraint is used for instructions such
650 as add when they take only two operands.
652 Note that the lower-numbered operand is passed first. */
654 if (operands_match_p (operands
[c
- '0'],
655 operands
[this_operand
]))
657 operand_matches
[this_operand
] = c
- '0';
663 /* p is used for address_operands. Since this is an asm,
664 just to make sure that the operand is valid for Pmode. */
666 if (strict_memory_address_p (Pmode
, op
))
671 /* Anything goes unless it is a REG and really has a hard reg
672 but the hard reg is not in the class GENERAL_REGS. */
673 if (GENERAL_REGS
== ALL_REGS
674 || GET_CODE (op
) != REG
675 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
677 if (GET_CODE (op
) == REG
)
678 operand_class
[this_operand
]
679 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
685 if (GET_CODE (op
) == REG
686 && (GENERAL_REGS
== ALL_REGS
687 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
)))
689 operand_class
[this_operand
]
690 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
696 /* This is used for a MATCH_SCRATCH in the cases when we
697 don't actually need anything. So anything goes any time. */
702 if (GET_CODE (op
) == MEM
)
707 if (GET_CODE (op
) == MEM
708 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
709 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
714 if (GET_CODE (op
) == MEM
715 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
716 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
721 /* Match any CONST_DOUBLE, but only if
722 we can examine the bits of it reliably. */
723 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
724 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
725 && GET_CODE (op
) != VOIDmode
&& ! flag_pretend_float
)
727 if (GET_CODE (op
) == CONST_DOUBLE
)
732 if (GET_CODE (op
) == CONST_DOUBLE
)
738 if (GET_CODE (op
) == CONST_DOUBLE
739 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
744 if (GET_CODE (op
) == CONST_INT
745 || (GET_CODE (op
) == CONST_DOUBLE
746 && GET_MODE (op
) == VOIDmode
))
755 if (GET_CODE (op
) == CONST_INT
756 || (GET_CODE (op
) == CONST_DOUBLE
757 && GET_MODE (op
) == VOIDmode
))
769 if (GET_CODE (op
) == CONST_INT
770 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
774 #ifdef EXTRA_CONSTRAINT
780 if (EXTRA_CONSTRAINT (op
, c
))
786 if (GET_CODE (op
) == MEM
&& ! offsettable_memref_p (op
))
791 if (offsettable_memref_p (op
))
796 if (GET_CODE (op
) == REG
797 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
800 operand_class
[this_operand
]
801 = reg_class_subunion
[(int)operand_class
[this_operand
]][(int) REG_CLASS_FROM_LETTER (c
)];
806 constraints
[this_operand
] = p
;
807 /* If this operand did not win somehow,
808 this alternative loses. */
812 /* This alternative won; the operands are ok.
813 Change whichever operands this alternative says to change. */
820 /* For operands constrained to match another operand, copy the other
821 operand's class to this operand's class. */
822 for (j
= 0; j
< n_operands
; j
++)
823 if (operand_matches
[j
] >= 0)
824 operand_class
[j
] = operand_class
[operand_matches
[j
]];
826 return this_alternative
== n_alternatives
? -1 : this_alternative
;
829 /* Record the life info of each stack reg in INSN, updating REGSTACK.
830 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
831 is an array of the constraint strings used in the asm statement.
832 OPERANDS is an array of all operands for the insn, and is assumed to
833 contain all output operands, then all inputs operands.
835 There are many rules that an asm statement for stack-like regs must
836 follow. Those rules are explained at the top of this file: the rule
837 numbers below refer to that explanation. */
840 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
846 int n_inputs
, n_outputs
;
849 int n_operands
= n_inputs
+ n_outputs
;
850 int first_input
= n_outputs
;
852 int malformed_asm
= 0;
853 rtx body
= PATTERN (insn
);
855 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
857 enum reg_class
*operand_class
858 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
860 int reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
861 int implicitly_dies
[FIRST_PSEUDO_REGISTER
];
865 /* Find out what the constraints require. If no constraint
866 alternative matches, this asm is malformed. */
867 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
868 operand_matches
, operand_class
);
872 /* Strip SUBREGs here to make the following code simpler. */
873 for (i
= 0; i
< n_operands
; i
++)
874 if (GET_CODE (operands
[i
]) == SUBREG
875 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
876 operands
[i
] = SUBREG_REG (operands
[i
]);
878 /* Set up CLOBBER_REG. */
882 if (GET_CODE (body
) == PARALLEL
)
884 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
886 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
887 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
889 rtx clobber
= XVECEXP (body
, 0, i
);
890 rtx reg
= XEXP (clobber
, 0);
892 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
893 reg
= SUBREG_REG (reg
);
895 if (STACK_REG_P (reg
))
897 clobber_reg
[n_clobbers
] = reg
;
903 /* Enforce rule #4: Output operands must specifically indicate which
904 reg an output appears in after an asm. "=f" is not allowed: the
905 operand constraints must select a class with a single reg.
907 Also enforce rule #5: Output operands must start at the top of
908 the reg-stack: output operands may not "skip" a reg. */
910 bzero ((char *) reg_used_as_output
, sizeof (reg_used_as_output
));
911 for (i
= 0; i
< n_outputs
; i
++)
912 if (STACK_REG_P (operands
[i
]))
913 if (reg_class_size
[(int) operand_class
[i
]] != 1)
916 (insn
, "Output constraint %d must specify a single register", i
);
920 reg_used_as_output
[REGNO (operands
[i
])] = 1;
923 /* Search for first non-popped reg. */
924 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
925 if (! reg_used_as_output
[i
])
928 /* If there are any other popped regs, that's an error. */
929 for (; i
< LAST_STACK_REG
+ 1; i
++)
930 if (reg_used_as_output
[i
])
933 if (i
!= LAST_STACK_REG
+ 1)
935 error_for_asm (insn
, "Output regs must be grouped at top of stack");
939 /* Enforce rule #2: All implicitly popped input regs must be closer
940 to the top of the reg-stack than any input that is not implicitly
943 bzero ((char *) implicitly_dies
, sizeof (implicitly_dies
));
944 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
945 if (STACK_REG_P (operands
[i
]))
947 /* An input reg is implicitly popped if it is tied to an
948 output, or if there is a CLOBBER for it. */
951 for (j
= 0; j
< n_clobbers
; j
++)
952 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
955 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
956 implicitly_dies
[REGNO (operands
[i
])] = 1;
959 /* Search for first non-popped reg. */
960 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
961 if (! implicitly_dies
[i
])
964 /* If there are any other popped regs, that's an error. */
965 for (; i
< LAST_STACK_REG
+ 1; i
++)
966 if (implicitly_dies
[i
])
969 if (i
!= LAST_STACK_REG
+ 1)
972 "Implicitly popped regs must be grouped at top of stack");
976 /* Enfore rule #3: If any input operand uses the "f" constraint, all
977 output constraints must use the "&" earlyclobber.
979 ??? Detect this more deterministically by having constraint_asm_operands
980 record any earlyclobber. */
982 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
983 if (operand_matches
[i
] == -1)
987 for (j
= 0; j
< n_outputs
; j
++)
988 if (operands_match_p (operands
[j
], operands
[i
]))
991 "Output operand %d must use `&' constraint", j
);
998 /* Avoid further trouble with this insn. */
999 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
1000 PUT_MODE (insn
, VOIDmode
);
1004 /* Process all outputs */
1005 for (i
= 0; i
< n_outputs
; i
++)
1007 rtx op
= operands
[i
];
1009 if (! STACK_REG_P (op
))
1010 if (stack_regs_mentioned_p (op
))
1015 /* Each destination is dead before this insn. If the
1016 destination is not used after this insn, record this with
1019 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
)))
1020 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
, op
,
1023 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
));
1026 /* Process all inputs */
1027 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
1029 if (! STACK_REG_P (operands
[i
]))
1030 if (stack_regs_mentioned_p (operands
[i
]))
1035 /* If an input is dead after the insn, record a death note.
1036 But don't record a death note if there is already a death note,
1037 or if the input is also an output. */
1039 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]))
1040 && operand_matches
[i
] == -1
1041 && find_regno_note (insn
, REG_DEAD
, REGNO (operands
[i
])) == NULL_RTX
)
1042 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, operands
[i
],
1045 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]));
1049 /* Scan PAT, which is part of INSN, and record registers appearing in
1050 a SET_DEST in DEST, and other registers in SRC.
1052 This function does not know about SET_DESTs that are both input and
1053 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
1056 record_reg_life_pat (pat
, src
, dest
, douse
)
1058 HARD_REG_SET
*src
, *dest
;
1064 if (STACK_REG_P (pat
)
1065 || (GET_CODE (pat
) == SUBREG
&& STACK_REG_P (SUBREG_REG (pat
))))
1068 mark_regs_pat (pat
, src
);
1071 mark_regs_pat (pat
, dest
);
1076 if (GET_CODE (pat
) == SET
)
1078 record_reg_life_pat (XEXP (pat
, 0), NULL_PTR
, dest
, 0);
1079 record_reg_life_pat (XEXP (pat
, 1), src
, NULL_PTR
, 0);
1083 /* We don't need to consider either of these cases. */
1084 if (GET_CODE (pat
) == USE
&& !douse
|| GET_CODE (pat
) == CLOBBER
)
1087 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1088 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1094 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1095 record_reg_life_pat (XVECEXP (pat
, i
, j
), src
, dest
, 0);
1097 else if (fmt
[i
] == 'e')
1098 record_reg_life_pat (XEXP (pat
, i
), src
, dest
, 0);
1102 /* Calculate the number of inputs and outputs in BODY, an
1103 asm_operands. N_OPERANDS is the total number of operands, and
1104 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1108 get_asm_operand_lengths (body
, n_operands
, n_inputs
, n_outputs
)
1111 int *n_inputs
, *n_outputs
;
1113 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1114 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
1116 else if (GET_CODE (body
) == ASM_OPERANDS
)
1117 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (body
);
1119 else if (GET_CODE (body
) == PARALLEL
1120 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1121 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
1123 else if (GET_CODE (body
) == PARALLEL
1124 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1125 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1129 *n_outputs
= n_operands
- *n_inputs
;
1132 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1133 registers in REGSTACK. This function is called to process insns from
1134 the last insn in a block to the first. The actual scanning is done in
1135 record_reg_life_pat.
1137 If a register is live after a CALL_INSN, but is not a value return
1138 register for that CALL_INSN, then code is emitted to initialize that
1139 register. The block_end[] data is kept accurate.
1141 Existing death and unset notes for stack registers are deleted
1142 before processing the insn. */
1145 record_reg_life (insn
, block
, regstack
)
1150 rtx note
, *note_link
;
1153 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
1154 || INSN_DELETED_P (insn
))
1157 /* Strip death notes for stack regs from this insn */
1159 note_link
= ®_NOTES(insn
);
1160 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
1161 if (STACK_REG_P (XEXP (note
, 0))
1162 && (REG_NOTE_KIND (note
) == REG_DEAD
1163 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1164 *note_link
= XEXP (note
, 1);
1166 note_link
= &XEXP (note
, 1);
1168 /* Process all patterns in the insn. */
1170 n_operands
= asm_noperands (PATTERN (insn
));
1171 if (n_operands
>= 0)
1173 /* This insn is an `asm' with operands. Decode the operands,
1174 decide how many are inputs, and record the life information. */
1176 rtx operands
[MAX_RECOG_OPERANDS
];
1177 rtx body
= PATTERN (insn
);
1178 int n_inputs
, n_outputs
;
1179 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
1181 decode_asm_operands (body
, operands
, NULL_PTR
, constraints
, NULL_PTR
);
1182 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
1183 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
1184 n_inputs
, n_outputs
);
1189 HARD_REG_SET src
, dest
;
1192 CLEAR_HARD_REG_SET (src
);
1193 CLEAR_HARD_REG_SET (dest
);
1195 if (GET_CODE (insn
) == CALL_INSN
)
1196 for (note
= CALL_INSN_FUNCTION_USAGE (insn
);
1198 note
= XEXP (note
, 1))
1199 if (GET_CODE (XEXP (note
, 0)) == USE
)
1200 record_reg_life_pat (SET_DEST (XEXP (note
, 0)), &src
, NULL_PTR
, 0);
1202 record_reg_life_pat (PATTERN (insn
), &src
, &dest
, 0);
1203 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
1204 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, regno
))
1206 if (TEST_HARD_REG_BIT (src
, regno
)
1207 && ! TEST_HARD_REG_BIT (dest
, regno
))
1208 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1209 FP_MODE_REG (regno
, DFmode
),
1211 else if (TEST_HARD_REG_BIT (dest
, regno
))
1212 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
,
1213 FP_MODE_REG (regno
, DFmode
),
1217 if (GET_CODE (insn
) == CALL_INSN
)
1221 /* There might be a reg that is live after a function call.
1222 Initialize it to zero so that the program does not crash. See
1223 comment towards the end of stack_reg_life_analysis(). */
1225 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; reg
++)
1226 if (! TEST_HARD_REG_BIT (dest
, reg
)
1227 && TEST_HARD_REG_BIT (regstack
->reg_set
, reg
))
1231 /* The insn will use virtual register numbers, and so
1232 convert_regs is expected to process these. But BLOCK_NUM
1233 cannot be used on these insns, because they do not appear in
1236 pat
= gen_rtx (SET
, VOIDmode
, FP_MODE_REG (reg
, DFmode
),
1237 CONST0_RTX (DFmode
));
1238 init
= emit_insn_after (pat
, insn
);
1239 PUT_MODE (init
, QImode
);
1241 CLEAR_HARD_REG_BIT (regstack
->reg_set
, reg
);
1243 /* If the CALL_INSN was the end of a block, move the
1244 block_end to point to the new insn. */
1246 if (block_end
[block
] == insn
)
1247 block_end
[block
] = init
;
1250 /* Some regs do not survive a CALL */
1251 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, call_used_reg_set
);
1254 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, dest
);
1255 IOR_HARD_REG_SET (regstack
->reg_set
, src
);
1259 /* Find all basic blocks of the function, which starts with FIRST.
1260 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1268 register RTX_CODE prev_code
= BARRIER
;
1269 register RTX_CODE code
;
1270 rtx label_value_list
= 0;
1272 /* Record where all the blocks start and end.
1273 Record which basic blocks control can drop in to. */
1276 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1278 /* Note that this loop must select the same block boundaries
1279 as code in reg_to_stack, but that these are not the same
1280 as those selected in flow.c. */
1282 code
= GET_CODE (insn
);
1284 if (code
== CODE_LABEL
1285 || (prev_code
!= INSN
1286 && prev_code
!= CALL_INSN
1287 && prev_code
!= CODE_LABEL
1288 && GET_RTX_CLASS (code
) == 'i'))
1290 block_begin
[++block
] = insn
;
1291 block_end
[block
] = insn
;
1292 block_drops_in
[block
] = prev_code
!= BARRIER
;
1294 else if (GET_RTX_CLASS (code
) == 'i')
1295 block_end
[block
] = insn
;
1297 if (GET_RTX_CLASS (code
) == 'i')
1301 /* Make a list of all labels referred to other than by jumps. */
1302 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1303 if (REG_NOTE_KIND (note
) == REG_LABEL
)
1304 label_value_list
= gen_rtx (EXPR_LIST
, VOIDmode
, XEXP (note
, 0),
1308 block_number
[INSN_UID (insn
)] = block
;
1314 if (block
+ 1 != blocks
)
1317 /* generate all label references to the corresponding jump insn */
1318 for (block
= 0; block
< blocks
; block
++)
1320 insn
= block_end
[block
];
1322 if (GET_CODE (insn
) == JUMP_INSN
)
1324 rtx pat
= PATTERN (insn
);
1325 int computed_jump
= 0;
1328 if (GET_CODE (pat
) == PARALLEL
)
1330 int len
= XVECLEN (pat
, 0);
1331 int has_use_labelref
= 0;
1334 for (i
= len
- 1; i
>= 0; i
--)
1335 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
1336 && GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0)) == LABEL_REF
)
1337 has_use_labelref
= 1;
1339 if (! has_use_labelref
)
1340 for (i
= len
- 1; i
>= 0; i
--)
1341 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
1342 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
1343 && uses_reg_or_mem (SET_SRC (XVECEXP (pat
, 0, i
))))
1346 else if (GET_CODE (pat
) == SET
1347 && SET_DEST (pat
) == pc_rtx
1348 && uses_reg_or_mem (SET_SRC (pat
)))
1353 for (x
= label_value_list
; x
; x
= XEXP (x
, 1))
1354 record_label_references (insn
,
1355 gen_rtx (LABEL_REF
, VOIDmode
,
1358 for (x
= forced_labels
; x
; x
= XEXP (x
, 1))
1359 record_label_references (insn
,
1360 gen_rtx (LABEL_REF
, VOIDmode
,
1364 record_label_references (insn
, pat
);
1369 /* Return 1 if X contain a REG or MEM that is not in the constant pool. */
1375 enum rtx_code code
= GET_CODE (x
);
1381 && ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
1382 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)))))
1385 fmt
= GET_RTX_FORMAT (code
);
1386 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1389 && uses_reg_or_mem (XEXP (x
, i
)))
1393 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1394 if (uses_reg_or_mem (XVECEXP (x
, i
, j
)))
1401 /* If current function returns its result in an fp stack register,
1402 return the REG. Otherwise, return 0. */
1408 rtx result
= DECL_RTL (DECL_RESULT (decl
));
1411 && ! (GET_CODE (result
) == REG
1412 && REGNO (result
) < FIRST_PSEUDO_REGISTER
))
1414 #ifdef FUNCTION_OUTGOING_VALUE
1416 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
1418 result
= FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
1422 return result
!= 0 && STACK_REG_P (result
) ? result
: 0;
1425 /* Determine the which registers are live at the start of each basic
1426 block of the function whose first insn is FIRST.
1428 First, if the function returns a real_type, mark the function
1429 return type as live at each return point, as the RTL may not give any
1430 hint that the register is live.
1432 Then, start with the last block and work back to the first block.
1433 Similarly, work backwards within each block, insn by insn, recording
1434 which regs are dead and which are used (and therefore live) in the
1435 hard reg set of block_stack_in[].
1437 After processing each basic block, if there is a label at the start
1438 of the block, propagate the live registers to all jumps to this block.
1440 As a special case, if there are regs live in this block, that are
1441 not live in a block containing a jump to this label, and the block
1442 containing the jump has already been processed, we must propagate this
1443 block's entry register life back to the block containing the jump, and
1444 restart life analysis from there.
1446 In the worst case, this function may traverse the insns
1447 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1448 of the insns may not know that a reg is live at a target that is early
1449 in the insns. So we back up and start over with the new reg live.
1451 If there are registers that are live at the start of the function,
1452 insns are emitted to initialize these registers. Something similar is
1453 done after CALL_INSNs in record_reg_life. */
1456 stack_reg_life_analysis (first
, stackentry
)
1458 HARD_REG_SET
*stackentry
;
1461 struct stack_def regstack
;
1466 if (retvalue
= stack_result (current_function_decl
))
1468 /* Find all RETURN insns and mark them. */
1470 for (block
= blocks
- 1; --block
>= 0;)
1471 if (GET_CODE (block_end
[block
]) == JUMP_INSN
1472 && GET_CODE (PATTERN (block_end
[block
])) == RETURN
)
1473 mark_regs_pat (retvalue
, block_out_reg_set
+block
);
1475 /* Mark off the end of last block if we "fall off" the end of the
1476 function into the epilogue. */
1478 if (GET_CODE (block_end
[blocks
-1]) != JUMP_INSN
1479 || GET_CODE (PATTERN (block_end
[blocks
-1])) == RETURN
)
1480 mark_regs_pat (retvalue
, block_out_reg_set
+blocks
-1);
1484 /* now scan all blocks backward for stack register use */
1489 register rtx insn
, prev
;
1491 /* current register status at last instruction */
1493 COPY_HARD_REG_SET (regstack
.reg_set
, block_out_reg_set
[block
]);
1495 prev
= block_end
[block
];
1499 prev
= PREV_INSN (insn
);
1501 /* If the insn is a CALL_INSN, we need to ensure that
1502 everything dies. But otherwise don't process unless there
1503 are some stack regs present. */
1505 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
1506 record_reg_life (insn
, block
, ®stack
);
1508 } while (insn
!= block_begin
[block
]);
1510 /* Set the state at the start of the block. Mark that no
1511 register mapping information known yet. */
1513 COPY_HARD_REG_SET (block_stack_in
[block
].reg_set
, regstack
.reg_set
);
1514 block_stack_in
[block
].top
= -2;
1516 /* If there is a label, propagate our register life to all jumps
1519 if (GET_CODE (insn
) == CODE_LABEL
)
1522 int must_restart
= 0;
1524 for (label
= LABEL_REFS (insn
); label
!= insn
;
1525 label
= LABEL_NEXTREF (label
))
1527 int jump_block
= BLOCK_NUM (CONTAINING_INSN (label
));
1529 if (jump_block
< block
)
1530 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1531 block_stack_in
[block
].reg_set
);
1534 /* The block containing the jump has already been
1535 processed. If there are registers that were not known
1536 to be live then, but are live now, we must back up
1537 and restart life analysis from that point with the new
1538 life information. */
1540 GO_IF_HARD_REG_SUBSET (block_stack_in
[block
].reg_set
,
1541 block_out_reg_set
[jump_block
],
1544 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1545 block_stack_in
[block
].reg_set
);
1558 if (block_drops_in
[block
])
1559 IOR_HARD_REG_SET (block_out_reg_set
[block
-1],
1560 block_stack_in
[block
].reg_set
);
1565 /* If any reg is live at the start of the first block of a
1566 function, then we must guarantee that the reg holds some value by
1567 generating our own "load" of that register. Otherwise a 387 would
1568 fault trying to access an empty register. */
1570 /* Load zero into each live register. The fact that a register
1571 appears live at the function start necessarily implies an error
1572 in the user program: it means that (unless the offending code is *never*
1573 executed) this program is using uninitialised floating point
1574 variables. In order to keep broken code like this happy, we initialise
1575 those variables with zero.
1577 Note that we are inserting virtual register references here:
1578 these insns must be processed by convert_regs later. Also, these
1579 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1581 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
1582 if (TEST_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
)
1583 && ! TEST_HARD_REG_BIT (*stackentry
, reg
))
1587 init_rtx
= gen_rtx (SET
, VOIDmode
, FP_MODE_REG(reg
, DFmode
),
1588 CONST0_RTX (DFmode
));
1589 block_begin
[0] = emit_insn_after (init_rtx
, first
);
1590 PUT_MODE (block_begin
[0], QImode
);
1592 CLEAR_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
);
1596 /*****************************************************************************
1597 This section deals with stack register substitution, and forms the second
1599 *****************************************************************************/
1601 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1602 the desired hard REGNO. */
1605 replace_reg (reg
, regno
)
1609 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
1610 || ! STACK_REG_P (*reg
))
1613 switch (GET_MODE_CLASS (GET_MODE (*reg
)))
1617 case MODE_COMPLEX_FLOAT
:;
1620 *reg
= FP_MODE_REG (regno
, GET_MODE (*reg
));
1623 /* Remove a note of type NOTE, which must be found, for register
1624 number REGNO from INSN. Remove only one such note. */
1627 remove_regno_note (insn
, note
, regno
)
1632 register rtx
*note_link
, this;
1634 note_link
= ®_NOTES(insn
);
1635 for (this = *note_link
; this; this = XEXP (this, 1))
1636 if (REG_NOTE_KIND (this) == note
1637 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
1639 *note_link
= XEXP (this, 1);
1643 note_link
= &XEXP (this, 1);
1648 /* Find the hard register number of virtual register REG in REGSTACK.
1649 The hard register number is relative to the top of the stack. -1 is
1650 returned if the register is not found. */
1653 get_hard_regnum (regstack
, reg
)
1659 if (! STACK_REG_P (reg
))
1662 for (i
= regstack
->top
; i
>= 0; i
--)
1663 if (regstack
->reg
[i
] == REGNO (reg
))
1666 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
1669 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1670 the chain of insns. Doing so could confuse block_begin and block_end
1671 if this were the only insn in the block. */
1674 delete_insn_for_stacker (insn
)
1677 PUT_CODE (insn
, NOTE
);
1678 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1679 NOTE_SOURCE_FILE (insn
) = 0;
1682 /* Emit an insn to pop virtual register REG before or after INSN.
1683 REGSTACK is the stack state after INSN and is updated to reflect this
1684 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1685 is represented as a SET whose destination is the register to be popped
1686 and source is the top of stack. A death note for the top of stack
1687 cases the movdf pattern to pop. */
1690 emit_pop_insn (insn
, regstack
, reg
, when
)
1696 rtx pop_insn
, pop_rtx
;
1699 hard_regno
= get_hard_regnum (regstack
, reg
);
1701 if (hard_regno
< FIRST_STACK_REG
)
1704 pop_rtx
= gen_rtx (SET
, VOIDmode
, FP_MODE_REG (hard_regno
, DFmode
),
1705 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
1707 pop_insn
= (*when
) (pop_rtx
, insn
);
1708 /* ??? This used to be VOIDmode, but that seems wrong. */
1709 PUT_MODE (pop_insn
, QImode
);
1711 REG_NOTES (pop_insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1712 FP_MODE_REG (FIRST_STACK_REG
, DFmode
),
1713 REG_NOTES (pop_insn
));
1715 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
1716 = regstack
->reg
[regstack
->top
];
1718 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
1723 /* Emit an insn before or after INSN to swap virtual register REG with the
1724 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1725 REGSTACK is the stack state before the swap, and is updated to reflect
1726 the swap. A swap insn is represented as a PARALLEL of two patterns:
1727 each pattern moves one reg to the other.
1729 If REG is already at the top of the stack, no insn is emitted. */
1732 emit_swap_insn (insn
, regstack
, reg
)
1739 rtx swap_rtx
, swap_insn
;
1740 int tmp
, other_reg
; /* swap regno temps */
1741 rtx i1
; /* the stack-reg insn prior to INSN */
1742 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
1744 hard_regno
= get_hard_regnum (regstack
, reg
);
1746 if (hard_regno
< FIRST_STACK_REG
)
1748 if (hard_regno
== FIRST_STACK_REG
)
1751 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
1753 tmp
= regstack
->reg
[other_reg
];
1754 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
1755 regstack
->reg
[regstack
->top
] = tmp
;
1757 /* Find the previous insn involving stack regs, but don't go past
1758 any labels, calls or jumps. */
1759 i1
= prev_nonnote_insn (insn
);
1760 while (i1
&& GET_CODE (i1
) == INSN
&& GET_MODE (i1
) != QImode
)
1761 i1
= prev_nonnote_insn (i1
);
1764 i1set
= single_set (i1
);
1768 rtx i2
; /* the stack-reg insn prior to I1 */
1769 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
1770 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
1772 /* If the previous register stack push was from the reg we are to
1773 swap with, omit the swap. */
1775 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == FIRST_STACK_REG
1776 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == hard_regno
- 1
1777 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1780 /* If the previous insn wrote to the reg we are to swap with,
1783 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == hard_regno
1784 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == FIRST_STACK_REG
1785 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1789 if (GET_RTX_CLASS (GET_CODE (i1
)) == 'i' && sets_cc0_p (PATTERN (i1
)))
1791 i1
= next_nonnote_insn (i1
);
1796 swap_rtx
= gen_swapdf (FP_MODE_REG (hard_regno
, DFmode
),
1797 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
1798 swap_insn
= emit_insn_after (swap_rtx
, i1
);
1799 /* ??? This used to be VOIDmode, but that seems wrong. */
1800 PUT_MODE (swap_insn
, QImode
);
1803 /* Handle a move to or from a stack register in PAT, which is in INSN.
1804 REGSTACK is the current stack. */
1807 move_for_stack_reg (insn
, regstack
, pat
)
1812 rtx
*psrc
= get_true_reg (&SET_SRC (pat
));
1813 rtx
*pdest
= get_true_reg (&SET_DEST (pat
));
1817 src
= *psrc
; dest
= *pdest
;
1819 if (STACK_REG_P (src
) && STACK_REG_P (dest
))
1821 /* Write from one stack reg to another. If SRC dies here, then
1822 just change the register mapping and delete the insn. */
1824 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1829 /* If this is a no-op move, there must not be a REG_DEAD note. */
1830 if (REGNO (src
) == REGNO (dest
))
1833 for (i
= regstack
->top
; i
>= 0; i
--)
1834 if (regstack
->reg
[i
] == REGNO (src
))
1837 /* The source must be live, and the dest must be dead. */
1838 if (i
< 0 || get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1841 /* It is possible that the dest is unused after this insn.
1842 If so, just pop the src. */
1844 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1846 emit_pop_insn (insn
, regstack
, src
, emit_insn_after
);
1848 delete_insn_for_stacker (insn
);
1852 regstack
->reg
[i
] = REGNO (dest
);
1854 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1855 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1857 delete_insn_for_stacker (insn
);
1862 /* The source reg does not die. */
1864 /* If this appears to be a no-op move, delete it, or else it
1865 will confuse the machine description output patterns. But if
1866 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1867 for REG_UNUSED will not work for deleted insns. */
1869 if (REGNO (src
) == REGNO (dest
))
1871 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1872 emit_pop_insn (insn
, regstack
, dest
, emit_insn_after
);
1874 delete_insn_for_stacker (insn
);
1878 /* The destination ought to be dead */
1879 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1882 replace_reg (psrc
, get_hard_regnum (regstack
, src
));
1884 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1885 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1886 replace_reg (pdest
, FIRST_STACK_REG
);
1888 else if (STACK_REG_P (src
))
1890 /* Save from a stack reg to MEM, or possibly integer reg. Since
1891 only top of stack may be saved, emit an exchange first if
1894 emit_swap_insn (insn
, regstack
, src
);
1896 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1899 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1901 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1903 else if (GET_MODE (src
) == XFmode
&& regstack
->top
!= REG_STACK_SIZE
)
1905 /* A 387 cannot write an XFmode value to a MEM without
1906 clobbering the source reg. The output code can handle
1907 this by reading back the value from the MEM.
1908 But it is more efficient to use a temp register if one is
1909 available. Push the source value here if the register
1910 stack is not full, and then write the value to memory via
1912 rtx push_rtx
, push_insn
;
1913 rtx top_stack_reg
= FP_MODE_REG (FIRST_STACK_REG
, XFmode
);
1915 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1916 push_insn
= emit_insn_before (push_rtx
, insn
);
1917 PUT_MODE (push_insn
, QImode
);
1918 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, top_stack_reg
,
1922 replace_reg (psrc
, FIRST_STACK_REG
);
1924 else if (STACK_REG_P (dest
))
1926 /* Load from MEM, or possibly integer REG or constant, into the
1927 stack regs. The actual target is always the top of the
1928 stack. The stack mapping is changed to reflect that DEST is
1929 now at top of stack. */
1931 /* The destination ought to be dead */
1932 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1935 if (regstack
->top
>= REG_STACK_SIZE
)
1938 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1939 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1940 replace_reg (pdest
, FIRST_STACK_REG
);
1947 swap_rtx_condition (pat
)
1953 if (GET_RTX_CLASS (GET_CODE (pat
)) == '<')
1955 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1959 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1960 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1966 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1967 swap_rtx_condition (XVECEXP (pat
, i
, j
));
1969 else if (fmt
[i
] == 'e')
1970 swap_rtx_condition (XEXP (pat
, i
));
1974 /* Handle a comparison. Special care needs to be taken to avoid
1975 causing comparisons that a 387 cannot do correctly, such as EQ.
1977 Also, a pop insn may need to be emitted. The 387 does have an
1978 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1979 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1983 compare_for_stack_reg (insn
, regstack
, pat
)
1989 rtx src1_note
, src2_note
;
1991 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1992 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1994 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1995 registers that die in this insn - move those to stack top first. */
1996 if (! STACK_REG_P (*src1
)
1997 || (STACK_REG_P (*src2
)
1998 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
2002 temp
= XEXP (SET_SRC (pat
), 0);
2003 XEXP (SET_SRC (pat
), 0) = XEXP (SET_SRC (pat
), 1);
2004 XEXP (SET_SRC (pat
), 1) = temp
;
2006 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2007 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2009 next
= next_cc0_user (insn
);
2010 if (next
== NULL_RTX
)
2013 swap_rtx_condition (PATTERN (next
));
2014 INSN_CODE (next
) = -1;
2015 INSN_CODE (insn
) = -1;
2018 /* We will fix any death note later. */
2020 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2022 if (STACK_REG_P (*src2
))
2023 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2025 src2_note
= NULL_RTX
;
2027 emit_swap_insn (insn
, regstack
, *src1
);
2029 replace_reg (src1
, FIRST_STACK_REG
);
2031 if (STACK_REG_P (*src2
))
2032 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2036 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src1_note
, 0)));
2037 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2041 /* If the second operand dies, handle that. But if the operands are
2042 the same stack register, don't bother, because only one death is
2043 needed, and it was just handled. */
2046 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
2047 && REGNO (*src1
) == REGNO (*src2
)))
2049 /* As a special case, two regs may die in this insn if src2 is
2050 next to top of stack and the top of stack also dies. Since
2051 we have already popped src1, "next to top of stack" is really
2052 at top (FIRST_STACK_REG) now. */
2054 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
2057 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src2_note
, 0)));
2058 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
2063 /* The 386 can only represent death of the first operand in
2064 the case handled above. In all other cases, emit a separate
2065 pop and remove the death note from here. */
2067 link_cc0_insns (insn
);
2069 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
2071 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
2077 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
2078 is the current register layout. */
2081 subst_stack_regs_pat (insn
, regstack
, pat
)
2087 rtx
*src1
= (rtx
*) NULL_PTR
, *src2
;
2088 rtx src1_note
, src2_note
;
2090 if (GET_CODE (pat
) != SET
)
2093 dest
= get_true_reg (&SET_DEST (pat
));
2094 src
= get_true_reg (&SET_SRC (pat
));
2096 /* See if this is a `movM' pattern, and handle elsewhere if so. */
2098 if (*dest
!= cc0_rtx
2099 && (STACK_REG_P (*src
)
2100 || (STACK_REG_P (*dest
)
2101 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
2102 || GET_CODE (*src
) == CONST_DOUBLE
))))
2103 move_for_stack_reg (insn
, regstack
, pat
);
2105 switch (GET_CODE (SET_SRC (pat
)))
2108 compare_for_stack_reg (insn
, regstack
, pat
);
2114 for (count
= HARD_REGNO_NREGS (REGNO (*dest
), GET_MODE (*dest
));
2117 regstack
->reg
[++regstack
->top
] = REGNO (*dest
) + count
;
2118 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
) + count
);
2121 replace_reg (dest
, FIRST_STACK_REG
);
2125 /* This is a `tstM2' case. */
2126 if (*dest
!= cc0_rtx
)
2133 case FLOAT_TRUNCATE
:
2137 /* These insns only operate on the top of the stack. DEST might
2138 be cc0_rtx if we're processing a tstM pattern. Also, it's
2139 possible that the tstM case results in a REG_DEAD note on the
2143 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2145 emit_swap_insn (insn
, regstack
, *src1
);
2147 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2149 if (STACK_REG_P (*dest
))
2150 replace_reg (dest
, FIRST_STACK_REG
);
2154 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2156 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2159 replace_reg (src1
, FIRST_STACK_REG
);
2165 /* On i386, reversed forms of subM3 and divM3 exist for
2166 MODE_FLOAT, so the same code that works for addM3 and mulM3
2170 /* These insns can accept the top of stack as a destination
2171 from a stack reg or mem, or can use the top of stack as a
2172 source and some other stack register (possibly top of stack)
2173 as a destination. */
2175 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2176 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2178 /* We will fix any death note later. */
2180 if (STACK_REG_P (*src1
))
2181 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2183 src1_note
= NULL_RTX
;
2184 if (STACK_REG_P (*src2
))
2185 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2187 src2_note
= NULL_RTX
;
2189 /* If either operand is not a stack register, then the dest
2190 must be top of stack. */
2192 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
2193 emit_swap_insn (insn
, regstack
, *dest
);
2196 /* Both operands are REG. If neither operand is already
2197 at the top of stack, choose to make the one that is the dest
2198 the new top of stack. */
2200 int src1_hard_regnum
, src2_hard_regnum
;
2202 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
2203 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
2204 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
2207 if (src1_hard_regnum
!= FIRST_STACK_REG
2208 && src2_hard_regnum
!= FIRST_STACK_REG
)
2209 emit_swap_insn (insn
, regstack
, *dest
);
2212 if (STACK_REG_P (*src1
))
2213 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
2214 if (STACK_REG_P (*src2
))
2215 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2219 /* If the register that dies is at the top of stack, then
2220 the destination is somewhere else - merely substitute it.
2221 But if the reg that dies is not at top of stack, then
2222 move the top of stack to the dead reg, as though we had
2223 done the insn and then a store-with-pop. */
2225 if (REGNO (XEXP (src1_note
, 0)) == regstack
->reg
[regstack
->top
])
2227 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2228 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2232 int regno
= get_hard_regnum (regstack
, XEXP (src1_note
, 0));
2234 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2235 replace_reg (dest
, regno
);
2237 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2238 = regstack
->reg
[regstack
->top
];
2241 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2242 REGNO (XEXP (src1_note
, 0)));
2243 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2248 if (REGNO (XEXP (src2_note
, 0)) == regstack
->reg
[regstack
->top
])
2250 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2251 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2255 int regno
= get_hard_regnum (regstack
, XEXP (src2_note
, 0));
2257 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2258 replace_reg (dest
, regno
);
2260 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2261 = regstack
->reg
[regstack
->top
];
2264 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2265 REGNO (XEXP (src2_note
, 0)));
2266 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
2271 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2272 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2278 switch (XINT (SET_SRC (pat
), 1))
2282 /* These insns only operate on the top of the stack. */
2284 src1
= get_true_reg (&XVECEXP (SET_SRC (pat
), 0, 0));
2286 emit_swap_insn (insn
, regstack
, *src1
);
2288 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2290 if (STACK_REG_P (*dest
))
2291 replace_reg (dest
, FIRST_STACK_REG
);
2295 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2297 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2300 replace_reg (src1
, FIRST_STACK_REG
);
2314 /* Substitute hard regnums for any stack regs in INSN, which has
2315 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2316 before the insn, and is updated with changes made here. CONSTRAINTS is
2317 an array of the constraint strings used in the asm statement.
2319 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2320 parallel array of where the operands were found. The output operands
2321 all precede the input operands.
2323 There are several requirements and assumptions about the use of
2324 stack-like regs in asm statements. These rules are enforced by
2325 record_asm_stack_regs; see comments there for details. Any
2326 asm_operands left in the RTL at this point may be assume to meet the
2327 requirements, since record_asm_stack_regs removes any problem asm. */
2330 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
, constraints
,
2331 n_inputs
, n_outputs
)
2334 rtx
*operands
, **operands_loc
;
2336 int n_inputs
, n_outputs
;
2338 int n_operands
= n_inputs
+ n_outputs
;
2339 int first_input
= n_outputs
;
2340 rtx body
= PATTERN (insn
);
2342 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
2343 enum reg_class
*operand_class
2344 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
2346 rtx
*note_reg
; /* Array of note contents */
2347 rtx
**note_loc
; /* Address of REG field of each note */
2348 enum reg_note
*note_kind
; /* The type of each note */
2353 struct stack_def temp_stack
;
2359 /* Find out what the constraints required. If no constraint
2360 alternative matches, that is a compiler bug: we should have caught
2361 such an insn during the life analysis pass (and reload should have
2362 caught it regardless). */
2364 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
2365 operand_matches
, operand_class
);
2369 /* Strip SUBREGs here to make the following code simpler. */
2370 for (i
= 0; i
< n_operands
; i
++)
2371 if (GET_CODE (operands
[i
]) == SUBREG
2372 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
2374 operands_loc
[i
] = & SUBREG_REG (operands
[i
]);
2375 operands
[i
] = SUBREG_REG (operands
[i
]);
2378 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2380 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2383 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
2384 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
2385 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
2388 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2390 rtx reg
= XEXP (note
, 0);
2391 rtx
*loc
= & XEXP (note
, 0);
2393 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2395 loc
= & SUBREG_REG (reg
);
2396 reg
= SUBREG_REG (reg
);
2399 if (STACK_REG_P (reg
)
2400 && (REG_NOTE_KIND (note
) == REG_DEAD
2401 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2403 note_reg
[n_notes
] = reg
;
2404 note_loc
[n_notes
] = loc
;
2405 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2410 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2414 if (GET_CODE (body
) == PARALLEL
)
2416 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
2417 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
**));
2419 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2420 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2422 rtx clobber
= XVECEXP (body
, 0, i
);
2423 rtx reg
= XEXP (clobber
, 0);
2424 rtx
*loc
= & XEXP (clobber
, 0);
2426 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2428 loc
= & SUBREG_REG (reg
);
2429 reg
= SUBREG_REG (reg
);
2432 if (STACK_REG_P (reg
))
2434 clobber_reg
[n_clobbers
] = reg
;
2435 clobber_loc
[n_clobbers
] = loc
;
2441 bcopy ((char *) regstack
, (char *) &temp_stack
, sizeof (temp_stack
));
2443 /* Put the input regs into the desired place in TEMP_STACK. */
2445 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2446 if (STACK_REG_P (operands
[i
])
2447 && reg_class_subset_p (operand_class
[i
], FLOAT_REGS
)
2448 && operand_class
[i
] != FLOAT_REGS
)
2450 /* If an operand needs to be in a particular reg in
2451 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2452 these constraints are for single register classes, and reload
2453 guaranteed that operand[i] is already in that class, we can
2454 just use REGNO (operands[i]) to know which actual reg this
2455 operand needs to be in. */
2457 int regno
= get_hard_regnum (&temp_stack
, operands
[i
]);
2462 if (regno
!= REGNO (operands
[i
]))
2464 /* operands[i] is not in the right place. Find it
2465 and swap it with whatever is already in I's place.
2466 K is where operands[i] is now. J is where it should
2470 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2472 - (REGNO (operands
[i
]) - FIRST_STACK_REG
));
2474 temp
= temp_stack
.reg
[k
];
2475 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
2476 temp_stack
.reg
[j
] = temp
;
2480 /* emit insns before INSN to make sure the reg-stack is in the right
2483 change_stack (insn
, regstack
, &temp_stack
, emit_insn_before
);
2485 /* Make the needed input register substitutions. Do death notes and
2486 clobbers too, because these are for inputs, not outputs. */
2488 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2489 if (STACK_REG_P (operands
[i
]))
2491 int regnum
= get_hard_regnum (regstack
, operands
[i
]);
2496 replace_reg (operands_loc
[i
], regnum
);
2499 for (i
= 0; i
< n_notes
; i
++)
2500 if (note_kind
[i
] == REG_DEAD
)
2502 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2507 replace_reg (note_loc
[i
], regnum
);
2510 for (i
= 0; i
< n_clobbers
; i
++)
2512 /* It's OK for a CLOBBER to reference a reg that is not live.
2513 Don't try to replace it in that case. */
2514 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2518 /* Sigh - clobbers always have QImode. But replace_reg knows
2519 that these regs can't be MODE_INT and will abort. Just put
2520 the right reg there without calling replace_reg. */
2522 *clobber_loc
[i
] = FP_MODE_REG (regnum
, DFmode
);
2526 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2528 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2529 if (STACK_REG_P (operands
[i
]))
2531 /* An input reg is implicitly popped if it is tied to an
2532 output, or if there is a CLOBBER for it. */
2535 for (j
= 0; j
< n_clobbers
; j
++)
2536 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
2539 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
2541 /* operands[i] might not be at the top of stack. But that's OK,
2542 because all we need to do is pop the right number of regs
2543 off of the top of the reg-stack. record_asm_stack_regs
2544 guaranteed that all implicitly popped regs were grouped
2545 at the top of the reg-stack. */
2547 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2548 regstack
->reg
[regstack
->top
]);
2553 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2554 Note that there isn't any need to substitute register numbers.
2555 ??? Explain why this is true. */
2557 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2559 /* See if there is an output for this hard reg. */
2562 for (j
= 0; j
< n_outputs
; j
++)
2563 if (STACK_REG_P (operands
[j
]) && REGNO (operands
[j
]) == i
)
2565 regstack
->reg
[++regstack
->top
] = i
;
2566 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2571 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2572 input that the asm didn't implicitly pop. If the asm didn't
2573 implicitly pop an input reg, that reg will still be live.
2575 Note that we can't use find_regno_note here: the register numbers
2576 in the death notes have already been substituted. */
2578 for (i
= 0; i
< n_outputs
; i
++)
2579 if (STACK_REG_P (operands
[i
]))
2583 for (j
= 0; j
< n_notes
; j
++)
2584 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2585 && note_kind
[j
] == REG_UNUSED
)
2587 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2593 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2594 if (STACK_REG_P (operands
[i
]))
2598 for (j
= 0; j
< n_notes
; j
++)
2599 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2600 && note_kind
[j
] == REG_DEAD
2601 && TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
])))
2603 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2610 /* Substitute stack hard reg numbers for stack virtual registers in
2611 INSN. Non-stack register numbers are not changed. REGSTACK is the
2612 current stack content. Insns may be emitted as needed to arrange the
2613 stack for the 387 based on the contents of the insn. */
2616 subst_stack_regs (insn
, regstack
)
2620 register rtx
*note_link
, note
;
2624 if (GET_CODE (insn
) == CALL_INSN
)
2626 int top
= regstack
->top
;
2628 /* If there are any floating point parameters to be passed in
2629 registers for this call, make sure they are in the right
2634 straighten_stack (PREV_INSN (insn
), regstack
);
2636 /* Now mark the arguments as dead after the call. */
2638 while (regstack
->top
>= 0)
2640 CLEAR_HARD_REG_BIT (regstack
->reg_set
, FIRST_STACK_REG
+ regstack
->top
);
2646 /* Do the actual substitution if any stack regs are mentioned.
2647 Since we only record whether entire insn mentions stack regs, and
2648 subst_stack_regs_pat only works for patterns that contain stack regs,
2649 we must check each pattern in a parallel here. A call_value_pop could
2652 if (GET_MODE (insn
) == QImode
)
2654 n_operands
= asm_noperands (PATTERN (insn
));
2655 if (n_operands
>= 0)
2657 /* This insn is an `asm' with operands. Decode the operands,
2658 decide how many are inputs, and do register substitution.
2659 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2661 rtx operands
[MAX_RECOG_OPERANDS
];
2662 rtx
*operands_loc
[MAX_RECOG_OPERANDS
];
2663 rtx body
= PATTERN (insn
);
2664 int n_inputs
, n_outputs
;
2666 = (char **) alloca (n_operands
* sizeof (char *));
2668 decode_asm_operands (body
, operands
, operands_loc
,
2669 constraints
, NULL_PTR
);
2670 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
2671 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
,
2672 constraints
, n_inputs
, n_outputs
);
2676 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2677 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2679 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2680 subst_stack_regs_pat (insn
, regstack
,
2681 XVECEXP (PATTERN (insn
), 0, i
));
2684 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2687 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2688 REG_UNUSED will already have been dealt with, so just return. */
2690 if (GET_CODE (insn
) == NOTE
)
2693 /* If there is a REG_UNUSED note on a stack register on this insn,
2694 the indicated reg must be popped. The REG_UNUSED note is removed,
2695 since the form of the newly emitted pop insn references the reg,
2696 making it no longer `unset'. */
2698 note_link
= ®_NOTES(insn
);
2699 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2700 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2702 *note_link
= XEXP (note
, 1);
2703 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), emit_insn_after
);
2706 note_link
= &XEXP (note
, 1);
2709 /* Change the organization of the stack so that it fits a new basic
2710 block. Some registers might have to be popped, but there can never be
2711 a register live in the new block that is not now live.
2713 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2714 or emit_insn_after. OLD is the original stack layout, and NEW is
2715 the desired form. OLD is updated to reflect the code emitted, ie, it
2716 will be the same as NEW upon return.
2718 This function will not preserve block_end[]. But that information
2719 is no longer needed once this has executed. */
2722 change_stack (insn
, old
, new, when
)
2730 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2731 If we are to insert after INSN, find the next insn, and insert before
2734 if (when
== emit_insn_after
)
2735 insn
= NEXT_INSN (insn
);
2737 /* Pop any registers that are not needed in the new block. */
2739 for (reg
= old
->top
; reg
>= 0; reg
--)
2740 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2741 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[reg
], DFmode
),
2746 /* If the new block has never been processed, then it can inherit
2747 the old stack order. */
2749 new->top
= old
->top
;
2750 bcopy (old
->reg
, new->reg
, sizeof (new->reg
));
2754 /* This block has been entered before, and we must match the
2755 previously selected stack order. */
2757 /* By now, the only difference should be the order of the stack,
2758 not their depth or liveliness. */
2760 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2766 if (old
->top
!= new->top
)
2769 /* Loop here emitting swaps until the stack is correct. The
2770 worst case number of swaps emitted is N + 2, where N is the
2771 depth of the stack. In some cases, the reg at the top of
2772 stack may be correct, but swapped anyway in order to fix
2773 other regs. But since we never swap any other reg away from
2774 its correct slot, this algorithm will converge. */
2778 /* Swap the reg at top of stack into the position it is
2779 supposed to be in, until the correct top of stack appears. */
2781 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2783 for (reg
= new->top
; reg
>= 0; reg
--)
2784 if (new->reg
[reg
] == old
->reg
[old
->top
])
2790 emit_swap_insn (insn
, old
,
2791 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2794 /* See if any regs remain incorrect. If so, bring an
2795 incorrect reg to the top of stack, and let the while loop
2798 for (reg
= new->top
; reg
>= 0; reg
--)
2799 if (new->reg
[reg
] != old
->reg
[reg
])
2801 emit_swap_insn (insn
, old
,
2802 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2807 /* At this point there must be no differences. */
2809 for (reg
= old
->top
; reg
>= 0; reg
--)
2810 if (old
->reg
[reg
] != new->reg
[reg
])
2815 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2816 found, ensure that a jump from INSN to the code_label to which the
2817 label_ref points ends up with the same stack as that at the
2818 code_label. Do this by inserting insns just before the code_label to
2819 pop and rotate the stack until it is in the correct order. REGSTACK
2820 is the order of the register stack in INSN.
2822 Any code that is emitted here must not be later processed as part
2823 of any block, as it will already contain hard register numbers. */
2826 goto_block_pat (insn
, regstack
, pat
)
2832 rtx new_jump
, new_label
, new_barrier
;
2835 struct stack_def temp_stack
;
2838 switch (GET_CODE (pat
))
2841 straighten_stack (PREV_INSN (insn
), regstack
);
2846 char *fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
2848 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
2851 goto_block_pat (insn
, regstack
, XEXP (pat
, i
));
2853 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2854 goto_block_pat (insn
, regstack
, XVECEXP (pat
, i
, j
));
2861 label
= XEXP (pat
, 0);
2862 if (GET_CODE (label
) != CODE_LABEL
)
2865 /* First, see if in fact anything needs to be done to the stack at all. */
2866 if (INSN_UID (label
) <= 0)
2869 label_stack
= &block_stack_in
[BLOCK_NUM (label
)];
2871 if (label_stack
->top
== -2)
2873 /* If the target block hasn't had a stack order selected, then
2874 we need merely ensure that no pops are needed. */
2876 for (reg
= regstack
->top
; reg
>= 0; reg
--)
2877 if (! TEST_HARD_REG_BIT (label_stack
->reg_set
, regstack
->reg
[reg
]))
2882 /* change_stack will not emit any code in this case. */
2884 change_stack (label
, regstack
, label_stack
, emit_insn_after
);
2888 else if (label_stack
->top
== regstack
->top
)
2890 for (reg
= label_stack
->top
; reg
>= 0; reg
--)
2891 if (label_stack
->reg
[reg
] != regstack
->reg
[reg
])
2898 /* At least one insn will need to be inserted before label. Insert
2899 a jump around the code we are about to emit. Emit a label for the new
2900 code, and point the original insn at this new label. We can't use
2901 redirect_jump here, because we're using fld[4] of the code labels as
2902 LABEL_REF chains, no NUSES counters. */
2904 new_jump
= emit_jump_insn_before (gen_jump (label
), label
);
2905 record_label_references (new_jump
, PATTERN (new_jump
));
2906 JUMP_LABEL (new_jump
) = label
;
2908 new_barrier
= emit_barrier_after (new_jump
);
2910 new_label
= gen_label_rtx ();
2911 emit_label_after (new_label
, new_barrier
);
2912 LABEL_REFS (new_label
) = new_label
;
2914 /* The old label_ref will no longer point to the code_label if now uses,
2915 so strip the label_ref from the code_label's chain of references. */
2917 for (ref
= &LABEL_REFS (label
); *ref
!= label
; ref
= &LABEL_NEXTREF (*ref
))
2924 *ref
= LABEL_NEXTREF (*ref
);
2926 XEXP (pat
, 0) = new_label
;
2927 record_label_references (insn
, PATTERN (insn
));
2929 if (JUMP_LABEL (insn
) == label
)
2930 JUMP_LABEL (insn
) = new_label
;
2932 /* Now emit the needed code. */
2934 temp_stack
= *regstack
;
2936 change_stack (new_label
, &temp_stack
, label_stack
, emit_insn_after
);
2939 /* Traverse all basic blocks in a function, converting the register
2940 references in each insn from the "flat" register file that gcc uses, to
2941 the stack-like registers the 387 uses. */
2946 register int block
, reg
;
2947 register rtx insn
, next
;
2948 struct stack_def regstack
;
2950 for (block
= 0; block
< blocks
; block
++)
2952 if (block_stack_in
[block
].top
== -2)
2954 /* This block has not been previously encountered. Choose a
2955 default mapping for any stack regs live on entry */
2957 block_stack_in
[block
].top
= -1;
2959 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
2960 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, reg
))
2961 block_stack_in
[block
].reg
[++block_stack_in
[block
].top
] = reg
;
2964 /* Process all insns in this block. Keep track of `next' here,
2965 so that we don't process any insns emitted while making
2966 substitutions in INSN. */
2968 next
= block_begin
[block
];
2969 regstack
= block_stack_in
[block
];
2973 next
= NEXT_INSN (insn
);
2975 /* Don't bother processing unless there is a stack reg
2976 mentioned or if it's a CALL_INSN (register passing of
2977 floating point values). */
2979 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
2980 subst_stack_regs (insn
, ®stack
);
2982 } while (insn
!= block_end
[block
]);
2984 /* Something failed if the stack life doesn't match. */
2986 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, block_out_reg_set
[block
], win
);
2992 /* Adjust the stack of this block on exit to match the stack of
2993 the target block, or copy stack information into stack of
2994 jump target if the target block's stack order hasn't been set
2997 if (GET_CODE (insn
) == JUMP_INSN
)
2998 goto_block_pat (insn
, ®stack
, PATTERN (insn
));
3000 /* Likewise handle the case where we fall into the next block. */
3002 if ((block
< blocks
- 1) && block_drops_in
[block
+1])
3003 change_stack (insn
, ®stack
, &block_stack_in
[block
+1],
3007 /* If the last basic block is the end of a loop, and that loop has
3008 regs live at its start, then the last basic block will have regs live
3009 at its end that need to be popped before the function returns. */
3012 int value_reg_low
, value_reg_high
;
3013 value_reg_low
= value_reg_high
= -1;
3016 if (retvalue
= stack_result (current_function_decl
))
3018 value_reg_low
= REGNO (retvalue
);
3019 value_reg_high
= value_reg_low
+
3020 HARD_REGNO_NREGS (value_reg_low
, GET_MODE (retvalue
)) - 1;
3024 for (reg
= regstack
.top
; reg
>= 0; reg
--)
3025 if (regstack
.reg
[reg
] < value_reg_low
||
3026 regstack
.reg
[reg
] > value_reg_high
)
3027 insn
= emit_pop_insn (insn
, ®stack
,
3028 FP_MODE_REG (regstack
.reg
[reg
], DFmode
),
3031 straighten_stack (insn
, ®stack
);
3034 /* Check expression PAT, which is in INSN, for label references. if
3035 one is found, print the block number of destination to FILE. */
3038 print_blocks (file
, insn
, pat
)
3042 register RTX_CODE code
= GET_CODE (pat
);
3046 if (code
== LABEL_REF
)
3048 register rtx label
= XEXP (pat
, 0);
3050 if (GET_CODE (label
) != CODE_LABEL
)
3053 fprintf (file
, " %d", BLOCK_NUM (label
));
3058 fmt
= GET_RTX_FORMAT (code
);
3059 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3062 print_blocks (file
, insn
, XEXP (pat
, i
));
3066 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
3067 print_blocks (file
, insn
, XVECEXP (pat
, i
, j
));
3072 /* Write information about stack registers and stack blocks into FILE.
3073 This is part of making a debugging dump. */
3075 dump_stack_info (file
)
3080 fprintf (file
, "\n%d stack blocks.\n", blocks
);
3081 for (block
= 0; block
< blocks
; block
++)
3083 register rtx head
, jump
, end
;
3086 fprintf (file
, "\nStack block %d: first insn %d, last %d.\n",
3087 block
, INSN_UID (block_begin
[block
]),
3088 INSN_UID (block_end
[block
]));
3090 head
= block_begin
[block
];
3092 fprintf (file
, "Reached from blocks: ");
3093 if (GET_CODE (head
) == CODE_LABEL
)
3094 for (jump
= LABEL_REFS (head
);
3096 jump
= LABEL_NEXTREF (jump
))
3098 register int from_block
= BLOCK_NUM (CONTAINING_INSN (jump
));
3099 fprintf (file
, " %d", from_block
);
3101 if (block_drops_in
[block
])
3102 fprintf (file
, " previous");
3104 fprintf (file
, "\nlive stack registers on block entry: ");
3105 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
3107 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, regno
))
3108 fprintf (file
, "%d ", regno
);
3111 fprintf (file
, "\nlive stack registers on block exit: ");
3112 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
3114 if (TEST_HARD_REG_BIT (block_out_reg_set
[block
], regno
))
3115 fprintf (file
, "%d ", regno
);
3118 end
= block_end
[block
];
3120 fprintf (file
, "\nJumps to blocks: ");
3121 if (GET_CODE (end
) == JUMP_INSN
)
3122 print_blocks (file
, end
, PATTERN (end
));
3124 if (block
+ 1 < blocks
&& block_drops_in
[block
+1])
3125 fprintf (file
, " next");
3126 else if (block
+ 1 == blocks
3127 || (GET_CODE (end
) == JUMP_INSN
3128 && GET_CODE (PATTERN (end
)) == RETURN
))
3129 fprintf (file
, " return");
3131 fprintf (file
, "\n");
3134 #endif /* STACK_REGS */