gfortran.h (gfc_expr): Remove from_H, add "representation" struct.
[official-gcc.git] / gcc / global.c
bloba3da8a28d60fb6c93fca640c2fca6d77902efbb5
1 /* Allocate registers for pseudo-registers that span basic blocks.
2 Copyright (C) 1987, 1988, 1991, 1994, 1996, 1997, 1998,
3 1999, 2000, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "machmode.h"
28 #include "hard-reg-set.h"
29 #include "rtl.h"
30 #include "tm_p.h"
31 #include "flags.h"
32 #include "regs.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "reload.h"
37 #include "output.h"
38 #include "toplev.h"
39 #include "tree-pass.h"
40 #include "timevar.h"
41 #include "vecprim.h"
43 /* This pass of the compiler performs global register allocation.
44 It assigns hard register numbers to all the pseudo registers
45 that were not handled in local_alloc. Assignments are recorded
46 in the vector reg_renumber, not by changing the rtl code.
47 (Such changes are made by final). The entry point is
48 the function global_alloc.
50 After allocation is complete, the reload pass is run as a subroutine
51 of this pass, so that when a pseudo reg loses its hard reg due to
52 spilling it is possible to make a second attempt to find a hard
53 reg for it. The reload pass is independent in other respects
54 and it is run even when stupid register allocation is in use.
56 1. Assign allocation-numbers (allocnos) to the pseudo-registers
57 still needing allocations and to the pseudo-registers currently
58 allocated by local-alloc which may be spilled by reload.
59 Set up tables reg_allocno and allocno_reg to map
60 reg numbers to allocnos and vice versa.
61 max_allocno gets the number of allocnos in use.
63 2. Allocate a max_allocno by max_allocno conflict bit matrix and clear it.
64 Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix
65 for conflicts between allocnos and explicit hard register use
66 (which includes use of pseudo-registers allocated by local_alloc).
68 3. For each basic block
69 walk forward through the block, recording which
70 pseudo-registers and which hardware registers are live.
71 Build the conflict matrix between the pseudo-registers
72 and another of pseudo-registers versus hardware registers.
73 Also record the preferred hardware registers
74 for each pseudo-register.
76 4. Sort a table of the allocnos into order of
77 desirability of the variables.
79 5. Allocate the variables in that order; each if possible into
80 a preferred register, else into another register. */
82 /* Number of pseudo-registers which are candidates for allocation. */
84 static int max_allocno;
86 /* Indexed by (pseudo) reg number, gives the allocno, or -1
87 for pseudo registers which are not to be allocated. */
89 static int *reg_allocno;
91 struct allocno
93 int reg;
94 /* Gives the number of consecutive hard registers needed by that
95 pseudo reg. */
96 int size;
98 /* Number of calls crossed by each allocno. */
99 int calls_crossed;
101 /* Number of calls that might throw crossed by each allocno. */
102 int throwing_calls_crossed;
104 /* Number of refs to each allocno. */
105 int n_refs;
107 /* Frequency of uses of each allocno. */
108 int freq;
110 /* Guess at live length of each allocno.
111 This is actually the max of the live lengths of the regs. */
112 int live_length;
114 /* Set of hard regs conflicting with allocno N. */
116 HARD_REG_SET hard_reg_conflicts;
118 /* Set of hard regs preferred by allocno N.
119 This is used to make allocnos go into regs that are copied to or from them,
120 when possible, to reduce register shuffling. */
122 HARD_REG_SET hard_reg_preferences;
124 /* Similar, but just counts register preferences made in simple copy
125 operations, rather than arithmetic. These are given priority because
126 we can always eliminate an insn by using these, but using a register
127 in the above list won't always eliminate an insn. */
129 HARD_REG_SET hard_reg_copy_preferences;
131 /* Similar to hard_reg_preferences, but includes bits for subsequent
132 registers when an allocno is multi-word. The above variable is used for
133 allocation while this is used to build reg_someone_prefers, below. */
135 HARD_REG_SET hard_reg_full_preferences;
137 /* Set of hard registers that some later allocno has a preference for. */
139 HARD_REG_SET regs_someone_prefers;
141 #ifdef STACK_REGS
142 /* Set to true if allocno can't be allocated in the stack register. */
143 bool no_stack_reg;
144 #endif
147 static struct allocno *allocno;
149 /* A vector of the integers from 0 to max_allocno-1,
150 sorted in the order of first-to-be-allocated first. */
152 static int *allocno_order;
154 /* Indexed by (pseudo) reg number, gives the number of another
155 lower-numbered pseudo reg which can share a hard reg with this pseudo
156 *even if the two pseudos would otherwise appear to conflict*. */
158 static int *reg_may_share;
160 /* Define the number of bits in each element of `conflicts' and what
161 type that element has. We use the largest integer format on the
162 host machine. */
164 #define INT_BITS HOST_BITS_PER_WIDE_INT
165 #define INT_TYPE HOST_WIDE_INT
167 /* max_allocno by max_allocno array of bits,
168 recording whether two allocno's conflict (can't go in the same
169 hardware register).
171 `conflicts' is symmetric after the call to mirror_conflicts. */
173 static INT_TYPE *conflicts;
175 /* Number of ints required to hold max_allocno bits.
176 This is the length of a row in `conflicts'. */
178 static int allocno_row_words;
180 /* Two macros to test or store 1 in an element of `conflicts'. */
182 #define CONFLICTP(I, J) \
183 (conflicts[(I) * allocno_row_words + (unsigned) (J) / INT_BITS] \
184 & ((INT_TYPE) 1 << ((unsigned) (J) % INT_BITS)))
186 /* For any allocno set in ALLOCNO_SET, set ALLOCNO to that allocno,
187 and execute CODE. */
188 #define EXECUTE_IF_SET_IN_ALLOCNO_SET(ALLOCNO_SET, ALLOCNO, CODE) \
189 do { \
190 int i_; \
191 int allocno_; \
192 INT_TYPE *p_ = (ALLOCNO_SET); \
194 for (i_ = allocno_row_words - 1, allocno_ = 0; i_ >= 0; \
195 i_--, allocno_ += INT_BITS) \
197 unsigned INT_TYPE word_ = (unsigned INT_TYPE) *p_++; \
199 for ((ALLOCNO) = allocno_; word_; word_ >>= 1, (ALLOCNO)++) \
201 if (word_ & 1) \
202 {CODE;} \
205 } while (0)
207 /* This doesn't work for non-GNU C due to the way CODE is macro expanded. */
208 #if 0
209 /* For any allocno that conflicts with IN_ALLOCNO, set OUT_ALLOCNO to
210 the conflicting allocno, and execute CODE. This macro assumes that
211 mirror_conflicts has been run. */
212 #define EXECUTE_IF_CONFLICT(IN_ALLOCNO, OUT_ALLOCNO, CODE)\
213 EXECUTE_IF_SET_IN_ALLOCNO_SET (conflicts + (IN_ALLOCNO) * allocno_row_words,\
214 OUT_ALLOCNO, (CODE))
215 #endif
217 /* Set of hard regs currently live (during scan of all insns). */
219 static HARD_REG_SET hard_regs_live;
221 /* Set of registers that global-alloc isn't supposed to use. */
223 static HARD_REG_SET no_global_alloc_regs;
225 /* Set of registers used so far. */
227 static HARD_REG_SET regs_used_so_far;
229 /* Number of refs to each hard reg, as used by local alloc.
230 It is zero for a reg that contains global pseudos or is explicitly used. */
232 static int local_reg_n_refs[FIRST_PSEUDO_REGISTER];
234 /* Frequency of uses of given hard reg. */
235 static int local_reg_freq[FIRST_PSEUDO_REGISTER];
237 /* Guess at live length of each hard reg, as used by local alloc.
238 This is actually the sum of the live lengths of the specific regs. */
240 static int local_reg_live_length[FIRST_PSEUDO_REGISTER];
242 /* Set to 1 a bit in a vector TABLE of HARD_REG_SETs, for vector
243 element I, and hard register number J. */
245 #define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (allocno[I].TABLE, J)
247 /* Bit mask for allocnos live at current point in the scan. */
249 static INT_TYPE *allocnos_live;
251 /* Test, set or clear bit number I in allocnos_live,
252 a bit vector indexed by allocno. */
254 #define SET_ALLOCNO_LIVE(I) \
255 (allocnos_live[(unsigned) (I) / INT_BITS] \
256 |= ((INT_TYPE) 1 << ((unsigned) (I) % INT_BITS)))
258 #define CLEAR_ALLOCNO_LIVE(I) \
259 (allocnos_live[(unsigned) (I) / INT_BITS] \
260 &= ~((INT_TYPE) 1 << ((unsigned) (I) % INT_BITS)))
262 /* This is turned off because it doesn't work right for DImode.
263 (And it is only used for DImode, so the other cases are worthless.)
264 The problem is that it isn't true that there is NO possibility of conflict;
265 only that there is no conflict if the two pseudos get the exact same regs.
266 If they were allocated with a partial overlap, there would be a conflict.
267 We can't safely turn off the conflict unless we have another way to
268 prevent the partial overlap.
270 Idea: change hard_reg_conflicts so that instead of recording which
271 hard regs the allocno may not overlap, it records where the allocno
272 may not start. Change both where it is used and where it is updated.
273 Then there is a way to record that (reg:DI 108) may start at 10
274 but not at 9 or 11. There is still the question of how to record
275 this semi-conflict between two pseudos. */
276 #if 0
277 /* Reg pairs for which conflict after the current insn
278 is inhibited by a REG_NO_CONFLICT note.
279 If the table gets full, we ignore any other notes--that is conservative. */
280 #define NUM_NO_CONFLICT_PAIRS 4
281 /* Number of pairs in use in this insn. */
282 int n_no_conflict_pairs;
283 static struct { int allocno1, allocno2;}
284 no_conflict_pairs[NUM_NO_CONFLICT_PAIRS];
285 #endif /* 0 */
287 /* Record all regs that are set in any one insn.
288 Communication from mark_reg_{store,clobber} and global_conflicts. */
290 static rtx *regs_set;
291 static int n_regs_set;
293 /* All registers that can be eliminated. */
295 static HARD_REG_SET eliminable_regset;
297 static int allocno_compare (const void *, const void *);
298 static void global_conflicts (void);
299 static void mirror_conflicts (void);
300 static void expand_preferences (void);
301 static void prune_preferences (void);
302 static void find_reg (int, HARD_REG_SET, int, int, int);
303 static void record_one_conflict (int);
304 static void record_conflicts (int *, int);
305 static void mark_reg_store (rtx, rtx, void *);
306 static void mark_reg_clobber (rtx, rtx, void *);
307 static void mark_reg_conflicts (rtx);
308 static void mark_reg_death (rtx);
309 static void set_preference (rtx, rtx);
310 static void dump_conflicts (FILE *);
311 static void reg_becomes_live (rtx, rtx, void *);
312 static void reg_dies (int, enum machine_mode, struct insn_chain *);
314 static void allocate_bb_info (void);
315 static void free_bb_info (void);
316 static bool check_earlyclobber (rtx);
317 static void mark_reg_use_for_earlyclobber_1 (rtx *, void *);
318 static int mark_reg_use_for_earlyclobber (rtx *, void *);
319 static void calculate_local_reg_bb_info (void);
320 static void set_up_bb_rts_numbers (void);
321 static int rpost_cmp (const void *, const void *);
322 static void calculate_reg_pav (void);
323 static void modify_reg_pav (void);
324 static void make_accurate_live_analysis (void);
328 /* Look through the list of eliminable registers. Add registers
329 clobbered by asm statements to LIVE_REGS. Set ELIM_SET to the set of
330 registers which may be eliminated. Set NO_GLOBAL_SET to the set of
331 registers which may not be used across blocks.
333 ASM_CLOBBERED is the set of registers clobbered by some asm statement.
335 This will normally be called with LIVE_REGS as the global variable
336 regs_ever_live, ELIM_SET as the file static variable
337 eliminable_regset, and NO_GLOBAL_SET as the file static variable
338 NO_GLOBAL_ALLOC_REGS. */
340 static void
341 compute_regsets (char asm_clobbered[FIRST_PSEUDO_REGISTER],
342 char live_regs[FIRST_PSEUDO_REGISTER],
343 HARD_REG_SET *elim_set,
344 HARD_REG_SET *no_global_set)
346 #ifdef ELIMINABLE_REGS
347 static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS;
348 size_t i;
349 #endif
350 int need_fp
351 = (! flag_omit_frame_pointer
352 || (current_function_calls_alloca && EXIT_IGNORE_STACK)
353 || FRAME_POINTER_REQUIRED);
355 /* A machine may have certain hard registers that
356 are safe to use only within a basic block. */
358 CLEAR_HARD_REG_SET (*no_global_set);
359 CLEAR_HARD_REG_SET (*elim_set);
361 /* Build the regset of all eliminable registers and show we can't use those
362 that we already know won't be eliminated. */
363 #ifdef ELIMINABLE_REGS
364 for (i = 0; i < ARRAY_SIZE (eliminables); i++)
366 bool cannot_elim
367 = (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to)
368 || (eliminables[i].to == STACK_POINTER_REGNUM && need_fp));
370 if (!asm_clobbered[eliminables[i].from])
372 SET_HARD_REG_BIT (*elim_set, eliminables[i].from);
374 if (cannot_elim)
375 SET_HARD_REG_BIT (*no_global_set, eliminables[i].from);
377 else if (cannot_elim)
378 error ("%s cannot be used in asm here",
379 reg_names[eliminables[i].from]);
380 else
381 live_regs[eliminables[i].from] = 1;
383 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
384 if (!asm_clobbered[HARD_FRAME_POINTER_REGNUM])
386 SET_HARD_REG_BIT (*elim_set, HARD_FRAME_POINTER_REGNUM);
387 if (need_fp)
388 SET_HARD_REG_BIT (*no_global_set, HARD_FRAME_POINTER_REGNUM);
390 else if (need_fp)
391 error ("%s cannot be used in asm here",
392 reg_names[HARD_FRAME_POINTER_REGNUM]);
393 else
394 live_regs[HARD_FRAME_POINTER_REGNUM] = 1;
395 #endif
397 #else
398 if (!asm_clobbered[FRAME_POINTER_REGNUM])
400 SET_HARD_REG_BIT (*elim_set, FRAME_POINTER_REGNUM);
401 if (need_fp)
402 SET_HARD_REG_BIT (*no_global_set, FRAME_POINTER_REGNUM);
404 else if (need_fp)
405 error ("%s cannot be used in asm here", reg_names[FRAME_POINTER_REGNUM]);
406 else
407 live_regs[FRAME_POINTER_REGNUM] = 1;
408 #endif
411 /* Perform allocation of pseudo-registers not allocated by local_alloc.
413 Return value is nonzero if reload failed
414 and we must not do any more for this function. */
416 static int
417 global_alloc (void)
419 int retval;
420 size_t i;
421 rtx x;
423 make_accurate_live_analysis ();
425 compute_regsets (regs_asm_clobbered, regs_ever_live,
426 &eliminable_regset, &no_global_alloc_regs);
428 /* Track which registers have already been used. Start with registers
429 explicitly in the rtl, then registers allocated by local register
430 allocation. */
432 CLEAR_HARD_REG_SET (regs_used_so_far);
433 #ifdef LEAF_REGISTERS
434 /* If we are doing the leaf function optimization, and this is a leaf
435 function, it means that the registers that take work to save are those
436 that need a register window. So prefer the ones that can be used in
437 a leaf function. */
439 const char *cheap_regs;
440 const char *const leaf_regs = LEAF_REGISTERS;
442 if (only_leaf_regs_used () && leaf_function_p ())
443 cheap_regs = leaf_regs;
444 else
445 cheap_regs = call_used_regs;
446 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
447 if (regs_ever_live[i] || cheap_regs[i])
448 SET_HARD_REG_BIT (regs_used_so_far, i);
450 #else
451 /* We consider registers that do not have to be saved over calls as if
452 they were already used since there is no cost in using them. */
453 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
454 if (regs_ever_live[i] || call_used_regs[i])
455 SET_HARD_REG_BIT (regs_used_so_far, i);
456 #endif
458 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
459 if (reg_renumber[i] >= 0)
460 SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]);
462 /* Establish mappings from register number to allocation number
463 and vice versa. In the process, count the allocnos. */
465 reg_allocno = XNEWVEC (int, max_regno);
467 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
468 reg_allocno[i] = -1;
470 /* Initialize the shared-hard-reg mapping
471 from the list of pairs that may share. */
472 reg_may_share = XCNEWVEC (int, max_regno);
473 for (x = regs_may_share; x; x = XEXP (XEXP (x, 1), 1))
475 int r1 = REGNO (XEXP (x, 0));
476 int r2 = REGNO (XEXP (XEXP (x, 1), 0));
477 if (r1 > r2)
478 reg_may_share[r1] = r2;
479 else
480 reg_may_share[r2] = r1;
483 max_allocno = 0;
484 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
485 /* Note that reg_live_length[i] < 0 indicates a "constant" reg
486 that we are supposed to refrain from putting in a hard reg.
487 -2 means do make an allocno but don't allocate it. */
488 if (REG_N_REFS (i) != 0 && REG_LIVE_LENGTH (i) != -1
489 /* Don't allocate pseudos that cross calls,
490 if this function receives a nonlocal goto. */
491 && (! current_function_has_nonlocal_label
492 || REG_N_CALLS_CROSSED (i) == 0))
494 if (reg_renumber[i] < 0
495 && reg_may_share[i] && reg_allocno[reg_may_share[i]] >= 0)
496 reg_allocno[i] = reg_allocno[reg_may_share[i]];
497 else
498 reg_allocno[i] = max_allocno++;
499 gcc_assert (REG_LIVE_LENGTH (i));
501 else
502 reg_allocno[i] = -1;
504 allocno = XCNEWVEC (struct allocno, max_allocno);
506 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
507 if (reg_allocno[i] >= 0)
509 int num = reg_allocno[i];
510 allocno[num].reg = i;
511 allocno[num].size = PSEUDO_REGNO_SIZE (i);
512 allocno[num].calls_crossed += REG_N_CALLS_CROSSED (i);
513 allocno[num].throwing_calls_crossed
514 += REG_N_THROWING_CALLS_CROSSED (i);
515 allocno[num].n_refs += REG_N_REFS (i);
516 allocno[num].freq += REG_FREQ (i);
517 if (allocno[num].live_length < REG_LIVE_LENGTH (i))
518 allocno[num].live_length = REG_LIVE_LENGTH (i);
521 /* Calculate amount of usage of each hard reg by pseudos
522 allocated by local-alloc. This is to see if we want to
523 override it. */
524 memset (local_reg_live_length, 0, sizeof local_reg_live_length);
525 memset (local_reg_n_refs, 0, sizeof local_reg_n_refs);
526 memset (local_reg_freq, 0, sizeof local_reg_freq);
527 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
528 if (reg_renumber[i] >= 0)
530 int regno = reg_renumber[i];
531 int endregno = end_hard_regno (PSEUDO_REGNO_MODE (i), regno);
532 int j;
534 for (j = regno; j < endregno; j++)
536 local_reg_n_refs[j] += REG_N_REFS (i);
537 local_reg_freq[j] += REG_FREQ (i);
538 local_reg_live_length[j] += REG_LIVE_LENGTH (i);
542 /* We can't override local-alloc for a reg used not just by local-alloc. */
543 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
544 if (regs_ever_live[i])
545 local_reg_n_refs[i] = 0, local_reg_freq[i] = 0;
547 allocno_row_words = (max_allocno + INT_BITS - 1) / INT_BITS;
549 /* We used to use alloca here, but the size of what it would try to
550 allocate would occasionally cause it to exceed the stack limit and
551 cause unpredictable core dumps. Some examples were > 2Mb in size. */
552 conflicts = XCNEWVEC (INT_TYPE, max_allocno * allocno_row_words);
554 allocnos_live = XNEWVEC (INT_TYPE, allocno_row_words);
556 /* If there is work to be done (at least one reg to allocate),
557 perform global conflict analysis and allocate the regs. */
559 if (max_allocno > 0)
561 /* Scan all the insns and compute the conflicts among allocnos
562 and between allocnos and hard regs. */
564 global_conflicts ();
566 mirror_conflicts ();
568 /* Eliminate conflicts between pseudos and eliminable registers. If
569 the register is not eliminated, the pseudo won't really be able to
570 live in the eliminable register, so the conflict doesn't matter.
571 If we do eliminate the register, the conflict will no longer exist.
572 So in either case, we can ignore the conflict. Likewise for
573 preferences. */
575 for (i = 0; i < (size_t) max_allocno; i++)
577 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_conflicts,
578 eliminable_regset);
579 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_copy_preferences,
580 eliminable_regset);
581 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_preferences,
582 eliminable_regset);
585 /* Try to expand the preferences by merging them between allocnos. */
587 expand_preferences ();
589 /* Determine the order to allocate the remaining pseudo registers. */
591 allocno_order = XNEWVEC (int, max_allocno);
592 for (i = 0; i < (size_t) max_allocno; i++)
593 allocno_order[i] = i;
595 /* Default the size to 1, since allocno_compare uses it to divide by.
596 Also convert allocno_live_length of zero to -1. A length of zero
597 can occur when all the registers for that allocno have reg_live_length
598 equal to -2. In this case, we want to make an allocno, but not
599 allocate it. So avoid the divide-by-zero and set it to a low
600 priority. */
602 for (i = 0; i < (size_t) max_allocno; i++)
604 if (allocno[i].size == 0)
605 allocno[i].size = 1;
606 if (allocno[i].live_length == 0)
607 allocno[i].live_length = -1;
610 qsort (allocno_order, max_allocno, sizeof (int), allocno_compare);
612 prune_preferences ();
614 if (dump_file)
615 dump_conflicts (dump_file);
617 /* Try allocating them, one by one, in that order,
618 except for parameters marked with reg_live_length[regno] == -2. */
620 for (i = 0; i < (size_t) max_allocno; i++)
621 if (reg_renumber[allocno[allocno_order[i]].reg] < 0
622 && REG_LIVE_LENGTH (allocno[allocno_order[i]].reg) >= 0)
624 /* If we have more than one register class,
625 first try allocating in the class that is cheapest
626 for this pseudo-reg. If that fails, try any reg. */
627 if (N_REG_CLASSES > 1)
629 find_reg (allocno_order[i], 0, 0, 0, 0);
630 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
631 continue;
633 if (reg_alternate_class (allocno[allocno_order[i]].reg) != NO_REGS)
634 find_reg (allocno_order[i], 0, 1, 0, 0);
637 free (allocno_order);
640 /* Do the reloads now while the allocno data still exists, so that we can
641 try to assign new hard regs to any pseudo regs that are spilled. */
643 #if 0 /* We need to eliminate regs even if there is no rtl code,
644 for the sake of debugging information. */
645 if (n_basic_blocks > NUM_FIXED_BLOCKS)
646 #endif
648 build_insn_chain (get_insns ());
649 retval = reload (get_insns (), 1);
652 /* Clean up. */
653 free (reg_allocno);
654 free (reg_may_share);
655 free (allocno);
656 free (conflicts);
657 free (allocnos_live);
659 return retval;
662 /* Sort predicate for ordering the allocnos.
663 Returns -1 (1) if *v1 should be allocated before (after) *v2. */
665 static int
666 allocno_compare (const void *v1p, const void *v2p)
668 int v1 = *(const int *)v1p, v2 = *(const int *)v2p;
669 /* Note that the quotient will never be bigger than
670 the value of floor_log2 times the maximum number of
671 times a register can occur in one insn (surely less than 100)
672 weighted by the frequency (maximally REG_FREQ_MAX).
673 Multiplying this by 10000/REG_FREQ_MAX can't overflow. */
674 int pri1
675 = (((double) (floor_log2 (allocno[v1].n_refs) * allocno[v1].freq)
676 / allocno[v1].live_length)
677 * (10000 / REG_FREQ_MAX) * allocno[v1].size);
678 int pri2
679 = (((double) (floor_log2 (allocno[v2].n_refs) * allocno[v2].freq)
680 / allocno[v2].live_length)
681 * (10000 / REG_FREQ_MAX) * allocno[v2].size);
682 if (pri2 - pri1)
683 return pri2 - pri1;
685 /* If regs are equally good, sort by allocno,
686 so that the results of qsort leave nothing to chance. */
687 return v1 - v2;
690 /* Scan the rtl code and record all conflicts and register preferences in the
691 conflict matrices and preference tables. */
693 static void
694 global_conflicts (void)
696 unsigned i;
697 basic_block b;
698 rtx insn;
699 int *block_start_allocnos;
701 /* Make a vector that mark_reg_{store,clobber} will store in. */
702 regs_set = XNEWVEC (rtx, max_parallel * 2);
704 block_start_allocnos = XNEWVEC (int, max_allocno);
706 FOR_EACH_BB (b)
708 memset (allocnos_live, 0, allocno_row_words * sizeof (INT_TYPE));
710 /* Initialize table of registers currently live
711 to the state at the beginning of this basic block.
712 This also marks the conflicts among hard registers
713 and any allocnos that are live.
715 For pseudo-regs, there is only one bit for each one
716 no matter how many hard regs it occupies.
717 This is ok; we know the size from PSEUDO_REGNO_SIZE.
718 For explicit hard regs, we cannot know the size that way
719 since one hard reg can be used with various sizes.
720 Therefore, we must require that all the hard regs
721 implicitly live as part of a multi-word hard reg
722 be explicitly marked in basic_block_live_at_start. */
725 regset old = b->il.rtl->global_live_at_start;
726 int ax = 0;
727 reg_set_iterator rsi;
729 REG_SET_TO_HARD_REG_SET (hard_regs_live, old);
730 EXECUTE_IF_SET_IN_REG_SET (old, FIRST_PSEUDO_REGISTER, i, rsi)
732 int a = reg_allocno[i];
733 if (a >= 0)
735 SET_ALLOCNO_LIVE (a);
736 block_start_allocnos[ax++] = a;
738 else if ((a = reg_renumber[i]) >= 0)
739 add_to_hard_reg_set (&hard_regs_live, PSEUDO_REGNO_MODE (i), a);
742 /* Record that each allocno now live conflicts with each hard reg
743 now live.
745 It is not necessary to mark any conflicts between pseudos at
746 this point, even for pseudos which are live at the start of
747 the basic block.
749 Given two pseudos X and Y and any point in the CFG P.
751 On any path to point P where X and Y are live one of the
752 following conditions must be true:
754 1. X is live at some instruction on the path that
755 evaluates Y.
757 2. Y is live at some instruction on the path that
758 evaluates X.
760 3. Either X or Y is not evaluated on the path to P
761 (i.e. it is used uninitialized) and thus the
762 conflict can be ignored.
764 In cases #1 and #2 the conflict will be recorded when we
765 scan the instruction that makes either X or Y become live. */
766 record_conflicts (block_start_allocnos, ax);
768 #ifdef EH_RETURN_DATA_REGNO
769 if (bb_has_eh_pred (b))
771 unsigned int i;
773 for (i = 0; ; ++i)
775 unsigned int regno = EH_RETURN_DATA_REGNO (i);
776 if (regno == INVALID_REGNUM)
777 break;
778 record_one_conflict (regno);
781 #endif
783 /* Pseudos can't go in stack regs at the start of a basic block that
784 is reached by an abnormal edge. Likewise for call clobbered regs,
785 because caller-save, fixup_abnormal_edges and possibly the table
786 driven EH machinery are not quite ready to handle such regs live
787 across such edges. */
789 edge e;
790 edge_iterator ei;
792 FOR_EACH_EDGE (e, ei, b->preds)
793 if (e->flags & EDGE_ABNORMAL)
794 break;
796 if (e != NULL)
798 #ifdef STACK_REGS
799 EXECUTE_IF_SET_IN_ALLOCNO_SET (allocnos_live, ax,
801 allocno[ax].no_stack_reg = 1;
803 for (ax = FIRST_STACK_REG; ax <= LAST_STACK_REG; ax++)
804 record_one_conflict (ax);
805 #endif
807 /* No need to record conflicts for call clobbered regs if we have
808 nonlocal labels around, as we don't ever try to allocate such
809 regs in this case. */
810 if (! current_function_has_nonlocal_label)
811 for (ax = 0; ax < FIRST_PSEUDO_REGISTER; ax++)
812 if (call_used_regs [ax])
813 record_one_conflict (ax);
818 insn = BB_HEAD (b);
820 /* Scan the code of this basic block, noting which allocnos
821 and hard regs are born or die. When one is born,
822 record a conflict with all others currently live. */
824 while (1)
826 RTX_CODE code = GET_CODE (insn);
827 rtx link;
829 /* Make regs_set an empty set. */
831 n_regs_set = 0;
833 if (code == INSN || code == CALL_INSN || code == JUMP_INSN)
836 #if 0
837 int i = 0;
838 for (link = REG_NOTES (insn);
839 link && i < NUM_NO_CONFLICT_PAIRS;
840 link = XEXP (link, 1))
841 if (REG_NOTE_KIND (link) == REG_NO_CONFLICT)
843 no_conflict_pairs[i].allocno1
844 = reg_allocno[REGNO (SET_DEST (PATTERN (insn)))];
845 no_conflict_pairs[i].allocno2
846 = reg_allocno[REGNO (XEXP (link, 0))];
847 i++;
849 #endif /* 0 */
851 /* Mark any registers clobbered by INSN as live,
852 so they conflict with the inputs. */
854 note_stores (PATTERN (insn), mark_reg_clobber, NULL);
856 /* Mark any registers dead after INSN as dead now. */
858 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
859 if (REG_NOTE_KIND (link) == REG_DEAD)
860 mark_reg_death (XEXP (link, 0));
862 /* Mark any registers set in INSN as live,
863 and mark them as conflicting with all other live regs.
864 Clobbers are processed again, so they conflict with
865 the registers that are set. */
867 note_stores (PATTERN (insn), mark_reg_store, NULL);
869 #ifdef AUTO_INC_DEC
870 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
871 if (REG_NOTE_KIND (link) == REG_INC)
872 mark_reg_store (XEXP (link, 0), NULL_RTX, NULL);
873 #endif
875 /* If INSN has multiple outputs, then any reg that dies here
876 and is used inside of an output
877 must conflict with the other outputs.
879 It is unsafe to use !single_set here since it will ignore an
880 unused output. Just because an output is unused does not mean
881 the compiler can assume the side effect will not occur.
882 Consider if REG appears in the address of an output and we
883 reload the output. If we allocate REG to the same hard
884 register as an unused output we could set the hard register
885 before the output reload insn. */
886 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
887 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
888 if (REG_NOTE_KIND (link) == REG_DEAD)
890 int used_in_output = 0;
891 int i;
892 rtx reg = XEXP (link, 0);
894 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
896 rtx set = XVECEXP (PATTERN (insn), 0, i);
897 if (GET_CODE (set) == SET
898 && !REG_P (SET_DEST (set))
899 && !rtx_equal_p (reg, SET_DEST (set))
900 && reg_overlap_mentioned_p (reg, SET_DEST (set)))
901 used_in_output = 1;
903 if (used_in_output)
904 mark_reg_conflicts (reg);
907 /* Mark any registers set in INSN and then never used. */
909 while (n_regs_set-- > 0)
911 rtx note = find_regno_note (insn, REG_UNUSED,
912 REGNO (regs_set[n_regs_set]));
913 if (note)
914 mark_reg_death (XEXP (note, 0));
918 if (insn == BB_END (b))
919 break;
920 insn = NEXT_INSN (insn);
924 /* Clean up. */
925 free (block_start_allocnos);
926 free (regs_set);
928 /* Expand the preference information by looking for cases where one allocno
929 dies in an insn that sets an allocno. If those two allocnos don't conflict,
930 merge any preferences between those allocnos. */
932 static void
933 expand_preferences (void)
935 rtx insn;
936 rtx link;
937 rtx set;
939 /* We only try to handle the most common cases here. Most of the cases
940 where this wins are reg-reg copies. */
942 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
943 if (INSN_P (insn)
944 && (set = single_set (insn)) != 0
945 && REG_P (SET_DEST (set))
946 && reg_allocno[REGNO (SET_DEST (set))] >= 0)
947 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
948 if (REG_NOTE_KIND (link) == REG_DEAD
949 && REG_P (XEXP (link, 0))
950 && reg_allocno[REGNO (XEXP (link, 0))] >= 0
951 && ! CONFLICTP (reg_allocno[REGNO (SET_DEST (set))],
952 reg_allocno[REGNO (XEXP (link, 0))]))
954 int a1 = reg_allocno[REGNO (SET_DEST (set))];
955 int a2 = reg_allocno[REGNO (XEXP (link, 0))];
957 if (XEXP (link, 0) == SET_SRC (set))
959 IOR_HARD_REG_SET (allocno[a1].hard_reg_copy_preferences,
960 allocno[a2].hard_reg_copy_preferences);
961 IOR_HARD_REG_SET (allocno[a2].hard_reg_copy_preferences,
962 allocno[a1].hard_reg_copy_preferences);
965 IOR_HARD_REG_SET (allocno[a1].hard_reg_preferences,
966 allocno[a2].hard_reg_preferences);
967 IOR_HARD_REG_SET (allocno[a2].hard_reg_preferences,
968 allocno[a1].hard_reg_preferences);
969 IOR_HARD_REG_SET (allocno[a1].hard_reg_full_preferences,
970 allocno[a2].hard_reg_full_preferences);
971 IOR_HARD_REG_SET (allocno[a2].hard_reg_full_preferences,
972 allocno[a1].hard_reg_full_preferences);
976 /* Prune the preferences for global registers to exclude registers that cannot
977 be used.
979 Compute `regs_someone_prefers', which is a bitmask of the hard registers
980 that are preferred by conflicting registers of lower priority. If possible,
981 we will avoid using these registers. */
983 static void
984 prune_preferences (void)
986 int i;
987 int num;
988 int *allocno_to_order = XNEWVEC (int, max_allocno);
990 /* Scan least most important to most important.
991 For each allocno, remove from preferences registers that cannot be used,
992 either because of conflicts or register type. Then compute all registers
993 preferred by each lower-priority register that conflicts. */
995 for (i = max_allocno - 1; i >= 0; i--)
997 HARD_REG_SET temp;
999 num = allocno_order[i];
1000 allocno_to_order[num] = i;
1001 COPY_HARD_REG_SET (temp, allocno[num].hard_reg_conflicts);
1003 if (allocno[num].calls_crossed == 0)
1004 IOR_HARD_REG_SET (temp, fixed_reg_set);
1005 else
1006 IOR_HARD_REG_SET (temp, call_used_reg_set);
1008 IOR_COMPL_HARD_REG_SET
1009 (temp,
1010 reg_class_contents[(int) reg_preferred_class (allocno[num].reg)]);
1012 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, temp);
1013 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, temp);
1014 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_full_preferences, temp);
1017 for (i = max_allocno - 1; i >= 0; i--)
1019 /* Merge in the preferences of lower-priority registers (they have
1020 already been pruned). If we also prefer some of those registers,
1021 don't exclude them unless we are of a smaller size (in which case
1022 we want to give the lower-priority allocno the first chance for
1023 these registers). */
1024 HARD_REG_SET temp, temp2;
1025 int allocno2;
1027 num = allocno_order[i];
1029 CLEAR_HARD_REG_SET (temp);
1030 CLEAR_HARD_REG_SET (temp2);
1032 EXECUTE_IF_SET_IN_ALLOCNO_SET (conflicts + num * allocno_row_words,
1033 allocno2,
1035 if (allocno_to_order[allocno2] > i)
1037 if (allocno[allocno2].size <= allocno[num].size)
1038 IOR_HARD_REG_SET (temp,
1039 allocno[allocno2].hard_reg_full_preferences);
1040 else
1041 IOR_HARD_REG_SET (temp2,
1042 allocno[allocno2].hard_reg_full_preferences);
1046 AND_COMPL_HARD_REG_SET (temp, allocno[num].hard_reg_full_preferences);
1047 IOR_HARD_REG_SET (temp, temp2);
1048 COPY_HARD_REG_SET (allocno[num].regs_someone_prefers, temp);
1050 free (allocno_to_order);
1053 /* Assign a hard register to allocno NUM; look for one that is the beginning
1054 of a long enough stretch of hard regs none of which conflicts with ALLOCNO.
1055 The registers marked in PREFREGS are tried first.
1057 LOSERS, if nonzero, is a HARD_REG_SET indicating registers that cannot
1058 be used for this allocation.
1060 If ALT_REGS_P is zero, consider only the preferred class of ALLOCNO's reg.
1061 Otherwise ignore that preferred class and use the alternate class.
1063 If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that
1064 will have to be saved and restored at calls.
1066 RETRYING is nonzero if this is called from retry_global_alloc.
1068 If we find one, record it in reg_renumber.
1069 If not, do nothing. */
1071 static void
1072 find_reg (int num, HARD_REG_SET losers, int alt_regs_p, int accept_call_clobbered, int retrying)
1074 int i, best_reg, pass;
1075 HARD_REG_SET used, used1, used2;
1077 enum reg_class class = (alt_regs_p
1078 ? reg_alternate_class (allocno[num].reg)
1079 : reg_preferred_class (allocno[num].reg));
1080 enum machine_mode mode = PSEUDO_REGNO_MODE (allocno[num].reg);
1082 if (accept_call_clobbered)
1083 COPY_HARD_REG_SET (used1, call_fixed_reg_set);
1084 else if (allocno[num].calls_crossed == 0)
1085 COPY_HARD_REG_SET (used1, fixed_reg_set);
1086 else
1087 COPY_HARD_REG_SET (used1, call_used_reg_set);
1089 /* Some registers should not be allocated in global-alloc. */
1090 IOR_HARD_REG_SET (used1, no_global_alloc_regs);
1091 if (losers)
1092 IOR_HARD_REG_SET (used1, losers);
1094 IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) class]);
1095 COPY_HARD_REG_SET (used2, used1);
1097 IOR_HARD_REG_SET (used1, allocno[num].hard_reg_conflicts);
1099 #ifdef CANNOT_CHANGE_MODE_CLASS
1100 cannot_change_mode_set_regs (&used1, mode, allocno[num].reg);
1101 #endif
1103 /* Try each hard reg to see if it fits. Do this in two passes.
1104 In the first pass, skip registers that are preferred by some other pseudo
1105 to give it a better chance of getting one of those registers. Only if
1106 we can't get a register when excluding those do we take one of them.
1107 However, we never allocate a register for the first time in pass 0. */
1109 COPY_HARD_REG_SET (used, used1);
1110 IOR_COMPL_HARD_REG_SET (used, regs_used_so_far);
1111 IOR_HARD_REG_SET (used, allocno[num].regs_someone_prefers);
1113 best_reg = -1;
1114 for (i = FIRST_PSEUDO_REGISTER, pass = 0;
1115 pass <= 1 && i >= FIRST_PSEUDO_REGISTER;
1116 pass++)
1118 if (pass == 1)
1119 COPY_HARD_REG_SET (used, used1);
1120 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1122 #ifdef REG_ALLOC_ORDER
1123 int regno = reg_alloc_order[i];
1124 #else
1125 int regno = i;
1126 #endif
1127 if (! TEST_HARD_REG_BIT (used, regno)
1128 && HARD_REGNO_MODE_OK (regno, mode)
1129 && (allocno[num].calls_crossed == 0
1130 || accept_call_clobbered
1131 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
1133 int j;
1134 int lim = end_hard_regno (mode, regno);
1135 for (j = regno + 1;
1136 (j < lim
1137 && ! TEST_HARD_REG_BIT (used, j));
1138 j++);
1139 if (j == lim)
1141 best_reg = regno;
1142 break;
1144 #ifndef REG_ALLOC_ORDER
1145 i = j; /* Skip starting points we know will lose */
1146 #endif
1151 /* See if there is a preferred register with the same class as the register
1152 we allocated above. Making this restriction prevents register
1153 preferencing from creating worse register allocation.
1155 Remove from the preferred registers and conflicting registers. Note that
1156 additional conflicts may have been added after `prune_preferences' was
1157 called.
1159 First do this for those register with copy preferences, then all
1160 preferred registers. */
1162 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, used);
1163 if (!hard_reg_set_empty_p (allocno[num].hard_reg_copy_preferences)
1164 && best_reg >= 0)
1166 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1167 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_copy_preferences, i)
1168 && HARD_REGNO_MODE_OK (i, mode)
1169 && (allocno[num].calls_crossed == 0
1170 || accept_call_clobbered
1171 || ! HARD_REGNO_CALL_PART_CLOBBERED (i, mode))
1172 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1173 || reg_class_subset_p (REGNO_REG_CLASS (i),
1174 REGNO_REG_CLASS (best_reg))
1175 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1176 REGNO_REG_CLASS (i))))
1178 int j;
1179 int lim = end_hard_regno (mode, i);
1180 for (j = i + 1;
1181 (j < lim
1182 && ! TEST_HARD_REG_BIT (used, j)
1183 && (REGNO_REG_CLASS (j)
1184 == REGNO_REG_CLASS (best_reg + (j - i))
1185 || reg_class_subset_p (REGNO_REG_CLASS (j),
1186 REGNO_REG_CLASS (best_reg + (j - i)))
1187 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1188 REGNO_REG_CLASS (j))));
1189 j++);
1190 if (j == lim)
1192 best_reg = i;
1193 goto no_prefs;
1198 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, used);
1199 if (!hard_reg_set_empty_p (allocno[num].hard_reg_preferences)
1200 && best_reg >= 0)
1202 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1203 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_preferences, i)
1204 && HARD_REGNO_MODE_OK (i, mode)
1205 && (allocno[num].calls_crossed == 0
1206 || accept_call_clobbered
1207 || ! HARD_REGNO_CALL_PART_CLOBBERED (i, mode))
1208 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1209 || reg_class_subset_p (REGNO_REG_CLASS (i),
1210 REGNO_REG_CLASS (best_reg))
1211 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1212 REGNO_REG_CLASS (i))))
1214 int j;
1215 int lim = end_hard_regno (mode, i);
1216 for (j = i + 1;
1217 (j < lim
1218 && ! TEST_HARD_REG_BIT (used, j)
1219 && (REGNO_REG_CLASS (j)
1220 == REGNO_REG_CLASS (best_reg + (j - i))
1221 || reg_class_subset_p (REGNO_REG_CLASS (j),
1222 REGNO_REG_CLASS (best_reg + (j - i)))
1223 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1224 REGNO_REG_CLASS (j))));
1225 j++);
1226 if (j == lim)
1228 best_reg = i;
1229 break;
1233 no_prefs:
1235 /* If we haven't succeeded yet, try with caller-saves.
1236 We need not check to see if the current function has nonlocal
1237 labels because we don't put any pseudos that are live over calls in
1238 registers in that case. */
1240 if (flag_caller_saves && best_reg < 0)
1242 /* Did not find a register. If it would be profitable to
1243 allocate a call-clobbered register and save and restore it
1244 around calls, do that. Don't do this if it crosses any calls
1245 that might throw. */
1246 if (! accept_call_clobbered
1247 && allocno[num].calls_crossed != 0
1248 && allocno[num].throwing_calls_crossed == 0
1249 && CALLER_SAVE_PROFITABLE (allocno[num].n_refs,
1250 allocno[num].calls_crossed))
1252 HARD_REG_SET new_losers;
1253 if (! losers)
1254 CLEAR_HARD_REG_SET (new_losers);
1255 else
1256 COPY_HARD_REG_SET (new_losers, losers);
1258 IOR_HARD_REG_SET(new_losers, losing_caller_save_reg_set);
1259 find_reg (num, new_losers, alt_regs_p, 1, retrying);
1260 if (reg_renumber[allocno[num].reg] >= 0)
1262 caller_save_needed = 1;
1263 return;
1268 /* If we haven't succeeded yet,
1269 see if some hard reg that conflicts with us
1270 was utilized poorly by local-alloc.
1271 If so, kick out the regs that were put there by local-alloc
1272 so we can use it instead. */
1273 if (best_reg < 0 && !retrying
1274 /* Let's not bother with multi-reg allocnos. */
1275 && allocno[num].size == 1
1276 && REG_BASIC_BLOCK (allocno[num].reg) == REG_BLOCK_GLOBAL)
1278 /* Count from the end, to find the least-used ones first. */
1279 for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
1281 #ifdef REG_ALLOC_ORDER
1282 int regno = reg_alloc_order[i];
1283 #else
1284 int regno = i;
1285 #endif
1287 if (local_reg_n_refs[regno] != 0
1288 /* Don't use a reg no good for this pseudo. */
1289 && ! TEST_HARD_REG_BIT (used2, regno)
1290 && HARD_REGNO_MODE_OK (regno, mode)
1291 /* The code below assumes that we need only a single
1292 register, but the check of allocno[num].size above
1293 was not enough. Sometimes we need more than one
1294 register for a single-word value. */
1295 && hard_regno_nregs[regno][mode] == 1
1296 && (allocno[num].calls_crossed == 0
1297 || accept_call_clobbered
1298 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
1299 #ifdef CANNOT_CHANGE_MODE_CLASS
1300 && ! invalid_mode_change_p (regno, REGNO_REG_CLASS (regno),
1301 mode)
1302 #endif
1303 #ifdef STACK_REGS
1304 && (!allocno[num].no_stack_reg
1305 || regno < FIRST_STACK_REG || regno > LAST_STACK_REG)
1306 #endif
1309 /* We explicitly evaluate the divide results into temporary
1310 variables so as to avoid excess precision problems that occur
1311 on an i386-unknown-sysv4.2 (unixware) host. */
1313 double tmp1 = ((double) local_reg_freq[regno] * local_reg_n_refs[regno]
1314 / local_reg_live_length[regno]);
1315 double tmp2 = ((double) allocno[num].freq * allocno[num].n_refs
1316 / allocno[num].live_length);
1318 if (tmp1 < tmp2)
1320 /* Hard reg REGNO was used less in total by local regs
1321 than it would be used by this one allocno! */
1322 int k;
1323 if (dump_file)
1325 fprintf (dump_file, "Regno %d better for global %d, ",
1326 regno, allocno[num].reg);
1327 fprintf (dump_file, "fr:%d, ll:%d, nr:%d ",
1328 allocno[num].freq, allocno[num].live_length,
1329 allocno[num].n_refs);
1330 fprintf (dump_file, "(was: fr:%d, ll:%d, nr:%d)\n",
1331 local_reg_freq[regno],
1332 local_reg_live_length[regno],
1333 local_reg_n_refs[regno]);
1336 for (k = 0; k < max_regno; k++)
1337 if (reg_renumber[k] >= 0)
1339 int r = reg_renumber[k];
1340 int endregno
1341 = end_hard_regno (PSEUDO_REGNO_MODE (k), r);
1343 if (regno >= r && regno < endregno)
1345 if (dump_file)
1346 fprintf (dump_file,
1347 "Local Reg %d now on stack\n", k);
1348 reg_renumber[k] = -1;
1352 best_reg = regno;
1353 break;
1359 /* Did we find a register? */
1361 if (best_reg >= 0)
1363 int lim, j;
1364 HARD_REG_SET this_reg;
1366 /* Yes. Record it as the hard register of this pseudo-reg. */
1367 reg_renumber[allocno[num].reg] = best_reg;
1368 /* Also of any pseudo-regs that share with it. */
1369 if (reg_may_share[allocno[num].reg])
1370 for (j = FIRST_PSEUDO_REGISTER; j < max_regno; j++)
1371 if (reg_allocno[j] == num)
1372 reg_renumber[j] = best_reg;
1374 /* Make a set of the hard regs being allocated. */
1375 CLEAR_HARD_REG_SET (this_reg);
1376 lim = end_hard_regno (mode, best_reg);
1377 for (j = best_reg; j < lim; j++)
1379 SET_HARD_REG_BIT (this_reg, j);
1380 SET_HARD_REG_BIT (regs_used_so_far, j);
1381 /* This is no longer a reg used just by local regs. */
1382 local_reg_n_refs[j] = 0;
1383 local_reg_freq[j] = 0;
1385 /* For each other pseudo-reg conflicting with this one,
1386 mark it as conflicting with the hard regs this one occupies. */
1387 lim = num;
1388 EXECUTE_IF_SET_IN_ALLOCNO_SET (conflicts + lim * allocno_row_words, j,
1390 IOR_HARD_REG_SET (allocno[j].hard_reg_conflicts, this_reg);
1395 /* Called from `reload' to look for a hard reg to put pseudo reg REGNO in.
1396 Perhaps it had previously seemed not worth a hard reg,
1397 or perhaps its old hard reg has been commandeered for reloads.
1398 FORBIDDEN_REGS indicates certain hard regs that may not be used, even if
1399 they do not appear to be allocated.
1400 If FORBIDDEN_REGS is zero, no regs are forbidden. */
1402 void
1403 retry_global_alloc (int regno, HARD_REG_SET forbidden_regs)
1405 int alloc_no = reg_allocno[regno];
1406 if (alloc_no >= 0)
1408 /* If we have more than one register class,
1409 first try allocating in the class that is cheapest
1410 for this pseudo-reg. If that fails, try any reg. */
1411 if (N_REG_CLASSES > 1)
1412 find_reg (alloc_no, forbidden_regs, 0, 0, 1);
1413 if (reg_renumber[regno] < 0
1414 && reg_alternate_class (regno) != NO_REGS)
1415 find_reg (alloc_no, forbidden_regs, 1, 0, 1);
1417 /* If we found a register, modify the RTL for the register to
1418 show the hard register, and mark that register live. */
1419 if (reg_renumber[regno] >= 0)
1421 REGNO (regno_reg_rtx[regno]) = reg_renumber[regno];
1422 mark_home_live (regno);
1427 /* Record a conflict between register REGNO
1428 and everything currently live.
1429 REGNO must not be a pseudo reg that was allocated
1430 by local_alloc; such numbers must be translated through
1431 reg_renumber before calling here. */
1433 static void
1434 record_one_conflict (int regno)
1436 int j;
1438 if (regno < FIRST_PSEUDO_REGISTER)
1439 /* When a hard register becomes live,
1440 record conflicts with live pseudo regs. */
1441 EXECUTE_IF_SET_IN_ALLOCNO_SET (allocnos_live, j,
1443 SET_HARD_REG_BIT (allocno[j].hard_reg_conflicts, regno);
1445 else
1446 /* When a pseudo-register becomes live,
1447 record conflicts first with hard regs,
1448 then with other pseudo regs. */
1450 int ialloc = reg_allocno[regno];
1451 int ialloc_prod = ialloc * allocno_row_words;
1453 IOR_HARD_REG_SET (allocno[ialloc].hard_reg_conflicts, hard_regs_live);
1454 for (j = allocno_row_words - 1; j >= 0; j--)
1455 conflicts[ialloc_prod + j] |= allocnos_live[j];
1459 /* Record all allocnos currently live as conflicting
1460 with all hard regs currently live.
1462 ALLOCNO_VEC is a vector of LEN allocnos, all allocnos that
1463 are currently live. Their bits are also flagged in allocnos_live. */
1465 static void
1466 record_conflicts (int *allocno_vec, int len)
1468 while (--len >= 0)
1469 IOR_HARD_REG_SET (allocno[allocno_vec[len]].hard_reg_conflicts,
1470 hard_regs_live);
1473 /* If CONFLICTP (i, j) is true, make sure CONFLICTP (j, i) is also true. */
1474 static void
1475 mirror_conflicts (void)
1477 int i, j;
1478 int rw = allocno_row_words;
1479 int rwb = rw * INT_BITS;
1480 INT_TYPE *p = conflicts;
1481 INT_TYPE *q0 = conflicts, *q1, *q2;
1482 unsigned INT_TYPE mask;
1484 for (i = max_allocno - 1, mask = 1; i >= 0; i--, mask <<= 1)
1486 if (! mask)
1488 mask = 1;
1489 q0++;
1491 for (j = allocno_row_words - 1, q1 = q0; j >= 0; j--, q1 += rwb)
1493 unsigned INT_TYPE word;
1495 for (word = (unsigned INT_TYPE) *p++, q2 = q1; word;
1496 word >>= 1, q2 += rw)
1498 if (word & 1)
1499 *q2 |= mask;
1505 /* Handle the case where REG is set by the insn being scanned,
1506 during the forward scan to accumulate conflicts.
1507 Store a 1 in regs_live or allocnos_live for this register, record how many
1508 consecutive hardware registers it actually needs,
1509 and record a conflict with all other registers already live.
1511 Note that even if REG does not remain alive after this insn,
1512 we must mark it here as live, to ensure a conflict between
1513 REG and any other regs set in this insn that really do live.
1514 This is because those other regs could be considered after this.
1516 REG might actually be something other than a register;
1517 if so, we do nothing.
1519 SETTER is 0 if this register was modified by an auto-increment (i.e.,
1520 a REG_INC note was found for it). */
1522 static void
1523 mark_reg_store (rtx reg, rtx setter, void *data ATTRIBUTE_UNUSED)
1525 int regno;
1527 if (GET_CODE (reg) == SUBREG)
1528 reg = SUBREG_REG (reg);
1530 if (!REG_P (reg))
1531 return;
1533 regs_set[n_regs_set++] = reg;
1535 if (setter && GET_CODE (setter) != CLOBBER)
1536 set_preference (reg, SET_SRC (setter));
1538 regno = REGNO (reg);
1540 /* Either this is one of the max_allocno pseudo regs not allocated,
1541 or it is or has a hardware reg. First handle the pseudo-regs. */
1542 if (regno >= FIRST_PSEUDO_REGISTER)
1544 if (reg_allocno[regno] >= 0)
1546 SET_ALLOCNO_LIVE (reg_allocno[regno]);
1547 record_one_conflict (regno);
1551 if (reg_renumber[regno] >= 0)
1552 regno = reg_renumber[regno];
1554 /* Handle hardware regs (and pseudos allocated to hard regs). */
1555 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
1557 int last = end_hard_regno (GET_MODE (reg), regno);
1558 while (regno < last)
1560 record_one_conflict (regno);
1561 SET_HARD_REG_BIT (hard_regs_live, regno);
1562 regno++;
1567 /* Like mark_reg_store except notice just CLOBBERs; ignore SETs. */
1569 static void
1570 mark_reg_clobber (rtx reg, rtx setter, void *data)
1572 if (GET_CODE (setter) == CLOBBER)
1573 mark_reg_store (reg, setter, data);
1576 /* Record that REG has conflicts with all the regs currently live.
1577 Do not mark REG itself as live. */
1579 static void
1580 mark_reg_conflicts (rtx reg)
1582 int regno;
1584 if (GET_CODE (reg) == SUBREG)
1585 reg = SUBREG_REG (reg);
1587 if (!REG_P (reg))
1588 return;
1590 regno = REGNO (reg);
1592 /* Either this is one of the max_allocno pseudo regs not allocated,
1593 or it is or has a hardware reg. First handle the pseudo-regs. */
1594 if (regno >= FIRST_PSEUDO_REGISTER)
1596 if (reg_allocno[regno] >= 0)
1597 record_one_conflict (regno);
1600 if (reg_renumber[regno] >= 0)
1601 regno = reg_renumber[regno];
1603 /* Handle hardware regs (and pseudos allocated to hard regs). */
1604 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
1606 int last = end_hard_regno (GET_MODE (reg), regno);
1607 while (regno < last)
1609 record_one_conflict (regno);
1610 regno++;
1615 /* Mark REG as being dead (following the insn being scanned now).
1616 Store a 0 in regs_live or allocnos_live for this register. */
1618 static void
1619 mark_reg_death (rtx reg)
1621 int regno = REGNO (reg);
1623 /* Either this is one of the max_allocno pseudo regs not allocated,
1624 or it is a hardware reg. First handle the pseudo-regs. */
1625 if (regno >= FIRST_PSEUDO_REGISTER)
1627 if (reg_allocno[regno] >= 0)
1628 CLEAR_ALLOCNO_LIVE (reg_allocno[regno]);
1631 /* For pseudo reg, see if it has been assigned a hardware reg. */
1632 if (reg_renumber[regno] >= 0)
1633 regno = reg_renumber[regno];
1635 /* Handle hardware regs (and pseudos allocated to hard regs). */
1636 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
1637 /* Pseudo regs already assigned hardware regs are treated
1638 almost the same as explicit hardware regs. */
1639 remove_from_hard_reg_set (&hard_regs_live, GET_MODE (reg), regno);
1642 /* Try to set a preference for an allocno to a hard register.
1643 We are passed DEST and SRC which are the operands of a SET. It is known
1644 that SRC is a register. If SRC or the first operand of SRC is a register,
1645 try to set a preference. If one of the two is a hard register and the other
1646 is a pseudo-register, mark the preference.
1648 Note that we are not as aggressive as local-alloc in trying to tie a
1649 pseudo-register to a hard register. */
1651 static void
1652 set_preference (rtx dest, rtx src)
1654 unsigned int src_regno, dest_regno, end_regno;
1655 /* Amount to add to the hard regno for SRC, or subtract from that for DEST,
1656 to compensate for subregs in SRC or DEST. */
1657 int offset = 0;
1658 unsigned int i;
1659 int copy = 1;
1661 if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e')
1662 src = XEXP (src, 0), copy = 0;
1664 /* Get the reg number for both SRC and DEST.
1665 If neither is a reg, give up. */
1667 if (REG_P (src))
1668 src_regno = REGNO (src);
1669 else if (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)))
1671 src_regno = REGNO (SUBREG_REG (src));
1673 if (REGNO (SUBREG_REG (src)) < FIRST_PSEUDO_REGISTER)
1674 offset += subreg_regno_offset (REGNO (SUBREG_REG (src)),
1675 GET_MODE (SUBREG_REG (src)),
1676 SUBREG_BYTE (src),
1677 GET_MODE (src));
1678 else
1679 offset += (SUBREG_BYTE (src)
1680 / REGMODE_NATURAL_SIZE (GET_MODE (src)));
1682 else
1683 return;
1685 if (REG_P (dest))
1686 dest_regno = REGNO (dest);
1687 else if (GET_CODE (dest) == SUBREG && REG_P (SUBREG_REG (dest)))
1689 dest_regno = REGNO (SUBREG_REG (dest));
1691 if (REGNO (SUBREG_REG (dest)) < FIRST_PSEUDO_REGISTER)
1692 offset -= subreg_regno_offset (REGNO (SUBREG_REG (dest)),
1693 GET_MODE (SUBREG_REG (dest)),
1694 SUBREG_BYTE (dest),
1695 GET_MODE (dest));
1696 else
1697 offset -= (SUBREG_BYTE (dest)
1698 / REGMODE_NATURAL_SIZE (GET_MODE (dest)));
1700 else
1701 return;
1703 /* Convert either or both to hard reg numbers. */
1705 if (reg_renumber[src_regno] >= 0)
1706 src_regno = reg_renumber[src_regno];
1708 if (reg_renumber[dest_regno] >= 0)
1709 dest_regno = reg_renumber[dest_regno];
1711 /* Now if one is a hard reg and the other is a global pseudo
1712 then give the other a preference. */
1714 if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER
1715 && reg_allocno[src_regno] >= 0)
1717 dest_regno -= offset;
1718 if (dest_regno < FIRST_PSEUDO_REGISTER)
1720 if (copy)
1721 SET_REGBIT (hard_reg_copy_preferences,
1722 reg_allocno[src_regno], dest_regno);
1724 SET_REGBIT (hard_reg_preferences,
1725 reg_allocno[src_regno], dest_regno);
1726 end_regno = end_hard_regno (GET_MODE (dest), dest_regno);
1727 for (i = dest_regno; i < end_regno; i++)
1728 SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i);
1732 if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER
1733 && reg_allocno[dest_regno] >= 0)
1735 src_regno += offset;
1736 if (src_regno < FIRST_PSEUDO_REGISTER)
1738 if (copy)
1739 SET_REGBIT (hard_reg_copy_preferences,
1740 reg_allocno[dest_regno], src_regno);
1742 SET_REGBIT (hard_reg_preferences,
1743 reg_allocno[dest_regno], src_regno);
1744 end_regno = end_hard_regno (GET_MODE (src), src_regno);
1745 for (i = src_regno; i < end_regno; i++)
1746 SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i);
1751 /* Indicate that hard register number FROM was eliminated and replaced with
1752 an offset from hard register number TO. The status of hard registers live
1753 at the start of a basic block is updated by replacing a use of FROM with
1754 a use of TO. */
1756 void
1757 mark_elimination (int from, int to)
1759 basic_block bb;
1761 FOR_EACH_BB (bb)
1763 regset r = bb->il.rtl->global_live_at_start;
1764 if (REGNO_REG_SET_P (r, from))
1766 CLEAR_REGNO_REG_SET (r, from);
1767 SET_REGNO_REG_SET (r, to);
1772 /* Used for communication between the following functions. Holds the
1773 current life information. */
1774 static regset live_relevant_regs;
1776 /* Record in live_relevant_regs and REGS_SET that register REG became live.
1777 This is called via note_stores. */
1778 static void
1779 reg_becomes_live (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *regs_set)
1781 int regno;
1783 if (GET_CODE (reg) == SUBREG)
1784 reg = SUBREG_REG (reg);
1786 if (!REG_P (reg))
1787 return;
1789 regno = REGNO (reg);
1790 if (regno < FIRST_PSEUDO_REGISTER)
1792 int nregs = hard_regno_nregs[regno][GET_MODE (reg)];
1793 while (nregs-- > 0)
1795 SET_REGNO_REG_SET (live_relevant_regs, regno);
1796 if (! fixed_regs[regno])
1797 SET_REGNO_REG_SET ((regset) regs_set, regno);
1798 regno++;
1801 else if (reg_renumber[regno] >= 0)
1803 SET_REGNO_REG_SET (live_relevant_regs, regno);
1804 SET_REGNO_REG_SET ((regset) regs_set, regno);
1808 /* Record in live_relevant_regs that register REGNO died. */
1809 static void
1810 reg_dies (int regno, enum machine_mode mode, struct insn_chain *chain)
1812 if (regno < FIRST_PSEUDO_REGISTER)
1814 int nregs = hard_regno_nregs[regno][mode];
1815 while (nregs-- > 0)
1817 CLEAR_REGNO_REG_SET (live_relevant_regs, regno);
1818 if (! fixed_regs[regno])
1819 SET_REGNO_REG_SET (&chain->dead_or_set, regno);
1820 regno++;
1823 else
1825 CLEAR_REGNO_REG_SET (live_relevant_regs, regno);
1826 if (reg_renumber[regno] >= 0)
1827 SET_REGNO_REG_SET (&chain->dead_or_set, regno);
1831 /* Walk the insns of the current function and build reload_insn_chain,
1832 and record register life information. */
1833 void
1834 build_insn_chain (rtx first)
1836 struct insn_chain **p = &reload_insn_chain;
1837 struct insn_chain *prev = 0;
1838 basic_block b = ENTRY_BLOCK_PTR->next_bb;
1840 live_relevant_regs = ALLOC_REG_SET (&reg_obstack);
1842 for (; first; first = NEXT_INSN (first))
1844 struct insn_chain *c;
1846 if (first == BB_HEAD (b))
1848 unsigned i;
1849 bitmap_iterator bi;
1851 CLEAR_REG_SET (live_relevant_regs);
1853 EXECUTE_IF_SET_IN_BITMAP (b->il.rtl->global_live_at_start, 0, i, bi)
1855 if (i < FIRST_PSEUDO_REGISTER
1856 ? ! TEST_HARD_REG_BIT (eliminable_regset, i)
1857 : reg_renumber[i] >= 0)
1858 SET_REGNO_REG_SET (live_relevant_regs, i);
1862 if (!NOTE_P (first) && !BARRIER_P (first))
1864 c = new_insn_chain ();
1865 c->prev = prev;
1866 prev = c;
1867 *p = c;
1868 p = &c->next;
1869 c->insn = first;
1870 c->block = b->index;
1872 if (INSN_P (first))
1874 rtx link;
1876 /* Mark the death of everything that dies in this instruction. */
1878 for (link = REG_NOTES (first); link; link = XEXP (link, 1))
1879 if (REG_NOTE_KIND (link) == REG_DEAD
1880 && REG_P (XEXP (link, 0)))
1881 reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)),
1884 COPY_REG_SET (&c->live_throughout, live_relevant_regs);
1886 /* Mark everything born in this instruction as live. */
1888 note_stores (PATTERN (first), reg_becomes_live,
1889 &c->dead_or_set);
1891 else
1892 COPY_REG_SET (&c->live_throughout, live_relevant_regs);
1894 if (INSN_P (first))
1896 rtx link;
1898 /* Mark anything that is set in this insn and then unused as dying. */
1900 for (link = REG_NOTES (first); link; link = XEXP (link, 1))
1901 if (REG_NOTE_KIND (link) == REG_UNUSED
1902 && REG_P (XEXP (link, 0)))
1903 reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)),
1908 if (first == BB_END (b))
1909 b = b->next_bb;
1911 /* Stop after we pass the end of the last basic block. Verify that
1912 no real insns are after the end of the last basic block.
1914 We may want to reorganize the loop somewhat since this test should
1915 always be the right exit test. Allow an ADDR_VEC or ADDR_DIF_VEC if
1916 the previous real insn is a JUMP_INSN. */
1917 if (b == EXIT_BLOCK_PTR)
1919 #ifdef ENABLE_CHECKING
1920 for (first = NEXT_INSN (first); first; first = NEXT_INSN (first))
1921 gcc_assert (!INSN_P (first)
1922 || GET_CODE (PATTERN (first)) == USE
1923 || ((GET_CODE (PATTERN (first)) == ADDR_VEC
1924 || GET_CODE (PATTERN (first)) == ADDR_DIFF_VEC)
1925 && prev_real_insn (first) != 0
1926 && JUMP_P (prev_real_insn (first))));
1927 #endif
1928 break;
1931 FREE_REG_SET (live_relevant_regs);
1932 *p = 0;
1935 /* Print debugging trace information if -dg switch is given,
1936 showing the information on which the allocation decisions are based. */
1938 static void
1939 dump_conflicts (FILE *file)
1941 int i;
1942 int has_preferences;
1943 int nregs;
1944 nregs = 0;
1945 for (i = 0; i < max_allocno; i++)
1947 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
1948 continue;
1949 nregs++;
1951 fprintf (file, ";; %d regs to allocate:", nregs);
1952 for (i = 0; i < max_allocno; i++)
1954 int j;
1955 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
1956 continue;
1957 fprintf (file, " %d", allocno[allocno_order[i]].reg);
1958 for (j = 0; j < max_regno; j++)
1959 if (reg_allocno[j] == allocno_order[i]
1960 && j != allocno[allocno_order[i]].reg)
1961 fprintf (file, "+%d", j);
1962 if (allocno[allocno_order[i]].size != 1)
1963 fprintf (file, " (%d)", allocno[allocno_order[i]].size);
1965 fprintf (file, "\n");
1967 for (i = 0; i < max_allocno; i++)
1969 int j;
1970 fprintf (file, ";; %d conflicts:", allocno[i].reg);
1971 for (j = 0; j < max_allocno; j++)
1972 if (CONFLICTP (j, i))
1973 fprintf (file, " %d", allocno[j].reg);
1974 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1975 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_conflicts, j))
1976 fprintf (file, " %d", j);
1977 fprintf (file, "\n");
1979 has_preferences = 0;
1980 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1981 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
1982 has_preferences = 1;
1984 if (! has_preferences)
1985 continue;
1986 fprintf (file, ";; %d preferences:", allocno[i].reg);
1987 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1988 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
1989 fprintf (file, " %d", j);
1990 fprintf (file, "\n");
1992 fprintf (file, "\n");
1995 void
1996 dump_global_regs (FILE *file)
1998 int i, j;
2000 fprintf (file, ";; Register dispositions:\n");
2001 for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++)
2002 if (reg_renumber[i] >= 0)
2004 fprintf (file, "%d in %d ", i, reg_renumber[i]);
2005 if (++j % 6 == 0)
2006 fprintf (file, "\n");
2009 fprintf (file, "\n\n;; Hard regs used: ");
2010 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2011 if (regs_ever_live[i])
2012 fprintf (file, " %d", i);
2013 fprintf (file, "\n\n");
2018 /* This page contains code to make live information more accurate.
2019 The accurate register liveness at program point P means:
2020 o there is a path from P to usage of the register and the
2021 register is not redefined or killed on the path.
2022 o register at P is partially available, i.e. there is a path from
2023 a register definition to the point P and the register is not
2024 killed (clobbered) on the path
2026 The standard GCC live information means only the first condition.
2027 Without the partial availability, there will be more register
2028 conflicts and as a consequence worse register allocation. The
2029 typical example where the information can be different is a
2030 register initialized in the loop at the basic block preceding the
2031 loop in CFG. */
2033 /* The following structure contains basic block data flow information
2034 used to calculate partial availability of registers. */
2036 struct bb_info
2038 /* The basic block reverse post-order number. */
2039 int rts_number;
2040 /* Registers used uninitialized in an insn in which there is an
2041 early clobbered register might get the same hard register. */
2042 bitmap earlyclobber;
2043 /* Registers correspondingly killed (clobbered) and defined but not
2044 killed afterward in the basic block. */
2045 bitmap killed, avloc;
2046 /* Registers partially available and living (in other words whose
2047 values were calculated and used) correspondingly at the start
2048 and end of the basic block. */
2049 bitmap live_pavin, live_pavout;
2052 /* Macros for accessing data flow information of basic blocks. */
2054 #define BB_INFO(BB) ((struct bb_info *) (BB)->aux)
2055 #define BB_INFO_BY_INDEX(N) BB_INFO (BASIC_BLOCK(N))
2057 static struct bitmap_obstack greg_obstack;
2058 /* The function allocates the info structures of each basic block. It
2059 also initialized LIVE_PAVIN and LIVE_PAVOUT as if all hard
2060 registers were partially available. */
2062 static void
2063 allocate_bb_info (void)
2065 int i;
2066 basic_block bb;
2067 struct bb_info *bb_info;
2068 bitmap init;
2070 alloc_aux_for_blocks (sizeof (struct bb_info));
2071 init = BITMAP_ALLOC (NULL);
2072 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2073 bitmap_set_bit (init, i);
2074 bitmap_obstack_initialize (&greg_obstack);
2075 FOR_EACH_BB (bb)
2077 bb_info = bb->aux;
2078 bb_info->earlyclobber = BITMAP_ALLOC (&greg_obstack);
2079 bb_info->avloc = BITMAP_ALLOC (&greg_obstack);
2080 bb_info->killed = BITMAP_ALLOC (&greg_obstack);
2081 bb_info->live_pavin = BITMAP_ALLOC (&greg_obstack);
2082 bb_info->live_pavout = BITMAP_ALLOC (&greg_obstack);
2083 bitmap_copy (bb_info->live_pavin, init);
2084 bitmap_copy (bb_info->live_pavout, init);
2086 BITMAP_FREE (init);
2089 /* The function frees the allocated info of all basic blocks. */
2091 static void
2092 free_bb_info (void)
2094 bitmap_obstack_release (&greg_obstack);
2095 free_aux_for_blocks ();
2098 /* The function modifies local info for register REG being changed in
2099 SETTER. DATA is used to pass the current basic block info. */
2101 static void
2102 mark_reg_change (rtx reg, rtx setter, void *data)
2104 int regno;
2105 basic_block bb = data;
2106 struct bb_info *bb_info = BB_INFO (bb);
2108 if (GET_CODE (reg) == SUBREG)
2109 reg = SUBREG_REG (reg);
2111 if (!REG_P (reg))
2112 return;
2114 regno = REGNO (reg);
2115 bitmap_set_bit (bb_info->killed, regno);
2117 if (GET_CODE (setter) != CLOBBER)
2118 bitmap_set_bit (bb_info->avloc, regno);
2119 else
2120 bitmap_clear_bit (bb_info->avloc, regno);
2123 /* Classes of registers which could be early clobbered in the current
2124 insn. */
2126 static VEC(int,heap) *earlyclobber_regclass;
2128 /* This function finds and stores register classes that could be early
2129 clobbered in INSN. If any earlyclobber classes are found, the function
2130 returns TRUE, in all other cases it returns FALSE. */
2132 static bool
2133 check_earlyclobber (rtx insn)
2135 int opno;
2136 bool found = false;
2138 extract_insn (insn);
2140 VEC_truncate (int, earlyclobber_regclass, 0);
2141 for (opno = 0; opno < recog_data.n_operands; opno++)
2143 char c;
2144 bool amp_p;
2145 int i;
2146 enum reg_class class;
2147 const char *p = recog_data.constraints[opno];
2149 class = NO_REGS;
2150 amp_p = false;
2151 for (;;)
2153 c = *p;
2154 switch (c)
2156 case '=': case '+': case '?':
2157 case '#': case '!':
2158 case '*': case '%':
2159 case 'm': case '<': case '>': case 'V': case 'o':
2160 case 'E': case 'F': case 'G': case 'H':
2161 case 's': case 'i': case 'n':
2162 case 'I': case 'J': case 'K': case 'L':
2163 case 'M': case 'N': case 'O': case 'P':
2164 case 'X':
2165 case '0': case '1': case '2': case '3': case '4':
2166 case '5': case '6': case '7': case '8': case '9':
2167 /* These don't say anything we care about. */
2168 break;
2170 case '&':
2171 amp_p = true;
2172 break;
2173 case '\0':
2174 case ',':
2175 if (amp_p && class != NO_REGS)
2177 int rc;
2179 found = true;
2180 for (i = 0;
2181 VEC_iterate (int, earlyclobber_regclass, i, rc);
2182 i++)
2184 if (rc == (int) class)
2185 goto found_rc;
2188 /* We use VEC_quick_push here because
2189 earlyclobber_regclass holds no more than
2190 N_REG_CLASSES elements. */
2191 VEC_quick_push (int, earlyclobber_regclass, (int) class);
2192 found_rc:
2196 amp_p = false;
2197 class = NO_REGS;
2198 break;
2200 case 'r':
2201 class = GENERAL_REGS;
2202 break;
2204 default:
2205 class = REG_CLASS_FROM_CONSTRAINT (c, p);
2206 break;
2208 if (c == '\0')
2209 break;
2210 p += CONSTRAINT_LEN (c, p);
2214 return found;
2217 /* The function checks that pseudo-register *X has a class
2218 intersecting with the class of pseudo-register could be early
2219 clobbered in the same insn.
2220 This function is a no-op if earlyclobber_regclass is empty. */
2222 static int
2223 mark_reg_use_for_earlyclobber (rtx *x, void *data ATTRIBUTE_UNUSED)
2225 enum reg_class pref_class, alt_class;
2226 int i, regno;
2227 basic_block bb = data;
2228 struct bb_info *bb_info = BB_INFO (bb);
2230 if (REG_P (*x) && REGNO (*x) >= FIRST_PSEUDO_REGISTER)
2232 int rc;
2234 regno = REGNO (*x);
2235 if (bitmap_bit_p (bb_info->killed, regno)
2236 || bitmap_bit_p (bb_info->avloc, regno))
2237 return 0;
2238 pref_class = reg_preferred_class (regno);
2239 alt_class = reg_alternate_class (regno);
2240 for (i = 0; VEC_iterate (int, earlyclobber_regclass, i, rc); i++)
2242 if (reg_classes_intersect_p (rc, pref_class)
2243 || (rc != NO_REGS
2244 && reg_classes_intersect_p (rc, alt_class)))
2246 bitmap_set_bit (bb_info->earlyclobber, regno);
2247 break;
2251 return 0;
2254 /* The function processes all pseudo-registers in *X with the aid of
2255 previous function. */
2257 static void
2258 mark_reg_use_for_earlyclobber_1 (rtx *x, void *data)
2260 for_each_rtx (x, mark_reg_use_for_earlyclobber, data);
2263 /* The function calculates local info for each basic block. */
2265 static void
2266 calculate_local_reg_bb_info (void)
2268 basic_block bb;
2269 rtx insn, bound;
2271 /* We know that earlyclobber_regclass holds no more than
2272 N_REG_CLASSES elements. See check_earlyclobber. */
2273 earlyclobber_regclass = VEC_alloc (int, heap, N_REG_CLASSES);
2274 FOR_EACH_BB (bb)
2276 bound = NEXT_INSN (BB_END (bb));
2277 for (insn = BB_HEAD (bb); insn != bound; insn = NEXT_INSN (insn))
2278 if (INSN_P (insn))
2280 note_stores (PATTERN (insn), mark_reg_change, bb);
2281 if (check_earlyclobber (insn))
2282 note_uses (&PATTERN (insn), mark_reg_use_for_earlyclobber_1, bb);
2285 VEC_free (int, heap, earlyclobber_regclass);
2288 /* The function sets up reverse post-order number of each basic
2289 block. */
2291 static void
2292 set_up_bb_rts_numbers (void)
2294 int i;
2295 int *rts_order;
2297 rts_order = XNEWVEC (int, n_basic_blocks - NUM_FIXED_BLOCKS);
2298 post_order_compute (rts_order, false);
2299 for (i = 0; i < n_basic_blocks - NUM_FIXED_BLOCKS; i++)
2300 BB_INFO_BY_INDEX (rts_order [i])->rts_number = i;
2301 free (rts_order);
2304 /* Compare function for sorting blocks in reverse postorder. */
2306 static int
2307 rpost_cmp (const void *bb1, const void *bb2)
2309 basic_block b1 = *(basic_block *) bb1, b2 = *(basic_block *) bb2;
2311 return BB_INFO (b2)->rts_number - BB_INFO (b1)->rts_number;
2314 /* Temporary bitmap used for live_pavin, live_pavout calculation. */
2315 static bitmap temp_bitmap;
2317 /* The function calculates partial register availability according to
2318 the following equations:
2320 bb.live_pavin
2321 = empty for entry block
2322 | union (live_pavout of predecessors) & global_live_at_start
2323 bb.live_pavout = union (bb.live_pavin - bb.killed, bb.avloc)
2324 & global_live_at_end */
2326 static void
2327 calculate_reg_pav (void)
2329 basic_block bb, succ;
2330 edge e;
2331 int i, nel;
2332 VEC(basic_block,heap) *bbs, *new_bbs, *temp;
2333 basic_block *bb_array;
2334 sbitmap wset;
2336 bbs = VEC_alloc (basic_block, heap, n_basic_blocks);
2337 new_bbs = VEC_alloc (basic_block, heap, n_basic_blocks);
2338 temp_bitmap = BITMAP_ALLOC (NULL);
2339 FOR_EACH_BB (bb)
2341 VEC_quick_push (basic_block, bbs, bb);
2343 wset = sbitmap_alloc (n_basic_blocks + 1);
2344 while (VEC_length (basic_block, bbs))
2346 bb_array = VEC_address (basic_block, bbs);
2347 nel = VEC_length (basic_block, bbs);
2348 qsort (bb_array, nel, sizeof (basic_block), rpost_cmp);
2349 sbitmap_zero (wset);
2350 for (i = 0; i < nel; i++)
2352 edge_iterator ei;
2353 struct bb_info *bb_info;
2354 bitmap bb_live_pavin, bb_live_pavout;
2356 bb = bb_array [i];
2357 bb_info = BB_INFO (bb);
2358 bb_live_pavin = bb_info->live_pavin;
2359 bb_live_pavout = bb_info->live_pavout;
2360 FOR_EACH_EDGE (e, ei, bb->preds)
2362 basic_block pred = e->src;
2364 if (pred->index != ENTRY_BLOCK)
2365 bitmap_ior_into (bb_live_pavin, BB_INFO (pred)->live_pavout);
2367 bitmap_and_into (bb_live_pavin, bb->il.rtl->global_live_at_start);
2368 bitmap_ior_and_compl (temp_bitmap, bb_info->avloc,
2369 bb_live_pavin, bb_info->killed);
2370 bitmap_and_into (temp_bitmap, bb->il.rtl->global_live_at_end);
2371 if (! bitmap_equal_p (temp_bitmap, bb_live_pavout))
2373 bitmap_copy (bb_live_pavout, temp_bitmap);
2374 FOR_EACH_EDGE (e, ei, bb->succs)
2376 succ = e->dest;
2377 if (succ->index != EXIT_BLOCK
2378 && !TEST_BIT (wset, succ->index))
2380 SET_BIT (wset, succ->index);
2381 VEC_quick_push (basic_block, new_bbs, succ);
2386 temp = bbs;
2387 bbs = new_bbs;
2388 new_bbs = temp;
2389 VEC_truncate (basic_block, new_bbs, 0);
2391 sbitmap_free (wset);
2392 BITMAP_FREE (temp_bitmap);
2393 VEC_free (basic_block, heap, new_bbs);
2394 VEC_free (basic_block, heap, bbs);
2397 /* The function modifies partial availability information for two
2398 special cases to prevent incorrect work of the subsequent passes
2399 with the accurate live information based on the partial
2400 availability. */
2402 static void
2403 modify_reg_pav (void)
2405 basic_block bb;
2406 struct bb_info *bb_info;
2407 #ifdef STACK_REGS
2408 int i;
2409 HARD_REG_SET stack_hard_regs, used;
2410 bitmap stack_regs;
2412 CLEAR_HARD_REG_SET (stack_hard_regs);
2413 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
2414 SET_HARD_REG_BIT(stack_hard_regs, i);
2415 stack_regs = BITMAP_ALLOC (&greg_obstack);
2416 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
2418 COPY_HARD_REG_SET (used, reg_class_contents[reg_preferred_class (i)]);
2419 IOR_HARD_REG_SET (used, reg_class_contents[reg_alternate_class (i)]);
2420 AND_HARD_REG_SET (used, stack_hard_regs);
2421 if (!hard_reg_set_empty_p (used))
2422 bitmap_set_bit (stack_regs, i);
2424 #endif
2425 FOR_EACH_BB (bb)
2427 bb_info = BB_INFO (bb);
2429 /* Reload can assign the same hard register to uninitialized
2430 pseudo-register and early clobbered pseudo-register in an
2431 insn if the pseudo-register is used first time in given BB
2432 and not lived at the BB start. To prevent this we don't
2433 change life information for such pseudo-registers. */
2434 bitmap_ior_into (bb_info->live_pavin, bb_info->earlyclobber);
2435 #ifdef STACK_REGS
2436 /* We can not use the same stack register for uninitialized
2437 pseudo-register and another living pseudo-register because if the
2438 uninitialized pseudo-register dies, subsequent pass reg-stack
2439 will be confused (it will believe that the other register
2440 dies). */
2441 bitmap_ior_into (bb_info->live_pavin, stack_regs);
2442 #endif
2444 #ifdef STACK_REGS
2445 BITMAP_FREE (stack_regs);
2446 #endif
2449 /* The following function makes live information more accurate by
2450 modifying global_live_at_start and global_live_at_end of basic
2451 blocks.
2453 The standard GCC life analysis permits registers to live
2454 uninitialized, for example:
2456 R is never used
2457 .....
2458 Loop:
2459 R is defined
2461 R is used.
2463 With normal life_analysis, R would be live before "Loop:".
2464 The result is that R causes many interferences that do not
2465 serve any purpose.
2467 After the function call a register lives at a program point
2468 only if it is initialized on a path from CFG entry to the
2469 program point. */
2471 static void
2472 make_accurate_live_analysis (void)
2474 basic_block bb;
2475 struct bb_info *bb_info;
2477 max_regno = max_reg_num ();
2478 compact_blocks ();
2479 allocate_bb_info ();
2480 calculate_local_reg_bb_info ();
2481 set_up_bb_rts_numbers ();
2482 calculate_reg_pav ();
2483 modify_reg_pav ();
2484 FOR_EACH_BB (bb)
2486 bb_info = BB_INFO (bb);
2488 bitmap_and_into (bb->il.rtl->global_live_at_start, bb_info->live_pavin);
2489 bitmap_and_into (bb->il.rtl->global_live_at_end, bb_info->live_pavout);
2491 free_bb_info ();
2493 /* Run old register allocator. Return TRUE if we must exit
2494 rest_of_compilation upon return. */
2495 static unsigned int
2496 rest_of_handle_global_alloc (void)
2498 bool failure;
2500 /* If optimizing, allocate remaining pseudo-regs. Do the reload
2501 pass fixing up any insns that are invalid. */
2503 if (optimize)
2504 failure = global_alloc ();
2505 else
2507 compute_regsets (regs_asm_clobbered, regs_ever_live,
2508 &eliminable_regset, &no_global_alloc_regs);
2509 build_insn_chain (get_insns ());
2510 failure = reload (get_insns (), 0);
2513 if (dump_enabled_p (pass_global_alloc.static_pass_number))
2515 timevar_push (TV_DUMP);
2516 dump_global_regs (dump_file);
2517 timevar_pop (TV_DUMP);
2520 gcc_assert (reload_completed || failure);
2521 reload_completed = !failure;
2522 return 0;
2525 struct tree_opt_pass pass_global_alloc =
2527 "greg", /* name */
2528 NULL, /* gate */
2529 rest_of_handle_global_alloc, /* execute */
2530 NULL, /* sub */
2531 NULL, /* next */
2532 0, /* static_pass_number */
2533 TV_GLOBAL_ALLOC, /* tv_id */
2534 0, /* properties_required */
2535 0, /* properties_provided */
2536 0, /* properties_destroyed */
2537 0, /* todo_flags_start */
2538 TODO_dump_func |
2539 TODO_ggc_collect, /* todo_flags_finish */
2540 'g' /* letter */