* c-parse.in (array_declarator): New. Handle C99 constructs.
[official-gcc.git] / gcc / cse.c
blob43cbf9ca020f370ee108579311ad63b31f886945
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include <setjmp.h>
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "regs.h"
30 #include "hard-reg-set.h"
31 #include "basic-block.h"
32 #include "flags.h"
33 #include "real.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "function.h"
37 #include "expr.h"
38 #include "toplev.h"
39 #include "output.h"
40 #include "ggc.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
51 global CSE.
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
79 of as containing.
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
116 `const_rtx'.
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
124 Other expressions:
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
130 hash codes.
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
159 must be removed.
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
184 the register.
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
190 Related expressions:
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
201 static int max_reg;
203 /* One plus largest instruction UID used in this function at time of
204 cse_main call. */
206 static int max_insn_uid;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
211 static int max_qty;
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
216 static int next_qty;
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
229 constant value.
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
245 rtx const_rtx;
246 rtx const_insn;
247 rtx comparison_const;
248 int comparison_qty;
249 unsigned int first_reg, last_reg;
250 enum machine_mode mode;
251 enum rtx_code comparison_code;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem *qty_table;
257 #ifdef HAVE_cc0
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0;
268 static enum machine_mode prev_insn_cc0_mode;
269 #endif
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn;
275 /* Insn being scanned. */
277 static rtx this_insn;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
281 value.
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
288 struct reg_eqv_elem
290 int next, prev;
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem *reg_eqv_table;
296 struct cse_reg_info
298 /* Next in hash chain. */
299 struct cse_reg_info *hash_next;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info *next;
304 /* Search key */
305 unsigned int regno;
307 /* The quantity number of the register's current contents. */
308 int reg_qty;
310 /* The number of times the register has been altered in the current
311 basic block. */
312 int reg_tick;
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
317 invalid. */
318 int reg_in_table;
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info *cse_reg_info_free_list;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info *cse_reg_info_used_list;
326 static struct cse_reg_info *cse_reg_info_used_list_end;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static unsigned int cached_regno;
340 static struct cse_reg_info *cached_cse_reg_info;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table;
349 /* A HARD_REG_SET containing all the hard registers that are invalidated
350 by a CALL_INSN. */
352 static HARD_REG_SET regs_invalidated_by_call;
354 /* CUID of insn that starts the basic block currently being cse-processed. */
356 static int cse_basic_block_start;
358 /* CUID of insn that ends the basic block currently being cse-processed. */
360 static int cse_basic_block_end;
362 /* Vector mapping INSN_UIDs to cuids.
363 The cuids are like uids but increase monotonically always.
364 We use them to see whether a reg is used outside a given basic block. */
366 static int *uid_cuid;
368 /* Highest UID in UID_CUID. */
369 static int max_uid;
371 /* Get the cuid of an insn. */
373 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
375 /* Nonzero if this pass has made changes, and therefore it's
376 worthwhile to run the garbage collector. */
378 static int cse_altered;
380 /* Nonzero if cse has altered conditional jump insns
381 in such a way that jump optimization should be redone. */
383 static int cse_jumps_altered;
385 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
386 REG_LABEL, we have to rerun jump after CSE to put in the note. */
387 static int recorded_label_ref;
389 /* Says which LABEL_REF was put in the hash table. Used to see if we need
390 to set the above flag. */
391 static rtx new_label_ref;
393 /* canon_hash stores 1 in do_not_record
394 if it notices a reference to CC0, PC, or some other volatile
395 subexpression. */
397 static int do_not_record;
399 #ifdef LOAD_EXTEND_OP
401 /* Scratch rtl used when looking for load-extended copy of a MEM. */
402 static rtx memory_extend_rtx;
403 #endif
405 /* canon_hash stores 1 in hash_arg_in_memory
406 if it notices a reference to memory within the expression being hashed. */
408 static int hash_arg_in_memory;
410 /* The hash table contains buckets which are chains of `struct table_elt's,
411 each recording one expression's information.
412 That expression is in the `exp' field.
414 The canon_exp field contains a canonical (from the point of view of
415 alias analysis) version of the `exp' field.
417 Those elements with the same hash code are chained in both directions
418 through the `next_same_hash' and `prev_same_hash' fields.
420 Each set of expressions with equivalent values
421 are on a two-way chain through the `next_same_value'
422 and `prev_same_value' fields, and all point with
423 the `first_same_value' field at the first element in
424 that chain. The chain is in order of increasing cost.
425 Each element's cost value is in its `cost' field.
427 The `in_memory' field is nonzero for elements that
428 involve any reference to memory. These elements are removed
429 whenever a write is done to an unidentified location in memory.
430 To be safe, we assume that a memory address is unidentified unless
431 the address is either a symbol constant or a constant plus
432 the frame pointer or argument pointer.
434 The `related_value' field is used to connect related expressions
435 (that differ by adding an integer).
436 The related expressions are chained in a circular fashion.
437 `related_value' is zero for expressions for which this
438 chain is not useful.
440 The `cost' field stores the cost of this element's expression.
441 The `regcost' field stores the value returned by approx_reg_cost for
442 this element's expression.
444 The `is_const' flag is set if the element is a constant (including
445 a fixed address).
447 The `flag' field is used as a temporary during some search routines.
449 The `mode' field is usually the same as GET_MODE (`exp'), but
450 if `exp' is a CONST_INT and has no machine mode then the `mode'
451 field is the mode it was being used as. Each constant is
452 recorded separately for each mode it is used with. */
454 struct table_elt
456 rtx exp;
457 rtx canon_exp;
458 struct table_elt *next_same_hash;
459 struct table_elt *prev_same_hash;
460 struct table_elt *next_same_value;
461 struct table_elt *prev_same_value;
462 struct table_elt *first_same_value;
463 struct table_elt *related_value;
464 int cost;
465 int regcost;
466 enum machine_mode mode;
467 char in_memory;
468 char is_const;
469 char flag;
472 /* We don't want a lot of buckets, because we rarely have very many
473 things stored in the hash table, and a lot of buckets slows
474 down a lot of loops that happen frequently. */
475 #define HASH_SHIFT 5
476 #define HASH_SIZE (1 << HASH_SHIFT)
477 #define HASH_MASK (HASH_SIZE - 1)
479 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
480 register (hard registers may require `do_not_record' to be set). */
482 #define HASH(X, M) \
483 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
484 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
485 : canon_hash (X, M)) & HASH_MASK)
487 /* Determine whether register number N is considered a fixed register for the
488 purpose of approximating register costs.
489 It is desirable to replace other regs with fixed regs, to reduce need for
490 non-fixed hard regs.
491 A reg wins if it is either the frame pointer or designated as fixed. */
492 #define FIXED_REGNO_P(N) \
493 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
494 || fixed_regs[N] || global_regs[N])
496 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
497 hard registers and pointers into the frame are the cheapest with a cost
498 of 0. Next come pseudos with a cost of one and other hard registers with
499 a cost of 2. Aside from these special cases, call `rtx_cost'. */
501 #define CHEAP_REGNO(N) \
502 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
503 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
504 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
505 || ((N) < FIRST_PSEUDO_REGISTER \
506 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
508 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
509 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
511 /* Get the info associated with register N. */
513 #define GET_CSE_REG_INFO(N) \
514 (((N) == cached_regno && cached_cse_reg_info) \
515 ? cached_cse_reg_info : get_cse_reg_info ((N)))
517 /* Get the number of times this register has been updated in this
518 basic block. */
520 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
522 /* Get the point at which REG was recorded in the table. */
524 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
526 /* Get the quantity number for REG. */
528 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
530 /* Determine if the quantity number for register X represents a valid index
531 into the qty_table. */
533 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
535 static struct table_elt *table[HASH_SIZE];
537 /* Chain of `struct table_elt's made so far for this function
538 but currently removed from the table. */
540 static struct table_elt *free_element_chain;
542 /* Number of `struct table_elt' structures made so far for this function. */
544 static int n_elements_made;
546 /* Maximum value `n_elements_made' has had so far in this compilation
547 for functions previously processed. */
549 static int max_elements_made;
551 /* Surviving equivalence class when two equivalence classes are merged
552 by recording the effects of a jump in the last insn. Zero if the
553 last insn was not a conditional jump. */
555 static struct table_elt *last_jump_equiv_class;
557 /* Set to the cost of a constant pool reference if one was found for a
558 symbolic constant. If this was found, it means we should try to
559 convert constants into constant pool entries if they don't fit in
560 the insn. */
562 static int constant_pool_entries_cost;
564 /* Define maximum length of a branch path. */
566 #define PATHLENGTH 10
568 /* This data describes a block that will be processed by cse_basic_block. */
570 struct cse_basic_block_data
572 /* Lowest CUID value of insns in block. */
573 int low_cuid;
574 /* Highest CUID value of insns in block. */
575 int high_cuid;
576 /* Total number of SETs in block. */
577 int nsets;
578 /* Last insn in the block. */
579 rtx last;
580 /* Size of current branch path, if any. */
581 int path_size;
582 /* Current branch path, indicating which branches will be taken. */
583 struct branch_path
585 /* The branch insn. */
586 rtx branch;
587 /* Whether it should be taken or not. AROUND is the same as taken
588 except that it is used when the destination label is not preceded
589 by a BARRIER. */
590 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
591 } path[PATHLENGTH];
594 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
595 virtual regs here because the simplify_*_operation routines are called
596 by integrate.c, which is called before virtual register instantiation.
598 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
599 a header file so that their definitions can be shared with the
600 simplification routines in simplify-rtx.c. Until then, do not
601 change these macros without also changing the copy in simplify-rtx.c. */
603 #define FIXED_BASE_PLUS_P(X) \
604 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
605 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
606 || (X) == virtual_stack_vars_rtx \
607 || (X) == virtual_incoming_args_rtx \
608 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
609 && (XEXP (X, 0) == frame_pointer_rtx \
610 || XEXP (X, 0) == hard_frame_pointer_rtx \
611 || ((X) == arg_pointer_rtx \
612 && fixed_regs[ARG_POINTER_REGNUM]) \
613 || XEXP (X, 0) == virtual_stack_vars_rtx \
614 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
615 || GET_CODE (X) == ADDRESSOF)
617 /* Similar, but also allows reference to the stack pointer.
619 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
620 arg_pointer_rtx by itself is nonzero, because on at least one machine,
621 the i960, the arg pointer is zero when it is unused. */
623 #define NONZERO_BASE_PLUS_P(X) \
624 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
625 || (X) == virtual_stack_vars_rtx \
626 || (X) == virtual_incoming_args_rtx \
627 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
628 && (XEXP (X, 0) == frame_pointer_rtx \
629 || XEXP (X, 0) == hard_frame_pointer_rtx \
630 || ((X) == arg_pointer_rtx \
631 && fixed_regs[ARG_POINTER_REGNUM]) \
632 || XEXP (X, 0) == virtual_stack_vars_rtx \
633 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
634 || (X) == stack_pointer_rtx \
635 || (X) == virtual_stack_dynamic_rtx \
636 || (X) == virtual_outgoing_args_rtx \
637 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
638 && (XEXP (X, 0) == stack_pointer_rtx \
639 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
640 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
641 || GET_CODE (X) == ADDRESSOF)
643 static int notreg_cost PARAMS ((rtx, enum rtx_code));
644 static int approx_reg_cost_1 PARAMS ((rtx *, void *));
645 static int approx_reg_cost PARAMS ((rtx));
646 static int preferrable PARAMS ((int, int, int, int));
647 static void new_basic_block PARAMS ((void));
648 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
649 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
650 static void delete_reg_equiv PARAMS ((unsigned int));
651 static int mention_regs PARAMS ((rtx));
652 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
653 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
654 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
655 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
656 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
657 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
658 enum machine_mode));
659 static void merge_equiv_classes PARAMS ((struct table_elt *,
660 struct table_elt *));
661 static void invalidate PARAMS ((rtx, enum machine_mode));
662 static int cse_rtx_varies_p PARAMS ((rtx, int));
663 static void remove_invalid_refs PARAMS ((unsigned int));
664 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
665 enum machine_mode));
666 static void rehash_using_reg PARAMS ((rtx));
667 static void invalidate_memory PARAMS ((void));
668 static void invalidate_for_call PARAMS ((void));
669 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
670 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
671 static unsigned canon_hash_string PARAMS ((const char *));
672 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
673 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
674 static rtx canon_reg PARAMS ((rtx, rtx));
675 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
676 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
677 enum machine_mode *,
678 enum machine_mode *));
679 static rtx fold_rtx PARAMS ((rtx, rtx));
680 static rtx equiv_constant PARAMS ((rtx));
681 static void record_jump_equiv PARAMS ((rtx, int));
682 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
683 rtx, rtx, int));
684 static void cse_insn PARAMS ((rtx, rtx));
685 static int addr_affects_sp_p PARAMS ((rtx));
686 static void invalidate_from_clobbers PARAMS ((rtx));
687 static rtx cse_process_notes PARAMS ((rtx, rtx));
688 static void cse_around_loop PARAMS ((rtx));
689 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
690 static void invalidate_skipped_block PARAMS ((rtx));
691 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
692 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
693 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
694 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
695 extern void dump_class PARAMS ((struct table_elt*));
696 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
697 static int check_dependence PARAMS ((rtx *, void *));
699 static void flush_hash_table PARAMS ((void));
701 /* Dump the expressions in the equivalence class indicated by CLASSP.
702 This function is used only for debugging. */
703 void
704 dump_class (classp)
705 struct table_elt *classp;
707 struct table_elt *elt;
709 fprintf (stderr, "Equivalence chain for ");
710 print_rtl (stderr, classp->exp);
711 fprintf (stderr, ": \n");
713 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
715 print_rtl (stderr, elt->exp);
716 fprintf (stderr, "\n");
720 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
721 static int
722 approx_reg_cost_1 (xp, data)
723 rtx *xp;
724 void *data;
726 rtx x = *xp;
727 regset set = (regset) data;
729 if (x && GET_CODE (x) == REG)
730 SET_REGNO_REG_SET (set, REGNO (x));
731 return 0;
734 /* Return an estimate of the cost of the registers used in an rtx.
735 This is mostly the number of different REG expressions in the rtx;
736 however for some excecptions like fixed registers we use a cost of
737 0. If any other hard register reference occurs, return MAX_COST. */
739 static int
740 approx_reg_cost (x)
741 rtx x;
743 regset_head set;
744 int i;
745 int cost = 0;
746 int hardregs = 0;
748 INIT_REG_SET (&set);
749 for_each_rtx (&x, approx_reg_cost_1, (void *)&set);
751 EXECUTE_IF_SET_IN_REG_SET
752 (&set, 0, i,
754 if (! CHEAP_REGNO (i))
756 if (i < FIRST_PSEUDO_REGISTER)
757 hardregs++;
759 cost += i < FIRST_PSEUDO_REGISTER ? 2 : 1;
763 CLEAR_REG_SET (&set);
764 return hardregs && SMALL_REGISTER_CLASSES ? MAX_COST : cost;
767 /* Return a negative value if an rtx A, whose costs are given by COST_A
768 and REGCOST_A, is more desirable than an rtx B.
769 Return a positive value if A is less desirable, or 0 if the two are
770 equally good. */
771 static int
772 preferrable (cost_a, regcost_a, cost_b, regcost_b)
773 int cost_a, regcost_a, cost_b, regcost_b;
775 /* First, get rid of a cases involving expressions that are entirely
776 unwanted. */
777 if (cost_a != cost_b)
779 if (cost_a == MAX_COST)
780 return 1;
781 if (cost_b == MAX_COST)
782 return -1;
785 /* Avoid extending lifetimes of hardregs. */
786 if (regcost_a != regcost_b)
788 if (regcost_a == MAX_COST)
789 return 1;
790 if (regcost_b == MAX_COST)
791 return -1;
794 /* Normal operation costs take precedence. */
795 if (cost_a != cost_b)
796 return cost_a - cost_b;
797 /* Only if these are identical consider effects on register pressure. */
798 if (regcost_a != regcost_b)
799 return regcost_a - regcost_b;
800 return 0;
803 /* Internal function, to compute cost when X is not a register; called
804 from COST macro to keep it simple. */
806 static int
807 notreg_cost (x, outer)
808 rtx x;
809 enum rtx_code outer;
811 return ((GET_CODE (x) == SUBREG
812 && GET_CODE (SUBREG_REG (x)) == REG
813 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
814 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
815 && (GET_MODE_SIZE (GET_MODE (x))
816 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
817 && subreg_lowpart_p (x)
818 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
819 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
821 : rtx_cost (x, outer) * 2);
824 /* Return an estimate of the cost of computing rtx X.
825 One use is in cse, to decide which expression to keep in the hash table.
826 Another is in rtl generation, to pick the cheapest way to multiply.
827 Other uses like the latter are expected in the future. */
830 rtx_cost (x, outer_code)
831 rtx x;
832 enum rtx_code outer_code ATTRIBUTE_UNUSED;
834 register int i, j;
835 register enum rtx_code code;
836 register const char *fmt;
837 register int total;
839 if (x == 0)
840 return 0;
842 /* Compute the default costs of certain things.
843 Note that RTX_COSTS can override the defaults. */
845 code = GET_CODE (x);
846 switch (code)
848 case MULT:
849 /* Count multiplication by 2**n as a shift,
850 because if we are considering it, we would output it as a shift. */
851 if (GET_CODE (XEXP (x, 1)) == CONST_INT
852 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
853 total = 2;
854 else
855 total = COSTS_N_INSNS (5);
856 break;
857 case DIV:
858 case UDIV:
859 case MOD:
860 case UMOD:
861 total = COSTS_N_INSNS (7);
862 break;
863 case USE:
864 /* Used in loop.c and combine.c as a marker. */
865 total = 0;
866 break;
867 default:
868 total = COSTS_N_INSNS (1);
871 switch (code)
873 case REG:
874 return 0;
876 case SUBREG:
877 /* If we can't tie these modes, make this expensive. The larger
878 the mode, the more expensive it is. */
879 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
880 return COSTS_N_INSNS (2
881 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
882 break;
884 #ifdef RTX_COSTS
885 RTX_COSTS (x, code, outer_code);
886 #endif
887 #ifdef CONST_COSTS
888 CONST_COSTS (x, code, outer_code);
889 #endif
891 default:
892 #ifdef DEFAULT_RTX_COSTS
893 DEFAULT_RTX_COSTS (x, code, outer_code);
894 #endif
895 break;
898 /* Sum the costs of the sub-rtx's, plus cost of this operation,
899 which is already in total. */
901 fmt = GET_RTX_FORMAT (code);
902 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
903 if (fmt[i] == 'e')
904 total += rtx_cost (XEXP (x, i), code);
905 else if (fmt[i] == 'E')
906 for (j = 0; j < XVECLEN (x, i); j++)
907 total += rtx_cost (XVECEXP (x, i, j), code);
909 return total;
912 /* Return cost of address expression X.
913 Expect that X is propertly formed address reference. */
916 address_cost (x, mode)
917 rtx x;
918 enum machine_mode mode;
920 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
921 during CSE, such nodes are present. Using an ADDRESSOF node which
922 refers to the address of a REG is a good thing because we can then
923 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
925 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
926 return -1;
928 /* We may be asked for cost of various unusual addresses, such as operands
929 of push instruction. It is not worthwhile to complicate writing
930 of ADDRESS_COST macro by such cases. */
932 if (!memory_address_p (mode, x))
933 return 1000;
934 #ifdef ADDRESS_COST
935 return ADDRESS_COST (x);
936 #else
937 return rtx_cost (x, MEM);
938 #endif
942 static struct cse_reg_info *
943 get_cse_reg_info (regno)
944 unsigned int regno;
946 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
947 struct cse_reg_info *p;
949 for (p = *hash_head; p != NULL; p = p->hash_next)
950 if (p->regno == regno)
951 break;
953 if (p == NULL)
955 /* Get a new cse_reg_info structure. */
956 if (cse_reg_info_free_list)
958 p = cse_reg_info_free_list;
959 cse_reg_info_free_list = p->next;
961 else
962 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
964 /* Insert into hash table. */
965 p->hash_next = *hash_head;
966 *hash_head = p;
968 /* Initialize it. */
969 p->reg_tick = 1;
970 p->reg_in_table = -1;
971 p->reg_qty = regno;
972 p->regno = regno;
973 p->next = cse_reg_info_used_list;
974 cse_reg_info_used_list = p;
975 if (!cse_reg_info_used_list_end)
976 cse_reg_info_used_list_end = p;
979 /* Cache this lookup; we tend to be looking up information about the
980 same register several times in a row. */
981 cached_regno = regno;
982 cached_cse_reg_info = p;
984 return p;
987 /* Clear the hash table and initialize each register with its own quantity,
988 for a new basic block. */
990 static void
991 new_basic_block ()
993 register int i;
995 next_qty = max_reg;
997 /* Clear out hash table state for this pass. */
999 memset ((char *) reg_hash, 0, sizeof reg_hash);
1001 if (cse_reg_info_used_list)
1003 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
1004 cse_reg_info_free_list = cse_reg_info_used_list;
1005 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
1007 cached_cse_reg_info = 0;
1009 CLEAR_HARD_REG_SET (hard_regs_in_table);
1011 /* The per-quantity values used to be initialized here, but it is
1012 much faster to initialize each as it is made in `make_new_qty'. */
1014 for (i = 0; i < HASH_SIZE; i++)
1016 struct table_elt *first;
1018 first = table[i];
1019 if (first != NULL)
1021 struct table_elt *last = first;
1023 table[i] = NULL;
1025 while (last->next_same_hash != NULL)
1026 last = last->next_same_hash;
1028 /* Now relink this hash entire chain into
1029 the free element list. */
1031 last->next_same_hash = free_element_chain;
1032 free_element_chain = first;
1036 prev_insn = 0;
1038 #ifdef HAVE_cc0
1039 prev_insn_cc0 = 0;
1040 #endif
1043 /* Say that register REG contains a quantity in mode MODE not in any
1044 register before and initialize that quantity. */
1046 static void
1047 make_new_qty (reg, mode)
1048 unsigned int reg;
1049 enum machine_mode mode;
1051 register int q;
1052 register struct qty_table_elem *ent;
1053 register struct reg_eqv_elem *eqv;
1055 if (next_qty >= max_qty)
1056 abort ();
1058 q = REG_QTY (reg) = next_qty++;
1059 ent = &qty_table[q];
1060 ent->first_reg = reg;
1061 ent->last_reg = reg;
1062 ent->mode = mode;
1063 ent->const_rtx = ent->const_insn = NULL_RTX;
1064 ent->comparison_code = UNKNOWN;
1066 eqv = &reg_eqv_table[reg];
1067 eqv->next = eqv->prev = -1;
1070 /* Make reg NEW equivalent to reg OLD.
1071 OLD is not changing; NEW is. */
1073 static void
1074 make_regs_eqv (new, old)
1075 unsigned int new, old;
1077 unsigned int lastr, firstr;
1078 int q = REG_QTY (old);
1079 struct qty_table_elem *ent;
1081 ent = &qty_table[q];
1083 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1084 if (! REGNO_QTY_VALID_P (old))
1085 abort ();
1087 REG_QTY (new) = q;
1088 firstr = ent->first_reg;
1089 lastr = ent->last_reg;
1091 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1092 hard regs. Among pseudos, if NEW will live longer than any other reg
1093 of the same qty, and that is beyond the current basic block,
1094 make it the new canonical replacement for this qty. */
1095 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1096 /* Certain fixed registers might be of the class NO_REGS. This means
1097 that not only can they not be allocated by the compiler, but
1098 they cannot be used in substitutions or canonicalizations
1099 either. */
1100 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1101 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1102 || (new >= FIRST_PSEUDO_REGISTER
1103 && (firstr < FIRST_PSEUDO_REGISTER
1104 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1105 || (uid_cuid[REGNO_FIRST_UID (new)]
1106 < cse_basic_block_start))
1107 && (uid_cuid[REGNO_LAST_UID (new)]
1108 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1110 reg_eqv_table[firstr].prev = new;
1111 reg_eqv_table[new].next = firstr;
1112 reg_eqv_table[new].prev = -1;
1113 ent->first_reg = new;
1115 else
1117 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1118 Otherwise, insert before any non-fixed hard regs that are at the
1119 end. Registers of class NO_REGS cannot be used as an
1120 equivalent for anything. */
1121 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1122 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1123 && new >= FIRST_PSEUDO_REGISTER)
1124 lastr = reg_eqv_table[lastr].prev;
1125 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1126 if (reg_eqv_table[lastr].next >= 0)
1127 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1128 else
1129 qty_table[q].last_reg = new;
1130 reg_eqv_table[lastr].next = new;
1131 reg_eqv_table[new].prev = lastr;
1135 /* Remove REG from its equivalence class. */
1137 static void
1138 delete_reg_equiv (reg)
1139 unsigned int reg;
1141 register struct qty_table_elem *ent;
1142 register int q = REG_QTY (reg);
1143 register int p, n;
1145 /* If invalid, do nothing. */
1146 if (q == (int) reg)
1147 return;
1149 ent = &qty_table[q];
1151 p = reg_eqv_table[reg].prev;
1152 n = reg_eqv_table[reg].next;
1154 if (n != -1)
1155 reg_eqv_table[n].prev = p;
1156 else
1157 ent->last_reg = p;
1158 if (p != -1)
1159 reg_eqv_table[p].next = n;
1160 else
1161 ent->first_reg = n;
1163 REG_QTY (reg) = reg;
1166 /* Remove any invalid expressions from the hash table
1167 that refer to any of the registers contained in expression X.
1169 Make sure that newly inserted references to those registers
1170 as subexpressions will be considered valid.
1172 mention_regs is not called when a register itself
1173 is being stored in the table.
1175 Return 1 if we have done something that may have changed the hash code
1176 of X. */
1178 static int
1179 mention_regs (x)
1180 rtx x;
1182 register enum rtx_code code;
1183 register int i, j;
1184 register const char *fmt;
1185 register int changed = 0;
1187 if (x == 0)
1188 return 0;
1190 code = GET_CODE (x);
1191 if (code == REG)
1193 unsigned int regno = REGNO (x);
1194 unsigned int endregno
1195 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1196 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1197 unsigned int i;
1199 for (i = regno; i < endregno; i++)
1201 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1202 remove_invalid_refs (i);
1204 REG_IN_TABLE (i) = REG_TICK (i);
1207 return 0;
1210 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1211 pseudo if they don't use overlapping words. We handle only pseudos
1212 here for simplicity. */
1213 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1214 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1216 unsigned int i = REGNO (SUBREG_REG (x));
1218 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1220 /* If reg_tick has been incremented more than once since
1221 reg_in_table was last set, that means that the entire
1222 register has been set before, so discard anything memorized
1223 for the entire register, including all SUBREG expressions. */
1224 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1225 remove_invalid_refs (i);
1226 else
1227 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1230 REG_IN_TABLE (i) = REG_TICK (i);
1231 return 0;
1234 /* If X is a comparison or a COMPARE and either operand is a register
1235 that does not have a quantity, give it one. This is so that a later
1236 call to record_jump_equiv won't cause X to be assigned a different
1237 hash code and not found in the table after that call.
1239 It is not necessary to do this here, since rehash_using_reg can
1240 fix up the table later, but doing this here eliminates the need to
1241 call that expensive function in the most common case where the only
1242 use of the register is in the comparison. */
1244 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1246 if (GET_CODE (XEXP (x, 0)) == REG
1247 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1248 if (insert_regs (XEXP (x, 0), NULL, 0))
1250 rehash_using_reg (XEXP (x, 0));
1251 changed = 1;
1254 if (GET_CODE (XEXP (x, 1)) == REG
1255 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1256 if (insert_regs (XEXP (x, 1), NULL, 0))
1258 rehash_using_reg (XEXP (x, 1));
1259 changed = 1;
1263 fmt = GET_RTX_FORMAT (code);
1264 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1265 if (fmt[i] == 'e')
1266 changed |= mention_regs (XEXP (x, i));
1267 else if (fmt[i] == 'E')
1268 for (j = 0; j < XVECLEN (x, i); j++)
1269 changed |= mention_regs (XVECEXP (x, i, j));
1271 return changed;
1274 /* Update the register quantities for inserting X into the hash table
1275 with a value equivalent to CLASSP.
1276 (If the class does not contain a REG, it is irrelevant.)
1277 If MODIFIED is nonzero, X is a destination; it is being modified.
1278 Note that delete_reg_equiv should be called on a register
1279 before insert_regs is done on that register with MODIFIED != 0.
1281 Nonzero value means that elements of reg_qty have changed
1282 so X's hash code may be different. */
1284 static int
1285 insert_regs (x, classp, modified)
1286 rtx x;
1287 struct table_elt *classp;
1288 int modified;
1290 if (GET_CODE (x) == REG)
1292 unsigned int regno = REGNO (x);
1293 int qty_valid;
1295 /* If REGNO is in the equivalence table already but is of the
1296 wrong mode for that equivalence, don't do anything here. */
1298 qty_valid = REGNO_QTY_VALID_P (regno);
1299 if (qty_valid)
1301 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1303 if (ent->mode != GET_MODE (x))
1304 return 0;
1307 if (modified || ! qty_valid)
1309 if (classp)
1310 for (classp = classp->first_same_value;
1311 classp != 0;
1312 classp = classp->next_same_value)
1313 if (GET_CODE (classp->exp) == REG
1314 && GET_MODE (classp->exp) == GET_MODE (x))
1316 make_regs_eqv (regno, REGNO (classp->exp));
1317 return 1;
1320 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1321 than REG_IN_TABLE to find out if there was only a single preceding
1322 invalidation - for the SUBREG - or another one, which would be
1323 for the full register. However, if we find here that REG_TICK
1324 indicates that the register is invalid, it means that it has
1325 been invalidated in a separate operation. The SUBREG might be used
1326 now (then this is a recursive call), or we might use the full REG
1327 now and a SUBREG of it later. So bump up REG_TICK so that
1328 mention_regs will do the right thing. */
1329 if (! modified
1330 && REG_IN_TABLE (regno) >= 0
1331 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1332 REG_TICK (regno)++;
1333 make_new_qty (regno, GET_MODE (x));
1334 return 1;
1337 return 0;
1340 /* If X is a SUBREG, we will likely be inserting the inner register in the
1341 table. If that register doesn't have an assigned quantity number at
1342 this point but does later, the insertion that we will be doing now will
1343 not be accessible because its hash code will have changed. So assign
1344 a quantity number now. */
1346 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1347 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1349 insert_regs (SUBREG_REG (x), NULL, 0);
1350 mention_regs (x);
1351 return 1;
1353 else
1354 return mention_regs (x);
1357 /* Look in or update the hash table. */
1359 /* Remove table element ELT from use in the table.
1360 HASH is its hash code, made using the HASH macro.
1361 It's an argument because often that is known in advance
1362 and we save much time not recomputing it. */
1364 static void
1365 remove_from_table (elt, hash)
1366 register struct table_elt *elt;
1367 unsigned hash;
1369 if (elt == 0)
1370 return;
1372 /* Mark this element as removed. See cse_insn. */
1373 elt->first_same_value = 0;
1375 /* Remove the table element from its equivalence class. */
1378 register struct table_elt *prev = elt->prev_same_value;
1379 register struct table_elt *next = elt->next_same_value;
1381 if (next)
1382 next->prev_same_value = prev;
1384 if (prev)
1385 prev->next_same_value = next;
1386 else
1388 register struct table_elt *newfirst = next;
1389 while (next)
1391 next->first_same_value = newfirst;
1392 next = next->next_same_value;
1397 /* Remove the table element from its hash bucket. */
1400 register struct table_elt *prev = elt->prev_same_hash;
1401 register struct table_elt *next = elt->next_same_hash;
1403 if (next)
1404 next->prev_same_hash = prev;
1406 if (prev)
1407 prev->next_same_hash = next;
1408 else if (table[hash] == elt)
1409 table[hash] = next;
1410 else
1412 /* This entry is not in the proper hash bucket. This can happen
1413 when two classes were merged by `merge_equiv_classes'. Search
1414 for the hash bucket that it heads. This happens only very
1415 rarely, so the cost is acceptable. */
1416 for (hash = 0; hash < HASH_SIZE; hash++)
1417 if (table[hash] == elt)
1418 table[hash] = next;
1422 /* Remove the table element from its related-value circular chain. */
1424 if (elt->related_value != 0 && elt->related_value != elt)
1426 register struct table_elt *p = elt->related_value;
1428 while (p->related_value != elt)
1429 p = p->related_value;
1430 p->related_value = elt->related_value;
1431 if (p->related_value == p)
1432 p->related_value = 0;
1435 /* Now add it to the free element chain. */
1436 elt->next_same_hash = free_element_chain;
1437 free_element_chain = elt;
1440 /* Look up X in the hash table and return its table element,
1441 or 0 if X is not in the table.
1443 MODE is the machine-mode of X, or if X is an integer constant
1444 with VOIDmode then MODE is the mode with which X will be used.
1446 Here we are satisfied to find an expression whose tree structure
1447 looks like X. */
1449 static struct table_elt *
1450 lookup (x, hash, mode)
1451 rtx x;
1452 unsigned hash;
1453 enum machine_mode mode;
1455 register struct table_elt *p;
1457 for (p = table[hash]; p; p = p->next_same_hash)
1458 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1459 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1460 return p;
1462 return 0;
1465 /* Like `lookup' but don't care whether the table element uses invalid regs.
1466 Also ignore discrepancies in the machine mode of a register. */
1468 static struct table_elt *
1469 lookup_for_remove (x, hash, mode)
1470 rtx x;
1471 unsigned hash;
1472 enum machine_mode mode;
1474 register struct table_elt *p;
1476 if (GET_CODE (x) == REG)
1478 unsigned int regno = REGNO (x);
1480 /* Don't check the machine mode when comparing registers;
1481 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1482 for (p = table[hash]; p; p = p->next_same_hash)
1483 if (GET_CODE (p->exp) == REG
1484 && REGNO (p->exp) == regno)
1485 return p;
1487 else
1489 for (p = table[hash]; p; p = p->next_same_hash)
1490 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1491 return p;
1494 return 0;
1497 /* Look for an expression equivalent to X and with code CODE.
1498 If one is found, return that expression. */
1500 static rtx
1501 lookup_as_function (x, code)
1502 rtx x;
1503 enum rtx_code code;
1505 register struct table_elt *p
1506 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1508 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1509 long as we are narrowing. So if we looked in vain for a mode narrower
1510 than word_mode before, look for word_mode now. */
1511 if (p == 0 && code == CONST_INT
1512 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1514 x = copy_rtx (x);
1515 PUT_MODE (x, word_mode);
1516 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1519 if (p == 0)
1520 return 0;
1522 for (p = p->first_same_value; p; p = p->next_same_value)
1523 if (GET_CODE (p->exp) == code
1524 /* Make sure this is a valid entry in the table. */
1525 && exp_equiv_p (p->exp, p->exp, 1, 0))
1526 return p->exp;
1528 return 0;
1531 /* Insert X in the hash table, assuming HASH is its hash code
1532 and CLASSP is an element of the class it should go in
1533 (or 0 if a new class should be made).
1534 It is inserted at the proper position to keep the class in
1535 the order cheapest first.
1537 MODE is the machine-mode of X, or if X is an integer constant
1538 with VOIDmode then MODE is the mode with which X will be used.
1540 For elements of equal cheapness, the most recent one
1541 goes in front, except that the first element in the list
1542 remains first unless a cheaper element is added. The order of
1543 pseudo-registers does not matter, as canon_reg will be called to
1544 find the cheapest when a register is retrieved from the table.
1546 The in_memory field in the hash table element is set to 0.
1547 The caller must set it nonzero if appropriate.
1549 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1550 and if insert_regs returns a nonzero value
1551 you must then recompute its hash code before calling here.
1553 If necessary, update table showing constant values of quantities. */
1555 #define CHEAPER(X, Y) \
1556 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1558 static struct table_elt *
1559 insert (x, classp, hash, mode)
1560 register rtx x;
1561 register struct table_elt *classp;
1562 unsigned hash;
1563 enum machine_mode mode;
1565 register struct table_elt *elt;
1567 /* If X is a register and we haven't made a quantity for it,
1568 something is wrong. */
1569 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1570 abort ();
1572 /* If X is a hard register, show it is being put in the table. */
1573 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1575 unsigned int regno = REGNO (x);
1576 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1577 unsigned int i;
1579 for (i = regno; i < endregno; i++)
1580 SET_HARD_REG_BIT (hard_regs_in_table, i);
1583 /* If X is a label, show we recorded it. */
1584 if (GET_CODE (x) == LABEL_REF
1585 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1586 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1587 new_label_ref = x;
1589 /* Put an element for X into the right hash bucket. */
1591 elt = free_element_chain;
1592 if (elt)
1593 free_element_chain = elt->next_same_hash;
1594 else
1596 n_elements_made++;
1597 elt = (struct table_elt *) xmalloc (sizeof (struct table_elt));
1600 elt->exp = x;
1601 elt->canon_exp = NULL_RTX;
1602 elt->cost = COST (x);
1603 elt->regcost = approx_reg_cost (x);
1604 elt->next_same_value = 0;
1605 elt->prev_same_value = 0;
1606 elt->next_same_hash = table[hash];
1607 elt->prev_same_hash = 0;
1608 elt->related_value = 0;
1609 elt->in_memory = 0;
1610 elt->mode = mode;
1611 elt->is_const = (CONSTANT_P (x)
1612 /* GNU C++ takes advantage of this for `this'
1613 (and other const values). */
1614 || (RTX_UNCHANGING_P (x)
1615 && GET_CODE (x) == REG
1616 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1617 || FIXED_BASE_PLUS_P (x));
1619 if (table[hash])
1620 table[hash]->prev_same_hash = elt;
1621 table[hash] = elt;
1623 /* Put it into the proper value-class. */
1624 if (classp)
1626 classp = classp->first_same_value;
1627 if (CHEAPER (elt, classp))
1628 /* Insert at the head of the class */
1630 register struct table_elt *p;
1631 elt->next_same_value = classp;
1632 classp->prev_same_value = elt;
1633 elt->first_same_value = elt;
1635 for (p = classp; p; p = p->next_same_value)
1636 p->first_same_value = elt;
1638 else
1640 /* Insert not at head of the class. */
1641 /* Put it after the last element cheaper than X. */
1642 register struct table_elt *p, *next;
1644 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1645 p = next);
1647 /* Put it after P and before NEXT. */
1648 elt->next_same_value = next;
1649 if (next)
1650 next->prev_same_value = elt;
1652 elt->prev_same_value = p;
1653 p->next_same_value = elt;
1654 elt->first_same_value = classp;
1657 else
1658 elt->first_same_value = elt;
1660 /* If this is a constant being set equivalent to a register or a register
1661 being set equivalent to a constant, note the constant equivalence.
1663 If this is a constant, it cannot be equivalent to a different constant,
1664 and a constant is the only thing that can be cheaper than a register. So
1665 we know the register is the head of the class (before the constant was
1666 inserted).
1668 If this is a register that is not already known equivalent to a
1669 constant, we must check the entire class.
1671 If this is a register that is already known equivalent to an insn,
1672 update the qtys `const_insn' to show that `this_insn' is the latest
1673 insn making that quantity equivalent to the constant. */
1675 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1676 && GET_CODE (x) != REG)
1678 int exp_q = REG_QTY (REGNO (classp->exp));
1679 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1681 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1682 exp_ent->const_insn = this_insn;
1685 else if (GET_CODE (x) == REG
1686 && classp
1687 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1688 && ! elt->is_const)
1690 register struct table_elt *p;
1692 for (p = classp; p != 0; p = p->next_same_value)
1694 if (p->is_const && GET_CODE (p->exp) != REG)
1696 int x_q = REG_QTY (REGNO (x));
1697 struct qty_table_elem *x_ent = &qty_table[x_q];
1699 x_ent->const_rtx
1700 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1701 x_ent->const_insn = this_insn;
1702 break;
1707 else if (GET_CODE (x) == REG
1708 && qty_table[REG_QTY (REGNO (x))].const_rtx
1709 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1710 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1712 /* If this is a constant with symbolic value,
1713 and it has a term with an explicit integer value,
1714 link it up with related expressions. */
1715 if (GET_CODE (x) == CONST)
1717 rtx subexp = get_related_value (x);
1718 unsigned subhash;
1719 struct table_elt *subelt, *subelt_prev;
1721 if (subexp != 0)
1723 /* Get the integer-free subexpression in the hash table. */
1724 subhash = safe_hash (subexp, mode) & HASH_MASK;
1725 subelt = lookup (subexp, subhash, mode);
1726 if (subelt == 0)
1727 subelt = insert (subexp, NULL, subhash, mode);
1728 /* Initialize SUBELT's circular chain if it has none. */
1729 if (subelt->related_value == 0)
1730 subelt->related_value = subelt;
1731 /* Find the element in the circular chain that precedes SUBELT. */
1732 subelt_prev = subelt;
1733 while (subelt_prev->related_value != subelt)
1734 subelt_prev = subelt_prev->related_value;
1735 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1736 This way the element that follows SUBELT is the oldest one. */
1737 elt->related_value = subelt_prev->related_value;
1738 subelt_prev->related_value = elt;
1742 return elt;
1745 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1746 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1747 the two classes equivalent.
1749 CLASS1 will be the surviving class; CLASS2 should not be used after this
1750 call.
1752 Any invalid entries in CLASS2 will not be copied. */
1754 static void
1755 merge_equiv_classes (class1, class2)
1756 struct table_elt *class1, *class2;
1758 struct table_elt *elt, *next, *new;
1760 /* Ensure we start with the head of the classes. */
1761 class1 = class1->first_same_value;
1762 class2 = class2->first_same_value;
1764 /* If they were already equal, forget it. */
1765 if (class1 == class2)
1766 return;
1768 for (elt = class2; elt; elt = next)
1770 unsigned int hash;
1771 rtx exp = elt->exp;
1772 enum machine_mode mode = elt->mode;
1774 next = elt->next_same_value;
1776 /* Remove old entry, make a new one in CLASS1's class.
1777 Don't do this for invalid entries as we cannot find their
1778 hash code (it also isn't necessary). */
1779 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1781 hash_arg_in_memory = 0;
1782 hash = HASH (exp, mode);
1784 if (GET_CODE (exp) == REG)
1785 delete_reg_equiv (REGNO (exp));
1787 remove_from_table (elt, hash);
1789 if (insert_regs (exp, class1, 0))
1791 rehash_using_reg (exp);
1792 hash = HASH (exp, mode);
1794 new = insert (exp, class1, hash, mode);
1795 new->in_memory = hash_arg_in_memory;
1800 /* Flush the entire hash table. */
1802 static void
1803 flush_hash_table ()
1805 int i;
1806 struct table_elt *p;
1808 for (i = 0; i < HASH_SIZE; i++)
1809 for (p = table[i]; p; p = table[i])
1811 /* Note that invalidate can remove elements
1812 after P in the current hash chain. */
1813 if (GET_CODE (p->exp) == REG)
1814 invalidate (p->exp, p->mode);
1815 else
1816 remove_from_table (p, i);
1820 /* Function called for each rtx to check whether true dependence exist. */
1821 struct check_dependence_data
1823 enum machine_mode mode;
1824 rtx exp;
1826 static int
1827 check_dependence (x, data)
1828 rtx *x;
1829 void *data;
1831 struct check_dependence_data *d = (struct check_dependence_data *) data;
1832 if (*x && GET_CODE (*x) == MEM)
1833 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1834 else
1835 return 0;
1838 /* Remove from the hash table, or mark as invalid, all expressions whose
1839 values could be altered by storing in X. X is a register, a subreg, or
1840 a memory reference with nonvarying address (because, when a memory
1841 reference with a varying address is stored in, all memory references are
1842 removed by invalidate_memory so specific invalidation is superfluous).
1843 FULL_MODE, if not VOIDmode, indicates that this much should be
1844 invalidated instead of just the amount indicated by the mode of X. This
1845 is only used for bitfield stores into memory.
1847 A nonvarying address may be just a register or just a symbol reference,
1848 or it may be either of those plus a numeric offset. */
1850 static void
1851 invalidate (x, full_mode)
1852 rtx x;
1853 enum machine_mode full_mode;
1855 register int i;
1856 register struct table_elt *p;
1858 switch (GET_CODE (x))
1860 case REG:
1862 /* If X is a register, dependencies on its contents are recorded
1863 through the qty number mechanism. Just change the qty number of
1864 the register, mark it as invalid for expressions that refer to it,
1865 and remove it itself. */
1866 unsigned int regno = REGNO (x);
1867 unsigned int hash = HASH (x, GET_MODE (x));
1869 /* Remove REGNO from any quantity list it might be on and indicate
1870 that its value might have changed. If it is a pseudo, remove its
1871 entry from the hash table.
1873 For a hard register, we do the first two actions above for any
1874 additional hard registers corresponding to X. Then, if any of these
1875 registers are in the table, we must remove any REG entries that
1876 overlap these registers. */
1878 delete_reg_equiv (regno);
1879 REG_TICK (regno)++;
1881 if (regno >= FIRST_PSEUDO_REGISTER)
1883 /* Because a register can be referenced in more than one mode,
1884 we might have to remove more than one table entry. */
1885 struct table_elt *elt;
1887 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1888 remove_from_table (elt, hash);
1890 else
1892 HOST_WIDE_INT in_table
1893 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1894 unsigned int endregno
1895 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1896 unsigned int tregno, tendregno, rn;
1897 register struct table_elt *p, *next;
1899 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1901 for (rn = regno + 1; rn < endregno; rn++)
1903 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1904 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1905 delete_reg_equiv (rn);
1906 REG_TICK (rn)++;
1909 if (in_table)
1910 for (hash = 0; hash < HASH_SIZE; hash++)
1911 for (p = table[hash]; p; p = next)
1913 next = p->next_same_hash;
1915 if (GET_CODE (p->exp) != REG
1916 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1917 continue;
1919 tregno = REGNO (p->exp);
1920 tendregno
1921 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1922 if (tendregno > regno && tregno < endregno)
1923 remove_from_table (p, hash);
1927 return;
1929 case SUBREG:
1930 invalidate (SUBREG_REG (x), VOIDmode);
1931 return;
1933 case PARALLEL:
1934 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1935 invalidate (XVECEXP (x, 0, i), VOIDmode);
1936 return;
1938 case EXPR_LIST:
1939 /* This is part of a disjoint return value; extract the location in
1940 question ignoring the offset. */
1941 invalidate (XEXP (x, 0), VOIDmode);
1942 return;
1944 case MEM:
1945 /* Calculate the canonical version of X here so that
1946 true_dependence doesn't generate new RTL for X on each call. */
1947 x = canon_rtx (x);
1949 /* Remove all hash table elements that refer to overlapping pieces of
1950 memory. */
1951 if (full_mode == VOIDmode)
1952 full_mode = GET_MODE (x);
1954 for (i = 0; i < HASH_SIZE; i++)
1956 register struct table_elt *next;
1958 for (p = table[i]; p; p = next)
1960 next = p->next_same_hash;
1961 if (p->in_memory)
1963 struct check_dependence_data d;
1965 /* Just canonicalize the expression once;
1966 otherwise each time we call invalidate
1967 true_dependence will canonicalize the
1968 expression again. */
1969 if (!p->canon_exp)
1970 p->canon_exp = canon_rtx (p->exp);
1971 d.exp = x;
1972 d.mode = full_mode;
1973 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1974 remove_from_table (p, i);
1978 return;
1980 default:
1981 abort ();
1985 /* Remove all expressions that refer to register REGNO,
1986 since they are already invalid, and we are about to
1987 mark that register valid again and don't want the old
1988 expressions to reappear as valid. */
1990 static void
1991 remove_invalid_refs (regno)
1992 unsigned int regno;
1994 unsigned int i;
1995 struct table_elt *p, *next;
1997 for (i = 0; i < HASH_SIZE; i++)
1998 for (p = table[i]; p; p = next)
2000 next = p->next_same_hash;
2001 if (GET_CODE (p->exp) != REG
2002 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx*)0))
2003 remove_from_table (p, i);
2007 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2008 and mode MODE. */
2009 static void
2010 remove_invalid_subreg_refs (regno, offset, mode)
2011 unsigned int regno;
2012 unsigned int offset;
2013 enum machine_mode mode;
2015 unsigned int i;
2016 struct table_elt *p, *next;
2017 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
2019 for (i = 0; i < HASH_SIZE; i++)
2020 for (p = table[i]; p; p = next)
2022 rtx exp = p->exp;
2023 next = p->next_same_hash;
2025 if (GET_CODE (exp) != REG
2026 && (GET_CODE (exp) != SUBREG
2027 || GET_CODE (SUBREG_REG (exp)) != REG
2028 || REGNO (SUBREG_REG (exp)) != regno
2029 || (((SUBREG_BYTE (exp)
2030 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2031 && SUBREG_BYTE (exp) <= end))
2032 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx*)0))
2033 remove_from_table (p, i);
2037 /* Recompute the hash codes of any valid entries in the hash table that
2038 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2040 This is called when we make a jump equivalence. */
2042 static void
2043 rehash_using_reg (x)
2044 rtx x;
2046 unsigned int i;
2047 struct table_elt *p, *next;
2048 unsigned hash;
2050 if (GET_CODE (x) == SUBREG)
2051 x = SUBREG_REG (x);
2053 /* If X is not a register or if the register is known not to be in any
2054 valid entries in the table, we have no work to do. */
2056 if (GET_CODE (x) != REG
2057 || REG_IN_TABLE (REGNO (x)) < 0
2058 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2059 return;
2061 /* Scan all hash chains looking for valid entries that mention X.
2062 If we find one and it is in the wrong hash chain, move it. We can skip
2063 objects that are registers, since they are handled specially. */
2065 for (i = 0; i < HASH_SIZE; i++)
2066 for (p = table[i]; p; p = next)
2068 next = p->next_same_hash;
2069 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2070 && exp_equiv_p (p->exp, p->exp, 1, 0)
2071 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2073 if (p->next_same_hash)
2074 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2076 if (p->prev_same_hash)
2077 p->prev_same_hash->next_same_hash = p->next_same_hash;
2078 else
2079 table[i] = p->next_same_hash;
2081 p->next_same_hash = table[hash];
2082 p->prev_same_hash = 0;
2083 if (table[hash])
2084 table[hash]->prev_same_hash = p;
2085 table[hash] = p;
2090 /* Remove from the hash table any expression that is a call-clobbered
2091 register. Also update their TICK values. */
2093 static void
2094 invalidate_for_call ()
2096 unsigned int regno, endregno;
2097 unsigned int i;
2098 unsigned hash;
2099 struct table_elt *p, *next;
2100 int in_table = 0;
2102 /* Go through all the hard registers. For each that is clobbered in
2103 a CALL_INSN, remove the register from quantity chains and update
2104 reg_tick if defined. Also see if any of these registers is currently
2105 in the table. */
2107 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2108 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2110 delete_reg_equiv (regno);
2111 if (REG_TICK (regno) >= 0)
2112 REG_TICK (regno)++;
2114 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2117 /* In the case where we have no call-clobbered hard registers in the
2118 table, we are done. Otherwise, scan the table and remove any
2119 entry that overlaps a call-clobbered register. */
2121 if (in_table)
2122 for (hash = 0; hash < HASH_SIZE; hash++)
2123 for (p = table[hash]; p; p = next)
2125 next = p->next_same_hash;
2127 if (GET_CODE (p->exp) != REG
2128 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2129 continue;
2131 regno = REGNO (p->exp);
2132 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2134 for (i = regno; i < endregno; i++)
2135 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2137 remove_from_table (p, hash);
2138 break;
2143 /* Given an expression X of type CONST,
2144 and ELT which is its table entry (or 0 if it
2145 is not in the hash table),
2146 return an alternate expression for X as a register plus integer.
2147 If none can be found, return 0. */
2149 static rtx
2150 use_related_value (x, elt)
2151 rtx x;
2152 struct table_elt *elt;
2154 register struct table_elt *relt = 0;
2155 register struct table_elt *p, *q;
2156 HOST_WIDE_INT offset;
2158 /* First, is there anything related known?
2159 If we have a table element, we can tell from that.
2160 Otherwise, must look it up. */
2162 if (elt != 0 && elt->related_value != 0)
2163 relt = elt;
2164 else if (elt == 0 && GET_CODE (x) == CONST)
2166 rtx subexp = get_related_value (x);
2167 if (subexp != 0)
2168 relt = lookup (subexp,
2169 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2170 GET_MODE (subexp));
2173 if (relt == 0)
2174 return 0;
2176 /* Search all related table entries for one that has an
2177 equivalent register. */
2179 p = relt;
2180 while (1)
2182 /* This loop is strange in that it is executed in two different cases.
2183 The first is when X is already in the table. Then it is searching
2184 the RELATED_VALUE list of X's class (RELT). The second case is when
2185 X is not in the table. Then RELT points to a class for the related
2186 value.
2188 Ensure that, whatever case we are in, that we ignore classes that have
2189 the same value as X. */
2191 if (rtx_equal_p (x, p->exp))
2192 q = 0;
2193 else
2194 for (q = p->first_same_value; q; q = q->next_same_value)
2195 if (GET_CODE (q->exp) == REG)
2196 break;
2198 if (q)
2199 break;
2201 p = p->related_value;
2203 /* We went all the way around, so there is nothing to be found.
2204 Alternatively, perhaps RELT was in the table for some other reason
2205 and it has no related values recorded. */
2206 if (p == relt || p == 0)
2207 break;
2210 if (q == 0)
2211 return 0;
2213 offset = (get_integer_term (x) - get_integer_term (p->exp));
2214 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2215 return plus_constant (q->exp, offset);
2218 /* Hash a string. Just add its bytes up. */
2219 static inline unsigned
2220 canon_hash_string (ps)
2221 const char *ps;
2223 unsigned hash = 0;
2224 const unsigned char *p = (const unsigned char *)ps;
2226 if (p)
2227 while (*p)
2228 hash += *p++;
2230 return hash;
2233 /* Hash an rtx. We are careful to make sure the value is never negative.
2234 Equivalent registers hash identically.
2235 MODE is used in hashing for CONST_INTs only;
2236 otherwise the mode of X is used.
2238 Store 1 in do_not_record if any subexpression is volatile.
2240 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2241 which does not have the RTX_UNCHANGING_P bit set.
2243 Note that cse_insn knows that the hash code of a MEM expression
2244 is just (int) MEM plus the hash code of the address. */
2246 static unsigned
2247 canon_hash (x, mode)
2248 rtx x;
2249 enum machine_mode mode;
2251 register int i, j;
2252 register unsigned hash = 0;
2253 register enum rtx_code code;
2254 register const char *fmt;
2256 /* repeat is used to turn tail-recursion into iteration. */
2257 repeat:
2258 if (x == 0)
2259 return hash;
2261 code = GET_CODE (x);
2262 switch (code)
2264 case REG:
2266 unsigned int regno = REGNO (x);
2268 /* On some machines, we can't record any non-fixed hard register,
2269 because extending its life will cause reload problems. We
2270 consider ap, fp, and sp to be fixed for this purpose.
2272 We also consider CCmode registers to be fixed for this purpose;
2273 failure to do so leads to failure to simplify 0<100 type of
2274 conditionals.
2276 On all machines, we can't record any global registers. */
2278 if (regno < FIRST_PSEUDO_REGISTER
2279 && (global_regs[regno]
2280 || (SMALL_REGISTER_CLASSES
2281 && ! fixed_regs[regno]
2282 && regno != FRAME_POINTER_REGNUM
2283 && regno != HARD_FRAME_POINTER_REGNUM
2284 && regno != ARG_POINTER_REGNUM
2285 && regno != STACK_POINTER_REGNUM
2286 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2288 do_not_record = 1;
2289 return 0;
2292 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2293 return hash;
2296 /* We handle SUBREG of a REG specially because the underlying
2297 reg changes its hash value with every value change; we don't
2298 want to have to forget unrelated subregs when one subreg changes. */
2299 case SUBREG:
2301 if (GET_CODE (SUBREG_REG (x)) == REG)
2303 hash += (((unsigned) SUBREG << 7)
2304 + REGNO (SUBREG_REG (x))
2305 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2306 return hash;
2308 break;
2311 case CONST_INT:
2313 unsigned HOST_WIDE_INT tem = INTVAL (x);
2314 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2315 return hash;
2318 case CONST_DOUBLE:
2319 /* This is like the general case, except that it only counts
2320 the integers representing the constant. */
2321 hash += (unsigned) code + (unsigned) GET_MODE (x);
2322 if (GET_MODE (x) != VOIDmode)
2323 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2325 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2326 hash += tem;
2328 else
2329 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2330 + (unsigned) CONST_DOUBLE_HIGH (x));
2331 return hash;
2333 /* Assume there is only one rtx object for any given label. */
2334 case LABEL_REF:
2335 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2336 return hash;
2338 case SYMBOL_REF:
2339 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2340 return hash;
2342 case MEM:
2343 /* We don't record if marked volatile or if BLKmode since we don't
2344 know the size of the move. */
2345 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2347 do_not_record = 1;
2348 return 0;
2350 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2352 hash_arg_in_memory = 1;
2354 /* Now that we have already found this special case,
2355 might as well speed it up as much as possible. */
2356 hash += (unsigned) MEM;
2357 x = XEXP (x, 0);
2358 goto repeat;
2360 case USE:
2361 /* A USE that mentions non-volatile memory needs special
2362 handling since the MEM may be BLKmode which normally
2363 prevents an entry from being made. Pure calls are
2364 marked by a USE which mentions BLKmode memory. */
2365 if (GET_CODE (XEXP (x, 0)) == MEM
2366 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2368 hash += (unsigned)USE;
2369 x = XEXP (x, 0);
2371 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2372 hash_arg_in_memory = 1;
2374 /* Now that we have already found this special case,
2375 might as well speed it up as much as possible. */
2376 hash += (unsigned) MEM;
2377 x = XEXP (x, 0);
2378 goto repeat;
2380 break;
2382 case PRE_DEC:
2383 case PRE_INC:
2384 case POST_DEC:
2385 case POST_INC:
2386 case PRE_MODIFY:
2387 case POST_MODIFY:
2388 case PC:
2389 case CC0:
2390 case CALL:
2391 case UNSPEC_VOLATILE:
2392 do_not_record = 1;
2393 return 0;
2395 case ASM_OPERANDS:
2396 if (MEM_VOLATILE_P (x))
2398 do_not_record = 1;
2399 return 0;
2401 else
2403 /* We don't want to take the filename and line into account. */
2404 hash += (unsigned) code + (unsigned) GET_MODE (x)
2405 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2406 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2407 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2409 if (ASM_OPERANDS_INPUT_LENGTH (x))
2411 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2413 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2414 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2415 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2416 (x, i)));
2419 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2420 x = ASM_OPERANDS_INPUT (x, 0);
2421 mode = GET_MODE (x);
2422 goto repeat;
2425 return hash;
2427 break;
2429 default:
2430 break;
2433 i = GET_RTX_LENGTH (code) - 1;
2434 hash += (unsigned) code + (unsigned) GET_MODE (x);
2435 fmt = GET_RTX_FORMAT (code);
2436 for (; i >= 0; i--)
2438 if (fmt[i] == 'e')
2440 rtx tem = XEXP (x, i);
2442 /* If we are about to do the last recursive call
2443 needed at this level, change it into iteration.
2444 This function is called enough to be worth it. */
2445 if (i == 0)
2447 x = tem;
2448 goto repeat;
2450 hash += canon_hash (tem, 0);
2452 else if (fmt[i] == 'E')
2453 for (j = 0; j < XVECLEN (x, i); j++)
2454 hash += canon_hash (XVECEXP (x, i, j), 0);
2455 else if (fmt[i] == 's')
2456 hash += canon_hash_string (XSTR (x, i));
2457 else if (fmt[i] == 'i')
2459 register unsigned tem = XINT (x, i);
2460 hash += tem;
2462 else if (fmt[i] == '0' || fmt[i] == 't')
2463 /* Unused. */
2465 else
2466 abort ();
2468 return hash;
2471 /* Like canon_hash but with no side effects. */
2473 static unsigned
2474 safe_hash (x, mode)
2475 rtx x;
2476 enum machine_mode mode;
2478 int save_do_not_record = do_not_record;
2479 int save_hash_arg_in_memory = hash_arg_in_memory;
2480 unsigned hash = canon_hash (x, mode);
2481 hash_arg_in_memory = save_hash_arg_in_memory;
2482 do_not_record = save_do_not_record;
2483 return hash;
2486 /* Return 1 iff X and Y would canonicalize into the same thing,
2487 without actually constructing the canonicalization of either one.
2488 If VALIDATE is nonzero,
2489 we assume X is an expression being processed from the rtl
2490 and Y was found in the hash table. We check register refs
2491 in Y for being marked as valid.
2493 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2494 that is known to be in the register. Ordinarily, we don't allow them
2495 to match, because letting them match would cause unpredictable results
2496 in all the places that search a hash table chain for an equivalent
2497 for a given value. A possible equivalent that has different structure
2498 has its hash code computed from different data. Whether the hash code
2499 is the same as that of the given value is pure luck. */
2501 static int
2502 exp_equiv_p (x, y, validate, equal_values)
2503 rtx x, y;
2504 int validate;
2505 int equal_values;
2507 register int i, j;
2508 register enum rtx_code code;
2509 register const char *fmt;
2511 /* Note: it is incorrect to assume an expression is equivalent to itself
2512 if VALIDATE is nonzero. */
2513 if (x == y && !validate)
2514 return 1;
2515 if (x == 0 || y == 0)
2516 return x == y;
2518 code = GET_CODE (x);
2519 if (code != GET_CODE (y))
2521 if (!equal_values)
2522 return 0;
2524 /* If X is a constant and Y is a register or vice versa, they may be
2525 equivalent. We only have to validate if Y is a register. */
2526 if (CONSTANT_P (x) && GET_CODE (y) == REG
2527 && REGNO_QTY_VALID_P (REGNO (y)))
2529 int y_q = REG_QTY (REGNO (y));
2530 struct qty_table_elem *y_ent = &qty_table[y_q];
2532 if (GET_MODE (y) == y_ent->mode
2533 && rtx_equal_p (x, y_ent->const_rtx)
2534 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2535 return 1;
2538 if (CONSTANT_P (y) && code == REG
2539 && REGNO_QTY_VALID_P (REGNO (x)))
2541 int x_q = REG_QTY (REGNO (x));
2542 struct qty_table_elem *x_ent = &qty_table[x_q];
2544 if (GET_MODE (x) == x_ent->mode
2545 && rtx_equal_p (y, x_ent->const_rtx))
2546 return 1;
2549 return 0;
2552 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2553 if (GET_MODE (x) != GET_MODE (y))
2554 return 0;
2556 switch (code)
2558 case PC:
2559 case CC0:
2560 case CONST_INT:
2561 return x == y;
2563 case LABEL_REF:
2564 return XEXP (x, 0) == XEXP (y, 0);
2566 case SYMBOL_REF:
2567 return XSTR (x, 0) == XSTR (y, 0);
2569 case REG:
2571 unsigned int regno = REGNO (y);
2572 unsigned int endregno
2573 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2574 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2575 unsigned int i;
2577 /* If the quantities are not the same, the expressions are not
2578 equivalent. If there are and we are not to validate, they
2579 are equivalent. Otherwise, ensure all regs are up-to-date. */
2581 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2582 return 0;
2584 if (! validate)
2585 return 1;
2587 for (i = regno; i < endregno; i++)
2588 if (REG_IN_TABLE (i) != REG_TICK (i))
2589 return 0;
2591 return 1;
2594 /* For commutative operations, check both orders. */
2595 case PLUS:
2596 case MULT:
2597 case AND:
2598 case IOR:
2599 case XOR:
2600 case NE:
2601 case EQ:
2602 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2603 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2604 validate, equal_values))
2605 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2606 validate, equal_values)
2607 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2608 validate, equal_values)));
2610 case ASM_OPERANDS:
2611 /* We don't use the generic code below because we want to
2612 disregard filename and line numbers. */
2614 /* A volatile asm isn't equivalent to any other. */
2615 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2616 return 0;
2618 if (GET_MODE (x) != GET_MODE (y)
2619 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2620 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2621 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2622 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2623 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2624 return 0;
2626 if (ASM_OPERANDS_INPUT_LENGTH (x))
2628 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2629 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2630 ASM_OPERANDS_INPUT (y, i),
2631 validate, equal_values)
2632 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2633 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2634 return 0;
2637 return 1;
2639 default:
2640 break;
2643 /* Compare the elements. If any pair of corresponding elements
2644 fail to match, return 0 for the whole things. */
2646 fmt = GET_RTX_FORMAT (code);
2647 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2649 switch (fmt[i])
2651 case 'e':
2652 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2653 return 0;
2654 break;
2656 case 'E':
2657 if (XVECLEN (x, i) != XVECLEN (y, i))
2658 return 0;
2659 for (j = 0; j < XVECLEN (x, i); j++)
2660 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2661 validate, equal_values))
2662 return 0;
2663 break;
2665 case 's':
2666 if (strcmp (XSTR (x, i), XSTR (y, i)))
2667 return 0;
2668 break;
2670 case 'i':
2671 if (XINT (x, i) != XINT (y, i))
2672 return 0;
2673 break;
2675 case 'w':
2676 if (XWINT (x, i) != XWINT (y, i))
2677 return 0;
2678 break;
2680 case '0':
2681 case 't':
2682 break;
2684 default:
2685 abort ();
2689 return 1;
2692 /* Return 1 if X has a value that can vary even between two
2693 executions of the program. 0 means X can be compared reliably
2694 against certain constants or near-constants. */
2696 static int
2697 cse_rtx_varies_p (x, from_alias)
2698 register rtx x;
2699 int from_alias;
2701 /* We need not check for X and the equivalence class being of the same
2702 mode because if X is equivalent to a constant in some mode, it
2703 doesn't vary in any mode. */
2705 if (GET_CODE (x) == REG
2706 && REGNO_QTY_VALID_P (REGNO (x)))
2708 int x_q = REG_QTY (REGNO (x));
2709 struct qty_table_elem *x_ent = &qty_table[x_q];
2711 if (GET_MODE (x) == x_ent->mode
2712 && x_ent->const_rtx != NULL_RTX)
2713 return 0;
2716 if (GET_CODE (x) == PLUS
2717 && GET_CODE (XEXP (x, 1)) == CONST_INT
2718 && GET_CODE (XEXP (x, 0)) == REG
2719 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2721 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2722 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2724 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2725 && x0_ent->const_rtx != NULL_RTX)
2726 return 0;
2729 /* This can happen as the result of virtual register instantiation, if
2730 the initial constant is too large to be a valid address. This gives
2731 us a three instruction sequence, load large offset into a register,
2732 load fp minus a constant into a register, then a MEM which is the
2733 sum of the two `constant' registers. */
2734 if (GET_CODE (x) == PLUS
2735 && GET_CODE (XEXP (x, 0)) == REG
2736 && GET_CODE (XEXP (x, 1)) == REG
2737 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2738 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2740 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2741 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2742 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2743 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2745 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2746 && x0_ent->const_rtx != NULL_RTX
2747 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2748 && x1_ent->const_rtx != NULL_RTX)
2749 return 0;
2752 return rtx_varies_p (x, from_alias);
2755 /* Canonicalize an expression:
2756 replace each register reference inside it
2757 with the "oldest" equivalent register.
2759 If INSN is non-zero and we are replacing a pseudo with a hard register
2760 or vice versa, validate_change is used to ensure that INSN remains valid
2761 after we make our substitution. The calls are made with IN_GROUP non-zero
2762 so apply_change_group must be called upon the outermost return from this
2763 function (unless INSN is zero). The result of apply_change_group can
2764 generally be discarded since the changes we are making are optional. */
2766 static rtx
2767 canon_reg (x, insn)
2768 rtx x;
2769 rtx insn;
2771 register int i;
2772 register enum rtx_code code;
2773 register const char *fmt;
2775 if (x == 0)
2776 return x;
2778 code = GET_CODE (x);
2779 switch (code)
2781 case PC:
2782 case CC0:
2783 case CONST:
2784 case CONST_INT:
2785 case CONST_DOUBLE:
2786 case SYMBOL_REF:
2787 case LABEL_REF:
2788 case ADDR_VEC:
2789 case ADDR_DIFF_VEC:
2790 return x;
2792 case REG:
2794 register int first;
2795 register int q;
2796 register struct qty_table_elem *ent;
2798 /* Never replace a hard reg, because hard regs can appear
2799 in more than one machine mode, and we must preserve the mode
2800 of each occurrence. Also, some hard regs appear in
2801 MEMs that are shared and mustn't be altered. Don't try to
2802 replace any reg that maps to a reg of class NO_REGS. */
2803 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2804 || ! REGNO_QTY_VALID_P (REGNO (x)))
2805 return x;
2807 q = REG_QTY (REGNO (x));
2808 ent = &qty_table[q];
2809 first = ent->first_reg;
2810 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2811 : REGNO_REG_CLASS (first) == NO_REGS ? x
2812 : gen_rtx_REG (ent->mode, first));
2815 default:
2816 break;
2819 fmt = GET_RTX_FORMAT (code);
2820 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2822 register int j;
2824 if (fmt[i] == 'e')
2826 rtx new = canon_reg (XEXP (x, i), insn);
2827 int insn_code;
2829 /* If replacing pseudo with hard reg or vice versa, ensure the
2830 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2831 if (insn != 0 && new != 0
2832 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2833 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2834 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2835 || (insn_code = recog_memoized (insn)) < 0
2836 || insn_data[insn_code].n_dups > 0))
2837 validate_change (insn, &XEXP (x, i), new, 1);
2838 else
2839 XEXP (x, i) = new;
2841 else if (fmt[i] == 'E')
2842 for (j = 0; j < XVECLEN (x, i); j++)
2843 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2846 return x;
2849 /* LOC is a location within INSN that is an operand address (the contents of
2850 a MEM). Find the best equivalent address to use that is valid for this
2851 insn.
2853 On most CISC machines, complicated address modes are costly, and rtx_cost
2854 is a good approximation for that cost. However, most RISC machines have
2855 only a few (usually only one) memory reference formats. If an address is
2856 valid at all, it is often just as cheap as any other address. Hence, for
2857 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2858 costs of various addresses. For two addresses of equal cost, choose the one
2859 with the highest `rtx_cost' value as that has the potential of eliminating
2860 the most insns. For equal costs, we choose the first in the equivalence
2861 class. Note that we ignore the fact that pseudo registers are cheaper
2862 than hard registers here because we would also prefer the pseudo registers.
2865 static void
2866 find_best_addr (insn, loc, mode)
2867 rtx insn;
2868 rtx *loc;
2869 enum machine_mode mode;
2871 struct table_elt *elt;
2872 rtx addr = *loc;
2873 #ifdef ADDRESS_COST
2874 struct table_elt *p;
2875 int found_better = 1;
2876 #endif
2877 int save_do_not_record = do_not_record;
2878 int save_hash_arg_in_memory = hash_arg_in_memory;
2879 int addr_volatile;
2880 int regno;
2881 unsigned hash;
2883 /* Do not try to replace constant addresses or addresses of local and
2884 argument slots. These MEM expressions are made only once and inserted
2885 in many instructions, as well as being used to control symbol table
2886 output. It is not safe to clobber them.
2888 There are some uncommon cases where the address is already in a register
2889 for some reason, but we cannot take advantage of that because we have
2890 no easy way to unshare the MEM. In addition, looking up all stack
2891 addresses is costly. */
2892 if ((GET_CODE (addr) == PLUS
2893 && GET_CODE (XEXP (addr, 0)) == REG
2894 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2895 && (regno = REGNO (XEXP (addr, 0)),
2896 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2897 || regno == ARG_POINTER_REGNUM))
2898 || (GET_CODE (addr) == REG
2899 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2900 || regno == HARD_FRAME_POINTER_REGNUM
2901 || regno == ARG_POINTER_REGNUM))
2902 || GET_CODE (addr) == ADDRESSOF
2903 || CONSTANT_ADDRESS_P (addr))
2904 return;
2906 /* If this address is not simply a register, try to fold it. This will
2907 sometimes simplify the expression. Many simplifications
2908 will not be valid, but some, usually applying the associative rule, will
2909 be valid and produce better code. */
2910 if (GET_CODE (addr) != REG)
2912 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2913 int addr_folded_cost = address_cost (folded, mode);
2914 int addr_cost = address_cost (addr, mode);
2916 if ((addr_folded_cost < addr_cost
2917 || (addr_folded_cost == addr_cost
2918 /* ??? The rtx_cost comparison is left over from an older
2919 version of this code. It is probably no longer helpful. */
2920 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2921 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2922 && validate_change (insn, loc, folded, 0))
2923 addr = folded;
2926 /* If this address is not in the hash table, we can't look for equivalences
2927 of the whole address. Also, ignore if volatile. */
2929 do_not_record = 0;
2930 hash = HASH (addr, Pmode);
2931 addr_volatile = do_not_record;
2932 do_not_record = save_do_not_record;
2933 hash_arg_in_memory = save_hash_arg_in_memory;
2935 if (addr_volatile)
2936 return;
2938 elt = lookup (addr, hash, Pmode);
2940 #ifndef ADDRESS_COST
2941 if (elt)
2943 int our_cost = elt->cost;
2945 /* Find the lowest cost below ours that works. */
2946 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2947 if (elt->cost < our_cost
2948 && (GET_CODE (elt->exp) == REG
2949 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2950 && validate_change (insn, loc,
2951 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2952 return;
2954 #else
2956 if (elt)
2958 /* We need to find the best (under the criteria documented above) entry
2959 in the class that is valid. We use the `flag' field to indicate
2960 choices that were invalid and iterate until we can't find a better
2961 one that hasn't already been tried. */
2963 for (p = elt->first_same_value; p; p = p->next_same_value)
2964 p->flag = 0;
2966 while (found_better)
2968 int best_addr_cost = address_cost (*loc, mode);
2969 int best_rtx_cost = (elt->cost + 1) >> 1;
2970 int exp_cost;
2971 struct table_elt *best_elt = elt;
2973 found_better = 0;
2974 for (p = elt->first_same_value; p; p = p->next_same_value)
2975 if (! p->flag)
2977 if ((GET_CODE (p->exp) == REG
2978 || exp_equiv_p (p->exp, p->exp, 1, 0))
2979 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2980 || (exp_cost == best_addr_cost
2981 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2983 found_better = 1;
2984 best_addr_cost = exp_cost;
2985 best_rtx_cost = (p->cost + 1) >> 1;
2986 best_elt = p;
2990 if (found_better)
2992 if (validate_change (insn, loc,
2993 canon_reg (copy_rtx (best_elt->exp),
2994 NULL_RTX), 0))
2995 return;
2996 else
2997 best_elt->flag = 1;
3002 /* If the address is a binary operation with the first operand a register
3003 and the second a constant, do the same as above, but looking for
3004 equivalences of the register. Then try to simplify before checking for
3005 the best address to use. This catches a few cases: First is when we
3006 have REG+const and the register is another REG+const. We can often merge
3007 the constants and eliminate one insn and one register. It may also be
3008 that a machine has a cheap REG+REG+const. Finally, this improves the
3009 code on the Alpha for unaligned byte stores. */
3011 if (flag_expensive_optimizations
3012 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
3013 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
3014 && GET_CODE (XEXP (*loc, 0)) == REG
3015 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
3017 rtx c = XEXP (*loc, 1);
3019 do_not_record = 0;
3020 hash = HASH (XEXP (*loc, 0), Pmode);
3021 do_not_record = save_do_not_record;
3022 hash_arg_in_memory = save_hash_arg_in_memory;
3024 elt = lookup (XEXP (*loc, 0), hash, Pmode);
3025 if (elt == 0)
3026 return;
3028 /* We need to find the best (under the criteria documented above) entry
3029 in the class that is valid. We use the `flag' field to indicate
3030 choices that were invalid and iterate until we can't find a better
3031 one that hasn't already been tried. */
3033 for (p = elt->first_same_value; p; p = p->next_same_value)
3034 p->flag = 0;
3036 while (found_better)
3038 int best_addr_cost = address_cost (*loc, mode);
3039 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3040 struct table_elt *best_elt = elt;
3041 rtx best_rtx = *loc;
3042 int count;
3044 /* This is at worst case an O(n^2) algorithm, so limit our search
3045 to the first 32 elements on the list. This avoids trouble
3046 compiling code with very long basic blocks that can easily
3047 call simplify_gen_binary so many times that we run out of
3048 memory. */
3050 found_better = 0;
3051 for (p = elt->first_same_value, count = 0;
3052 p && count < 32;
3053 p = p->next_same_value, count++)
3054 if (! p->flag
3055 && (GET_CODE (p->exp) == REG
3056 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3058 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3059 p->exp, c);
3060 int new_cost;
3061 new_cost = address_cost (new, mode);
3063 if (new_cost < best_addr_cost
3064 || (new_cost == best_addr_cost
3065 && (COST (new) + 1) >> 1 > best_rtx_cost))
3067 found_better = 1;
3068 best_addr_cost = new_cost;
3069 best_rtx_cost = (COST (new) + 1) >> 1;
3070 best_elt = p;
3071 best_rtx = new;
3075 if (found_better)
3077 if (validate_change (insn, loc,
3078 canon_reg (copy_rtx (best_rtx),
3079 NULL_RTX), 0))
3080 return;
3081 else
3082 best_elt->flag = 1;
3086 #endif
3089 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3090 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3091 what values are being compared.
3093 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3094 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3095 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3096 compared to produce cc0.
3098 The return value is the comparison operator and is either the code of
3099 A or the code corresponding to the inverse of the comparison. */
3101 static enum rtx_code
3102 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3103 enum rtx_code code;
3104 rtx *parg1, *parg2;
3105 enum machine_mode *pmode1, *pmode2;
3107 rtx arg1, arg2;
3109 arg1 = *parg1, arg2 = *parg2;
3111 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3113 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3115 /* Set non-zero when we find something of interest. */
3116 rtx x = 0;
3117 int reverse_code = 0;
3118 struct table_elt *p = 0;
3120 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3121 On machines with CC0, this is the only case that can occur, since
3122 fold_rtx will return the COMPARE or item being compared with zero
3123 when given CC0. */
3125 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3126 x = arg1;
3128 /* If ARG1 is a comparison operator and CODE is testing for
3129 STORE_FLAG_VALUE, get the inner arguments. */
3131 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3133 if (code == NE
3134 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3135 && code == LT && STORE_FLAG_VALUE == -1)
3136 #ifdef FLOAT_STORE_FLAG_VALUE
3137 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3138 && (REAL_VALUE_NEGATIVE
3139 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3140 #endif
3142 x = arg1;
3143 else if (code == EQ
3144 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3145 && code == GE && STORE_FLAG_VALUE == -1)
3146 #ifdef FLOAT_STORE_FLAG_VALUE
3147 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3148 && (REAL_VALUE_NEGATIVE
3149 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3150 #endif
3152 x = arg1, reverse_code = 1;
3155 /* ??? We could also check for
3157 (ne (and (eq (...) (const_int 1))) (const_int 0))
3159 and related forms, but let's wait until we see them occurring. */
3161 if (x == 0)
3162 /* Look up ARG1 in the hash table and see if it has an equivalence
3163 that lets us see what is being compared. */
3164 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3165 GET_MODE (arg1));
3166 if (p)
3168 p = p->first_same_value;
3170 /* If what we compare is already known to be constant, that is as
3171 good as it gets.
3172 We need to break the loop in this case, because otherwise we
3173 can have an infinite loop when looking at a reg that is known
3174 to be a constant which is the same as a comparison of a reg
3175 against zero which appears later in the insn stream, which in
3176 turn is constant and the same as the comparison of the first reg
3177 against zero... */
3178 if (p->is_const)
3179 break;
3182 for (; p; p = p->next_same_value)
3184 enum machine_mode inner_mode = GET_MODE (p->exp);
3186 /* If the entry isn't valid, skip it. */
3187 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3188 continue;
3190 if (GET_CODE (p->exp) == COMPARE
3191 /* Another possibility is that this machine has a compare insn
3192 that includes the comparison code. In that case, ARG1 would
3193 be equivalent to a comparison operation that would set ARG1 to
3194 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3195 ORIG_CODE is the actual comparison being done; if it is an EQ,
3196 we must reverse ORIG_CODE. On machine with a negative value
3197 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3198 || ((code == NE
3199 || (code == LT
3200 && GET_MODE_CLASS (inner_mode) == MODE_INT
3201 && (GET_MODE_BITSIZE (inner_mode)
3202 <= HOST_BITS_PER_WIDE_INT)
3203 && (STORE_FLAG_VALUE
3204 & ((HOST_WIDE_INT) 1
3205 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3206 #ifdef FLOAT_STORE_FLAG_VALUE
3207 || (code == LT
3208 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3209 && (REAL_VALUE_NEGATIVE
3210 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3211 #endif
3213 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3215 x = p->exp;
3216 break;
3218 else if ((code == EQ
3219 || (code == GE
3220 && GET_MODE_CLASS (inner_mode) == MODE_INT
3221 && (GET_MODE_BITSIZE (inner_mode)
3222 <= HOST_BITS_PER_WIDE_INT)
3223 && (STORE_FLAG_VALUE
3224 & ((HOST_WIDE_INT) 1
3225 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3226 #ifdef FLOAT_STORE_FLAG_VALUE
3227 || (code == GE
3228 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3229 && (REAL_VALUE_NEGATIVE
3230 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3231 #endif
3233 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3235 reverse_code = 1;
3236 x = p->exp;
3237 break;
3240 /* If this is fp + constant, the equivalent is a better operand since
3241 it may let us predict the value of the comparison. */
3242 else if (NONZERO_BASE_PLUS_P (p->exp))
3244 arg1 = p->exp;
3245 continue;
3249 /* If we didn't find a useful equivalence for ARG1, we are done.
3250 Otherwise, set up for the next iteration. */
3251 if (x == 0)
3252 break;
3254 /* If we need to reverse the comparison, make sure that that is
3255 possible -- we can't necessarily infer the value of GE from LT
3256 with floating-point operands. */
3257 if (reverse_code)
3259 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3260 if (reversed == UNKNOWN)
3261 break;
3262 else code = reversed;
3264 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3265 code = GET_CODE (x);
3266 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3269 /* Return our results. Return the modes from before fold_rtx
3270 because fold_rtx might produce const_int, and then it's too late. */
3271 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3272 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3274 return code;
3277 /* If X is a nontrivial arithmetic operation on an argument
3278 for which a constant value can be determined, return
3279 the result of operating on that value, as a constant.
3280 Otherwise, return X, possibly with one or more operands
3281 modified by recursive calls to this function.
3283 If X is a register whose contents are known, we do NOT
3284 return those contents here. equiv_constant is called to
3285 perform that task.
3287 INSN is the insn that we may be modifying. If it is 0, make a copy
3288 of X before modifying it. */
3290 static rtx
3291 fold_rtx (x, insn)
3292 rtx x;
3293 rtx insn;
3295 register enum rtx_code code;
3296 register enum machine_mode mode;
3297 register const char *fmt;
3298 register int i;
3299 rtx new = 0;
3300 int copied = 0;
3301 int must_swap = 0;
3303 /* Folded equivalents of first two operands of X. */
3304 rtx folded_arg0;
3305 rtx folded_arg1;
3307 /* Constant equivalents of first three operands of X;
3308 0 when no such equivalent is known. */
3309 rtx const_arg0;
3310 rtx const_arg1;
3311 rtx const_arg2;
3313 /* The mode of the first operand of X. We need this for sign and zero
3314 extends. */
3315 enum machine_mode mode_arg0;
3317 if (x == 0)
3318 return x;
3320 mode = GET_MODE (x);
3321 code = GET_CODE (x);
3322 switch (code)
3324 case CONST:
3325 case CONST_INT:
3326 case CONST_DOUBLE:
3327 case SYMBOL_REF:
3328 case LABEL_REF:
3329 case REG:
3330 /* No use simplifying an EXPR_LIST
3331 since they are used only for lists of args
3332 in a function call's REG_EQUAL note. */
3333 case EXPR_LIST:
3334 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3335 want to (e.g.,) make (addressof (const_int 0)) just because
3336 the location is known to be zero. */
3337 case ADDRESSOF:
3338 return x;
3340 #ifdef HAVE_cc0
3341 case CC0:
3342 return prev_insn_cc0;
3343 #endif
3345 case PC:
3346 /* If the next insn is a CODE_LABEL followed by a jump table,
3347 PC's value is a LABEL_REF pointing to that label. That
3348 lets us fold switch statements on the Vax. */
3349 if (insn && GET_CODE (insn) == JUMP_INSN)
3351 rtx next = next_nonnote_insn (insn);
3353 if (next && GET_CODE (next) == CODE_LABEL
3354 && NEXT_INSN (next) != 0
3355 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3356 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3357 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3358 return gen_rtx_LABEL_REF (Pmode, next);
3360 break;
3362 case SUBREG:
3363 /* See if we previously assigned a constant value to this SUBREG. */
3364 if ((new = lookup_as_function (x, CONST_INT)) != 0
3365 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3366 return new;
3368 /* If this is a paradoxical SUBREG, we have no idea what value the
3369 extra bits would have. However, if the operand is equivalent
3370 to a SUBREG whose operand is the same as our mode, and all the
3371 modes are within a word, we can just use the inner operand
3372 because these SUBREGs just say how to treat the register.
3374 Similarly if we find an integer constant. */
3376 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3378 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3379 struct table_elt *elt;
3381 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3382 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3383 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3384 imode)) != 0)
3385 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3387 if (CONSTANT_P (elt->exp)
3388 && GET_MODE (elt->exp) == VOIDmode)
3389 return elt->exp;
3391 if (GET_CODE (elt->exp) == SUBREG
3392 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3393 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3394 return copy_rtx (SUBREG_REG (elt->exp));
3397 return x;
3400 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3401 We might be able to if the SUBREG is extracting a single word in an
3402 integral mode or extracting the low part. */
3404 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3405 const_arg0 = equiv_constant (folded_arg0);
3406 if (const_arg0)
3407 folded_arg0 = const_arg0;
3409 if (folded_arg0 != SUBREG_REG (x))
3411 new = simplify_subreg (mode, folded_arg0,
3412 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3413 if (new)
3414 return new;
3417 /* If this is a narrowing SUBREG and our operand is a REG, see if
3418 we can find an equivalence for REG that is an arithmetic operation
3419 in a wider mode where both operands are paradoxical SUBREGs
3420 from objects of our result mode. In that case, we couldn't report
3421 an equivalent value for that operation, since we don't know what the
3422 extra bits will be. But we can find an equivalence for this SUBREG
3423 by folding that operation is the narrow mode. This allows us to
3424 fold arithmetic in narrow modes when the machine only supports
3425 word-sized arithmetic.
3427 Also look for a case where we have a SUBREG whose operand is the
3428 same as our result. If both modes are smaller than a word, we
3429 are simply interpreting a register in different modes and we
3430 can use the inner value. */
3432 if (GET_CODE (folded_arg0) == REG
3433 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3434 && subreg_lowpart_p (x))
3436 struct table_elt *elt;
3438 /* We can use HASH here since we know that canon_hash won't be
3439 called. */
3440 elt = lookup (folded_arg0,
3441 HASH (folded_arg0, GET_MODE (folded_arg0)),
3442 GET_MODE (folded_arg0));
3444 if (elt)
3445 elt = elt->first_same_value;
3447 for (; elt; elt = elt->next_same_value)
3449 enum rtx_code eltcode = GET_CODE (elt->exp);
3451 /* Just check for unary and binary operations. */
3452 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3453 && GET_CODE (elt->exp) != SIGN_EXTEND
3454 && GET_CODE (elt->exp) != ZERO_EXTEND
3455 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3456 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3458 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3460 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3461 op0 = fold_rtx (op0, NULL_RTX);
3463 op0 = equiv_constant (op0);
3464 if (op0)
3465 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3466 op0, mode);
3468 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3469 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3470 && eltcode != DIV && eltcode != MOD
3471 && eltcode != UDIV && eltcode != UMOD
3472 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3473 && eltcode != ROTATE && eltcode != ROTATERT
3474 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3475 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3476 == mode))
3477 || CONSTANT_P (XEXP (elt->exp, 0)))
3478 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3479 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3480 == mode))
3481 || CONSTANT_P (XEXP (elt->exp, 1))))
3483 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3484 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3486 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3487 op0 = fold_rtx (op0, NULL_RTX);
3489 if (op0)
3490 op0 = equiv_constant (op0);
3492 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3493 op1 = fold_rtx (op1, NULL_RTX);
3495 if (op1)
3496 op1 = equiv_constant (op1);
3498 /* If we are looking for the low SImode part of
3499 (ashift:DI c (const_int 32)), it doesn't work
3500 to compute that in SImode, because a 32-bit shift
3501 in SImode is unpredictable. We know the value is 0. */
3502 if (op0 && op1
3503 && GET_CODE (elt->exp) == ASHIFT
3504 && GET_CODE (op1) == CONST_INT
3505 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3507 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3509 /* If the count fits in the inner mode's width,
3510 but exceeds the outer mode's width,
3511 the value will get truncated to 0
3512 by the subreg. */
3513 new = const0_rtx;
3514 else
3515 /* If the count exceeds even the inner mode's width,
3516 don't fold this expression. */
3517 new = 0;
3519 else if (op0 && op1)
3520 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3521 op0, op1);
3524 else if (GET_CODE (elt->exp) == SUBREG
3525 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3526 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3527 <= UNITS_PER_WORD)
3528 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3529 new = copy_rtx (SUBREG_REG (elt->exp));
3531 if (new)
3532 return new;
3536 return x;
3538 case NOT:
3539 case NEG:
3540 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3541 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3542 new = lookup_as_function (XEXP (x, 0), code);
3543 if (new)
3544 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3545 break;
3547 case MEM:
3548 /* If we are not actually processing an insn, don't try to find the
3549 best address. Not only don't we care, but we could modify the
3550 MEM in an invalid way since we have no insn to validate against. */
3551 if (insn != 0)
3552 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3555 /* Even if we don't fold in the insn itself,
3556 we can safely do so here, in hopes of getting a constant. */
3557 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3558 rtx base = 0;
3559 HOST_WIDE_INT offset = 0;
3561 if (GET_CODE (addr) == REG
3562 && REGNO_QTY_VALID_P (REGNO (addr)))
3564 int addr_q = REG_QTY (REGNO (addr));
3565 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3567 if (GET_MODE (addr) == addr_ent->mode
3568 && addr_ent->const_rtx != NULL_RTX)
3569 addr = addr_ent->const_rtx;
3572 /* If address is constant, split it into a base and integer offset. */
3573 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3574 base = addr;
3575 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3576 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3578 base = XEXP (XEXP (addr, 0), 0);
3579 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3581 else if (GET_CODE (addr) == LO_SUM
3582 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3583 base = XEXP (addr, 1);
3584 else if (GET_CODE (addr) == ADDRESSOF)
3585 return change_address (x, VOIDmode, addr);
3587 /* If this is a constant pool reference, we can fold it into its
3588 constant to allow better value tracking. */
3589 if (base && GET_CODE (base) == SYMBOL_REF
3590 && CONSTANT_POOL_ADDRESS_P (base))
3592 rtx constant = get_pool_constant (base);
3593 enum machine_mode const_mode = get_pool_mode (base);
3594 rtx new;
3596 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3597 constant_pool_entries_cost = COST (constant);
3599 /* If we are loading the full constant, we have an equivalence. */
3600 if (offset == 0 && mode == const_mode)
3601 return constant;
3603 /* If this actually isn't a constant (weird!), we can't do
3604 anything. Otherwise, handle the two most common cases:
3605 extracting a word from a multi-word constant, and extracting
3606 the low-order bits. Other cases don't seem common enough to
3607 worry about. */
3608 if (! CONSTANT_P (constant))
3609 return x;
3611 if (GET_MODE_CLASS (mode) == MODE_INT
3612 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3613 && offset % UNITS_PER_WORD == 0
3614 && (new = operand_subword (constant,
3615 offset / UNITS_PER_WORD,
3616 0, const_mode)) != 0)
3617 return new;
3619 if (((BYTES_BIG_ENDIAN
3620 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3621 || (! BYTES_BIG_ENDIAN && offset == 0))
3622 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3623 return new;
3626 /* If this is a reference to a label at a known position in a jump
3627 table, we also know its value. */
3628 if (base && GET_CODE (base) == LABEL_REF)
3630 rtx label = XEXP (base, 0);
3631 rtx table_insn = NEXT_INSN (label);
3633 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3634 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3636 rtx table = PATTERN (table_insn);
3638 if (offset >= 0
3639 && (offset / GET_MODE_SIZE (GET_MODE (table))
3640 < XVECLEN (table, 0)))
3641 return XVECEXP (table, 0,
3642 offset / GET_MODE_SIZE (GET_MODE (table)));
3644 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3645 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3647 rtx table = PATTERN (table_insn);
3649 if (offset >= 0
3650 && (offset / GET_MODE_SIZE (GET_MODE (table))
3651 < XVECLEN (table, 1)))
3653 offset /= GET_MODE_SIZE (GET_MODE (table));
3654 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3655 XEXP (table, 0));
3657 if (GET_MODE (table) != Pmode)
3658 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3660 /* Indicate this is a constant. This isn't a
3661 valid form of CONST, but it will only be used
3662 to fold the next insns and then discarded, so
3663 it should be safe.
3665 Note this expression must be explicitly discarded,
3666 by cse_insn, else it may end up in a REG_EQUAL note
3667 and "escape" to cause problems elsewhere. */
3668 return gen_rtx_CONST (GET_MODE (new), new);
3673 return x;
3676 #ifdef NO_FUNCTION_CSE
3677 case CALL:
3678 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3679 return x;
3680 break;
3681 #endif
3683 case ASM_OPERANDS:
3684 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3685 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3686 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3687 break;
3689 default:
3690 break;
3693 const_arg0 = 0;
3694 const_arg1 = 0;
3695 const_arg2 = 0;
3696 mode_arg0 = VOIDmode;
3698 /* Try folding our operands.
3699 Then see which ones have constant values known. */
3701 fmt = GET_RTX_FORMAT (code);
3702 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3703 if (fmt[i] == 'e')
3705 rtx arg = XEXP (x, i);
3706 rtx folded_arg = arg, const_arg = 0;
3707 enum machine_mode mode_arg = GET_MODE (arg);
3708 rtx cheap_arg, expensive_arg;
3709 rtx replacements[2];
3710 int j;
3712 /* Most arguments are cheap, so handle them specially. */
3713 switch (GET_CODE (arg))
3715 case REG:
3716 /* This is the same as calling equiv_constant; it is duplicated
3717 here for speed. */
3718 if (REGNO_QTY_VALID_P (REGNO (arg)))
3720 int arg_q = REG_QTY (REGNO (arg));
3721 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3723 if (arg_ent->const_rtx != NULL_RTX
3724 && GET_CODE (arg_ent->const_rtx) != REG
3725 && GET_CODE (arg_ent->const_rtx) != PLUS)
3726 const_arg
3727 = gen_lowpart_if_possible (GET_MODE (arg),
3728 arg_ent->const_rtx);
3730 break;
3732 case CONST:
3733 case CONST_INT:
3734 case SYMBOL_REF:
3735 case LABEL_REF:
3736 case CONST_DOUBLE:
3737 const_arg = arg;
3738 break;
3740 #ifdef HAVE_cc0
3741 case CC0:
3742 folded_arg = prev_insn_cc0;
3743 mode_arg = prev_insn_cc0_mode;
3744 const_arg = equiv_constant (folded_arg);
3745 break;
3746 #endif
3748 default:
3749 folded_arg = fold_rtx (arg, insn);
3750 const_arg = equiv_constant (folded_arg);
3753 /* For the first three operands, see if the operand
3754 is constant or equivalent to a constant. */
3755 switch (i)
3757 case 0:
3758 folded_arg0 = folded_arg;
3759 const_arg0 = const_arg;
3760 mode_arg0 = mode_arg;
3761 break;
3762 case 1:
3763 folded_arg1 = folded_arg;
3764 const_arg1 = const_arg;
3765 break;
3766 case 2:
3767 const_arg2 = const_arg;
3768 break;
3771 /* Pick the least expensive of the folded argument and an
3772 equivalent constant argument. */
3773 if (const_arg == 0 || const_arg == folded_arg
3774 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3775 cheap_arg = folded_arg, expensive_arg = const_arg;
3776 else
3777 cheap_arg = const_arg, expensive_arg = folded_arg;
3779 /* Try to replace the operand with the cheapest of the two
3780 possibilities. If it doesn't work and this is either of the first
3781 two operands of a commutative operation, try swapping them.
3782 If THAT fails, try the more expensive, provided it is cheaper
3783 than what is already there. */
3785 if (cheap_arg == XEXP (x, i))
3786 continue;
3788 if (insn == 0 && ! copied)
3790 x = copy_rtx (x);
3791 copied = 1;
3794 /* Order the replacements from cheapest to most expensive. */
3795 replacements[0] = cheap_arg;
3796 replacements[1] = expensive_arg;
3798 for (j = 0; j < 2 && replacements[j]; j++)
3800 int old_cost = COST_IN (XEXP (x, i), code);
3801 int new_cost = COST_IN (replacements[j], code);
3803 /* Stop if what existed before was cheaper. Prefer constants
3804 in the case of a tie. */
3805 if (new_cost > old_cost
3806 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3807 break;
3809 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3810 break;
3812 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3813 || code == LTGT || code == UNEQ || code == ORDERED
3814 || code == UNORDERED)
3816 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3817 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3819 if (apply_change_group ())
3821 /* Swap them back to be invalid so that this loop can
3822 continue and flag them to be swapped back later. */
3823 rtx tem;
3825 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3826 XEXP (x, 1) = tem;
3827 must_swap = 1;
3828 break;
3834 else
3836 if (fmt[i] == 'E')
3837 /* Don't try to fold inside of a vector of expressions.
3838 Doing nothing is harmless. */
3842 /* If a commutative operation, place a constant integer as the second
3843 operand unless the first operand is also a constant integer. Otherwise,
3844 place any constant second unless the first operand is also a constant. */
3846 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3847 || code == LTGT || code == UNEQ || code == ORDERED
3848 || code == UNORDERED)
3850 if (must_swap || (const_arg0
3851 && (const_arg1 == 0
3852 || (GET_CODE (const_arg0) == CONST_INT
3853 && GET_CODE (const_arg1) != CONST_INT))))
3855 register rtx tem = XEXP (x, 0);
3857 if (insn == 0 && ! copied)
3859 x = copy_rtx (x);
3860 copied = 1;
3863 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3864 validate_change (insn, &XEXP (x, 1), tem, 1);
3865 if (apply_change_group ())
3867 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3868 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3873 /* If X is an arithmetic operation, see if we can simplify it. */
3875 switch (GET_RTX_CLASS (code))
3877 case '1':
3879 int is_const = 0;
3881 /* We can't simplify extension ops unless we know the
3882 original mode. */
3883 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3884 && mode_arg0 == VOIDmode)
3885 break;
3887 /* If we had a CONST, strip it off and put it back later if we
3888 fold. */
3889 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3890 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3892 new = simplify_unary_operation (code, mode,
3893 const_arg0 ? const_arg0 : folded_arg0,
3894 mode_arg0);
3895 if (new != 0 && is_const)
3896 new = gen_rtx_CONST (mode, new);
3898 break;
3900 case '<':
3901 /* See what items are actually being compared and set FOLDED_ARG[01]
3902 to those values and CODE to the actual comparison code. If any are
3903 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3904 do anything if both operands are already known to be constant. */
3906 if (const_arg0 == 0 || const_arg1 == 0)
3908 struct table_elt *p0, *p1;
3909 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3910 enum machine_mode mode_arg1;
3912 #ifdef FLOAT_STORE_FLAG_VALUE
3913 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3915 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3916 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3917 false_rtx = CONST0_RTX (mode);
3919 #endif
3921 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3922 &mode_arg0, &mode_arg1);
3923 const_arg0 = equiv_constant (folded_arg0);
3924 const_arg1 = equiv_constant (folded_arg1);
3926 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3927 what kinds of things are being compared, so we can't do
3928 anything with this comparison. */
3930 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3931 break;
3933 /* If we do not now have two constants being compared, see
3934 if we can nevertheless deduce some things about the
3935 comparison. */
3936 if (const_arg0 == 0 || const_arg1 == 0)
3938 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3939 non-explicit constant? These aren't zero, but we
3940 don't know their sign. */
3941 if (const_arg1 == const0_rtx
3942 && (NONZERO_BASE_PLUS_P (folded_arg0)
3943 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3944 come out as 0. */
3945 || GET_CODE (folded_arg0) == SYMBOL_REF
3946 #endif
3947 || GET_CODE (folded_arg0) == LABEL_REF
3948 || GET_CODE (folded_arg0) == CONST))
3950 if (code == EQ)
3951 return false_rtx;
3952 else if (code == NE)
3953 return true_rtx;
3956 /* See if the two operands are the same. */
3958 if (folded_arg0 == folded_arg1
3959 || (GET_CODE (folded_arg0) == REG
3960 && GET_CODE (folded_arg1) == REG
3961 && (REG_QTY (REGNO (folded_arg0))
3962 == REG_QTY (REGNO (folded_arg1))))
3963 || ((p0 = lookup (folded_arg0,
3964 (safe_hash (folded_arg0, mode_arg0)
3965 & HASH_MASK), mode_arg0))
3966 && (p1 = lookup (folded_arg1,
3967 (safe_hash (folded_arg1, mode_arg0)
3968 & HASH_MASK), mode_arg0))
3969 && p0->first_same_value == p1->first_same_value))
3971 /* Sadly two equal NaNs are not equivalent. */
3972 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3973 || ! FLOAT_MODE_P (mode_arg0)
3974 || flag_unsafe_math_optimizations)
3975 return ((code == EQ || code == LE || code == GE
3976 || code == LEU || code == GEU || code == UNEQ
3977 || code == UNLE || code == UNGE || code == ORDERED)
3978 ? true_rtx : false_rtx);
3979 /* Take care for the FP compares we can resolve. */
3980 if (code == UNEQ || code == UNLE || code == UNGE)
3981 return true_rtx;
3982 if (code == LTGT || code == LT || code == GT)
3983 return false_rtx;
3986 /* If FOLDED_ARG0 is a register, see if the comparison we are
3987 doing now is either the same as we did before or the reverse
3988 (we only check the reverse if not floating-point). */
3989 else if (GET_CODE (folded_arg0) == REG)
3991 int qty = REG_QTY (REGNO (folded_arg0));
3993 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3995 struct qty_table_elem *ent = &qty_table[qty];
3997 if ((comparison_dominates_p (ent->comparison_code, code)
3998 || (! FLOAT_MODE_P (mode_arg0)
3999 && comparison_dominates_p (ent->comparison_code,
4000 reverse_condition (code))))
4001 && (rtx_equal_p (ent->comparison_const, folded_arg1)
4002 || (const_arg1
4003 && rtx_equal_p (ent->comparison_const,
4004 const_arg1))
4005 || (GET_CODE (folded_arg1) == REG
4006 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
4007 return (comparison_dominates_p (ent->comparison_code, code)
4008 ? true_rtx : false_rtx);
4014 /* If we are comparing against zero, see if the first operand is
4015 equivalent to an IOR with a constant. If so, we may be able to
4016 determine the result of this comparison. */
4018 if (const_arg1 == const0_rtx)
4020 rtx y = lookup_as_function (folded_arg0, IOR);
4021 rtx inner_const;
4023 if (y != 0
4024 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4025 && GET_CODE (inner_const) == CONST_INT
4026 && INTVAL (inner_const) != 0)
4028 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4029 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4030 && (INTVAL (inner_const)
4031 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4032 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
4034 #ifdef FLOAT_STORE_FLAG_VALUE
4035 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4037 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
4038 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4039 false_rtx = CONST0_RTX (mode);
4041 #endif
4043 switch (code)
4045 case EQ:
4046 return false_rtx;
4047 case NE:
4048 return true_rtx;
4049 case LT: case LE:
4050 if (has_sign)
4051 return true_rtx;
4052 break;
4053 case GT: case GE:
4054 if (has_sign)
4055 return false_rtx;
4056 break;
4057 default:
4058 break;
4063 new = simplify_relational_operation (code,
4064 (mode_arg0 != VOIDmode
4065 ? mode_arg0
4066 : (GET_MODE (const_arg0
4067 ? const_arg0
4068 : folded_arg0)
4069 != VOIDmode)
4070 ? GET_MODE (const_arg0
4071 ? const_arg0
4072 : folded_arg0)
4073 : GET_MODE (const_arg1
4074 ? const_arg1
4075 : folded_arg1)),
4076 const_arg0 ? const_arg0 : folded_arg0,
4077 const_arg1 ? const_arg1 : folded_arg1);
4078 #ifdef FLOAT_STORE_FLAG_VALUE
4079 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4081 if (new == const0_rtx)
4082 new = CONST0_RTX (mode);
4083 else
4084 new = (CONST_DOUBLE_FROM_REAL_VALUE
4085 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4087 #endif
4088 break;
4090 case '2':
4091 case 'c':
4092 switch (code)
4094 case PLUS:
4095 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4096 with that LABEL_REF as its second operand. If so, the result is
4097 the first operand of that MINUS. This handles switches with an
4098 ADDR_DIFF_VEC table. */
4099 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4101 rtx y
4102 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4103 : lookup_as_function (folded_arg0, MINUS);
4105 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4106 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4107 return XEXP (y, 0);
4109 /* Now try for a CONST of a MINUS like the above. */
4110 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4111 : lookup_as_function (folded_arg0, CONST))) != 0
4112 && GET_CODE (XEXP (y, 0)) == MINUS
4113 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4114 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4115 return XEXP (XEXP (y, 0), 0);
4118 /* Likewise if the operands are in the other order. */
4119 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4121 rtx y
4122 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4123 : lookup_as_function (folded_arg1, MINUS);
4125 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4126 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4127 return XEXP (y, 0);
4129 /* Now try for a CONST of a MINUS like the above. */
4130 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4131 : lookup_as_function (folded_arg1, CONST))) != 0
4132 && GET_CODE (XEXP (y, 0)) == MINUS
4133 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4134 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4135 return XEXP (XEXP (y, 0), 0);
4138 /* If second operand is a register equivalent to a negative
4139 CONST_INT, see if we can find a register equivalent to the
4140 positive constant. Make a MINUS if so. Don't do this for
4141 a non-negative constant since we might then alternate between
4142 chosing positive and negative constants. Having the positive
4143 constant previously-used is the more common case. Be sure
4144 the resulting constant is non-negative; if const_arg1 were
4145 the smallest negative number this would overflow: depending
4146 on the mode, this would either just be the same value (and
4147 hence not save anything) or be incorrect. */
4148 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4149 && INTVAL (const_arg1) < 0
4150 /* This used to test
4152 -INTVAL (const_arg1) >= 0
4154 But The Sun V5.0 compilers mis-compiled that test. So
4155 instead we test for the problematic value in a more direct
4156 manner and hope the Sun compilers get it correct. */
4157 && INTVAL (const_arg1) !=
4158 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4159 && GET_CODE (folded_arg1) == REG)
4161 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4162 struct table_elt *p
4163 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4164 mode);
4166 if (p)
4167 for (p = p->first_same_value; p; p = p->next_same_value)
4168 if (GET_CODE (p->exp) == REG)
4169 return simplify_gen_binary (MINUS, mode, folded_arg0,
4170 canon_reg (p->exp, NULL_RTX));
4172 goto from_plus;
4174 case MINUS:
4175 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4176 If so, produce (PLUS Z C2-C). */
4177 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4179 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4180 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4181 return fold_rtx (plus_constant (copy_rtx (y),
4182 -INTVAL (const_arg1)),
4183 NULL_RTX);
4186 /* Fall through. */
4188 from_plus:
4189 case SMIN: case SMAX: case UMIN: case UMAX:
4190 case IOR: case AND: case XOR:
4191 case MULT: case DIV: case UDIV:
4192 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4193 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4194 is known to be of similar form, we may be able to replace the
4195 operation with a combined operation. This may eliminate the
4196 intermediate operation if every use is simplified in this way.
4197 Note that the similar optimization done by combine.c only works
4198 if the intermediate operation's result has only one reference. */
4200 if (GET_CODE (folded_arg0) == REG
4201 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4203 int is_shift
4204 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4205 rtx y = lookup_as_function (folded_arg0, code);
4206 rtx inner_const;
4207 enum rtx_code associate_code;
4208 rtx new_const;
4210 if (y == 0
4211 || 0 == (inner_const
4212 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4213 || GET_CODE (inner_const) != CONST_INT
4214 /* If we have compiled a statement like
4215 "if (x == (x & mask1))", and now are looking at
4216 "x & mask2", we will have a case where the first operand
4217 of Y is the same as our first operand. Unless we detect
4218 this case, an infinite loop will result. */
4219 || XEXP (y, 0) == folded_arg0)
4220 break;
4222 /* Don't associate these operations if they are a PLUS with the
4223 same constant and it is a power of two. These might be doable
4224 with a pre- or post-increment. Similarly for two subtracts of
4225 identical powers of two with post decrement. */
4227 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4228 && ((HAVE_PRE_INCREMENT
4229 && exact_log2 (INTVAL (const_arg1)) >= 0)
4230 || (HAVE_POST_INCREMENT
4231 && exact_log2 (INTVAL (const_arg1)) >= 0)
4232 || (HAVE_PRE_DECREMENT
4233 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4234 || (HAVE_POST_DECREMENT
4235 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4236 break;
4238 /* Compute the code used to compose the constants. For example,
4239 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4241 associate_code
4242 = (code == MULT || code == DIV || code == UDIV ? MULT
4243 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4245 new_const = simplify_binary_operation (associate_code, mode,
4246 const_arg1, inner_const);
4248 if (new_const == 0)
4249 break;
4251 /* If we are associating shift operations, don't let this
4252 produce a shift of the size of the object or larger.
4253 This could occur when we follow a sign-extend by a right
4254 shift on a machine that does a sign-extend as a pair
4255 of shifts. */
4257 if (is_shift && GET_CODE (new_const) == CONST_INT
4258 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4260 /* As an exception, we can turn an ASHIFTRT of this
4261 form into a shift of the number of bits - 1. */
4262 if (code == ASHIFTRT)
4263 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4264 else
4265 break;
4268 y = copy_rtx (XEXP (y, 0));
4270 /* If Y contains our first operand (the most common way this
4271 can happen is if Y is a MEM), we would do into an infinite
4272 loop if we tried to fold it. So don't in that case. */
4274 if (! reg_mentioned_p (folded_arg0, y))
4275 y = fold_rtx (y, insn);
4277 return simplify_gen_binary (code, mode, y, new_const);
4279 break;
4281 default:
4282 break;
4285 new = simplify_binary_operation (code, mode,
4286 const_arg0 ? const_arg0 : folded_arg0,
4287 const_arg1 ? const_arg1 : folded_arg1);
4288 break;
4290 case 'o':
4291 /* (lo_sum (high X) X) is simply X. */
4292 if (code == LO_SUM && const_arg0 != 0
4293 && GET_CODE (const_arg0) == HIGH
4294 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4295 return const_arg1;
4296 break;
4298 case '3':
4299 case 'b':
4300 new = simplify_ternary_operation (code, mode, mode_arg0,
4301 const_arg0 ? const_arg0 : folded_arg0,
4302 const_arg1 ? const_arg1 : folded_arg1,
4303 const_arg2 ? const_arg2 : XEXP (x, 2));
4304 break;
4306 case 'x':
4307 /* Always eliminate CONSTANT_P_RTX at this stage. */
4308 if (code == CONSTANT_P_RTX)
4309 return (const_arg0 ? const1_rtx : const0_rtx);
4310 break;
4313 return new ? new : x;
4316 /* Return a constant value currently equivalent to X.
4317 Return 0 if we don't know one. */
4319 static rtx
4320 equiv_constant (x)
4321 rtx x;
4323 if (GET_CODE (x) == REG
4324 && REGNO_QTY_VALID_P (REGNO (x)))
4326 int x_q = REG_QTY (REGNO (x));
4327 struct qty_table_elem *x_ent = &qty_table[x_q];
4329 if (x_ent->const_rtx)
4330 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4333 if (x == 0 || CONSTANT_P (x))
4334 return x;
4336 /* If X is a MEM, try to fold it outside the context of any insn to see if
4337 it might be equivalent to a constant. That handles the case where it
4338 is a constant-pool reference. Then try to look it up in the hash table
4339 in case it is something whose value we have seen before. */
4341 if (GET_CODE (x) == MEM)
4343 struct table_elt *elt;
4345 x = fold_rtx (x, NULL_RTX);
4346 if (CONSTANT_P (x))
4347 return x;
4349 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4350 if (elt == 0)
4351 return 0;
4353 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4354 if (elt->is_const && CONSTANT_P (elt->exp))
4355 return elt->exp;
4358 return 0;
4361 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4362 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4363 least-significant part of X.
4364 MODE specifies how big a part of X to return.
4366 If the requested operation cannot be done, 0 is returned.
4368 This is similar to gen_lowpart in emit-rtl.c. */
4371 gen_lowpart_if_possible (mode, x)
4372 enum machine_mode mode;
4373 register rtx x;
4375 rtx result = gen_lowpart_common (mode, x);
4377 if (result)
4378 return result;
4379 else if (GET_CODE (x) == MEM)
4381 /* This is the only other case we handle. */
4382 register int offset = 0;
4383 rtx new;
4385 if (WORDS_BIG_ENDIAN)
4386 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4387 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4388 if (BYTES_BIG_ENDIAN)
4390 /* Adjust the address so that the address-after-the-data is
4391 unchanged. */
4392 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4393 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4395 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4396 if (! memory_address_p (mode, XEXP (new, 0)))
4397 return 0;
4398 MEM_COPY_ATTRIBUTES (new, x);
4399 return new;
4401 else
4402 return 0;
4405 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4406 branch. It will be zero if not.
4408 In certain cases, this can cause us to add an equivalence. For example,
4409 if we are following the taken case of
4410 if (i == 2)
4411 we can add the fact that `i' and '2' are now equivalent.
4413 In any case, we can record that this comparison was passed. If the same
4414 comparison is seen later, we will know its value. */
4416 static void
4417 record_jump_equiv (insn, taken)
4418 rtx insn;
4419 int taken;
4421 int cond_known_true;
4422 rtx op0, op1;
4423 rtx set;
4424 enum machine_mode mode, mode0, mode1;
4425 int reversed_nonequality = 0;
4426 enum rtx_code code;
4428 /* Ensure this is the right kind of insn. */
4429 if (! any_condjump_p (insn))
4430 return;
4431 set = pc_set (insn);
4433 /* See if this jump condition is known true or false. */
4434 if (taken)
4435 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4436 else
4437 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4439 /* Get the type of comparison being done and the operands being compared.
4440 If we had to reverse a non-equality condition, record that fact so we
4441 know that it isn't valid for floating-point. */
4442 code = GET_CODE (XEXP (SET_SRC (set), 0));
4443 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4444 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4446 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4447 if (! cond_known_true)
4449 code = reversed_comparison_code_parts (code, op0, op1, insn);
4451 /* Don't remember if we can't find the inverse. */
4452 if (code == UNKNOWN)
4453 return;
4456 /* The mode is the mode of the non-constant. */
4457 mode = mode0;
4458 if (mode1 != VOIDmode)
4459 mode = mode1;
4461 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4464 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4465 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4466 Make any useful entries we can with that information. Called from
4467 above function and called recursively. */
4469 static void
4470 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4471 enum rtx_code code;
4472 enum machine_mode mode;
4473 rtx op0, op1;
4474 int reversed_nonequality;
4476 unsigned op0_hash, op1_hash;
4477 int op0_in_memory, op1_in_memory;
4478 struct table_elt *op0_elt, *op1_elt;
4480 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4481 we know that they are also equal in the smaller mode (this is also
4482 true for all smaller modes whether or not there is a SUBREG, but
4483 is not worth testing for with no SUBREG). */
4485 /* Note that GET_MODE (op0) may not equal MODE. */
4486 if (code == EQ && GET_CODE (op0) == SUBREG
4487 && (GET_MODE_SIZE (GET_MODE (op0))
4488 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4490 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4491 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4493 record_jump_cond (code, mode, SUBREG_REG (op0),
4494 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4495 reversed_nonequality);
4498 if (code == EQ && GET_CODE (op1) == SUBREG
4499 && (GET_MODE_SIZE (GET_MODE (op1))
4500 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4502 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4503 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4505 record_jump_cond (code, mode, SUBREG_REG (op1),
4506 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4507 reversed_nonequality);
4510 /* Similarly, if this is an NE comparison, and either is a SUBREG
4511 making a smaller mode, we know the whole thing is also NE. */
4513 /* Note that GET_MODE (op0) may not equal MODE;
4514 if we test MODE instead, we can get an infinite recursion
4515 alternating between two modes each wider than MODE. */
4517 if (code == NE && GET_CODE (op0) == SUBREG
4518 && subreg_lowpart_p (op0)
4519 && (GET_MODE_SIZE (GET_MODE (op0))
4520 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4522 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4523 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4525 record_jump_cond (code, mode, SUBREG_REG (op0),
4526 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4527 reversed_nonequality);
4530 if (code == NE && GET_CODE (op1) == SUBREG
4531 && subreg_lowpart_p (op1)
4532 && (GET_MODE_SIZE (GET_MODE (op1))
4533 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4535 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4536 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4538 record_jump_cond (code, mode, SUBREG_REG (op1),
4539 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4540 reversed_nonequality);
4543 /* Hash both operands. */
4545 do_not_record = 0;
4546 hash_arg_in_memory = 0;
4547 op0_hash = HASH (op0, mode);
4548 op0_in_memory = hash_arg_in_memory;
4550 if (do_not_record)
4551 return;
4553 do_not_record = 0;
4554 hash_arg_in_memory = 0;
4555 op1_hash = HASH (op1, mode);
4556 op1_in_memory = hash_arg_in_memory;
4558 if (do_not_record)
4559 return;
4561 /* Look up both operands. */
4562 op0_elt = lookup (op0, op0_hash, mode);
4563 op1_elt = lookup (op1, op1_hash, mode);
4565 /* If both operands are already equivalent or if they are not in the
4566 table but are identical, do nothing. */
4567 if ((op0_elt != 0 && op1_elt != 0
4568 && op0_elt->first_same_value == op1_elt->first_same_value)
4569 || op0 == op1 || rtx_equal_p (op0, op1))
4570 return;
4572 /* If we aren't setting two things equal all we can do is save this
4573 comparison. Similarly if this is floating-point. In the latter
4574 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4575 If we record the equality, we might inadvertently delete code
4576 whose intent was to change -0 to +0. */
4578 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4580 struct qty_table_elem *ent;
4581 int qty;
4583 /* If we reversed a floating-point comparison, if OP0 is not a
4584 register, or if OP1 is neither a register or constant, we can't
4585 do anything. */
4587 if (GET_CODE (op1) != REG)
4588 op1 = equiv_constant (op1);
4590 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4591 || GET_CODE (op0) != REG || op1 == 0)
4592 return;
4594 /* Put OP0 in the hash table if it isn't already. This gives it a
4595 new quantity number. */
4596 if (op0_elt == 0)
4598 if (insert_regs (op0, NULL, 0))
4600 rehash_using_reg (op0);
4601 op0_hash = HASH (op0, mode);
4603 /* If OP0 is contained in OP1, this changes its hash code
4604 as well. Faster to rehash than to check, except
4605 for the simple case of a constant. */
4606 if (! CONSTANT_P (op1))
4607 op1_hash = HASH (op1,mode);
4610 op0_elt = insert (op0, NULL, op0_hash, mode);
4611 op0_elt->in_memory = op0_in_memory;
4614 qty = REG_QTY (REGNO (op0));
4615 ent = &qty_table[qty];
4617 ent->comparison_code = code;
4618 if (GET_CODE (op1) == REG)
4620 /* Look it up again--in case op0 and op1 are the same. */
4621 op1_elt = lookup (op1, op1_hash, mode);
4623 /* Put OP1 in the hash table so it gets a new quantity number. */
4624 if (op1_elt == 0)
4626 if (insert_regs (op1, NULL, 0))
4628 rehash_using_reg (op1);
4629 op1_hash = HASH (op1, mode);
4632 op1_elt = insert (op1, NULL, op1_hash, mode);
4633 op1_elt->in_memory = op1_in_memory;
4636 ent->comparison_const = NULL_RTX;
4637 ent->comparison_qty = REG_QTY (REGNO (op1));
4639 else
4641 ent->comparison_const = op1;
4642 ent->comparison_qty = -1;
4645 return;
4648 /* If either side is still missing an equivalence, make it now,
4649 then merge the equivalences. */
4651 if (op0_elt == 0)
4653 if (insert_regs (op0, NULL, 0))
4655 rehash_using_reg (op0);
4656 op0_hash = HASH (op0, mode);
4659 op0_elt = insert (op0, NULL, op0_hash, mode);
4660 op0_elt->in_memory = op0_in_memory;
4663 if (op1_elt == 0)
4665 if (insert_regs (op1, NULL, 0))
4667 rehash_using_reg (op1);
4668 op1_hash = HASH (op1, mode);
4671 op1_elt = insert (op1, NULL, op1_hash, mode);
4672 op1_elt->in_memory = op1_in_memory;
4675 merge_equiv_classes (op0_elt, op1_elt);
4676 last_jump_equiv_class = op0_elt;
4679 /* CSE processing for one instruction.
4680 First simplify sources and addresses of all assignments
4681 in the instruction, using previously-computed equivalents values.
4682 Then install the new sources and destinations in the table
4683 of available values.
4685 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4686 the insn. It means that INSN is inside libcall block. In this
4687 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4689 /* Data on one SET contained in the instruction. */
4691 struct set
4693 /* The SET rtx itself. */
4694 rtx rtl;
4695 /* The SET_SRC of the rtx (the original value, if it is changing). */
4696 rtx src;
4697 /* The hash-table element for the SET_SRC of the SET. */
4698 struct table_elt *src_elt;
4699 /* Hash value for the SET_SRC. */
4700 unsigned src_hash;
4701 /* Hash value for the SET_DEST. */
4702 unsigned dest_hash;
4703 /* The SET_DEST, with SUBREG, etc., stripped. */
4704 rtx inner_dest;
4705 /* Nonzero if the SET_SRC is in memory. */
4706 char src_in_memory;
4707 /* Nonzero if the SET_SRC contains something
4708 whose value cannot be predicted and understood. */
4709 char src_volatile;
4710 /* Original machine mode, in case it becomes a CONST_INT. */
4711 enum machine_mode mode;
4712 /* A constant equivalent for SET_SRC, if any. */
4713 rtx src_const;
4714 /* Original SET_SRC value used for libcall notes. */
4715 rtx orig_src;
4716 /* Hash value of constant equivalent for SET_SRC. */
4717 unsigned src_const_hash;
4718 /* Table entry for constant equivalent for SET_SRC, if any. */
4719 struct table_elt *src_const_elt;
4722 static void
4723 cse_insn (insn, libcall_insn)
4724 rtx insn;
4725 rtx libcall_insn;
4727 register rtx x = PATTERN (insn);
4728 register int i;
4729 rtx tem;
4730 register int n_sets = 0;
4732 #ifdef HAVE_cc0
4733 /* Records what this insn does to set CC0. */
4734 rtx this_insn_cc0 = 0;
4735 enum machine_mode this_insn_cc0_mode = VOIDmode;
4736 #endif
4738 rtx src_eqv = 0;
4739 struct table_elt *src_eqv_elt = 0;
4740 int src_eqv_volatile = 0;
4741 int src_eqv_in_memory = 0;
4742 unsigned src_eqv_hash = 0;
4744 struct set *sets = (struct set *) 0;
4746 this_insn = insn;
4748 /* Find all the SETs and CLOBBERs in this instruction.
4749 Record all the SETs in the array `set' and count them.
4750 Also determine whether there is a CLOBBER that invalidates
4751 all memory references, or all references at varying addresses. */
4753 if (GET_CODE (insn) == CALL_INSN)
4755 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4757 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4758 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4759 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4763 if (GET_CODE (x) == SET)
4765 sets = (struct set *) alloca (sizeof (struct set));
4766 sets[0].rtl = x;
4768 /* Ignore SETs that are unconditional jumps.
4769 They never need cse processing, so this does not hurt.
4770 The reason is not efficiency but rather
4771 so that we can test at the end for instructions
4772 that have been simplified to unconditional jumps
4773 and not be misled by unchanged instructions
4774 that were unconditional jumps to begin with. */
4775 if (SET_DEST (x) == pc_rtx
4776 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4779 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4780 The hard function value register is used only once, to copy to
4781 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4782 Ensure we invalidate the destination register. On the 80386 no
4783 other code would invalidate it since it is a fixed_reg.
4784 We need not check the return of apply_change_group; see canon_reg. */
4786 else if (GET_CODE (SET_SRC (x)) == CALL)
4788 canon_reg (SET_SRC (x), insn);
4789 apply_change_group ();
4790 fold_rtx (SET_SRC (x), insn);
4791 invalidate (SET_DEST (x), VOIDmode);
4793 else
4794 n_sets = 1;
4796 else if (GET_CODE (x) == PARALLEL)
4798 register int lim = XVECLEN (x, 0);
4800 sets = (struct set *) alloca (lim * sizeof (struct set));
4802 /* Find all regs explicitly clobbered in this insn,
4803 and ensure they are not replaced with any other regs
4804 elsewhere in this insn.
4805 When a reg that is clobbered is also used for input,
4806 we should presume that that is for a reason,
4807 and we should not substitute some other register
4808 which is not supposed to be clobbered.
4809 Therefore, this loop cannot be merged into the one below
4810 because a CALL may precede a CLOBBER and refer to the
4811 value clobbered. We must not let a canonicalization do
4812 anything in that case. */
4813 for (i = 0; i < lim; i++)
4815 register rtx y = XVECEXP (x, 0, i);
4816 if (GET_CODE (y) == CLOBBER)
4818 rtx clobbered = XEXP (y, 0);
4820 if (GET_CODE (clobbered) == REG
4821 || GET_CODE (clobbered) == SUBREG)
4822 invalidate (clobbered, VOIDmode);
4823 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4824 || GET_CODE (clobbered) == ZERO_EXTRACT)
4825 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4829 for (i = 0; i < lim; i++)
4831 register rtx y = XVECEXP (x, 0, i);
4832 if (GET_CODE (y) == SET)
4834 /* As above, we ignore unconditional jumps and call-insns and
4835 ignore the result of apply_change_group. */
4836 if (GET_CODE (SET_SRC (y)) == CALL)
4838 canon_reg (SET_SRC (y), insn);
4839 apply_change_group ();
4840 fold_rtx (SET_SRC (y), insn);
4841 invalidate (SET_DEST (y), VOIDmode);
4843 else if (SET_DEST (y) == pc_rtx
4844 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4846 else
4847 sets[n_sets++].rtl = y;
4849 else if (GET_CODE (y) == CLOBBER)
4851 /* If we clobber memory, canon the address.
4852 This does nothing when a register is clobbered
4853 because we have already invalidated the reg. */
4854 if (GET_CODE (XEXP (y, 0)) == MEM)
4855 canon_reg (XEXP (y, 0), NULL_RTX);
4857 else if (GET_CODE (y) == USE
4858 && ! (GET_CODE (XEXP (y, 0)) == REG
4859 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4860 canon_reg (y, NULL_RTX);
4861 else if (GET_CODE (y) == CALL)
4863 /* The result of apply_change_group can be ignored; see
4864 canon_reg. */
4865 canon_reg (y, insn);
4866 apply_change_group ();
4867 fold_rtx (y, insn);
4871 else if (GET_CODE (x) == CLOBBER)
4873 if (GET_CODE (XEXP (x, 0)) == MEM)
4874 canon_reg (XEXP (x, 0), NULL_RTX);
4877 /* Canonicalize a USE of a pseudo register or memory location. */
4878 else if (GET_CODE (x) == USE
4879 && ! (GET_CODE (XEXP (x, 0)) == REG
4880 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4881 canon_reg (XEXP (x, 0), NULL_RTX);
4882 else if (GET_CODE (x) == CALL)
4884 /* The result of apply_change_group can be ignored; see canon_reg. */
4885 canon_reg (x, insn);
4886 apply_change_group ();
4887 fold_rtx (x, insn);
4890 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4891 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4892 is handled specially for this case, and if it isn't set, then there will
4893 be no equivalence for the destination. */
4894 if (n_sets == 1 && REG_NOTES (insn) != 0
4895 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4896 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4897 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4898 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4900 /* Canonicalize sources and addresses of destinations.
4901 We do this in a separate pass to avoid problems when a MATCH_DUP is
4902 present in the insn pattern. In that case, we want to ensure that
4903 we don't break the duplicate nature of the pattern. So we will replace
4904 both operands at the same time. Otherwise, we would fail to find an
4905 equivalent substitution in the loop calling validate_change below.
4907 We used to suppress canonicalization of DEST if it appears in SRC,
4908 but we don't do this any more. */
4910 for (i = 0; i < n_sets; i++)
4912 rtx dest = SET_DEST (sets[i].rtl);
4913 rtx src = SET_SRC (sets[i].rtl);
4914 rtx new = canon_reg (src, insn);
4915 int insn_code;
4917 sets[i].orig_src = src;
4918 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4919 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4920 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4921 || (insn_code = recog_memoized (insn)) < 0
4922 || insn_data[insn_code].n_dups > 0)
4923 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4924 else
4925 SET_SRC (sets[i].rtl) = new;
4927 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4929 validate_change (insn, &XEXP (dest, 1),
4930 canon_reg (XEXP (dest, 1), insn), 1);
4931 validate_change (insn, &XEXP (dest, 2),
4932 canon_reg (XEXP (dest, 2), insn), 1);
4935 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4936 || GET_CODE (dest) == ZERO_EXTRACT
4937 || GET_CODE (dest) == SIGN_EXTRACT)
4938 dest = XEXP (dest, 0);
4940 if (GET_CODE (dest) == MEM)
4941 canon_reg (dest, insn);
4944 /* Now that we have done all the replacements, we can apply the change
4945 group and see if they all work. Note that this will cause some
4946 canonicalizations that would have worked individually not to be applied
4947 because some other canonicalization didn't work, but this should not
4948 occur often.
4950 The result of apply_change_group can be ignored; see canon_reg. */
4952 apply_change_group ();
4954 /* Set sets[i].src_elt to the class each source belongs to.
4955 Detect assignments from or to volatile things
4956 and set set[i] to zero so they will be ignored
4957 in the rest of this function.
4959 Nothing in this loop changes the hash table or the register chains. */
4961 for (i = 0; i < n_sets; i++)
4963 register rtx src, dest;
4964 register rtx src_folded;
4965 register struct table_elt *elt = 0, *p;
4966 enum machine_mode mode;
4967 rtx src_eqv_here;
4968 rtx src_const = 0;
4969 rtx src_related = 0;
4970 struct table_elt *src_const_elt = 0;
4971 int src_cost = MAX_COST;
4972 int src_eqv_cost = MAX_COST;
4973 int src_folded_cost = MAX_COST;
4974 int src_related_cost = MAX_COST;
4975 int src_elt_cost = MAX_COST;
4976 int src_regcost = MAX_COST;
4977 int src_eqv_regcost = MAX_COST;
4978 int src_folded_regcost = MAX_COST;
4979 int src_related_regcost = MAX_COST;
4980 int src_elt_regcost = MAX_COST;
4981 /* Set non-zero if we need to call force_const_mem on with the
4982 contents of src_folded before using it. */
4983 int src_folded_force_flag = 0;
4985 dest = SET_DEST (sets[i].rtl);
4986 src = SET_SRC (sets[i].rtl);
4988 /* If SRC is a constant that has no machine mode,
4989 hash it with the destination's machine mode.
4990 This way we can keep different modes separate. */
4992 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4993 sets[i].mode = mode;
4995 if (src_eqv)
4997 enum machine_mode eqvmode = mode;
4998 if (GET_CODE (dest) == STRICT_LOW_PART)
4999 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5000 do_not_record = 0;
5001 hash_arg_in_memory = 0;
5002 src_eqv = fold_rtx (src_eqv, insn);
5003 src_eqv_hash = HASH (src_eqv, eqvmode);
5005 /* Find the equivalence class for the equivalent expression. */
5007 if (!do_not_record)
5008 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
5010 src_eqv_volatile = do_not_record;
5011 src_eqv_in_memory = hash_arg_in_memory;
5014 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5015 value of the INNER register, not the destination. So it is not
5016 a valid substitution for the source. But save it for later. */
5017 if (GET_CODE (dest) == STRICT_LOW_PART)
5018 src_eqv_here = 0;
5019 else
5020 src_eqv_here = src_eqv;
5022 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5023 simplified result, which may not necessarily be valid. */
5024 src_folded = fold_rtx (src, insn);
5026 #if 0
5027 /* ??? This caused bad code to be generated for the m68k port with -O2.
5028 Suppose src is (CONST_INT -1), and that after truncation src_folded
5029 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5030 At the end we will add src and src_const to the same equivalence
5031 class. We now have 3 and -1 on the same equivalence class. This
5032 causes later instructions to be mis-optimized. */
5033 /* If storing a constant in a bitfield, pre-truncate the constant
5034 so we will be able to record it later. */
5035 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5036 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5038 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5040 if (GET_CODE (src) == CONST_INT
5041 && GET_CODE (width) == CONST_INT
5042 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5043 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5044 src_folded
5045 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5046 << INTVAL (width)) - 1));
5048 #endif
5050 /* Compute SRC's hash code, and also notice if it
5051 should not be recorded at all. In that case,
5052 prevent any further processing of this assignment. */
5053 do_not_record = 0;
5054 hash_arg_in_memory = 0;
5056 sets[i].src = src;
5057 sets[i].src_hash = HASH (src, mode);
5058 sets[i].src_volatile = do_not_record;
5059 sets[i].src_in_memory = hash_arg_in_memory;
5061 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5062 a pseudo, do not record SRC. Using SRC as a replacement for
5063 anything else will be incorrect in that situation. Note that
5064 this usually occurs only for stack slots, in which case all the
5065 RTL would be referring to SRC, so we don't lose any optimization
5066 opportunities by not having SRC in the hash table. */
5068 if (GET_CODE (src) == MEM
5069 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5070 && GET_CODE (dest) == REG
5071 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5072 sets[i].src_volatile = 1;
5074 #if 0
5075 /* It is no longer clear why we used to do this, but it doesn't
5076 appear to still be needed. So let's try without it since this
5077 code hurts cse'ing widened ops. */
5078 /* If source is a perverse subreg (such as QI treated as an SI),
5079 treat it as volatile. It may do the work of an SI in one context
5080 where the extra bits are not being used, but cannot replace an SI
5081 in general. */
5082 if (GET_CODE (src) == SUBREG
5083 && (GET_MODE_SIZE (GET_MODE (src))
5084 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5085 sets[i].src_volatile = 1;
5086 #endif
5088 /* Locate all possible equivalent forms for SRC. Try to replace
5089 SRC in the insn with each cheaper equivalent.
5091 We have the following types of equivalents: SRC itself, a folded
5092 version, a value given in a REG_EQUAL note, or a value related
5093 to a constant.
5095 Each of these equivalents may be part of an additional class
5096 of equivalents (if more than one is in the table, they must be in
5097 the same class; we check for this).
5099 If the source is volatile, we don't do any table lookups.
5101 We note any constant equivalent for possible later use in a
5102 REG_NOTE. */
5104 if (!sets[i].src_volatile)
5105 elt = lookup (src, sets[i].src_hash, mode);
5107 sets[i].src_elt = elt;
5109 if (elt && src_eqv_here && src_eqv_elt)
5111 if (elt->first_same_value != src_eqv_elt->first_same_value)
5113 /* The REG_EQUAL is indicating that two formerly distinct
5114 classes are now equivalent. So merge them. */
5115 merge_equiv_classes (elt, src_eqv_elt);
5116 src_eqv_hash = HASH (src_eqv, elt->mode);
5117 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5120 src_eqv_here = 0;
5123 else if (src_eqv_elt)
5124 elt = src_eqv_elt;
5126 /* Try to find a constant somewhere and record it in `src_const'.
5127 Record its table element, if any, in `src_const_elt'. Look in
5128 any known equivalences first. (If the constant is not in the
5129 table, also set `sets[i].src_const_hash'). */
5130 if (elt)
5131 for (p = elt->first_same_value; p; p = p->next_same_value)
5132 if (p->is_const)
5134 src_const = p->exp;
5135 src_const_elt = elt;
5136 break;
5139 if (src_const == 0
5140 && (CONSTANT_P (src_folded)
5141 /* Consider (minus (label_ref L1) (label_ref L2)) as
5142 "constant" here so we will record it. This allows us
5143 to fold switch statements when an ADDR_DIFF_VEC is used. */
5144 || (GET_CODE (src_folded) == MINUS
5145 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5146 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5147 src_const = src_folded, src_const_elt = elt;
5148 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5149 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5151 /* If we don't know if the constant is in the table, get its
5152 hash code and look it up. */
5153 if (src_const && src_const_elt == 0)
5155 sets[i].src_const_hash = HASH (src_const, mode);
5156 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5159 sets[i].src_const = src_const;
5160 sets[i].src_const_elt = src_const_elt;
5162 /* If the constant and our source are both in the table, mark them as
5163 equivalent. Otherwise, if a constant is in the table but the source
5164 isn't, set ELT to it. */
5165 if (src_const_elt && elt
5166 && src_const_elt->first_same_value != elt->first_same_value)
5167 merge_equiv_classes (elt, src_const_elt);
5168 else if (src_const_elt && elt == 0)
5169 elt = src_const_elt;
5171 /* See if there is a register linearly related to a constant
5172 equivalent of SRC. */
5173 if (src_const
5174 && (GET_CODE (src_const) == CONST
5175 || (src_const_elt && src_const_elt->related_value != 0)))
5177 src_related = use_related_value (src_const, src_const_elt);
5178 if (src_related)
5180 struct table_elt *src_related_elt
5181 = lookup (src_related, HASH (src_related, mode), mode);
5182 if (src_related_elt && elt)
5184 if (elt->first_same_value
5185 != src_related_elt->first_same_value)
5186 /* This can occur when we previously saw a CONST
5187 involving a SYMBOL_REF and then see the SYMBOL_REF
5188 twice. Merge the involved classes. */
5189 merge_equiv_classes (elt, src_related_elt);
5191 src_related = 0;
5192 src_related_elt = 0;
5194 else if (src_related_elt && elt == 0)
5195 elt = src_related_elt;
5199 /* See if we have a CONST_INT that is already in a register in a
5200 wider mode. */
5202 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5203 && GET_MODE_CLASS (mode) == MODE_INT
5204 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5206 enum machine_mode wider_mode;
5208 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5209 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5210 && src_related == 0;
5211 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5213 struct table_elt *const_elt
5214 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5216 if (const_elt == 0)
5217 continue;
5219 for (const_elt = const_elt->first_same_value;
5220 const_elt; const_elt = const_elt->next_same_value)
5221 if (GET_CODE (const_elt->exp) == REG)
5223 src_related = gen_lowpart_if_possible (mode,
5224 const_elt->exp);
5225 break;
5230 /* Another possibility is that we have an AND with a constant in
5231 a mode narrower than a word. If so, it might have been generated
5232 as part of an "if" which would narrow the AND. If we already
5233 have done the AND in a wider mode, we can use a SUBREG of that
5234 value. */
5236 if (flag_expensive_optimizations && ! src_related
5237 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5238 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5240 enum machine_mode tmode;
5241 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5243 for (tmode = GET_MODE_WIDER_MODE (mode);
5244 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5245 tmode = GET_MODE_WIDER_MODE (tmode))
5247 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5248 struct table_elt *larger_elt;
5250 if (inner)
5252 PUT_MODE (new_and, tmode);
5253 XEXP (new_and, 0) = inner;
5254 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5255 if (larger_elt == 0)
5256 continue;
5258 for (larger_elt = larger_elt->first_same_value;
5259 larger_elt; larger_elt = larger_elt->next_same_value)
5260 if (GET_CODE (larger_elt->exp) == REG)
5262 src_related
5263 = gen_lowpart_if_possible (mode, larger_elt->exp);
5264 break;
5267 if (src_related)
5268 break;
5273 #ifdef LOAD_EXTEND_OP
5274 /* See if a MEM has already been loaded with a widening operation;
5275 if it has, we can use a subreg of that. Many CISC machines
5276 also have such operations, but this is only likely to be
5277 beneficial these machines. */
5279 if (flag_expensive_optimizations && src_related == 0
5280 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5281 && GET_MODE_CLASS (mode) == MODE_INT
5282 && GET_CODE (src) == MEM && ! do_not_record
5283 && LOAD_EXTEND_OP (mode) != NIL)
5285 enum machine_mode tmode;
5287 /* Set what we are trying to extend and the operation it might
5288 have been extended with. */
5289 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5290 XEXP (memory_extend_rtx, 0) = src;
5292 for (tmode = GET_MODE_WIDER_MODE (mode);
5293 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5294 tmode = GET_MODE_WIDER_MODE (tmode))
5296 struct table_elt *larger_elt;
5298 PUT_MODE (memory_extend_rtx, tmode);
5299 larger_elt = lookup (memory_extend_rtx,
5300 HASH (memory_extend_rtx, tmode), tmode);
5301 if (larger_elt == 0)
5302 continue;
5304 for (larger_elt = larger_elt->first_same_value;
5305 larger_elt; larger_elt = larger_elt->next_same_value)
5306 if (GET_CODE (larger_elt->exp) == REG)
5308 src_related = gen_lowpart_if_possible (mode,
5309 larger_elt->exp);
5310 break;
5313 if (src_related)
5314 break;
5317 #endif /* LOAD_EXTEND_OP */
5319 if (src == src_folded)
5320 src_folded = 0;
5322 /* At this point, ELT, if non-zero, points to a class of expressions
5323 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5324 and SRC_RELATED, if non-zero, each contain additional equivalent
5325 expressions. Prune these latter expressions by deleting expressions
5326 already in the equivalence class.
5328 Check for an equivalent identical to the destination. If found,
5329 this is the preferred equivalent since it will likely lead to
5330 elimination of the insn. Indicate this by placing it in
5331 `src_related'. */
5333 if (elt)
5334 elt = elt->first_same_value;
5335 for (p = elt; p; p = p->next_same_value)
5337 enum rtx_code code = GET_CODE (p->exp);
5339 /* If the expression is not valid, ignore it. Then we do not
5340 have to check for validity below. In most cases, we can use
5341 `rtx_equal_p', since canonicalization has already been done. */
5342 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5343 continue;
5345 /* Also skip paradoxical subregs, unless that's what we're
5346 looking for. */
5347 if (code == SUBREG
5348 && (GET_MODE_SIZE (GET_MODE (p->exp))
5349 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5350 && ! (src != 0
5351 && GET_CODE (src) == SUBREG
5352 && GET_MODE (src) == GET_MODE (p->exp)
5353 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5354 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5355 continue;
5357 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5358 src = 0;
5359 else if (src_folded && GET_CODE (src_folded) == code
5360 && rtx_equal_p (src_folded, p->exp))
5361 src_folded = 0;
5362 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5363 && rtx_equal_p (src_eqv_here, p->exp))
5364 src_eqv_here = 0;
5365 else if (src_related && GET_CODE (src_related) == code
5366 && rtx_equal_p (src_related, p->exp))
5367 src_related = 0;
5369 /* This is the same as the destination of the insns, we want
5370 to prefer it. Copy it to src_related. The code below will
5371 then give it a negative cost. */
5372 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5373 src_related = dest;
5376 /* Find the cheapest valid equivalent, trying all the available
5377 possibilities. Prefer items not in the hash table to ones
5378 that are when they are equal cost. Note that we can never
5379 worsen an insn as the current contents will also succeed.
5380 If we find an equivalent identical to the destination, use it as best,
5381 since this insn will probably be eliminated in that case. */
5382 if (src)
5384 if (rtx_equal_p (src, dest))
5385 src_cost = src_regcost = -1;
5386 else
5388 src_cost = COST (src);
5389 src_regcost = approx_reg_cost (src);
5393 if (src_eqv_here)
5395 if (rtx_equal_p (src_eqv_here, dest))
5396 src_eqv_cost = src_eqv_regcost = -1;
5397 else
5399 src_eqv_cost = COST (src_eqv_here);
5400 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5404 if (src_folded)
5406 if (rtx_equal_p (src_folded, dest))
5407 src_folded_cost = src_folded_regcost = -1;
5408 else
5410 src_folded_cost = COST (src_folded);
5411 src_folded_regcost = approx_reg_cost (src_folded);
5415 if (src_related)
5417 if (rtx_equal_p (src_related, dest))
5418 src_related_cost = src_related_regcost = -1;
5419 else
5421 src_related_cost = COST (src_related);
5422 src_related_regcost = approx_reg_cost (src_related);
5426 /* If this was an indirect jump insn, a known label will really be
5427 cheaper even though it looks more expensive. */
5428 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5429 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5431 /* Terminate loop when replacement made. This must terminate since
5432 the current contents will be tested and will always be valid. */
5433 while (1)
5435 rtx trial;
5437 /* Skip invalid entries. */
5438 while (elt && GET_CODE (elt->exp) != REG
5439 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5440 elt = elt->next_same_value;
5442 /* A paradoxical subreg would be bad here: it'll be the right
5443 size, but later may be adjusted so that the upper bits aren't
5444 what we want. So reject it. */
5445 if (elt != 0
5446 && GET_CODE (elt->exp) == SUBREG
5447 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5448 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5449 /* It is okay, though, if the rtx we're trying to match
5450 will ignore any of the bits we can't predict. */
5451 && ! (src != 0
5452 && GET_CODE (src) == SUBREG
5453 && GET_MODE (src) == GET_MODE (elt->exp)
5454 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5455 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5457 elt = elt->next_same_value;
5458 continue;
5461 if (elt)
5463 src_elt_cost = elt->cost;
5464 src_elt_regcost = elt->regcost;
5467 /* Find cheapest and skip it for the next time. For items
5468 of equal cost, use this order:
5469 src_folded, src, src_eqv, src_related and hash table entry. */
5470 if (src_folded
5471 && preferrable (src_folded_cost, src_folded_regcost,
5472 src_cost, src_regcost) <= 0
5473 && preferrable (src_folded_cost, src_folded_regcost,
5474 src_eqv_cost, src_eqv_regcost) <= 0
5475 && preferrable (src_folded_cost, src_folded_regcost,
5476 src_related_cost, src_related_regcost) <= 0
5477 && preferrable (src_folded_cost, src_folded_regcost,
5478 src_elt_cost, src_elt_regcost) <= 0)
5480 trial = src_folded, src_folded_cost = MAX_COST;
5481 if (src_folded_force_flag)
5482 trial = force_const_mem (mode, trial);
5484 else if (src
5485 && preferrable (src_cost, src_regcost,
5486 src_eqv_cost, src_eqv_regcost) <= 0
5487 && preferrable (src_cost, src_regcost,
5488 src_related_cost, src_related_regcost) <= 0
5489 && preferrable (src_cost, src_regcost,
5490 src_elt_cost, src_elt_regcost) <= 0)
5491 trial = src, src_cost = MAX_COST;
5492 else if (src_eqv_here
5493 && preferrable (src_eqv_cost, src_eqv_regcost,
5494 src_related_cost, src_related_regcost) <= 0
5495 && preferrable (src_eqv_cost, src_eqv_regcost,
5496 src_elt_cost, src_elt_regcost) <= 0)
5497 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5498 else if (src_related
5499 && preferrable (src_related_cost, src_related_regcost,
5500 src_elt_cost, src_elt_regcost) <= 0)
5501 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5502 else
5504 trial = copy_rtx (elt->exp);
5505 elt = elt->next_same_value;
5506 src_elt_cost = MAX_COST;
5509 /* We don't normally have an insn matching (set (pc) (pc)), so
5510 check for this separately here. We will delete such an
5511 insn below.
5513 For other cases such as a table jump or conditional jump
5514 where we know the ultimate target, go ahead and replace the
5515 operand. While that may not make a valid insn, we will
5516 reemit the jump below (and also insert any necessary
5517 barriers). */
5518 if (n_sets == 1 && dest == pc_rtx
5519 && (trial == pc_rtx
5520 || (GET_CODE (trial) == LABEL_REF
5521 && ! condjump_p (insn))))
5523 SET_SRC (sets[i].rtl) = trial;
5524 cse_jumps_altered = 1;
5525 break;
5528 /* Look for a substitution that makes a valid insn. */
5529 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5531 /* If we just made a substitution inside a libcall, then we
5532 need to make the same substitution in any notes attached
5533 to the RETVAL insn. */
5534 if (libcall_insn
5535 && (GET_CODE (sets[i].orig_src) == REG
5536 || GET_CODE (sets[i].orig_src) == SUBREG
5537 || GET_CODE (sets[i].orig_src) == MEM))
5538 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5539 canon_reg (SET_SRC (sets[i].rtl), insn));
5541 /* The result of apply_change_group can be ignored; see
5542 canon_reg. */
5544 validate_change (insn, &SET_SRC (sets[i].rtl),
5545 canon_reg (SET_SRC (sets[i].rtl), insn),
5547 apply_change_group ();
5548 break;
5551 /* If we previously found constant pool entries for
5552 constants and this is a constant, try making a
5553 pool entry. Put it in src_folded unless we already have done
5554 this since that is where it likely came from. */
5556 else if (constant_pool_entries_cost
5557 && CONSTANT_P (trial)
5558 /* Reject cases that will abort in decode_rtx_const.
5559 On the alpha when simplifying a switch, we get
5560 (const (truncate (minus (label_ref) (label_ref)))). */
5561 && ! (GET_CODE (trial) == CONST
5562 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5563 /* Likewise on IA-64, except without the truncate. */
5564 && ! (GET_CODE (trial) == CONST
5565 && GET_CODE (XEXP (trial, 0)) == MINUS
5566 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5567 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5568 && (src_folded == 0
5569 || (GET_CODE (src_folded) != MEM
5570 && ! src_folded_force_flag))
5571 && GET_MODE_CLASS (mode) != MODE_CC
5572 && mode != VOIDmode)
5574 src_folded_force_flag = 1;
5575 src_folded = trial;
5576 src_folded_cost = constant_pool_entries_cost;
5580 src = SET_SRC (sets[i].rtl);
5582 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5583 However, there is an important exception: If both are registers
5584 that are not the head of their equivalence class, replace SET_SRC
5585 with the head of the class. If we do not do this, we will have
5586 both registers live over a portion of the basic block. This way,
5587 their lifetimes will likely abut instead of overlapping. */
5588 if (GET_CODE (dest) == REG
5589 && REGNO_QTY_VALID_P (REGNO (dest)))
5591 int dest_q = REG_QTY (REGNO (dest));
5592 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5594 if (dest_ent->mode == GET_MODE (dest)
5595 && dest_ent->first_reg != REGNO (dest)
5596 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5597 /* Don't do this if the original insn had a hard reg as
5598 SET_SRC or SET_DEST. */
5599 && (GET_CODE (sets[i].src) != REG
5600 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5601 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5602 /* We can't call canon_reg here because it won't do anything if
5603 SRC is a hard register. */
5605 int src_q = REG_QTY (REGNO (src));
5606 struct qty_table_elem *src_ent = &qty_table[src_q];
5607 int first = src_ent->first_reg;
5608 rtx new_src
5609 = (first >= FIRST_PSEUDO_REGISTER
5610 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5612 /* We must use validate-change even for this, because this
5613 might be a special no-op instruction, suitable only to
5614 tag notes onto. */
5615 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5617 src = new_src;
5618 /* If we had a constant that is cheaper than what we are now
5619 setting SRC to, use that constant. We ignored it when we
5620 thought we could make this into a no-op. */
5621 if (src_const && COST (src_const) < COST (src)
5622 && validate_change (insn, &SET_SRC (sets[i].rtl),
5623 src_const, 0))
5624 src = src_const;
5629 /* If we made a change, recompute SRC values. */
5630 if (src != sets[i].src)
5632 cse_altered = 1;
5633 do_not_record = 0;
5634 hash_arg_in_memory = 0;
5635 sets[i].src = src;
5636 sets[i].src_hash = HASH (src, mode);
5637 sets[i].src_volatile = do_not_record;
5638 sets[i].src_in_memory = hash_arg_in_memory;
5639 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5642 /* If this is a single SET, we are setting a register, and we have an
5643 equivalent constant, we want to add a REG_NOTE. We don't want
5644 to write a REG_EQUAL note for a constant pseudo since verifying that
5645 that pseudo hasn't been eliminated is a pain. Such a note also
5646 won't help anything.
5648 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5649 which can be created for a reference to a compile time computable
5650 entry in a jump table. */
5652 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5653 && GET_CODE (src_const) != REG
5654 && ! (GET_CODE (src_const) == CONST
5655 && GET_CODE (XEXP (src_const, 0)) == MINUS
5656 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5657 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5659 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5661 /* Make sure that the rtx is not shared with any other insn. */
5662 src_const = copy_rtx (src_const);
5664 /* Record the actual constant value in a REG_EQUAL note, making
5665 a new one if one does not already exist. */
5666 if (tem)
5667 XEXP (tem, 0) = src_const;
5668 else
5669 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5670 src_const, REG_NOTES (insn));
5672 /* If storing a constant value in a register that
5673 previously held the constant value 0,
5674 record this fact with a REG_WAS_0 note on this insn.
5676 Note that the *register* is required to have previously held 0,
5677 not just any register in the quantity and we must point to the
5678 insn that set that register to zero.
5680 Rather than track each register individually, we just see if
5681 the last set for this quantity was for this register. */
5683 if (REGNO_QTY_VALID_P (REGNO (dest)))
5685 int dest_q = REG_QTY (REGNO (dest));
5686 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5688 if (dest_ent->const_rtx == const0_rtx)
5690 /* See if we previously had a REG_WAS_0 note. */
5691 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5692 rtx const_insn = dest_ent->const_insn;
5694 if ((tem = single_set (const_insn)) != 0
5695 && rtx_equal_p (SET_DEST (tem), dest))
5697 if (note)
5698 XEXP (note, 0) = const_insn;
5699 else
5700 REG_NOTES (insn)
5701 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5702 REG_NOTES (insn));
5708 /* Now deal with the destination. */
5709 do_not_record = 0;
5711 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5712 to the MEM or REG within it. */
5713 while (GET_CODE (dest) == SIGN_EXTRACT
5714 || GET_CODE (dest) == ZERO_EXTRACT
5715 || GET_CODE (dest) == SUBREG
5716 || GET_CODE (dest) == STRICT_LOW_PART)
5717 dest = XEXP (dest, 0);
5719 sets[i].inner_dest = dest;
5721 if (GET_CODE (dest) == MEM)
5723 #ifdef PUSH_ROUNDING
5724 /* Stack pushes invalidate the stack pointer. */
5725 rtx addr = XEXP (dest, 0);
5726 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5727 && XEXP (addr, 0) == stack_pointer_rtx)
5728 invalidate (stack_pointer_rtx, Pmode);
5729 #endif
5730 dest = fold_rtx (dest, insn);
5733 /* Compute the hash code of the destination now,
5734 before the effects of this instruction are recorded,
5735 since the register values used in the address computation
5736 are those before this instruction. */
5737 sets[i].dest_hash = HASH (dest, mode);
5739 /* Don't enter a bit-field in the hash table
5740 because the value in it after the store
5741 may not equal what was stored, due to truncation. */
5743 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5744 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5746 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5748 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5749 && GET_CODE (width) == CONST_INT
5750 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5751 && ! (INTVAL (src_const)
5752 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5753 /* Exception: if the value is constant,
5754 and it won't be truncated, record it. */
5756 else
5758 /* This is chosen so that the destination will be invalidated
5759 but no new value will be recorded.
5760 We must invalidate because sometimes constant
5761 values can be recorded for bitfields. */
5762 sets[i].src_elt = 0;
5763 sets[i].src_volatile = 1;
5764 src_eqv = 0;
5765 src_eqv_elt = 0;
5769 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5770 the insn. */
5771 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5773 /* One less use of the label this insn used to jump to. */
5774 if (JUMP_LABEL (insn) != 0)
5775 --LABEL_NUSES (JUMP_LABEL (insn));
5776 PUT_CODE (insn, NOTE);
5777 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5778 NOTE_SOURCE_FILE (insn) = 0;
5779 cse_jumps_altered = 1;
5780 /* No more processing for this set. */
5781 sets[i].rtl = 0;
5784 /* If this SET is now setting PC to a label, we know it used to
5785 be a conditional or computed branch. */
5786 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5788 /* We reemit the jump in as many cases as possible just in
5789 case the form of an unconditional jump is significantly
5790 different than a computed jump or conditional jump.
5792 If this insn has multiple sets, then reemitting the
5793 jump is nontrivial. So instead we just force rerecognition
5794 and hope for the best. */
5795 if (n_sets == 1)
5797 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5798 JUMP_LABEL (new) = XEXP (src, 0);
5799 LABEL_NUSES (XEXP (src, 0))++;
5800 insn = new;
5802 else
5803 INSN_CODE (insn) = -1;
5805 never_reached_warning (insn);
5807 /* Now emit a BARRIER after the unconditional jump. Do not bother
5808 deleting any unreachable code, let jump/flow do that. */
5809 if (NEXT_INSN (insn) != 0
5810 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5811 emit_barrier_after (insn);
5813 cse_jumps_altered = 1;
5814 sets[i].rtl = 0;
5817 /* If destination is volatile, invalidate it and then do no further
5818 processing for this assignment. */
5820 else if (do_not_record)
5822 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5823 invalidate (dest, VOIDmode);
5824 else if (GET_CODE (dest) == MEM)
5826 /* Outgoing arguments for a libcall don't
5827 affect any recorded expressions. */
5828 if (! libcall_insn || insn == libcall_insn)
5829 invalidate (dest, VOIDmode);
5831 else if (GET_CODE (dest) == STRICT_LOW_PART
5832 || GET_CODE (dest) == ZERO_EXTRACT)
5833 invalidate (XEXP (dest, 0), GET_MODE (dest));
5834 sets[i].rtl = 0;
5837 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5838 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5840 #ifdef HAVE_cc0
5841 /* If setting CC0, record what it was set to, or a constant, if it
5842 is equivalent to a constant. If it is being set to a floating-point
5843 value, make a COMPARE with the appropriate constant of 0. If we
5844 don't do this, later code can interpret this as a test against
5845 const0_rtx, which can cause problems if we try to put it into an
5846 insn as a floating-point operand. */
5847 if (dest == cc0_rtx)
5849 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5850 this_insn_cc0_mode = mode;
5851 if (FLOAT_MODE_P (mode))
5852 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5853 CONST0_RTX (mode));
5855 #endif
5858 /* Now enter all non-volatile source expressions in the hash table
5859 if they are not already present.
5860 Record their equivalence classes in src_elt.
5861 This way we can insert the corresponding destinations into
5862 the same classes even if the actual sources are no longer in them
5863 (having been invalidated). */
5865 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5866 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5868 register struct table_elt *elt;
5869 register struct table_elt *classp = sets[0].src_elt;
5870 rtx dest = SET_DEST (sets[0].rtl);
5871 enum machine_mode eqvmode = GET_MODE (dest);
5873 if (GET_CODE (dest) == STRICT_LOW_PART)
5875 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5876 classp = 0;
5878 if (insert_regs (src_eqv, classp, 0))
5880 rehash_using_reg (src_eqv);
5881 src_eqv_hash = HASH (src_eqv, eqvmode);
5883 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5884 elt->in_memory = src_eqv_in_memory;
5885 src_eqv_elt = elt;
5887 /* Check to see if src_eqv_elt is the same as a set source which
5888 does not yet have an elt, and if so set the elt of the set source
5889 to src_eqv_elt. */
5890 for (i = 0; i < n_sets; i++)
5891 if (sets[i].rtl && sets[i].src_elt == 0
5892 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5893 sets[i].src_elt = src_eqv_elt;
5896 for (i = 0; i < n_sets; i++)
5897 if (sets[i].rtl && ! sets[i].src_volatile
5898 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5900 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5902 /* REG_EQUAL in setting a STRICT_LOW_PART
5903 gives an equivalent for the entire destination register,
5904 not just for the subreg being stored in now.
5905 This is a more interesting equivalence, so we arrange later
5906 to treat the entire reg as the destination. */
5907 sets[i].src_elt = src_eqv_elt;
5908 sets[i].src_hash = src_eqv_hash;
5910 else
5912 /* Insert source and constant equivalent into hash table, if not
5913 already present. */
5914 register struct table_elt *classp = src_eqv_elt;
5915 register rtx src = sets[i].src;
5916 register rtx dest = SET_DEST (sets[i].rtl);
5917 enum machine_mode mode
5918 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5920 if (sets[i].src_elt == 0)
5922 /* Don't put a hard register source into the table if this is
5923 the last insn of a libcall. In this case, we only need
5924 to put src_eqv_elt in src_elt. */
5925 if (GET_CODE (src) != REG
5926 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5927 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5929 register struct table_elt *elt;
5931 /* Note that these insert_regs calls cannot remove
5932 any of the src_elt's, because they would have failed to
5933 match if not still valid. */
5934 if (insert_regs (src, classp, 0))
5936 rehash_using_reg (src);
5937 sets[i].src_hash = HASH (src, mode);
5939 elt = insert (src, classp, sets[i].src_hash, mode);
5940 elt->in_memory = sets[i].src_in_memory;
5941 sets[i].src_elt = classp = elt;
5943 else
5944 sets[i].src_elt = classp;
5946 if (sets[i].src_const && sets[i].src_const_elt == 0
5947 && src != sets[i].src_const
5948 && ! rtx_equal_p (sets[i].src_const, src))
5949 sets[i].src_elt = insert (sets[i].src_const, classp,
5950 sets[i].src_const_hash, mode);
5953 else if (sets[i].src_elt == 0)
5954 /* If we did not insert the source into the hash table (e.g., it was
5955 volatile), note the equivalence class for the REG_EQUAL value, if any,
5956 so that the destination goes into that class. */
5957 sets[i].src_elt = src_eqv_elt;
5959 invalidate_from_clobbers (x);
5961 /* Some registers are invalidated by subroutine calls. Memory is
5962 invalidated by non-constant calls. */
5964 if (GET_CODE (insn) == CALL_INSN)
5966 if (! CONST_CALL_P (insn))
5967 invalidate_memory ();
5968 invalidate_for_call ();
5971 /* Now invalidate everything set by this instruction.
5972 If a SUBREG or other funny destination is being set,
5973 sets[i].rtl is still nonzero, so here we invalidate the reg
5974 a part of which is being set. */
5976 for (i = 0; i < n_sets; i++)
5977 if (sets[i].rtl)
5979 /* We can't use the inner dest, because the mode associated with
5980 a ZERO_EXTRACT is significant. */
5981 register rtx dest = SET_DEST (sets[i].rtl);
5983 /* Needed for registers to remove the register from its
5984 previous quantity's chain.
5985 Needed for memory if this is a nonvarying address, unless
5986 we have just done an invalidate_memory that covers even those. */
5987 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5988 invalidate (dest, VOIDmode);
5989 else if (GET_CODE (dest) == MEM)
5991 /* Outgoing arguments for a libcall don't
5992 affect any recorded expressions. */
5993 if (! libcall_insn || insn == libcall_insn)
5994 invalidate (dest, VOIDmode);
5996 else if (GET_CODE (dest) == STRICT_LOW_PART
5997 || GET_CODE (dest) == ZERO_EXTRACT)
5998 invalidate (XEXP (dest, 0), GET_MODE (dest));
6001 /* A volatile ASM invalidates everything. */
6002 if (GET_CODE (insn) == INSN
6003 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
6004 && MEM_VOLATILE_P (PATTERN (insn)))
6005 flush_hash_table ();
6007 /* Make sure registers mentioned in destinations
6008 are safe for use in an expression to be inserted.
6009 This removes from the hash table
6010 any invalid entry that refers to one of these registers.
6012 We don't care about the return value from mention_regs because
6013 we are going to hash the SET_DEST values unconditionally. */
6015 for (i = 0; i < n_sets; i++)
6017 if (sets[i].rtl)
6019 rtx x = SET_DEST (sets[i].rtl);
6021 if (GET_CODE (x) != REG)
6022 mention_regs (x);
6023 else
6025 /* We used to rely on all references to a register becoming
6026 inaccessible when a register changes to a new quantity,
6027 since that changes the hash code. However, that is not
6028 safe, since after HASH_SIZE new quantities we get a
6029 hash 'collision' of a register with its own invalid
6030 entries. And since SUBREGs have been changed not to
6031 change their hash code with the hash code of the register,
6032 it wouldn't work any longer at all. So we have to check
6033 for any invalid references lying around now.
6034 This code is similar to the REG case in mention_regs,
6035 but it knows that reg_tick has been incremented, and
6036 it leaves reg_in_table as -1 . */
6037 unsigned int regno = REGNO (x);
6038 unsigned int endregno
6039 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
6040 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
6041 unsigned int i;
6043 for (i = regno; i < endregno; i++)
6045 if (REG_IN_TABLE (i) >= 0)
6047 remove_invalid_refs (i);
6048 REG_IN_TABLE (i) = -1;
6055 /* We may have just removed some of the src_elt's from the hash table.
6056 So replace each one with the current head of the same class. */
6058 for (i = 0; i < n_sets; i++)
6059 if (sets[i].rtl)
6061 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6062 /* If elt was removed, find current head of same class,
6063 or 0 if nothing remains of that class. */
6065 register struct table_elt *elt = sets[i].src_elt;
6067 while (elt && elt->prev_same_value)
6068 elt = elt->prev_same_value;
6070 while (elt && elt->first_same_value == 0)
6071 elt = elt->next_same_value;
6072 sets[i].src_elt = elt ? elt->first_same_value : 0;
6076 /* Now insert the destinations into their equivalence classes. */
6078 for (i = 0; i < n_sets; i++)
6079 if (sets[i].rtl)
6081 register rtx dest = SET_DEST (sets[i].rtl);
6082 rtx inner_dest = sets[i].inner_dest;
6083 register struct table_elt *elt;
6085 /* Don't record value if we are not supposed to risk allocating
6086 floating-point values in registers that might be wider than
6087 memory. */
6088 if ((flag_float_store
6089 && GET_CODE (dest) == MEM
6090 && FLOAT_MODE_P (GET_MODE (dest)))
6091 /* Don't record BLKmode values, because we don't know the
6092 size of it, and can't be sure that other BLKmode values
6093 have the same or smaller size. */
6094 || GET_MODE (dest) == BLKmode
6095 /* Don't record values of destinations set inside a libcall block
6096 since we might delete the libcall. Things should have been set
6097 up so we won't want to reuse such a value, but we play it safe
6098 here. */
6099 || libcall_insn
6100 /* If we didn't put a REG_EQUAL value or a source into the hash
6101 table, there is no point is recording DEST. */
6102 || sets[i].src_elt == 0
6103 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6104 or SIGN_EXTEND, don't record DEST since it can cause
6105 some tracking to be wrong.
6107 ??? Think about this more later. */
6108 || (GET_CODE (dest) == SUBREG
6109 && (GET_MODE_SIZE (GET_MODE (dest))
6110 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6111 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6112 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6113 continue;
6115 /* STRICT_LOW_PART isn't part of the value BEING set,
6116 and neither is the SUBREG inside it.
6117 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6118 if (GET_CODE (dest) == STRICT_LOW_PART)
6119 dest = SUBREG_REG (XEXP (dest, 0));
6121 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6122 /* Registers must also be inserted into chains for quantities. */
6123 if (insert_regs (dest, sets[i].src_elt, 1))
6125 /* If `insert_regs' changes something, the hash code must be
6126 recalculated. */
6127 rehash_using_reg (dest);
6128 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6131 if (GET_CODE (inner_dest) == MEM
6132 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6133 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6134 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6135 Consider the case in which the address of the MEM is
6136 passed to a function, which alters the MEM. Then, if we
6137 later use Y instead of the MEM we'll miss the update. */
6138 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6139 else
6140 elt = insert (dest, sets[i].src_elt,
6141 sets[i].dest_hash, GET_MODE (dest));
6143 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6144 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6145 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
6146 0))));
6148 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6149 narrower than M2, and both M1 and M2 are the same number of words,
6150 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6151 make that equivalence as well.
6153 However, BAR may have equivalences for which gen_lowpart_if_possible
6154 will produce a simpler value than gen_lowpart_if_possible applied to
6155 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6156 BAR's equivalences. If we don't get a simplified form, make
6157 the SUBREG. It will not be used in an equivalence, but will
6158 cause two similar assignments to be detected.
6160 Note the loop below will find SUBREG_REG (DEST) since we have
6161 already entered SRC and DEST of the SET in the table. */
6163 if (GET_CODE (dest) == SUBREG
6164 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6165 / UNITS_PER_WORD)
6166 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6167 && (GET_MODE_SIZE (GET_MODE (dest))
6168 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6169 && sets[i].src_elt != 0)
6171 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6172 struct table_elt *elt, *classp = 0;
6174 for (elt = sets[i].src_elt->first_same_value; elt;
6175 elt = elt->next_same_value)
6177 rtx new_src = 0;
6178 unsigned src_hash;
6179 struct table_elt *src_elt;
6181 /* Ignore invalid entries. */
6182 if (GET_CODE (elt->exp) != REG
6183 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6184 continue;
6186 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6187 if (new_src == 0)
6188 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
6190 src_hash = HASH (new_src, new_mode);
6191 src_elt = lookup (new_src, src_hash, new_mode);
6193 /* Put the new source in the hash table is if isn't
6194 already. */
6195 if (src_elt == 0)
6197 if (insert_regs (new_src, classp, 0))
6199 rehash_using_reg (new_src);
6200 src_hash = HASH (new_src, new_mode);
6202 src_elt = insert (new_src, classp, src_hash, new_mode);
6203 src_elt->in_memory = elt->in_memory;
6205 else if (classp && classp != src_elt->first_same_value)
6206 /* Show that two things that we've seen before are
6207 actually the same. */
6208 merge_equiv_classes (src_elt, classp);
6210 classp = src_elt->first_same_value;
6211 /* Ignore invalid entries. */
6212 while (classp
6213 && GET_CODE (classp->exp) != REG
6214 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6215 classp = classp->next_same_value;
6220 /* Special handling for (set REG0 REG1) where REG0 is the
6221 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6222 be used in the sequel, so (if easily done) change this insn to
6223 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6224 that computed their value. Then REG1 will become a dead store
6225 and won't cloud the situation for later optimizations.
6227 Do not make this change if REG1 is a hard register, because it will
6228 then be used in the sequel and we may be changing a two-operand insn
6229 into a three-operand insn.
6231 Also do not do this if we are operating on a copy of INSN.
6233 Also don't do this if INSN ends a libcall; this would cause an unrelated
6234 register to be set in the middle of a libcall, and we then get bad code
6235 if the libcall is deleted. */
6237 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6238 && NEXT_INSN (PREV_INSN (insn)) == insn
6239 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6240 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6241 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6243 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6244 struct qty_table_elem *src_ent = &qty_table[src_q];
6246 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6247 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6249 rtx prev = prev_nonnote_insn (insn);
6251 /* Do not swap the registers around if the previous instruction
6252 attaches a REG_EQUIV note to REG1.
6254 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6255 from the pseudo that originally shadowed an incoming argument
6256 to another register. Some uses of REG_EQUIV might rely on it
6257 being attached to REG1 rather than REG2.
6259 This section previously turned the REG_EQUIV into a REG_EQUAL
6260 note. We cannot do that because REG_EQUIV may provide an
6261 uninitialised stack slot when REG_PARM_STACK_SPACE is used. */
6263 if (prev != 0 && GET_CODE (prev) == INSN
6264 && GET_CODE (PATTERN (prev)) == SET
6265 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6266 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6268 rtx dest = SET_DEST (sets[0].rtl);
6269 rtx src = SET_SRC (sets[0].rtl);
6270 rtx note;
6272 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6273 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6274 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6275 apply_change_group ();
6277 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6278 any REG_WAS_0 note on INSN to PREV. */
6279 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6280 if (note)
6281 remove_note (prev, note);
6283 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6284 if (note)
6286 remove_note (insn, note);
6287 XEXP (note, 1) = REG_NOTES (prev);
6288 REG_NOTES (prev) = note;
6291 /* If INSN has a REG_EQUAL note, and this note mentions
6292 REG0, then we must delete it, because the value in
6293 REG0 has changed. If the note's value is REG1, we must
6294 also delete it because that is now this insn's dest. */
6295 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6296 if (note != 0
6297 && (reg_mentioned_p (dest, XEXP (note, 0))
6298 || rtx_equal_p (src, XEXP (note, 0))))
6299 remove_note (insn, note);
6304 /* If this is a conditional jump insn, record any known equivalences due to
6305 the condition being tested. */
6307 last_jump_equiv_class = 0;
6308 if (GET_CODE (insn) == JUMP_INSN
6309 && n_sets == 1 && GET_CODE (x) == SET
6310 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6311 record_jump_equiv (insn, 0);
6313 #ifdef HAVE_cc0
6314 /* If the previous insn set CC0 and this insn no longer references CC0,
6315 delete the previous insn. Here we use the fact that nothing expects CC0
6316 to be valid over an insn, which is true until the final pass. */
6317 if (prev_insn && GET_CODE (prev_insn) == INSN
6318 && (tem = single_set (prev_insn)) != 0
6319 && SET_DEST (tem) == cc0_rtx
6320 && ! reg_mentioned_p (cc0_rtx, x))
6322 PUT_CODE (prev_insn, NOTE);
6323 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6324 NOTE_SOURCE_FILE (prev_insn) = 0;
6327 prev_insn_cc0 = this_insn_cc0;
6328 prev_insn_cc0_mode = this_insn_cc0_mode;
6329 #endif
6331 prev_insn = insn;
6334 /* Remove from the hash table all expressions that reference memory. */
6336 static void
6337 invalidate_memory ()
6339 register int i;
6340 register struct table_elt *p, *next;
6342 for (i = 0; i < HASH_SIZE; i++)
6343 for (p = table[i]; p; p = next)
6345 next = p->next_same_hash;
6346 if (p->in_memory)
6347 remove_from_table (p, i);
6351 /* If ADDR is an address that implicitly affects the stack pointer, return
6352 1 and update the register tables to show the effect. Else, return 0. */
6354 static int
6355 addr_affects_sp_p (addr)
6356 register rtx addr;
6358 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6359 && GET_CODE (XEXP (addr, 0)) == REG
6360 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6362 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6363 REG_TICK (STACK_POINTER_REGNUM)++;
6365 /* This should be *very* rare. */
6366 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6367 invalidate (stack_pointer_rtx, VOIDmode);
6369 return 1;
6372 return 0;
6375 /* Perform invalidation on the basis of everything about an insn
6376 except for invalidating the actual places that are SET in it.
6377 This includes the places CLOBBERed, and anything that might
6378 alias with something that is SET or CLOBBERed.
6380 X is the pattern of the insn. */
6382 static void
6383 invalidate_from_clobbers (x)
6384 rtx x;
6386 if (GET_CODE (x) == CLOBBER)
6388 rtx ref = XEXP (x, 0);
6389 if (ref)
6391 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6392 || GET_CODE (ref) == MEM)
6393 invalidate (ref, VOIDmode);
6394 else if (GET_CODE (ref) == STRICT_LOW_PART
6395 || GET_CODE (ref) == ZERO_EXTRACT)
6396 invalidate (XEXP (ref, 0), GET_MODE (ref));
6399 else if (GET_CODE (x) == PARALLEL)
6401 register int i;
6402 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6404 register rtx y = XVECEXP (x, 0, i);
6405 if (GET_CODE (y) == CLOBBER)
6407 rtx ref = XEXP (y, 0);
6408 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6409 || GET_CODE (ref) == MEM)
6410 invalidate (ref, VOIDmode);
6411 else if (GET_CODE (ref) == STRICT_LOW_PART
6412 || GET_CODE (ref) == ZERO_EXTRACT)
6413 invalidate (XEXP (ref, 0), GET_MODE (ref));
6419 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6420 and replace any registers in them with either an equivalent constant
6421 or the canonical form of the register. If we are inside an address,
6422 only do this if the address remains valid.
6424 OBJECT is 0 except when within a MEM in which case it is the MEM.
6426 Return the replacement for X. */
6428 static rtx
6429 cse_process_notes (x, object)
6430 rtx x;
6431 rtx object;
6433 enum rtx_code code = GET_CODE (x);
6434 const char *fmt = GET_RTX_FORMAT (code);
6435 int i;
6437 switch (code)
6439 case CONST_INT:
6440 case CONST:
6441 case SYMBOL_REF:
6442 case LABEL_REF:
6443 case CONST_DOUBLE:
6444 case PC:
6445 case CC0:
6446 case LO_SUM:
6447 return x;
6449 case MEM:
6450 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6451 return x;
6453 case EXPR_LIST:
6454 case INSN_LIST:
6455 if (REG_NOTE_KIND (x) == REG_EQUAL)
6456 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6457 if (XEXP (x, 1))
6458 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6459 return x;
6461 case SIGN_EXTEND:
6462 case ZERO_EXTEND:
6463 case SUBREG:
6465 rtx new = cse_process_notes (XEXP (x, 0), object);
6466 /* We don't substitute VOIDmode constants into these rtx,
6467 since they would impede folding. */
6468 if (GET_MODE (new) != VOIDmode)
6469 validate_change (object, &XEXP (x, 0), new, 0);
6470 return x;
6473 case REG:
6474 i = REG_QTY (REGNO (x));
6476 /* Return a constant or a constant register. */
6477 if (REGNO_QTY_VALID_P (REGNO (x)))
6479 struct qty_table_elem *ent = &qty_table[i];
6481 if (ent->const_rtx != NULL_RTX
6482 && (CONSTANT_P (ent->const_rtx)
6483 || GET_CODE (ent->const_rtx) == REG))
6485 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6486 if (new)
6487 return new;
6491 /* Otherwise, canonicalize this register. */
6492 return canon_reg (x, NULL_RTX);
6494 default:
6495 break;
6498 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6499 if (fmt[i] == 'e')
6500 validate_change (object, &XEXP (x, i),
6501 cse_process_notes (XEXP (x, i), object), 0);
6503 return x;
6506 /* Find common subexpressions between the end test of a loop and the beginning
6507 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6509 Often we have a loop where an expression in the exit test is used
6510 in the body of the loop. For example "while (*p) *q++ = *p++;".
6511 Because of the way we duplicate the loop exit test in front of the loop,
6512 however, we don't detect that common subexpression. This will be caught
6513 when global cse is implemented, but this is a quite common case.
6515 This function handles the most common cases of these common expressions.
6516 It is called after we have processed the basic block ending with the
6517 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6518 jumps to a label used only once. */
6520 static void
6521 cse_around_loop (loop_start)
6522 rtx loop_start;
6524 rtx insn;
6525 int i;
6526 struct table_elt *p;
6528 /* If the jump at the end of the loop doesn't go to the start, we don't
6529 do anything. */
6530 for (insn = PREV_INSN (loop_start);
6531 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6532 insn = PREV_INSN (insn))
6535 if (insn == 0
6536 || GET_CODE (insn) != NOTE
6537 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6538 return;
6540 /* If the last insn of the loop (the end test) was an NE comparison,
6541 we will interpret it as an EQ comparison, since we fell through
6542 the loop. Any equivalences resulting from that comparison are
6543 therefore not valid and must be invalidated. */
6544 if (last_jump_equiv_class)
6545 for (p = last_jump_equiv_class->first_same_value; p;
6546 p = p->next_same_value)
6548 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6549 || (GET_CODE (p->exp) == SUBREG
6550 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6551 invalidate (p->exp, VOIDmode);
6552 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6553 || GET_CODE (p->exp) == ZERO_EXTRACT)
6554 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6557 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6558 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6560 The only thing we do with SET_DEST is invalidate entries, so we
6561 can safely process each SET in order. It is slightly less efficient
6562 to do so, but we only want to handle the most common cases.
6564 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6565 These pseudos won't have valid entries in any of the tables indexed
6566 by register number, such as reg_qty. We avoid out-of-range array
6567 accesses by not processing any instructions created after cse started. */
6569 for (insn = NEXT_INSN (loop_start);
6570 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6571 && INSN_UID (insn) < max_insn_uid
6572 && ! (GET_CODE (insn) == NOTE
6573 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6574 insn = NEXT_INSN (insn))
6576 if (INSN_P (insn)
6577 && (GET_CODE (PATTERN (insn)) == SET
6578 || GET_CODE (PATTERN (insn)) == CLOBBER))
6579 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6580 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6581 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6582 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6583 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6584 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6585 loop_start);
6589 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6590 since they are done elsewhere. This function is called via note_stores. */
6592 static void
6593 invalidate_skipped_set (dest, set, data)
6594 rtx set;
6595 rtx dest;
6596 void *data ATTRIBUTE_UNUSED;
6598 enum rtx_code code = GET_CODE (dest);
6600 if (code == MEM
6601 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6602 /* There are times when an address can appear varying and be a PLUS
6603 during this scan when it would be a fixed address were we to know
6604 the proper equivalences. So invalidate all memory if there is
6605 a BLKmode or nonscalar memory reference or a reference to a
6606 variable address. */
6607 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6608 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6610 invalidate_memory ();
6611 return;
6614 if (GET_CODE (set) == CLOBBER
6615 #ifdef HAVE_cc0
6616 || dest == cc0_rtx
6617 #endif
6618 || dest == pc_rtx)
6619 return;
6621 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6622 invalidate (XEXP (dest, 0), GET_MODE (dest));
6623 else if (code == REG || code == SUBREG || code == MEM)
6624 invalidate (dest, VOIDmode);
6627 /* Invalidate all insns from START up to the end of the function or the
6628 next label. This called when we wish to CSE around a block that is
6629 conditionally executed. */
6631 static void
6632 invalidate_skipped_block (start)
6633 rtx start;
6635 rtx insn;
6637 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6638 insn = NEXT_INSN (insn))
6640 if (! INSN_P (insn))
6641 continue;
6643 if (GET_CODE (insn) == CALL_INSN)
6645 if (! CONST_CALL_P (insn))
6646 invalidate_memory ();
6647 invalidate_for_call ();
6650 invalidate_from_clobbers (PATTERN (insn));
6651 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6655 /* If modifying X will modify the value in *DATA (which is really an
6656 `rtx *'), indicate that fact by setting the pointed to value to
6657 NULL_RTX. */
6659 static void
6660 cse_check_loop_start (x, set, data)
6661 rtx x;
6662 rtx set ATTRIBUTE_UNUSED;
6663 void *data;
6665 rtx *cse_check_loop_start_value = (rtx *) data;
6667 if (*cse_check_loop_start_value == NULL_RTX
6668 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6669 return;
6671 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6672 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6673 *cse_check_loop_start_value = NULL_RTX;
6676 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6677 a loop that starts with the label at LOOP_START.
6679 If X is a SET, we see if its SET_SRC is currently in our hash table.
6680 If so, we see if it has a value equal to some register used only in the
6681 loop exit code (as marked by jump.c).
6683 If those two conditions are true, we search backwards from the start of
6684 the loop to see if that same value was loaded into a register that still
6685 retains its value at the start of the loop.
6687 If so, we insert an insn after the load to copy the destination of that
6688 load into the equivalent register and (try to) replace our SET_SRC with that
6689 register.
6691 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6693 static void
6694 cse_set_around_loop (x, insn, loop_start)
6695 rtx x;
6696 rtx insn;
6697 rtx loop_start;
6699 struct table_elt *src_elt;
6701 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6702 are setting PC or CC0 or whose SET_SRC is already a register. */
6703 if (GET_CODE (x) == SET
6704 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6705 && GET_CODE (SET_SRC (x)) != REG)
6707 src_elt = lookup (SET_SRC (x),
6708 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6709 GET_MODE (SET_DEST (x)));
6711 if (src_elt)
6712 for (src_elt = src_elt->first_same_value; src_elt;
6713 src_elt = src_elt->next_same_value)
6714 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6715 && COST (src_elt->exp) < COST (SET_SRC (x)))
6717 rtx p, set;
6719 /* Look for an insn in front of LOOP_START that sets
6720 something in the desired mode to SET_SRC (x) before we hit
6721 a label or CALL_INSN. */
6723 for (p = prev_nonnote_insn (loop_start);
6724 p && GET_CODE (p) != CALL_INSN
6725 && GET_CODE (p) != CODE_LABEL;
6726 p = prev_nonnote_insn (p))
6727 if ((set = single_set (p)) != 0
6728 && GET_CODE (SET_DEST (set)) == REG
6729 && GET_MODE (SET_DEST (set)) == src_elt->mode
6730 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6732 /* We now have to ensure that nothing between P
6733 and LOOP_START modified anything referenced in
6734 SET_SRC (x). We know that nothing within the loop
6735 can modify it, or we would have invalidated it in
6736 the hash table. */
6737 rtx q;
6738 rtx cse_check_loop_start_value = SET_SRC (x);
6739 for (q = p; q != loop_start; q = NEXT_INSN (q))
6740 if (INSN_P (q))
6741 note_stores (PATTERN (q),
6742 cse_check_loop_start,
6743 &cse_check_loop_start_value);
6745 /* If nothing was changed and we can replace our
6746 SET_SRC, add an insn after P to copy its destination
6747 to what we will be replacing SET_SRC with. */
6748 if (cse_check_loop_start_value
6749 && validate_change (insn, &SET_SRC (x),
6750 src_elt->exp, 0))
6752 /* If this creates new pseudos, this is unsafe,
6753 because the regno of new pseudo is unsuitable
6754 to index into reg_qty when cse_insn processes
6755 the new insn. Therefore, if a new pseudo was
6756 created, discard this optimization. */
6757 int nregs = max_reg_num ();
6758 rtx move
6759 = gen_move_insn (src_elt->exp, SET_DEST (set));
6760 if (nregs != max_reg_num ())
6762 if (! validate_change (insn, &SET_SRC (x),
6763 SET_SRC (set), 0))
6764 abort ();
6766 else
6767 emit_insn_after (move, p);
6769 break;
6774 /* Deal with the destination of X affecting the stack pointer. */
6775 addr_affects_sp_p (SET_DEST (x));
6777 /* See comment on similar code in cse_insn for explanation of these
6778 tests. */
6779 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6780 || GET_CODE (SET_DEST (x)) == MEM)
6781 invalidate (SET_DEST (x), VOIDmode);
6782 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6783 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6784 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6787 /* Find the end of INSN's basic block and return its range,
6788 the total number of SETs in all the insns of the block, the last insn of the
6789 block, and the branch path.
6791 The branch path indicates which branches should be followed. If a non-zero
6792 path size is specified, the block should be rescanned and a different set
6793 of branches will be taken. The branch path is only used if
6794 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6796 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6797 used to describe the block. It is filled in with the information about
6798 the current block. The incoming structure's branch path, if any, is used
6799 to construct the output branch path. */
6801 void
6802 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6803 rtx insn;
6804 struct cse_basic_block_data *data;
6805 int follow_jumps;
6806 int after_loop;
6807 int skip_blocks;
6809 rtx p = insn, q;
6810 int nsets = 0;
6811 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6812 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6813 int path_size = data->path_size;
6814 int path_entry = 0;
6815 int i;
6817 /* Update the previous branch path, if any. If the last branch was
6818 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6819 shorten the path by one and look at the previous branch. We know that
6820 at least one branch must have been taken if PATH_SIZE is non-zero. */
6821 while (path_size > 0)
6823 if (data->path[path_size - 1].status != NOT_TAKEN)
6825 data->path[path_size - 1].status = NOT_TAKEN;
6826 break;
6828 else
6829 path_size--;
6832 /* If the first instruction is marked with QImode, that means we've
6833 already processed this block. Our caller will look at DATA->LAST
6834 to figure out where to go next. We want to return the next block
6835 in the instruction stream, not some branched-to block somewhere
6836 else. We accomplish this by pretending our called forbid us to
6837 follow jumps, or skip blocks. */
6838 if (GET_MODE (insn) == QImode)
6839 follow_jumps = skip_blocks = 0;
6841 /* Scan to end of this basic block. */
6842 while (p && GET_CODE (p) != CODE_LABEL)
6844 /* Don't cse out the end of a loop. This makes a difference
6845 only for the unusual loops that always execute at least once;
6846 all other loops have labels there so we will stop in any case.
6847 Cse'ing out the end of the loop is dangerous because it
6848 might cause an invariant expression inside the loop
6849 to be reused after the end of the loop. This would make it
6850 hard to move the expression out of the loop in loop.c,
6851 especially if it is one of several equivalent expressions
6852 and loop.c would like to eliminate it.
6854 If we are running after loop.c has finished, we can ignore
6855 the NOTE_INSN_LOOP_END. */
6857 if (! after_loop && GET_CODE (p) == NOTE
6858 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6859 break;
6861 /* Don't cse over a call to setjmp; on some machines (eg vax)
6862 the regs restored by the longjmp come from
6863 a later time than the setjmp. */
6864 if (GET_CODE (p) == NOTE
6865 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6866 break;
6868 /* A PARALLEL can have lots of SETs in it,
6869 especially if it is really an ASM_OPERANDS. */
6870 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6871 nsets += XVECLEN (PATTERN (p), 0);
6872 else if (GET_CODE (p) != NOTE)
6873 nsets += 1;
6875 /* Ignore insns made by CSE; they cannot affect the boundaries of
6876 the basic block. */
6878 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6879 high_cuid = INSN_CUID (p);
6880 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6881 low_cuid = INSN_CUID (p);
6883 /* See if this insn is in our branch path. If it is and we are to
6884 take it, do so. */
6885 if (path_entry < path_size && data->path[path_entry].branch == p)
6887 if (data->path[path_entry].status != NOT_TAKEN)
6888 p = JUMP_LABEL (p);
6890 /* Point to next entry in path, if any. */
6891 path_entry++;
6894 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6895 was specified, we haven't reached our maximum path length, there are
6896 insns following the target of the jump, this is the only use of the
6897 jump label, and the target label is preceded by a BARRIER.
6899 Alternatively, we can follow the jump if it branches around a
6900 block of code and there are no other branches into the block.
6901 In this case invalidate_skipped_block will be called to invalidate any
6902 registers set in the block when following the jump. */
6904 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6905 && GET_CODE (p) == JUMP_INSN
6906 && GET_CODE (PATTERN (p)) == SET
6907 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6908 && JUMP_LABEL (p) != 0
6909 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6910 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6912 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6913 if ((GET_CODE (q) != NOTE
6914 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6915 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6916 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6917 break;
6919 /* If we ran into a BARRIER, this code is an extension of the
6920 basic block when the branch is taken. */
6921 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6923 /* Don't allow ourself to keep walking around an
6924 always-executed loop. */
6925 if (next_real_insn (q) == next)
6927 p = NEXT_INSN (p);
6928 continue;
6931 /* Similarly, don't put a branch in our path more than once. */
6932 for (i = 0; i < path_entry; i++)
6933 if (data->path[i].branch == p)
6934 break;
6936 if (i != path_entry)
6937 break;
6939 data->path[path_entry].branch = p;
6940 data->path[path_entry++].status = TAKEN;
6942 /* This branch now ends our path. It was possible that we
6943 didn't see this branch the last time around (when the
6944 insn in front of the target was a JUMP_INSN that was
6945 turned into a no-op). */
6946 path_size = path_entry;
6948 p = JUMP_LABEL (p);
6949 /* Mark block so we won't scan it again later. */
6950 PUT_MODE (NEXT_INSN (p), QImode);
6952 /* Detect a branch around a block of code. */
6953 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6955 register rtx tmp;
6957 if (next_real_insn (q) == next)
6959 p = NEXT_INSN (p);
6960 continue;
6963 for (i = 0; i < path_entry; i++)
6964 if (data->path[i].branch == p)
6965 break;
6967 if (i != path_entry)
6968 break;
6970 /* This is no_labels_between_p (p, q) with an added check for
6971 reaching the end of a function (in case Q precedes P). */
6972 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6973 if (GET_CODE (tmp) == CODE_LABEL)
6974 break;
6976 if (tmp == q)
6978 data->path[path_entry].branch = p;
6979 data->path[path_entry++].status = AROUND;
6981 path_size = path_entry;
6983 p = JUMP_LABEL (p);
6984 /* Mark block so we won't scan it again later. */
6985 PUT_MODE (NEXT_INSN (p), QImode);
6989 p = NEXT_INSN (p);
6992 data->low_cuid = low_cuid;
6993 data->high_cuid = high_cuid;
6994 data->nsets = nsets;
6995 data->last = p;
6997 /* If all jumps in the path are not taken, set our path length to zero
6998 so a rescan won't be done. */
6999 for (i = path_size - 1; i >= 0; i--)
7000 if (data->path[i].status != NOT_TAKEN)
7001 break;
7003 if (i == -1)
7004 data->path_size = 0;
7005 else
7006 data->path_size = path_size;
7008 /* End the current branch path. */
7009 data->path[path_size].branch = 0;
7012 /* Perform cse on the instructions of a function.
7013 F is the first instruction.
7014 NREGS is one plus the highest pseudo-reg number used in the instruction.
7016 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7017 (only if -frerun-cse-after-loop).
7019 Returns 1 if jump_optimize should be redone due to simplifications
7020 in conditional jump instructions. */
7023 cse_main (f, nregs, after_loop, file)
7024 rtx f;
7025 int nregs;
7026 int after_loop;
7027 FILE *file;
7029 struct cse_basic_block_data val;
7030 register rtx insn = f;
7031 register int i;
7033 cse_jumps_altered = 0;
7034 recorded_label_ref = 0;
7035 constant_pool_entries_cost = 0;
7036 val.path_size = 0;
7038 init_recog ();
7039 init_alias_analysis ();
7041 max_reg = nregs;
7043 max_insn_uid = get_max_uid ();
7045 reg_eqv_table = (struct reg_eqv_elem *)
7046 xmalloc (nregs * sizeof (struct reg_eqv_elem));
7048 #ifdef LOAD_EXTEND_OP
7050 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7051 and change the code and mode as appropriate. */
7052 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7053 #endif
7055 /* Reset the counter indicating how many elements have been made
7056 thus far. */
7057 n_elements_made = 0;
7059 /* Find the largest uid. */
7061 max_uid = get_max_uid ();
7062 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
7064 /* Compute the mapping from uids to cuids.
7065 CUIDs are numbers assigned to insns, like uids,
7066 except that cuids increase monotonically through the code.
7067 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7068 between two insns is not affected by -g. */
7070 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7072 if (GET_CODE (insn) != NOTE
7073 || NOTE_LINE_NUMBER (insn) < 0)
7074 INSN_CUID (insn) = ++i;
7075 else
7076 /* Give a line number note the same cuid as preceding insn. */
7077 INSN_CUID (insn) = i;
7080 /* Initialize which registers are clobbered by calls. */
7082 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
7084 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
7085 if ((call_used_regs[i]
7086 /* Used to check !fixed_regs[i] here, but that isn't safe;
7087 fixed regs are still call-clobbered, and sched can get
7088 confused if they can "live across calls".
7090 The frame pointer is always preserved across calls. The arg
7091 pointer is if it is fixed. The stack pointer usually is, unless
7092 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7093 will be present. If we are generating PIC code, the PIC offset
7094 table register is preserved across calls. */
7096 && i != STACK_POINTER_REGNUM
7097 && i != FRAME_POINTER_REGNUM
7098 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
7099 && i != HARD_FRAME_POINTER_REGNUM
7100 #endif
7101 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7102 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
7103 #endif
7104 #if !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
7105 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
7106 #endif
7108 || global_regs[i])
7109 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
7111 ggc_push_context ();
7113 /* Loop over basic blocks.
7114 Compute the maximum number of qty's needed for each basic block
7115 (which is 2 for each SET). */
7116 insn = f;
7117 while (insn)
7119 cse_altered = 0;
7120 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7121 flag_cse_skip_blocks);
7123 /* If this basic block was already processed or has no sets, skip it. */
7124 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7126 PUT_MODE (insn, VOIDmode);
7127 insn = (val.last ? NEXT_INSN (val.last) : 0);
7128 val.path_size = 0;
7129 continue;
7132 cse_basic_block_start = val.low_cuid;
7133 cse_basic_block_end = val.high_cuid;
7134 max_qty = val.nsets * 2;
7136 if (file)
7137 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7138 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7139 val.nsets);
7141 /* Make MAX_QTY bigger to give us room to optimize
7142 past the end of this basic block, if that should prove useful. */
7143 if (max_qty < 500)
7144 max_qty = 500;
7146 max_qty += max_reg;
7148 /* If this basic block is being extended by following certain jumps,
7149 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7150 Otherwise, we start after this basic block. */
7151 if (val.path_size > 0)
7152 cse_basic_block (insn, val.last, val.path, 0);
7153 else
7155 int old_cse_jumps_altered = cse_jumps_altered;
7156 rtx temp;
7158 /* When cse changes a conditional jump to an unconditional
7159 jump, we want to reprocess the block, since it will give
7160 us a new branch path to investigate. */
7161 cse_jumps_altered = 0;
7162 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7163 if (cse_jumps_altered == 0
7164 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7165 insn = temp;
7167 cse_jumps_altered |= old_cse_jumps_altered;
7170 if (cse_altered)
7171 ggc_collect ();
7173 #ifdef USE_C_ALLOCA
7174 alloca (0);
7175 #endif
7178 ggc_pop_context ();
7180 if (max_elements_made < n_elements_made)
7181 max_elements_made = n_elements_made;
7183 /* Clean up. */
7184 end_alias_analysis ();
7185 free (uid_cuid);
7186 free (reg_eqv_table);
7188 return cse_jumps_altered || recorded_label_ref;
7191 /* Process a single basic block. FROM and TO and the limits of the basic
7192 block. NEXT_BRANCH points to the branch path when following jumps or
7193 a null path when not following jumps.
7195 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7196 loop. This is true when we are being called for the last time on a
7197 block and this CSE pass is before loop.c. */
7199 static rtx
7200 cse_basic_block (from, to, next_branch, around_loop)
7201 register rtx from, to;
7202 struct branch_path *next_branch;
7203 int around_loop;
7205 register rtx insn;
7206 int to_usage = 0;
7207 rtx libcall_insn = NULL_RTX;
7208 int num_insns = 0;
7210 /* This array is undefined before max_reg, so only allocate
7211 the space actually needed and adjust the start. */
7213 qty_table
7214 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
7215 * sizeof (struct qty_table_elem));
7216 qty_table -= max_reg;
7218 new_basic_block ();
7220 /* TO might be a label. If so, protect it from being deleted. */
7221 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7222 ++LABEL_NUSES (to);
7224 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7226 register enum rtx_code code = GET_CODE (insn);
7228 /* If we have processed 1,000 insns, flush the hash table to
7229 avoid extreme quadratic behavior. We must not include NOTEs
7230 in the count since there may be more of them when generating
7231 debugging information. If we clear the table at different
7232 times, code generated with -g -O might be different than code
7233 generated with -O but not -g.
7235 ??? This is a real kludge and needs to be done some other way.
7236 Perhaps for 2.9. */
7237 if (code != NOTE && num_insns++ > 1000)
7239 flush_hash_table ();
7240 num_insns = 0;
7243 /* See if this is a branch that is part of the path. If so, and it is
7244 to be taken, do so. */
7245 if (next_branch->branch == insn)
7247 enum taken status = next_branch++->status;
7248 if (status != NOT_TAKEN)
7250 if (status == TAKEN)
7251 record_jump_equiv (insn, 1);
7252 else
7253 invalidate_skipped_block (NEXT_INSN (insn));
7255 /* Set the last insn as the jump insn; it doesn't affect cc0.
7256 Then follow this branch. */
7257 #ifdef HAVE_cc0
7258 prev_insn_cc0 = 0;
7259 #endif
7260 prev_insn = insn;
7261 insn = JUMP_LABEL (insn);
7262 continue;
7266 if (GET_MODE (insn) == QImode)
7267 PUT_MODE (insn, VOIDmode);
7269 if (GET_RTX_CLASS (code) == 'i')
7271 rtx p;
7273 /* Process notes first so we have all notes in canonical forms when
7274 looking for duplicate operations. */
7276 if (REG_NOTES (insn))
7277 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7279 /* Track when we are inside in LIBCALL block. Inside such a block,
7280 we do not want to record destinations. The last insn of a
7281 LIBCALL block is not considered to be part of the block, since
7282 its destination is the result of the block and hence should be
7283 recorded. */
7285 if (REG_NOTES (insn) != 0)
7287 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7288 libcall_insn = XEXP (p, 0);
7289 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7290 libcall_insn = 0;
7293 new_label_ref = 0;
7294 cse_insn (insn, libcall_insn);
7296 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL
7297 note for it, we must rerun jump since it needs to place the
7298 note. If this is a LABEL_REF for a CODE_LABEL that isn't in
7299 the insn chain, don't do this since no REG_LABEL will be added. */
7300 if (new_label_ref != 0 && INSN_UID (XEXP (new_label_ref, 0)) != 0
7301 && reg_mentioned_p (new_label_ref, PATTERN (insn))
7302 && ! find_reg_note (insn, REG_LABEL, XEXP (new_label_ref, 0)))
7303 recorded_label_ref = 1;
7306 /* If INSN is now an unconditional jump, skip to the end of our
7307 basic block by pretending that we just did the last insn in the
7308 basic block. If we are jumping to the end of our block, show
7309 that we can have one usage of TO. */
7311 if (any_uncondjump_p (insn))
7313 if (to == 0)
7315 free (qty_table + max_reg);
7316 return 0;
7319 if (JUMP_LABEL (insn) == to)
7320 to_usage = 1;
7322 /* Maybe TO was deleted because the jump is unconditional.
7323 If so, there is nothing left in this basic block. */
7324 /* ??? Perhaps it would be smarter to set TO
7325 to whatever follows this insn,
7326 and pretend the basic block had always ended here. */
7327 if (INSN_DELETED_P (to))
7328 break;
7330 insn = PREV_INSN (to);
7333 /* See if it is ok to keep on going past the label
7334 which used to end our basic block. Remember that we incremented
7335 the count of that label, so we decrement it here. If we made
7336 a jump unconditional, TO_USAGE will be one; in that case, we don't
7337 want to count the use in that jump. */
7339 if (to != 0 && NEXT_INSN (insn) == to
7340 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7342 struct cse_basic_block_data val;
7343 rtx prev;
7345 insn = NEXT_INSN (to);
7347 /* If TO was the last insn in the function, we are done. */
7348 if (insn == 0)
7350 free (qty_table + max_reg);
7351 return 0;
7354 /* If TO was preceded by a BARRIER we are done with this block
7355 because it has no continuation. */
7356 prev = prev_nonnote_insn (to);
7357 if (prev && GET_CODE (prev) == BARRIER)
7359 free (qty_table + max_reg);
7360 return insn;
7363 /* Find the end of the following block. Note that we won't be
7364 following branches in this case. */
7365 to_usage = 0;
7366 val.path_size = 0;
7367 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7369 /* If the tables we allocated have enough space left
7370 to handle all the SETs in the next basic block,
7371 continue through it. Otherwise, return,
7372 and that block will be scanned individually. */
7373 if (val.nsets * 2 + next_qty > max_qty)
7374 break;
7376 cse_basic_block_start = val.low_cuid;
7377 cse_basic_block_end = val.high_cuid;
7378 to = val.last;
7380 /* Prevent TO from being deleted if it is a label. */
7381 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7382 ++LABEL_NUSES (to);
7384 /* Back up so we process the first insn in the extension. */
7385 insn = PREV_INSN (insn);
7389 if (next_qty > max_qty)
7390 abort ();
7392 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7393 the previous insn is the only insn that branches to the head of a loop,
7394 we can cse into the loop. Don't do this if we changed the jump
7395 structure of a loop unless we aren't going to be following jumps. */
7397 if ((cse_jumps_altered == 0
7398 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7399 && around_loop && to != 0
7400 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7401 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7402 && JUMP_LABEL (PREV_INSN (to)) != 0
7403 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7404 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7406 free (qty_table + max_reg);
7408 return to ? NEXT_INSN (to) : 0;
7411 /* Count the number of times registers are used (not set) in X.
7412 COUNTS is an array in which we accumulate the count, INCR is how much
7413 we count each register usage.
7415 Don't count a usage of DEST, which is the SET_DEST of a SET which
7416 contains X in its SET_SRC. This is because such a SET does not
7417 modify the liveness of DEST. */
7419 static void
7420 count_reg_usage (x, counts, dest, incr)
7421 rtx x;
7422 int *counts;
7423 rtx dest;
7424 int incr;
7426 enum rtx_code code;
7427 const char *fmt;
7428 int i, j;
7430 if (x == 0)
7431 return;
7433 switch (code = GET_CODE (x))
7435 case REG:
7436 if (x != dest)
7437 counts[REGNO (x)] += incr;
7438 return;
7440 case PC:
7441 case CC0:
7442 case CONST:
7443 case CONST_INT:
7444 case CONST_DOUBLE:
7445 case SYMBOL_REF:
7446 case LABEL_REF:
7447 return;
7449 case CLOBBER:
7450 /* If we are clobbering a MEM, mark any registers inside the address
7451 as being used. */
7452 if (GET_CODE (XEXP (x, 0)) == MEM)
7453 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7454 return;
7456 case SET:
7457 /* Unless we are setting a REG, count everything in SET_DEST. */
7458 if (GET_CODE (SET_DEST (x)) != REG)
7459 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7461 /* If SRC has side-effects, then we can't delete this insn, so the
7462 usage of SET_DEST inside SRC counts.
7464 ??? Strictly-speaking, we might be preserving this insn
7465 because some other SET has side-effects, but that's hard
7466 to do and can't happen now. */
7467 count_reg_usage (SET_SRC (x), counts,
7468 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7469 incr);
7470 return;
7472 case CALL_INSN:
7473 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7474 /* Fall through. */
7476 case INSN:
7477 case JUMP_INSN:
7478 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7480 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7481 use them. */
7483 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7484 return;
7486 case EXPR_LIST:
7487 case INSN_LIST:
7488 if (REG_NOTE_KIND (x) == REG_EQUAL
7489 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7490 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7491 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7492 return;
7494 default:
7495 break;
7498 fmt = GET_RTX_FORMAT (code);
7499 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7501 if (fmt[i] == 'e')
7502 count_reg_usage (XEXP (x, i), counts, dest, incr);
7503 else if (fmt[i] == 'E')
7504 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7505 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7509 /* Scan all the insns and delete any that are dead; i.e., they store a register
7510 that is never used or they copy a register to itself.
7512 This is used to remove insns made obviously dead by cse, loop or other
7513 optimizations. It improves the heuristics in loop since it won't try to
7514 move dead invariants out of loops or make givs for dead quantities. The
7515 remaining passes of the compilation are also sped up. */
7517 void
7518 delete_trivially_dead_insns (insns, nreg)
7519 rtx insns;
7520 int nreg;
7522 int *counts;
7523 rtx insn, prev;
7524 #ifdef HAVE_cc0
7525 rtx tem;
7526 #endif
7527 int i;
7528 int in_libcall = 0, dead_libcall = 0;
7530 /* First count the number of times each register is used. */
7531 counts = (int *) xcalloc (nreg, sizeof (int));
7532 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7533 count_reg_usage (insn, counts, NULL_RTX, 1);
7535 /* Go from the last insn to the first and delete insns that only set unused
7536 registers or copy a register to itself. As we delete an insn, remove
7537 usage counts for registers it uses.
7539 The first jump optimization pass may leave a real insn as the last
7540 insn in the function. We must not skip that insn or we may end
7541 up deleting code that is not really dead. */
7542 insn = get_last_insn ();
7543 if (! INSN_P (insn))
7544 insn = prev_real_insn (insn);
7546 for (; insn; insn = prev)
7548 int live_insn = 0;
7549 rtx note;
7551 prev = prev_real_insn (insn);
7553 /* Don't delete any insns that are part of a libcall block unless
7554 we can delete the whole libcall block.
7556 Flow or loop might get confused if we did that. Remember
7557 that we are scanning backwards. */
7558 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7560 in_libcall = 1;
7561 live_insn = 1;
7562 dead_libcall = 0;
7564 /* See if there's a REG_EQUAL note on this insn and try to
7565 replace the source with the REG_EQUAL expression.
7567 We assume that insns with REG_RETVALs can only be reg->reg
7568 copies at this point. */
7569 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7570 if (note)
7572 rtx set = single_set (insn);
7573 rtx new = simplify_rtx (XEXP (note, 0));
7575 if (!new)
7576 new = XEXP (note, 0);
7578 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7580 remove_note (insn,
7581 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7582 dead_libcall = 1;
7586 else if (in_libcall)
7587 live_insn = ! dead_libcall;
7588 else if (GET_CODE (PATTERN (insn)) == SET)
7590 if (set_noop_p (PATTERN (insn)))
7593 #ifdef HAVE_cc0
7594 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7595 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7596 && ((tem = next_nonnote_insn (insn)) == 0
7597 || ! INSN_P (tem)
7598 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7600 #endif
7601 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7602 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7603 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7604 || side_effects_p (SET_SRC (PATTERN (insn)))
7605 /* An ADDRESSOF expression can turn into a use of the
7606 internal arg pointer, so always consider the
7607 internal arg pointer live. If it is truly dead,
7608 flow will delete the initializing insn. */
7609 || (SET_DEST (PATTERN (insn))
7610 == current_function_internal_arg_pointer))
7611 live_insn = 1;
7613 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7614 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7616 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7618 if (GET_CODE (elt) == SET)
7620 if (set_noop_p (elt))
7623 #ifdef HAVE_cc0
7624 else if (GET_CODE (SET_DEST (elt)) == CC0
7625 && ! side_effects_p (SET_SRC (elt))
7626 && ((tem = next_nonnote_insn (insn)) == 0
7627 || ! INSN_P (tem)
7628 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7630 #endif
7631 else if (GET_CODE (SET_DEST (elt)) != REG
7632 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7633 || counts[REGNO (SET_DEST (elt))] != 0
7634 || side_effects_p (SET_SRC (elt))
7635 /* An ADDRESSOF expression can turn into a use of the
7636 internal arg pointer, so always consider the
7637 internal arg pointer live. If it is truly dead,
7638 flow will delete the initializing insn. */
7639 || (SET_DEST (elt)
7640 == current_function_internal_arg_pointer))
7641 live_insn = 1;
7643 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7644 live_insn = 1;
7646 else
7647 live_insn = 1;
7649 /* If this is a dead insn, delete it and show registers in it aren't
7650 being used. */
7652 if (! live_insn)
7654 count_reg_usage (insn, counts, NULL_RTX, -1);
7655 delete_insn (insn);
7658 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7660 in_libcall = 0;
7661 dead_libcall = 0;
7665 /* Clean up. */
7666 free (counts);