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[official-gcc.git] / gcc / caller-save.c
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1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "rtl.h"
25 #include "regs.h"
26 #include "insn-config.h"
27 #include "flags.h"
28 #include "hard-reg-set.h"
29 #include "recog.h"
30 #include "predict.h"
31 #include "vec.h"
32 #include "hashtab.h"
33 #include "hash-set.h"
34 #include "machmode.h"
35 #include "input.h"
36 #include "function.h"
37 #include "dominance.h"
38 #include "cfg.h"
39 #include "basic-block.h"
40 #include "df.h"
41 #include "reload.h"
42 #include "expr.h"
43 #include "diagnostic-core.h"
44 #include "tm_p.h"
45 #include "addresses.h"
46 #include "ggc.h"
47 #include "dumpfile.h"
48 #include "rtl-iter.h"
50 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
52 #define regno_save_mode \
53 (this_target_reload->x_regno_save_mode)
54 #define cached_reg_save_code \
55 (this_target_reload->x_cached_reg_save_code)
56 #define cached_reg_restore_code \
57 (this_target_reload->x_cached_reg_restore_code)
59 /* For each hard register, a place on the stack where it can be saved,
60 if needed. */
62 static rtx
63 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
65 /* The number of elements in the subsequent array. */
66 static int save_slots_num;
68 /* Allocated slots so far. */
69 static rtx save_slots[FIRST_PSEUDO_REGISTER];
71 /* Set of hard regs currently residing in save area (during insn scan). */
73 static HARD_REG_SET hard_regs_saved;
75 /* Number of registers currently in hard_regs_saved. */
77 static int n_regs_saved;
79 /* Computed by mark_referenced_regs, all regs referenced in a given
80 insn. */
81 static HARD_REG_SET referenced_regs;
84 typedef void refmarker_fn (rtx *loc, machine_mode mode, int hardregno,
85 void *mark_arg);
87 static int reg_save_code (int, machine_mode);
88 static int reg_restore_code (int, machine_mode);
90 struct saved_hard_reg;
91 static void initiate_saved_hard_regs (void);
92 static void new_saved_hard_reg (int, int);
93 static void finish_saved_hard_regs (void);
94 static int saved_hard_reg_compare_func (const void *, const void *);
96 static void mark_set_regs (rtx, const_rtx, void *);
97 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg);
98 static refmarker_fn mark_reg_as_referenced;
99 static refmarker_fn replace_reg_with_saved_mem;
100 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
101 machine_mode *);
102 static int insert_restore (struct insn_chain *, int, int, int,
103 machine_mode *);
104 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
105 rtx);
106 static void add_stored_regs (rtx, const_rtx, void *);
110 static GTY(()) rtx savepat;
111 static GTY(()) rtx restpat;
112 static GTY(()) rtx test_reg;
113 static GTY(()) rtx test_mem;
114 static GTY(()) rtx_insn *saveinsn;
115 static GTY(()) rtx_insn *restinsn;
117 /* Return the INSN_CODE used to save register REG in mode MODE. */
118 static int
119 reg_save_code (int reg, machine_mode mode)
121 bool ok;
122 if (cached_reg_save_code[reg][mode])
123 return cached_reg_save_code[reg][mode];
124 if (!HARD_REGNO_MODE_OK (reg, mode))
126 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation
127 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert
128 below silences a warning. */
129 gcc_assert (reg < FIRST_PSEUDO_REGISTER);
130 cached_reg_save_code[reg][mode] = -1;
131 cached_reg_restore_code[reg][mode] = -1;
132 return -1;
135 /* Update the register number and modes of the register
136 and memory operand. */
137 SET_REGNO_RAW (test_reg, reg);
138 PUT_MODE (test_reg, mode);
139 PUT_MODE (test_mem, mode);
141 /* Force re-recognition of the modified insns. */
142 INSN_CODE (saveinsn) = -1;
143 INSN_CODE (restinsn) = -1;
145 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
146 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
148 /* Now extract both insns and see if we can meet their
149 constraints. We don't know here whether the save and restore will
150 be in size- or speed-tuned code, so just use the set of enabled
151 alternatives. */
152 ok = (cached_reg_save_code[reg][mode] != -1
153 && cached_reg_restore_code[reg][mode] != -1);
154 if (ok)
156 extract_insn (saveinsn);
157 ok = constrain_operands (1, get_enabled_alternatives (saveinsn));
158 extract_insn (restinsn);
159 ok &= constrain_operands (1, get_enabled_alternatives (restinsn));
162 if (! ok)
164 cached_reg_save_code[reg][mode] = -1;
165 cached_reg_restore_code[reg][mode] = -1;
167 gcc_assert (cached_reg_save_code[reg][mode]);
168 return cached_reg_save_code[reg][mode];
171 /* Return the INSN_CODE used to restore register REG in mode MODE. */
172 static int
173 reg_restore_code (int reg, machine_mode mode)
175 if (cached_reg_restore_code[reg][mode])
176 return cached_reg_restore_code[reg][mode];
177 /* Populate our cache. */
178 reg_save_code (reg, mode);
179 return cached_reg_restore_code[reg][mode];
182 /* Initialize for caller-save.
184 Look at all the hard registers that are used by a call and for which
185 reginfo.c has not already excluded from being used across a call.
187 Ensure that we can find a mode to save the register and that there is a
188 simple insn to save and restore the register. This latter check avoids
189 problems that would occur if we tried to save the MQ register of some
190 machines directly into memory. */
192 void
193 init_caller_save (void)
195 rtx addr_reg;
196 int offset;
197 rtx address;
198 int i, j;
200 if (caller_save_initialized_p)
201 return;
203 caller_save_initialized_p = true;
205 CLEAR_HARD_REG_SET (no_caller_save_reg_set);
206 /* First find all the registers that we need to deal with and all
207 the modes that they can have. If we can't find a mode to use,
208 we can't have the register live over calls. */
210 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
212 if (call_used_regs[i]
213 && !TEST_HARD_REG_BIT (call_fixed_reg_set, i))
215 for (j = 1; j <= MOVE_MAX_WORDS; j++)
217 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
218 VOIDmode);
219 if (regno_save_mode[i][j] == VOIDmode && j == 1)
221 SET_HARD_REG_BIT (call_fixed_reg_set, i);
225 else
226 regno_save_mode[i][1] = VOIDmode;
229 /* The following code tries to approximate the conditions under which
230 we can easily save and restore a register without scratch registers or
231 other complexities. It will usually work, except under conditions where
232 the validity of an insn operand is dependent on the address offset.
233 No such cases are currently known.
235 We first find a typical offset from some BASE_REG_CLASS register.
236 This address is chosen by finding the first register in the class
237 and by finding the smallest power of two that is a valid offset from
238 that register in every mode we will use to save registers. */
240 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
241 if (TEST_HARD_REG_BIT
242 (reg_class_contents
243 [(int) base_reg_class (regno_save_mode[i][1], ADDR_SPACE_GENERIC,
244 PLUS, CONST_INT)], i))
245 break;
247 gcc_assert (i < FIRST_PSEUDO_REGISTER);
249 addr_reg = gen_rtx_REG (Pmode, i);
251 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
253 address = gen_rtx_PLUS (Pmode, addr_reg, gen_int_mode (offset, Pmode));
255 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
256 if (regno_save_mode[i][1] != VOIDmode
257 && ! strict_memory_address_p (regno_save_mode[i][1], address))
258 break;
260 if (i == FIRST_PSEUDO_REGISTER)
261 break;
264 /* If we didn't find a valid address, we must use register indirect. */
265 if (offset == 0)
266 address = addr_reg;
268 /* Next we try to form an insn to save and restore the register. We
269 see if such an insn is recognized and meets its constraints.
271 To avoid lots of unnecessary RTL allocation, we construct all the RTL
272 once, then modify the memory and register operands in-place. */
274 test_reg = gen_rtx_REG (VOIDmode, 0);
275 test_mem = gen_rtx_MEM (VOIDmode, address);
276 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
277 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
279 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, savepat, 0, -1, 0);
280 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, restpat, 0, -1, 0);
282 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
283 for (j = 1; j <= MOVE_MAX_WORDS; j++)
284 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
286 regno_save_mode[i][j] = VOIDmode;
287 if (j == 1)
289 SET_HARD_REG_BIT (call_fixed_reg_set, i);
290 if (call_used_regs[i])
291 SET_HARD_REG_BIT (no_caller_save_reg_set, i);
298 /* Initialize save areas by showing that we haven't allocated any yet. */
300 void
301 init_save_areas (void)
303 int i, j;
305 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
306 for (j = 1; j <= MOVE_MAX_WORDS; j++)
307 regno_save_mem[i][j] = 0;
308 save_slots_num = 0;
312 /* The structure represents a hard register which should be saved
313 through the call. It is used when the integrated register
314 allocator (IRA) is used and sharing save slots is on. */
315 struct saved_hard_reg
317 /* Order number starting with 0. */
318 int num;
319 /* The hard regno. */
320 int hard_regno;
321 /* Execution frequency of all calls through which given hard
322 register should be saved. */
323 int call_freq;
324 /* Stack slot reserved to save the hard register through calls. */
325 rtx slot;
326 /* True if it is first hard register in the chain of hard registers
327 sharing the same stack slot. */
328 int first_p;
329 /* Order number of the next hard register structure with the same
330 slot in the chain. -1 represents end of the chain. */
331 int next;
334 /* Map: hard register number to the corresponding structure. */
335 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];
337 /* The number of all structures representing hard registers should be
338 saved, in order words, the number of used elements in the following
339 array. */
340 static int saved_regs_num;
342 /* Pointers to all the structures. Index is the order number of the
343 corresponding structure. */
344 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];
346 /* First called function for work with saved hard registers. */
347 static void
348 initiate_saved_hard_regs (void)
350 int i;
352 saved_regs_num = 0;
353 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
354 hard_reg_map[i] = NULL;
357 /* Allocate and return new saved hard register with given REGNO and
358 CALL_FREQ. */
359 static void
360 new_saved_hard_reg (int regno, int call_freq)
362 struct saved_hard_reg *saved_reg;
364 saved_reg
365 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));
366 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;
367 saved_reg->num = saved_regs_num++;
368 saved_reg->hard_regno = regno;
369 saved_reg->call_freq = call_freq;
370 saved_reg->first_p = FALSE;
371 saved_reg->next = -1;
374 /* Free memory allocated for the saved hard registers. */
375 static void
376 finish_saved_hard_regs (void)
378 int i;
380 for (i = 0; i < saved_regs_num; i++)
381 free (all_saved_regs[i]);
384 /* The function is used to sort the saved hard register structures
385 according their frequency. */
386 static int
387 saved_hard_reg_compare_func (const void *v1p, const void *v2p)
389 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;
390 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;
392 if (flag_omit_frame_pointer)
394 if (p1->call_freq - p2->call_freq != 0)
395 return p1->call_freq - p2->call_freq;
397 else if (p2->call_freq - p1->call_freq != 0)
398 return p2->call_freq - p1->call_freq;
400 return p1->num - p2->num;
403 /* Allocate save areas for any hard registers that might need saving.
404 We take a conservative approach here and look for call-clobbered hard
405 registers that are assigned to pseudos that cross calls. This may
406 overestimate slightly (especially if some of these registers are later
407 used as spill registers), but it should not be significant.
409 For IRA we use priority coloring to decrease stack slots needed for
410 saving hard registers through calls. We build conflicts for them
411 to do coloring.
413 Future work:
415 In the fallback case we should iterate backwards across all possible
416 modes for the save, choosing the largest available one instead of
417 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
419 We do not try to use "move multiple" instructions that exist
420 on some machines (such as the 68k moveml). It could be a win to try
421 and use them when possible. The hard part is doing it in a way that is
422 machine independent since they might be saving non-consecutive
423 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
425 void
426 setup_save_areas (void)
428 int i, j, k, freq;
429 HARD_REG_SET hard_regs_used;
430 struct saved_hard_reg *saved_reg;
431 rtx_insn *insn;
432 struct insn_chain *chain, *next;
433 unsigned int regno;
434 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
435 reg_set_iterator rsi;
437 CLEAR_HARD_REG_SET (hard_regs_used);
439 /* Find every CALL_INSN and record which hard regs are live across the
440 call into HARD_REG_MAP and HARD_REGS_USED. */
441 initiate_saved_hard_regs ();
442 /* Create hard reg saved regs. */
443 for (chain = reload_insn_chain; chain != 0; chain = next)
445 rtx cheap;
447 insn = chain->insn;
448 next = chain->next;
449 if (!CALL_P (insn)
450 || find_reg_note (insn, REG_NORETURN, NULL))
451 continue;
452 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
453 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
454 &chain->live_throughout);
455 get_call_reg_set_usage (insn, &used_regs, call_used_reg_set);
457 /* Record all registers set in this call insn. These don't
458 need to be saved. N.B. the call insn might set a subreg
459 of a multi-hard-reg pseudo; then the pseudo is considered
460 live during the call, but the subreg that is set
461 isn't. */
462 CLEAR_HARD_REG_SET (this_insn_sets);
463 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
464 /* Sibcalls are considered to set the return value. */
465 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
466 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
468 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
469 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
470 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
471 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
472 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
474 if (hard_reg_map[regno] != NULL)
475 hard_reg_map[regno]->call_freq += freq;
476 else
477 new_saved_hard_reg (regno, freq);
478 SET_HARD_REG_BIT (hard_regs_used, regno);
480 cheap = find_reg_note (insn, REG_RETURNED, NULL);
481 if (cheap)
482 cheap = XEXP (cheap, 0);
483 /* Look through all live pseudos, mark their hard registers. */
484 EXECUTE_IF_SET_IN_REG_SET
485 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
487 int r = reg_renumber[regno];
488 int bound;
490 if (r < 0 || regno_reg_rtx[regno] == cheap)
491 continue;
493 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
494 for (; r < bound; r++)
495 if (TEST_HARD_REG_BIT (used_regs, r))
497 if (hard_reg_map[r] != NULL)
498 hard_reg_map[r]->call_freq += freq;
499 else
500 new_saved_hard_reg (r, freq);
501 SET_HARD_REG_BIT (hard_regs_to_save, r);
502 SET_HARD_REG_BIT (hard_regs_used, r);
507 /* If requested, figure out which hard regs can share save slots. */
508 if (optimize && flag_ira_share_save_slots)
510 rtx slot;
511 char *saved_reg_conflicts;
512 int next_k;
513 struct saved_hard_reg *saved_reg2, *saved_reg3;
514 int call_saved_regs_num;
515 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];
516 int best_slot_num;
517 int prev_save_slots_num;
518 rtx prev_save_slots[FIRST_PSEUDO_REGISTER];
520 /* Find saved hard register conflicts. */
521 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);
522 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);
523 for (chain = reload_insn_chain; chain != 0; chain = next)
525 rtx cheap;
526 call_saved_regs_num = 0;
527 insn = chain->insn;
528 next = chain->next;
529 if (!CALL_P (insn)
530 || find_reg_note (insn, REG_NORETURN, NULL))
531 continue;
533 cheap = find_reg_note (insn, REG_RETURNED, NULL);
534 if (cheap)
535 cheap = XEXP (cheap, 0);
537 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
538 &chain->live_throughout);
539 get_call_reg_set_usage (insn, &used_regs, call_used_reg_set);
541 /* Record all registers set in this call insn. These don't
542 need to be saved. N.B. the call insn might set a subreg
543 of a multi-hard-reg pseudo; then the pseudo is considered
544 live during the call, but the subreg that is set
545 isn't. */
546 CLEAR_HARD_REG_SET (this_insn_sets);
547 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
548 /* Sibcalls are considered to set the return value,
549 compare df-scan.c:df_get_call_refs. */
550 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
551 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
553 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
554 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
555 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
556 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
557 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
559 gcc_assert (hard_reg_map[regno] != NULL);
560 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];
562 /* Look through all live pseudos, mark their hard registers. */
563 EXECUTE_IF_SET_IN_REG_SET
564 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
566 int r = reg_renumber[regno];
567 int bound;
569 if (r < 0 || regno_reg_rtx[regno] == cheap)
570 continue;
572 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
573 for (; r < bound; r++)
574 if (TEST_HARD_REG_BIT (used_regs, r))
575 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];
577 for (i = 0; i < call_saved_regs_num; i++)
579 saved_reg = call_saved_regs[i];
580 for (j = 0; j < call_saved_regs_num; j++)
581 if (i != j)
583 saved_reg2 = call_saved_regs[j];
584 saved_reg_conflicts[saved_reg->num * saved_regs_num
585 + saved_reg2->num]
586 = saved_reg_conflicts[saved_reg2->num * saved_regs_num
587 + saved_reg->num]
588 = TRUE;
592 /* Sort saved hard regs. */
593 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),
594 saved_hard_reg_compare_func);
595 /* Initiate slots available from the previous reload
596 iteration. */
597 prev_save_slots_num = save_slots_num;
598 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));
599 save_slots_num = 0;
600 /* Allocate stack slots for the saved hard registers. */
601 for (i = 0; i < saved_regs_num; i++)
603 saved_reg = all_saved_regs[i];
604 regno = saved_reg->hard_regno;
605 for (j = 0; j < i; j++)
607 saved_reg2 = all_saved_regs[j];
608 if (! saved_reg2->first_p)
609 continue;
610 slot = saved_reg2->slot;
611 for (k = j; k >= 0; k = next_k)
613 saved_reg3 = all_saved_regs[k];
614 next_k = saved_reg3->next;
615 if (saved_reg_conflicts[saved_reg->num * saved_regs_num
616 + saved_reg3->num])
617 break;
619 if (k < 0
620 && (GET_MODE_SIZE (regno_save_mode[regno][1])
621 <= GET_MODE_SIZE (regno_save_mode
622 [saved_reg2->hard_regno][1])))
624 saved_reg->slot
625 = adjust_address_nv
626 (slot, regno_save_mode[saved_reg->hard_regno][1], 0);
627 regno_save_mem[regno][1] = saved_reg->slot;
628 saved_reg->next = saved_reg2->next;
629 saved_reg2->next = i;
630 if (dump_file != NULL)
631 fprintf (dump_file, "%d uses slot of %d\n",
632 regno, saved_reg2->hard_regno);
633 break;
636 if (j == i)
638 saved_reg->first_p = TRUE;
639 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)
641 slot = prev_save_slots[j];
642 if (slot == NULL_RTX)
643 continue;
644 if (GET_MODE_SIZE (regno_save_mode[regno][1])
645 <= GET_MODE_SIZE (GET_MODE (slot))
646 && best_slot_num < 0)
647 best_slot_num = j;
648 if (GET_MODE (slot) == regno_save_mode[regno][1])
649 break;
651 if (best_slot_num >= 0)
653 saved_reg->slot = prev_save_slots[best_slot_num];
654 saved_reg->slot
655 = adjust_address_nv
656 (saved_reg->slot,
657 regno_save_mode[saved_reg->hard_regno][1], 0);
658 if (dump_file != NULL)
659 fprintf (dump_file,
660 "%d uses a slot from prev iteration\n", regno);
661 prev_save_slots[best_slot_num] = NULL_RTX;
662 if (best_slot_num + 1 == prev_save_slots_num)
663 prev_save_slots_num--;
665 else
667 saved_reg->slot
668 = assign_stack_local_1
669 (regno_save_mode[regno][1],
670 GET_MODE_SIZE (regno_save_mode[regno][1]), 0,
671 ASLK_REDUCE_ALIGN);
672 if (dump_file != NULL)
673 fprintf (dump_file, "%d uses a new slot\n", regno);
675 regno_save_mem[regno][1] = saved_reg->slot;
676 save_slots[save_slots_num++] = saved_reg->slot;
679 free (saved_reg_conflicts);
680 finish_saved_hard_regs ();
682 else
684 /* We are not sharing slots.
686 Run through all the call-used hard-registers and allocate
687 space for each in the caller-save area. Try to allocate space
688 in a manner which allows multi-register saves/restores to be done. */
690 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
691 for (j = MOVE_MAX_WORDS; j > 0; j--)
693 int do_save = 1;
695 /* If no mode exists for this size, try another. Also break out
696 if we have already saved this hard register. */
697 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
698 continue;
700 /* See if any register in this group has been saved. */
701 for (k = 0; k < j; k++)
702 if (regno_save_mem[i + k][1])
704 do_save = 0;
705 break;
707 if (! do_save)
708 continue;
710 for (k = 0; k < j; k++)
711 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
713 do_save = 0;
714 break;
716 if (! do_save)
717 continue;
719 /* We have found an acceptable mode to store in. Since
720 hard register is always saved in the widest mode
721 available, the mode may be wider than necessary, it is
722 OK to reduce the alignment of spill space. We will
723 verify that it is equal to or greater than required
724 when we restore and save the hard register in
725 insert_restore and insert_save. */
726 regno_save_mem[i][j]
727 = assign_stack_local_1 (regno_save_mode[i][j],
728 GET_MODE_SIZE (regno_save_mode[i][j]),
729 0, ASLK_REDUCE_ALIGN);
731 /* Setup single word save area just in case... */
732 for (k = 0; k < j; k++)
733 /* This should not depend on WORDS_BIG_ENDIAN.
734 The order of words in regs is the same as in memory. */
735 regno_save_mem[i + k][1]
736 = adjust_address_nv (regno_save_mem[i][j],
737 regno_save_mode[i + k][1],
738 k * UNITS_PER_WORD);
742 /* Now loop again and set the alias set of any save areas we made to
743 the alias set used to represent frame objects. */
744 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
745 for (j = MOVE_MAX_WORDS; j > 0; j--)
746 if (regno_save_mem[i][j] != 0)
747 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
752 /* Find the places where hard regs are live across calls and save them. */
754 void
755 save_call_clobbered_regs (void)
757 struct insn_chain *chain, *next, *last = NULL;
758 machine_mode save_mode [FIRST_PSEUDO_REGISTER];
760 /* Computed in mark_set_regs, holds all registers set by the current
761 instruction. */
762 HARD_REG_SET this_insn_sets;
764 CLEAR_HARD_REG_SET (hard_regs_saved);
765 n_regs_saved = 0;
767 for (chain = reload_insn_chain; chain != 0; chain = next)
769 rtx_insn *insn = chain->insn;
770 enum rtx_code code = GET_CODE (insn);
772 next = chain->next;
774 gcc_assert (!chain->is_caller_save_insn);
776 if (NONDEBUG_INSN_P (insn))
778 /* If some registers have been saved, see if INSN references
779 any of them. We must restore them before the insn if so. */
781 if (n_regs_saved)
783 int regno;
784 HARD_REG_SET this_insn_sets;
786 if (code == JUMP_INSN)
787 /* Restore all registers if this is a JUMP_INSN. */
788 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
789 else
791 CLEAR_HARD_REG_SET (referenced_regs);
792 mark_referenced_regs (&PATTERN (insn),
793 mark_reg_as_referenced, NULL);
794 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
797 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
798 if (TEST_HARD_REG_BIT (referenced_regs, regno))
799 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS,
800 save_mode);
801 /* If a saved register is set after the call, this means we no
802 longer should restore it. This can happen when parts of a
803 multi-word pseudo do not conflict with other pseudos, so
804 IRA may allocate the same hard register for both. One may
805 be live across the call, while the other is set
806 afterwards. */
807 CLEAR_HARD_REG_SET (this_insn_sets);
808 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
809 AND_COMPL_HARD_REG_SET (hard_regs_saved, this_insn_sets);
812 if (code == CALL_INSN
813 && ! SIBLING_CALL_P (insn)
814 && ! find_reg_note (insn, REG_NORETURN, NULL))
816 unsigned regno;
817 HARD_REG_SET hard_regs_to_save;
818 HARD_REG_SET call_def_reg_set;
819 reg_set_iterator rsi;
820 rtx cheap;
822 cheap = find_reg_note (insn, REG_RETURNED, NULL);
823 if (cheap)
824 cheap = XEXP (cheap, 0);
826 /* Use the register life information in CHAIN to compute which
827 regs are live during the call. */
828 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
829 &chain->live_throughout);
830 /* Save hard registers always in the widest mode available. */
831 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
832 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
833 save_mode [regno] = regno_save_mode [regno][1];
834 else
835 save_mode [regno] = VOIDmode;
837 /* Look through all live pseudos, mark their hard registers
838 and choose proper mode for saving. */
839 EXECUTE_IF_SET_IN_REG_SET
840 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
842 int r = reg_renumber[regno];
843 int nregs;
844 machine_mode mode;
846 if (r < 0 || regno_reg_rtx[regno] == cheap)
847 continue;
848 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
849 mode = HARD_REGNO_CALLER_SAVE_MODE
850 (r, nregs, PSEUDO_REGNO_MODE (regno));
851 if (GET_MODE_BITSIZE (mode)
852 > GET_MODE_BITSIZE (save_mode[r]))
853 save_mode[r] = mode;
854 while (nregs-- > 0)
855 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
858 /* Record all registers set in this call insn. These don't need
859 to be saved. N.B. the call insn might set a subreg of a
860 multi-hard-reg pseudo; then the pseudo is considered live
861 during the call, but the subreg that is set isn't. */
862 CLEAR_HARD_REG_SET (this_insn_sets);
863 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
865 /* Compute which hard regs must be saved before this call. */
866 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
867 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
868 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
869 get_call_reg_set_usage (insn, &call_def_reg_set,
870 call_used_reg_set);
871 AND_HARD_REG_SET (hard_regs_to_save, call_def_reg_set);
873 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
874 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
875 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
877 /* Must recompute n_regs_saved. */
878 n_regs_saved = 0;
879 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
880 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
881 n_regs_saved++;
883 if (cheap
884 && HARD_REGISTER_P (cheap)
885 && TEST_HARD_REG_BIT (call_used_reg_set, REGNO (cheap)))
887 rtx dest, newpat;
888 rtx pat = PATTERN (insn);
889 if (GET_CODE (pat) == PARALLEL)
890 pat = XVECEXP (pat, 0, 0);
891 dest = SET_DEST (pat);
892 /* For multiple return values dest is PARALLEL.
893 Currently we handle only single return value case. */
894 if (REG_P (dest))
896 newpat = gen_rtx_SET (VOIDmode, cheap, copy_rtx (dest));
897 chain = insert_one_insn (chain, 0, -1, newpat);
901 last = chain;
903 else if (DEBUG_INSN_P (insn) && n_regs_saved)
904 mark_referenced_regs (&PATTERN (insn),
905 replace_reg_with_saved_mem,
906 save_mode);
908 if (chain->next == 0 || chain->next->block != chain->block)
910 int regno;
911 /* At the end of the basic block, we must restore any registers that
912 remain saved. If the last insn in the block is a JUMP_INSN, put
913 the restore before the insn, otherwise, put it after the insn. */
915 if (n_regs_saved
916 && DEBUG_INSN_P (insn)
917 && last
918 && last->block == chain->block)
920 rtx_insn *ins, *prev;
921 basic_block bb = BLOCK_FOR_INSN (insn);
923 /* When adding hard reg restores after a DEBUG_INSN, move
924 all notes between last real insn and this DEBUG_INSN after
925 the DEBUG_INSN, otherwise we could get code
926 -g/-g0 differences. */
927 for (ins = PREV_INSN (insn); ins != last->insn; ins = prev)
929 prev = PREV_INSN (ins);
930 if (NOTE_P (ins))
932 SET_NEXT_INSN (prev) = NEXT_INSN (ins);
933 SET_PREV_INSN (NEXT_INSN (ins)) = prev;
934 SET_PREV_INSN (ins) = insn;
935 SET_NEXT_INSN (ins) = NEXT_INSN (insn);
936 SET_NEXT_INSN (insn) = ins;
937 if (NEXT_INSN (ins))
938 SET_PREV_INSN (NEXT_INSN (ins)) = ins;
939 if (BB_END (bb) == insn)
940 BB_END (bb) = ins;
942 else
943 gcc_assert (DEBUG_INSN_P (ins));
946 last = NULL;
948 if (n_regs_saved)
949 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
950 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
951 regno += insert_restore (chain, JUMP_P (insn),
952 regno, MOVE_MAX_WORDS, save_mode);
957 /* Here from note_stores, or directly from save_call_clobbered_regs, when
958 an insn stores a value in a register.
959 Set the proper bit or bits in this_insn_sets. All pseudos that have
960 been assigned hard regs have had their register number changed already,
961 so we can ignore pseudos. */
962 static void
963 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
965 int regno, endregno, i;
966 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data;
968 if (GET_CODE (reg) == SUBREG)
970 rtx inner = SUBREG_REG (reg);
971 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
972 return;
973 regno = subreg_regno (reg);
974 endregno = regno + subreg_nregs (reg);
976 else if (REG_P (reg)
977 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
979 regno = REGNO (reg);
980 endregno = END_HARD_REGNO (reg);
982 else
983 return;
985 for (i = regno; i < endregno; i++)
986 SET_HARD_REG_BIT (*this_insn_sets, i);
989 /* Here from note_stores when an insn stores a value in a register.
990 Set the proper bit or bits in the passed regset. All pseudos that have
991 been assigned hard regs have had their register number changed already,
992 so we can ignore pseudos. */
993 static void
994 add_stored_regs (rtx reg, const_rtx setter, void *data)
996 int regno, endregno, i;
997 machine_mode mode = GET_MODE (reg);
998 int offset = 0;
1000 if (GET_CODE (setter) == CLOBBER)
1001 return;
1003 if (GET_CODE (reg) == SUBREG
1004 && REG_P (SUBREG_REG (reg))
1005 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
1007 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
1008 GET_MODE (SUBREG_REG (reg)),
1009 SUBREG_BYTE (reg),
1010 GET_MODE (reg));
1011 regno = REGNO (SUBREG_REG (reg)) + offset;
1012 endregno = regno + subreg_nregs (reg);
1014 else
1016 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
1017 return;
1019 regno = REGNO (reg) + offset;
1020 endregno = end_hard_regno (mode, regno);
1023 for (i = regno; i < endregno; i++)
1024 SET_REGNO_REG_SET ((regset) data, i);
1027 /* Walk X and record all referenced registers in REFERENCED_REGS. */
1028 static void
1029 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg)
1031 enum rtx_code code = GET_CODE (*loc);
1032 const char *fmt;
1033 int i, j;
1035 if (code == SET)
1036 mark_referenced_regs (&SET_SRC (*loc), mark, arg);
1037 if (code == SET || code == CLOBBER)
1039 loc = &SET_DEST (*loc);
1040 code = GET_CODE (*loc);
1041 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER)
1042 || code == PC || code == CC0
1043 || (code == SUBREG && REG_P (SUBREG_REG (*loc))
1044 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER
1045 /* If we're setting only part of a multi-word register,
1046 we shall mark it as referenced, because the words
1047 that are not being set should be restored. */
1048 && ((GET_MODE_SIZE (GET_MODE (*loc))
1049 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc))))
1050 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc)))
1051 <= UNITS_PER_WORD))))
1052 return;
1054 if (code == MEM || code == SUBREG)
1056 loc = &XEXP (*loc, 0);
1057 code = GET_CODE (*loc);
1060 if (code == REG)
1062 int regno = REGNO (*loc);
1063 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
1064 : reg_renumber[regno]);
1066 if (hardregno >= 0)
1067 mark (loc, GET_MODE (*loc), hardregno, arg);
1068 else if (arg)
1069 /* ??? Will we ever end up with an equiv expression in a debug
1070 insn, that would have required restoring a reg, or will
1071 reload take care of it for us? */
1072 return;
1073 /* If this is a pseudo that did not get a hard register, scan its
1074 memory location, since it might involve the use of another
1075 register, which might be saved. */
1076 else if (reg_equiv_mem (regno) != 0)
1077 mark_referenced_regs (&XEXP (reg_equiv_mem (regno), 0), mark, arg);
1078 else if (reg_equiv_address (regno) != 0)
1079 mark_referenced_regs (&reg_equiv_address (regno), mark, arg);
1080 return;
1083 fmt = GET_RTX_FORMAT (code);
1084 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1086 if (fmt[i] == 'e')
1087 mark_referenced_regs (&XEXP (*loc, i), mark, arg);
1088 else if (fmt[i] == 'E')
1089 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
1090 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg);
1094 /* Parameter function for mark_referenced_regs() that adds registers
1095 present in the insn and in equivalent mems and addresses to
1096 referenced_regs. */
1098 static void
1099 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED,
1100 machine_mode mode,
1101 int hardregno,
1102 void *arg ATTRIBUTE_UNUSED)
1104 add_to_hard_reg_set (&referenced_regs, mode, hardregno);
1107 /* Parameter function for mark_referenced_regs() that replaces
1108 registers referenced in a debug_insn that would have been restored,
1109 should it be a non-debug_insn, with their save locations. */
1111 static void
1112 replace_reg_with_saved_mem (rtx *loc,
1113 machine_mode mode,
1114 int regno,
1115 void *arg)
1117 unsigned int i, nregs = hard_regno_nregs [regno][mode];
1118 rtx mem;
1119 machine_mode *save_mode = (machine_mode *)arg;
1121 for (i = 0; i < nregs; i++)
1122 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1123 break;
1125 /* If none of the registers in the range would need restoring, we're
1126 all set. */
1127 if (i == nregs)
1128 return;
1130 while (++i < nregs)
1131 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1132 break;
1134 if (i == nregs
1135 && regno_save_mem[regno][nregs])
1137 mem = copy_rtx (regno_save_mem[regno][nregs]);
1139 if (nregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]])
1140 mem = adjust_address_nv (mem, save_mode[regno], 0);
1142 if (GET_MODE (mem) != mode)
1144 /* This is gen_lowpart_if_possible(), but without validating
1145 the newly-formed address. */
1146 int offset = 0;
1148 if (WORDS_BIG_ENDIAN)
1149 offset = (MAX (GET_MODE_SIZE (GET_MODE (mem)), UNITS_PER_WORD)
1150 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1151 if (BYTES_BIG_ENDIAN)
1152 /* Adjust the address so that the address-after-the-data is
1153 unchanged. */
1154 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1155 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (mem))));
1157 mem = adjust_address_nv (mem, mode, offset);
1160 else
1162 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs));
1163 for (i = 0; i < nregs; i++)
1164 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1166 gcc_assert (regno_save_mem[regno + i][1]);
1167 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]);
1169 else
1171 machine_mode smode = save_mode[regno];
1172 gcc_assert (smode != VOIDmode);
1173 if (hard_regno_nregs [regno][smode] > 1)
1174 smode = mode_for_size (GET_MODE_SIZE (mode) / nregs,
1175 GET_MODE_CLASS (mode), 0);
1176 XVECEXP (mem, 0, i) = gen_rtx_REG (smode, regno + i);
1180 gcc_assert (GET_MODE (mem) == mode);
1181 *loc = mem;
1185 /* Insert a sequence of insns to restore. Place these insns in front of
1186 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1187 the maximum number of registers which should be restored during this call.
1188 It should never be less than 1 since we only work with entire registers.
1190 Note that we have verified in init_caller_save that we can do this
1191 with a simple SET, so use it. Set INSN_CODE to what we save there
1192 since the address might not be valid so the insn might not be recognized.
1193 These insns will be reloaded and have register elimination done by
1194 find_reload, so we need not worry about that here.
1196 Return the extra number of registers saved. */
1198 static int
1199 insert_restore (struct insn_chain *chain, int before_p, int regno,
1200 int maxrestore, machine_mode *save_mode)
1202 int i, k;
1203 rtx pat = NULL_RTX;
1204 int code;
1205 unsigned int numregs = 0;
1206 struct insn_chain *new_chain;
1207 rtx mem;
1209 /* A common failure mode if register status is not correct in the
1210 RTL is for this routine to be called with a REGNO we didn't
1211 expect to save. That will cause us to write an insn with a (nil)
1212 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1213 later, check for this common case here instead. This will remove
1214 one step in debugging such problems. */
1215 gcc_assert (regno_save_mem[regno][1]);
1217 /* Get the pattern to emit and update our status.
1219 See if we can restore `maxrestore' registers at once. Work
1220 backwards to the single register case. */
1221 for (i = maxrestore; i > 0; i--)
1223 int j;
1224 int ok = 1;
1226 if (regno_save_mem[regno][i] == 0)
1227 continue;
1229 for (j = 0; j < i; j++)
1230 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
1232 ok = 0;
1233 break;
1235 /* Must do this one restore at a time. */
1236 if (! ok)
1237 continue;
1239 numregs = i;
1240 break;
1243 mem = regno_save_mem [regno][numregs];
1244 if (save_mode [regno] != VOIDmode
1245 && save_mode [regno] != GET_MODE (mem)
1246 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1247 /* Check that insn to restore REGNO in save_mode[regno] is
1248 correct. */
1249 && reg_save_code (regno, save_mode[regno]) >= 0)
1250 mem = adjust_address_nv (mem, save_mode[regno], 0);
1251 else
1252 mem = copy_rtx (mem);
1254 /* Verify that the alignment of spill space is equal to or greater
1255 than required. */
1256 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1257 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1259 pat = gen_rtx_SET (VOIDmode,
1260 gen_rtx_REG (GET_MODE (mem),
1261 regno), mem);
1262 code = reg_restore_code (regno, GET_MODE (mem));
1263 new_chain = insert_one_insn (chain, before_p, code, pat);
1265 /* Clear status for all registers we restored. */
1266 for (k = 0; k < i; k++)
1268 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
1269 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1270 n_regs_saved--;
1273 /* Tell our callers how many extra registers we saved/restored. */
1274 return numregs - 1;
1277 /* Like insert_restore above, but save registers instead. */
1279 static int
1280 insert_save (struct insn_chain *chain, int before_p, int regno,
1281 HARD_REG_SET (*to_save), machine_mode *save_mode)
1283 int i;
1284 unsigned int k;
1285 rtx pat = NULL_RTX;
1286 int code;
1287 unsigned int numregs = 0;
1288 struct insn_chain *new_chain;
1289 rtx mem;
1291 /* A common failure mode if register status is not correct in the
1292 RTL is for this routine to be called with a REGNO we didn't
1293 expect to save. That will cause us to write an insn with a (nil)
1294 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1295 later, check for this common case here. This will remove one
1296 step in debugging such problems. */
1297 gcc_assert (regno_save_mem[regno][1]);
1299 /* Get the pattern to emit and update our status.
1301 See if we can save several registers with a single instruction.
1302 Work backwards to the single register case. */
1303 for (i = MOVE_MAX_WORDS; i > 0; i--)
1305 int j;
1306 int ok = 1;
1307 if (regno_save_mem[regno][i] == 0)
1308 continue;
1310 for (j = 0; j < i; j++)
1311 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
1313 ok = 0;
1314 break;
1316 /* Must do this one save at a time. */
1317 if (! ok)
1318 continue;
1320 numregs = i;
1321 break;
1324 mem = regno_save_mem [regno][numregs];
1325 if (save_mode [regno] != VOIDmode
1326 && save_mode [regno] != GET_MODE (mem)
1327 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1328 /* Check that insn to save REGNO in save_mode[regno] is
1329 correct. */
1330 && reg_save_code (regno, save_mode[regno]) >= 0)
1331 mem = adjust_address_nv (mem, save_mode[regno], 0);
1332 else
1333 mem = copy_rtx (mem);
1335 /* Verify that the alignment of spill space is equal to or greater
1336 than required. */
1337 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1338 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1340 pat = gen_rtx_SET (VOIDmode, mem,
1341 gen_rtx_REG (GET_MODE (mem),
1342 regno));
1343 code = reg_save_code (regno, GET_MODE (mem));
1344 new_chain = insert_one_insn (chain, before_p, code, pat);
1346 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1347 for (k = 0; k < numregs; k++)
1349 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
1350 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1351 n_regs_saved++;
1354 /* Tell our callers how many extra registers we saved/restored. */
1355 return numregs - 1;
1358 /* A note_uses callback used by insert_one_insn. Add the hard-register
1359 equivalent of each REG to regset DATA. */
1361 static void
1362 add_used_regs (rtx *loc, void *data)
1364 subrtx_iterator::array_type array;
1365 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
1367 const_rtx x = *iter;
1368 if (REG_P (x))
1370 unsigned int regno = REGNO (x);
1371 if (HARD_REGISTER_NUM_P (regno))
1372 bitmap_set_range ((regset) data, regno,
1373 hard_regno_nregs[regno][GET_MODE (x)]);
1374 else
1375 gcc_checking_assert (reg_renumber[regno] < 0);
1380 /* Emit a new caller-save insn and set the code. */
1381 static struct insn_chain *
1382 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
1384 rtx_insn *insn = chain->insn;
1385 struct insn_chain *new_chain;
1387 #ifdef HAVE_cc0
1388 /* If INSN references CC0, put our insns in front of the insn that sets
1389 CC0. This is always safe, since the only way we could be passed an
1390 insn that references CC0 is for a restore, and doing a restore earlier
1391 isn't a problem. We do, however, assume here that CALL_INSNs don't
1392 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1394 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
1395 && before_p
1396 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
1397 chain = chain->prev, insn = chain->insn;
1398 #endif
1400 new_chain = new_insn_chain ();
1401 if (before_p)
1403 rtx link;
1405 new_chain->prev = chain->prev;
1406 if (new_chain->prev != 0)
1407 new_chain->prev->next = new_chain;
1408 else
1409 reload_insn_chain = new_chain;
1411 chain->prev = new_chain;
1412 new_chain->next = chain;
1413 new_chain->insn = emit_insn_before (pat, insn);
1414 /* ??? It would be nice if we could exclude the already / still saved
1415 registers from the live sets. */
1416 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1417 note_uses (&PATTERN (chain->insn), add_used_regs,
1418 &new_chain->live_throughout);
1419 /* If CHAIN->INSN is a call, then the registers which contain
1420 the arguments to the function are live in the new insn. */
1421 if (CALL_P (chain->insn))
1422 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
1423 link != NULL_RTX;
1424 link = XEXP (link, 1))
1425 note_uses (&XEXP (link, 0), add_used_regs,
1426 &new_chain->live_throughout);
1428 CLEAR_REG_SET (&new_chain->dead_or_set);
1429 if (chain->insn == BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
1430 BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
1432 else
1434 new_chain->next = chain->next;
1435 if (new_chain->next != 0)
1436 new_chain->next->prev = new_chain;
1437 chain->next = new_chain;
1438 new_chain->prev = chain;
1439 new_chain->insn = emit_insn_after (pat, insn);
1440 /* ??? It would be nice if we could exclude the already / still saved
1441 registers from the live sets, and observe REG_UNUSED notes. */
1442 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1443 /* Registers that are set in CHAIN->INSN live in the new insn.
1444 (Unless there is a REG_UNUSED note for them, but we don't
1445 look for them here.) */
1446 note_stores (PATTERN (chain->insn), add_stored_regs,
1447 &new_chain->live_throughout);
1448 CLEAR_REG_SET (&new_chain->dead_or_set);
1449 if (chain->insn == BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
1450 BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
1452 new_chain->block = chain->block;
1453 new_chain->is_caller_save_insn = 1;
1455 INSN_CODE (new_chain->insn) = code;
1456 return new_chain;
1458 #include "gt-caller-save.h"