gcc/regs.h

   1 /* Define per-register tables for data flow info and register allocation.
   2    Copyright (C) 1987-2015 Free Software Foundation, Inc.
   3
   4 This file is part of GCC.
   5
   6 GCC is free software; you can redistribute it and/or modify it under
   7 the terms of the GNU General Public License as published by the Free
   8 Software Foundation; either version 3, or (at your option) any later
   9 version.
  10
  11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14 for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with GCC; see the file COPYING3.  If not see
  18 <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef GCC_REGS_H
  21 #define GCC_REGS_H
  22
  23 #include "hard-reg-set.h"
  24 #include "rtl.h"
  25
  26 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
  27
  28 /* When you only have the mode of a pseudo register before it has a hard
  29    register chosen for it, this reports the size of each hard register
  30    a pseudo in such a mode would get allocated to.  A target may
  31    override this.  */
  32
  33 #ifndef REGMODE_NATURAL_SIZE
  34 #define REGMODE_NATURAL_SIZE(MODE)      UNITS_PER_WORD
  35 #endif
  36
  37 /* Maximum register number used in this function, plus one.  */
  38
  39 extern int max_regno;
  40
  41 /* REG_N_REFS and REG_N_SETS are initialized by a call to
  42    regstat_init_n_sets_and_refs from the current values of
  43    DF_REG_DEF_COUNT and DF_REG_USE_COUNT.  REG_N_REFS and REG_N_SETS
  44    should only be used if a pass need to change these values in some
  45    magical way or the pass needs to have accurate values for these
  46    and is not using incremental df scanning.
  47
  48    At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
  49    should be made to regstat_free_n_sets_and_refs.
  50
  51    Local alloc seems to play pretty loose with these values.
  52    REG_N_REFS is set to 0 if the register is used in an asm.
  53    Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
  54    REG_N_SETS for three address insns.  Other passes seem to have
  55    other special values.  */
  56
  57
  58
  59 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
  60
  61 struct regstat_n_sets_and_refs_t
  62 {
  63   int sets;                     /* # of times (REG n) is set */
  64   int refs;                     /* # of times (REG n) is used or set */
  65 };
  66
  67 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
  68
  69 /* Indexed by n, gives number of times (REG n) is used or set.  */
  70 static inline int
  71 REG_N_REFS (int regno)
  72 {
  73   return regstat_n_sets_and_refs[regno].refs;
  74 }
  75
  76 /* Indexed by n, gives number of times (REG n) is used or set.  */
  77 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
  78 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
  79
  80 /* Indexed by n, gives number of times (REG n) is set.  */
  81 static inline int
  82 REG_N_SETS (int regno)
  83 {
  84   return regstat_n_sets_and_refs[regno].sets;
  85 }
  86
  87 /* Indexed by n, gives number of times (REG n) is set.  */
  88 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
  89 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
  90
  91 /* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise.  */
  92 extern bool reg_is_parm_p (rtx);
  93
  94 /* Functions defined in regstat.c.  */
  95 extern void regstat_init_n_sets_and_refs (void);
  96 extern void regstat_free_n_sets_and_refs (void);
  97 extern void regstat_compute_ri (void);
  98 extern void regstat_free_ri (void);
  99 extern bitmap regstat_get_setjmp_crosses (void);
 100 extern void regstat_compute_calls_crossed (void);
 101 extern void regstat_free_calls_crossed (void);
 102 extern void dump_reg_info (FILE *);
 103
 104 /* Register information indexed by register number.  This structure is
 105    initialized by calling regstat_compute_ri and is destroyed by
 106    calling regstat_free_ri.  */
 107 struct reg_info_t
 108 {
 109   int freq;                     /* # estimated frequency (REG n) is used or set */
 110   int deaths;                   /* # of times (REG n) dies */
 111   int live_length;              /* # of instructions (REG n) is live */
 112   int calls_crossed;            /* # of calls (REG n) is live across */
 113   int freq_calls_crossed;       /* # estimated frequency (REG n) crosses call */
 114   int throw_calls_crossed;      /* # of calls that may throw (REG n) is live across */
 115   int basic_block;              /* # of basic blocks (REG n) is used in */
 116 };
 117
 118 extern struct reg_info_t *reg_info_p;
 119
 120 /* The number allocated elements of reg_info_p.  */
 121 extern size_t reg_info_p_size;
 122
 123 /* Estimate frequency of references to register N.  */
 124
 125 #define REG_FREQ(N) (reg_info_p[N].freq)
 126
 127 /* The weights for each insn varies from 0 to REG_FREQ_BASE.
 128    This constant does not need to be high, as in infrequently executed
 129    regions we want to count instructions equivalently to optimize for
 130    size instead of speed.  */
 131 #define REG_FREQ_MAX 1000
 132
 133 /* Compute register frequency from the BB frequency.  When optimizing for size,
 134    or profile driven feedback is available and the function is never executed,
 135    frequency is always equivalent.  Otherwise rescale the basic block
 136    frequency.  */
 137 #define REG_FREQ_FROM_BB(bb) (optimize_function_for_size_p (cfun)             \
 138                               ? REG_FREQ_MAX                                  \
 139                               : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
 140                               ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
 141                               : 1)
 142
 143 /* Indexed by N, gives number of insns in which register N dies.
 144    Note that if register N is live around loops, it can die
 145    in transitions between basic blocks, and that is not counted here.
 146    So this is only a reliable indicator of how many regions of life there are
 147    for registers that are contained in one basic block.  */
 148
 149 #define REG_N_DEATHS(N) (reg_info_p[N].deaths)
 150
 151 /* Get the number of consecutive words required to hold pseudo-reg N.  */
 152
 153 #define PSEUDO_REGNO_SIZE(N) \
 154   ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1)         \
 155    / UNITS_PER_WORD)
 156
 157 /* Get the number of bytes required to hold pseudo-reg N.  */
 158
 159 #define PSEUDO_REGNO_BYTES(N) \
 160   GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
 161
 162 /* Get the machine mode of pseudo-reg N.  */
 163
 164 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
 165
 166 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live.  */
 167
 168 #define REG_N_CALLS_CROSSED(N)  (reg_info_p[N].calls_crossed)
 169 #define REG_FREQ_CALLS_CROSSED(N)  (reg_info_p[N].freq_calls_crossed)
 170
 171 /* Indexed by N, gives number of CALL_INSNS that may throw, across which
 172    (REG n) is live.  */
 173
 174 #define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)
 175
 176 /* Total number of instructions at which (REG n) is live.
 177
 178    This is set in regstat.c whenever register info is requested and
 179    remains valid for the rest of the compilation of the function; it is
 180    used to control register allocation.  The larger this is, the less
 181    priority (REG n) gets for allocation in a hard register (in IRA in
 182    priority-coloring mode).
 183
 184    Negative values are special: -1 is used to mark a pseudo reg that
 185    should not be allocated to a hard register, because it crosses a
 186    setjmp call.  */
 187
 188 #define REG_LIVE_LENGTH(N)  (reg_info_p[N].live_length)
 189
 190 /* Indexed by n, gives number of basic block that  (REG n) is used in.
 191    If the value is REG_BLOCK_GLOBAL (-1),
 192    it means (REG n) is used in more than one basic block.
 193    REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
 194    This information remains valid for the rest of the compilation
 195    of the current function; it is used to control register allocation.  */
 196
 197 #define REG_BLOCK_UNKNOWN 0
 198 #define REG_BLOCK_GLOBAL -1
 199
 200 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
 201
 202 /* Vector of substitutions of register numbers,
 203    used to map pseudo regs into hardware regs.
 204
 205    This can't be folded into reg_n_info without changing all of the
 206    machine dependent directories, since the reload functions
 207    in the machine dependent files access it.  */
 208
 209 extern short *reg_renumber;
 210
 211 /* Flag set by local-alloc or global-alloc if they decide to allocate
 212    something in a call-clobbered register.  */
 213
 214 extern int caller_save_needed;
 215
 216 /* Select a register mode required for caller save of hard regno REGNO.  */
 217 #ifndef HARD_REGNO_CALLER_SAVE_MODE
 218 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
 219   choose_hard_reg_mode (REGNO, NREGS, false)
 220 #endif
 221
 222 /* Registers that get partially clobbered by a call in a given mode.
 223    These must not be call used registers.  */
 224 #ifndef HARD_REGNO_CALL_PART_CLOBBERED
 225 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
 226 #endif
 227
 228 /* Target-dependent globals.  */
 229 struct target_regs {
 230   /* For each starting hard register, the number of consecutive hard
 231      registers that a given machine mode occupies.  */
 232   unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
 233
 234   /* For each hard register, the widest mode object that it can contain.
 235      This will be a MODE_INT mode if the register can hold integers.  Otherwise
 236      it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
 237      register.  */
 238   machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
 239
 240   /* Vector indexed by machine mode saying whether there are regs of
 241      that mode.  */
 242   bool x_have_regs_of_mode[MAX_MACHINE_MODE];
 243
 244   /* 1 if the corresponding class contains a register of the given mode.  */
 245   char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
 246
 247   /* Record for each mode whether we can move a register directly to or
 248      from an object of that mode in memory.  If we can't, we won't try
 249      to use that mode directly when accessing a field of that mode.  */
 250   char x_direct_load[NUM_MACHINE_MODES];
 251   char x_direct_store[NUM_MACHINE_MODES];
 252
 253   /* Record for each mode whether we can float-extend from memory.  */
 254   bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
 255 };
 256
 257 extern struct target_regs default_target_regs;
 258 #if SWITCHABLE_TARGET
 259 extern struct target_regs *this_target_regs;
 260 #else
 261 #define this_target_regs (&default_target_regs)
 262 #endif
 263
 264 #define hard_regno_nregs \
 265   (this_target_regs->x_hard_regno_nregs)
 266 #define reg_raw_mode \
 267   (this_target_regs->x_reg_raw_mode)
 268 #define have_regs_of_mode \
 269   (this_target_regs->x_have_regs_of_mode)
 270 #define contains_reg_of_mode \
 271   (this_target_regs->x_contains_reg_of_mode)
 272 #define direct_load \
 273   (this_target_regs->x_direct_load)
 274 #define direct_store \
 275   (this_target_regs->x_direct_store)
 276 #define float_extend_from_mem \
 277   (this_target_regs->x_float_extend_from_mem)
 278
 279 /* Return an exclusive upper bound on the registers occupied by hard
 280    register (reg:MODE REGNO).  */
 281
 282 static inline unsigned int
 283 end_hard_regno (machine_mode mode, unsigned int regno)
 284 {
 285   return regno + hard_regno_nregs[regno][(int) mode];
 286 }
 287
 288 /* Add to REGS all the registers required to store a value of mode MODE
 289    in register REGNO.  */
 290
 291 static inline void
 292 add_to_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
 293                      unsigned int regno)
 294 {
 295   unsigned int end_regno;
 296
 297   end_regno = end_hard_regno (mode, regno);
 298   do
 299     SET_HARD_REG_BIT (*regs, regno);
 300   while (++regno < end_regno);
 301 }
 302
 303 /* Likewise, but remove the registers.  */
 304
 305 static inline void
 306 remove_from_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
 307                           unsigned int regno)
 308 {
 309   unsigned int end_regno;
 310
 311   end_regno = end_hard_regno (mode, regno);
 312   do
 313     CLEAR_HARD_REG_BIT (*regs, regno);
 314   while (++regno < end_regno);
 315 }
 316
 317 /* Return true if REGS contains the whole of (reg:MODE REGNO).  */
 318
 319 static inline bool
 320 in_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
 321                    unsigned int regno)
 322 {
 323   unsigned int end_regno;
 324
 325   gcc_assert (HARD_REGISTER_NUM_P (regno));
 326
 327   if (!TEST_HARD_REG_BIT (regs, regno))
 328     return false;
 329
 330   end_regno = end_hard_regno (mode, regno);
 331
 332   if (!HARD_REGISTER_NUM_P (end_regno - 1))
 333     return false;
 334
 335   while (++regno < end_regno)
 336     if (!TEST_HARD_REG_BIT (regs, regno))
 337       return false;
 338
 339   return true;
 340 }
 341
 342 /* Return true if (reg:MODE REGNO) includes an element of REGS.  */
 343
 344 static inline bool
 345 overlaps_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
 346                          unsigned int regno)
 347 {
 348   unsigned int end_regno;
 349
 350   if (TEST_HARD_REG_BIT (regs, regno))
 351     return true;
 352
 353   end_regno = end_hard_regno (mode, regno);
 354   while (++regno < end_regno)
 355     if (TEST_HARD_REG_BIT (regs, regno))
 356       return true;
 357
 358   return false;
 359 }
 360
 361 /* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
 362    REGNO and MODE.  */
 363
 364 static inline void
 365 add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
 366                            int nregs)
 367 {
 368   while (nregs-- > 0)
 369     SET_HARD_REG_BIT (*regs, regno + nregs);
 370 }
 371
 372 /* Likewise, but remove the registers.  */
 373
 374 static inline void
 375 remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
 376                                 int nregs)
 377 {
 378   while (nregs-- > 0)
 379     CLEAR_HARD_REG_BIT (*regs, regno + nregs);
 380 }
 381
 382 /* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
 383    REGNO and MODE.  */
 384 static inline bool
 385 range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
 386                                int nregs)
 387 {
 388   while (nregs-- > 0)
 389     if (TEST_HARD_REG_BIT (set, regno + nregs))
 390       return true;
 391   return false;
 392 }
 393
 394 /* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
 395    REGNO and MODE.  */
 396 static inline bool
 397 range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
 398 {
 399   while (nregs-- > 0)
 400     if (!TEST_HARD_REG_BIT (set, regno + nregs))
 401       return false;
 402   return true;
 403 }
 404
 405 /* Get registers used by given function call instruction.  */
 406 extern bool get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
 407                                     HARD_REG_SET default_set);
 408
 409 #endif /* GCC_REGS_H */