1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
62 #include "rtx-vector-builder.h"
65 /* If this is nonzero, we do not bother generating VOLATILE
66 around volatile memory references, and we are willing to
67 output indirect addresses. If cse is to follow, we reject
68 indirect addresses so a useful potential cse is generated;
69 if it is used only once, instruction combination will produce
70 the same indirect address eventually. */
73 static bool block_move_libcall_safe_for_call_parm (void);
74 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
75 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
76 unsigned HOST_WIDE_INT
);
77 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
78 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
79 static rtx_insn
*compress_float_constant (rtx
, rtx
);
80 static rtx
get_subtarget (rtx
);
81 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
82 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
83 machine_mode
, tree
, alias_set_type
, bool, bool);
85 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
87 static int is_aligning_offset (const_tree
, const_tree
);
88 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
89 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
91 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
93 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
95 static rtx
const_vector_from_tree (tree
);
96 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
97 static tree
tree_expr_size (const_tree
);
98 static HOST_WIDE_INT
int_expr_size (tree
);
99 static void convert_mode_scalar (rtx
, rtx
, int);
102 /* This is run to set up which modes can be used
103 directly in memory and to initialize the block move optab. It is run
104 at the beginning of compilation and when the target is reinitialized. */
107 init_expr_target (void)
114 /* Try indexing by frame ptr and try by stack ptr.
115 It is known that on the Convex the stack ptr isn't a valid index.
116 With luck, one or the other is valid on any machine. */
117 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
118 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
120 /* A scratch register we can modify in-place below to avoid
121 useless RTL allocations. */
122 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
124 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
125 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
126 PATTERN (insn
) = pat
;
128 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
129 mode
= (machine_mode
) ((int) mode
+ 1))
133 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
134 PUT_MODE (mem
, mode
);
135 PUT_MODE (mem1
, mode
);
137 /* See if there is some register that can be used in this mode and
138 directly loaded or stored from memory. */
140 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
141 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
142 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
145 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
148 set_mode_and_regno (reg
, mode
, regno
);
151 SET_DEST (pat
) = reg
;
152 if (recog (pat
, insn
, &num_clobbers
) >= 0)
153 direct_load
[(int) mode
] = 1;
155 SET_SRC (pat
) = mem1
;
156 SET_DEST (pat
) = reg
;
157 if (recog (pat
, insn
, &num_clobbers
) >= 0)
158 direct_load
[(int) mode
] = 1;
161 SET_DEST (pat
) = mem
;
162 if (recog (pat
, insn
, &num_clobbers
) >= 0)
163 direct_store
[(int) mode
] = 1;
166 SET_DEST (pat
) = mem1
;
167 if (recog (pat
, insn
, &num_clobbers
) >= 0)
168 direct_store
[(int) mode
] = 1;
172 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
174 opt_scalar_float_mode mode_iter
;
175 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
177 scalar_float_mode mode
= mode_iter
.require ();
178 scalar_float_mode srcmode
;
179 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
183 ic
= can_extend_p (mode
, srcmode
, 0);
184 if (ic
== CODE_FOR_nothing
)
187 PUT_MODE (mem
, srcmode
);
189 if (insn_operand_matches (ic
, 1, mem
))
190 float_extend_from_mem
[mode
][srcmode
] = true;
195 /* This is run at the start of compiling a function. */
200 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
203 /* Copy data from FROM to TO, where the machine modes are not the same.
204 Both modes may be integer, or both may be floating, or both may be
206 UNSIGNEDP should be nonzero if FROM is an unsigned type.
207 This causes zero-extension instead of sign-extension. */
210 convert_move (rtx to
, rtx from
, int unsignedp
)
212 machine_mode to_mode
= GET_MODE (to
);
213 machine_mode from_mode
= GET_MODE (from
);
215 gcc_assert (to_mode
!= BLKmode
);
216 gcc_assert (from_mode
!= BLKmode
);
218 /* If the source and destination are already the same, then there's
223 /* If FROM is a SUBREG that indicates that we have already done at least
224 the required extension, strip it. We don't handle such SUBREGs as
227 scalar_int_mode to_int_mode
;
228 if (GET_CODE (from
) == SUBREG
229 && SUBREG_PROMOTED_VAR_P (from
)
230 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
231 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
232 >= GET_MODE_PRECISION (to_int_mode
))
233 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
235 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
236 from_mode
= to_int_mode
;
239 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
241 if (to_mode
== from_mode
242 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
244 emit_move_insn (to
, from
);
248 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
250 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
251 GET_MODE_BITSIZE (to_mode
)));
253 if (VECTOR_MODE_P (to_mode
))
254 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
256 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
258 emit_move_insn (to
, from
);
262 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
264 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
265 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
269 convert_mode_scalar (to
, from
, unsignedp
);
272 /* Like convert_move, but deals only with scalar modes. */
275 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
277 /* Both modes should be scalar types. */
278 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
279 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
280 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
281 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
285 gcc_assert (to_real
== from_real
);
287 /* rtx code for making an equivalent value. */
288 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
289 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
297 gcc_assert ((GET_MODE_PRECISION (from_mode
)
298 != GET_MODE_PRECISION (to_mode
))
299 || (DECIMAL_FLOAT_MODE_P (from_mode
)
300 != DECIMAL_FLOAT_MODE_P (to_mode
)));
302 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
303 /* Conversion between decimal float and binary float, same size. */
304 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
305 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
310 /* Try converting directly if the insn is supported. */
312 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
313 if (code
!= CODE_FOR_nothing
)
315 emit_unop_insn (code
, to
, from
,
316 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
320 /* Otherwise use a libcall. */
321 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
323 /* Is this conversion implemented yet? */
324 gcc_assert (libcall
);
327 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
329 insns
= get_insns ();
331 emit_libcall_block (insns
, to
, value
,
332 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
334 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
338 /* Handle pointer conversion. */ /* SPEE 900220. */
339 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
343 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
350 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
353 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
359 /* Targets are expected to provide conversion insns between PxImode and
360 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
361 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
363 scalar_int_mode full_mode
364 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
366 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
367 != CODE_FOR_nothing
);
369 if (full_mode
!= from_mode
)
370 from
= convert_to_mode (full_mode
, from
, unsignedp
);
371 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
375 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
378 scalar_int_mode full_mode
379 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
380 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
381 enum insn_code icode
;
383 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
384 gcc_assert (icode
!= CODE_FOR_nothing
);
386 if (to_mode
== full_mode
)
388 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
392 new_from
= gen_reg_rtx (full_mode
);
393 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
395 /* else proceed to integer conversions below. */
396 from_mode
= full_mode
;
400 /* Make sure both are fixed-point modes or both are not. */
401 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
402 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
403 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
405 /* If we widen from_mode to to_mode and they are in the same class,
406 we won't saturate the result.
407 Otherwise, always saturate the result to play safe. */
408 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
409 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
410 expand_fixed_convert (to
, from
, 0, 0);
412 expand_fixed_convert (to
, from
, 0, 1);
416 /* Now both modes are integers. */
418 /* Handle expanding beyond a word. */
419 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
420 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
427 scalar_mode lowpart_mode
;
428 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
430 /* Try converting directly if the insn is supported. */
431 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
434 /* If FROM is a SUBREG, put it into a register. Do this
435 so that we always generate the same set of insns for
436 better cse'ing; if an intermediate assignment occurred,
437 we won't be doing the operation directly on the SUBREG. */
438 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
439 from
= force_reg (from_mode
, from
);
440 emit_unop_insn (code
, to
, from
, equiv_code
);
443 /* Next, try converting via full word. */
444 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
445 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
446 != CODE_FOR_nothing
))
448 rtx word_to
= gen_reg_rtx (word_mode
);
451 if (reg_overlap_mentioned_p (to
, from
))
452 from
= force_reg (from_mode
, from
);
455 convert_move (word_to
, from
, unsignedp
);
456 emit_unop_insn (code
, to
, word_to
, equiv_code
);
460 /* No special multiword conversion insn; do it by hand. */
463 /* Since we will turn this into a no conflict block, we must ensure
464 the source does not overlap the target so force it into an isolated
465 register when maybe so. Likewise for any MEM input, since the
466 conversion sequence might require several references to it and we
467 must ensure we're getting the same value every time. */
469 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
470 from
= force_reg (from_mode
, from
);
472 /* Get a copy of FROM widened to a word, if necessary. */
473 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
474 lowpart_mode
= word_mode
;
476 lowpart_mode
= from_mode
;
478 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
480 lowpart
= gen_lowpart (lowpart_mode
, to
);
481 emit_move_insn (lowpart
, lowfrom
);
483 /* Compute the value to put in each remaining word. */
485 fill_value
= const0_rtx
;
487 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
488 LT
, lowfrom
, const0_rtx
,
489 lowpart_mode
, 0, -1);
491 /* Fill the remaining words. */
492 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
494 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
495 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
497 gcc_assert (subword
);
499 if (fill_value
!= subword
)
500 emit_move_insn (subword
, fill_value
);
503 insns
= get_insns ();
510 /* Truncating multi-word to a word or less. */
511 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
512 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
515 && ! MEM_VOLATILE_P (from
)
516 && direct_load
[(int) to_mode
]
517 && ! mode_dependent_address_p (XEXP (from
, 0),
518 MEM_ADDR_SPACE (from
)))
520 || GET_CODE (from
) == SUBREG
))
521 from
= force_reg (from_mode
, from
);
522 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
526 /* Now follow all the conversions between integers
527 no more than a word long. */
529 /* For truncation, usually we can just refer to FROM in a narrower mode. */
530 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
531 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
534 && ! MEM_VOLATILE_P (from
)
535 && direct_load
[(int) to_mode
]
536 && ! mode_dependent_address_p (XEXP (from
, 0),
537 MEM_ADDR_SPACE (from
)))
539 || GET_CODE (from
) == SUBREG
))
540 from
= force_reg (from_mode
, from
);
541 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
542 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
543 from
= copy_to_reg (from
);
544 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
548 /* Handle extension. */
549 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
551 /* Convert directly if that works. */
552 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
555 emit_unop_insn (code
, to
, from
, equiv_code
);
560 scalar_mode intermediate
;
564 /* Search for a mode to convert via. */
565 opt_scalar_mode intermediate_iter
;
566 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
568 scalar_mode intermediate
= intermediate_iter
.require ();
569 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
571 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
572 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
574 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
575 != CODE_FOR_nothing
))
577 convert_move (to
, convert_to_mode (intermediate
, from
,
578 unsignedp
), unsignedp
);
583 /* No suitable intermediate mode.
584 Generate what we need with shifts. */
585 shift_amount
= (GET_MODE_PRECISION (to_mode
)
586 - GET_MODE_PRECISION (from_mode
));
587 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
588 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
590 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
593 emit_move_insn (to
, tmp
);
598 /* Support special truncate insns for certain modes. */
599 if (convert_optab_handler (trunc_optab
, to_mode
,
600 from_mode
) != CODE_FOR_nothing
)
602 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
607 /* Handle truncation of volatile memrefs, and so on;
608 the things that couldn't be truncated directly,
609 and for which there was no special instruction.
611 ??? Code above formerly short-circuited this, for most integer
612 mode pairs, with a force_reg in from_mode followed by a recursive
613 call to this routine. Appears always to have been wrong. */
614 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
616 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
617 emit_move_insn (to
, temp
);
621 /* Mode combination is not recognized. */
625 /* Return an rtx for a value that would result
626 from converting X to mode MODE.
627 Both X and MODE may be floating, or both integer.
628 UNSIGNEDP is nonzero if X is an unsigned value.
629 This can be done by referring to a part of X in place
630 or by copying to a new temporary with conversion. */
633 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
635 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
638 /* Return an rtx for a value that would result
639 from converting X from mode OLDMODE to mode MODE.
640 Both modes may be floating, or both integer.
641 UNSIGNEDP is nonzero if X is an unsigned value.
643 This can be done by referring to a part of X in place
644 or by copying to a new temporary with conversion.
646 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
649 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
652 scalar_int_mode int_mode
;
654 /* If FROM is a SUBREG that indicates that we have already done at least
655 the required extension, strip it. */
657 if (GET_CODE (x
) == SUBREG
658 && SUBREG_PROMOTED_VAR_P (x
)
659 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
660 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
661 >= GET_MODE_PRECISION (int_mode
))
662 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
663 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
665 if (GET_MODE (x
) != VOIDmode
)
666 oldmode
= GET_MODE (x
);
671 if (CONST_SCALAR_INT_P (x
)
672 && is_int_mode (mode
, &int_mode
))
674 /* If the caller did not tell us the old mode, then there is not
675 much to do with respect to canonicalization. We have to
676 assume that all the bits are significant. */
677 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
678 oldmode
= MAX_MODE_INT
;
679 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
680 GET_MODE_PRECISION (int_mode
),
681 unsignedp
? UNSIGNED
: SIGNED
);
682 return immed_wide_int_const (w
, int_mode
);
685 /* We can do this with a gen_lowpart if both desired and current modes
686 are integer, and this is either a constant integer, a register, or a
688 scalar_int_mode int_oldmode
;
689 if (is_int_mode (mode
, &int_mode
)
690 && is_int_mode (oldmode
, &int_oldmode
)
691 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
692 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
693 || CONST_POLY_INT_P (x
)
695 && (!HARD_REGISTER_P (x
)
696 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
697 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
698 return gen_lowpart (int_mode
, x
);
700 /* Converting from integer constant into mode is always equivalent to an
702 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
704 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
705 GET_MODE_BITSIZE (oldmode
)));
706 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
709 temp
= gen_reg_rtx (mode
);
710 convert_move (temp
, x
, unsignedp
);
714 /* Return the largest alignment we can use for doing a move (or store)
715 of MAX_PIECES. ALIGN is the largest alignment we could use. */
718 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
720 scalar_int_mode tmode
721 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
723 if (align
>= GET_MODE_ALIGNMENT (tmode
))
724 align
= GET_MODE_ALIGNMENT (tmode
);
727 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
728 opt_scalar_int_mode mode_iter
;
729 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
731 tmode
= mode_iter
.require ();
732 if (GET_MODE_SIZE (tmode
) > max_pieces
733 || targetm
.slow_unaligned_access (tmode
, align
))
738 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
744 /* Return the widest integer mode that is narrower than SIZE bytes. */
746 static scalar_int_mode
747 widest_int_mode_for_size (unsigned int size
)
749 scalar_int_mode result
= NARROWEST_INT_MODE
;
751 gcc_checking_assert (size
> 1);
753 opt_scalar_int_mode tmode
;
754 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
755 if (GET_MODE_SIZE (tmode
.require ()) < size
)
756 result
= tmode
.require ();
761 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
762 and should be performed piecewise. */
765 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
766 enum by_pieces_operation op
)
768 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
769 optimize_insn_for_speed_p ());
772 /* Determine whether the LEN bytes can be moved by using several move
773 instructions. Return nonzero if a call to move_by_pieces should
777 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
779 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
782 /* Return number of insns required to perform operation OP by pieces
783 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
785 unsigned HOST_WIDE_INT
786 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
787 unsigned int max_size
, by_pieces_operation op
)
789 unsigned HOST_WIDE_INT n_insns
= 0;
791 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
793 while (max_size
> 1 && l
> 0)
795 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
796 enum insn_code icode
;
798 unsigned int modesize
= GET_MODE_SIZE (mode
);
800 icode
= optab_handler (mov_optab
, mode
);
801 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
803 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
811 case COMPARE_BY_PIECES
:
812 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
813 int batch_ops
= 4 * batch
- 1;
814 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
815 n_insns
+= full
* batch_ops
;
816 if (n_pieces
% batch
!= 0)
829 /* Used when performing piecewise block operations, holds information
830 about one of the memory objects involved. The member functions
831 can be used to generate code for loading from the object and
832 updating the address when iterating. */
836 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
839 /* The address of the object. Can differ from that seen in the
840 MEM rtx if we copied the address to a register. */
842 /* Nonzero if the address on the object has an autoincrement already,
843 signifies whether that was an increment or decrement. */
844 signed char m_addr_inc
;
845 /* Nonzero if we intend to use autoinc without the address already
846 having autoinc form. We will insert add insns around each memory
847 reference, expecting later passes to form autoinc addressing modes.
848 The only supported options are predecrement and postincrement. */
849 signed char m_explicit_inc
;
850 /* True if we have either of the two possible cases of using
853 /* True if this is an address to be used for load operations rather
857 /* Optionally, a function to obtain constants for any given offset into
858 the objects, and data associated with it. */
859 by_pieces_constfn m_constfn
;
862 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
863 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
864 void increment_address (HOST_WIDE_INT
);
865 void maybe_predec (HOST_WIDE_INT
);
866 void maybe_postinc (HOST_WIDE_INT
);
867 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
874 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
875 true if the operation to be performed on this object is a load
876 rather than a store. For stores, OBJ can be NULL, in which case we
877 assume the operation is a stack push. For loads, the optional
878 CONSTFN and its associated CFNDATA can be used in place of the
881 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
883 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
889 rtx addr
= XEXP (obj
, 0);
890 rtx_code code
= GET_CODE (addr
);
892 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
893 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
896 m_addr_inc
= dec
? -1 : 1;
898 /* While we have always looked for these codes here, the code
899 implementing the memory operation has never handled them.
900 Support could be added later if necessary or beneficial. */
901 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
909 if (STACK_GROWS_DOWNWARD
)
915 gcc_assert (constfn
!= NULL
);
919 gcc_assert (is_load
);
922 /* Decide whether to use autoinc for an address involved in a memory op.
923 MODE is the mode of the accesses, REVERSE is true if we've decided to
924 perform the operation starting from the end, and LEN is the length of
925 the operation. Don't override an earlier decision to set m_auto. */
928 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
931 if (m_auto
|| m_obj
== NULL_RTX
)
934 bool use_predec
= (m_is_load
935 ? USE_LOAD_PRE_DECREMENT (mode
)
936 : USE_STORE_PRE_DECREMENT (mode
));
937 bool use_postinc
= (m_is_load
938 ? USE_LOAD_POST_INCREMENT (mode
)
939 : USE_STORE_POST_INCREMENT (mode
));
940 machine_mode addr_mode
= get_address_mode (m_obj
);
942 if (use_predec
&& reverse
)
944 m_addr
= copy_to_mode_reg (addr_mode
,
945 plus_constant (addr_mode
,
950 else if (use_postinc
&& !reverse
)
952 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
956 else if (CONSTANT_P (m_addr
))
957 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
960 /* Adjust the address to refer to the data at OFFSET in MODE. If we
961 are using autoincrement for this address, we don't add the offset,
962 but we still modify the MEM's properties. */
965 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
968 return m_constfn (m_cfndata
, offset
, mode
);
969 if (m_obj
== NULL_RTX
)
972 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
974 return adjust_address (m_obj
, mode
, offset
);
977 /* Emit an add instruction to increment the address by SIZE. */
980 pieces_addr::increment_address (HOST_WIDE_INT size
)
982 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
983 emit_insn (gen_add2_insn (m_addr
, amount
));
986 /* If we are supposed to decrement the address after each access, emit code
987 to do so now. Increment by SIZE (which has should have the correct sign
991 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
993 if (m_explicit_inc
>= 0)
995 gcc_assert (HAVE_PRE_DECREMENT
);
996 increment_address (size
);
999 /* If we are supposed to decrement the address after each access, emit code
1000 to do so now. Increment by SIZE. */
1003 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1005 if (m_explicit_inc
<= 0)
1007 gcc_assert (HAVE_POST_INCREMENT
);
1008 increment_address (size
);
1011 /* This structure is used by do_op_by_pieces to describe the operation
1014 class op_by_pieces_d
1017 pieces_addr m_to
, m_from
;
1018 unsigned HOST_WIDE_INT m_len
;
1019 HOST_WIDE_INT m_offset
;
1020 unsigned int m_align
;
1021 unsigned int m_max_size
;
1024 /* Virtual functions, overriden by derived classes for the specific
1026 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1027 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1028 virtual void finish_mode (machine_mode
)
1033 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1034 unsigned HOST_WIDE_INT
, unsigned int);
1038 /* The constructor for an op_by_pieces_d structure. We require two
1039 objects named TO and FROM, which are identified as loads or stores
1040 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1041 and its associated FROM_CFN_DATA can be used to replace loads with
1042 constant values. LEN describes the length of the operation. */
1044 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1045 rtx from
, bool from_load
,
1046 by_pieces_constfn from_cfn
,
1047 void *from_cfn_data
,
1048 unsigned HOST_WIDE_INT len
,
1050 : m_to (to
, to_load
, NULL
, NULL
),
1051 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1052 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1054 int toi
= m_to
.get_addr_inc ();
1055 int fromi
= m_from
.get_addr_inc ();
1056 if (toi
>= 0 && fromi
>= 0)
1058 else if (toi
<= 0 && fromi
<= 0)
1063 m_offset
= m_reverse
? len
: 0;
1064 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1065 from
? MEM_ALIGN (from
) : align
);
1067 /* If copying requires more than two move insns,
1068 copy addresses to registers (to make displacements shorter)
1069 and use post-increment if available. */
1070 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1072 /* Find the mode of the largest comparison. */
1073 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1075 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1076 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1079 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1083 /* This function contains the main loop used for expanding a block
1084 operation. First move what we can in the largest integer mode,
1085 then go to successively smaller modes. For every access, call
1086 GENFUN with the two operands and the EXTRA_DATA. */
1089 op_by_pieces_d::run ()
1091 while (m_max_size
> 1 && m_len
> 0)
1093 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1095 if (prepare_mode (mode
, m_align
))
1097 unsigned int size
= GET_MODE_SIZE (mode
);
1098 rtx to1
= NULL_RTX
, from1
;
1100 while (m_len
>= size
)
1105 to1
= m_to
.adjust (mode
, m_offset
);
1106 from1
= m_from
.adjust (mode
, m_offset
);
1108 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1109 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1111 generate (to1
, from1
, mode
);
1113 m_to
.maybe_postinc (size
);
1114 m_from
.maybe_postinc (size
);
1125 m_max_size
= GET_MODE_SIZE (mode
);
1128 /* The code above should have handled everything. */
1129 gcc_assert (!m_len
);
1132 /* Derived class from op_by_pieces_d, providing support for block move
1135 class move_by_pieces_d
: public op_by_pieces_d
1137 insn_gen_fn m_gen_fun
;
1138 void generate (rtx
, rtx
, machine_mode
);
1139 bool prepare_mode (machine_mode
, unsigned int);
1142 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1144 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1147 rtx
finish_endp (int);
1150 /* Return true if MODE can be used for a set of copies, given an
1151 alignment ALIGN. Prepare whatever data is necessary for later
1152 calls to generate. */
1155 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1157 insn_code icode
= optab_handler (mov_optab
, mode
);
1158 m_gen_fun
= GEN_FCN (icode
);
1159 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1162 /* A callback used when iterating for a compare_by_pieces_operation.
1163 OP0 and OP1 are the values that have been loaded and should be
1164 compared in MODE. If OP0 is NULL, this means we should generate a
1165 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1166 gen function that should be used to generate the mode. */
1169 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1170 machine_mode mode ATTRIBUTE_UNUSED
)
1172 #ifdef PUSH_ROUNDING
1173 if (op0
== NULL_RTX
)
1175 emit_single_push_insn (mode
, op1
, NULL
);
1179 emit_insn (m_gen_fun (op0
, op1
));
1182 /* Perform the final adjustment at the end of a string to obtain the
1183 correct return value for the block operation. If ENDP is 1 return
1184 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1185 end minus one byte ala stpcpy. */
1188 move_by_pieces_d::finish_endp (int endp
)
1190 gcc_assert (!m_reverse
);
1193 m_to
.maybe_postinc (-1);
1196 return m_to
.adjust (QImode
, m_offset
);
1199 /* Generate several move instructions to copy LEN bytes from block FROM to
1200 block TO. (These are MEM rtx's with BLKmode).
1202 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1203 used to push FROM to the stack.
1205 ALIGN is maximum stack alignment we can assume.
1207 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1208 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1212 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1213 unsigned int align
, int endp
)
1215 #ifndef PUSH_ROUNDING
1220 move_by_pieces_d
data (to
, from
, len
, align
);
1225 return data
.finish_endp (endp
);
1230 /* Derived class from op_by_pieces_d, providing support for block move
1233 class store_by_pieces_d
: public op_by_pieces_d
1235 insn_gen_fn m_gen_fun
;
1236 void generate (rtx
, rtx
, machine_mode
);
1237 bool prepare_mode (machine_mode
, unsigned int);
1240 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1241 unsigned HOST_WIDE_INT len
, unsigned int align
)
1242 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1245 rtx
finish_endp (int);
1248 /* Return true if MODE can be used for a set of stores, given an
1249 alignment ALIGN. Prepare whatever data is necessary for later
1250 calls to generate. */
1253 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1255 insn_code icode
= optab_handler (mov_optab
, mode
);
1256 m_gen_fun
= GEN_FCN (icode
);
1257 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1260 /* A callback used when iterating for a store_by_pieces_operation.
1261 OP0 and OP1 are the values that have been loaded and should be
1262 compared in MODE. If OP0 is NULL, this means we should generate a
1263 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1264 gen function that should be used to generate the mode. */
1267 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1269 emit_insn (m_gen_fun (op0
, op1
));
1272 /* Perform the final adjustment at the end of a string to obtain the
1273 correct return value for the block operation. If ENDP is 1 return
1274 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1275 end minus one byte ala stpcpy. */
1278 store_by_pieces_d::finish_endp (int endp
)
1280 gcc_assert (!m_reverse
);
1283 m_to
.maybe_postinc (-1);
1286 return m_to
.adjust (QImode
, m_offset
);
1289 /* Determine whether the LEN bytes generated by CONSTFUN can be
1290 stored to memory using several move instructions. CONSTFUNDATA is
1291 a pointer which will be passed as argument in every CONSTFUN call.
1292 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1293 a memset operation and false if it's a copy of a constant string.
1294 Return nonzero if a call to store_by_pieces should succeed. */
1297 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1298 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1299 void *constfundata
, unsigned int align
, bool memsetp
)
1301 unsigned HOST_WIDE_INT l
;
1302 unsigned int max_size
;
1303 HOST_WIDE_INT offset
= 0;
1304 enum insn_code icode
;
1306 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1307 rtx cst ATTRIBUTE_UNUSED
;
1312 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1316 optimize_insn_for_speed_p ()))
1319 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1321 /* We would first store what we can in the largest integer mode, then go to
1322 successively smaller modes. */
1325 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1329 max_size
= STORE_MAX_PIECES
+ 1;
1330 while (max_size
> 1 && l
> 0)
1332 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1334 icode
= optab_handler (mov_optab
, mode
);
1335 if (icode
!= CODE_FOR_nothing
1336 && align
>= GET_MODE_ALIGNMENT (mode
))
1338 unsigned int size
= GET_MODE_SIZE (mode
);
1345 cst
= (*constfun
) (constfundata
, offset
, mode
);
1346 if (!targetm
.legitimate_constant_p (mode
, cst
))
1356 max_size
= GET_MODE_SIZE (mode
);
1359 /* The code above should have handled everything. */
1366 /* Generate several move instructions to store LEN bytes generated by
1367 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1368 pointer which will be passed as argument in every CONSTFUN call.
1369 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1370 a memset operation and false if it's a copy of a constant string.
1371 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1372 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1376 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1377 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1378 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
1382 gcc_assert (endp
!= 2);
1386 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1388 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1389 optimize_insn_for_speed_p ()));
1391 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1395 return data
.finish_endp (endp
);
1400 /* Callback routine for clear_by_pieces.
1401 Return const0_rtx unconditionally. */
1404 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1409 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1410 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1413 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1418 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1422 /* Context used by compare_by_pieces_genfn. It stores the fail label
1423 to jump to in case of miscomparison, and for branch ratios greater than 1,
1424 it stores an accumulator and the current and maximum counts before
1425 emitting another branch. */
1427 class compare_by_pieces_d
: public op_by_pieces_d
1429 rtx_code_label
*m_fail_label
;
1431 int m_count
, m_batch
;
1433 void generate (rtx
, rtx
, machine_mode
);
1434 bool prepare_mode (machine_mode
, unsigned int);
1435 void finish_mode (machine_mode
);
1437 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1438 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1439 rtx_code_label
*fail_label
)
1440 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1442 m_fail_label
= fail_label
;
1446 /* A callback used when iterating for a compare_by_pieces_operation.
1447 OP0 and OP1 are the values that have been loaded and should be
1448 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1449 context structure. */
1452 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1456 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1457 true, OPTAB_LIB_WIDEN
);
1459 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1460 true, OPTAB_LIB_WIDEN
);
1461 m_accumulator
= temp
;
1463 if (++m_count
< m_batch
)
1467 op0
= m_accumulator
;
1469 m_accumulator
= NULL_RTX
;
1471 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1472 m_fail_label
, profile_probability::uninitialized ());
1475 /* Return true if MODE can be used for a set of moves and comparisons,
1476 given an alignment ALIGN. Prepare whatever data is necessary for
1477 later calls to generate. */
1480 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1482 insn_code icode
= optab_handler (mov_optab
, mode
);
1483 if (icode
== CODE_FOR_nothing
1484 || align
< GET_MODE_ALIGNMENT (mode
)
1485 || !can_compare_p (EQ
, mode
, ccp_jump
))
1487 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1490 m_accumulator
= NULL_RTX
;
1495 /* Called after expanding a series of comparisons in MODE. If we have
1496 accumulated results for which we haven't emitted a branch yet, do
1500 compare_by_pieces_d::finish_mode (machine_mode mode
)
1502 if (m_accumulator
!= NULL_RTX
)
1503 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1504 NULL_RTX
, NULL
, m_fail_label
,
1505 profile_probability::uninitialized ());
1508 /* Generate several move instructions to compare LEN bytes from blocks
1509 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1511 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1512 used to push FROM to the stack.
1514 ALIGN is maximum stack alignment we can assume.
1516 Optionally, the caller can pass a constfn and associated data in A1_CFN
1517 and A1_CFN_DATA. describing that the second operand being compared is a
1518 known constant and how to obtain its data. */
1521 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1522 rtx target
, unsigned int align
,
1523 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1525 rtx_code_label
*fail_label
= gen_label_rtx ();
1526 rtx_code_label
*end_label
= gen_label_rtx ();
1528 if (target
== NULL_RTX
1529 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1530 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1532 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1537 emit_move_insn (target
, const0_rtx
);
1538 emit_jump (end_label
);
1540 emit_label (fail_label
);
1541 emit_move_insn (target
, const1_rtx
);
1542 emit_label (end_label
);
1547 /* Emit code to move a block Y to a block X. This may be done with
1548 string-move instructions, with multiple scalar move instructions,
1549 or with a library call.
1551 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1552 SIZE is an rtx that says how long they are.
1553 ALIGN is the maximum alignment we can assume they have.
1554 METHOD describes what kind of copy this is, and what mechanisms may be used.
1555 MIN_SIZE is the minimal size of block to move
1556 MAX_SIZE is the maximal size of block to move, if it can not be represented
1557 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1559 Return the address of the new block, if memcpy is called and returns it,
1563 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1564 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1565 unsigned HOST_WIDE_INT min_size
,
1566 unsigned HOST_WIDE_INT max_size
,
1567 unsigned HOST_WIDE_INT probable_max_size
)
1574 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1579 case BLOCK_OP_NORMAL
:
1580 case BLOCK_OP_TAILCALL
:
1584 case BLOCK_OP_CALL_PARM
:
1585 may_use_call
= block_move_libcall_safe_for_call_parm ();
1587 /* Make inhibit_defer_pop nonzero around the library call
1588 to force it to pop the arguments right away. */
1592 case BLOCK_OP_NO_LIBCALL
:
1596 case BLOCK_OP_NO_LIBCALL_RET
:
1604 gcc_assert (MEM_P (x
) && MEM_P (y
));
1605 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1606 gcc_assert (align
>= BITS_PER_UNIT
);
1608 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1609 block copy is more efficient for other large modes, e.g. DCmode. */
1610 x
= adjust_address (x
, BLKmode
, 0);
1611 y
= adjust_address (y
, BLKmode
, 0);
1613 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1614 can be incorrect is coming from __builtin_memcpy. */
1615 if (CONST_INT_P (size
))
1617 x
= shallow_copy_rtx (x
);
1618 y
= shallow_copy_rtx (y
);
1619 set_mem_size (x
, INTVAL (size
));
1620 set_mem_size (y
, INTVAL (size
));
1623 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1624 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1625 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1626 expected_align
, expected_size
,
1627 min_size
, max_size
, probable_max_size
))
1629 else if (may_use_call
1630 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1631 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1633 if (may_use_call
< 0)
1636 /* Since x and y are passed to a libcall, mark the corresponding
1637 tree EXPR as addressable. */
1638 tree y_expr
= MEM_EXPR (y
);
1639 tree x_expr
= MEM_EXPR (x
);
1641 mark_addressable (y_expr
);
1643 mark_addressable (x_expr
);
1644 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1645 method
== BLOCK_OP_TAILCALL
);
1649 emit_block_move_via_loop (x
, y
, size
, align
);
1651 if (method
== BLOCK_OP_CALL_PARM
)
1658 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1660 unsigned HOST_WIDE_INT max
, min
= 0;
1661 if (GET_CODE (size
) == CONST_INT
)
1662 min
= max
= UINTVAL (size
);
1664 max
= GET_MODE_MASK (GET_MODE (size
));
1665 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1669 /* A subroutine of emit_block_move. Returns true if calling the
1670 block move libcall will not clobber any parameters which may have
1671 already been placed on the stack. */
1674 block_move_libcall_safe_for_call_parm (void)
1676 #if defined (REG_PARM_STACK_SPACE)
1680 /* If arguments are pushed on the stack, then they're safe. */
1684 /* If registers go on the stack anyway, any argument is sure to clobber
1685 an outgoing argument. */
1686 #if defined (REG_PARM_STACK_SPACE)
1687 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1688 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1689 depend on its argument. */
1691 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1692 && REG_PARM_STACK_SPACE (fn
) != 0)
1696 /* If any argument goes in memory, then it might clobber an outgoing
1699 CUMULATIVE_ARGS args_so_far_v
;
1700 cumulative_args_t args_so_far
;
1703 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1704 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1705 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1707 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1708 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1710 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1711 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1713 if (!tmp
|| !REG_P (tmp
))
1715 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1717 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1724 /* A subroutine of emit_block_move. Expand a movmem pattern;
1725 return true if successful. */
1728 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1729 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1730 unsigned HOST_WIDE_INT min_size
,
1731 unsigned HOST_WIDE_INT max_size
,
1732 unsigned HOST_WIDE_INT probable_max_size
)
1734 int save_volatile_ok
= volatile_ok
;
1736 if (expected_align
< align
)
1737 expected_align
= align
;
1738 if (expected_size
!= -1)
1740 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1741 expected_size
= probable_max_size
;
1742 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1743 expected_size
= min_size
;
1746 /* Since this is a move insn, we don't care about volatility. */
1749 /* Try the most limited insn first, because there's no point
1750 including more than one in the machine description unless
1751 the more limited one has some advantage. */
1753 opt_scalar_int_mode mode_iter
;
1754 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1756 scalar_int_mode mode
= mode_iter
.require ();
1757 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1759 if (code
!= CODE_FOR_nothing
1760 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1761 here because if SIZE is less than the mode mask, as it is
1762 returned by the macro, it will definitely be less than the
1763 actual mode mask. Since SIZE is within the Pmode address
1764 space, we limit MODE to Pmode. */
1765 && ((CONST_INT_P (size
)
1766 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1767 <= (GET_MODE_MASK (mode
) >> 1)))
1768 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1769 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1771 struct expand_operand ops
[9];
1774 /* ??? When called via emit_block_move_for_call, it'd be
1775 nice if there were some way to inform the backend, so
1776 that it doesn't fail the expansion because it thinks
1777 emitting the libcall would be more efficient. */
1778 nops
= insn_data
[(int) code
].n_generator_args
;
1779 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1781 create_fixed_operand (&ops
[0], x
);
1782 create_fixed_operand (&ops
[1], y
);
1783 /* The check above guarantees that this size conversion is valid. */
1784 create_convert_operand_to (&ops
[2], size
, mode
, true);
1785 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1788 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1789 create_integer_operand (&ops
[5], expected_size
);
1793 create_integer_operand (&ops
[6], min_size
);
1794 /* If we can not represent the maximal size,
1795 make parameter NULL. */
1796 if ((HOST_WIDE_INT
) max_size
!= -1)
1797 create_integer_operand (&ops
[7], max_size
);
1799 create_fixed_operand (&ops
[7], NULL
);
1803 /* If we can not represent the maximal size,
1804 make parameter NULL. */
1805 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1806 create_integer_operand (&ops
[8], probable_max_size
);
1808 create_fixed_operand (&ops
[8], NULL
);
1810 if (maybe_expand_insn (code
, nops
, ops
))
1812 volatile_ok
= save_volatile_ok
;
1818 volatile_ok
= save_volatile_ok
;
1822 /* A subroutine of emit_block_move. Copy the data via an explicit
1823 loop. This is used only when libcalls are forbidden. */
1824 /* ??? It'd be nice to copy in hunks larger than QImode. */
1827 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1828 unsigned int align ATTRIBUTE_UNUSED
)
1830 rtx_code_label
*cmp_label
, *top_label
;
1831 rtx iter
, x_addr
, y_addr
, tmp
;
1832 machine_mode x_addr_mode
= get_address_mode (x
);
1833 machine_mode y_addr_mode
= get_address_mode (y
);
1834 machine_mode iter_mode
;
1836 iter_mode
= GET_MODE (size
);
1837 if (iter_mode
== VOIDmode
)
1838 iter_mode
= word_mode
;
1840 top_label
= gen_label_rtx ();
1841 cmp_label
= gen_label_rtx ();
1842 iter
= gen_reg_rtx (iter_mode
);
1844 emit_move_insn (iter
, const0_rtx
);
1846 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1847 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1848 do_pending_stack_adjust ();
1850 emit_jump (cmp_label
);
1851 emit_label (top_label
);
1853 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1854 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1856 if (x_addr_mode
!= y_addr_mode
)
1857 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1858 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1860 x
= change_address (x
, QImode
, x_addr
);
1861 y
= change_address (y
, QImode
, y_addr
);
1863 emit_move_insn (x
, y
);
1865 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1866 true, OPTAB_LIB_WIDEN
);
1868 emit_move_insn (iter
, tmp
);
1870 emit_label (cmp_label
);
1872 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1874 profile_probability::guessed_always ()
1875 .apply_scale (9, 10));
1878 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1879 TAILCALL is true if this is a tail call. */
1882 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1883 rtx size
, bool tailcall
)
1885 rtx dst_addr
, src_addr
;
1886 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1887 machine_mode size_mode
;
1889 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1890 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1891 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1893 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1894 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1895 src_tree
= make_tree (ptr_type_node
, src_addr
);
1897 size_mode
= TYPE_MODE (sizetype
);
1898 size
= convert_to_mode (size_mode
, size
, 1);
1899 size
= copy_to_mode_reg (size_mode
, size
);
1900 size_tree
= make_tree (sizetype
, size
);
1902 /* It is incorrect to use the libcall calling conventions for calls to
1903 memcpy/memmove/memcmp because they can be provided by the user. */
1904 tree fn
= builtin_decl_implicit (fncode
);
1905 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1906 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1908 return expand_call (call_expr
, NULL_RTX
, false);
1911 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1912 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1913 otherwise return null. */
1916 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1917 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1918 HOST_WIDE_INT align
)
1920 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1922 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1925 struct expand_operand ops
[5];
1926 create_output_operand (&ops
[0], target
, insn_mode
);
1927 create_fixed_operand (&ops
[1], arg1_rtx
);
1928 create_fixed_operand (&ops
[2], arg2_rtx
);
1929 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1930 TYPE_UNSIGNED (arg3_type
));
1931 create_integer_operand (&ops
[4], align
);
1932 if (maybe_expand_insn (icode
, 5, ops
))
1933 return ops
[0].value
;
1937 /* Expand a block compare between X and Y with length LEN using the
1938 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1939 of the expression that was used to calculate the length. ALIGN
1940 gives the known minimum common alignment. */
1943 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1946 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1947 implementing memcmp because it will stop if it encounters two
1949 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1951 if (icode
== CODE_FOR_nothing
)
1954 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1957 /* Emit code to compare a block Y to a block X. This may be done with
1958 string-compare instructions, with multiple scalar instructions,
1959 or with a library call.
1961 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1962 they are. LEN_TYPE is the type of the expression that was used to
1965 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1966 value of a normal memcmp call, instead we can just compare for equality.
1967 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1970 Optionally, the caller can pass a constfn and associated data in Y_CFN
1971 and Y_CFN_DATA. describing that the second operand being compared is a
1972 known constant and how to obtain its data.
1973 Return the result of the comparison, or NULL_RTX if we failed to
1974 perform the operation. */
1977 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1978 bool equality_only
, by_pieces_constfn y_cfn
,
1983 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1986 gcc_assert (MEM_P (x
) && MEM_P (y
));
1987 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1988 gcc_assert (align
>= BITS_PER_UNIT
);
1990 x
= adjust_address (x
, BLKmode
, 0);
1991 y
= adjust_address (y
, BLKmode
, 0);
1994 && CONST_INT_P (len
)
1995 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1996 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
1999 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2004 /* Copy all or part of a value X into registers starting at REGNO.
2005 The number of registers to be filled is NREGS. */
2008 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2013 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2014 x
= validize_mem (force_const_mem (mode
, x
));
2016 /* See if the machine can do this with a load multiple insn. */
2017 if (targetm
.have_load_multiple ())
2019 rtx_insn
*last
= get_last_insn ();
2020 rtx first
= gen_rtx_REG (word_mode
, regno
);
2021 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2028 delete_insns_since (last
);
2031 for (int i
= 0; i
< nregs
; i
++)
2032 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2033 operand_subword_force (x
, i
, mode
));
2036 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2037 The number of registers to be filled is NREGS. */
2040 move_block_from_reg (int regno
, rtx x
, int nregs
)
2045 /* See if the machine can do this with a store multiple insn. */
2046 if (targetm
.have_store_multiple ())
2048 rtx_insn
*last
= get_last_insn ();
2049 rtx first
= gen_rtx_REG (word_mode
, regno
);
2050 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2057 delete_insns_since (last
);
2060 for (int i
= 0; i
< nregs
; i
++)
2062 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2066 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2070 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2071 ORIG, where ORIG is a non-consecutive group of registers represented by
2072 a PARALLEL. The clone is identical to the original except in that the
2073 original set of registers is replaced by a new set of pseudo registers.
2074 The new set has the same modes as the original set. */
2077 gen_group_rtx (rtx orig
)
2082 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2084 length
= XVECLEN (orig
, 0);
2085 tmps
= XALLOCAVEC (rtx
, length
);
2087 /* Skip a NULL entry in first slot. */
2088 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2093 for (; i
< length
; i
++)
2095 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2096 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2098 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2101 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2104 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2105 except that values are placed in TMPS[i], and must later be moved
2106 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2109 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2114 machine_mode m
= GET_MODE (orig_src
);
2116 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2119 && !SCALAR_INT_MODE_P (m
)
2120 && !MEM_P (orig_src
)
2121 && GET_CODE (orig_src
) != CONCAT
)
2123 scalar_int_mode imode
;
2124 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2126 src
= gen_reg_rtx (imode
);
2127 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2131 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2132 emit_move_insn (src
, orig_src
);
2134 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2138 /* Check for a NULL entry, used to indicate that the parameter goes
2139 both on the stack and in registers. */
2140 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2145 /* Process the pieces. */
2146 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2148 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2149 poly_int64 bytepos
= INTVAL (XEXP (XVECEXP (dst
, 0, i
), 1));
2150 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2151 poly_int64 shift
= 0;
2153 /* Handle trailing fragments that run over the size of the struct.
2154 It's the target's responsibility to make sure that the fragment
2155 cannot be strictly smaller in some cases and strictly larger
2157 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2158 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2160 /* Arrange to shift the fragment to where it belongs.
2161 extract_bit_field loads to the lsb of the reg. */
2163 #ifdef BLOCK_REG_PADDING
2164 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2165 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2170 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2171 bytelen
= ssize
- bytepos
;
2172 gcc_assert (maybe_gt (bytelen
, 0));
2175 /* If we won't be loading directly from memory, protect the real source
2176 from strange tricks we might play; but make sure that the source can
2177 be loaded directly into the destination. */
2179 if (!MEM_P (orig_src
)
2180 && (!CONSTANT_P (orig_src
)
2181 || (GET_MODE (orig_src
) != mode
2182 && GET_MODE (orig_src
) != VOIDmode
)))
2184 if (GET_MODE (orig_src
) == VOIDmode
)
2185 src
= gen_reg_rtx (mode
);
2187 src
= gen_reg_rtx (GET_MODE (orig_src
));
2189 emit_move_insn (src
, orig_src
);
2192 /* Optimize the access just a bit. */
2194 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2195 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2196 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2197 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2199 tmps
[i
] = gen_reg_rtx (mode
);
2200 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2202 else if (COMPLEX_MODE_P (mode
)
2203 && GET_MODE (src
) == mode
2204 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2205 /* Let emit_move_complex do the bulk of the work. */
2207 else if (GET_CODE (src
) == CONCAT
)
2209 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2210 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2214 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2215 && known_le (subpos
+ bytelen
, slen0
))
2217 /* The following assumes that the concatenated objects all
2218 have the same size. In this case, a simple calculation
2219 can be used to determine the object and the bit field
2221 tmps
[i
] = XEXP (src
, elt
);
2222 if (maybe_ne (subpos
, 0)
2223 || maybe_ne (subpos
+ bytelen
, slen0
)
2224 || (!CONSTANT_P (tmps
[i
])
2225 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2226 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2227 subpos
* BITS_PER_UNIT
,
2228 1, NULL_RTX
, mode
, mode
, false,
2235 gcc_assert (known_eq (bytepos
, 0));
2236 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2237 emit_move_insn (mem
, src
);
2238 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2239 0, 1, NULL_RTX
, mode
, mode
, false,
2243 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2244 SIMD register, which is currently broken. While we get GCC
2245 to emit proper RTL for these cases, let's dump to memory. */
2246 else if (VECTOR_MODE_P (GET_MODE (dst
))
2249 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2252 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2253 emit_move_insn (mem
, src
);
2254 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2256 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2257 && XVECLEN (dst
, 0) > 1)
2258 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2259 else if (CONSTANT_P (src
))
2261 if (known_eq (bytelen
, ssize
))
2267 /* TODO: const_wide_int can have sizes other than this... */
2268 gcc_assert (known_eq (2 * bytelen
, ssize
));
2269 split_double (src
, &first
, &second
);
2276 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2279 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2280 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2281 mode
, mode
, false, NULL
);
2283 if (maybe_ne (shift
, 0))
2284 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2289 /* Emit code to move a block SRC of type TYPE to a block DST,
2290 where DST is non-consecutive registers represented by a PARALLEL.
2291 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2295 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2300 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2301 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2303 /* Copy the extracted pieces into the proper (probable) hard regs. */
2304 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2306 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2309 emit_move_insn (d
, tmps
[i
]);
2313 /* Similar, but load SRC into new pseudos in a format that looks like
2314 PARALLEL. This can later be fed to emit_group_move to get things
2315 in the right place. */
2318 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2323 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2324 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2326 /* Convert the vector to look just like the original PARALLEL, except
2327 with the computed values. */
2328 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2330 rtx e
= XVECEXP (parallel
, 0, i
);
2331 rtx d
= XEXP (e
, 0);
2335 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2336 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2338 RTVEC_ELT (vec
, i
) = e
;
2341 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2344 /* Emit code to move a block SRC to block DST, where SRC and DST are
2345 non-consecutive groups of registers, each represented by a PARALLEL. */
2348 emit_group_move (rtx dst
, rtx src
)
2352 gcc_assert (GET_CODE (src
) == PARALLEL
2353 && GET_CODE (dst
) == PARALLEL
2354 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2356 /* Skip first entry if NULL. */
2357 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2358 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2359 XEXP (XVECEXP (src
, 0, i
), 0));
2362 /* Move a group of registers represented by a PARALLEL into pseudos. */
2365 emit_group_move_into_temps (rtx src
)
2367 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2370 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2372 rtx e
= XVECEXP (src
, 0, i
);
2373 rtx d
= XEXP (e
, 0);
2376 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2377 RTVEC_ELT (vec
, i
) = e
;
2380 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2383 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2384 where SRC is non-consecutive registers represented by a PARALLEL.
2385 SSIZE represents the total size of block ORIG_DST, or -1 if not
2389 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2393 int start
, finish
, i
;
2394 machine_mode m
= GET_MODE (orig_dst
);
2396 gcc_assert (GET_CODE (src
) == PARALLEL
);
2398 if (!SCALAR_INT_MODE_P (m
)
2399 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2401 scalar_int_mode imode
;
2402 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2404 dst
= gen_reg_rtx (imode
);
2405 emit_group_store (dst
, src
, type
, ssize
);
2406 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2410 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2411 emit_group_store (dst
, src
, type
, ssize
);
2413 emit_move_insn (orig_dst
, dst
);
2417 /* Check for a NULL entry, used to indicate that the parameter goes
2418 both on the stack and in registers. */
2419 if (XEXP (XVECEXP (src
, 0, 0), 0))
2423 finish
= XVECLEN (src
, 0);
2425 tmps
= XALLOCAVEC (rtx
, finish
);
2427 /* Copy the (probable) hard regs into pseudos. */
2428 for (i
= start
; i
< finish
; i
++)
2430 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2431 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2433 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2434 emit_move_insn (tmps
[i
], reg
);
2440 /* If we won't be storing directly into memory, protect the real destination
2441 from strange tricks we might play. */
2443 if (GET_CODE (dst
) == PARALLEL
)
2447 /* We can get a PARALLEL dst if there is a conditional expression in
2448 a return statement. In that case, the dst and src are the same,
2449 so no action is necessary. */
2450 if (rtx_equal_p (dst
, src
))
2453 /* It is unclear if we can ever reach here, but we may as well handle
2454 it. Allocate a temporary, and split this into a store/load to/from
2456 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2457 emit_group_store (temp
, src
, type
, ssize
);
2458 emit_group_load (dst
, temp
, type
, ssize
);
2461 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2463 machine_mode outer
= GET_MODE (dst
);
2469 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2470 dst
= gen_reg_rtx (outer
);
2472 /* Make life a bit easier for combine. */
2473 /* If the first element of the vector is the low part
2474 of the destination mode, use a paradoxical subreg to
2475 initialize the destination. */
2478 inner
= GET_MODE (tmps
[start
]);
2479 bytepos
= subreg_lowpart_offset (inner
, outer
);
2480 if (known_eq (INTVAL (XEXP (XVECEXP (src
, 0, start
), 1)), bytepos
))
2482 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2486 emit_move_insn (dst
, temp
);
2493 /* If the first element wasn't the low part, try the last. */
2495 && start
< finish
- 1)
2497 inner
= GET_MODE (tmps
[finish
- 1]);
2498 bytepos
= subreg_lowpart_offset (inner
, outer
);
2499 if (known_eq (INTVAL (XEXP (XVECEXP (src
, 0, finish
- 1), 1)),
2502 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2506 emit_move_insn (dst
, temp
);
2513 /* Otherwise, simply initialize the result to zero. */
2515 emit_move_insn (dst
, CONST0_RTX (outer
));
2518 /* Process the pieces. */
2519 for (i
= start
; i
< finish
; i
++)
2521 poly_int64 bytepos
= INTVAL (XEXP (XVECEXP (src
, 0, i
), 1));
2522 machine_mode mode
= GET_MODE (tmps
[i
]);
2523 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2524 poly_uint64 adj_bytelen
;
2527 /* Handle trailing fragments that run over the size of the struct.
2528 It's the target's responsibility to make sure that the fragment
2529 cannot be strictly smaller in some cases and strictly larger
2531 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2532 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2533 adj_bytelen
= ssize
- bytepos
;
2535 adj_bytelen
= bytelen
;
2537 if (GET_CODE (dst
) == CONCAT
)
2539 if (known_le (bytepos
+ adj_bytelen
,
2540 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2541 dest
= XEXP (dst
, 0);
2542 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2544 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2545 dest
= XEXP (dst
, 1);
2549 machine_mode dest_mode
= GET_MODE (dest
);
2550 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2552 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2554 if (GET_MODE_ALIGNMENT (dest_mode
)
2555 >= GET_MODE_ALIGNMENT (tmp_mode
))
2557 dest
= assign_stack_temp (dest_mode
,
2558 GET_MODE_SIZE (dest_mode
));
2559 emit_move_insn (adjust_address (dest
,
2567 dest
= assign_stack_temp (tmp_mode
,
2568 GET_MODE_SIZE (tmp_mode
));
2569 emit_move_insn (dest
, tmps
[i
]);
2570 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2576 /* Handle trailing fragments that run over the size of the struct. */
2577 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2579 /* store_bit_field always takes its value from the lsb.
2580 Move the fragment to the lsb if it's not already there. */
2582 #ifdef BLOCK_REG_PADDING
2583 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2584 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2590 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2591 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2595 /* Make sure not to write past the end of the struct. */
2596 store_bit_field (dest
,
2597 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2598 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2599 VOIDmode
, tmps
[i
], false);
2602 /* Optimize the access just a bit. */
2603 else if (MEM_P (dest
)
2604 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2605 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2606 && multiple_p (bytepos
* BITS_PER_UNIT
,
2607 GET_MODE_ALIGNMENT (mode
))
2608 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2609 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2612 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2613 0, 0, mode
, tmps
[i
], false);
2616 /* Copy from the pseudo into the (probable) hard reg. */
2617 if (orig_dst
!= dst
)
2618 emit_move_insn (orig_dst
, dst
);
2621 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2622 of the value stored in X. */
2625 maybe_emit_group_store (rtx x
, tree type
)
2627 machine_mode mode
= TYPE_MODE (type
);
2628 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2629 if (GET_CODE (x
) == PARALLEL
)
2631 rtx result
= gen_reg_rtx (mode
);
2632 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2638 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2640 This is used on targets that return BLKmode values in registers. */
2643 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2645 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2646 rtx src
= NULL
, dst
= NULL
;
2647 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2648 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2649 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2650 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2651 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2652 fixed_size_mode copy_mode
;
2654 /* BLKmode registers created in the back-end shouldn't have survived. */
2655 gcc_assert (mode
!= BLKmode
);
2657 /* If the structure doesn't take up a whole number of words, see whether
2658 SRCREG is padded on the left or on the right. If it's on the left,
2659 set PADDING_CORRECTION to the number of bits to skip.
2661 In most ABIs, the structure will be returned at the least end of
2662 the register, which translates to right padding on little-endian
2663 targets and left padding on big-endian targets. The opposite
2664 holds if the structure is returned at the most significant
2665 end of the register. */
2666 if (bytes
% UNITS_PER_WORD
!= 0
2667 && (targetm
.calls
.return_in_msb (type
)
2669 : BYTES_BIG_ENDIAN
))
2671 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2673 /* We can use a single move if we have an exact mode for the size. */
2674 else if (MEM_P (target
)
2675 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2676 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2677 && bytes
== GET_MODE_SIZE (mode
))
2679 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2683 /* And if we additionally have the same mode for a register. */
2684 else if (REG_P (target
)
2685 && GET_MODE (target
) == mode
2686 && bytes
== GET_MODE_SIZE (mode
))
2688 emit_move_insn (target
, srcreg
);
2692 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2693 into a new pseudo which is a full word. */
2694 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2696 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2700 /* Copy the structure BITSIZE bits at a time. If the target lives in
2701 memory, take care of not reading/writing past its end by selecting
2702 a copy mode suited to BITSIZE. This should always be possible given
2705 If the target lives in register, make sure not to select a copy mode
2706 larger than the mode of the register.
2708 We could probably emit more efficient code for machines which do not use
2709 strict alignment, but it doesn't seem worth the effort at the current
2712 copy_mode
= word_mode
;
2715 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2716 if (mem_mode
.exists ())
2717 copy_mode
= mem_mode
.require ();
2719 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2722 for (bitpos
= 0, xbitpos
= padding_correction
;
2723 bitpos
< bytes
* BITS_PER_UNIT
;
2724 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2726 /* We need a new source operand each time xbitpos is on a
2727 word boundary and when xbitpos == padding_correction
2728 (the first time through). */
2729 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2730 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2732 /* We need a new destination operand each time bitpos is on
2734 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2736 else if (bitpos
% BITS_PER_WORD
== 0)
2737 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2739 /* Use xbitpos for the source extraction (right justified) and
2740 bitpos for the destination store (left justified). */
2741 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2742 extract_bit_field (src
, bitsize
,
2743 xbitpos
% BITS_PER_WORD
, 1,
2744 NULL_RTX
, copy_mode
, copy_mode
,
2750 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2751 register if it contains any data, otherwise return null.
2753 This is used on targets that return BLKmode values in registers. */
2756 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2759 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2760 unsigned int bitsize
;
2761 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2762 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2763 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2764 fixed_size_mode dst_mode
;
2766 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2768 x
= expand_normal (src
);
2770 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2774 /* If the structure doesn't take up a whole number of words, see
2775 whether the register value should be padded on the left or on
2776 the right. Set PADDING_CORRECTION to the number of padding
2777 bits needed on the left side.
2779 In most ABIs, the structure will be returned at the least end of
2780 the register, which translates to right padding on little-endian
2781 targets and left padding on big-endian targets. The opposite
2782 holds if the structure is returned at the most significant
2783 end of the register. */
2784 if (bytes
% UNITS_PER_WORD
!= 0
2785 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2787 : BYTES_BIG_ENDIAN
))
2788 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2791 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2792 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2793 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2795 /* Copy the structure BITSIZE bits at a time. */
2796 for (bitpos
= 0, xbitpos
= padding_correction
;
2797 bitpos
< bytes
* BITS_PER_UNIT
;
2798 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2800 /* We need a new destination pseudo each time xbitpos is
2801 on a word boundary and when xbitpos == padding_correction
2802 (the first time through). */
2803 if (xbitpos
% BITS_PER_WORD
== 0
2804 || xbitpos
== padding_correction
)
2806 /* Generate an appropriate register. */
2807 dst_word
= gen_reg_rtx (word_mode
);
2808 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2810 /* Clear the destination before we move anything into it. */
2811 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2814 /* We need a new source operand each time bitpos is on a word
2816 if (bitpos
% BITS_PER_WORD
== 0)
2817 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2819 /* Use bitpos for the source extraction (left justified) and
2820 xbitpos for the destination store (right justified). */
2821 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2823 extract_bit_field (src_word
, bitsize
,
2824 bitpos
% BITS_PER_WORD
, 1,
2825 NULL_RTX
, word_mode
, word_mode
,
2830 if (mode
== BLKmode
)
2832 /* Find the smallest integer mode large enough to hold the
2833 entire structure. */
2834 opt_scalar_int_mode mode_iter
;
2835 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2836 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2839 /* A suitable mode should have been found. */
2840 mode
= mode_iter
.require ();
2843 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2844 dst_mode
= word_mode
;
2847 dst
= gen_reg_rtx (dst_mode
);
2849 for (i
= 0; i
< n_regs
; i
++)
2850 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2852 if (mode
!= dst_mode
)
2853 dst
= gen_lowpart (mode
, dst
);
2858 /* Add a USE expression for REG to the (possibly empty) list pointed
2859 to by CALL_FUSAGE. REG must denote a hard register. */
2862 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2864 gcc_assert (REG_P (reg
));
2866 if (!HARD_REGISTER_P (reg
))
2870 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2873 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2874 to by CALL_FUSAGE. REG must denote a hard register. */
2877 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2879 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2882 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2885 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2886 starting at REGNO. All of these registers must be hard registers. */
2889 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2893 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2895 for (i
= 0; i
< nregs
; i
++)
2896 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2899 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2900 PARALLEL REGS. This is for calls that pass values in multiple
2901 non-contiguous locations. The Irix 6 ABI has examples of this. */
2904 use_group_regs (rtx
*call_fusage
, rtx regs
)
2908 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2910 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2912 /* A NULL entry means the parameter goes both on the stack and in
2913 registers. This can also be a MEM for targets that pass values
2914 partially on the stack and partially in registers. */
2915 if (reg
!= 0 && REG_P (reg
))
2916 use_reg (call_fusage
, reg
);
2920 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2921 assigment and the code of the expresion on the RHS is CODE. Return
2925 get_def_for_expr (tree name
, enum tree_code code
)
2929 if (TREE_CODE (name
) != SSA_NAME
)
2932 def_stmt
= get_gimple_for_ssa_name (name
);
2934 || gimple_assign_rhs_code (def_stmt
) != code
)
2940 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2941 assigment and the class of the expresion on the RHS is CLASS. Return
2945 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2949 if (TREE_CODE (name
) != SSA_NAME
)
2952 def_stmt
= get_gimple_for_ssa_name (name
);
2954 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2960 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2961 its length in bytes. */
2964 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2965 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2966 unsigned HOST_WIDE_INT min_size
,
2967 unsigned HOST_WIDE_INT max_size
,
2968 unsigned HOST_WIDE_INT probable_max_size
)
2970 machine_mode mode
= GET_MODE (object
);
2973 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2975 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2976 just move a zero. Otherwise, do this a piece at a time. */
2978 && CONST_INT_P (size
)
2979 && known_eq (INTVAL (size
), GET_MODE_SIZE (mode
)))
2981 rtx zero
= CONST0_RTX (mode
);
2984 emit_move_insn (object
, zero
);
2988 if (COMPLEX_MODE_P (mode
))
2990 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
2993 write_complex_part (object
, zero
, 0);
2994 write_complex_part (object
, zero
, 1);
3000 if (size
== const0_rtx
)
3003 align
= MEM_ALIGN (object
);
3005 if (CONST_INT_P (size
)
3006 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3008 optimize_insn_for_speed_p ()))
3009 clear_by_pieces (object
, INTVAL (size
), align
);
3010 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3011 expected_align
, expected_size
,
3012 min_size
, max_size
, probable_max_size
))
3014 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3015 return set_storage_via_libcall (object
, size
, const0_rtx
,
3016 method
== BLOCK_OP_TAILCALL
);
3024 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3026 unsigned HOST_WIDE_INT max
, min
= 0;
3027 if (GET_CODE (size
) == CONST_INT
)
3028 min
= max
= UINTVAL (size
);
3030 max
= GET_MODE_MASK (GET_MODE (size
));
3031 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3035 /* A subroutine of clear_storage. Expand a call to memset.
3036 Return the return value of memset, 0 otherwise. */
3039 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3041 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3042 machine_mode size_mode
;
3044 object
= copy_addr_to_reg (XEXP (object
, 0));
3045 object_tree
= make_tree (ptr_type_node
, object
);
3047 if (!CONST_INT_P (val
))
3048 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3049 val_tree
= make_tree (integer_type_node
, val
);
3051 size_mode
= TYPE_MODE (sizetype
);
3052 size
= convert_to_mode (size_mode
, size
, 1);
3053 size
= copy_to_mode_reg (size_mode
, size
);
3054 size_tree
= make_tree (sizetype
, size
);
3056 /* It is incorrect to use the libcall calling conventions for calls to
3057 memset because it can be provided by the user. */
3058 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3059 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3060 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3062 return expand_call (call_expr
, NULL_RTX
, false);
3065 /* Expand a setmem pattern; return true if successful. */
3068 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3069 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3070 unsigned HOST_WIDE_INT min_size
,
3071 unsigned HOST_WIDE_INT max_size
,
3072 unsigned HOST_WIDE_INT probable_max_size
)
3074 /* Try the most limited insn first, because there's no point
3075 including more than one in the machine description unless
3076 the more limited one has some advantage. */
3078 if (expected_align
< align
)
3079 expected_align
= align
;
3080 if (expected_size
!= -1)
3082 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3083 expected_size
= max_size
;
3084 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3085 expected_size
= min_size
;
3088 opt_scalar_int_mode mode_iter
;
3089 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3091 scalar_int_mode mode
= mode_iter
.require ();
3092 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3094 if (code
!= CODE_FOR_nothing
3095 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3096 here because if SIZE is less than the mode mask, as it is
3097 returned by the macro, it will definitely be less than the
3098 actual mode mask. Since SIZE is within the Pmode address
3099 space, we limit MODE to Pmode. */
3100 && ((CONST_INT_P (size
)
3101 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3102 <= (GET_MODE_MASK (mode
) >> 1)))
3103 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3104 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3106 struct expand_operand ops
[9];
3109 nops
= insn_data
[(int) code
].n_generator_args
;
3110 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3112 create_fixed_operand (&ops
[0], object
);
3113 /* The check above guarantees that this size conversion is valid. */
3114 create_convert_operand_to (&ops
[1], size
, mode
, true);
3115 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3116 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3119 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3120 create_integer_operand (&ops
[5], expected_size
);
3124 create_integer_operand (&ops
[6], min_size
);
3125 /* If we can not represent the maximal size,
3126 make parameter NULL. */
3127 if ((HOST_WIDE_INT
) max_size
!= -1)
3128 create_integer_operand (&ops
[7], max_size
);
3130 create_fixed_operand (&ops
[7], NULL
);
3134 /* If we can not represent the maximal size,
3135 make parameter NULL. */
3136 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3137 create_integer_operand (&ops
[8], probable_max_size
);
3139 create_fixed_operand (&ops
[8], NULL
);
3141 if (maybe_expand_insn (code
, nops
, ops
))
3150 /* Write to one of the components of the complex value CPLX. Write VAL to
3151 the real part if IMAG_P is false, and the imaginary part if its true. */
3154 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3160 if (GET_CODE (cplx
) == CONCAT
)
3162 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3166 cmode
= GET_MODE (cplx
);
3167 imode
= GET_MODE_INNER (cmode
);
3168 ibitsize
= GET_MODE_BITSIZE (imode
);
3170 /* For MEMs simplify_gen_subreg may generate an invalid new address
3171 because, e.g., the original address is considered mode-dependent
3172 by the target, which restricts simplify_subreg from invoking
3173 adjust_address_nv. Instead of preparing fallback support for an
3174 invalid address, we call adjust_address_nv directly. */
3177 emit_move_insn (adjust_address_nv (cplx
, imode
,
3178 imag_p
? GET_MODE_SIZE (imode
) : 0),
3183 /* If the sub-object is at least word sized, then we know that subregging
3184 will work. This special case is important, since store_bit_field
3185 wants to operate on integer modes, and there's rarely an OImode to
3186 correspond to TCmode. */
3187 if (ibitsize
>= BITS_PER_WORD
3188 /* For hard regs we have exact predicates. Assume we can split
3189 the original object if it spans an even number of hard regs.
3190 This special case is important for SCmode on 64-bit platforms
3191 where the natural size of floating-point regs is 32-bit. */
3193 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3194 && REG_NREGS (cplx
) % 2 == 0))
3196 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3197 imag_p
? GET_MODE_SIZE (imode
) : 0);
3200 emit_move_insn (part
, val
);
3204 /* simplify_gen_subreg may fail for sub-word MEMs. */
3205 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3208 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3212 /* Extract one of the components of the complex value CPLX. Extract the
3213 real part if IMAG_P is false, and the imaginary part if it's true. */
3216 read_complex_part (rtx cplx
, bool imag_p
)
3222 if (GET_CODE (cplx
) == CONCAT
)
3223 return XEXP (cplx
, imag_p
);
3225 cmode
= GET_MODE (cplx
);
3226 imode
= GET_MODE_INNER (cmode
);
3227 ibitsize
= GET_MODE_BITSIZE (imode
);
3229 /* Special case reads from complex constants that got spilled to memory. */
3230 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3232 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3233 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3235 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3236 if (CONSTANT_CLASS_P (part
))
3237 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3241 /* For MEMs simplify_gen_subreg may generate an invalid new address
3242 because, e.g., the original address is considered mode-dependent
3243 by the target, which restricts simplify_subreg from invoking
3244 adjust_address_nv. Instead of preparing fallback support for an
3245 invalid address, we call adjust_address_nv directly. */
3247 return adjust_address_nv (cplx
, imode
,
3248 imag_p
? GET_MODE_SIZE (imode
) : 0);
3250 /* If the sub-object is at least word sized, then we know that subregging
3251 will work. This special case is important, since extract_bit_field
3252 wants to operate on integer modes, and there's rarely an OImode to
3253 correspond to TCmode. */
3254 if (ibitsize
>= BITS_PER_WORD
3255 /* For hard regs we have exact predicates. Assume we can split
3256 the original object if it spans an even number of hard regs.
3257 This special case is important for SCmode on 64-bit platforms
3258 where the natural size of floating-point regs is 32-bit. */
3260 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3261 && REG_NREGS (cplx
) % 2 == 0))
3263 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3264 imag_p
? GET_MODE_SIZE (imode
) : 0);
3268 /* simplify_gen_subreg may fail for sub-word MEMs. */
3269 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3272 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3273 true, NULL_RTX
, imode
, imode
, false, NULL
);
3276 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3277 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3278 represented in NEW_MODE. If FORCE is true, this will never happen, as
3279 we'll force-create a SUBREG if needed. */
3282 emit_move_change_mode (machine_mode new_mode
,
3283 machine_mode old_mode
, rtx x
, bool force
)
3287 if (push_operand (x
, GET_MODE (x
)))
3289 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3290 MEM_COPY_ATTRIBUTES (ret
, x
);
3294 /* We don't have to worry about changing the address since the
3295 size in bytes is supposed to be the same. */
3296 if (reload_in_progress
)
3298 /* Copy the MEM to change the mode and move any
3299 substitutions from the old MEM to the new one. */
3300 ret
= adjust_address_nv (x
, new_mode
, 0);
3301 copy_replacements (x
, ret
);
3304 ret
= adjust_address (x
, new_mode
, 0);
3308 /* Note that we do want simplify_subreg's behavior of validating
3309 that the new mode is ok for a hard register. If we were to use
3310 simplify_gen_subreg, we would create the subreg, but would
3311 probably run into the target not being able to implement it. */
3312 /* Except, of course, when FORCE is true, when this is exactly what
3313 we want. Which is needed for CCmodes on some targets. */
3315 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3317 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3323 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3324 an integer mode of the same size as MODE. Returns the instruction
3325 emitted, or NULL if such a move could not be generated. */
3328 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3330 scalar_int_mode imode
;
3331 enum insn_code code
;
3333 /* There must exist a mode of the exact size we require. */
3334 if (!int_mode_for_mode (mode
).exists (&imode
))
3337 /* The target must support moves in this mode. */
3338 code
= optab_handler (mov_optab
, imode
);
3339 if (code
== CODE_FOR_nothing
)
3342 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3345 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3348 return emit_insn (GEN_FCN (code
) (x
, y
));
3351 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3352 Return an equivalent MEM that does not use an auto-increment. */
3355 emit_move_resolve_push (machine_mode mode
, rtx x
)
3357 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3360 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3361 #ifdef PUSH_ROUNDING
3362 adjust
= PUSH_ROUNDING (adjust
);
3364 if (code
== PRE_DEC
|| code
== POST_DEC
)
3366 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3368 rtx expr
= XEXP (XEXP (x
, 0), 1);
3370 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3371 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3372 if (GET_CODE (expr
) == MINUS
)
3374 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3378 /* Do not use anti_adjust_stack, since we don't want to update
3379 stack_pointer_delta. */
3380 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3381 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3382 0, OPTAB_LIB_WIDEN
);
3383 if (temp
!= stack_pointer_rtx
)
3384 emit_move_insn (stack_pointer_rtx
, temp
);
3391 temp
= stack_pointer_rtx
;
3396 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3402 return replace_equiv_address (x
, temp
);
3405 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3406 X is known to satisfy push_operand, and MODE is known to be complex.
3407 Returns the last instruction emitted. */
3410 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3412 scalar_mode submode
= GET_MODE_INNER (mode
);
3415 #ifdef PUSH_ROUNDING
3416 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3418 /* In case we output to the stack, but the size is smaller than the
3419 machine can push exactly, we need to use move instructions. */
3420 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3422 x
= emit_move_resolve_push (mode
, x
);
3423 return emit_move_insn (x
, y
);
3427 /* Note that the real part always precedes the imag part in memory
3428 regardless of machine's endianness. */
3429 switch (GET_CODE (XEXP (x
, 0)))
3443 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3444 read_complex_part (y
, imag_first
));
3445 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3446 read_complex_part (y
, !imag_first
));
3449 /* A subroutine of emit_move_complex. Perform the move from Y to X
3450 via two moves of the parts. Returns the last instruction emitted. */
3453 emit_move_complex_parts (rtx x
, rtx y
)
3455 /* Show the output dies here. This is necessary for SUBREGs
3456 of pseudos since we cannot track their lifetimes correctly;
3457 hard regs shouldn't appear here except as return values. */
3458 if (!reload_completed
&& !reload_in_progress
3459 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3462 write_complex_part (x
, read_complex_part (y
, false), false);
3463 write_complex_part (x
, read_complex_part (y
, true), true);
3465 return get_last_insn ();
3468 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3469 MODE is known to be complex. Returns the last instruction emitted. */
3472 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3476 /* Need to take special care for pushes, to maintain proper ordering
3477 of the data, and possibly extra padding. */
3478 if (push_operand (x
, mode
))
3479 return emit_move_complex_push (mode
, x
, y
);
3481 /* See if we can coerce the target into moving both values at once, except
3482 for floating point where we favor moving as parts if this is easy. */
3483 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3484 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3486 && HARD_REGISTER_P (x
)
3487 && REG_NREGS (x
) == 1)
3489 && HARD_REGISTER_P (y
)
3490 && REG_NREGS (y
) == 1))
3492 /* Not possible if the values are inherently not adjacent. */
3493 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3495 /* Is possible if both are registers (or subregs of registers). */
3496 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3498 /* If one of the operands is a memory, and alignment constraints
3499 are friendly enough, we may be able to do combined memory operations.
3500 We do not attempt this if Y is a constant because that combination is
3501 usually better with the by-parts thing below. */
3502 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3503 && (!STRICT_ALIGNMENT
3504 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3513 /* For memory to memory moves, optimal behavior can be had with the
3514 existing block move logic. */
3515 if (MEM_P (x
) && MEM_P (y
))
3517 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3518 BLOCK_OP_NO_LIBCALL
);
3519 return get_last_insn ();
3522 ret
= emit_move_via_integer (mode
, x
, y
, true);
3527 return emit_move_complex_parts (x
, y
);
3530 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3531 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3534 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3538 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3541 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3542 if (code
!= CODE_FOR_nothing
)
3544 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3545 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3546 return emit_insn (GEN_FCN (code
) (x
, y
));
3550 /* Otherwise, find the MODE_INT mode of the same width. */
3551 ret
= emit_move_via_integer (mode
, x
, y
, false);
3552 gcc_assert (ret
!= NULL
);
3556 /* Return true if word I of OP lies entirely in the
3557 undefined bits of a paradoxical subreg. */
3560 undefined_operand_subword_p (const_rtx op
, int i
)
3562 if (GET_CODE (op
) != SUBREG
)
3564 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3565 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3566 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3567 || known_le (offset
, -UNITS_PER_WORD
));
3570 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3571 MODE is any multi-word or full-word mode that lacks a move_insn
3572 pattern. Note that you will get better code if you define such
3573 patterns, even if they must turn into multiple assembler instructions. */
3576 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3578 rtx_insn
*last_insn
= 0;
3584 /* This function can only handle cases where the number of words is
3585 known at compile time. */
3586 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3587 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3589 /* If X is a push on the stack, do the push now and replace
3590 X with a reference to the stack pointer. */
3591 if (push_operand (x
, mode
))
3592 x
= emit_move_resolve_push (mode
, x
);
3594 /* If we are in reload, see if either operand is a MEM whose address
3595 is scheduled for replacement. */
3596 if (reload_in_progress
&& MEM_P (x
)
3597 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3598 x
= replace_equiv_address_nv (x
, inner
);
3599 if (reload_in_progress
&& MEM_P (y
)
3600 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3601 y
= replace_equiv_address_nv (y
, inner
);
3605 need_clobber
= false;
3606 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3608 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3611 /* Do not generate code for a move if it would come entirely
3612 from the undefined bits of a paradoxical subreg. */
3613 if (undefined_operand_subword_p (y
, i
))
3616 ypart
= operand_subword (y
, i
, 1, mode
);
3618 /* If we can't get a part of Y, put Y into memory if it is a
3619 constant. Otherwise, force it into a register. Then we must
3620 be able to get a part of Y. */
3621 if (ypart
== 0 && CONSTANT_P (y
))
3623 y
= use_anchored_address (force_const_mem (mode
, y
));
3624 ypart
= operand_subword (y
, i
, 1, mode
);
3626 else if (ypart
== 0)
3627 ypart
= operand_subword_force (y
, i
, mode
);
3629 gcc_assert (xpart
&& ypart
);
3631 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3633 last_insn
= emit_move_insn (xpart
, ypart
);
3639 /* Show the output dies here. This is necessary for SUBREGs
3640 of pseudos since we cannot track their lifetimes correctly;
3641 hard regs shouldn't appear here except as return values.
3642 We never want to emit such a clobber after reload. */
3644 && ! (reload_in_progress
|| reload_completed
)
3645 && need_clobber
!= 0)
3653 /* Low level part of emit_move_insn.
3654 Called just like emit_move_insn, but assumes X and Y
3655 are basically valid. */
3658 emit_move_insn_1 (rtx x
, rtx y
)
3660 machine_mode mode
= GET_MODE (x
);
3661 enum insn_code code
;
3663 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3665 code
= optab_handler (mov_optab
, mode
);
3666 if (code
!= CODE_FOR_nothing
)
3667 return emit_insn (GEN_FCN (code
) (x
, y
));
3669 /* Expand complex moves by moving real part and imag part. */
3670 if (COMPLEX_MODE_P (mode
))
3671 return emit_move_complex (mode
, x
, y
);
3673 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3674 || ALL_FIXED_POINT_MODE_P (mode
))
3676 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3678 /* If we can't find an integer mode, use multi words. */
3682 return emit_move_multi_word (mode
, x
, y
);
3685 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3686 return emit_move_ccmode (mode
, x
, y
);
3688 /* Try using a move pattern for the corresponding integer mode. This is
3689 only safe when simplify_subreg can convert MODE constants into integer
3690 constants. At present, it can only do this reliably if the value
3691 fits within a HOST_WIDE_INT. */
3693 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3695 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3699 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3704 return emit_move_multi_word (mode
, x
, y
);
3707 /* Generate code to copy Y into X.
3708 Both Y and X must have the same mode, except that
3709 Y can be a constant with VOIDmode.
3710 This mode cannot be BLKmode; use emit_block_move for that.
3712 Return the last instruction emitted. */
3715 emit_move_insn (rtx x
, rtx y
)
3717 machine_mode mode
= GET_MODE (x
);
3718 rtx y_cst
= NULL_RTX
;
3719 rtx_insn
*last_insn
;
3722 gcc_assert (mode
!= BLKmode
3723 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3728 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3729 && (last_insn
= compress_float_constant (x
, y
)))
3734 if (!targetm
.legitimate_constant_p (mode
, y
))
3736 y
= force_const_mem (mode
, y
);
3738 /* If the target's cannot_force_const_mem prevented the spill,
3739 assume that the target's move expanders will also take care
3740 of the non-legitimate constant. */
3744 y
= use_anchored_address (y
);
3748 /* If X or Y are memory references, verify that their addresses are valid
3751 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3753 && ! push_operand (x
, GET_MODE (x
))))
3754 x
= validize_mem (x
);
3757 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3758 MEM_ADDR_SPACE (y
)))
3759 y
= validize_mem (y
);
3761 gcc_assert (mode
!= BLKmode
);
3763 last_insn
= emit_move_insn_1 (x
, y
);
3765 if (y_cst
&& REG_P (x
)
3766 && (set
= single_set (last_insn
)) != NULL_RTX
3767 && SET_DEST (set
) == x
3768 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3769 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3774 /* Generate the body of an instruction to copy Y into X.
3775 It may be a list of insns, if one insn isn't enough. */
3778 gen_move_insn (rtx x
, rtx y
)
3783 emit_move_insn_1 (x
, y
);
3789 /* If Y is representable exactly in a narrower mode, and the target can
3790 perform the extension directly from constant or memory, then emit the
3791 move as an extension. */
3794 compress_float_constant (rtx x
, rtx y
)
3796 machine_mode dstmode
= GET_MODE (x
);
3797 machine_mode orig_srcmode
= GET_MODE (y
);
3798 machine_mode srcmode
;
3799 const REAL_VALUE_TYPE
*r
;
3800 int oldcost
, newcost
;
3801 bool speed
= optimize_insn_for_speed_p ();
3803 r
= CONST_DOUBLE_REAL_VALUE (y
);
3805 if (targetm
.legitimate_constant_p (dstmode
, y
))
3806 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3808 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3810 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3814 rtx_insn
*last_insn
;
3816 /* Skip if the target can't extend this way. */
3817 ic
= can_extend_p (dstmode
, srcmode
, 0);
3818 if (ic
== CODE_FOR_nothing
)
3821 /* Skip if the narrowed value isn't exact. */
3822 if (! exact_real_truncate (srcmode
, r
))
3825 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3827 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3829 /* Skip if the target needs extra instructions to perform
3831 if (!insn_operand_matches (ic
, 1, trunc_y
))
3833 /* This is valid, but may not be cheaper than the original. */
3834 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3836 if (oldcost
< newcost
)
3839 else if (float_extend_from_mem
[dstmode
][srcmode
])
3841 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3842 /* This is valid, but may not be cheaper than the original. */
3843 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3845 if (oldcost
< newcost
)
3847 trunc_y
= validize_mem (trunc_y
);
3852 /* For CSE's benefit, force the compressed constant pool entry
3853 into a new pseudo. This constant may be used in different modes,
3854 and if not, combine will put things back together for us. */
3855 trunc_y
= force_reg (srcmode
, trunc_y
);
3857 /* If x is a hard register, perform the extension into a pseudo,
3858 so that e.g. stack realignment code is aware of it. */
3860 if (REG_P (x
) && HARD_REGISTER_P (x
))
3861 target
= gen_reg_rtx (dstmode
);
3863 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3864 last_insn
= get_last_insn ();
3867 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3870 return emit_move_insn (x
, target
);
3877 /* Pushing data onto the stack. */
3879 /* Push a block of length SIZE (perhaps variable)
3880 and return an rtx to address the beginning of the block.
3881 The value may be virtual_outgoing_args_rtx.
3883 EXTRA is the number of bytes of padding to push in addition to SIZE.
3884 BELOW nonzero means this padding comes at low addresses;
3885 otherwise, the padding comes at high addresses. */
3888 push_block (rtx size
, poly_int64 extra
, int below
)
3892 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3893 if (CONSTANT_P (size
))
3894 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3895 else if (REG_P (size
) && known_eq (extra
, 0))
3896 anti_adjust_stack (size
);
3899 temp
= copy_to_mode_reg (Pmode
, size
);
3900 if (maybe_ne (extra
, 0))
3901 temp
= expand_binop (Pmode
, add_optab
, temp
,
3902 gen_int_mode (extra
, Pmode
),
3903 temp
, 0, OPTAB_LIB_WIDEN
);
3904 anti_adjust_stack (temp
);
3907 if (STACK_GROWS_DOWNWARD
)
3909 temp
= virtual_outgoing_args_rtx
;
3910 if (maybe_ne (extra
, 0) && below
)
3911 temp
= plus_constant (Pmode
, temp
, extra
);
3915 if (CONST_INT_P (size
))
3916 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3917 -INTVAL (size
) - (below
? 0 : extra
));
3918 else if (maybe_ne (extra
, 0) && !below
)
3919 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3920 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3923 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3924 negate_rtx (Pmode
, size
));
3927 return memory_address (NARROWEST_INT_MODE
, temp
);
3930 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3933 mem_autoinc_base (rtx mem
)
3937 rtx addr
= XEXP (mem
, 0);
3938 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3939 return XEXP (addr
, 0);
3944 /* A utility routine used here, in reload, and in try_split. The insns
3945 after PREV up to and including LAST are known to adjust the stack,
3946 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3947 placing notes as appropriate. PREV may be NULL, indicating the
3948 entire insn sequence prior to LAST should be scanned.
3950 The set of allowed stack pointer modifications is small:
3951 (1) One or more auto-inc style memory references (aka pushes),
3952 (2) One or more addition/subtraction with the SP as destination,
3953 (3) A single move insn with the SP as destination,
3954 (4) A call_pop insn,
3955 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3957 Insns in the sequence that do not modify the SP are ignored,
3958 except for noreturn calls.
3960 The return value is the amount of adjustment that can be trivially
3961 verified, via immediate operand or auto-inc. If the adjustment
3962 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3965 find_args_size_adjust (rtx_insn
*insn
)
3970 pat
= PATTERN (insn
);
3973 /* Look for a call_pop pattern. */
3976 /* We have to allow non-call_pop patterns for the case
3977 of emit_single_push_insn of a TLS address. */
3978 if (GET_CODE (pat
) != PARALLEL
)
3981 /* All call_pop have a stack pointer adjust in the parallel.
3982 The call itself is always first, and the stack adjust is
3983 usually last, so search from the end. */
3984 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
3986 set
= XVECEXP (pat
, 0, i
);
3987 if (GET_CODE (set
) != SET
)
3989 dest
= SET_DEST (set
);
3990 if (dest
== stack_pointer_rtx
)
3993 /* We'd better have found the stack pointer adjust. */
3996 /* Fall through to process the extracted SET and DEST
3997 as if it was a standalone insn. */
3999 else if (GET_CODE (pat
) == SET
)
4001 else if ((set
= single_set (insn
)) != NULL
)
4003 else if (GET_CODE (pat
) == PARALLEL
)
4005 /* ??? Some older ports use a parallel with a stack adjust
4006 and a store for a PUSH_ROUNDING pattern, rather than a
4007 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4008 /* ??? See h8300 and m68k, pushqi1. */
4009 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4011 set
= XVECEXP (pat
, 0, i
);
4012 if (GET_CODE (set
) != SET
)
4014 dest
= SET_DEST (set
);
4015 if (dest
== stack_pointer_rtx
)
4018 /* We do not expect an auto-inc of the sp in the parallel. */
4019 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4020 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4021 != stack_pointer_rtx
);
4029 dest
= SET_DEST (set
);
4031 /* Look for direct modifications of the stack pointer. */
4032 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4034 /* Look for a trivial adjustment, otherwise assume nothing. */
4035 /* Note that the SPU restore_stack_block pattern refers to
4036 the stack pointer in V4SImode. Consider that non-trivial. */
4037 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4038 && GET_CODE (SET_SRC (set
)) == PLUS
4039 && XEXP (SET_SRC (set
), 0) == stack_pointer_rtx
4040 && CONST_INT_P (XEXP (SET_SRC (set
), 1)))
4041 return INTVAL (XEXP (SET_SRC (set
), 1));
4042 /* ??? Reload can generate no-op moves, which will be cleaned
4043 up later. Recognize it and continue searching. */
4044 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4047 return HOST_WIDE_INT_MIN
;
4053 /* Otherwise only think about autoinc patterns. */
4054 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4057 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4058 != stack_pointer_rtx
);
4060 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4061 mem
= SET_SRC (set
);
4065 addr
= XEXP (mem
, 0);
4066 switch (GET_CODE (addr
))
4070 return GET_MODE_SIZE (GET_MODE (mem
));
4073 return -GET_MODE_SIZE (GET_MODE (mem
));
4076 addr
= XEXP (addr
, 1);
4077 gcc_assert (GET_CODE (addr
) == PLUS
);
4078 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4079 gcc_assert (CONST_INT_P (XEXP (addr
, 1)));
4080 return INTVAL (XEXP (addr
, 1));
4088 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4089 poly_int64 end_args_size
)
4091 poly_int64 args_size
= end_args_size
;
4092 bool saw_unknown
= false;
4095 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4097 if (!NONDEBUG_INSN_P (insn
))
4100 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4101 a call argument containing a TLS address that itself requires
4102 a call to __tls_get_addr. The handling of stack_pointer_delta
4103 in emit_single_push_insn is supposed to ensure that any such
4104 notes are already correct. */
4105 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4106 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4108 poly_int64 this_delta
= find_args_size_adjust (insn
);
4109 if (known_eq (this_delta
, 0))
4112 || ACCUMULATE_OUTGOING_ARGS
4113 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4117 gcc_assert (!saw_unknown
);
4118 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4122 add_args_size_note (insn
, args_size
);
4123 if (STACK_GROWS_DOWNWARD
)
4124 this_delta
= -poly_uint64 (this_delta
);
4127 args_size
= HOST_WIDE_INT_MIN
;
4129 args_size
-= this_delta
;
4135 #ifdef PUSH_ROUNDING
4136 /* Emit single push insn. */
4139 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4142 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4144 enum insn_code icode
;
4146 /* If there is push pattern, use it. Otherwise try old way of throwing
4147 MEM representing push operation to move expander. */
4148 icode
= optab_handler (push_optab
, mode
);
4149 if (icode
!= CODE_FOR_nothing
)
4151 struct expand_operand ops
[1];
4153 create_input_operand (&ops
[0], x
, mode
);
4154 if (maybe_expand_insn (icode
, 1, ops
))
4157 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4158 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4159 /* If we are to pad downward, adjust the stack pointer first and
4160 then store X into the stack location using an offset. This is
4161 because emit_move_insn does not know how to pad; it does not have
4163 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4165 emit_move_insn (stack_pointer_rtx
,
4166 expand_binop (Pmode
,
4167 STACK_GROWS_DOWNWARD
? sub_optab
4170 gen_int_mode (rounded_size
, Pmode
),
4171 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4173 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4174 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4175 /* We have already decremented the stack pointer, so get the
4177 offset
+= rounded_size
;
4179 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4180 /* We have already incremented the stack pointer, so get the
4182 offset
-= rounded_size
;
4184 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4188 if (STACK_GROWS_DOWNWARD
)
4189 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4190 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4192 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4193 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4195 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4198 dest
= gen_rtx_MEM (mode
, dest_addr
);
4202 set_mem_attributes (dest
, type
, 1);
4204 if (cfun
->tail_call_marked
)
4205 /* Function incoming arguments may overlap with sibling call
4206 outgoing arguments and we cannot allow reordering of reads
4207 from function arguments with stores to outgoing arguments
4208 of sibling calls. */
4209 set_mem_alias_set (dest
, 0);
4211 emit_move_insn (dest
, x
);
4214 /* Emit and annotate a single push insn. */
4217 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4219 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4220 rtx_insn
*prev
= get_last_insn ();
4223 emit_single_push_insn_1 (mode
, x
, type
);
4225 /* Adjust stack_pointer_delta to describe the situation after the push
4226 we just performed. Note that we must do this after the push rather
4227 than before the push in case calculating X needs pushes and pops of
4228 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4229 for such pushes and pops must not include the effect of the future
4231 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4233 last
= get_last_insn ();
4235 /* Notice the common case where we emitted exactly one insn. */
4236 if (PREV_INSN (last
) == prev
)
4238 add_args_size_note (last
, stack_pointer_delta
);
4242 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4243 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4244 || known_eq (delta
, old_delta
));
4248 /* If reading SIZE bytes from X will end up reading from
4249 Y return the number of bytes that overlap. Return -1
4250 if there is no overlap or -2 if we can't determine
4251 (for example when X and Y have different base registers). */
4254 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4256 rtx tmp
= plus_constant (Pmode
, x
, size
);
4257 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4259 if (!CONST_INT_P (sub
))
4262 HOST_WIDE_INT val
= INTVAL (sub
);
4264 return IN_RANGE (val
, 1, size
) ? val
: -1;
4267 /* Generate code to push X onto the stack, assuming it has mode MODE and
4269 MODE is redundant except when X is a CONST_INT (since they don't
4271 SIZE is an rtx for the size of data to be copied (in bytes),
4272 needed only if X is BLKmode.
4273 Return true if successful. May return false if asked to push a
4274 partial argument during a sibcall optimization (as specified by
4275 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4278 ALIGN (in bits) is maximum alignment we can assume.
4280 If PARTIAL and REG are both nonzero, then copy that many of the first
4281 bytes of X into registers starting with REG, and push the rest of X.
4282 The amount of space pushed is decreased by PARTIAL bytes.
4283 REG must be a hard register in this case.
4284 If REG is zero but PARTIAL is not, take any all others actions for an
4285 argument partially in registers, but do not actually load any
4288 EXTRA is the amount in bytes of extra space to leave next to this arg.
4289 This is ignored if an argument block has already been allocated.
4291 On a machine that lacks real push insns, ARGS_ADDR is the address of
4292 the bottom of the argument block for this call. We use indexing off there
4293 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4294 argument block has not been preallocated.
4296 ARGS_SO_FAR is the size of args previously pushed for this call.
4298 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4299 for arguments passed in registers. If nonzero, it will be the number
4300 of bytes required. */
4303 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4304 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4305 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4306 rtx alignment_pad
, bool sibcall_p
)
4309 pad_direction stack_direction
4310 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4312 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4313 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4314 Default is below for small data on big-endian machines; else above. */
4315 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4317 /* Invert direction if stack is post-decrement.
4319 if (STACK_PUSH_CODE
== POST_DEC
)
4320 if (where_pad
!= PAD_NONE
)
4321 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4325 int nregs
= partial
/ UNITS_PER_WORD
;
4326 rtx
*tmp_regs
= NULL
;
4327 int overlapping
= 0;
4330 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4332 /* Copy a block into the stack, entirely or partially. */
4339 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4340 used
= partial
- offset
;
4342 if (mode
!= BLKmode
)
4344 /* A value is to be stored in an insufficiently aligned
4345 stack slot; copy via a suitably aligned slot if
4347 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4348 if (!MEM_P (xinner
))
4350 temp
= assign_temp (type
, 1, 1);
4351 emit_move_insn (temp
, xinner
);
4358 /* USED is now the # of bytes we need not copy to the stack
4359 because registers will take care of them. */
4362 xinner
= adjust_address (xinner
, BLKmode
, used
);
4364 /* If the partial register-part of the arg counts in its stack size,
4365 skip the part of stack space corresponding to the registers.
4366 Otherwise, start copying to the beginning of the stack space,
4367 by setting SKIP to 0. */
4368 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4370 #ifdef PUSH_ROUNDING
4371 /* Do it with several push insns if that doesn't take lots of insns
4372 and if there is no difficulty with push insns that skip bytes
4373 on the stack for alignment purposes. */
4376 && CONST_INT_P (size
)
4378 && MEM_ALIGN (xinner
) >= align
4379 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4380 /* Here we avoid the case of a structure whose weak alignment
4381 forces many pushes of a small amount of data,
4382 and such small pushes do rounding that causes trouble. */
4383 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4384 || align
>= BIGGEST_ALIGNMENT
4385 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4386 align
/ BITS_PER_UNIT
))
4387 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4389 /* Push padding now if padding above and stack grows down,
4390 or if padding below and stack grows up.
4391 But if space already allocated, this has already been done. */
4392 if (maybe_ne (extra
, 0)
4394 && where_pad
!= PAD_NONE
4395 && where_pad
!= stack_direction
)
4396 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4398 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4401 #endif /* PUSH_ROUNDING */
4405 /* Otherwise make space on the stack and copy the data
4406 to the address of that space. */
4408 /* Deduct words put into registers from the size we must copy. */
4411 if (CONST_INT_P (size
))
4412 size
= GEN_INT (INTVAL (size
) - used
);
4414 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4415 gen_int_mode (used
, GET_MODE (size
)),
4416 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4419 /* Get the address of the stack space.
4420 In this case, we do not deal with EXTRA separately.
4421 A single stack adjust will do. */
4424 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4427 else if (CONST_INT_P (args_so_far
))
4428 temp
= memory_address (BLKmode
,
4429 plus_constant (Pmode
, args_addr
,
4430 skip
+ INTVAL (args_so_far
)));
4432 temp
= memory_address (BLKmode
,
4433 plus_constant (Pmode
,
4434 gen_rtx_PLUS (Pmode
,
4439 if (!ACCUMULATE_OUTGOING_ARGS
)
4441 /* If the source is referenced relative to the stack pointer,
4442 copy it to another register to stabilize it. We do not need
4443 to do this if we know that we won't be changing sp. */
4445 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4446 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4447 temp
= copy_to_reg (temp
);
4450 target
= gen_rtx_MEM (BLKmode
, temp
);
4452 /* We do *not* set_mem_attributes here, because incoming arguments
4453 may overlap with sibling call outgoing arguments and we cannot
4454 allow reordering of reads from function arguments with stores
4455 to outgoing arguments of sibling calls. We do, however, want
4456 to record the alignment of the stack slot. */
4457 /* ALIGN may well be better aligned than TYPE, e.g. due to
4458 PARM_BOUNDARY. Assume the caller isn't lying. */
4459 set_mem_align (target
, align
);
4461 /* If part should go in registers and pushing to that part would
4462 overwrite some of the values that need to go into regs, load the
4463 overlapping values into temporary pseudos to be moved into the hard
4464 regs at the end after the stack pushing has completed.
4465 We cannot load them directly into the hard regs here because
4466 they can be clobbered by the block move expansions.
4469 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4470 && GET_CODE (reg
) != PARALLEL
)
4472 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4473 if (overlapping
> 0)
4475 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4476 overlapping
/= UNITS_PER_WORD
;
4478 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4480 for (int i
= 0; i
< overlapping
; i
++)
4481 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4483 for (int i
= 0; i
< overlapping
; i
++)
4484 emit_move_insn (tmp_regs
[i
],
4485 operand_subword_force (target
, i
, mode
));
4487 else if (overlapping
== -1)
4489 /* Could not determine whether there is overlap.
4490 Fail the sibcall. */
4498 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4501 else if (partial
> 0)
4503 /* Scalar partly in registers. This case is only supported
4504 for fixed-wdth modes. */
4505 int size
= GET_MODE_SIZE (mode
).to_constant ();
4506 size
/= UNITS_PER_WORD
;
4509 /* # bytes of start of argument
4510 that we must make space for but need not store. */
4511 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4512 int args_offset
= INTVAL (args_so_far
);
4515 /* Push padding now if padding above and stack grows down,
4516 or if padding below and stack grows up.
4517 But if space already allocated, this has already been done. */
4518 if (maybe_ne (extra
, 0)
4520 && where_pad
!= PAD_NONE
4521 && where_pad
!= stack_direction
)
4522 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4524 /* If we make space by pushing it, we might as well push
4525 the real data. Otherwise, we can leave OFFSET nonzero
4526 and leave the space uninitialized. */
4530 /* Now NOT_STACK gets the number of words that we don't need to
4531 allocate on the stack. Convert OFFSET to words too. */
4532 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4533 offset
/= UNITS_PER_WORD
;
4535 /* If the partial register-part of the arg counts in its stack size,
4536 skip the part of stack space corresponding to the registers.
4537 Otherwise, start copying to the beginning of the stack space,
4538 by setting SKIP to 0. */
4539 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4541 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4542 x
= validize_mem (force_const_mem (mode
, x
));
4544 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4545 SUBREGs of such registers are not allowed. */
4546 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4547 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4548 x
= copy_to_reg (x
);
4550 /* Loop over all the words allocated on the stack for this arg. */
4551 /* We can do it by words, because any scalar bigger than a word
4552 has a size a multiple of a word. */
4553 for (i
= size
- 1; i
>= not_stack
; i
--)
4554 if (i
>= not_stack
+ offset
)
4555 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4556 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4558 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4560 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4568 /* Push padding now if padding above and stack grows down,
4569 or if padding below and stack grows up.
4570 But if space already allocated, this has already been done. */
4571 if (maybe_ne (extra
, 0)
4573 && where_pad
!= PAD_NONE
4574 && where_pad
!= stack_direction
)
4575 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4577 #ifdef PUSH_ROUNDING
4578 if (args_addr
== 0 && PUSH_ARGS
)
4579 emit_single_push_insn (mode
, x
, type
);
4583 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4584 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4586 /* We do *not* set_mem_attributes here, because incoming arguments
4587 may overlap with sibling call outgoing arguments and we cannot
4588 allow reordering of reads from function arguments with stores
4589 to outgoing arguments of sibling calls. We do, however, want
4590 to record the alignment of the stack slot. */
4591 /* ALIGN may well be better aligned than TYPE, e.g. due to
4592 PARM_BOUNDARY. Assume the caller isn't lying. */
4593 set_mem_align (dest
, align
);
4595 emit_move_insn (dest
, x
);
4599 /* Move the partial arguments into the registers and any overlapping
4600 values that we moved into the pseudos in tmp_regs. */
4601 if (partial
> 0 && reg
!= 0)
4603 /* Handle calls that pass values in multiple non-contiguous locations.
4604 The Irix 6 ABI has examples of this. */
4605 if (GET_CODE (reg
) == PARALLEL
)
4606 emit_group_load (reg
, x
, type
, -1);
4609 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4610 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4612 for (int i
= 0; i
< overlapping
; i
++)
4613 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4614 + nregs
- overlapping
+ i
),
4620 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4621 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4623 if (alignment_pad
&& args_addr
== 0)
4624 anti_adjust_stack (alignment_pad
);
4629 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4633 get_subtarget (rtx x
)
4637 /* Only registers can be subtargets. */
4639 /* Don't use hard regs to avoid extending their life. */
4640 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4644 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4645 FIELD is a bitfield. Returns true if the optimization was successful,
4646 and there's nothing else to do. */
4649 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4650 poly_uint64 pbitpos
,
4651 poly_uint64 pbitregion_start
,
4652 poly_uint64 pbitregion_end
,
4653 machine_mode mode1
, rtx str_rtx
,
4654 tree to
, tree src
, bool reverse
)
4656 /* str_mode is not guaranteed to be a scalar type. */
4657 machine_mode str_mode
= GET_MODE (str_rtx
);
4658 unsigned int str_bitsize
;
4663 enum tree_code code
;
4665 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4666 if (mode1
!= VOIDmode
4667 || !pbitsize
.is_constant (&bitsize
)
4668 || !pbitpos
.is_constant (&bitpos
)
4669 || !pbitregion_start
.is_constant (&bitregion_start
)
4670 || !pbitregion_end
.is_constant (&bitregion_end
)
4671 || bitsize
>= BITS_PER_WORD
4672 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4673 || str_bitsize
> BITS_PER_WORD
4674 || TREE_SIDE_EFFECTS (to
)
4675 || TREE_THIS_VOLATILE (to
))
4679 if (TREE_CODE (src
) != SSA_NAME
)
4681 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4684 srcstmt
= get_gimple_for_ssa_name (src
);
4686 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4689 code
= gimple_assign_rhs_code (srcstmt
);
4691 op0
= gimple_assign_rhs1 (srcstmt
);
4693 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4694 to find its initialization. Hopefully the initialization will
4695 be from a bitfield load. */
4696 if (TREE_CODE (op0
) == SSA_NAME
)
4698 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4700 /* We want to eventually have OP0 be the same as TO, which
4701 should be a bitfield. */
4703 || !is_gimple_assign (op0stmt
)
4704 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4706 op0
= gimple_assign_rhs1 (op0stmt
);
4709 op1
= gimple_assign_rhs2 (srcstmt
);
4711 if (!operand_equal_p (to
, op0
, 0))
4714 if (MEM_P (str_rtx
))
4716 unsigned HOST_WIDE_INT offset1
;
4718 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4719 str_bitsize
= BITS_PER_WORD
;
4721 scalar_int_mode best_mode
;
4722 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4723 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4725 str_mode
= best_mode
;
4726 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4729 bitpos
%= str_bitsize
;
4730 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4731 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4733 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4736 /* If the bit field covers the whole REG/MEM, store_field
4737 will likely generate better code. */
4738 if (bitsize
>= str_bitsize
)
4741 /* We can't handle fields split across multiple entities. */
4742 if (bitpos
+ bitsize
> str_bitsize
)
4745 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4746 bitpos
= str_bitsize
- bitpos
- bitsize
;
4752 /* For now, just optimize the case of the topmost bitfield
4753 where we don't need to do any masking and also
4754 1 bit bitfields where xor can be used.
4755 We might win by one instruction for the other bitfields
4756 too if insv/extv instructions aren't used, so that
4757 can be added later. */
4758 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4759 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4762 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4763 value
= convert_modes (str_mode
,
4764 TYPE_MODE (TREE_TYPE (op1
)), value
,
4765 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4767 /* We may be accessing data outside the field, which means
4768 we can alias adjacent data. */
4769 if (MEM_P (str_rtx
))
4771 str_rtx
= shallow_copy_rtx (str_rtx
);
4772 set_mem_alias_set (str_rtx
, 0);
4773 set_mem_expr (str_rtx
, 0);
4776 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4778 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4782 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4784 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4786 value
= flip_storage_order (str_mode
, value
);
4787 result
= expand_binop (str_mode
, binop
, str_rtx
,
4788 value
, str_rtx
, 1, OPTAB_WIDEN
);
4789 if (result
!= str_rtx
)
4790 emit_move_insn (str_rtx
, result
);
4795 if (TREE_CODE (op1
) != INTEGER_CST
)
4797 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4798 value
= convert_modes (str_mode
,
4799 TYPE_MODE (TREE_TYPE (op1
)), value
,
4800 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4802 /* We may be accessing data outside the field, which means
4803 we can alias adjacent data. */
4804 if (MEM_P (str_rtx
))
4806 str_rtx
= shallow_copy_rtx (str_rtx
);
4807 set_mem_alias_set (str_rtx
, 0);
4808 set_mem_expr (str_rtx
, 0);
4811 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4812 if (bitpos
+ bitsize
!= str_bitsize
)
4814 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4816 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4818 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4820 value
= flip_storage_order (str_mode
, value
);
4821 result
= expand_binop (str_mode
, binop
, str_rtx
,
4822 value
, str_rtx
, 1, OPTAB_WIDEN
);
4823 if (result
!= str_rtx
)
4824 emit_move_insn (str_rtx
, result
);
4834 /* In the C++ memory model, consecutive bit fields in a structure are
4835 considered one memory location.
4837 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4838 returns the bit range of consecutive bits in which this COMPONENT_REF
4839 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4840 and *OFFSET may be adjusted in the process.
4842 If the access does not need to be restricted, 0 is returned in both
4843 *BITSTART and *BITEND. */
4846 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4847 poly_int64_pod
*bitpos
, tree
*offset
)
4849 poly_int64 bitoffset
;
4852 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4854 field
= TREE_OPERAND (exp
, 1);
4855 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4856 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4857 need to limit the range we can access. */
4860 *bitstart
= *bitend
= 0;
4864 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4865 part of a larger bit field, then the representative does not serve any
4866 useful purpose. This can occur in Ada. */
4867 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4870 poly_int64 rbitsize
, rbitpos
;
4872 int unsignedp
, reversep
, volatilep
= 0;
4873 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4874 &roffset
, &rmode
, &unsignedp
, &reversep
,
4876 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4878 *bitstart
= *bitend
= 0;
4883 /* Compute the adjustment to bitpos from the offset of the field
4884 relative to the representative. DECL_FIELD_OFFSET of field and
4885 repr are the same by construction if they are not constants,
4886 see finish_bitfield_layout. */
4887 poly_uint64 field_offset
, repr_offset
;
4888 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4889 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4890 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4893 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4894 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4896 /* If the adjustment is larger than bitpos, we would have a negative bit
4897 position for the lower bound and this may wreak havoc later. Adjust
4898 offset and bitpos to make the lower bound non-negative in that case. */
4899 if (maybe_gt (bitoffset
, *bitpos
))
4901 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4902 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4904 *bitpos
+= adjust_bits
;
4905 if (*offset
== NULL_TREE
)
4906 *offset
= size_int (-adjust_bytes
);
4908 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
4912 *bitstart
= *bitpos
- bitoffset
;
4914 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
4917 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4918 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4919 DECL_RTL was not set yet, return NORTL. */
4922 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4924 if (TREE_CODE (addr
) != ADDR_EXPR
)
4927 tree base
= TREE_OPERAND (addr
, 0);
4930 || TREE_ADDRESSABLE (base
)
4931 || DECL_MODE (base
) == BLKmode
)
4934 if (!DECL_RTL_SET_P (base
))
4937 return (!MEM_P (DECL_RTL (base
)));
4940 /* Returns true if the MEM_REF REF refers to an object that does not
4941 reside in memory and has non-BLKmode. */
4944 mem_ref_refers_to_non_mem_p (tree ref
)
4946 tree base
= TREE_OPERAND (ref
, 0);
4947 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4950 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4951 is true, try generating a nontemporal store. */
4954 expand_assignment (tree to
, tree from
, bool nontemporal
)
4960 enum insn_code icode
;
4962 /* Don't crash if the lhs of the assignment was erroneous. */
4963 if (TREE_CODE (to
) == ERROR_MARK
)
4965 expand_normal (from
);
4969 /* Optimize away no-op moves without side-effects. */
4970 if (operand_equal_p (to
, from
, 0))
4973 /* Handle misaligned stores. */
4974 mode
= TYPE_MODE (TREE_TYPE (to
));
4975 if ((TREE_CODE (to
) == MEM_REF
4976 || TREE_CODE (to
) == TARGET_MEM_REF
)
4978 && !mem_ref_refers_to_non_mem_p (to
)
4979 && ((align
= get_object_alignment (to
))
4980 < GET_MODE_ALIGNMENT (mode
))
4981 && (((icode
= optab_handler (movmisalign_optab
, mode
))
4982 != CODE_FOR_nothing
)
4983 || targetm
.slow_unaligned_access (mode
, align
)))
4987 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
4988 reg
= force_not_mem (reg
);
4989 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4990 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
4991 reg
= flip_storage_order (mode
, reg
);
4993 if (icode
!= CODE_FOR_nothing
)
4995 struct expand_operand ops
[2];
4997 create_fixed_operand (&ops
[0], mem
);
4998 create_input_operand (&ops
[1], reg
, mode
);
4999 /* The movmisalign<mode> pattern cannot fail, else the assignment
5000 would silently be omitted. */
5001 expand_insn (icode
, 2, ops
);
5004 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5009 /* Assignment of a structure component needs special treatment
5010 if the structure component's rtx is not simply a MEM.
5011 Assignment of an array element at a constant index, and assignment of
5012 an array element in an unaligned packed structure field, has the same
5013 problem. Same for (partially) storing into a non-memory object. */
5014 if (handled_component_p (to
)
5015 || (TREE_CODE (to
) == MEM_REF
5016 && (REF_REVERSE_STORAGE_ORDER (to
)
5017 || mem_ref_refers_to_non_mem_p (to
)))
5018 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5021 poly_int64 bitsize
, bitpos
;
5022 poly_uint64 bitregion_start
= 0;
5023 poly_uint64 bitregion_end
= 0;
5025 int unsignedp
, reversep
, volatilep
= 0;
5029 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5030 &unsignedp
, &reversep
, &volatilep
);
5032 /* Make sure bitpos is not negative, it can wreak havoc later. */
5033 if (maybe_lt (bitpos
, 0))
5035 gcc_assert (offset
== NULL_TREE
);
5036 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5037 bitpos
= num_trailing_bits (bitpos
);
5040 if (TREE_CODE (to
) == COMPONENT_REF
5041 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5042 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5043 /* The C++ memory model naturally applies to byte-aligned fields.
5044 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5045 BITSIZE are not byte-aligned, there is no need to limit the range
5046 we can access. This can occur with packed structures in Ada. */
5047 else if (maybe_gt (bitsize
, 0)
5048 && multiple_p (bitsize
, BITS_PER_UNIT
)
5049 && multiple_p (bitpos
, BITS_PER_UNIT
))
5051 bitregion_start
= bitpos
;
5052 bitregion_end
= bitpos
+ bitsize
- 1;
5055 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5057 /* If the field has a mode, we want to access it in the
5058 field's mode, not the computed mode.
5059 If a MEM has VOIDmode (external with incomplete type),
5060 use BLKmode for it instead. */
5063 if (mode1
!= VOIDmode
)
5064 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5065 else if (GET_MODE (to_rtx
) == VOIDmode
)
5066 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5071 machine_mode address_mode
;
5074 if (!MEM_P (to_rtx
))
5076 /* We can get constant negative offsets into arrays with broken
5077 user code. Translate this to a trap instead of ICEing. */
5078 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5079 expand_builtin_trap ();
5080 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5083 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5084 address_mode
= get_address_mode (to_rtx
);
5085 if (GET_MODE (offset_rtx
) != address_mode
)
5087 /* We cannot be sure that the RTL in offset_rtx is valid outside
5088 of a memory address context, so force it into a register
5089 before attempting to convert it to the desired mode. */
5090 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5091 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5094 /* If we have an expression in OFFSET_RTX and a non-zero
5095 byte offset in BITPOS, adding the byte offset before the
5096 OFFSET_RTX results in better intermediate code, which makes
5097 later rtl optimization passes perform better.
5099 We prefer intermediate code like this:
5101 r124:DI=r123:DI+0x18
5106 r124:DI=r123:DI+0x10
5107 [r124:DI+0x8]=r121:DI
5109 This is only done for aligned data values, as these can
5110 be expected to result in single move instructions. */
5112 if (mode1
!= VOIDmode
5113 && maybe_ne (bitpos
, 0)
5114 && maybe_gt (bitsize
, 0)
5115 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5116 && multiple_p (bitpos
, bitsize
)
5117 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5118 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5120 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5121 bitregion_start
= 0;
5122 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5123 bitregion_end
-= bitpos
;
5127 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5128 highest_pow2_factor_for_target (to
,
5132 /* No action is needed if the target is not a memory and the field
5133 lies completely outside that target. This can occur if the source
5134 code contains an out-of-bounds access to a small array. */
5136 && GET_MODE (to_rtx
) != BLKmode
5137 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5139 expand_normal (from
);
5142 /* Handle expand_expr of a complex value returning a CONCAT. */
5143 else if (GET_CODE (to_rtx
) == CONCAT
)
5145 machine_mode to_mode
= GET_MODE (to_rtx
);
5146 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5147 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5148 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5149 if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE (to_rtx
)
5150 && COMPLEX_MODE_P (GET_MODE (to_rtx
))
5151 && known_eq (bitpos
, 0)
5152 && known_eq (bitsize
, mode_bitsize
))
5153 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5154 else if (known_eq (bitsize
, inner_bitsize
)
5155 && (known_eq (bitpos
, 0)
5156 || known_eq (bitpos
, inner_bitsize
)))
5157 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5158 false, nontemporal
, reversep
);
5159 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5160 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5161 bitregion_start
, bitregion_end
,
5162 mode1
, from
, get_alias_set (to
),
5163 nontemporal
, reversep
);
5164 else if (known_ge (bitpos
, inner_bitsize
))
5165 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5166 bitpos
- inner_bitsize
,
5167 bitregion_start
, bitregion_end
,
5168 mode1
, from
, get_alias_set (to
),
5169 nontemporal
, reversep
);
5170 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5172 result
= expand_normal (from
);
5173 if (GET_CODE (result
) == CONCAT
)
5175 to_mode
= GET_MODE_INNER (to_mode
);
5176 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5178 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5181 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5183 if (!from_real
|| !from_imag
)
5184 goto concat_store_slow
;
5185 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5186 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5191 = simplify_gen_subreg (to_mode
, result
,
5192 TYPE_MODE (TREE_TYPE (from
)), 0);
5195 emit_move_insn (XEXP (to_rtx
, 0),
5196 read_complex_part (from_rtx
, false));
5197 emit_move_insn (XEXP (to_rtx
, 1),
5198 read_complex_part (from_rtx
, true));
5202 machine_mode to_mode
5203 = GET_MODE_INNER (GET_MODE (to_rtx
));
5205 = simplify_gen_subreg (to_mode
, result
,
5206 TYPE_MODE (TREE_TYPE (from
)),
5209 = simplify_gen_subreg (to_mode
, result
,
5210 TYPE_MODE (TREE_TYPE (from
)),
5211 GET_MODE_SIZE (to_mode
));
5212 if (!from_real
|| !from_imag
)
5213 goto concat_store_slow
;
5214 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5215 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5222 rtx temp
= assign_stack_temp (to_mode
,
5223 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5224 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5225 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5226 result
= store_field (temp
, bitsize
, bitpos
,
5227 bitregion_start
, bitregion_end
,
5228 mode1
, from
, get_alias_set (to
),
5229 nontemporal
, reversep
);
5230 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5231 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5238 /* If the field is at offset zero, we could have been given the
5239 DECL_RTX of the parent struct. Don't munge it. */
5240 to_rtx
= shallow_copy_rtx (to_rtx
);
5241 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5243 MEM_VOLATILE_P (to_rtx
) = 1;
5246 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5247 bitregion_start
, bitregion_end
,
5248 mode1
, to_rtx
, to
, from
,
5252 result
= store_field (to_rtx
, bitsize
, bitpos
,
5253 bitregion_start
, bitregion_end
,
5254 mode1
, from
, get_alias_set (to
),
5255 nontemporal
, reversep
);
5259 preserve_temp_slots (result
);
5264 /* If the rhs is a function call and its value is not an aggregate,
5265 call the function before we start to compute the lhs.
5266 This is needed for correct code for cases such as
5267 val = setjmp (buf) on machines where reference to val
5268 requires loading up part of an address in a separate insn.
5270 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5271 since it might be a promoted variable where the zero- or sign- extension
5272 needs to be done. Handling this in the normal way is safe because no
5273 computation is done before the call. The same is true for SSA names. */
5274 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5275 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5276 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5278 || TREE_CODE (to
) == PARM_DECL
5279 || TREE_CODE (to
) == RESULT_DECL
)
5280 && REG_P (DECL_RTL (to
)))
5281 || TREE_CODE (to
) == SSA_NAME
))
5286 value
= expand_normal (from
);
5289 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5291 /* Handle calls that return values in multiple non-contiguous locations.
5292 The Irix 6 ABI has examples of this. */
5293 if (GET_CODE (to_rtx
) == PARALLEL
)
5295 if (GET_CODE (value
) == PARALLEL
)
5296 emit_group_move (to_rtx
, value
);
5298 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5299 int_size_in_bytes (TREE_TYPE (from
)));
5301 else if (GET_CODE (value
) == PARALLEL
)
5302 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5303 int_size_in_bytes (TREE_TYPE (from
)));
5304 else if (GET_MODE (to_rtx
) == BLKmode
)
5306 /* Handle calls that return BLKmode values in registers. */
5308 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5310 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5314 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5315 value
= convert_memory_address_addr_space
5316 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5317 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5319 emit_move_insn (to_rtx
, value
);
5322 preserve_temp_slots (to_rtx
);
5327 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5328 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5330 /* Don't move directly into a return register. */
5331 if (TREE_CODE (to
) == RESULT_DECL
5332 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5338 /* If the source is itself a return value, it still is in a pseudo at
5339 this point so we can move it back to the return register directly. */
5341 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5342 && TREE_CODE (from
) != CALL_EXPR
)
5343 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5345 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5347 /* Handle calls that return values in multiple non-contiguous locations.
5348 The Irix 6 ABI has examples of this. */
5349 if (GET_CODE (to_rtx
) == PARALLEL
)
5351 if (GET_CODE (temp
) == PARALLEL
)
5352 emit_group_move (to_rtx
, temp
);
5354 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5355 int_size_in_bytes (TREE_TYPE (from
)));
5358 emit_move_insn (to_rtx
, temp
);
5360 preserve_temp_slots (to_rtx
);
5365 /* In case we are returning the contents of an object which overlaps
5366 the place the value is being stored, use a safe function when copying
5367 a value through a pointer into a structure value return block. */
5368 if (TREE_CODE (to
) == RESULT_DECL
5369 && TREE_CODE (from
) == INDIRECT_REF
5370 && ADDR_SPACE_GENERIC_P
5371 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5372 && refs_may_alias_p (to
, from
)
5373 && cfun
->returns_struct
5374 && !cfun
->returns_pcc_struct
)
5379 size
= expr_size (from
);
5380 from_rtx
= expand_normal (from
);
5382 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5384 preserve_temp_slots (to_rtx
);
5389 /* Compute FROM and store the value in the rtx we got. */
5392 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5393 preserve_temp_slots (result
);
5398 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5399 succeeded, false otherwise. */
5402 emit_storent_insn (rtx to
, rtx from
)
5404 struct expand_operand ops
[2];
5405 machine_mode mode
= GET_MODE (to
);
5406 enum insn_code code
= optab_handler (storent_optab
, mode
);
5408 if (code
== CODE_FOR_nothing
)
5411 create_fixed_operand (&ops
[0], to
);
5412 create_input_operand (&ops
[1], from
, mode
);
5413 return maybe_expand_insn (code
, 2, ops
);
5416 /* Generate code for computing expression EXP,
5417 and storing the value into TARGET.
5419 If the mode is BLKmode then we may return TARGET itself.
5420 It turns out that in BLKmode it doesn't cause a problem.
5421 because C has no operators that could combine two different
5422 assignments into the same BLKmode object with different values
5423 with no sequence point. Will other languages need this to
5426 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5427 stack, and block moves may need to be treated specially.
5429 If NONTEMPORAL is true, try using a nontemporal store instruction.
5431 If REVERSE is true, the store is to be done in reverse order. */
5434 store_expr (tree exp
, rtx target
, int call_param_p
,
5435 bool nontemporal
, bool reverse
)
5438 rtx alt_rtl
= NULL_RTX
;
5439 location_t loc
= curr_insn_location ();
5441 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5443 /* C++ can generate ?: expressions with a throw expression in one
5444 branch and an rvalue in the other. Here, we resolve attempts to
5445 store the throw expression's nonexistent result. */
5446 gcc_assert (!call_param_p
);
5447 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5450 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5452 /* Perform first part of compound expression, then assign from second
5454 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5455 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5456 return store_expr (TREE_OPERAND (exp
, 1), target
,
5457 call_param_p
, nontemporal
, reverse
);
5459 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5461 /* For conditional expression, get safe form of the target. Then
5462 test the condition, doing the appropriate assignment on either
5463 side. This avoids the creation of unnecessary temporaries.
5464 For non-BLKmode, it is more efficient not to do this. */
5466 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5468 do_pending_stack_adjust ();
5470 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5471 profile_probability::uninitialized ());
5472 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5473 nontemporal
, reverse
);
5474 emit_jump_insn (targetm
.gen_jump (lab2
));
5477 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5478 nontemporal
, reverse
);
5484 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5485 /* If this is a scalar in a register that is stored in a wider mode
5486 than the declared mode, compute the result into its declared mode
5487 and then convert to the wider mode. Our value is the computed
5490 rtx inner_target
= 0;
5491 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5492 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5494 /* We can do the conversion inside EXP, which will often result
5495 in some optimizations. Do the conversion in two steps: first
5496 change the signedness, if needed, then the extend. But don't
5497 do this if the type of EXP is a subtype of something else
5498 since then the conversion might involve more than just
5499 converting modes. */
5500 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5501 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5502 && GET_MODE_PRECISION (outer_mode
)
5503 == TYPE_PRECISION (TREE_TYPE (exp
)))
5505 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5506 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5508 /* Some types, e.g. Fortran's logical*4, won't have a signed
5509 version, so use the mode instead. */
5511 = (signed_or_unsigned_type_for
5512 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5514 ntype
= lang_hooks
.types
.type_for_mode
5515 (TYPE_MODE (TREE_TYPE (exp
)),
5516 SUBREG_PROMOTED_SIGN (target
));
5518 exp
= fold_convert_loc (loc
, ntype
, exp
);
5521 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5522 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5525 inner_target
= SUBREG_REG (target
);
5528 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5529 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5532 /* If TEMP is a VOIDmode constant, use convert_modes to make
5533 sure that we properly convert it. */
5534 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5536 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5537 temp
, SUBREG_PROMOTED_SIGN (target
));
5538 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5539 SUBREG_PROMOTED_SIGN (target
));
5542 convert_move (SUBREG_REG (target
), temp
,
5543 SUBREG_PROMOTED_SIGN (target
));
5547 else if ((TREE_CODE (exp
) == STRING_CST
5548 || (TREE_CODE (exp
) == MEM_REF
5549 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5550 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5552 && integer_zerop (TREE_OPERAND (exp
, 1))))
5553 && !nontemporal
&& !call_param_p
5556 /* Optimize initialization of an array with a STRING_CST. */
5557 HOST_WIDE_INT exp_len
, str_copy_len
;
5559 tree str
= TREE_CODE (exp
) == STRING_CST
5560 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5562 exp_len
= int_expr_size (exp
);
5566 if (TREE_STRING_LENGTH (str
) <= 0)
5569 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5570 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5573 str_copy_len
= TREE_STRING_LENGTH (str
);
5574 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5575 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5577 str_copy_len
+= STORE_MAX_PIECES
- 1;
5578 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5580 str_copy_len
= MIN (str_copy_len
, exp_len
);
5581 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5582 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5583 MEM_ALIGN (target
), false))
5588 dest_mem
= store_by_pieces (dest_mem
,
5589 str_copy_len
, builtin_strncpy_read_str
,
5591 TREE_STRING_POINTER (str
)),
5592 MEM_ALIGN (target
), false,
5593 exp_len
> str_copy_len
? 1 : 0);
5594 if (exp_len
> str_copy_len
)
5595 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5596 GEN_INT (exp_len
- str_copy_len
),
5605 /* If we want to use a nontemporal or a reverse order store, force the
5606 value into a register first. */
5607 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5608 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5610 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5614 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5615 the same as that of TARGET, adjust the constant. This is needed, for
5616 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5617 only a word-sized value. */
5618 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5619 && TREE_CODE (exp
) != ERROR_MARK
5620 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5622 if (GET_MODE_CLASS (GET_MODE (target
))
5623 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5624 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5625 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5627 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5628 TYPE_MODE (TREE_TYPE (exp
)), 0);
5632 if (GET_MODE (temp
) == VOIDmode
)
5633 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5634 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5637 /* If value was not generated in the target, store it there.
5638 Convert the value to TARGET's type first if necessary and emit the
5639 pending incrementations that have been queued when expanding EXP.
5640 Note that we cannot emit the whole queue blindly because this will
5641 effectively disable the POST_INC optimization later.
5643 If TEMP and TARGET compare equal according to rtx_equal_p, but
5644 one or both of them are volatile memory refs, we have to distinguish
5646 - expand_expr has used TARGET. In this case, we must not generate
5647 another copy. This can be detected by TARGET being equal according
5649 - expand_expr has not used TARGET - that means that the source just
5650 happens to have the same RTX form. Since temp will have been created
5651 by expand_expr, it will compare unequal according to == .
5652 We must generate a copy in this case, to reach the correct number
5653 of volatile memory references. */
5655 if ((! rtx_equal_p (temp
, target
)
5656 || (temp
!= target
&& (side_effects_p (temp
)
5657 || side_effects_p (target
))))
5658 && TREE_CODE (exp
) != ERROR_MARK
5659 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5660 but TARGET is not valid memory reference, TEMP will differ
5661 from TARGET although it is really the same location. */
5663 && rtx_equal_p (alt_rtl
, target
)
5664 && !side_effects_p (alt_rtl
)
5665 && !side_effects_p (target
))
5666 /* If there's nothing to copy, don't bother. Don't call
5667 expr_size unless necessary, because some front-ends (C++)
5668 expr_size-hook must not be given objects that are not
5669 supposed to be bit-copied or bit-initialized. */
5670 && expr_size (exp
) != const0_rtx
)
5672 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5674 if (GET_MODE (target
) == BLKmode
)
5676 /* Handle calls that return BLKmode values in registers. */
5677 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5678 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5680 store_bit_field (target
,
5681 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5682 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5685 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5688 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5690 /* Handle copying a string constant into an array. The string
5691 constant may be shorter than the array. So copy just the string's
5692 actual length, and clear the rest. First get the size of the data
5693 type of the string, which is actually the size of the target. */
5694 rtx size
= expr_size (exp
);
5696 if (CONST_INT_P (size
)
5697 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5698 emit_block_move (target
, temp
, size
,
5700 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5703 machine_mode pointer_mode
5704 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5705 machine_mode address_mode
= get_address_mode (target
);
5707 /* Compute the size of the data to copy from the string. */
5709 = size_binop_loc (loc
, MIN_EXPR
,
5710 make_tree (sizetype
, size
),
5711 size_int (TREE_STRING_LENGTH (exp
)));
5713 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5715 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5716 rtx_code_label
*label
= 0;
5718 /* Copy that much. */
5719 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5720 TYPE_UNSIGNED (sizetype
));
5721 emit_block_move (target
, temp
, copy_size_rtx
,
5723 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5725 /* Figure out how much is left in TARGET that we have to clear.
5726 Do all calculations in pointer_mode. */
5727 if (CONST_INT_P (copy_size_rtx
))
5729 size
= plus_constant (address_mode
, size
,
5730 -INTVAL (copy_size_rtx
));
5731 target
= adjust_address (target
, BLKmode
,
5732 INTVAL (copy_size_rtx
));
5736 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5737 copy_size_rtx
, NULL_RTX
, 0,
5740 if (GET_MODE (copy_size_rtx
) != address_mode
)
5741 copy_size_rtx
= convert_to_mode (address_mode
,
5743 TYPE_UNSIGNED (sizetype
));
5745 target
= offset_address (target
, copy_size_rtx
,
5746 highest_pow2_factor (copy_size
));
5747 label
= gen_label_rtx ();
5748 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5749 GET_MODE (size
), 0, label
);
5752 if (size
!= const0_rtx
)
5753 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5759 /* Handle calls that return values in multiple non-contiguous locations.
5760 The Irix 6 ABI has examples of this. */
5761 else if (GET_CODE (target
) == PARALLEL
)
5763 if (GET_CODE (temp
) == PARALLEL
)
5764 emit_group_move (target
, temp
);
5766 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5767 int_size_in_bytes (TREE_TYPE (exp
)));
5769 else if (GET_CODE (temp
) == PARALLEL
)
5770 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5771 int_size_in_bytes (TREE_TYPE (exp
)));
5772 else if (GET_MODE (temp
) == BLKmode
)
5773 emit_block_move (target
, temp
, expr_size (exp
),
5775 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5776 /* If we emit a nontemporal store, there is nothing else to do. */
5777 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5782 temp
= flip_storage_order (GET_MODE (target
), temp
);
5783 temp
= force_operand (temp
, target
);
5785 emit_move_insn (target
, temp
);
5792 /* Return true if field F of structure TYPE is a flexible array. */
5795 flexible_array_member_p (const_tree f
, const_tree type
)
5800 return (DECL_CHAIN (f
) == NULL
5801 && TREE_CODE (tf
) == ARRAY_TYPE
5803 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5804 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5805 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5806 && int_size_in_bytes (type
) >= 0);
5809 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5810 must have in order for it to completely initialize a value of type TYPE.
5811 Return -1 if the number isn't known.
5813 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5815 static HOST_WIDE_INT
5816 count_type_elements (const_tree type
, bool for_ctor_p
)
5818 switch (TREE_CODE (type
))
5824 nelts
= array_type_nelts (type
);
5825 if (nelts
&& tree_fits_uhwi_p (nelts
))
5827 unsigned HOST_WIDE_INT n
;
5829 n
= tree_to_uhwi (nelts
) + 1;
5830 if (n
== 0 || for_ctor_p
)
5833 return n
* count_type_elements (TREE_TYPE (type
), false);
5835 return for_ctor_p
? -1 : 1;
5840 unsigned HOST_WIDE_INT n
;
5844 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5845 if (TREE_CODE (f
) == FIELD_DECL
)
5848 n
+= count_type_elements (TREE_TYPE (f
), false);
5849 else if (!flexible_array_member_p (f
, type
))
5850 /* Don't count flexible arrays, which are not supposed
5851 to be initialized. */
5859 case QUAL_UNION_TYPE
:
5864 gcc_assert (!for_ctor_p
);
5865 /* Estimate the number of scalars in each field and pick the
5866 maximum. Other estimates would do instead; the idea is simply
5867 to make sure that the estimate is not sensitive to the ordering
5870 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5871 if (TREE_CODE (f
) == FIELD_DECL
)
5873 m
= count_type_elements (TREE_TYPE (f
), false);
5874 /* If the field doesn't span the whole union, add an extra
5875 scalar for the rest. */
5876 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5877 TYPE_SIZE (type
)) != 1)
5890 unsigned HOST_WIDE_INT nelts
;
5891 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
5899 case FIXED_POINT_TYPE
:
5904 case REFERENCE_TYPE
:
5920 /* Helper for categorize_ctor_elements. Identical interface. */
5923 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5924 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5926 unsigned HOST_WIDE_INT idx
;
5927 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5928 tree value
, purpose
, elt_type
;
5930 /* Whether CTOR is a valid constant initializer, in accordance with what
5931 initializer_constant_valid_p does. If inferred from the constructor
5932 elements, true until proven otherwise. */
5933 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5934 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5939 elt_type
= NULL_TREE
;
5941 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5943 HOST_WIDE_INT mult
= 1;
5945 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5947 tree lo_index
= TREE_OPERAND (purpose
, 0);
5948 tree hi_index
= TREE_OPERAND (purpose
, 1);
5950 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
5951 mult
= (tree_to_uhwi (hi_index
)
5952 - tree_to_uhwi (lo_index
) + 1);
5955 elt_type
= TREE_TYPE (value
);
5957 switch (TREE_CODE (value
))
5961 HOST_WIDE_INT nz
= 0, ic
= 0;
5963 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
5966 nz_elts
+= mult
* nz
;
5967 init_elts
+= mult
* ic
;
5969 if (const_from_elts_p
&& const_p
)
5970 const_p
= const_elt_p
;
5977 if (!initializer_zerop (value
))
5983 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
5984 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
5988 if (!initializer_zerop (TREE_REALPART (value
)))
5990 if (!initializer_zerop (TREE_IMAGPART (value
)))
5997 /* We can only construct constant-length vectors using
5999 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6000 for (unsigned int i
= 0; i
< nunits
; ++i
)
6002 tree v
= VECTOR_CST_ELT (value
, i
);
6003 if (!initializer_zerop (v
))
6012 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6013 nz_elts
+= mult
* tc
;
6014 init_elts
+= mult
* tc
;
6016 if (const_from_elts_p
&& const_p
)
6018 = initializer_constant_valid_p (value
,
6020 TYPE_REVERSE_STORAGE_ORDER
6028 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6029 num_fields
, elt_type
))
6030 *p_complete
= false;
6032 *p_nz_elts
+= nz_elts
;
6033 *p_init_elts
+= init_elts
;
6038 /* Examine CTOR to discover:
6039 * how many scalar fields are set to nonzero values,
6040 and place it in *P_NZ_ELTS;
6041 * how many scalar fields in total are in CTOR,
6042 and place it in *P_ELT_COUNT.
6043 * whether the constructor is complete -- in the sense that every
6044 meaningful byte is explicitly given a value --
6045 and place it in *P_COMPLETE.
6047 Return whether or not CTOR is a valid static constant initializer, the same
6048 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6051 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6052 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6058 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
6061 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6062 of which had type LAST_TYPE. Each element was itself a complete
6063 initializer, in the sense that every meaningful byte was explicitly
6064 given a value. Return true if the same is true for the constructor
6068 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6069 const_tree last_type
)
6071 if (TREE_CODE (type
) == UNION_TYPE
6072 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6077 gcc_assert (num_elts
== 1 && last_type
);
6079 /* ??? We could look at each element of the union, and find the
6080 largest element. Which would avoid comparing the size of the
6081 initialized element against any tail padding in the union.
6082 Doesn't seem worth the effort... */
6083 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6086 return count_type_elements (type
, true) == num_elts
;
6089 /* Return 1 if EXP contains mostly (3/4) zeros. */
6092 mostly_zeros_p (const_tree exp
)
6094 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6096 HOST_WIDE_INT nz_elts
, init_elts
;
6099 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6100 return !complete_p
|| nz_elts
< init_elts
/ 4;
6103 return initializer_zerop (exp
);
6106 /* Return 1 if EXP contains all zeros. */
6109 all_zeros_p (const_tree exp
)
6111 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6113 HOST_WIDE_INT nz_elts
, init_elts
;
6116 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6117 return nz_elts
== 0;
6120 return initializer_zerop (exp
);
6123 /* Helper function for store_constructor.
6124 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6125 CLEARED is as for store_constructor.
6126 ALIAS_SET is the alias set to use for any stores.
6127 If REVERSE is true, the store is to be done in reverse order.
6129 This provides a recursive shortcut back to store_constructor when it isn't
6130 necessary to go through store_field. This is so that we can pass through
6131 the cleared field to let store_constructor know that we may not have to
6132 clear a substructure if the outer structure has already been cleared. */
6135 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6136 poly_uint64 bitregion_start
,
6137 poly_uint64 bitregion_end
,
6139 tree exp
, int cleared
,
6140 alias_set_type alias_set
, bool reverse
)
6143 poly_uint64 bytesize
;
6144 if (TREE_CODE (exp
) == CONSTRUCTOR
6145 /* We can only call store_constructor recursively if the size and
6146 bit position are on a byte boundary. */
6147 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6148 && maybe_ne (bitsize
, 0U)
6149 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6150 /* If we have a nonzero bitpos for a register target, then we just
6151 let store_field do the bitfield handling. This is unlikely to
6152 generate unnecessary clear instructions anyways. */
6153 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6157 machine_mode target_mode
= GET_MODE (target
);
6158 if (target_mode
!= BLKmode
6159 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6160 target_mode
= BLKmode
;
6161 target
= adjust_address (target
, target_mode
, bytepos
);
6165 /* Update the alias set, if required. */
6166 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6167 && MEM_ALIAS_SET (target
) != 0)
6169 target
= copy_rtx (target
);
6170 set_mem_alias_set (target
, alias_set
);
6173 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6176 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6177 exp
, alias_set
, false, reverse
);
6181 /* Returns the number of FIELD_DECLs in TYPE. */
6184 fields_length (const_tree type
)
6186 tree t
= TYPE_FIELDS (type
);
6189 for (; t
; t
= DECL_CHAIN (t
))
6190 if (TREE_CODE (t
) == FIELD_DECL
)
6197 /* Store the value of constructor EXP into the rtx TARGET.
6198 TARGET is either a REG or a MEM; we know it cannot conflict, since
6199 safe_from_p has been called.
6200 CLEARED is true if TARGET is known to have been zero'd.
6201 SIZE is the number of bytes of TARGET we are allowed to modify: this
6202 may not be the same as the size of EXP if we are assigning to a field
6203 which has been packed to exclude padding bits.
6204 If REVERSE is true, the store is to be done in reverse order. */
6207 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6210 tree type
= TREE_TYPE (exp
);
6211 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6212 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6214 switch (TREE_CODE (type
))
6218 case QUAL_UNION_TYPE
:
6220 unsigned HOST_WIDE_INT idx
;
6223 /* The storage order is specified for every aggregate type. */
6224 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6226 /* If size is zero or the target is already cleared, do nothing. */
6227 if (known_eq (size
, 0) || cleared
)
6229 /* We either clear the aggregate or indicate the value is dead. */
6230 else if ((TREE_CODE (type
) == UNION_TYPE
6231 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6232 && ! CONSTRUCTOR_ELTS (exp
))
6233 /* If the constructor is empty, clear the union. */
6235 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6239 /* If we are building a static constructor into a register,
6240 set the initial value as zero so we can fold the value into
6241 a constant. But if more than one register is involved,
6242 this probably loses. */
6243 else if (REG_P (target
) && TREE_STATIC (exp
)
6244 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6245 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6247 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6251 /* If the constructor has fewer fields than the structure or
6252 if we are initializing the structure to mostly zeros, clear
6253 the whole structure first. Don't do this if TARGET is a
6254 register whose mode size isn't equal to SIZE since
6255 clear_storage can't handle this case. */
6256 else if (known_size_p (size
)
6257 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6258 || mostly_zeros_p (exp
))
6260 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6262 clear_storage (target
, gen_int_mode (size
, Pmode
),
6267 if (REG_P (target
) && !cleared
)
6268 emit_clobber (target
);
6270 /* Store each element of the constructor into the
6271 corresponding field of TARGET. */
6272 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6275 HOST_WIDE_INT bitsize
;
6276 HOST_WIDE_INT bitpos
= 0;
6278 rtx to_rtx
= target
;
6280 /* Just ignore missing fields. We cleared the whole
6281 structure, above, if any fields are missing. */
6285 if (cleared
&& initializer_zerop (value
))
6288 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6289 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6293 mode
= DECL_MODE (field
);
6294 if (DECL_BIT_FIELD (field
))
6297 offset
= DECL_FIELD_OFFSET (field
);
6298 if (tree_fits_shwi_p (offset
)
6299 && tree_fits_shwi_p (bit_position (field
)))
6301 bitpos
= int_bit_position (field
);
6307 /* If this initializes a field that is smaller than a
6308 word, at the start of a word, try to widen it to a full
6309 word. This special case allows us to output C++ member
6310 function initializations in a form that the optimizers
6312 if (WORD_REGISTER_OPERATIONS
6314 && bitsize
< BITS_PER_WORD
6315 && bitpos
% BITS_PER_WORD
== 0
6316 && GET_MODE_CLASS (mode
) == MODE_INT
6317 && TREE_CODE (value
) == INTEGER_CST
6319 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6321 tree type
= TREE_TYPE (value
);
6323 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6325 type
= lang_hooks
.types
.type_for_mode
6326 (word_mode
, TYPE_UNSIGNED (type
));
6327 value
= fold_convert (type
, value
);
6328 /* Make sure the bits beyond the original bitsize are zero
6329 so that we can correctly avoid extra zeroing stores in
6330 later constructor elements. */
6332 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6334 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6337 if (BYTES_BIG_ENDIAN
)
6339 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6340 build_int_cst (type
,
6341 BITS_PER_WORD
- bitsize
));
6342 bitsize
= BITS_PER_WORD
;
6346 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6347 && DECL_NONADDRESSABLE_P (field
))
6349 to_rtx
= copy_rtx (to_rtx
);
6350 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6353 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6354 0, bitregion_end
, mode
,
6356 get_alias_set (TREE_TYPE (field
)),
6364 unsigned HOST_WIDE_INT i
;
6367 tree elttype
= TREE_TYPE (type
);
6369 HOST_WIDE_INT minelt
= 0;
6370 HOST_WIDE_INT maxelt
= 0;
6372 /* The storage order is specified for every aggregate type. */
6373 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6375 domain
= TYPE_DOMAIN (type
);
6376 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6377 && TYPE_MAX_VALUE (domain
)
6378 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6379 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6381 /* If we have constant bounds for the range of the type, get them. */
6384 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6385 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6388 /* If the constructor has fewer elements than the array, clear
6389 the whole array first. Similarly if this is static
6390 constructor of a non-BLKmode object. */
6393 else if (REG_P (target
) && TREE_STATIC (exp
))
6397 unsigned HOST_WIDE_INT idx
;
6399 HOST_WIDE_INT count
= 0, zero_count
= 0;
6400 need_to_clear
= ! const_bounds_p
;
6402 /* This loop is a more accurate version of the loop in
6403 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6404 is also needed to check for missing elements. */
6405 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6407 HOST_WIDE_INT this_node_count
;
6412 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6414 tree lo_index
= TREE_OPERAND (index
, 0);
6415 tree hi_index
= TREE_OPERAND (index
, 1);
6417 if (! tree_fits_uhwi_p (lo_index
)
6418 || ! tree_fits_uhwi_p (hi_index
))
6424 this_node_count
= (tree_to_uhwi (hi_index
)
6425 - tree_to_uhwi (lo_index
) + 1);
6428 this_node_count
= 1;
6430 count
+= this_node_count
;
6431 if (mostly_zeros_p (value
))
6432 zero_count
+= this_node_count
;
6435 /* Clear the entire array first if there are any missing
6436 elements, or if the incidence of zero elements is >=
6439 && (count
< maxelt
- minelt
+ 1
6440 || 4 * zero_count
>= 3 * count
))
6444 if (need_to_clear
&& maybe_gt (size
, 0))
6447 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6449 clear_storage (target
, gen_int_mode (size
, Pmode
),
6454 if (!cleared
&& REG_P (target
))
6455 /* Inform later passes that the old value is dead. */
6456 emit_clobber (target
);
6458 /* Store each element of the constructor into the
6459 corresponding element of TARGET, determined by counting the
6461 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6465 HOST_WIDE_INT bitpos
;
6466 rtx xtarget
= target
;
6468 if (cleared
&& initializer_zerop (value
))
6471 mode
= TYPE_MODE (elttype
);
6472 if (mode
!= BLKmode
)
6473 bitsize
= GET_MODE_BITSIZE (mode
);
6474 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6477 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6479 tree lo_index
= TREE_OPERAND (index
, 0);
6480 tree hi_index
= TREE_OPERAND (index
, 1);
6481 rtx index_r
, pos_rtx
;
6482 HOST_WIDE_INT lo
, hi
, count
;
6485 /* If the range is constant and "small", unroll the loop. */
6487 && tree_fits_shwi_p (lo_index
)
6488 && tree_fits_shwi_p (hi_index
)
6489 && (lo
= tree_to_shwi (lo_index
),
6490 hi
= tree_to_shwi (hi_index
),
6491 count
= hi
- lo
+ 1,
6494 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6495 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6498 lo
-= minelt
; hi
-= minelt
;
6499 for (; lo
<= hi
; lo
++)
6501 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6504 && !MEM_KEEP_ALIAS_SET_P (target
)
6505 && TREE_CODE (type
) == ARRAY_TYPE
6506 && TYPE_NONALIASED_COMPONENT (type
))
6508 target
= copy_rtx (target
);
6509 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6512 store_constructor_field
6513 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6514 mode
, value
, cleared
,
6515 get_alias_set (elttype
), reverse
);
6520 rtx_code_label
*loop_start
= gen_label_rtx ();
6521 rtx_code_label
*loop_end
= gen_label_rtx ();
6524 expand_normal (hi_index
);
6526 index
= build_decl (EXPR_LOCATION (exp
),
6527 VAR_DECL
, NULL_TREE
, domain
);
6528 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6529 SET_DECL_RTL (index
, index_r
);
6530 store_expr (lo_index
, index_r
, 0, false, reverse
);
6532 /* Build the head of the loop. */
6533 do_pending_stack_adjust ();
6534 emit_label (loop_start
);
6536 /* Assign value to element index. */
6538 fold_convert (ssizetype
,
6539 fold_build2 (MINUS_EXPR
,
6542 TYPE_MIN_VALUE (domain
)));
6545 size_binop (MULT_EXPR
, position
,
6546 fold_convert (ssizetype
,
6547 TYPE_SIZE_UNIT (elttype
)));
6549 pos_rtx
= expand_normal (position
);
6550 xtarget
= offset_address (target
, pos_rtx
,
6551 highest_pow2_factor (position
));
6552 xtarget
= adjust_address (xtarget
, mode
, 0);
6553 if (TREE_CODE (value
) == CONSTRUCTOR
)
6554 store_constructor (value
, xtarget
, cleared
,
6555 exact_div (bitsize
, BITS_PER_UNIT
),
6558 store_expr (value
, xtarget
, 0, false, reverse
);
6560 /* Generate a conditional jump to exit the loop. */
6561 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6563 jumpif (exit_cond
, loop_end
,
6564 profile_probability::uninitialized ());
6566 /* Update the loop counter, and jump to the head of
6568 expand_assignment (index
,
6569 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6570 index
, integer_one_node
),
6573 emit_jump (loop_start
);
6575 /* Build the end of the loop. */
6576 emit_label (loop_end
);
6579 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6580 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6585 index
= ssize_int (1);
6588 index
= fold_convert (ssizetype
,
6589 fold_build2 (MINUS_EXPR
,
6592 TYPE_MIN_VALUE (domain
)));
6595 size_binop (MULT_EXPR
, index
,
6596 fold_convert (ssizetype
,
6597 TYPE_SIZE_UNIT (elttype
)));
6598 xtarget
= offset_address (target
,
6599 expand_normal (position
),
6600 highest_pow2_factor (position
));
6601 xtarget
= adjust_address (xtarget
, mode
, 0);
6602 store_expr (value
, xtarget
, 0, false, reverse
);
6607 bitpos
= ((tree_to_shwi (index
) - minelt
)
6608 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6610 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6612 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6613 && TREE_CODE (type
) == ARRAY_TYPE
6614 && TYPE_NONALIASED_COMPONENT (type
))
6616 target
= copy_rtx (target
);
6617 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6619 store_constructor_field (target
, bitsize
, bitpos
, 0,
6620 bitregion_end
, mode
, value
,
6621 cleared
, get_alias_set (elttype
),
6630 unsigned HOST_WIDE_INT idx
;
6631 constructor_elt
*ce
;
6634 insn_code icode
= CODE_FOR_nothing
;
6636 tree elttype
= TREE_TYPE (type
);
6637 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6638 machine_mode eltmode
= TYPE_MODE (elttype
);
6639 HOST_WIDE_INT bitsize
;
6640 HOST_WIDE_INT bitpos
;
6641 rtvec vector
= NULL
;
6643 unsigned HOST_WIDE_INT const_n_elts
;
6644 alias_set_type alias
;
6645 bool vec_vec_init_p
= false;
6646 machine_mode mode
= GET_MODE (target
);
6648 gcc_assert (eltmode
!= BLKmode
);
6650 /* Try using vec_duplicate_optab for uniform vectors. */
6651 if (!TREE_SIDE_EFFECTS (exp
)
6652 && VECTOR_MODE_P (mode
)
6653 && eltmode
== GET_MODE_INNER (mode
)
6654 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6655 != CODE_FOR_nothing
)
6656 && (elt
= uniform_vector_p (exp
)))
6658 struct expand_operand ops
[2];
6659 create_output_operand (&ops
[0], target
, mode
);
6660 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6661 expand_insn (icode
, 2, ops
);
6662 if (!rtx_equal_p (target
, ops
[0].value
))
6663 emit_move_insn (target
, ops
[0].value
);
6667 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6669 && VECTOR_MODE_P (mode
)
6670 && n_elts
.is_constant (&const_n_elts
))
6672 machine_mode emode
= eltmode
;
6674 if (CONSTRUCTOR_NELTS (exp
)
6675 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6678 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6679 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6680 * TYPE_VECTOR_SUBPARTS (etype
),
6682 emode
= TYPE_MODE (etype
);
6684 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6685 if (icode
!= CODE_FOR_nothing
)
6687 unsigned int i
, n
= const_n_elts
;
6689 if (emode
!= eltmode
)
6691 n
= CONSTRUCTOR_NELTS (exp
);
6692 vec_vec_init_p
= true;
6694 vector
= rtvec_alloc (n
);
6695 for (i
= 0; i
< n
; i
++)
6696 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6700 /* If the constructor has fewer elements than the vector,
6701 clear the whole array first. Similarly if this is static
6702 constructor of a non-BLKmode object. */
6705 else if (REG_P (target
) && TREE_STATIC (exp
))
6709 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6712 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6714 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6716 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6717 TYPE_SIZE (elttype
)));
6719 count
+= n_elts_here
;
6720 if (mostly_zeros_p (value
))
6721 zero_count
+= n_elts_here
;
6724 /* Clear the entire vector first if there are any missing elements,
6725 or if the incidence of zero elements is >= 75%. */
6726 need_to_clear
= (maybe_lt (count
, n_elts
)
6727 || 4 * zero_count
>= 3 * count
);
6730 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6733 emit_move_insn (target
, CONST0_RTX (mode
));
6735 clear_storage (target
, gen_int_mode (size
, Pmode
),
6740 /* Inform later passes that the old value is dead. */
6741 if (!cleared
&& !vector
&& REG_P (target
))
6742 emit_move_insn (target
, CONST0_RTX (mode
));
6745 alias
= MEM_ALIAS_SET (target
);
6747 alias
= get_alias_set (elttype
);
6749 /* Store each element of the constructor into the corresponding
6750 element of TARGET, determined by counting the elements. */
6751 for (idx
= 0, i
= 0;
6752 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6753 idx
++, i
+= bitsize
/ elt_size
)
6755 HOST_WIDE_INT eltpos
;
6756 tree value
= ce
->value
;
6758 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6759 if (cleared
&& initializer_zerop (value
))
6763 eltpos
= tree_to_uhwi (ce
->index
);
6771 gcc_assert (ce
->index
== NULL_TREE
);
6772 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6776 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6777 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6781 machine_mode value_mode
6782 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6783 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6784 bitpos
= eltpos
* elt_size
;
6785 store_constructor_field (target
, bitsize
, bitpos
, 0,
6786 bitregion_end
, value_mode
,
6787 value
, cleared
, alias
, reverse
);
6792 emit_insn (GEN_FCN (icode
) (target
,
6793 gen_rtx_PARALLEL (mode
, vector
)));
6802 /* Store the value of EXP (an expression tree)
6803 into a subfield of TARGET which has mode MODE and occupies
6804 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6805 If MODE is VOIDmode, it means that we are storing into a bit-field.
6807 BITREGION_START is bitpos of the first bitfield in this region.
6808 BITREGION_END is the bitpos of the ending bitfield in this region.
6809 These two fields are 0, if the C++ memory model does not apply,
6810 or we are not interested in keeping track of bitfield regions.
6812 Always return const0_rtx unless we have something particular to
6815 ALIAS_SET is the alias set for the destination. This value will
6816 (in general) be different from that for TARGET, since TARGET is a
6817 reference to the containing structure.
6819 If NONTEMPORAL is true, try generating a nontemporal store.
6821 If REVERSE is true, the store is to be done in reverse order. */
6824 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
6825 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
6826 machine_mode mode
, tree exp
,
6827 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6829 if (TREE_CODE (exp
) == ERROR_MARK
)
6832 /* If we have nothing to store, do nothing unless the expression has
6833 side-effects. Don't do that for zero sized addressable lhs of
6835 if (known_eq (bitsize
, 0)
6836 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6837 || TREE_CODE (exp
) != CALL_EXPR
))
6838 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6840 if (GET_CODE (target
) == CONCAT
)
6842 /* We're storing into a struct containing a single __complex. */
6844 gcc_assert (known_eq (bitpos
, 0));
6845 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6848 /* If the structure is in a register or if the component
6849 is a bit field, we cannot use addressing to access it.
6850 Use bit-field techniques or SUBREG to store in it. */
6852 poly_int64 decl_bitsize
;
6853 if (mode
== VOIDmode
6854 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6855 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6856 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6858 || GET_CODE (target
) == SUBREG
6859 /* If the field isn't aligned enough to store as an ordinary memref,
6860 store it as a bit field. */
6862 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6863 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
6864 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6865 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
6866 || (known_size_p (bitsize
)
6868 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
6869 /* If the RHS and field are a constant size and the size of the
6870 RHS isn't the same size as the bitfield, we must use bitfield
6872 || (known_size_p (bitsize
)
6873 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
6874 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
6876 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6877 we will handle specially below. */
6878 && !(TREE_CODE (exp
) == CONSTRUCTOR
6879 && multiple_p (bitsize
, BITS_PER_UNIT
))
6880 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6881 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6882 includes some extra padding. store_expr / expand_expr will in
6883 that case call get_inner_reference that will have the bitsize
6884 we check here and thus the block move will not clobber the
6885 padding that shouldn't be clobbered. In the future we could
6886 replace the TREE_ADDRESSABLE check with a check that
6887 get_base_address needs to live in memory. */
6888 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6889 || TREE_CODE (exp
) != COMPONENT_REF
6890 || !multiple_p (bitsize
, BITS_PER_UNIT
)
6891 || !multiple_p (bitpos
, BITS_PER_UNIT
)
6892 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
6894 || maybe_ne (decl_bitsize
, bitsize
)))
6895 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6896 decl we must use bitfield operations. */
6897 || (known_size_p (bitsize
)
6898 && TREE_CODE (exp
) == MEM_REF
6899 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6900 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6901 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6902 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6907 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6908 implies a mask operation. If the precision is the same size as
6909 the field we're storing into, that mask is redundant. This is
6910 particularly common with bit field assignments generated by the
6912 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6915 tree type
= TREE_TYPE (exp
);
6916 if (INTEGRAL_TYPE_P (type
)
6917 && maybe_ne (TYPE_PRECISION (type
),
6918 GET_MODE_BITSIZE (TYPE_MODE (type
)))
6919 && known_eq (bitsize
, TYPE_PRECISION (type
)))
6921 tree op
= gimple_assign_rhs1 (nop_def
);
6922 type
= TREE_TYPE (op
);
6923 if (INTEGRAL_TYPE_P (type
)
6924 && known_ge (TYPE_PRECISION (type
), bitsize
))
6929 temp
= expand_normal (exp
);
6931 /* We don't support variable-sized BLKmode bitfields, since our
6932 handling of BLKmode is bound up with the ability to break
6933 things into words. */
6934 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
6936 /* Handle calls that return values in multiple non-contiguous locations.
6937 The Irix 6 ABI has examples of this. */
6938 if (GET_CODE (temp
) == PARALLEL
)
6940 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6941 machine_mode temp_mode
= GET_MODE (temp
);
6942 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
6943 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
6944 rtx temp_target
= gen_reg_rtx (temp_mode
);
6945 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6949 /* Handle calls that return BLKmode values in registers. */
6950 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6952 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
6953 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
6957 /* If the value has aggregate type and an integral mode then, if BITSIZE
6958 is narrower than this mode and this is for big-endian data, we first
6959 need to put the value into the low-order bits for store_bit_field,
6960 except when MODE is BLKmode and BITSIZE larger than the word size
6961 (see the handling of fields larger than a word in store_bit_field).
6962 Moreover, the field may be not aligned on a byte boundary; in this
6963 case, if it has reverse storage order, it needs to be accessed as a
6964 scalar field with reverse storage order and we must first put the
6965 value into target order. */
6966 scalar_int_mode temp_mode
;
6967 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
6968 && is_int_mode (GET_MODE (temp
), &temp_mode
))
6970 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
6972 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
6975 temp
= flip_storage_order (temp_mode
, temp
);
6977 gcc_checking_assert (known_le (bitsize
, size
));
6978 if (maybe_lt (bitsize
, size
)
6979 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
6980 /* Use of to_constant for BLKmode was checked above. */
6981 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
6982 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
6983 size
- bitsize
, NULL_RTX
, 1);
6986 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6987 if (mode
!= VOIDmode
&& mode
!= BLKmode
6988 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
6989 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
6991 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
6992 and BITPOS must be aligned on a byte boundary. If so, we simply do
6993 a block copy. Likewise for a BLKmode-like TARGET. */
6994 if (GET_MODE (temp
) == BLKmode
6995 && (GET_MODE (target
) == BLKmode
6997 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
6998 && multiple_p (bitpos
, BITS_PER_UNIT
)
6999 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7001 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7002 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7003 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7005 target
= adjust_address (target
, VOIDmode
, bytepos
);
7006 emit_block_move (target
, temp
,
7007 gen_int_mode (bytesize
, Pmode
),
7013 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7014 word size, we need to load the value (see again store_bit_field). */
7015 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7017 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
7018 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7019 temp_mode
, false, NULL
);
7022 /* Store the value in the bitfield. */
7023 store_bit_field (target
, bitsize
, bitpos
,
7024 bitregion_start
, bitregion_end
,
7025 mode
, temp
, reverse
);
7031 /* Now build a reference to just the desired component. */
7032 rtx to_rtx
= adjust_address (target
, mode
,
7033 exact_div (bitpos
, BITS_PER_UNIT
));
7035 if (to_rtx
== target
)
7036 to_rtx
= copy_rtx (to_rtx
);
7038 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7039 set_mem_alias_set (to_rtx
, alias_set
);
7041 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7042 into a target smaller than its type; handle that case now. */
7043 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7045 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7046 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7050 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7054 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7055 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7056 codes and find the ultimate containing object, which we return.
7058 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7059 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7060 storage order of the field.
7061 If the position of the field is variable, we store a tree
7062 giving the variable offset (in units) in *POFFSET.
7063 This offset is in addition to the bit position.
7064 If the position is not variable, we store 0 in *POFFSET.
7066 If any of the extraction expressions is volatile,
7067 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7069 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7070 Otherwise, it is a mode that can be used to access the field.
7072 If the field describes a variable-sized object, *PMODE is set to
7073 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7074 this case, but the address of the object can be found. */
7077 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7078 poly_int64_pod
*pbitpos
, tree
*poffset
,
7079 machine_mode
*pmode
, int *punsignedp
,
7080 int *preversep
, int *pvolatilep
)
7083 machine_mode mode
= VOIDmode
;
7084 bool blkmode_bitfield
= false;
7085 tree offset
= size_zero_node
;
7086 poly_offset_int bit_offset
= 0;
7088 /* First get the mode, signedness, storage order and size. We do this from
7089 just the outermost expression. */
7091 if (TREE_CODE (exp
) == COMPONENT_REF
)
7093 tree field
= TREE_OPERAND (exp
, 1);
7094 size_tree
= DECL_SIZE (field
);
7095 if (flag_strict_volatile_bitfields
> 0
7096 && TREE_THIS_VOLATILE (exp
)
7097 && DECL_BIT_FIELD_TYPE (field
)
7098 && DECL_MODE (field
) != BLKmode
)
7099 /* Volatile bitfields should be accessed in the mode of the
7100 field's type, not the mode computed based on the bit
7102 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7103 else if (!DECL_BIT_FIELD (field
))
7105 mode
= DECL_MODE (field
);
7106 /* For vector fields re-check the target flags, as DECL_MODE
7107 could have been set with different target flags than
7108 the current function has. */
7110 && VECTOR_TYPE_P (TREE_TYPE (field
))
7111 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7112 mode
= TYPE_MODE (TREE_TYPE (field
));
7114 else if (DECL_MODE (field
) == BLKmode
)
7115 blkmode_bitfield
= true;
7117 *punsignedp
= DECL_UNSIGNED (field
);
7119 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7121 size_tree
= TREE_OPERAND (exp
, 1);
7122 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7123 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7125 /* For vector types, with the correct size of access, use the mode of
7127 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7128 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7129 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7130 mode
= TYPE_MODE (TREE_TYPE (exp
));
7134 mode
= TYPE_MODE (TREE_TYPE (exp
));
7135 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7137 if (mode
== BLKmode
)
7138 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7140 *pbitsize
= GET_MODE_BITSIZE (mode
);
7145 if (! tree_fits_uhwi_p (size_tree
))
7146 mode
= BLKmode
, *pbitsize
= -1;
7148 *pbitsize
= tree_to_uhwi (size_tree
);
7151 *preversep
= reverse_storage_order_for_component_p (exp
);
7153 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7154 and find the ultimate containing object. */
7157 switch (TREE_CODE (exp
))
7160 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7165 tree field
= TREE_OPERAND (exp
, 1);
7166 tree this_offset
= component_ref_field_offset (exp
);
7168 /* If this field hasn't been filled in yet, don't go past it.
7169 This should only happen when folding expressions made during
7170 type construction. */
7171 if (this_offset
== 0)
7174 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7175 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7177 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7182 case ARRAY_RANGE_REF
:
7184 tree index
= TREE_OPERAND (exp
, 1);
7185 tree low_bound
= array_ref_low_bound (exp
);
7186 tree unit_size
= array_ref_element_size (exp
);
7188 /* We assume all arrays have sizes that are a multiple of a byte.
7189 First subtract the lower bound, if any, in the type of the
7190 index, then convert to sizetype and multiply by the size of
7191 the array element. */
7192 if (! integer_zerop (low_bound
))
7193 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7196 offset
= size_binop (PLUS_EXPR
, offset
,
7197 size_binop (MULT_EXPR
,
7198 fold_convert (sizetype
, index
),
7207 bit_offset
+= *pbitsize
;
7210 case VIEW_CONVERT_EXPR
:
7214 /* Hand back the decl for MEM[&decl, off]. */
7215 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7217 tree off
= TREE_OPERAND (exp
, 1);
7218 if (!integer_zerop (off
))
7220 poly_offset_int boff
= mem_ref_offset (exp
);
7221 boff
<<= LOG2_BITS_PER_UNIT
;
7224 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7232 /* If any reference in the chain is volatile, the effect is volatile. */
7233 if (TREE_THIS_VOLATILE (exp
))
7236 exp
= TREE_OPERAND (exp
, 0);
7240 /* If OFFSET is constant, see if we can return the whole thing as a
7241 constant bit position. Make sure to handle overflow during
7243 if (poly_int_tree_p (offset
))
7245 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7246 TYPE_PRECISION (sizetype
));
7247 tem
<<= LOG2_BITS_PER_UNIT
;
7249 if (tem
.to_shwi (pbitpos
))
7250 *poffset
= offset
= NULL_TREE
;
7253 /* Otherwise, split it up. */
7256 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7257 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7259 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7260 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7261 offset
= size_binop (PLUS_EXPR
, offset
,
7262 build_int_cst (sizetype
, bytes
.force_shwi ()));
7268 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7269 if (mode
== VOIDmode
7271 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7272 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7280 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7282 static unsigned HOST_WIDE_INT
7283 target_align (const_tree target
)
7285 /* We might have a chain of nested references with intermediate misaligning
7286 bitfields components, so need to recurse to find out. */
7288 unsigned HOST_WIDE_INT this_align
, outer_align
;
7290 switch (TREE_CODE (target
))
7296 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7297 outer_align
= target_align (TREE_OPERAND (target
, 0));
7298 return MIN (this_align
, outer_align
);
7301 case ARRAY_RANGE_REF
:
7302 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7303 outer_align
= target_align (TREE_OPERAND (target
, 0));
7304 return MIN (this_align
, outer_align
);
7307 case NON_LVALUE_EXPR
:
7308 case VIEW_CONVERT_EXPR
:
7309 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7310 outer_align
= target_align (TREE_OPERAND (target
, 0));
7311 return MAX (this_align
, outer_align
);
7314 return TYPE_ALIGN (TREE_TYPE (target
));
7319 /* Given an rtx VALUE that may contain additions and multiplications, return
7320 an equivalent value that just refers to a register, memory, or constant.
7321 This is done by generating instructions to perform the arithmetic and
7322 returning a pseudo-register containing the value.
7324 The returned value may be a REG, SUBREG, MEM or constant. */
7327 force_operand (rtx value
, rtx target
)
7330 /* Use subtarget as the target for operand 0 of a binary operation. */
7331 rtx subtarget
= get_subtarget (target
);
7332 enum rtx_code code
= GET_CODE (value
);
7334 /* Check for subreg applied to an expression produced by loop optimizer. */
7336 && !REG_P (SUBREG_REG (value
))
7337 && !MEM_P (SUBREG_REG (value
)))
7340 = simplify_gen_subreg (GET_MODE (value
),
7341 force_reg (GET_MODE (SUBREG_REG (value
)),
7342 force_operand (SUBREG_REG (value
),
7344 GET_MODE (SUBREG_REG (value
)),
7345 SUBREG_BYTE (value
));
7346 code
= GET_CODE (value
);
7349 /* Check for a PIC address load. */
7350 if ((code
== PLUS
|| code
== MINUS
)
7351 && XEXP (value
, 0) == pic_offset_table_rtx
7352 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7353 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7354 || GET_CODE (XEXP (value
, 1)) == CONST
))
7357 subtarget
= gen_reg_rtx (GET_MODE (value
));
7358 emit_move_insn (subtarget
, value
);
7362 if (ARITHMETIC_P (value
))
7364 op2
= XEXP (value
, 1);
7365 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7367 if (code
== MINUS
&& CONST_INT_P (op2
))
7370 op2
= negate_rtx (GET_MODE (value
), op2
);
7373 /* Check for an addition with OP2 a constant integer and our first
7374 operand a PLUS of a virtual register and something else. In that
7375 case, we want to emit the sum of the virtual register and the
7376 constant first and then add the other value. This allows virtual
7377 register instantiation to simply modify the constant rather than
7378 creating another one around this addition. */
7379 if (code
== PLUS
&& CONST_INT_P (op2
)
7380 && GET_CODE (XEXP (value
, 0)) == PLUS
7381 && REG_P (XEXP (XEXP (value
, 0), 0))
7382 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7383 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7385 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7386 XEXP (XEXP (value
, 0), 0), op2
,
7387 subtarget
, 0, OPTAB_LIB_WIDEN
);
7388 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7389 force_operand (XEXP (XEXP (value
,
7391 target
, 0, OPTAB_LIB_WIDEN
);
7394 op1
= force_operand (XEXP (value
, 0), subtarget
);
7395 op2
= force_operand (op2
, NULL_RTX
);
7399 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7401 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7402 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7403 target
, 1, OPTAB_LIB_WIDEN
);
7405 return expand_divmod (0,
7406 FLOAT_MODE_P (GET_MODE (value
))
7407 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7408 GET_MODE (value
), op1
, op2
, target
, 0);
7410 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7413 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7416 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7419 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7420 target
, 0, OPTAB_LIB_WIDEN
);
7422 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7423 target
, 1, OPTAB_LIB_WIDEN
);
7426 if (UNARY_P (value
))
7429 target
= gen_reg_rtx (GET_MODE (value
));
7430 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7437 case FLOAT_TRUNCATE
:
7438 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7443 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7447 case UNSIGNED_FLOAT
:
7448 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7452 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7456 #ifdef INSN_SCHEDULING
7457 /* On machines that have insn scheduling, we want all memory reference to be
7458 explicit, so we need to deal with such paradoxical SUBREGs. */
7459 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7461 = simplify_gen_subreg (GET_MODE (value
),
7462 force_reg (GET_MODE (SUBREG_REG (value
)),
7463 force_operand (SUBREG_REG (value
),
7465 GET_MODE (SUBREG_REG (value
)),
7466 SUBREG_BYTE (value
));
7472 /* Subroutine of expand_expr: return nonzero iff there is no way that
7473 EXP can reference X, which is being modified. TOP_P is nonzero if this
7474 call is going to be used to determine whether we need a temporary
7475 for EXP, as opposed to a recursive call to this function.
7477 It is always safe for this routine to return zero since it merely
7478 searches for optimization opportunities. */
7481 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7487 /* If EXP has varying size, we MUST use a target since we currently
7488 have no way of allocating temporaries of variable size
7489 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7490 So we assume here that something at a higher level has prevented a
7491 clash. This is somewhat bogus, but the best we can do. Only
7492 do this when X is BLKmode and when we are at the top level. */
7493 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7494 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7495 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7496 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7497 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7499 && GET_MODE (x
) == BLKmode
)
7500 /* If X is in the outgoing argument area, it is always safe. */
7502 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7503 || (GET_CODE (XEXP (x
, 0)) == PLUS
7504 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7507 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7508 find the underlying pseudo. */
7509 if (GET_CODE (x
) == SUBREG
)
7512 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7516 /* Now look at our tree code and possibly recurse. */
7517 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7519 case tcc_declaration
:
7520 exp_rtl
= DECL_RTL_IF_SET (exp
);
7526 case tcc_exceptional
:
7527 if (TREE_CODE (exp
) == TREE_LIST
)
7531 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7533 exp
= TREE_CHAIN (exp
);
7536 if (TREE_CODE (exp
) != TREE_LIST
)
7537 return safe_from_p (x
, exp
, 0);
7540 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7542 constructor_elt
*ce
;
7543 unsigned HOST_WIDE_INT idx
;
7545 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7546 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7547 || !safe_from_p (x
, ce
->value
, 0))
7551 else if (TREE_CODE (exp
) == ERROR_MARK
)
7552 return 1; /* An already-visited SAVE_EXPR? */
7557 /* The only case we look at here is the DECL_INITIAL inside a
7559 return (TREE_CODE (exp
) != DECL_EXPR
7560 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7561 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7562 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7565 case tcc_comparison
:
7566 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7571 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7573 case tcc_expression
:
7576 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7577 the expression. If it is set, we conflict iff we are that rtx or
7578 both are in memory. Otherwise, we check all operands of the
7579 expression recursively. */
7581 switch (TREE_CODE (exp
))
7584 /* If the operand is static or we are static, we can't conflict.
7585 Likewise if we don't conflict with the operand at all. */
7586 if (staticp (TREE_OPERAND (exp
, 0))
7587 || TREE_STATIC (exp
)
7588 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7591 /* Otherwise, the only way this can conflict is if we are taking
7592 the address of a DECL a that address if part of X, which is
7594 exp
= TREE_OPERAND (exp
, 0);
7597 if (!DECL_RTL_SET_P (exp
)
7598 || !MEM_P (DECL_RTL (exp
)))
7601 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7607 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7608 get_alias_set (exp
)))
7613 /* Assume that the call will clobber all hard registers and
7615 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7620 case WITH_CLEANUP_EXPR
:
7621 case CLEANUP_POINT_EXPR
:
7622 /* Lowered by gimplify.c. */
7626 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7632 /* If we have an rtx, we do not need to scan our operands. */
7636 nops
= TREE_OPERAND_LENGTH (exp
);
7637 for (i
= 0; i
< nops
; i
++)
7638 if (TREE_OPERAND (exp
, i
) != 0
7639 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7645 /* Should never get a type here. */
7649 /* If we have an rtl, find any enclosed object. Then see if we conflict
7653 if (GET_CODE (exp_rtl
) == SUBREG
)
7655 exp_rtl
= SUBREG_REG (exp_rtl
);
7657 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7661 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7662 are memory and they conflict. */
7663 return ! (rtx_equal_p (x
, exp_rtl
)
7664 || (MEM_P (x
) && MEM_P (exp_rtl
)
7665 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7668 /* If we reach here, it is safe. */
7673 /* Return the highest power of two that EXP is known to be a multiple of.
7674 This is used in updating alignment of MEMs in array references. */
7676 unsigned HOST_WIDE_INT
7677 highest_pow2_factor (const_tree exp
)
7679 unsigned HOST_WIDE_INT ret
;
7680 int trailing_zeros
= tree_ctz (exp
);
7681 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7682 return BIGGEST_ALIGNMENT
;
7683 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7684 if (ret
> BIGGEST_ALIGNMENT
)
7685 return BIGGEST_ALIGNMENT
;
7689 /* Similar, except that the alignment requirements of TARGET are
7690 taken into account. Assume it is at least as aligned as its
7691 type, unless it is a COMPONENT_REF in which case the layout of
7692 the structure gives the alignment. */
7694 static unsigned HOST_WIDE_INT
7695 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7697 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7698 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7700 return MAX (factor
, talign
);
7703 /* Convert the tree comparison code TCODE to the rtl one where the
7704 signedness is UNSIGNEDP. */
7706 static enum rtx_code
7707 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7719 code
= unsignedp
? LTU
: LT
;
7722 code
= unsignedp
? LEU
: LE
;
7725 code
= unsignedp
? GTU
: GT
;
7728 code
= unsignedp
? GEU
: GE
;
7730 case UNORDERED_EXPR
:
7761 /* Subroutine of expand_expr. Expand the two operands of a binary
7762 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7763 The value may be stored in TARGET if TARGET is nonzero. The
7764 MODIFIER argument is as documented by expand_expr. */
7767 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7768 enum expand_modifier modifier
)
7770 if (! safe_from_p (target
, exp1
, 1))
7772 if (operand_equal_p (exp0
, exp1
, 0))
7774 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7775 *op1
= copy_rtx (*op0
);
7779 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7780 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7785 /* Return a MEM that contains constant EXP. DEFER is as for
7786 output_constant_def and MODIFIER is as for expand_expr. */
7789 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7793 mem
= output_constant_def (exp
, defer
);
7794 if (modifier
!= EXPAND_INITIALIZER
)
7795 mem
= use_anchored_address (mem
);
7799 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7800 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7803 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7804 enum expand_modifier modifier
, addr_space_t as
)
7806 rtx result
, subtarget
;
7808 poly_int64 bitsize
, bitpos
;
7809 int unsignedp
, reversep
, volatilep
= 0;
7812 /* If we are taking the address of a constant and are at the top level,
7813 we have to use output_constant_def since we can't call force_const_mem
7815 /* ??? This should be considered a front-end bug. We should not be
7816 generating ADDR_EXPR of something that isn't an LVALUE. The only
7817 exception here is STRING_CST. */
7818 if (CONSTANT_CLASS_P (exp
))
7820 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7821 if (modifier
< EXPAND_SUM
)
7822 result
= force_operand (result
, target
);
7826 /* Everything must be something allowed by is_gimple_addressable. */
7827 switch (TREE_CODE (exp
))
7830 /* This case will happen via recursion for &a->b. */
7831 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7835 tree tem
= TREE_OPERAND (exp
, 0);
7836 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7837 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7838 return expand_expr (tem
, target
, tmode
, modifier
);
7841 case TARGET_MEM_REF
:
7842 return addr_for_mem_ref (exp
, as
, true);
7845 /* Expand the initializer like constants above. */
7846 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7848 if (modifier
< EXPAND_SUM
)
7849 result
= force_operand (result
, target
);
7853 /* The real part of the complex number is always first, therefore
7854 the address is the same as the address of the parent object. */
7857 inner
= TREE_OPERAND (exp
, 0);
7861 /* The imaginary part of the complex number is always second.
7862 The expression is therefore always offset by the size of the
7865 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7866 inner
= TREE_OPERAND (exp
, 0);
7869 case COMPOUND_LITERAL_EXPR
:
7870 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7871 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7872 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7873 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7874 the initializers aren't gimplified. */
7875 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7876 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7877 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7878 target
, tmode
, modifier
, as
);
7881 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7882 expand_expr, as that can have various side effects; LABEL_DECLs for
7883 example, may not have their DECL_RTL set yet. Expand the rtl of
7884 CONSTRUCTORs too, which should yield a memory reference for the
7885 constructor's contents. Assume language specific tree nodes can
7886 be expanded in some interesting way. */
7887 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7889 || TREE_CODE (exp
) == CONSTRUCTOR
7890 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7892 result
= expand_expr (exp
, target
, tmode
,
7893 modifier
== EXPAND_INITIALIZER
7894 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7896 /* If the DECL isn't in memory, then the DECL wasn't properly
7897 marked TREE_ADDRESSABLE, which will be either a front-end
7898 or a tree optimizer bug. */
7900 gcc_assert (MEM_P (result
));
7901 result
= XEXP (result
, 0);
7903 /* ??? Is this needed anymore? */
7905 TREE_USED (exp
) = 1;
7907 if (modifier
!= EXPAND_INITIALIZER
7908 && modifier
!= EXPAND_CONST_ADDRESS
7909 && modifier
!= EXPAND_SUM
)
7910 result
= force_operand (result
, target
);
7914 /* Pass FALSE as the last argument to get_inner_reference although
7915 we are expanding to RTL. The rationale is that we know how to
7916 handle "aligning nodes" here: we can just bypass them because
7917 they won't change the final object whose address will be returned
7918 (they actually exist only for that purpose). */
7919 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
7920 &unsignedp
, &reversep
, &volatilep
);
7924 /* We must have made progress. */
7925 gcc_assert (inner
!= exp
);
7927 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
7928 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7929 inner alignment, force the inner to be sufficiently aligned. */
7930 if (CONSTANT_CLASS_P (inner
)
7931 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7933 inner
= copy_node (inner
);
7934 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7935 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
7936 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7938 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7944 if (modifier
!= EXPAND_NORMAL
)
7945 result
= force_operand (result
, NULL
);
7946 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7947 modifier
== EXPAND_INITIALIZER
7948 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
7950 /* expand_expr is allowed to return an object in a mode other
7951 than TMODE. If it did, we need to convert. */
7952 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
7953 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
7954 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
7955 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7956 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
7958 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
7959 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
7962 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
7963 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
7964 1, OPTAB_LIB_WIDEN
);
7968 if (maybe_ne (bitpos
, 0))
7970 /* Someone beforehand should have rejected taking the address
7971 of an object that isn't byte-aligned. */
7972 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7973 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7974 result
= plus_constant (tmode
, result
, bytepos
);
7975 if (modifier
< EXPAND_SUM
)
7976 result
= force_operand (result
, target
);
7982 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7983 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7986 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
7987 enum expand_modifier modifier
)
7989 addr_space_t as
= ADDR_SPACE_GENERIC
;
7990 scalar_int_mode address_mode
= Pmode
;
7991 scalar_int_mode pointer_mode
= ptr_mode
;
7995 /* Target mode of VOIDmode says "whatever's natural". */
7996 if (tmode
== VOIDmode
)
7997 tmode
= TYPE_MODE (TREE_TYPE (exp
));
7999 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8001 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8002 address_mode
= targetm
.addr_space
.address_mode (as
);
8003 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8006 /* We can get called with some Weird Things if the user does silliness
8007 like "(short) &a". In that case, convert_memory_address won't do
8008 the right thing, so ignore the given target mode. */
8009 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8013 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8014 new_tmode
, modifier
, as
);
8016 /* Despite expand_expr claims concerning ignoring TMODE when not
8017 strictly convenient, stuff breaks if we don't honor it. Note
8018 that combined with the above, we only do this for pointer modes. */
8019 rmode
= GET_MODE (result
);
8020 if (rmode
== VOIDmode
)
8022 if (rmode
!= new_tmode
)
8023 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8028 /* Generate code for computing CONSTRUCTOR EXP.
8029 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8030 is TRUE, instead of creating a temporary variable in memory
8031 NULL is returned and the caller needs to handle it differently. */
8034 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8035 bool avoid_temp_mem
)
8037 tree type
= TREE_TYPE (exp
);
8038 machine_mode mode
= TYPE_MODE (type
);
8040 /* Try to avoid creating a temporary at all. This is possible
8041 if all of the initializer is zero.
8042 FIXME: try to handle all [0..255] initializers we can handle
8044 if (TREE_STATIC (exp
)
8045 && !TREE_ADDRESSABLE (exp
)
8046 && target
!= 0 && mode
== BLKmode
8047 && all_zeros_p (exp
))
8049 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8053 /* All elts simple constants => refer to a constant in memory. But
8054 if this is a non-BLKmode mode, let it store a field at a time
8055 since that should make a CONST_INT, CONST_WIDE_INT or
8056 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8057 use, it is best to store directly into the target unless the type
8058 is large enough that memcpy will be used. If we are making an
8059 initializer and all operands are constant, put it in memory as
8062 FIXME: Avoid trying to fill vector constructors piece-meal.
8063 Output them with output_constant_def below unless we're sure
8064 they're zeros. This should go away when vector initializers
8065 are treated like VECTOR_CST instead of arrays. */
8066 if ((TREE_STATIC (exp
)
8067 && ((mode
== BLKmode
8068 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8069 || TREE_ADDRESSABLE (exp
)
8070 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8071 && (! can_move_by_pieces
8072 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8074 && ! mostly_zeros_p (exp
))))
8075 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8076 && TREE_CONSTANT (exp
)))
8083 constructor
= expand_expr_constant (exp
, 1, modifier
);
8085 if (modifier
!= EXPAND_CONST_ADDRESS
8086 && modifier
!= EXPAND_INITIALIZER
8087 && modifier
!= EXPAND_SUM
)
8088 constructor
= validize_mem (constructor
);
8093 /* Handle calls that pass values in multiple non-contiguous
8094 locations. The Irix 6 ABI has examples of this. */
8095 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8096 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8101 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8104 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8109 /* expand_expr: generate code for computing expression EXP.
8110 An rtx for the computed value is returned. The value is never null.
8111 In the case of a void EXP, const0_rtx is returned.
8113 The value may be stored in TARGET if TARGET is nonzero.
8114 TARGET is just a suggestion; callers must assume that
8115 the rtx returned may not be the same as TARGET.
8117 If TARGET is CONST0_RTX, it means that the value will be ignored.
8119 If TMODE is not VOIDmode, it suggests generating the
8120 result in mode TMODE. But this is done only when convenient.
8121 Otherwise, TMODE is ignored and the value generated in its natural mode.
8122 TMODE is just a suggestion; callers must assume that
8123 the rtx returned may not have mode TMODE.
8125 Note that TARGET may have neither TMODE nor MODE. In that case, it
8126 probably will not be used.
8128 If MODIFIER is EXPAND_SUM then when EXP is an addition
8129 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8130 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8131 products as above, or REG or MEM, or constant.
8132 Ordinarily in such cases we would output mul or add instructions
8133 and then return a pseudo reg containing the sum.
8135 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8136 it also marks a label as absolutely required (it can't be dead).
8137 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8138 This is used for outputting expressions used in initializers.
8140 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8141 with a constant address even if that address is not normally legitimate.
8142 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8144 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8145 a call parameter. Such targets require special care as we haven't yet
8146 marked TARGET so that it's safe from being trashed by libcalls. We
8147 don't want to use TARGET for anything but the final result;
8148 Intermediate values must go elsewhere. Additionally, calls to
8149 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8151 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8152 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8153 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8154 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8157 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8158 In this case, we don't adjust a returned MEM rtx that wouldn't be
8159 sufficiently aligned for its mode; instead, it's up to the caller
8160 to deal with it afterwards. This is used to make sure that unaligned
8161 base objects for which out-of-bounds accesses are supported, for
8162 example record types with trailing arrays, aren't realigned behind
8163 the back of the caller.
8164 The normal operating mode is to pass FALSE for this parameter. */
8167 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8168 enum expand_modifier modifier
, rtx
*alt_rtl
,
8169 bool inner_reference_p
)
8173 /* Handle ERROR_MARK before anybody tries to access its type. */
8174 if (TREE_CODE (exp
) == ERROR_MARK
8175 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8177 ret
= CONST0_RTX (tmode
);
8178 return ret
? ret
: const0_rtx
;
8181 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8186 /* Try to expand the conditional expression which is represented by
8187 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8188 return the rtl reg which represents the result. Otherwise return
8192 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8193 tree treeop1 ATTRIBUTE_UNUSED
,
8194 tree treeop2 ATTRIBUTE_UNUSED
)
8197 rtx op00
, op01
, op1
, op2
;
8198 enum rtx_code comparison_code
;
8199 machine_mode comparison_mode
;
8202 tree type
= TREE_TYPE (treeop1
);
8203 int unsignedp
= TYPE_UNSIGNED (type
);
8204 machine_mode mode
= TYPE_MODE (type
);
8205 machine_mode orig_mode
= mode
;
8206 static bool expanding_cond_expr_using_cmove
= false;
8208 /* Conditional move expansion can end up TERing two operands which,
8209 when recursively hitting conditional expressions can result in
8210 exponential behavior if the cmove expansion ultimatively fails.
8211 It's hardly profitable to TER a cmove into a cmove so avoid doing
8212 that by failing early if we end up recursing. */
8213 if (expanding_cond_expr_using_cmove
)
8216 /* If we cannot do a conditional move on the mode, try doing it
8217 with the promoted mode. */
8218 if (!can_conditionally_move_p (mode
))
8220 mode
= promote_mode (type
, mode
, &unsignedp
);
8221 if (!can_conditionally_move_p (mode
))
8223 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8226 temp
= assign_temp (type
, 0, 1);
8228 expanding_cond_expr_using_cmove
= true;
8230 expand_operands (treeop1
, treeop2
,
8231 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8233 if (TREE_CODE (treeop0
) == SSA_NAME
8234 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8236 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8237 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8238 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8239 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8240 comparison_mode
= TYPE_MODE (type
);
8241 unsignedp
= TYPE_UNSIGNED (type
);
8242 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8244 else if (COMPARISON_CLASS_P (treeop0
))
8246 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8247 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8248 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8249 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8250 unsignedp
= TYPE_UNSIGNED (type
);
8251 comparison_mode
= TYPE_MODE (type
);
8252 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8256 op00
= expand_normal (treeop0
);
8258 comparison_code
= NE
;
8259 comparison_mode
= GET_MODE (op00
);
8260 if (comparison_mode
== VOIDmode
)
8261 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8263 expanding_cond_expr_using_cmove
= false;
8265 if (GET_MODE (op1
) != mode
)
8266 op1
= gen_lowpart (mode
, op1
);
8268 if (GET_MODE (op2
) != mode
)
8269 op2
= gen_lowpart (mode
, op2
);
8271 /* Try to emit the conditional move. */
8272 insn
= emit_conditional_move (temp
, comparison_code
,
8273 op00
, op01
, comparison_mode
,
8277 /* If we could do the conditional move, emit the sequence,
8281 rtx_insn
*seq
= get_insns ();
8284 return convert_modes (orig_mode
, mode
, temp
, 0);
8287 /* Otherwise discard the sequence and fall back to code with
8294 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8295 enum expand_modifier modifier
)
8297 rtx op0
, op1
, op2
, temp
;
8298 rtx_code_label
*lab
;
8302 scalar_int_mode int_mode
;
8303 enum tree_code code
= ops
->code
;
8305 rtx subtarget
, original_target
;
8307 bool reduce_bit_field
;
8308 location_t loc
= ops
->location
;
8309 tree treeop0
, treeop1
, treeop2
;
8310 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8311 ? reduce_to_bit_field_precision ((expr), \
8317 mode
= TYPE_MODE (type
);
8318 unsignedp
= TYPE_UNSIGNED (type
);
8324 /* We should be called only on simple (binary or unary) expressions,
8325 exactly those that are valid in gimple expressions that aren't
8326 GIMPLE_SINGLE_RHS (or invalid). */
8327 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8328 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8329 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8331 ignore
= (target
== const0_rtx
8332 || ((CONVERT_EXPR_CODE_P (code
)
8333 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8334 && TREE_CODE (type
) == VOID_TYPE
));
8336 /* We should be called only if we need the result. */
8337 gcc_assert (!ignore
);
8339 /* An operation in what may be a bit-field type needs the
8340 result to be reduced to the precision of the bit-field type,
8341 which is narrower than that of the type's mode. */
8342 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8343 && !type_has_mode_precision_p (type
));
8345 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8348 /* Use subtarget as the target for operand 0 of a binary operation. */
8349 subtarget
= get_subtarget (target
);
8350 original_target
= target
;
8354 case NON_LVALUE_EXPR
:
8357 if (treeop0
== error_mark_node
)
8360 if (TREE_CODE (type
) == UNION_TYPE
)
8362 tree valtype
= TREE_TYPE (treeop0
);
8364 /* If both input and output are BLKmode, this conversion isn't doing
8365 anything except possibly changing memory attribute. */
8366 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8368 rtx result
= expand_expr (treeop0
, target
, tmode
,
8371 result
= copy_rtx (result
);
8372 set_mem_attributes (result
, type
, 0);
8378 if (TYPE_MODE (type
) != BLKmode
)
8379 target
= gen_reg_rtx (TYPE_MODE (type
));
8381 target
= assign_temp (type
, 1, 1);
8385 /* Store data into beginning of memory target. */
8386 store_expr (treeop0
,
8387 adjust_address (target
, TYPE_MODE (valtype
), 0),
8388 modifier
== EXPAND_STACK_PARM
,
8389 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8393 gcc_assert (REG_P (target
)
8394 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8396 /* Store this field into a union of the proper type. */
8397 poly_uint64 op0_size
8398 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8399 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8400 store_field (target
,
8401 /* The conversion must be constructed so that
8402 we know at compile time how many bits
8404 ordered_min (op0_size
, union_size
),
8405 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8409 /* Return the entire union. */
8413 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8415 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8418 /* If the signedness of the conversion differs and OP0 is
8419 a promoted SUBREG, clear that indication since we now
8420 have to do the proper extension. */
8421 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8422 && GET_CODE (op0
) == SUBREG
)
8423 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8425 return REDUCE_BIT_FIELD (op0
);
8428 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8429 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8430 if (GET_MODE (op0
) == mode
)
8433 /* If OP0 is a constant, just convert it into the proper mode. */
8434 else if (CONSTANT_P (op0
))
8436 tree inner_type
= TREE_TYPE (treeop0
);
8437 machine_mode inner_mode
= GET_MODE (op0
);
8439 if (inner_mode
== VOIDmode
)
8440 inner_mode
= TYPE_MODE (inner_type
);
8442 if (modifier
== EXPAND_INITIALIZER
)
8443 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8445 op0
= convert_modes (mode
, inner_mode
, op0
,
8446 TYPE_UNSIGNED (inner_type
));
8449 else if (modifier
== EXPAND_INITIALIZER
)
8450 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8451 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8453 else if (target
== 0)
8454 op0
= convert_to_mode (mode
, op0
,
8455 TYPE_UNSIGNED (TREE_TYPE
8459 convert_move (target
, op0
,
8460 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8464 return REDUCE_BIT_FIELD (op0
);
8466 case ADDR_SPACE_CONVERT_EXPR
:
8468 tree treeop0_type
= TREE_TYPE (treeop0
);
8470 gcc_assert (POINTER_TYPE_P (type
));
8471 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8473 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8474 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8476 /* Conversions between pointers to the same address space should
8477 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8478 gcc_assert (as_to
!= as_from
);
8480 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8482 /* Ask target code to handle conversion between pointers
8483 to overlapping address spaces. */
8484 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8485 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8487 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8491 /* For disjoint address spaces, converting anything but a null
8492 pointer invokes undefined behavior. We truncate or extend the
8493 value as if we'd converted via integers, which handles 0 as
8494 required, and all others as the programmer likely expects. */
8495 #ifndef POINTERS_EXTEND_UNSIGNED
8496 const int POINTERS_EXTEND_UNSIGNED
= 1;
8498 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8499 op0
, POINTERS_EXTEND_UNSIGNED
);
8505 case POINTER_PLUS_EXPR
:
8506 /* Even though the sizetype mode and the pointer's mode can be different
8507 expand is able to handle this correctly and get the correct result out
8508 of the PLUS_EXPR code. */
8509 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8510 if sizetype precision is smaller than pointer precision. */
8511 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8512 treeop1
= fold_convert_loc (loc
, type
,
8513 fold_convert_loc (loc
, ssizetype
,
8515 /* If sizetype precision is larger than pointer precision, truncate the
8516 offset to have matching modes. */
8517 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8518 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8522 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8523 something else, make sure we add the register to the constant and
8524 then to the other thing. This case can occur during strength
8525 reduction and doing it this way will produce better code if the
8526 frame pointer or argument pointer is eliminated.
8528 fold-const.c will ensure that the constant is always in the inner
8529 PLUS_EXPR, so the only case we need to do anything about is if
8530 sp, ap, or fp is our second argument, in which case we must swap
8531 the innermost first argument and our second argument. */
8533 if (TREE_CODE (treeop0
) == PLUS_EXPR
8534 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8536 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8537 || DECL_RTL (treeop1
) == stack_pointer_rtx
8538 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8543 /* If the result is to be ptr_mode and we are adding an integer to
8544 something, we might be forming a constant. So try to use
8545 plus_constant. If it produces a sum and we can't accept it,
8546 use force_operand. This allows P = &ARR[const] to generate
8547 efficient code on machines where a SYMBOL_REF is not a valid
8550 If this is an EXPAND_SUM call, always return the sum. */
8551 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8552 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8554 if (modifier
== EXPAND_STACK_PARM
)
8556 if (TREE_CODE (treeop0
) == INTEGER_CST
8557 && HWI_COMPUTABLE_MODE_P (mode
)
8558 && TREE_CONSTANT (treeop1
))
8562 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8564 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8566 /* Use wi::shwi to ensure that the constant is
8567 truncated according to the mode of OP1, then sign extended
8568 to a HOST_WIDE_INT. Using the constant directly can result
8569 in non-canonical RTL in a 64x32 cross compile. */
8570 wc
= TREE_INT_CST_LOW (treeop0
);
8572 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8573 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8574 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8575 op1
= force_operand (op1
, target
);
8576 return REDUCE_BIT_FIELD (op1
);
8579 else if (TREE_CODE (treeop1
) == INTEGER_CST
8580 && HWI_COMPUTABLE_MODE_P (mode
)
8581 && TREE_CONSTANT (treeop0
))
8585 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8587 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8588 (modifier
== EXPAND_INITIALIZER
8589 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8590 if (! CONSTANT_P (op0
))
8592 op1
= expand_expr (treeop1
, NULL_RTX
,
8593 VOIDmode
, modifier
);
8594 /* Return a PLUS if modifier says it's OK. */
8595 if (modifier
== EXPAND_SUM
8596 || modifier
== EXPAND_INITIALIZER
)
8597 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8600 /* Use wi::shwi to ensure that the constant is
8601 truncated according to the mode of OP1, then sign extended
8602 to a HOST_WIDE_INT. Using the constant directly can result
8603 in non-canonical RTL in a 64x32 cross compile. */
8604 wc
= TREE_INT_CST_LOW (treeop1
);
8606 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8607 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8608 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8609 op0
= force_operand (op0
, target
);
8610 return REDUCE_BIT_FIELD (op0
);
8614 /* Use TER to expand pointer addition of a negated value
8615 as pointer subtraction. */
8616 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8617 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8618 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8619 && TREE_CODE (treeop1
) == SSA_NAME
8620 && TYPE_MODE (TREE_TYPE (treeop0
))
8621 == TYPE_MODE (TREE_TYPE (treeop1
)))
8623 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8626 treeop1
= gimple_assign_rhs1 (def
);
8632 /* No sense saving up arithmetic to be done
8633 if it's all in the wrong mode to form part of an address.
8634 And force_operand won't know whether to sign-extend or
8636 if (modifier
!= EXPAND_INITIALIZER
8637 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8639 expand_operands (treeop0
, treeop1
,
8640 subtarget
, &op0
, &op1
, modifier
);
8641 if (op0
== const0_rtx
)
8643 if (op1
== const0_rtx
)
8648 expand_operands (treeop0
, treeop1
,
8649 subtarget
, &op0
, &op1
, modifier
);
8650 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8653 case POINTER_DIFF_EXPR
:
8655 /* For initializers, we are allowed to return a MINUS of two
8656 symbolic constants. Here we handle all cases when both operands
8658 /* Handle difference of two symbolic constants,
8659 for the sake of an initializer. */
8660 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8661 && really_constant_p (treeop0
)
8662 && really_constant_p (treeop1
))
8664 expand_operands (treeop0
, treeop1
,
8665 NULL_RTX
, &op0
, &op1
, modifier
);
8666 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8669 /* No sense saving up arithmetic to be done
8670 if it's all in the wrong mode to form part of an address.
8671 And force_operand won't know whether to sign-extend or
8673 if (modifier
!= EXPAND_INITIALIZER
8674 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8677 expand_operands (treeop0
, treeop1
,
8678 subtarget
, &op0
, &op1
, modifier
);
8680 /* Convert A - const to A + (-const). */
8681 if (CONST_INT_P (op1
))
8683 op1
= negate_rtx (mode
, op1
);
8684 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8689 case WIDEN_MULT_PLUS_EXPR
:
8690 case WIDEN_MULT_MINUS_EXPR
:
8691 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8692 op2
= expand_normal (treeop2
);
8693 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8697 case WIDEN_MULT_EXPR
:
8698 /* If first operand is constant, swap them.
8699 Thus the following special case checks need only
8700 check the second operand. */
8701 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8702 std::swap (treeop0
, treeop1
);
8704 /* First, check if we have a multiplication of one signed and one
8705 unsigned operand. */
8706 if (TREE_CODE (treeop1
) != INTEGER_CST
8707 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8708 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8710 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8711 this_optab
= usmul_widen_optab
;
8712 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8713 != CODE_FOR_nothing
)
8715 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8716 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8719 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8721 /* op0 and op1 might still be constant, despite the above
8722 != INTEGER_CST check. Handle it. */
8723 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8725 op0
= convert_modes (innermode
, mode
, op0
, true);
8726 op1
= convert_modes (innermode
, mode
, op1
, false);
8727 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8728 target
, unsignedp
));
8733 /* Check for a multiplication with matching signedness. */
8734 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8735 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8736 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8737 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8739 tree op0type
= TREE_TYPE (treeop0
);
8740 machine_mode innermode
= TYPE_MODE (op0type
);
8741 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8742 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8743 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8745 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8747 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8748 != CODE_FOR_nothing
)
8750 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8752 /* op0 and op1 might still be constant, despite the above
8753 != INTEGER_CST check. Handle it. */
8754 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8757 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8759 = convert_modes (innermode
, mode
, op1
,
8760 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8761 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8765 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8766 unsignedp
, this_optab
);
8767 return REDUCE_BIT_FIELD (temp
);
8769 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8771 && innermode
== word_mode
)
8774 op0
= expand_normal (treeop0
);
8775 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8776 op1
= convert_modes (word_mode
, mode
,
8777 expand_normal (treeop1
),
8778 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8780 op1
= expand_normal (treeop1
);
8781 /* op0 and op1 might still be constant, despite the above
8782 != INTEGER_CST check. Handle it. */
8783 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8784 goto widen_mult_const
;
8785 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8786 unsignedp
, OPTAB_LIB_WIDEN
);
8787 hipart
= gen_highpart (word_mode
, temp
);
8788 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8792 emit_move_insn (hipart
, htem
);
8793 return REDUCE_BIT_FIELD (temp
);
8797 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8798 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8799 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8800 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8803 /* If this is a fixed-point operation, then we cannot use the code
8804 below because "expand_mult" doesn't support sat/no-sat fixed-point
8806 if (ALL_FIXED_POINT_MODE_P (mode
))
8809 /* If first operand is constant, swap them.
8810 Thus the following special case checks need only
8811 check the second operand. */
8812 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8813 std::swap (treeop0
, treeop1
);
8815 /* Attempt to return something suitable for generating an
8816 indexed address, for machines that support that. */
8818 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8819 && tree_fits_shwi_p (treeop1
))
8821 tree exp1
= treeop1
;
8823 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8827 op0
= force_operand (op0
, NULL_RTX
);
8829 op0
= copy_to_mode_reg (mode
, op0
);
8831 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8832 gen_int_mode (tree_to_shwi (exp1
),
8833 TYPE_MODE (TREE_TYPE (exp1
)))));
8836 if (modifier
== EXPAND_STACK_PARM
)
8839 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8840 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8842 case TRUNC_MOD_EXPR
:
8843 case FLOOR_MOD_EXPR
:
8845 case ROUND_MOD_EXPR
:
8847 case TRUNC_DIV_EXPR
:
8848 case FLOOR_DIV_EXPR
:
8850 case ROUND_DIV_EXPR
:
8851 case EXACT_DIV_EXPR
:
8853 /* If this is a fixed-point operation, then we cannot use the code
8854 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8856 if (ALL_FIXED_POINT_MODE_P (mode
))
8859 if (modifier
== EXPAND_STACK_PARM
)
8861 /* Possible optimization: compute the dividend with EXPAND_SUM
8862 then if the divisor is constant can optimize the case
8863 where some terms of the dividend have coeffs divisible by it. */
8864 expand_operands (treeop0
, treeop1
,
8865 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8866 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8867 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8868 if (SCALAR_INT_MODE_P (mode
)
8870 && get_range_pos_neg (treeop0
) == 1
8871 && get_range_pos_neg (treeop1
) == 1)
8873 /* If both arguments are known to be positive when interpreted
8874 as signed, we can expand it as both signed and unsigned
8875 division or modulo. Choose the cheaper sequence in that case. */
8876 bool speed_p
= optimize_insn_for_speed_p ();
8877 do_pending_stack_adjust ();
8879 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8880 rtx_insn
*uns_insns
= get_insns ();
8883 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8884 rtx_insn
*sgn_insns
= get_insns ();
8886 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8887 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8889 /* If costs are the same then use as tie breaker the other
8891 if (uns_cost
== sgn_cost
)
8893 uns_cost
= seq_cost (uns_insns
, !speed_p
);
8894 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
8897 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
8899 emit_insn (uns_insns
);
8902 emit_insn (sgn_insns
);
8905 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
8910 case MULT_HIGHPART_EXPR
:
8911 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8912 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
8916 case FIXED_CONVERT_EXPR
:
8917 op0
= expand_normal (treeop0
);
8918 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8919 target
= gen_reg_rtx (mode
);
8921 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
8922 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8923 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
8924 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
8926 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
8929 case FIX_TRUNC_EXPR
:
8930 op0
= expand_normal (treeop0
);
8931 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8932 target
= gen_reg_rtx (mode
);
8933 expand_fix (target
, op0
, unsignedp
);
8937 op0
= expand_normal (treeop0
);
8938 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8939 target
= gen_reg_rtx (mode
);
8940 /* expand_float can't figure out what to do if FROM has VOIDmode.
8941 So give it the correct mode. With -O, cse will optimize this. */
8942 if (GET_MODE (op0
) == VOIDmode
)
8943 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
8945 expand_float (target
, op0
,
8946 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8950 op0
= expand_expr (treeop0
, subtarget
,
8951 VOIDmode
, EXPAND_NORMAL
);
8952 if (modifier
== EXPAND_STACK_PARM
)
8954 temp
= expand_unop (mode
,
8955 optab_for_tree_code (NEGATE_EXPR
, type
,
8959 return REDUCE_BIT_FIELD (temp
);
8962 op0
= expand_expr (treeop0
, subtarget
,
8963 VOIDmode
, EXPAND_NORMAL
);
8964 if (modifier
== EXPAND_STACK_PARM
)
8967 /* ABS_EXPR is not valid for complex arguments. */
8968 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
8969 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
8971 /* Unsigned abs is simply the operand. Testing here means we don't
8972 risk generating incorrect code below. */
8973 if (TYPE_UNSIGNED (type
))
8976 return expand_abs (mode
, op0
, target
, unsignedp
,
8977 safe_from_p (target
, treeop0
, 1));
8981 target
= original_target
;
8983 || modifier
== EXPAND_STACK_PARM
8984 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
8985 || GET_MODE (target
) != mode
8987 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
8988 target
= gen_reg_rtx (mode
);
8989 expand_operands (treeop0
, treeop1
,
8990 target
, &op0
, &op1
, EXPAND_NORMAL
);
8992 /* First try to do it with a special MIN or MAX instruction.
8993 If that does not win, use a conditional jump to select the proper
8995 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
8996 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9001 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9002 and similarly for MAX <x, y>. */
9003 if (VECTOR_TYPE_P (type
))
9005 tree t0
= make_tree (type
, op0
);
9006 tree t1
= make_tree (type
, op1
);
9007 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9009 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9013 /* At this point, a MEM target is no longer useful; we will get better
9016 if (! REG_P (target
))
9017 target
= gen_reg_rtx (mode
);
9019 /* If op1 was placed in target, swap op0 and op1. */
9020 if (target
!= op0
&& target
== op1
)
9021 std::swap (op0
, op1
);
9023 /* We generate better code and avoid problems with op1 mentioning
9024 target by forcing op1 into a pseudo if it isn't a constant. */
9025 if (! CONSTANT_P (op1
))
9026 op1
= force_reg (mode
, op1
);
9029 enum rtx_code comparison_code
;
9032 if (code
== MAX_EXPR
)
9033 comparison_code
= unsignedp
? GEU
: GE
;
9035 comparison_code
= unsignedp
? LEU
: LE
;
9037 /* Canonicalize to comparisons against 0. */
9038 if (op1
== const1_rtx
)
9040 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9041 or (a != 0 ? a : 1) for unsigned.
9042 For MIN we are safe converting (a <= 1 ? a : 1)
9043 into (a <= 0 ? a : 1) */
9044 cmpop1
= const0_rtx
;
9045 if (code
== MAX_EXPR
)
9046 comparison_code
= unsignedp
? NE
: GT
;
9048 if (op1
== constm1_rtx
&& !unsignedp
)
9050 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9051 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9052 cmpop1
= const0_rtx
;
9053 if (code
== MIN_EXPR
)
9054 comparison_code
= LT
;
9057 /* Use a conditional move if possible. */
9058 if (can_conditionally_move_p (mode
))
9064 /* Try to emit the conditional move. */
9065 insn
= emit_conditional_move (target
, comparison_code
,
9070 /* If we could do the conditional move, emit the sequence,
9074 rtx_insn
*seq
= get_insns ();
9080 /* Otherwise discard the sequence and fall back to code with
9086 emit_move_insn (target
, op0
);
9088 lab
= gen_label_rtx ();
9089 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9090 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9091 profile_probability::uninitialized ());
9093 emit_move_insn (target
, op1
);
9098 op0
= expand_expr (treeop0
, subtarget
,
9099 VOIDmode
, EXPAND_NORMAL
);
9100 if (modifier
== EXPAND_STACK_PARM
)
9102 /* In case we have to reduce the result to bitfield precision
9103 for unsigned bitfield expand this as XOR with a proper constant
9105 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9107 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9108 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9109 false, GET_MODE_PRECISION (int_mode
));
9111 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9112 immed_wide_int_const (mask
, int_mode
),
9113 target
, 1, OPTAB_LIB_WIDEN
);
9116 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9120 /* ??? Can optimize bitwise operations with one arg constant.
9121 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9122 and (a bitwise1 b) bitwise2 b (etc)
9123 but that is probably not worth while. */
9132 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9133 || type_has_mode_precision_p (type
));
9139 /* If this is a fixed-point operation, then we cannot use the code
9140 below because "expand_shift" doesn't support sat/no-sat fixed-point
9142 if (ALL_FIXED_POINT_MODE_P (mode
))
9145 if (! safe_from_p (subtarget
, treeop1
, 1))
9147 if (modifier
== EXPAND_STACK_PARM
)
9149 op0
= expand_expr (treeop0
, subtarget
,
9150 VOIDmode
, EXPAND_NORMAL
);
9152 /* Left shift optimization when shifting across word_size boundary.
9154 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9155 there isn't native instruction to support this wide mode
9156 left shift. Given below scenario:
9158 Type A = (Type) B << C
9161 | dest_high | dest_low |
9165 If the shift amount C caused we shift B to across the word
9166 size boundary, i.e part of B shifted into high half of
9167 destination register, and part of B remains in the low
9168 half, then GCC will use the following left shift expand
9171 1. Initialize dest_low to B.
9172 2. Initialize every bit of dest_high to the sign bit of B.
9173 3. Logic left shift dest_low by C bit to finalize dest_low.
9174 The value of dest_low before this shift is kept in a temp D.
9175 4. Logic left shift dest_high by C.
9176 5. Logic right shift D by (word_size - C).
9177 6. Or the result of 4 and 5 to finalize dest_high.
9179 While, by checking gimple statements, if operand B is
9180 coming from signed extension, then we can simplify above
9183 1. dest_high = src_low >> (word_size - C).
9184 2. dest_low = src_low << C.
9186 We can use one arithmetic right shift to finish all the
9187 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9188 needed from 6 into 2.
9190 The case is similar for zero extension, except that we
9191 initialize dest_high to zero rather than copies of the sign
9192 bit from B. Furthermore, we need to use a logical right shift
9195 The choice of sign-extension versus zero-extension is
9196 determined entirely by whether or not B is signed and is
9197 independent of the current setting of unsignedp. */
9200 if (code
== LSHIFT_EXPR
9203 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9205 && TREE_CONSTANT (treeop1
)
9206 && TREE_CODE (treeop0
) == SSA_NAME
)
9208 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9209 if (is_gimple_assign (def
)
9210 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9212 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9213 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9215 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9216 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9217 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9218 >= GET_MODE_BITSIZE (word_mode
)))
9220 rtx_insn
*seq
, *seq_old
;
9221 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9223 bool extend_unsigned
9224 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9225 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9226 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9227 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9228 int_mode
, high_off
);
9229 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9230 - TREE_INT_CST_LOW (treeop1
));
9231 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9234 /* dest_high = src_low >> (word_size - C). */
9235 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9238 if (temp
!= dest_high
)
9239 emit_move_insn (dest_high
, temp
);
9241 /* dest_low = src_low << C. */
9242 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9243 treeop1
, dest_low
, unsignedp
);
9244 if (temp
!= dest_low
)
9245 emit_move_insn (dest_low
, temp
);
9251 if (have_insn_for (ASHIFT
, int_mode
))
9253 bool speed_p
= optimize_insn_for_speed_p ();
9255 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9260 seq_old
= get_insns ();
9262 if (seq_cost (seq
, speed_p
)
9263 >= seq_cost (seq_old
, speed_p
))
9274 if (temp
== NULL_RTX
)
9275 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9277 if (code
== LSHIFT_EXPR
)
9278 temp
= REDUCE_BIT_FIELD (temp
);
9282 /* Could determine the answer when only additive constants differ. Also,
9283 the addition of one can be handled by changing the condition. */
9290 case UNORDERED_EXPR
:
9299 temp
= do_store_flag (ops
,
9300 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9301 tmode
!= VOIDmode
? tmode
: mode
);
9305 /* Use a compare and a jump for BLKmode comparisons, or for function
9306 type comparisons is have_canonicalize_funcptr_for_compare. */
9309 || modifier
== EXPAND_STACK_PARM
9310 || ! safe_from_p (target
, treeop0
, 1)
9311 || ! safe_from_p (target
, treeop1
, 1)
9312 /* Make sure we don't have a hard reg (such as function's return
9313 value) live across basic blocks, if not optimizing. */
9314 || (!optimize
&& REG_P (target
)
9315 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9316 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9318 emit_move_insn (target
, const0_rtx
);
9320 rtx_code_label
*lab1
= gen_label_rtx ();
9321 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9322 profile_probability::uninitialized ());
9324 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9325 emit_move_insn (target
, constm1_rtx
);
9327 emit_move_insn (target
, const1_rtx
);
9333 /* Get the rtx code of the operands. */
9334 op0
= expand_normal (treeop0
);
9335 op1
= expand_normal (treeop1
);
9338 target
= gen_reg_rtx (TYPE_MODE (type
));
9340 /* If target overlaps with op1, then either we need to force
9341 op1 into a pseudo (if target also overlaps with op0),
9342 or write the complex parts in reverse order. */
9343 switch (GET_CODE (target
))
9346 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9348 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9350 complex_expr_force_op1
:
9351 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9352 emit_move_insn (temp
, op1
);
9356 complex_expr_swap_order
:
9357 /* Move the imaginary (op1) and real (op0) parts to their
9359 write_complex_part (target
, op1
, true);
9360 write_complex_part (target
, op0
, false);
9366 temp
= adjust_address_nv (target
,
9367 GET_MODE_INNER (GET_MODE (target
)), 0);
9368 if (reg_overlap_mentioned_p (temp
, op1
))
9370 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9371 temp
= adjust_address_nv (target
, imode
,
9372 GET_MODE_SIZE (imode
));
9373 if (reg_overlap_mentioned_p (temp
, op0
))
9374 goto complex_expr_force_op1
;
9375 goto complex_expr_swap_order
;
9379 if (reg_overlap_mentioned_p (target
, op1
))
9381 if (reg_overlap_mentioned_p (target
, op0
))
9382 goto complex_expr_force_op1
;
9383 goto complex_expr_swap_order
;
9388 /* Move the real (op0) and imaginary (op1) parts to their location. */
9389 write_complex_part (target
, op0
, false);
9390 write_complex_part (target
, op1
, true);
9394 case WIDEN_SUM_EXPR
:
9396 tree oprnd0
= treeop0
;
9397 tree oprnd1
= treeop1
;
9399 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9400 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9405 case VEC_UNPACK_HI_EXPR
:
9406 case VEC_UNPACK_LO_EXPR
:
9407 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9408 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9410 op0
= expand_normal (treeop0
);
9411 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9417 case VEC_UNPACK_FLOAT_HI_EXPR
:
9418 case VEC_UNPACK_FLOAT_LO_EXPR
:
9420 op0
= expand_normal (treeop0
);
9421 /* The signedness is determined from input operand. */
9422 temp
= expand_widen_pattern_expr
9423 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9424 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9430 case VEC_WIDEN_MULT_HI_EXPR
:
9431 case VEC_WIDEN_MULT_LO_EXPR
:
9432 case VEC_WIDEN_MULT_EVEN_EXPR
:
9433 case VEC_WIDEN_MULT_ODD_EXPR
:
9434 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9435 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9436 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9437 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9439 gcc_assert (target
);
9442 case VEC_PACK_TRUNC_EXPR
:
9443 case VEC_PACK_SAT_EXPR
:
9444 case VEC_PACK_FIX_TRUNC_EXPR
:
9445 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9448 case VEC_PACK_FLOAT_EXPR
:
9449 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9450 expand_operands (treeop0
, treeop1
,
9451 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9452 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9454 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9455 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9457 gcc_assert (target
);
9462 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9463 vec_perm_builder sel
;
9464 if (TREE_CODE (treeop2
) == VECTOR_CST
9465 && tree_to_vec_perm_builder (&sel
, treeop2
))
9467 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9468 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9473 op2
= expand_normal (treeop2
);
9474 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9482 tree oprnd0
= treeop0
;
9483 tree oprnd1
= treeop1
;
9484 tree oprnd2
= treeop2
;
9487 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9488 op2
= expand_normal (oprnd2
);
9489 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9496 tree oprnd0
= treeop0
;
9497 tree oprnd1
= treeop1
;
9498 tree oprnd2
= treeop2
;
9501 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9502 op2
= expand_normal (oprnd2
);
9503 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9508 case REALIGN_LOAD_EXPR
:
9510 tree oprnd0
= treeop0
;
9511 tree oprnd1
= treeop1
;
9512 tree oprnd2
= treeop2
;
9515 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9516 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9517 op2
= expand_normal (oprnd2
);
9518 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9526 /* A COND_EXPR with its type being VOID_TYPE represents a
9527 conditional jump and is handled in
9528 expand_gimple_cond_expr. */
9529 gcc_assert (!VOID_TYPE_P (type
));
9531 /* Note that COND_EXPRs whose type is a structure or union
9532 are required to be constructed to contain assignments of
9533 a temporary variable, so that we can evaluate them here
9534 for side effect only. If type is void, we must do likewise. */
9536 gcc_assert (!TREE_ADDRESSABLE (type
)
9538 && TREE_TYPE (treeop1
) != void_type_node
9539 && TREE_TYPE (treeop2
) != void_type_node
);
9541 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9545 /* If we are not to produce a result, we have no target. Otherwise,
9546 if a target was specified use it; it will not be used as an
9547 intermediate target unless it is safe. If no target, use a
9550 if (modifier
!= EXPAND_STACK_PARM
9552 && safe_from_p (original_target
, treeop0
, 1)
9553 && GET_MODE (original_target
) == mode
9554 && !MEM_P (original_target
))
9555 temp
= original_target
;
9557 temp
= assign_temp (type
, 0, 1);
9559 do_pending_stack_adjust ();
9561 rtx_code_label
*lab0
= gen_label_rtx ();
9562 rtx_code_label
*lab1
= gen_label_rtx ();
9563 jumpifnot (treeop0
, lab0
,
9564 profile_probability::uninitialized ());
9565 store_expr (treeop1
, temp
,
9566 modifier
== EXPAND_STACK_PARM
,
9569 emit_jump_insn (targetm
.gen_jump (lab1
));
9572 store_expr (treeop2
, temp
,
9573 modifier
== EXPAND_STACK_PARM
,
9582 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9585 case VEC_DUPLICATE_EXPR
:
9586 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9587 target
= expand_vector_broadcast (mode
, op0
);
9588 gcc_assert (target
);
9591 case VEC_SERIES_EXPR
:
9592 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9593 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9595 case BIT_INSERT_EXPR
:
9597 unsigned bitpos
= tree_to_uhwi (treeop2
);
9599 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9600 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9602 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9603 rtx op0
= expand_normal (treeop0
);
9604 rtx op1
= expand_normal (treeop1
);
9605 rtx dst
= gen_reg_rtx (mode
);
9606 emit_move_insn (dst
, op0
);
9607 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9608 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9616 /* Here to do an ordinary binary operator. */
9618 expand_operands (treeop0
, treeop1
,
9619 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9621 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9623 if (modifier
== EXPAND_STACK_PARM
)
9625 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9626 unsignedp
, OPTAB_LIB_WIDEN
);
9628 /* Bitwise operations do not need bitfield reduction as we expect their
9629 operands being properly truncated. */
9630 if (code
== BIT_XOR_EXPR
9631 || code
== BIT_AND_EXPR
9632 || code
== BIT_IOR_EXPR
)
9634 return REDUCE_BIT_FIELD (temp
);
9636 #undef REDUCE_BIT_FIELD
9639 /* Return TRUE if expression STMT is suitable for replacement.
9640 Never consider memory loads as replaceable, because those don't ever lead
9641 into constant expressions. */
9644 stmt_is_replaceable_p (gimple
*stmt
)
9646 if (ssa_is_replaceable_p (stmt
))
9648 /* Don't move around loads. */
9649 if (!gimple_assign_single_p (stmt
)
9650 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9657 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9658 enum expand_modifier modifier
, rtx
*alt_rtl
,
9659 bool inner_reference_p
)
9661 rtx op0
, op1
, temp
, decl_rtl
;
9664 machine_mode mode
, dmode
;
9665 enum tree_code code
= TREE_CODE (exp
);
9666 rtx subtarget
, original_target
;
9669 bool reduce_bit_field
;
9670 location_t loc
= EXPR_LOCATION (exp
);
9671 struct separate_ops ops
;
9672 tree treeop0
, treeop1
, treeop2
;
9673 tree ssa_name
= NULL_TREE
;
9676 type
= TREE_TYPE (exp
);
9677 mode
= TYPE_MODE (type
);
9678 unsignedp
= TYPE_UNSIGNED (type
);
9680 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9681 if (!VL_EXP_CLASS_P (exp
))
9682 switch (TREE_CODE_LENGTH (code
))
9685 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9686 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9687 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9697 ignore
= (target
== const0_rtx
9698 || ((CONVERT_EXPR_CODE_P (code
)
9699 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9700 && TREE_CODE (type
) == VOID_TYPE
));
9702 /* An operation in what may be a bit-field type needs the
9703 result to be reduced to the precision of the bit-field type,
9704 which is narrower than that of the type's mode. */
9705 reduce_bit_field
= (!ignore
9706 && INTEGRAL_TYPE_P (type
)
9707 && !type_has_mode_precision_p (type
));
9709 /* If we are going to ignore this result, we need only do something
9710 if there is a side-effect somewhere in the expression. If there
9711 is, short-circuit the most common cases here. Note that we must
9712 not call expand_expr with anything but const0_rtx in case this
9713 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9717 if (! TREE_SIDE_EFFECTS (exp
))
9720 /* Ensure we reference a volatile object even if value is ignored, but
9721 don't do this if all we are doing is taking its address. */
9722 if (TREE_THIS_VOLATILE (exp
)
9723 && TREE_CODE (exp
) != FUNCTION_DECL
9724 && mode
!= VOIDmode
&& mode
!= BLKmode
9725 && modifier
!= EXPAND_CONST_ADDRESS
)
9727 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9733 if (TREE_CODE_CLASS (code
) == tcc_unary
9734 || code
== BIT_FIELD_REF
9735 || code
== COMPONENT_REF
9736 || code
== INDIRECT_REF
)
9737 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9740 else if (TREE_CODE_CLASS (code
) == tcc_binary
9741 || TREE_CODE_CLASS (code
) == tcc_comparison
9742 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9744 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9745 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9752 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9755 /* Use subtarget as the target for operand 0 of a binary operation. */
9756 subtarget
= get_subtarget (target
);
9757 original_target
= target
;
9763 tree function
= decl_function_context (exp
);
9765 temp
= label_rtx (exp
);
9766 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9768 if (function
!= current_function_decl
9770 LABEL_REF_NONLOCAL_P (temp
) = 1;
9772 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9777 /* ??? ivopts calls expander, without any preparation from
9778 out-of-ssa. So fake instructions as if this was an access to the
9779 base variable. This unnecessarily allocates a pseudo, see how we can
9780 reuse it, if partition base vars have it set already. */
9781 if (!currently_expanding_to_rtl
)
9783 tree var
= SSA_NAME_VAR (exp
);
9784 if (var
&& DECL_RTL_SET_P (var
))
9785 return DECL_RTL (var
);
9786 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9787 LAST_VIRTUAL_REGISTER
+ 1);
9790 g
= get_gimple_for_ssa_name (exp
);
9791 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9793 && modifier
== EXPAND_INITIALIZER
9794 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9795 && (optimize
|| !SSA_NAME_VAR (exp
)
9796 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9797 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9798 g
= SSA_NAME_DEF_STMT (exp
);
9802 location_t saved_loc
= curr_insn_location ();
9803 location_t loc
= gimple_location (g
);
9804 if (loc
!= UNKNOWN_LOCATION
)
9805 set_curr_insn_location (loc
);
9806 ops
.code
= gimple_assign_rhs_code (g
);
9807 switch (get_gimple_rhs_class (ops
.code
))
9809 case GIMPLE_TERNARY_RHS
:
9810 ops
.op2
= gimple_assign_rhs3 (g
);
9812 case GIMPLE_BINARY_RHS
:
9813 ops
.op1
= gimple_assign_rhs2 (g
);
9815 /* Try to expand conditonal compare. */
9816 if (targetm
.gen_ccmp_first
)
9818 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9819 r
= expand_ccmp_expr (g
, mode
);
9824 case GIMPLE_UNARY_RHS
:
9825 ops
.op0
= gimple_assign_rhs1 (g
);
9826 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9828 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9830 case GIMPLE_SINGLE_RHS
:
9832 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9833 tmode
, modifier
, alt_rtl
,
9840 set_curr_insn_location (saved_loc
);
9841 if (REG_P (r
) && !REG_EXPR (r
))
9842 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9847 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9848 exp
= SSA_NAME_VAR (ssa_name
);
9849 goto expand_decl_rtl
;
9853 /* If a static var's type was incomplete when the decl was written,
9854 but the type is complete now, lay out the decl now. */
9855 if (DECL_SIZE (exp
) == 0
9856 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9857 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9858 layout_decl (exp
, 0);
9864 decl_rtl
= DECL_RTL (exp
);
9866 gcc_assert (decl_rtl
);
9868 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9869 settings for VECTOR_TYPE_P that might switch for the function. */
9870 if (currently_expanding_to_rtl
9871 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9872 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9873 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9875 decl_rtl
= copy_rtx (decl_rtl
);
9877 /* Record writes to register variables. */
9878 if (modifier
== EXPAND_WRITE
9880 && HARD_REGISTER_P (decl_rtl
))
9881 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9882 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9884 /* Ensure variable marked as used even if it doesn't go through
9885 a parser. If it hasn't be used yet, write out an external
9888 TREE_USED (exp
) = 1;
9890 /* Show we haven't gotten RTL for this yet. */
9893 /* Variables inherited from containing functions should have
9894 been lowered by this point. */
9896 context
= decl_function_context (exp
);
9898 || SCOPE_FILE_SCOPE_P (context
)
9899 || context
== current_function_decl
9900 || TREE_STATIC (exp
)
9901 || DECL_EXTERNAL (exp
)
9902 /* ??? C++ creates functions that are not TREE_STATIC. */
9903 || TREE_CODE (exp
) == FUNCTION_DECL
);
9905 /* This is the case of an array whose size is to be determined
9906 from its initializer, while the initializer is still being parsed.
9907 ??? We aren't parsing while expanding anymore. */
9909 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
9910 temp
= validize_mem (decl_rtl
);
9912 /* If DECL_RTL is memory, we are in the normal case and the
9913 address is not valid, get the address into a register. */
9915 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
9918 *alt_rtl
= decl_rtl
;
9919 decl_rtl
= use_anchored_address (decl_rtl
);
9920 if (modifier
!= EXPAND_CONST_ADDRESS
9921 && modifier
!= EXPAND_SUM
9922 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
9923 : GET_MODE (decl_rtl
),
9925 MEM_ADDR_SPACE (decl_rtl
)))
9926 temp
= replace_equiv_address (decl_rtl
,
9927 copy_rtx (XEXP (decl_rtl
, 0)));
9930 /* If we got something, return it. But first, set the alignment
9931 if the address is a register. */
9934 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
9935 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
9941 dmode
= DECL_MODE (exp
);
9943 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
9945 /* If the mode of DECL_RTL does not match that of the decl,
9946 there are two cases: we are dealing with a BLKmode value
9947 that is returned in a register, or we are dealing with
9948 a promoted value. In the latter case, return a SUBREG
9949 of the wanted mode, but mark it so that we know that it
9950 was already extended. */
9951 if (REG_P (decl_rtl
)
9953 && GET_MODE (decl_rtl
) != dmode
)
9957 /* Get the signedness to be used for this variable. Ensure we get
9958 the same mode we got when the variable was declared. */
9959 if (code
!= SSA_NAME
)
9960 pmode
= promote_decl_mode (exp
, &unsignedp
);
9961 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
9962 && gimple_code (g
) == GIMPLE_CALL
9963 && !gimple_call_internal_p (g
))
9964 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
9965 gimple_call_fntype (g
),
9968 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
9969 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
9971 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
9972 SUBREG_PROMOTED_VAR_P (temp
) = 1;
9973 SUBREG_PROMOTED_SET (temp
, unsignedp
);
9981 /* Given that TYPE_PRECISION (type) is not always equal to
9982 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9983 the former to the latter according to the signedness of the
9985 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
9986 temp
= immed_wide_int_const
9987 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
9993 tree tmp
= NULL_TREE
;
9994 if (VECTOR_MODE_P (mode
))
9995 return const_vector_from_tree (exp
);
9996 scalar_int_mode int_mode
;
9997 if (is_int_mode (mode
, &int_mode
))
9999 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10000 return const_scalar_mask_from_tree (int_mode
, exp
);
10004 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10006 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10007 type_for_mode
, exp
);
10012 vec
<constructor_elt
, va_gc
> *v
;
10013 /* Constructors need to be fixed-length. FIXME. */
10014 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10015 vec_alloc (v
, nunits
);
10016 for (unsigned int i
= 0; i
< nunits
; ++i
)
10017 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10018 tmp
= build_constructor (type
, v
);
10020 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10025 if (modifier
== EXPAND_WRITE
)
10027 /* Writing into CONST_DECL is always invalid, but handle it
10029 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10030 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10031 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10032 EXPAND_NORMAL
, as
);
10033 op0
= memory_address_addr_space (mode
, op0
, as
);
10034 temp
= gen_rtx_MEM (mode
, op0
);
10035 set_mem_addr_space (temp
, as
);
10038 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10041 /* If optimized, generate immediate CONST_DOUBLE
10042 which will be turned into memory by reload if necessary.
10044 We used to force a register so that loop.c could see it. But
10045 this does not allow gen_* patterns to perform optimizations with
10046 the constants. It also produces two insns in cases like "x = 1.0;".
10047 On most machines, floating-point constants are not permitted in
10048 many insns, so we'd end up copying it to a register in any case.
10050 Now, we do the copying in expand_binop, if appropriate. */
10051 return const_double_from_real_value (TREE_REAL_CST (exp
),
10052 TYPE_MODE (TREE_TYPE (exp
)));
10055 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10056 TYPE_MODE (TREE_TYPE (exp
)));
10059 /* Handle evaluating a complex constant in a CONCAT target. */
10060 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10062 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10065 rtarg
= XEXP (original_target
, 0);
10066 itarg
= XEXP (original_target
, 1);
10068 /* Move the real and imaginary parts separately. */
10069 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10070 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10073 emit_move_insn (rtarg
, op0
);
10075 emit_move_insn (itarg
, op1
);
10077 return original_target
;
10083 temp
= expand_expr_constant (exp
, 1, modifier
);
10085 /* temp contains a constant address.
10086 On RISC machines where a constant address isn't valid,
10087 make some insns to get that address into a register. */
10088 if (modifier
!= EXPAND_CONST_ADDRESS
10089 && modifier
!= EXPAND_INITIALIZER
10090 && modifier
!= EXPAND_SUM
10091 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10092 MEM_ADDR_SPACE (temp
)))
10093 return replace_equiv_address (temp
,
10094 copy_rtx (XEXP (temp
, 0)));
10098 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10102 tree val
= treeop0
;
10103 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10104 inner_reference_p
);
10106 if (!SAVE_EXPR_RESOLVED_P (exp
))
10108 /* We can indeed still hit this case, typically via builtin
10109 expanders calling save_expr immediately before expanding
10110 something. Assume this means that we only have to deal
10111 with non-BLKmode values. */
10112 gcc_assert (GET_MODE (ret
) != BLKmode
);
10114 val
= build_decl (curr_insn_location (),
10115 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10116 DECL_ARTIFICIAL (val
) = 1;
10117 DECL_IGNORED_P (val
) = 1;
10119 TREE_OPERAND (exp
, 0) = treeop0
;
10120 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10122 if (!CONSTANT_P (ret
))
10123 ret
= copy_to_reg (ret
);
10124 SET_DECL_RTL (val
, ret
);
10132 /* If we don't need the result, just ensure we evaluate any
10136 unsigned HOST_WIDE_INT idx
;
10139 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10140 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10145 return expand_constructor (exp
, target
, modifier
, false);
10147 case TARGET_MEM_REF
:
10150 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10151 enum insn_code icode
;
10152 unsigned int align
;
10154 op0
= addr_for_mem_ref (exp
, as
, true);
10155 op0
= memory_address_addr_space (mode
, op0
, as
);
10156 temp
= gen_rtx_MEM (mode
, op0
);
10157 set_mem_attributes (temp
, exp
, 0);
10158 set_mem_addr_space (temp
, as
);
10159 align
= get_object_alignment (exp
);
10160 if (modifier
!= EXPAND_WRITE
10161 && modifier
!= EXPAND_MEMORY
10163 && align
< GET_MODE_ALIGNMENT (mode
)
10164 /* If the target does not have special handling for unaligned
10165 loads of mode then it can use regular moves for them. */
10166 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10167 != CODE_FOR_nothing
))
10169 struct expand_operand ops
[2];
10171 /* We've already validated the memory, and we're creating a
10172 new pseudo destination. The predicates really can't fail,
10173 nor can the generator. */
10174 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10175 create_fixed_operand (&ops
[1], temp
);
10176 expand_insn (icode
, 2, ops
);
10177 temp
= ops
[0].value
;
10184 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10186 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10187 machine_mode address_mode
;
10188 tree base
= TREE_OPERAND (exp
, 0);
10190 enum insn_code icode
;
10192 /* Handle expansion of non-aliased memory with non-BLKmode. That
10193 might end up in a register. */
10194 if (mem_ref_refers_to_non_mem_p (exp
))
10196 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10197 base
= TREE_OPERAND (base
, 0);
10198 poly_uint64 type_size
;
10199 if (known_eq (offset
, 0)
10201 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10202 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10203 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10204 target
, tmode
, modifier
);
10205 if (TYPE_MODE (type
) == BLKmode
)
10207 temp
= assign_stack_temp (DECL_MODE (base
),
10208 GET_MODE_SIZE (DECL_MODE (base
)));
10209 store_expr (base
, temp
, 0, false, false);
10210 temp
= adjust_address (temp
, BLKmode
, offset
);
10211 set_mem_size (temp
, int_size_in_bytes (type
));
10214 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10215 bitsize_int (offset
* BITS_PER_UNIT
));
10216 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10217 return expand_expr (exp
, target
, tmode
, modifier
);
10219 address_mode
= targetm
.addr_space
.address_mode (as
);
10220 base
= TREE_OPERAND (exp
, 0);
10221 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10223 tree mask
= gimple_assign_rhs2 (def_stmt
);
10224 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10225 gimple_assign_rhs1 (def_stmt
), mask
);
10226 TREE_OPERAND (exp
, 0) = base
;
10228 align
= get_object_alignment (exp
);
10229 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10230 op0
= memory_address_addr_space (mode
, op0
, as
);
10231 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10233 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10234 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10235 op0
= memory_address_addr_space (mode
, op0
, as
);
10237 temp
= gen_rtx_MEM (mode
, op0
);
10238 set_mem_attributes (temp
, exp
, 0);
10239 set_mem_addr_space (temp
, as
);
10240 if (TREE_THIS_VOLATILE (exp
))
10241 MEM_VOLATILE_P (temp
) = 1;
10242 if (modifier
!= EXPAND_WRITE
10243 && modifier
!= EXPAND_MEMORY
10244 && !inner_reference_p
10246 && align
< GET_MODE_ALIGNMENT (mode
))
10248 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10249 != CODE_FOR_nothing
)
10251 struct expand_operand ops
[2];
10253 /* We've already validated the memory, and we're creating a
10254 new pseudo destination. The predicates really can't fail,
10255 nor can the generator. */
10256 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10257 create_fixed_operand (&ops
[1], temp
);
10258 expand_insn (icode
, 2, ops
);
10259 temp
= ops
[0].value
;
10261 else if (targetm
.slow_unaligned_access (mode
, align
))
10262 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10263 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10264 (modifier
== EXPAND_STACK_PARM
10265 ? NULL_RTX
: target
),
10266 mode
, mode
, false, alt_rtl
);
10269 && modifier
!= EXPAND_MEMORY
10270 && modifier
!= EXPAND_WRITE
)
10271 temp
= flip_storage_order (mode
, temp
);
10278 tree array
= treeop0
;
10279 tree index
= treeop1
;
10282 /* Fold an expression like: "foo"[2].
10283 This is not done in fold so it won't happen inside &.
10284 Don't fold if this is for wide characters since it's too
10285 difficult to do correctly and this is a very rare case. */
10287 if (modifier
!= EXPAND_CONST_ADDRESS
10288 && modifier
!= EXPAND_INITIALIZER
10289 && modifier
!= EXPAND_MEMORY
)
10291 tree t
= fold_read_from_constant_string (exp
);
10294 return expand_expr (t
, target
, tmode
, modifier
);
10297 /* If this is a constant index into a constant array,
10298 just get the value from the array. Handle both the cases when
10299 we have an explicit constructor and when our operand is a variable
10300 that was declared const. */
10302 if (modifier
!= EXPAND_CONST_ADDRESS
10303 && modifier
!= EXPAND_INITIALIZER
10304 && modifier
!= EXPAND_MEMORY
10305 && TREE_CODE (array
) == CONSTRUCTOR
10306 && ! TREE_SIDE_EFFECTS (array
)
10307 && TREE_CODE (index
) == INTEGER_CST
)
10309 unsigned HOST_WIDE_INT ix
;
10312 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10314 if (tree_int_cst_equal (field
, index
))
10316 if (!TREE_SIDE_EFFECTS (value
))
10317 return expand_expr (fold (value
), target
, tmode
, modifier
);
10322 else if (optimize
>= 1
10323 && modifier
!= EXPAND_CONST_ADDRESS
10324 && modifier
!= EXPAND_INITIALIZER
10325 && modifier
!= EXPAND_MEMORY
10326 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10327 && TREE_CODE (index
) == INTEGER_CST
10328 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10329 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10331 if (init
== NULL_TREE
)
10333 tree value
= build_zero_cst (type
);
10334 if (TREE_CODE (value
) == CONSTRUCTOR
)
10336 /* If VALUE is a CONSTRUCTOR, this optimization is only
10337 useful if this doesn't store the CONSTRUCTOR into
10338 memory. If it does, it is more efficient to just
10339 load the data from the array directly. */
10340 rtx ret
= expand_constructor (value
, target
,
10342 if (ret
== NULL_RTX
)
10347 return expand_expr (value
, target
, tmode
, modifier
);
10349 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10351 unsigned HOST_WIDE_INT ix
;
10354 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10356 if (tree_int_cst_equal (field
, index
))
10358 if (TREE_SIDE_EFFECTS (value
))
10361 if (TREE_CODE (value
) == CONSTRUCTOR
)
10363 /* If VALUE is a CONSTRUCTOR, this
10364 optimization is only useful if
10365 this doesn't store the CONSTRUCTOR
10366 into memory. If it does, it is more
10367 efficient to just load the data from
10368 the array directly. */
10369 rtx ret
= expand_constructor (value
, target
,
10371 if (ret
== NULL_RTX
)
10376 expand_expr (fold (value
), target
, tmode
, modifier
);
10379 else if (TREE_CODE (init
) == STRING_CST
)
10381 tree low_bound
= array_ref_low_bound (exp
);
10382 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10384 /* Optimize the special case of a zero lower bound.
10386 We convert the lower bound to sizetype to avoid problems
10387 with constant folding. E.g. suppose the lower bound is
10388 1 and its mode is QI. Without the conversion
10389 (ARRAY + (INDEX - (unsigned char)1))
10391 (ARRAY + (-(unsigned char)1) + INDEX)
10393 (ARRAY + 255 + INDEX). Oops! */
10394 if (!integer_zerop (low_bound
))
10395 index1
= size_diffop_loc (loc
, index1
,
10396 fold_convert_loc (loc
, sizetype
,
10399 if (tree_fits_uhwi_p (index1
)
10400 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10402 tree type
= TREE_TYPE (TREE_TYPE (init
));
10403 scalar_int_mode mode
;
10405 if (is_int_mode (TYPE_MODE (type
), &mode
)
10406 && GET_MODE_SIZE (mode
) == 1)
10407 return gen_int_mode (TREE_STRING_POINTER (init
)
10408 [TREE_INT_CST_LOW (index1
)],
10414 goto normal_inner_ref
;
10416 case COMPONENT_REF
:
10417 /* If the operand is a CONSTRUCTOR, we can just extract the
10418 appropriate field if it is present. */
10419 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10421 unsigned HOST_WIDE_INT idx
;
10423 scalar_int_mode field_mode
;
10425 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10427 if (field
== treeop1
10428 /* We can normally use the value of the field in the
10429 CONSTRUCTOR. However, if this is a bitfield in
10430 an integral mode that we can fit in a HOST_WIDE_INT,
10431 we must mask only the number of bits in the bitfield,
10432 since this is done implicitly by the constructor. If
10433 the bitfield does not meet either of those conditions,
10434 we can't do this optimization. */
10435 && (! DECL_BIT_FIELD (field
)
10436 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10437 && (GET_MODE_PRECISION (field_mode
)
10438 <= HOST_BITS_PER_WIDE_INT
))))
10440 if (DECL_BIT_FIELD (field
)
10441 && modifier
== EXPAND_STACK_PARM
)
10443 op0
= expand_expr (value
, target
, tmode
, modifier
);
10444 if (DECL_BIT_FIELD (field
))
10446 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10447 scalar_int_mode imode
10448 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10450 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10452 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10454 op0
= expand_and (imode
, op0
, op1
, target
);
10458 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10460 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10462 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10470 goto normal_inner_ref
;
10472 case BIT_FIELD_REF
:
10473 case ARRAY_RANGE_REF
:
10476 machine_mode mode1
, mode2
;
10477 poly_int64 bitsize
, bitpos
, bytepos
;
10479 int reversep
, volatilep
= 0, must_force_mem
;
10481 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10482 &unsignedp
, &reversep
, &volatilep
);
10483 rtx orig_op0
, memloc
;
10484 bool clear_mem_expr
= false;
10486 /* If we got back the original object, something is wrong. Perhaps
10487 we are evaluating an expression too early. In any event, don't
10488 infinitely recurse. */
10489 gcc_assert (tem
!= exp
);
10491 /* If TEM's type is a union of variable size, pass TARGET to the inner
10492 computation, since it will need a temporary and TARGET is known
10493 to have to do. This occurs in unchecked conversion in Ada. */
10495 = expand_expr_real (tem
,
10496 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10497 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10498 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10500 && modifier
!= EXPAND_STACK_PARM
10501 ? target
: NULL_RTX
),
10503 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10506 /* If the field has a mode, we want to access it in the
10507 field's mode, not the computed mode.
10508 If a MEM has VOIDmode (external with incomplete type),
10509 use BLKmode for it instead. */
10512 if (mode1
!= VOIDmode
)
10513 op0
= adjust_address (op0
, mode1
, 0);
10514 else if (GET_MODE (op0
) == VOIDmode
)
10515 op0
= adjust_address (op0
, BLKmode
, 0);
10519 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10521 /* If we have either an offset, a BLKmode result, or a reference
10522 outside the underlying object, we must force it to memory.
10523 Such a case can occur in Ada if we have unchecked conversion
10524 of an expression from a scalar type to an aggregate type or
10525 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10526 passed a partially uninitialized object or a view-conversion
10527 to a larger size. */
10528 must_force_mem
= (offset
10529 || mode1
== BLKmode
10530 || (mode
== BLKmode
10531 && !int_mode_for_size (bitsize
, 1).exists ())
10532 || maybe_gt (bitpos
+ bitsize
,
10533 GET_MODE_BITSIZE (mode2
)));
10535 /* Handle CONCAT first. */
10536 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10538 if (known_eq (bitpos
, 0)
10539 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10540 && COMPLEX_MODE_P (mode1
)
10541 && COMPLEX_MODE_P (GET_MODE (op0
))
10542 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10543 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10546 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10547 if (mode1
!= GET_MODE (op0
))
10550 for (int i
= 0; i
< 2; i
++)
10552 rtx op
= read_complex_part (op0
, i
!= 0);
10553 if (GET_CODE (op
) == SUBREG
)
10554 op
= force_reg (GET_MODE (op
), op
);
10555 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10561 if (!REG_P (op
) && !MEM_P (op
))
10562 op
= force_reg (GET_MODE (op
), op
);
10563 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10567 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10571 if (known_eq (bitpos
, 0)
10572 && known_eq (bitsize
,
10573 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10574 && maybe_ne (bitsize
, 0))
10576 op0
= XEXP (op0
, 0);
10577 mode2
= GET_MODE (op0
);
10579 else if (known_eq (bitpos
,
10580 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10581 && known_eq (bitsize
,
10582 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10583 && maybe_ne (bitpos
, 0)
10584 && maybe_ne (bitsize
, 0))
10586 op0
= XEXP (op0
, 1);
10588 mode2
= GET_MODE (op0
);
10591 /* Otherwise force into memory. */
10592 must_force_mem
= 1;
10595 /* If this is a constant, put it in a register if it is a legitimate
10596 constant and we don't need a memory reference. */
10597 if (CONSTANT_P (op0
)
10598 && mode2
!= BLKmode
10599 && targetm
.legitimate_constant_p (mode2
, op0
)
10600 && !must_force_mem
)
10601 op0
= force_reg (mode2
, op0
);
10603 /* Otherwise, if this is a constant, try to force it to the constant
10604 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10605 is a legitimate constant. */
10606 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10607 op0
= validize_mem (memloc
);
10609 /* Otherwise, if this is a constant or the object is not in memory
10610 and need be, put it there. */
10611 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10613 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10614 emit_move_insn (memloc
, op0
);
10616 clear_mem_expr
= true;
10621 machine_mode address_mode
;
10622 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10625 gcc_assert (MEM_P (op0
));
10627 address_mode
= get_address_mode (op0
);
10628 if (GET_MODE (offset_rtx
) != address_mode
)
10630 /* We cannot be sure that the RTL in offset_rtx is valid outside
10631 of a memory address context, so force it into a register
10632 before attempting to convert it to the desired mode. */
10633 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10634 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10637 /* See the comment in expand_assignment for the rationale. */
10638 if (mode1
!= VOIDmode
10639 && maybe_ne (bitpos
, 0)
10640 && maybe_gt (bitsize
, 0)
10641 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10642 && multiple_p (bitpos
, bitsize
)
10643 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10644 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10646 op0
= adjust_address (op0
, mode1
, bytepos
);
10650 op0
= offset_address (op0
, offset_rtx
,
10651 highest_pow2_factor (offset
));
10654 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10655 record its alignment as BIGGEST_ALIGNMENT. */
10657 && known_eq (bitpos
, 0)
10659 && is_aligning_offset (offset
, tem
))
10660 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10662 /* Don't forget about volatility even if this is a bitfield. */
10663 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10665 if (op0
== orig_op0
)
10666 op0
= copy_rtx (op0
);
10668 MEM_VOLATILE_P (op0
) = 1;
10671 /* In cases where an aligned union has an unaligned object
10672 as a field, we might be extracting a BLKmode value from
10673 an integer-mode (e.g., SImode) object. Handle this case
10674 by doing the extract into an object as wide as the field
10675 (which we know to be the width of a basic mode), then
10676 storing into memory, and changing the mode to BLKmode. */
10677 if (mode1
== VOIDmode
10678 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10679 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10680 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10681 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10682 && modifier
!= EXPAND_CONST_ADDRESS
10683 && modifier
!= EXPAND_INITIALIZER
10684 && modifier
!= EXPAND_MEMORY
)
10685 /* If the bitfield is volatile and the bitsize
10686 is narrower than the access size of the bitfield,
10687 we need to extract bitfields from the access. */
10688 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10689 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10690 && mode1
!= BLKmode
10691 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10692 /* If the field isn't aligned enough to fetch as a memref,
10693 fetch it as a bit field. */
10694 || (mode1
!= BLKmode
10696 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10697 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10698 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10699 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10700 && modifier
!= EXPAND_MEMORY
10701 && ((modifier
== EXPAND_CONST_ADDRESS
10702 || modifier
== EXPAND_INITIALIZER
)
10704 : targetm
.slow_unaligned_access (mode1
,
10706 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10707 /* If the type and the field are a constant size and the
10708 size of the type isn't the same size as the bitfield,
10709 we must use bitfield operations. */
10710 || (known_size_p (bitsize
)
10711 && TYPE_SIZE (TREE_TYPE (exp
))
10712 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10713 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10716 machine_mode ext_mode
= mode
;
10718 if (ext_mode
== BLKmode
10719 && ! (target
!= 0 && MEM_P (op0
)
10721 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10722 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10724 if (ext_mode
== BLKmode
)
10727 target
= assign_temp (type
, 1, 1);
10729 /* ??? Unlike the similar test a few lines below, this one is
10730 very likely obsolete. */
10731 if (known_eq (bitsize
, 0))
10734 /* In this case, BITPOS must start at a byte boundary and
10735 TARGET, if specified, must be a MEM. */
10736 gcc_assert (MEM_P (op0
)
10737 && (!target
|| MEM_P (target
)));
10739 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
10740 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
10741 emit_block_move (target
,
10742 adjust_address (op0
, VOIDmode
, bytepos
),
10743 gen_int_mode (bytesize
, Pmode
),
10744 (modifier
== EXPAND_STACK_PARM
10745 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10750 /* If we have nothing to extract, the result will be 0 for targets
10751 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10752 return 0 for the sake of consistency, as reading a zero-sized
10753 bitfield is valid in Ada and the value is fully specified. */
10754 if (known_eq (bitsize
, 0))
10757 op0
= validize_mem (op0
);
10759 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10760 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10762 /* If the result has a record type and the extraction is done in
10763 an integral mode, then the field may be not aligned on a byte
10764 boundary; in this case, if it has reverse storage order, it
10765 needs to be extracted as a scalar field with reverse storage
10766 order and put back into memory order afterwards. */
10767 if (TREE_CODE (type
) == RECORD_TYPE
10768 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10769 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10771 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10772 (modifier
== EXPAND_STACK_PARM
10773 ? NULL_RTX
: target
),
10774 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10776 /* If the result has a record type and the mode of OP0 is an
10777 integral mode then, if BITSIZE is narrower than this mode
10778 and this is for big-endian data, we must put the field
10779 into the high-order bits. And we must also put it back
10780 into memory order if it has been previously reversed. */
10781 scalar_int_mode op0_mode
;
10782 if (TREE_CODE (type
) == RECORD_TYPE
10783 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10785 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10787 gcc_checking_assert (known_le (bitsize
, size
));
10788 if (maybe_lt (bitsize
, size
)
10789 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10790 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10791 size
- bitsize
, op0
, 1);
10794 op0
= flip_storage_order (op0_mode
, op0
);
10797 /* If the result type is BLKmode, store the data into a temporary
10798 of the appropriate type, but with the mode corresponding to the
10799 mode for the data we have (op0's mode). */
10800 if (mode
== BLKmode
)
10803 = assign_stack_temp_for_type (ext_mode
,
10804 GET_MODE_BITSIZE (ext_mode
),
10806 emit_move_insn (new_rtx
, op0
);
10807 op0
= copy_rtx (new_rtx
);
10808 PUT_MODE (op0
, BLKmode
);
10814 /* If the result is BLKmode, use that to access the object
10816 if (mode
== BLKmode
)
10819 /* Get a reference to just this component. */
10820 bytepos
= bits_to_bytes_round_down (bitpos
);
10821 if (modifier
== EXPAND_CONST_ADDRESS
10822 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10823 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
10825 op0
= adjust_address (op0
, mode1
, bytepos
);
10827 if (op0
== orig_op0
)
10828 op0
= copy_rtx (op0
);
10830 /* Don't set memory attributes if the base expression is
10831 SSA_NAME that got expanded as a MEM. In that case, we should
10832 just honor its original memory attributes. */
10833 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10834 set_mem_attributes (op0
, exp
, 0);
10836 if (REG_P (XEXP (op0
, 0)))
10837 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10839 /* If op0 is a temporary because the original expressions was forced
10840 to memory, clear MEM_EXPR so that the original expression cannot
10841 be marked as addressable through MEM_EXPR of the temporary. */
10842 if (clear_mem_expr
)
10843 set_mem_expr (op0
, NULL_TREE
);
10845 MEM_VOLATILE_P (op0
) |= volatilep
;
10848 && modifier
!= EXPAND_MEMORY
10849 && modifier
!= EXPAND_WRITE
)
10850 op0
= flip_storage_order (mode1
, op0
);
10852 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10853 || modifier
== EXPAND_CONST_ADDRESS
10854 || modifier
== EXPAND_INITIALIZER
)
10858 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10860 convert_move (target
, op0
, unsignedp
);
10865 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10868 /* All valid uses of __builtin_va_arg_pack () are removed during
10870 if (CALL_EXPR_VA_ARG_PACK (exp
))
10871 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10873 tree fndecl
= get_callee_fndecl (exp
), attr
;
10876 /* Don't diagnose the error attribute in thunks, those are
10877 artificially created. */
10878 && !CALL_FROM_THUNK_P (exp
)
10879 && (attr
= lookup_attribute ("error",
10880 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10882 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
10883 error ("%Kcall to %qs declared with attribute error: %s", exp
,
10884 identifier_to_locale (ident
),
10885 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10888 /* Don't diagnose the warning attribute in thunks, those are
10889 artificially created. */
10890 && !CALL_FROM_THUNK_P (exp
)
10891 && (attr
= lookup_attribute ("warning",
10892 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10894 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
10895 warning_at (tree_nonartificial_location (exp
), 0,
10896 "%Kcall to %qs declared with attribute warning: %s",
10897 exp
, identifier_to_locale (ident
),
10898 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10901 /* Check for a built-in function. */
10902 if (fndecl
&& DECL_BUILT_IN (fndecl
))
10904 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
10905 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
10908 return expand_call (exp
, target
, ignore
);
10910 case VIEW_CONVERT_EXPR
:
10913 /* If we are converting to BLKmode, try to avoid an intermediate
10914 temporary by fetching an inner memory reference. */
10915 if (mode
== BLKmode
10916 && poly_int_tree_p (TYPE_SIZE (type
))
10917 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
10918 && handled_component_p (treeop0
))
10920 machine_mode mode1
;
10921 poly_int64 bitsize
, bitpos
, bytepos
;
10923 int unsignedp
, reversep
, volatilep
= 0;
10925 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
10926 &unsignedp
, &reversep
, &volatilep
);
10929 /* ??? We should work harder and deal with non-zero offsets. */
10931 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10933 && known_size_p (bitsize
)
10934 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
10936 /* See the normal_inner_ref case for the rationale. */
10938 = expand_expr_real (tem
,
10939 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10940 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10942 && modifier
!= EXPAND_STACK_PARM
10943 ? target
: NULL_RTX
),
10945 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10948 if (MEM_P (orig_op0
))
10952 /* Get a reference to just this component. */
10953 if (modifier
== EXPAND_CONST_ADDRESS
10954 || modifier
== EXPAND_SUM
10955 || modifier
== EXPAND_INITIALIZER
)
10956 op0
= adjust_address_nv (op0
, mode
, bytepos
);
10958 op0
= adjust_address (op0
, mode
, bytepos
);
10960 if (op0
== orig_op0
)
10961 op0
= copy_rtx (op0
);
10963 set_mem_attributes (op0
, treeop0
, 0);
10964 if (REG_P (XEXP (op0
, 0)))
10965 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10967 MEM_VOLATILE_P (op0
) |= volatilep
;
10973 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
10974 NULL
, inner_reference_p
);
10976 /* If the input and output modes are both the same, we are done. */
10977 if (mode
== GET_MODE (op0
))
10979 /* If neither mode is BLKmode, and both modes are the same size
10980 then we can use gen_lowpart. */
10981 else if (mode
!= BLKmode
10982 && GET_MODE (op0
) != BLKmode
10983 && known_eq (GET_MODE_PRECISION (mode
),
10984 GET_MODE_PRECISION (GET_MODE (op0
)))
10985 && !COMPLEX_MODE_P (GET_MODE (op0
)))
10987 if (GET_CODE (op0
) == SUBREG
)
10988 op0
= force_reg (GET_MODE (op0
), op0
);
10989 temp
= gen_lowpart_common (mode
, op0
);
10994 if (!REG_P (op0
) && !MEM_P (op0
))
10995 op0
= force_reg (GET_MODE (op0
), op0
);
10996 op0
= gen_lowpart (mode
, op0
);
10999 /* If both types are integral, convert from one mode to the other. */
11000 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11001 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11002 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11003 /* If the output type is a bit-field type, do an extraction. */
11004 else if (reduce_bit_field
)
11005 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11006 TYPE_UNSIGNED (type
), NULL_RTX
,
11007 mode
, mode
, false, NULL
);
11008 /* As a last resort, spill op0 to memory, and reload it in a
11010 else if (!MEM_P (op0
))
11012 /* If the operand is not a MEM, force it into memory. Since we
11013 are going to be changing the mode of the MEM, don't call
11014 force_const_mem for constants because we don't allow pool
11015 constants to change mode. */
11016 tree inner_type
= TREE_TYPE (treeop0
);
11018 gcc_assert (!TREE_ADDRESSABLE (exp
));
11020 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11022 = assign_stack_temp_for_type
11023 (TYPE_MODE (inner_type
),
11024 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11026 emit_move_insn (target
, op0
);
11030 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11031 output type is such that the operand is known to be aligned, indicate
11032 that it is. Otherwise, we need only be concerned about alignment for
11033 non-BLKmode results. */
11036 enum insn_code icode
;
11038 if (modifier
!= EXPAND_WRITE
11039 && modifier
!= EXPAND_MEMORY
11040 && !inner_reference_p
11042 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11044 /* If the target does have special handling for unaligned
11045 loads of mode then use them. */
11046 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11047 != CODE_FOR_nothing
)
11051 op0
= adjust_address (op0
, mode
, 0);
11052 /* We've already validated the memory, and we're creating a
11053 new pseudo destination. The predicates really can't
11055 reg
= gen_reg_rtx (mode
);
11057 /* Nor can the insn generator. */
11058 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11062 else if (STRICT_ALIGNMENT
)
11064 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11065 poly_uint64 temp_size
= mode_size
;
11066 if (GET_MODE (op0
) != BLKmode
)
11067 temp_size
= upper_bound (temp_size
,
11068 GET_MODE_SIZE (GET_MODE (op0
)));
11070 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11071 rtx new_with_op0_mode
11072 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11074 gcc_assert (!TREE_ADDRESSABLE (exp
));
11076 if (GET_MODE (op0
) == BLKmode
)
11078 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11079 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11080 (modifier
== EXPAND_STACK_PARM
11081 ? BLOCK_OP_CALL_PARM
11082 : BLOCK_OP_NORMAL
));
11085 emit_move_insn (new_with_op0_mode
, op0
);
11091 op0
= adjust_address (op0
, mode
, 0);
11098 tree lhs
= treeop0
;
11099 tree rhs
= treeop1
;
11100 gcc_assert (ignore
);
11102 /* Check for |= or &= of a bitfield of size one into another bitfield
11103 of size 1. In this case, (unless we need the result of the
11104 assignment) we can do this more efficiently with a
11105 test followed by an assignment, if necessary.
11107 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11108 things change so we do, this code should be enhanced to
11110 if (TREE_CODE (lhs
) == COMPONENT_REF
11111 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11112 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11113 && TREE_OPERAND (rhs
, 0) == lhs
11114 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11115 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11116 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11118 rtx_code_label
*label
= gen_label_rtx ();
11119 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11120 do_jump (TREE_OPERAND (rhs
, 1),
11123 profile_probability::uninitialized ());
11124 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11126 do_pending_stack_adjust ();
11127 emit_label (label
);
11131 expand_assignment (lhs
, rhs
, false);
11136 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11138 case REALPART_EXPR
:
11139 op0
= expand_normal (treeop0
);
11140 return read_complex_part (op0
, false);
11142 case IMAGPART_EXPR
:
11143 op0
= expand_normal (treeop0
);
11144 return read_complex_part (op0
, true);
11151 /* Expanded in cfgexpand.c. */
11152 gcc_unreachable ();
11154 case TRY_CATCH_EXPR
:
11156 case EH_FILTER_EXPR
:
11157 case TRY_FINALLY_EXPR
:
11158 /* Lowered by tree-eh.c. */
11159 gcc_unreachable ();
11161 case WITH_CLEANUP_EXPR
:
11162 case CLEANUP_POINT_EXPR
:
11164 case CASE_LABEL_EXPR
:
11169 case COMPOUND_EXPR
:
11170 case PREINCREMENT_EXPR
:
11171 case PREDECREMENT_EXPR
:
11172 case POSTINCREMENT_EXPR
:
11173 case POSTDECREMENT_EXPR
:
11176 case COMPOUND_LITERAL_EXPR
:
11177 /* Lowered by gimplify.c. */
11178 gcc_unreachable ();
11181 /* Function descriptors are not valid except for as
11182 initialization constants, and should not be expanded. */
11183 gcc_unreachable ();
11185 case WITH_SIZE_EXPR
:
11186 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11187 have pulled out the size to use in whatever context it needed. */
11188 return expand_expr_real (treeop0
, original_target
, tmode
,
11189 modifier
, alt_rtl
, inner_reference_p
);
11192 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11196 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11197 signedness of TYPE), possibly returning the result in TARGET.
11198 TYPE is known to be a partial integer type. */
11200 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11202 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11203 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11205 /* For constant values, reduce using build_int_cst_type. */
11206 if (CONST_INT_P (exp
))
11208 HOST_WIDE_INT value
= INTVAL (exp
);
11209 tree t
= build_int_cst_type (type
, value
);
11210 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11212 else if (TYPE_UNSIGNED (type
))
11214 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11215 rtx mask
= immed_wide_int_const
11216 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11217 return expand_and (mode
, exp
, mask
, target
);
11221 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11222 int count
= GET_MODE_PRECISION (mode
) - prec
;
11223 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11224 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11228 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11229 when applied to the address of EXP produces an address known to be
11230 aligned more than BIGGEST_ALIGNMENT. */
11233 is_aligning_offset (const_tree offset
, const_tree exp
)
11235 /* Strip off any conversions. */
11236 while (CONVERT_EXPR_P (offset
))
11237 offset
= TREE_OPERAND (offset
, 0);
11239 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11240 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11241 if (TREE_CODE (offset
) != BIT_AND_EXPR
11242 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11243 || compare_tree_int (TREE_OPERAND (offset
, 1),
11244 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11245 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11248 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11249 It must be NEGATE_EXPR. Then strip any more conversions. */
11250 offset
= TREE_OPERAND (offset
, 0);
11251 while (CONVERT_EXPR_P (offset
))
11252 offset
= TREE_OPERAND (offset
, 0);
11254 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11257 offset
= TREE_OPERAND (offset
, 0);
11258 while (CONVERT_EXPR_P (offset
))
11259 offset
= TREE_OPERAND (offset
, 0);
11261 /* This must now be the address of EXP. */
11262 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11265 /* Return the tree node if an ARG corresponds to a string constant or zero
11266 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11267 in bytes within the string that ARG is accessing. The type of the
11268 offset will be `sizetype'. */
11271 string_constant (tree arg
, tree
*ptr_offset
)
11273 tree array
, offset
, lower_bound
;
11276 if (TREE_CODE (arg
) == ADDR_EXPR
)
11278 if (TREE_CODE (TREE_OPERAND (arg
, 0)) == STRING_CST
)
11280 *ptr_offset
= size_zero_node
;
11281 return TREE_OPERAND (arg
, 0);
11283 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == VAR_DECL
)
11285 array
= TREE_OPERAND (arg
, 0);
11286 offset
= size_zero_node
;
11288 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == ARRAY_REF
)
11290 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11291 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11292 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11295 /* Check if the array has a nonzero lower bound. */
11296 lower_bound
= array_ref_low_bound (TREE_OPERAND (arg
, 0));
11297 if (!integer_zerop (lower_bound
))
11299 /* If the offset and base aren't both constants, return 0. */
11300 if (TREE_CODE (lower_bound
) != INTEGER_CST
)
11302 if (TREE_CODE (offset
) != INTEGER_CST
)
11304 /* Adjust offset by the lower bound. */
11305 offset
= size_diffop (fold_convert (sizetype
, offset
),
11306 fold_convert (sizetype
, lower_bound
));
11309 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == MEM_REF
)
11311 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11312 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11313 if (TREE_CODE (array
) != ADDR_EXPR
)
11315 array
= TREE_OPERAND (array
, 0);
11316 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11322 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11324 tree arg0
= TREE_OPERAND (arg
, 0);
11325 tree arg1
= TREE_OPERAND (arg
, 1);
11330 if (TREE_CODE (arg0
) == ADDR_EXPR
11331 && (TREE_CODE (TREE_OPERAND (arg0
, 0)) == STRING_CST
11332 || TREE_CODE (TREE_OPERAND (arg0
, 0)) == VAR_DECL
))
11334 array
= TREE_OPERAND (arg0
, 0);
11337 else if (TREE_CODE (arg1
) == ADDR_EXPR
11338 && (TREE_CODE (TREE_OPERAND (arg1
, 0)) == STRING_CST
11339 || TREE_CODE (TREE_OPERAND (arg1
, 0)) == VAR_DECL
))
11341 array
= TREE_OPERAND (arg1
, 0);
11350 if (TREE_CODE (array
) == STRING_CST
)
11352 *ptr_offset
= fold_convert (sizetype
, offset
);
11355 else if (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
11358 tree init
= ctor_for_folding (array
);
11360 /* Variables initialized to string literals can be handled too. */
11361 if (init
== error_mark_node
11363 || TREE_CODE (init
) != STRING_CST
)
11366 /* Avoid const char foo[4] = "abcde"; */
11367 if (DECL_SIZE_UNIT (array
) == NULL_TREE
11368 || TREE_CODE (DECL_SIZE_UNIT (array
)) != INTEGER_CST
11369 || (length
= TREE_STRING_LENGTH (init
)) <= 0
11370 || compare_tree_int (DECL_SIZE_UNIT (array
), length
) < 0)
11373 /* If variable is bigger than the string literal, OFFSET must be constant
11374 and inside of the bounds of the string literal. */
11375 offset
= fold_convert (sizetype
, offset
);
11376 if (compare_tree_int (DECL_SIZE_UNIT (array
), length
) > 0
11377 && (! tree_fits_uhwi_p (offset
)
11378 || compare_tree_int (offset
, length
) >= 0))
11381 *ptr_offset
= offset
;
11388 /* Generate code to calculate OPS, and exploded expression
11389 using a store-flag instruction and return an rtx for the result.
11390 OPS reflects a comparison.
11392 If TARGET is nonzero, store the result there if convenient.
11394 Return zero if there is no suitable set-flag instruction
11395 available on this machine.
11397 Once expand_expr has been called on the arguments of the comparison,
11398 we are committed to doing the store flag, since it is not safe to
11399 re-evaluate the expression. We emit the store-flag insn by calling
11400 emit_store_flag, but only expand the arguments if we have a reason
11401 to believe that emit_store_flag will be successful. If we think that
11402 it will, but it isn't, we have to simulate the store-flag with a
11403 set/jump/set sequence. */
11406 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11408 enum rtx_code code
;
11409 tree arg0
, arg1
, type
;
11410 machine_mode operand_mode
;
11413 rtx subtarget
= target
;
11414 location_t loc
= ops
->location
;
11419 /* Don't crash if the comparison was erroneous. */
11420 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11423 type
= TREE_TYPE (arg0
);
11424 operand_mode
= TYPE_MODE (type
);
11425 unsignedp
= TYPE_UNSIGNED (type
);
11427 /* We won't bother with BLKmode store-flag operations because it would mean
11428 passing a lot of information to emit_store_flag. */
11429 if (operand_mode
== BLKmode
)
11432 /* We won't bother with store-flag operations involving function pointers
11433 when function pointers must be canonicalized before comparisons. */
11434 if (targetm
.have_canonicalize_funcptr_for_compare ()
11435 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
11436 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
11438 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
11439 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
11440 == FUNCTION_TYPE
))))
11446 /* For vector typed comparisons emit code to generate the desired
11447 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11448 expander for this. */
11449 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
11451 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
11452 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
11453 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
11454 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
11457 tree if_true
= constant_boolean_node (true, ops
->type
);
11458 tree if_false
= constant_boolean_node (false, ops
->type
);
11459 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
11464 /* Get the rtx comparison code to use. We know that EXP is a comparison
11465 operation of some type. Some comparisons against 1 and -1 can be
11466 converted to comparisons with zero. Do so here so that the tests
11467 below will be aware that we have a comparison with zero. These
11468 tests will not catch constants in the first operand, but constants
11469 are rarely passed as the first operand. */
11480 if (integer_onep (arg1
))
11481 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
11483 code
= unsignedp
? LTU
: LT
;
11486 if (! unsignedp
&& integer_all_onesp (arg1
))
11487 arg1
= integer_zero_node
, code
= LT
;
11489 code
= unsignedp
? LEU
: LE
;
11492 if (! unsignedp
&& integer_all_onesp (arg1
))
11493 arg1
= integer_zero_node
, code
= GE
;
11495 code
= unsignedp
? GTU
: GT
;
11498 if (integer_onep (arg1
))
11499 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
11501 code
= unsignedp
? GEU
: GE
;
11504 case UNORDERED_EXPR
:
11530 gcc_unreachable ();
11533 /* Put a constant second. */
11534 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
11535 || TREE_CODE (arg0
) == FIXED_CST
)
11537 std::swap (arg0
, arg1
);
11538 code
= swap_condition (code
);
11541 /* If this is an equality or inequality test of a single bit, we can
11542 do this by shifting the bit being tested to the low-order bit and
11543 masking the result with the constant 1. If the condition was EQ,
11544 we xor it with 1. This does not require an scc insn and is faster
11545 than an scc insn even if we have it.
11547 The code to make this transformation was moved into fold_single_bit_test,
11548 so we just call into the folder and expand its result. */
11550 if ((code
== NE
|| code
== EQ
)
11551 && integer_zerop (arg1
)
11552 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
11554 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
11556 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
11558 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
11559 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
11560 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
11561 gimple_assign_rhs1 (srcstmt
),
11562 gimple_assign_rhs2 (srcstmt
));
11563 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
11565 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
11569 if (! get_subtarget (target
)
11570 || GET_MODE (subtarget
) != operand_mode
)
11573 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
11576 target
= gen_reg_rtx (mode
);
11578 /* Try a cstore if possible. */
11579 return emit_store_flag_force (target
, code
, op0
, op1
,
11580 operand_mode
, unsignedp
,
11581 (TYPE_PRECISION (ops
->type
) == 1
11582 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
11585 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11586 0 otherwise (i.e. if there is no casesi instruction).
11588 DEFAULT_PROBABILITY is the probability of jumping to the default
11591 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
11592 rtx table_label
, rtx default_label
, rtx fallback_label
,
11593 profile_probability default_probability
)
11595 struct expand_operand ops
[5];
11596 scalar_int_mode index_mode
= SImode
;
11597 rtx op1
, op2
, index
;
11599 if (! targetm
.have_casesi ())
11602 /* The index must be some form of integer. Convert it to SImode. */
11603 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
11604 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
11606 rtx rangertx
= expand_normal (range
);
11608 /* We must handle the endpoints in the original mode. */
11609 index_expr
= build2 (MINUS_EXPR
, index_type
,
11610 index_expr
, minval
);
11611 minval
= integer_zero_node
;
11612 index
= expand_normal (index_expr
);
11614 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
11615 omode
, 1, default_label
,
11616 default_probability
);
11617 /* Now we can safely truncate. */
11618 index
= convert_to_mode (index_mode
, index
, 0);
11622 if (omode
!= index_mode
)
11624 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
11625 index_expr
= fold_convert (index_type
, index_expr
);
11628 index
= expand_normal (index_expr
);
11631 do_pending_stack_adjust ();
11633 op1
= expand_normal (minval
);
11634 op2
= expand_normal (range
);
11636 create_input_operand (&ops
[0], index
, index_mode
);
11637 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
11638 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
11639 create_fixed_operand (&ops
[3], table_label
);
11640 create_fixed_operand (&ops
[4], (default_label
11642 : fallback_label
));
11643 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
11647 /* Attempt to generate a tablejump instruction; same concept. */
11648 /* Subroutine of the next function.
11650 INDEX is the value being switched on, with the lowest value
11651 in the table already subtracted.
11652 MODE is its expected mode (needed if INDEX is constant).
11653 RANGE is the length of the jump table.
11654 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11656 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11657 index value is out of range.
11658 DEFAULT_PROBABILITY is the probability of jumping to
11659 the default label. */
11662 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
11663 rtx default_label
, profile_probability default_probability
)
11667 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
11668 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
11670 /* Do an unsigned comparison (in the proper mode) between the index
11671 expression and the value which represents the length of the range.
11672 Since we just finished subtracting the lower bound of the range
11673 from the index expression, this comparison allows us to simultaneously
11674 check that the original index expression value is both greater than
11675 or equal to the minimum value of the range and less than or equal to
11676 the maximum value of the range. */
11679 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
11680 default_label
, default_probability
);
11682 /* If index is in range, it must fit in Pmode.
11683 Convert to Pmode so we can index with it. */
11686 unsigned int width
;
11688 /* We know the value of INDEX is between 0 and RANGE. If we have a
11689 sign-extended subreg, and RANGE does not have the sign bit set, then
11690 we have a value that is valid for both sign and zero extension. In
11691 this case, we get better code if we sign extend. */
11692 if (GET_CODE (index
) == SUBREG
11693 && SUBREG_PROMOTED_VAR_P (index
)
11694 && SUBREG_PROMOTED_SIGNED_P (index
)
11695 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
11696 <= HOST_BITS_PER_WIDE_INT
)
11697 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
11698 index
= convert_to_mode (Pmode
, index
, 0);
11700 index
= convert_to_mode (Pmode
, index
, 1);
11703 /* Don't let a MEM slip through, because then INDEX that comes
11704 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11705 and break_out_memory_refs will go to work on it and mess it up. */
11706 #ifdef PIC_CASE_VECTOR_ADDRESS
11707 if (flag_pic
&& !REG_P (index
))
11708 index
= copy_to_mode_reg (Pmode
, index
);
11711 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11712 GET_MODE_SIZE, because this indicates how large insns are. The other
11713 uses should all be Pmode, because they are addresses. This code
11714 could fail if addresses and insns are not the same size. */
11715 index
= simplify_gen_binary (MULT
, Pmode
, index
,
11716 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
11718 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
11719 gen_rtx_LABEL_REF (Pmode
, table_label
));
11721 #ifdef PIC_CASE_VECTOR_ADDRESS
11723 index
= PIC_CASE_VECTOR_ADDRESS (index
);
11726 index
= memory_address (CASE_VECTOR_MODE
, index
);
11727 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
11728 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
11729 convert_move (temp
, vector
, 0);
11731 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
11733 /* If we are generating PIC code or if the table is PC-relative, the
11734 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11735 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
11740 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
11741 rtx table_label
, rtx default_label
,
11742 profile_probability default_probability
)
11746 if (! targetm
.have_tablejump ())
11749 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
11750 fold_convert (index_type
, index_expr
),
11751 fold_convert (index_type
, minval
));
11752 index
= expand_normal (index_expr
);
11753 do_pending_stack_adjust ();
11755 do_tablejump (index
, TYPE_MODE (index_type
),
11756 convert_modes (TYPE_MODE (index_type
),
11757 TYPE_MODE (TREE_TYPE (range
)),
11758 expand_normal (range
),
11759 TYPE_UNSIGNED (TREE_TYPE (range
))),
11760 table_label
, default_label
, default_probability
);
11764 /* Return a CONST_VECTOR rtx representing vector mask for
11765 a VECTOR_CST of booleans. */
11767 const_vector_mask_from_tree (tree exp
)
11769 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11770 machine_mode inner
= GET_MODE_INNER (mode
);
11772 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
11773 VECTOR_CST_NELTS_PER_PATTERN (exp
));
11774 unsigned int count
= builder
.encoded_nelts ();
11775 for (unsigned int i
= 0; i
< count
; ++i
)
11777 tree elt
= VECTOR_CST_ELT (exp
, i
);
11778 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11779 if (integer_zerop (elt
))
11780 builder
.quick_push (CONST0_RTX (inner
));
11781 else if (integer_onep (elt
)
11782 || integer_minus_onep (elt
))
11783 builder
.quick_push (CONSTM1_RTX (inner
));
11785 gcc_unreachable ();
11787 return builder
.build ();
11790 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11791 Return a constant scalar rtx of mode MODE in which bit X is set if element
11792 X of EXP is nonzero. */
11794 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
11796 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
11799 /* The result has a fixed number of bits so the input must too. */
11800 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
11801 for (unsigned int i
= 0; i
< nunits
; ++i
)
11803 elt
= VECTOR_CST_ELT (exp
, i
);
11804 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11805 if (integer_all_onesp (elt
))
11806 res
= wi::set_bit (res
, i
);
11808 gcc_assert (integer_zerop (elt
));
11811 return immed_wide_int_const (res
, mode
);
11814 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11816 const_vector_from_tree (tree exp
)
11818 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11820 if (initializer_zerop (exp
))
11821 return CONST0_RTX (mode
);
11823 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
11824 return const_vector_mask_from_tree (exp
);
11826 machine_mode inner
= GET_MODE_INNER (mode
);
11828 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
11829 VECTOR_CST_NELTS_PER_PATTERN (exp
));
11830 unsigned int count
= builder
.encoded_nelts ();
11831 for (unsigned int i
= 0; i
< count
; ++i
)
11833 tree elt
= VECTOR_CST_ELT (exp
, i
);
11834 if (TREE_CODE (elt
) == REAL_CST
)
11835 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
11837 else if (TREE_CODE (elt
) == FIXED_CST
)
11838 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
11841 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
11844 return builder
.build ();
11847 /* Build a decl for a personality function given a language prefix. */
11850 build_personality_function (const char *lang
)
11852 const char *unwind_and_version
;
11856 switch (targetm_common
.except_unwind_info (&global_options
))
11861 unwind_and_version
= "_sj0";
11865 unwind_and_version
= "_v0";
11868 unwind_and_version
= "_seh0";
11871 gcc_unreachable ();
11874 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
11876 type
= build_function_type_list (integer_type_node
, integer_type_node
,
11877 long_long_unsigned_type_node
,
11878 ptr_type_node
, ptr_type_node
, NULL_TREE
);
11879 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
11880 get_identifier (name
), type
);
11881 DECL_ARTIFICIAL (decl
) = 1;
11882 DECL_EXTERNAL (decl
) = 1;
11883 TREE_PUBLIC (decl
) = 1;
11885 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11886 are the flags assigned by targetm.encode_section_info. */
11887 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
11892 /* Extracts the personality function of DECL and returns the corresponding
11896 get_personality_function (tree decl
)
11898 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
11899 enum eh_personality_kind pk
;
11901 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
11902 if (pk
== eh_personality_none
)
11906 && pk
== eh_personality_any
)
11907 personality
= lang_hooks
.eh_personality ();
11909 if (pk
== eh_personality_lang
)
11910 gcc_assert (personality
!= NULL_TREE
);
11912 return XEXP (DECL_RTL (personality
), 0);
11915 /* Returns a tree for the size of EXP in bytes. */
11918 tree_expr_size (const_tree exp
)
11921 && DECL_SIZE_UNIT (exp
) != 0)
11922 return DECL_SIZE_UNIT (exp
);
11924 return size_in_bytes (TREE_TYPE (exp
));
11927 /* Return an rtx for the size in bytes of the value of EXP. */
11930 expr_size (tree exp
)
11934 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11935 size
= TREE_OPERAND (exp
, 1);
11938 size
= tree_expr_size (exp
);
11940 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
11943 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
11946 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11947 if the size can vary or is larger than an integer. */
11949 static HOST_WIDE_INT
11950 int_expr_size (tree exp
)
11954 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11955 size
= TREE_OPERAND (exp
, 1);
11958 size
= tree_expr_size (exp
);
11962 if (size
== 0 || !tree_fits_shwi_p (size
))
11965 return tree_to_shwi (size
);